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authorMichael J. Chudobiak <mjc@avtechpulse.com>2012-09-27 14:46:18 -0400
committerMichael J. Chudobiak <mjc@avtechpulse.com>2012-09-27 14:46:18 -0400
commit13ee8e79fa2ff2155e27fbdb69ae14e766d8f7c3 (patch)
tree900ebd2cb900265bf9957b86e21d1afcfed45f45 /bus.c
parentaceea96906c3a80d674c63d9d20914421ee0bddc (diff)
tweak gpmc timing
Diffstat (limited to 'bus.c')
-rw-r--r--bus.c57
1 files changed, 40 insertions, 17 deletions
diff --git a/bus.c b/bus.c
index a860893..db24a2e 100644
--- a/bus.c
+++ b/bus.c
@@ -151,15 +151,6 @@ static void gpmc_printinfo()
}
-// The shift amounts
-
-#define CSWROFFTIME 16
-#define CSRDOFFTIME 8
-#define OEOFFTIME 8
-#define RDACCESSTIME 16
-#define WRCYCLETIME 8
-#define RDCYCLETIME 0
-#define WRACCESSTIME 24
#define BIDIR 0x20
#define PULL_UP 0x10
@@ -175,9 +166,42 @@ static void gpmc_printinfo()
#define MODE_7 0x07
-static void gpmc_setup(int chipselect, int accesscycles, int size, bool enablecs, int baseaddress)
-{
+// multiply by 10 ns
+#define TOTAL_IO_CYCLE 20; // 200 ns cycle
+#define CS_DELAY 0; // CS low right away
+#define DELAY_TO_WR_RD 4; // i.e., 40 ns after CS
+#define WR_RD_WIDTH 15; // 40 ns delay + 150 ns pulse + 10 ns spare
+#define DATA_READY 15; // data ready 150 ns after CS, 110 ns after RD/WR
+
+static void gpmc_setup(void)
+{
+ int chipselect = 0;
+ int size = GPMC_SIZE_16MB;
+ bool enablecs = true;
+ int baseaddress = 1;
+
+
+ int CSWROFFTIME = TOTAL_IO_CYCLE - CS_DELAY;
+ int CSRDOFFTIME = TOTAL_IO_CYCLE - CS_DELAY;
+ int CSONTIME = CS_DELAY;
+ int config2 = (CSWROFFTIME << 16) | (CSRDOFFTIME << 8) | CSONTIME;
+
+ int WEOFFTIME = DELAY_TO_WR_RD + WR_RD_WIDTH;
+ int WEONTIME = DELAY_TO_WR_RD;
+ int OEOFFTIME = DELAY_TO_WR_RD + WR_RD_WIDTH;
+ int OEONTIME = DELAY_TO_WR_RD;
+ int config4 = (WEOFFTIME << 24) | (WEONTIME << 16) | (OEOFFTIME << 8) | OEONTIME;
+
+ int RDACCESSTIME = DATA_READY;
+ int WRCYCLETIME = TOTAL_IO_CYCLE;
+ int RDCYCLETIME = TOTAL_IO_CYCLE;
+ int config5 = (RDACCESSTIME << 16) | (WRCYCLETIME << 8) | RDCYCLETIME;
+
+ int WRACCESSTIME = DATA_READY;
+ int config6 = WRACCESSTIME << 24;
+
+
pinmux_configurepin("gpmc_csn0", PULL_UP | MODE_0);
pinmux_configurepin("gpmc_oen_ren", PULL_UP | MODE_0);
pinmux_configurepin("gpmc_wen", PULL_UP | MODE_0);
@@ -209,12 +233,11 @@ static void gpmc_setup(int chipselect, int accesscycles, int size, bool enablecs
*(registers + displacement + GPMC_CONFIG7) = 0x0;
*(registers + displacement + GPMC_CONFIG1) = 0x0;
- *(registers + displacement + GPMC_CONFIG2) = (accesscycles << CSWROFFTIME) | (accesscycles << CSRDOFFTIME);
+ *(registers + displacement + GPMC_CONFIG2) = config2;
*(registers + displacement + GPMC_CONFIG3) = 0x0; // not using ADV so we can ignore this guy
- *(registers + displacement + GPMC_CONFIG4) = (accesscycles << OEOFFTIME);
- *(registers + displacement + GPMC_CONFIG5) = (accesscycles << RDACCESSTIME) | (accesscycles << WRCYCLETIME)
- | (accesscycles << RDCYCLETIME);
- *(registers + displacement + GPMC_CONFIG6) = (accesscycles << WRACCESSTIME);
+ *(registers + displacement + GPMC_CONFIG4) = config4;
+ *(registers + displacement + GPMC_CONFIG5) = config5;
+ *(registers + displacement + GPMC_CONFIG6) = config6;
*(registers + displacement + GPMC_CONFIG7) = size << 8 | (enablecs ? 1 << 6 : 0) | baseaddress;
gpmc_unmapregisters();
@@ -343,7 +366,7 @@ void bus_init()
}
if (isbb) {
- gpmc_setup(0, GPMCACCESSTIME, GPMC_SIZE_16MB, true, 1);
+ gpmc_setup();
extbus = (uint8_t*) util_mapmemoryblock(0x01000000, 0x100);