bus timing fixed with wide CS, 160 ns RD/WR

1 files changed, 9 insertions, 9 deletions

diff --git a/bus.c b/bus.c
index fd5016d..3c83eac 100644
--- a/bus.c
+++ b/bus.c
@@ -166,12 +166,12 @@ static void gpmc_printinfo()
 #define MODE_7 0x07
 
 
-// multiply by 10 ns
-#define TOTAL_IO_CYCLE 25;  // 250 ns cycle
-#define CS_DELAY 2;         // CS low 20ns after address valid
-#define DELAY_TO_WR_RD 4;   // RD/WR lines low 50ns after address valid
-#define WR_RD_WIDTH 20;     // stay low for until 200 ns after address valid
-#define DATA_READY 15;      // data ready 150ns after address valid
+// multiply by 20 ns
+#define TOTAL_IO_CYCLE 14  // 280 ns cycle
+#define CS_DELAY 1         // CS low 20ns after address valid
+#define DELAY_TO_WR_RD 2   // RD/WR lines low 40ns after address valid
+#define WR_RD_WIDTH 8     // stay low for until 200 ns after address valid
+#define DATA_READY 8     // data ready 160ns after address valid
 
 
 static void gpmc_setup(void)
@@ -182,8 +182,8 @@ static void gpmc_setup(void)
 	int baseaddress = 1;
 
 
-	int CSWROFFTIME = TOTAL_IO_CYCLE - CS_DELAY;
-	int CSRDOFFTIME = TOTAL_IO_CYCLE - CS_DELAY;
+	int CSWROFFTIME = TOTAL_IO_CYCLE;
+	int CSRDOFFTIME = TOTAL_IO_CYCLE;
 	int CSONTIME = CS_DELAY;
 	int config2 = (CSWROFFTIME << 16) | (CSRDOFFTIME << 8) | CSONTIME;
 
@@ -232,7 +232,7 @@ static void gpmc_setup(void)
 		// disable before playing with the registers..
 		*(registers + displacement + GPMC_CONFIG7) = 0x0;
 
-		*(registers + displacement + GPMC_CONFIG1) = 0x0;
+		*(registers + displacement + GPMC_CONFIG1) = 0x10; // double all of the timing values
 		*(registers + displacement + GPMC_CONFIG2) = config2;
 		*(registers + displacement + GPMC_CONFIG3) = 0x0; // not using ADV so we can ignore this guy
 		*(registers + displacement + GPMC_CONFIG4) = config4;