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authorroot <root@avtech.domain.avtechpulse.com>1970-01-01 09:47:05 +0900
committerroot <root@avtech.domain.avtechpulse.com>1970-01-01 09:47:05 +0900
commit4e7eae444566b943459200232bda5e52e482cb08 (patch)
tree93a0adab952cd81299cc1b15d373cd6a34d33b38 /device-functions.c
parente96bfa21e1e6951c0e23144321cffe29c8b2bd67 (diff)
add support for double-external-trigger mode in KMPF
Diffstat (limited to 'device-functions.c')
-rw-r--r--device-functions.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/device-functions.c b/device-functions.c
index b17eada..e516419 100644
--- a/device-functions.c
+++ b/device-functions.c
@@ -1067,12 +1067,17 @@ int Set_Trig_Source(int channel,int mode)
int use_pw_ctrl_mode;
int reset_freq;
float use_freq;
+ int xtr5_val;
/* abandon if high channel selected by user but not enabled by firmware */
if (channel && !globals.Flash.ChanKey_trigger_source) {
return InvalidChannel;
}
+ if (!(globals.Flash.ext2_enabled[channel]) && (mode==source_external2) ) {
+ return SyntaxError;
+ }
+
use_pw_ctrl_mode = globals.ChannelState[channel].pw_ctrl_mode;
use_freq = globals.ChannelState[channel].frequency;
reset_freq = 0;
@@ -1116,6 +1121,8 @@ int Set_Trig_Source(int channel,int mode)
}
gate_mode = 0;
+ xtr5_val = BIT_LOW;
+
if (mode==source_internal) {
/* frequency is automatically lowered if pw or delay have been changed to conflicting */
/* settings while in a non-internal mode */
@@ -1123,6 +1130,9 @@ int Set_Trig_Source(int channel,int mode)
} else if (mode==source_external) {
globals.ChannelState[channel].hold_setting=hold_width;
set_shiftreg_bits(SR_0, POS_2, THREE_BITS, 0x3);
+ } else if (mode==source_external2) {
+ globals.ChannelState[channel].hold_setting=hold_width;
+ xtr5_val = BIT_HIGH;
} else if (mode==source_manual) {
globals.ChannelState[channel].hold_setting=hold_width;
set_shiftreg_bits(SR_0, POS_2, THREE_BITS, 0x1);
@@ -1134,6 +1144,10 @@ int Set_Trig_Source(int channel,int mode)
set_shiftreg_bits(SR_0, POS_2, THREE_BITS, 0x7);
}
+ if (globals.Flash.ext2_enabled[channel]) {
+ set_shiftreg_bits(SR_2, XTR_POS + 5, ONE_BIT, xtr5_val);
+ }
+
Main_update_shift_registers();
bus_setpin(O_GATE, gate_mode); /* change gate only after new source set */