initialize all flash data now

1 files changed, 464 insertions, 12 deletions

diff --git a/flash.c b/flash.c
index 6017d75..e6565f5 100644
--- a/flash.c
+++ b/flash.c
@@ -1,4 +1,6 @@
 #include "globals.h"
+#include "lcd.h"
+#include "version.h"
 #include <stdint.h>
 #include <stdio.h>
 #include <stdbool.h>
@@ -279,21 +281,471 @@ void writeUserBlock(FlashStruct *mem, int addr, int numbytes)
 	}
 }
 
-void initFlash(FlashStruct *mem)
+
+static void initFlashValues(FlashStruct *mem)
 {
-	if (readUserBlock(mem) > 0) {
-		return;
+	int i,j,k,m;
+	float power_of_ten, power_of_two;
+	float base_number;
+
+	base_number=11;
+
+	g_print_debug ("initializing flash memory\n");
+	LCD_write(0,0,"Initialize Flash Memory ...");
+
+	mem->flash_start=1;
+	mem->turn_on_dly=2;
+
+	mem->logic_level_enabled=0;
+	mem->ChanKey_logic_level=0;
+
+	strcpy(mem->model_num,"unprogrammed");
+	strcpy(mem->serial_num,"no S/N");
+	strcpy(mem->password,"default");
+	strcpy(mem->username,"admin");
+
+	mem->fully_programmed=Being_Programmed;
+
+	mem->gpib_address=8;
+	mem->channels=1;
+
+	mem->web_session_timeout=120;		/* two minutes */
+	mem->telnet_session_timeout=600;	/* ten minutes */
+	mem->telnet_logon_timeout=30;		/* thirty seconds */
+
+	mem->overwrite_flash_loc=0;
+
+	mem->rcl_rs232=52;
+
+	mem->on_off_used=1;
+
+	mem->ampl_ranges_for_ch2_only=0;
+
+	mem->ChanKey_frequency=0;
+	mem->ChanKey_delay=0;
+	mem->ChanKey_pw=0;
+	mem->ChanKey_current_limit=0;
+	mem->ChanKey_rise_time=0;
+	mem->ChanKey_amplitude=0;
+	mem->ChanKey_offset=0;
+	mem->ChanKey_Curr_Mon_value=0;
+	mem->ChanKey_Curr_Mon_offset=0;
+	mem->ChanKey_zout=0;
+	mem->ChanKey_hold_setting=0;
+	mem->ChanKey_double_pulse=0;
+	mem->ChanKey_ab_mode=0;
+	mem->ChanKey_route=0;
+	mem->ChanKey_slew=0;
+
+	mem->ChanKey_func_mode=0;
+	mem->ChanKey_polarity=0;
+	mem->ChanKey_output_state=0;
+	mem->ChanKey_gate_type=0;
+	mem->ChanKey_trigger_source=0;
+	mem->ChanKey_amp_mode=0;
+	mem->ChanKey_gate_level=0;
+	mem->ChanKey_load_type=0;
+	mem->ChanKey_test_delay_mode=0;
+	mem->ChanKey_os_mode=0;
+	mem->ChanKey_Burst_Count=0;
+	mem->ChanKey_Burst_Time=0;
+
+	mem->network_enabled=0;
+	mem->self_cal=0;
+	mem->self_cal_interval=5;
+	mem->self_cal_startups=0;
+	mem->self_cal_pause=300;
+	mem->self_cal_typical_time_min=6;
+	mem->self_cal_typical_time_sec=0;
+
+	mem->prf_limiter=1;
+
+	mem->pcb116c_mon=1;	/* more recent ADC, different reading code */
+	mem->warn_even_if_output_off=0;
+
+	strcpy(mem->spec_func_lib,"Not used");
+	strcpy(mem->firmware,FW_VERSION);
+
+	mem->enable_avrq_extra_ampls=0;
+
+	for (i=0; i<points_in_range; i++) {
+		mem->vcc1_pwl_Vc_norm4095[0][0][0][i]=0;
+		mem->vcc1_pwl_amp[0][0][0][i]=0.0;
+		mem->vcc2_pwl_Vc_norm4095[0][0][0][i]=0;
+		mem->vcc2_pwl_amp[0][0][0][i]=0.0;
 	}
+	mem->vcc1_pwl_Vc_norm4095[0][0][0][1]=dac_max;
+	mem->vcc1_pwl_amp[0][0][0][1]=10.0;
+	mem->vcc2_pwl_Vc_norm4095[0][0][0][1]=dac_max;
+	mem->vcc2_pwl_amp[0][0][0][1]=25;
+
+	for (i=0; i<max_channels; i++) {
+		power_of_ten=1.0;
+		power_of_two=24.0e-9;
+		for (j=0; j<timing_ranges; j++) {
+			for (k=0; k<timing_polarities; k++) {
+				for (m=0; m<points_in_range; m++) {
+					mem->slew_pwl_time[i][j][k][m]=0.0;
+					mem->slew_pwl_Vc_norm4095[i][j][k][m]=0;
+
+					int temp_int_pw_dly, temp_int_prf;
+
+					if (m==0) {
+						/* these values have been determined by experiment */
+						temp_int_pw_dly=dac_max;
+						temp_int_prf=dac_max;
+
+						mem->period_pwl_time[i][j][k][m]=(47e-9*power_of_ten)+41e-9;
+						mem->pw_pwl_time[i][j][k][m]=(base_number*0.7e-9*power_of_ten)+5e-9;
+						mem->delay_pwl_time[i][j][k][m]=(base_number*0.7e-9*power_of_ten)+7.6e-9;
+						mem->burst_pwl_time[i][j][k][m]=(2*base_number*1.0e-9*power_of_ten)+25e-9;
+					} else if (m==1) {
+						temp_int_pw_dly=dac_max/3;
+						temp_int_prf=dac_max/2.15;
+
+						mem->period_pwl_time[i][j][k][m]=(1e-7*power_of_ten)+50e-9;
+
+						mem->pw_pwl_time[i][j][k][m]=(3*base_number*0.7e-9*power_of_ten)+10e-9;
+						mem->delay_pwl_time[i][j][k][m]=(3*base_number*0.7e-9*power_of_ten)+17e-9;
+						mem->burst_pwl_time[i][j][k][m]=(3*base_number*1.0e-9*power_of_ten)+10e-9;
+					} else if (m==2) {
+						temp_int_pw_dly=dac_min;
+						temp_int_prf=dac_max/4.6;
+
+						mem->period_pwl_time[i][j][k][m]=(2.3e-7*power_of_ten)+100e-9;
+						mem->pw_pwl_time[i][j][k][m]=(base_number*0.7e-8*power_of_ten)+40e-9;
+						mem->delay_pwl_time[i][j][k][m]=(base_number*0.7e-8*power_of_ten)+40e-9;
+						mem->burst_pwl_time[i][j][k][m]=(base_number*1.0e-8*power_of_ten)+10e-9;
+
+					} else if (m==3) {
+						temp_int_pw_dly=0;
+						temp_int_prf=dac_min;
+
+						mem->period_pwl_time[i][j][k][m]=(4.7e-7*power_of_ten)+160e-9;
+						mem->pw_pwl_time[i][j][k][m]=0.0;
+						mem->delay_pwl_time[i][j][k][m]=0.0;
+						mem->burst_pwl_time[i][j][k][m]=0.0;
+					} else {
+						temp_int_pw_dly=0;
+						temp_int_prf=0;
+						mem->pw_pwl_time[i][j][k][m]=0.0;
+						mem->delay_pwl_time[i][j][k][m]=0.0;
+						mem->period_pwl_time[i][j][k][m]=0.0;
+						mem->burst_pwl_time[i][j][k][m]=0.0;
+					}
+
+					mem->pw_pwl_Vc_norm4095[i][j][k][m]=temp_int_pw_dly;
+					mem->delay_pwl_Vc_norm4095[i][j][k][m]=temp_int_pw_dly;
+					mem->burst_pwl_Vc_norm4095[i][j][k][m]=temp_int_pw_dly;
+					mem->period_pwl_Vc_norm4095[i][j][k][m]=temp_int_prf;
+				}
+			}
+			power_of_ten*=10.0;
+			power_of_two*=2.0;
+		}
+
+
+		power_of_two=20.0e-9;
+		for (j=0; j<ampl_ranges; j++) {
+			for (k=0; k<ampl_polarities; k++) {
+				for (m=0; m<points_in_range; m++) {
+					if (m==0) {
+						mem->rise_time_pwl_Vc_norm4095[i][j][k][m]=dac_max;
+						mem->rise_time_pwl_time[i][j][k][m]=(1e-9+power_of_two);
+					} else if (m==1) {
+						mem->rise_time_pwl_Vc_norm4095[i][j][k][m]=dac_max/2;
+						mem->rise_time_pwl_time[i][j][k][m]=(1e-9+(power_of_two*1.5));
+					} else if (m==2) {
+						mem->rise_time_pwl_Vc_norm4095[i][j][k][m]=dac_max/4.6;
+						mem->rise_time_pwl_time[i][j][k][m]=(1e-9+(power_of_two*3.0));
+					} else {
+						mem->rise_time_pwl_Vc_norm4095[i][j][k][m]=0;
+						mem->rise_time_pwl_time[i][j][k][m]=0.0;
+					}
+				}
+			}
+			power_of_two*=2.0;
+		}
+
+		for (j=0; j<timing_ranges; j++) {
+			for (k=0; k<ampl_polarities; k++) {
+				mem->pw_range_pol_tweaks[i][j][k] = 0.0;
+			}
+		}
 
-// uninitialized device!
-	mem->flash_start = (char) 99;
-	strcpy(mem->aux_error_message, "FIXME");
-	mem->channels = (short) 1;
-	mem->enable_avrq_extra_ampls = (char) 12;
-	mem->ChanKey_frequency = (char) 0;
-// much more needs to be added here - later
+		for (j=0; j<10; j++)
+			for (k=0; k<5; k++)
+				for (m=0; m<2; m++) {
+					mem->ampl_pwl_Vc_norm4095[i][k][m][j]=0;
+					mem->ampl_pwl_amp[i][k][m][j]=0.0;
+				}
+
+		mem->ampl_pwl_Vc_norm4095[i][0][0][1]=dac_max;
+		mem->ampl_pwl_amp[i][0][0][1]=100.0;
+
+		for (j=0; j<max_stored_settings; j++) {
+			mem->rcl_frequency[i][j]=10000.0;
+			mem->rcl_delay[i][j]=0e-9;
+			mem->rcl_pw[i][j]=20e-9;
+			mem->rcl_amplitude[i][j]=0.0;
+			mem->rcl_offset[i][j]=0.0;
+			mem->rcl_misc[i][j]=9;
+			mem->rcl_misc2[i][j]=0;
+			mem->rcl_burst_count[i][j]=1 && !mem->burst_func[i];
+			mem->rcl_burst_time[i][j]=500e-9;
+			mem->rcl_rise_time[i][j]=50e-9;
+			mem->rcl_soft_current_limit[i][j]=0.0;
+			mem->rcl_route_primary[i][j]=1;
+			mem->rcl_route_secondary[i][j]=1;
+			mem->rcl_slew[i][j]=100e6;
+			mem->rcl_load[i][j]=50.0;
+			mem->rcl_vcc1[i][j]=0.0;
+			mem->rcl_vcc2[i][j]=0.0;
+			mem->rcl_vlogic[i][j]=0.0;
+		}
+
+		for (j=0; j<5; j++)
+			for (k=0; k<2; k++) {
+				mem->mon_vi_ratio[i][j][k]=0.050*(j+1);
+			}
+
+		mem->load_type_pwl_time[i][0][0][0] = 200;
+		mem->load_type_pwl_time[i][0][0][1] = 10000;
+		mem->load_type_pwl_Vc_norm4095[i][0][0][0] = dac_max;
+		mem->load_type_pwl_Vc_norm4095[i][0][0][1] = dac_max / 60;
+
+		for (j=2; j<10; j++) {
+			mem->load_type_pwl_time[i][0][0][j] = 0;
+			mem->load_type_pwl_Vc_norm4095[i][0][0][j] = 0;
+		}
 
-// save the default Flash config, for nonvolatile persistence
-	writeUserBlock(mem, 0, sizeof(*mem));
+		mem->slew_pwl_time[i][4][0][0]=80e6;
+		mem->slew_pwl_time[i][4][0][1]=240e6;
+		mem->slew_pwl_time[i][3][0][0]=40e6;
+		mem->slew_pwl_time[i][3][0][1]=120e6;
+		mem->slew_pwl_time[i][2][0][0]=20e6;
+		mem->slew_pwl_time[i][2][0][1]=60e6;
+		mem->slew_pwl_time[i][1][0][0]=10e6;
+		mem->slew_pwl_time[i][1][0][1]=30e6;
+		mem->slew_pwl_time[i][0][0][0]=5e6;
+		mem->slew_pwl_time[i][0][0][1]=15e6;
+
+		mem->slew_pwl_Vc_norm4095[i][0][0][1]=dac_max;
+		mem->slew_pwl_Vc_norm4095[i][1][0][1]=dac_max;
+		mem->slew_pwl_Vc_norm4095[i][2][0][1]=dac_max;
+		mem->slew_pwl_Vc_norm4095[i][3][0][1]=dac_max;
+		mem->slew_pwl_Vc_norm4095[i][4][0][1]=dac_max;
+	}
+
+	/* special consideration for CH2 delay */
+	mem->delay_pwl_time[1][0][0][0]=-0.1e-9;
+
+	for (i=0; i<max_channels; i++) {
+		mem->routing_required[i]=0;
+		mem->routing_max_pins[i]=16;
+		mem->min_ampl[i]=0.0;
+		mem->max_ampl[i]=100.0;
+		mem->min_offset[i]=0.0;
+		mem->max_offset[i]=100.0;
+		mem->min_vout[i]=0.0;
+		mem->max_vout[i]=100.0;
+		mem->min_freq[i]=1.0;
+		mem->max_freq[i]=8e6;
+		mem->min_pw[i]=25e-9;
+		mem->max_pw[i]=1.0;
+		mem->min_rise_time[i]=50e-9;
+		mem->max_rise_time[i]=500e-9;
+		mem->min_soft_current_limit[i]=10.0;
+		mem->max_soft_current_limit[i]=530.0;
+		mem->max_delay[i]=1.0;
+		mem->min_delay[i]=0.0;
+		mem->propagation_delay[i]=10.0e-9;
+		mem->delay_shrink[i]=40.0e-9;
+		mem->ampl_zero_equiv[i]=0.1;
+
+		mem->max_duty_low[i]=110.0;
+		mem->max_duty_high[i]=110.0;
+		mem->duty_ampl[i]=30.0;
+
+		mem->max_duty_mid1[i]=0.0;
+		mem->duty_ampl_mid1[i]=0.0;
+		mem->max_duty_mid2[i]=0.0;
+		mem->duty_ampl_mid2[i]=0.0;
+
+		mem->min_slew[i]=90e6;
+		mem->max_slew[i]=210e6;
+		mem->max_high_rl_duty[i]=80.0;
+		mem->max_peak_power[i]=0.0;
+		mem->max_avg_power[i]=0.0;
+
+		mem->duty_highRL_above_v[i]=110.0;
+		mem->duty_highRL_below_v[i]=110.0;
+
+		mem->mon_pw_threshold[i]=-1.0;
+		mem->monitor_step[i]=1.0;
+
+		mem->sep_posneg_mon_ratio[i]=0;
+		mem->volt_ctrl_pw[i]=0;
+		mem->voltage_enabled[i]=1;
+		mem->voltage_offset_enabled[i]=0;
+		mem->current_enabled[i]=0;
+		mem->current_offset_enabled[i]=0;
+		mem->switchable_zout[i]=1;
+		mem->dc_mode_allowed[i]=1;
+		mem->ab_mode_allowed[i]=1;
+		mem->double_pulse_allowed[i]=1;
+		mem->invert_allowed[i]=1;
+		mem->ea_enabled[i]=1;
+		mem->switchable_load[i]=1;
+		mem->monitor_enabled[i]=0;
+		mem->use_pos_ampl_data_only[i]=0;
+		mem->ampl_min_max_only[i]=0;
+		mem->eo_enabled[i]=1;
+		mem->ext_amplify_enabled[i]=1;
+
+		mem->zout_min[i]=2;
+		mem->zout_max[i]=50;
+
+		for (j=0; j<10; j++) {
+			for (k=0; k<5; k++) {
+				mem->os_pwl_Vc_norm4095[i][k][0][j]=0;
+				mem->os_pwl_amp[i][k][0][j]=0.0;
+			}
+		}
+		mem->os_pwl_Vc_norm4095[i][0][0][1]=dac_max;
+		mem->os_pwl_amp[i][0][0][1]=100.0;
+
+		mem->ampl_DAC[i]=0;
+		mem->os_DAC[i]=1;
+		mem->polarity_xtra_rly[i]=1;
+		mem->fixed_pw[i]=0;
+		mem->fixed_rise_time[i]=1;
+		mem->pcb_203a_rise_time[i]=1;
+		mem->ext_amplify_xtra_rly[i]=4;
+		mem->ea_xtra_rly[i]=5;
+		mem->curr_slew[i]=0;
+
+		mem->distort_X[i]=0.0;
+		mem->distort_Y[i]=0.0;
+		mem->distort_Z[i]=0.0;
+		mem->distort_max_ampl[i]=0.0;
+		mem->distort_max_os[i]=0.0;
+		mem->ampl_os_ranges_related[i]=0;
+		mem->ampl_coupled_to_os[i]=0;
+
+		mem->pulse_width_pol_tweak[i][0]=0.0;
+		mem->pulse_width_pol_tweak[i][1]=0.0;
+		mem->delay_pol_tweak[i][0]=0.0;
+		mem->delay_pol_tweak[i][1]=0.0;
+
+		mem->max_burst_count[i]=1;
+
+		mem->max_burst_duty[i]=50.0;
+		mem->min_burst_per[i]=100e-9;
+		mem->min_burst_gap[i]=100e-9;
+		mem->max_burst_gap[i]=1.0;
+
+		mem->is_func_gen[i]=0;
+		mem->burst_func[i]=0;
+		mem->freq_dac[i]=7;
+		mem->is_monocycle[i]=0;
+		mem->monocycle_dac[i]=6;
+		mem->rise_time_dac[i]=6;
+		mem->slew_dac[i]=6;
+		mem->load_type_dac[i]=3;
+		mem->output_timer[i]=0;
+
+		mem->current_limit_pulse_mode[i]=220.0;
+		mem->current_limit_dc_mode[i]=120.0;
+		mem->current_limit_full_scale[i]=501.0;
+		mem->current_limit_dac[i]=3;
+		mem->hard_current_limit_enabled[i]=0;
+		mem->soft_current_limit_enabled[i]=0;
+
+		mem->invert_by_default[i]=pol_norm;
+
+		mem->max_avg_ampl[i]=0.0;
+
+		mem->pol_relay_high_for_pos[i]=1;
+
+		mem->special_pw_range_minimum[i]=0.0;
+
+		mem->pw_shift_below_this_ampl[i]=0.0;
+		mem->pw_shift_below_ampl_by[i]=0.0;
+
+		mem->ampl_min_abs_value[i]=0.0;
+		mem->ampl_step_size[i]=0.0;
+
+		mem->low_load_type[i]=50.0;
+		mem->high_load_type[i]=10000.0;
+
+		mem->fix_pw_dac_val[i]=dac_max/8;
+
+		mem->max_pw_pol[i][0]=0.0;
+		mem->max_pw_pol[i][1]=0.0;
+
+		mem->vcc1_max[i]=5.1;
+		mem->vcc2_max[i]=24.4;
+		mem->vcc2_min[i]=3.0;
+
+		mem->use_high_ampl_ranges_for_high_pw_ranges[i]=0;
+	}
+
+	mem->relay_delay_in_sec=0.5;
+	mem->extended_relay_delay_in_sec=0.5;
+
+	mem->wait_states_after_sock_init=10000;
+	/*0123456789012345678901234567890123456789*/
+	strcpy(mem->aux_error_message,"incorrect polarity - output disabled.");
+
+
+	/* default PW DACs */
+	mem->pw_dac[0]=2;		/* channel 1: ONLY used for EXTERNAL voltage-controlled PW */
+	/* DAC 4 is normally used for internally controlled PW */
+	mem->pw_dac[1]=2;      /* channel 2: varies - normally 2 (for control of PCB 107C or 174) */
+
+	/* default delay DACs */
+	mem->delay_dac[0]=5;	/* channel 1: on OP1B board - not to be changed, as a rule */
+	mem->delay_dac[1]=6;   /* channel 2: varies (for control of PCB107C) */
+
+	mem->flash_end=99;
+
+	for (i=0; i<8; i++) {
+		mem->initial_dac_settings[i]=0L;
+	}
+
+	mem->copy_max_channels=max_channels;		/* copy to flash, so it can be read by diag:eprom:int? */
+
+
+	/* avrq tests
+	mem->enable_avrq_extra_ampls=1;
+	mem->channels=2;
+	mem->ChanKey_amplitude=1;
+	mem->current_enabled[1]=1;
+	mem->voltage_enabled[1]=0;
+	mem->fully_programmed=2;
+	mem->ampl_DAC[0]=-1;
+	mem->ampl_pwl_amp[1][0][0][1]=0.025;
+	mem->max_ampl[1]=0.022;
+	mem->max_vout[1]=0.022;
+	mem->ampl_zero_equiv[1]=0.001;
+	*/
+
+	LCD_write(1,0,"Flash Init, Done!         ");
+}
+
+
+void initFlash(FlashStruct *mem)
+{
+	int read_size = readUserBlock(mem);
+
+	if ((read_size == 0) || (mem->fully_programmed == Not_Programmed)) {
+
+		// uninitialized device!
+		initFlashValues(mem);
+
+		// save the default Flash config, for nonvolatile persistence
+		writeUserBlock(mem, 0, sizeof(*mem));
+	}
 }