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authorMichael J. Chudobiak <mjc@avtechpulse.com>2012-08-16 11:01:42 -0400
committerMichael J. Chudobiak <mjc@avtechpulse.com>2012-08-16 11:01:42 -0400
commit51aec80f5b733b25e0875e22f82537fd31eb4ee4 (patch)
tree91fa72010b8010cf2e092195bc8637369eb8e7ba /globals.h
parentb4217b23f5b8ba5eedf0bc7354cea76d0575de3a (diff)
added full flash memory map
Diffstat (limited to 'globals.h')
-rw-r--r--globals.h372
1 files changed, 367 insertions, 5 deletions
diff --git a/globals.h b/globals.h
index a647a46..51a641b 100644
--- a/globals.h
+++ b/globals.h
@@ -12,6 +12,39 @@
#define max_output_length 512
#define max_channels 2
+/* DEFINE: misc hardware constraints, based on Avtech hardware */
+#define num_out_SRs 4 /* 4 output shift registers */
+#define max_channels 2 /* maximum number of instrument channels */
+#define max_stored_settings 4 /* how many user settings can be stored in flash, per channel */
+
+#define ampl_ranges 5
+#define os_ranges 5 /* must be equal to ampl_ranges now */
+#define ampl_polarities 2
+#define os_polarities 1
+#define points_in_range 10
+
+#define timing_ranges 8
+#define timing_polarities 1
+
+#define load_type_ranges 1
+#define load_type_polarities 1
+
+#define pwl_ampl_values 0
+#define pwl_os_values 1
+#define pwl_pw_values 3
+#define pwl_delay_values 4
+#define pwl_period_values 5
+#define pwl_burst_values 6
+#define pwl_rise_time_values 7
+#define pwl_load_type_values 8
+#define pwl_slew_values 9
+#define pwl_vcc1_values 10
+#define pwl_vcc2_values 11
+#define pwl_vlogic_values 12
+
+#define dac_max 8191
+#define dac_min 819
+
typedef struct {
float frequency;
// this will be enlarged later
@@ -20,12 +53,340 @@ typedef struct {
#pragma pack(push) /* push current alignment to stack */
#pragma pack(1)
typedef struct {
- char flash_start;
- short channels;
- char aux_error_message[32];
- char enable_avrq_extra_ampls;
- char ChanKey_frequency;
+
+ char flash_start; /* 0 - just a handle */
+ char turn_on_dly; /* 1 */
+ char logic_level_enabled; /* 2 */
+ char ChanKey_logic_level; /* 3 */
+
+ char model_num[32]; /* 4 */
+ char serial_num[16]; /* 36 */
+
+ short fully_programmed; /* 52 */
+ short gpib_address; /* 54 */
+
+ short telnet_session_timeout; /* 56 - timeout in seconds */
+
+ char rcl_rs232; /* 58 */
+ short spare2; /* 59 */
+ char ChanKey_route; /* 61 */
+ char on_off_used; /* 62 */
+ char password[32]; /* 63 */
+ char username[32]; /* 95 */
+
+ char pcb116c_mon; /* 127 */
+
+ char ampl_ranges_for_ch2_only; /* 128 - AVR-EB7-B */
+
+ char warn_even_if_output_off; /* 129 */
+
+ char spare1[32]; /* 130 */
+
+ short copy_max_channels; /* 162 - copy of max_channels macro */
+
+ short telnet_logon_timeout; /* 164 - timeout in seconds */
+
+ short overwrite_flash_loc; /* 166 */
+ float spare5; /* 168 */
+
+ short channels; /* 172 */
+ char ChanKey_frequency; /* 174 */
+ char ChanKey_delay; /* 175 */
+ char ChanKey_pw; /* 176 */
+ char ChanKey_amplitude; /* 177 */
+ char ChanKey_offset; /* 178 */
+ char ChanKey_Curr_Mon_value; /* 179 */
+ char ChanKey_Curr_Mon_offset; /* 180 */
+ char ChanKey_zout; /* 181 */
+ char ChanKey_hold_setting; /* 182 */
+ char ChanKey_double_pulse; /* 183 */
+ char ChanKey_ab_mode; /* 184 */
+ char ChanKey_func_mode; /* 185 */
+ char ChanKey_polarity; /* 186 */
+ char ChanKey_output_state; /* 187 */
+ char ChanKey_gate_type; /* 188 */
+ char ChanKey_trigger_source; /* 189 */
+ char ChanKey_amp_mode; /* 190 */
+ char ChanKey_gate_level; /* 191 */
+ char ChanKey_load_type; /* 192 */
+ char ChanKey_test_delay_mode; /* 193 */
+
+
+ char spec_func_lib[10]; /* 194 - name of the special functions library used. Normally spec1.lib */
+ char firmware[16]; /* 204 - name of the special functions library used. Normally spec1.lib */
+
+ char sync_only; /* 220 */
+
+ char ChanKey_os_mode; /* 221 */
+
+ char switchable_backlight; /* 222 */
+
+ char ChanKey_Burst_Count; /* 223 */
+
+ char ChanKey_Burst_Time; /* 224 */
+
+ char network_enabled; /* 225 */
+
+ short web_session_timeout; /* 226 - timeout in seconds */
+
+ char ChanKey_rise_time; /* 228 */
+ char ChanKey_current_limit; /* 229 */
+ char enable_avrq_extra_ampls; /* 230 - use CH2 for IBIAS, */
+ /* CH3 for VCC1 */
+ /* CH4 for VCC2 */
+ /* CH5 for Logic Level */
+ char ChanKey_slew; /* 231 */
+ short self_cal_interval; /* 232 */
+ short self_cal_startups; /* 234 */
+ short self_cal_pause; /* 236 */
+ short self_cal_typical_time_min; /* 238 */
+ short self_cal_typical_time_sec; /* 240 */
+ char self_cal; /* 242 */
+
+ char prf_limiter; /* 243 */
+
+ char spare_padding[12]; /* 244 - padding between common and per-channel sections of the */
+ /* flash eeprom. Adjust size if variables added to common section, */
+ /* so that per-channel section starts at 256 */
+
+ /* [chan][range 0-4][polarity][interpolation point 0-9] */
+ short ampl_pwl_Vc_norm4095[max_channels][ampl_ranges][ampl_polarities][points_in_range];
+ float ampl_pwl_amp[max_channels][ampl_ranges][ampl_polarities][points_in_range];
+
+ float rcl_frequency[max_channels][max_stored_settings];
+ float rcl_delay[max_channels][max_stored_settings];
+ float rcl_pw[max_channels][max_stored_settings];
+ float rcl_amplitude[max_channels][max_stored_settings];
+ float rcl_offset[max_channels][max_stored_settings];
+ short rcl_misc[max_channels][max_stored_settings]; /* another misc is stored below */
+ short rcl_unused[max_stored_settings];
+
+ float mon_vi_ratio[max_channels][5][2]; /* addr 1640 */
+
+ float min_ampl[max_channels]; /* addr 1720 */
+ float max_ampl[max_channels]; /* addr 1728 */
+ float min_offset[max_channels]; /* addr 1736 */
+ float max_offset[max_channels]; /* addr 1744 */
+ float min_vout[max_channels]; /* addr 1752 */
+ float max_vout[max_channels]; /* addr 1760 */
+ float min_freq[max_channels]; /* addr 1768 */
+ float max_freq[max_channels]; /* addr 1776 */
+ float min_pw[max_channels]; /* addr 1784 */
+ float max_pw[max_channels]; /* addr 1792 */
+ float max_delay[max_channels]; /* addr 1800 - see also min_delay (new) */
+ float propagation_delay[max_channels]; /* addr 1808 */
+ float delay_shrink[max_channels]; /* addr 1816 */
+ float ampl_zero_equiv[max_channels]; /* addr 1824 */
+ float max_duty_low[max_channels]; /* addr 1832 */
+ float max_duty_high[max_channels]; /* addr 1840 */
+ float duty_ampl[max_channels]; /* addr 1848 */
+ float duty_highRL_above_v[max_channels]; /* addr 1856 */
+ float mon_pw_threshold[max_channels]; /* addr 1864 */
+ float monitor_step[max_channels]; /* addr 1872 */
+
+ char sep_posneg_mon_ratio[max_channels]; /* addr 1880 */
+ char volt_ctrl_pw[max_channels]; /* addr 1882 */
+ char voltage_enabled[max_channels]; /* addr 1884 */
+ char voltage_offset_enabled[max_channels]; /* addr 1886 */
+ char current_enabled[max_channels]; /* addr 1888 */
+ char current_offset_enabled[max_channels]; /* addr 1890 */
+ char switchable_zout[max_channels]; /* addr 1892 */
+ char dc_mode_allowed[max_channels];
+ char ab_mode_allowed[max_channels]; /* addr 1896 */
+ char double_pulse_allowed[max_channels];
+ char invert_allowed[max_channels];
+ char ea_enabled[max_channels]; /* addr 1902 */
+ char switchable_load[max_channels];
+ char monitor_enabled[max_channels]; /* addr 1906 */
+ char use_pos_ampl_data_only[max_channels];
+ char ampl_min_max_only[max_channels];
+
+ short zout_min[max_channels]; /* addr 1912 */
+
+ short os_pwl_Vc_norm4095[max_channels][os_ranges][os_polarities][points_in_range]; /* addr 1916 */
+ float os_pwl_amp[max_channels][os_ranges][os_polarities][points_in_range]; /* addr 2116 */
+
+ short ampl_DAC[max_channels]; /* addr 2516 */
+ short os_DAC[max_channels]; /* addr 2520 */
+ short polarity_xtra_rly[max_channels]; /* addr 2524 */
+ char fixed_pw[max_channels]; /* addr 2528 */
+
+ char eo_enabled[max_channels]; /* addr 2530 */
+ char ext_amplify_enabled[max_channels]; /* addr 2532 */
+
+ char spare_enab[max_channels]; /* addr 2534 */
+ float rise_time_pwl_time[max_channels][ampl_ranges][ampl_polarities][points_in_range]; /* addr 2536 */
+
+ short ext_amplify_xtra_rly[max_channels]; /* addr 3336 */
+ short ea_xtra_rly[max_channels]; /* addr 3340 */
+
+ short rcl_misc2[max_channels][max_stored_settings]; /* addr 3344 */
+
+ short pw_pwl_Vc_norm4095[max_channels][timing_ranges][timing_polarities][points_in_range]; /* addr 3360 */
+ float pw_pwl_time[max_channels][timing_ranges][timing_polarities][points_in_range]; /* addr 3680 */
+
+ short delay_pwl_Vc_norm4095[max_channels][timing_ranges][timing_polarities][points_in_range]; /* addr 4320 */
+ float delay_pwl_time[max_channels][timing_ranges][timing_polarities][points_in_range];
+
+ short period_pwl_Vc_norm4095[max_channels][timing_ranges][timing_polarities][points_in_range]; /* addr 5280 */
+ float period_pwl_time[max_channels][timing_ranges][timing_polarities][points_in_range];
+
+
+ float distort_X[max_channels]; /* distortion = Z + X / (Ampl + Y). */
+ float distort_Y[max_channels];
+ float distort_Z[max_channels];
+ float distort_max_ampl[max_channels]; /* Clamp distortion above this amplitude. */
+ float distort_max_os[max_channels]; /* PW is not distorted for offsets above this. */
+
+ char ampl_os_ranges_related[max_channels]; /* for 156A units where the offset affects the choice of amplitude range */
+ char ampl_coupled_to_os[max_channels]; /* for 1011-OT units where increasing offset would decrease ampl if not corrected */
+
+ float relay_delay_in_sec; /* relay bounce time */
+ float extended_relay_delay_in_sec; /* allow capacitor banks to settle after range change */
+
+ short max_burst_count[max_channels]; /* 6292 - max pulses per burst, normally 500 */
+ float max_burst_duty[max_channels]; /* 6296 - maximum duty cycle within burst */
+ float min_burst_gap[max_channels]; /* 6304 - minimum burst gap */
+ float max_burst_gap[max_channels]; /* 6312 - maximum burst gap */
+ float min_burst_per[max_channels]; /* 6320 */
+
+ char is_func_gen[max_channels]; /* is this a function generator? */
+ char freq_dac[max_channels]; /* DAC used by function generator frequency control circuit */
+
+ char is_monocycle[max_channels]; /* generate control voltage for monocycle spacing, using CH2 PW calibration */
+ char monocycle_dac[max_channels];
+
+ short burst_pwl_Vc_norm4095[max_channels][timing_ranges][timing_polarities][points_in_range];
+ float burst_pwl_time[max_channels][timing_ranges][timing_polarities][points_in_range];
+
+ float pulse_width_pol_tweak[max_channels][ampl_polarities]; /* 7296 - allow for PW shift with polarity */
+
+ short rcl_burst_count[max_channels][max_stored_settings]; /* 7312 - rcl/sav data for burst mode */
+ float rcl_burst_time[max_channels][max_stored_settings]; /* 7328 - rcl/sav data for burst mode */
+
+ char burst_func[max_channels]; /* 7360 - is this a function generator with burst mode? */
+
+ short initial_dac_settings[8]; /* 7362 */
+
+ char fixed_rise_time[max_channels]; /* 7378 */
+ char rise_time_dac[max_channels]; /* 7380 */
+
+ float min_rise_time[max_channels]; /* 7382 */
+ float max_rise_time[max_channels]; /* 7390 */
+
+ short output_timer[max_channels]; /* 7398 - turn off output after this time, in seconds */
+
+ short pw_dac[max_channels]; /* 7402 - for voltage-controlled PW only */
+
+ float rcl_rise_time[max_channels][max_stored_settings]; /* 7406 - rcl/sav data for rise time */
+ short rise_time_pwl_Vc_norm4095[max_channels][ampl_ranges][ampl_polarities][points_in_range]; /* 7438 */
+
+#define AVRQ_ZERO_EQUIV 3.0
+ short vcc1_pwl_Vc_norm4095[1][1][1][points_in_range];
+ float vcc1_pwl_amp[1][1][1][points_in_range];
+ short vcc2_pwl_Vc_norm4095[1][1][1][points_in_range];
+ float vcc2_pwl_amp[1][1][1][points_in_range];
+ float rcl_vcc1[max_channels][max_stored_settings];
+ float rcl_vcc2[max_channels][max_stored_settings];
+ float rcl_vlogic[max_channels][max_stored_settings];
+ float vcc1_max[max_channels];
+ float vcc2_min[max_channels];
+ float vcc2_max[max_channels];
+
+ float max_duty_mid1[max_channels]; /* addr 8078 - for AVO-8D3-B, etc */
+ float duty_ampl_mid1[max_channels]; /* addr 8086 */
+ float max_duty_mid2[max_channels]; /* addr 8094 */
+ float duty_ampl_mid2[max_channels]; /* addr 8102 */
+
+ char spare_char[288]; /* 8110 */
+
+ float current_limit_pulse_mode[max_channels]; /* 8398 */
+ float current_limit_dc_mode[max_channels]; /* 8406 */
+ float current_limit_full_scale[max_channels]; /* 8414 */
+ char current_limit_dac[max_channels]; /* 8422 */
+ char hard_current_limit_enabled[max_channels]; /* 8424 */
+
+ short wait_states_after_sock_init; /* 8426 */
+
+ char aux_error_message[40]; /* 8428 */
+
+ short delay_dac[max_channels]; /* 8468 */
+
+ float min_delay[max_channels]; /* 8472 */
+
+ short invert_by_default[max_channels]; /* 8480 - set high for logically complemented outputs */
+
+ char soft_current_limit_enabled[max_channels]; /* 8484 */
+
+ float min_soft_current_limit[max_channels]; /* 8486 */
+ float max_soft_current_limit[max_channels]; /* 8494 */
+ float rcl_soft_current_limit[max_channels][max_stored_settings]; /* 8502 */
+
+ float max_avg_ampl[max_channels]; /* 8534 */
+
+ char pol_relay_high_for_pos[max_channels]; /* 8542 */
+
+ float special_pw_range_minimum[max_channels]; /* 8544 - originally for AVPP-2A-B-P-ILA, 1us-1ms range */
+
+ short zout_max[max_channels]; /* addr 8552 */
+
+ float pw_range_pol_tweaks[max_channels][timing_ranges][ampl_polarities]; /* addr 8556 */
+ float pw_shift_below_this_ampl[max_channels]; /* addr 8684 */
+ float pw_shift_below_ampl_by[max_channels]; /* addr 8692 */
+
+ /* AVRQ special configs */
+ char spare_config1[max_channels]; /* addr 8700 */
+ char load_type_dac[max_channels]; /* addr 8702 */
+ float sparex1[max_channels]; /* addr 8704 */
+ float sparex2[max_channels]; /* addr 8712 */
+ float rcl_sparex3[max_channels][max_stored_settings]; /* addr 8720 */
+ short load_type_pwl_Vc_norm4095[max_channels][load_type_ranges][load_type_polarities][points_in_range]; /* 8752 */
+ float load_type_pwl_time[max_channels][load_type_ranges][load_type_polarities][points_in_range]; /* 8792 */
+
+ char pcb_203a_rise_time[max_channels]; /* addr 8872 */
+
+ float ampl_min_abs_value[max_channels]; /* addr 8874 */
+ float ampl_step_size[max_channels]; /* addr 8882 */
+
+ /* -DIPFP special configs */
+ short routing_required[max_channels]; /* addr 8890 - 0 (none), 1 (output), 2 (anode and cathode) */
+ short routing_max_pins[max_channels]; /* addr 8894 */
+ short rcl_route_primary[max_channels][max_stored_settings]; /* addr 8898 */
+ short rcl_route_secondary[max_channels][max_stored_settings]; /* addr 8914 */
+
+ /* AVRZ-5 special tweak */
+ float delay_pol_tweak[max_channels][ampl_polarities]; /* addr 8930 - allow for delay shift with polarity */
+
+ float duty_highRL_below_v[max_channels]; /* addr 8946 */
+ short old_low_load_type[max_channels]; /* addr 8954 - normally 50 */
+ short old_high_load_type[max_channels]; /* addr 8958 - normally 10000 */
+
+ char slew_dac[max_channels]; /* addr 8962 */
+ char curr_slew[max_channels]; /* addr 8964 */
+ float min_slew[max_channels]; /* addr 8966 */
+ float max_slew[max_channels]; /* addr 8974 */
+ float rcl_slew[max_channels][max_stored_settings]; /* addr 8982 */
+
+ short slew_pwl_Vc_norm4095[max_channels][timing_ranges][timing_polarities][points_in_range]; /* addr 9014 */
+ float slew_pwl_time[max_channels][timing_ranges][timing_polarities][points_in_range]; /* addr 9334 */
+
+ short fix_pw_dac_val[max_channels]; /* addr 9974 */
+
+ float rcl_load[max_channels][max_stored_settings]; /* addr 9978 */
+
+ float max_high_rl_duty[max_channels]; /* addr 10010 */
+ float max_peak_power[max_channels]; /* addr 10018 */
+ float low_load_type[max_channels]; /* addr 10026 - normally 50 */
+ float high_load_type[max_channels]; /* addr 10034 - normally 10000 */
+ float max_avg_power[max_channels]; /* addr 10042 */
+ float max_pw_pol[max_channels][ampl_polarities]; /* addr 10050 - over-rides normal max_pw */
+
+ char use_high_ampl_ranges_for_high_pw_ranges[max_channels]; /* addr 10066 - for AVMP-4 */
+
+ char spare_end;
+
char flash_end;
+
} FlashStruct;
#pragma pack(pop)
@@ -39,3 +400,4 @@ typedef struct {
extern GlobalStruct globals;
#endif
+