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- It looks like the i2c buses are now start at 0.
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Workaround for aligned accesses
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declared
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byte after checking the whole thing is correct
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read the last byte.
This stops it from running over a byte that is now where the flash end used to be.
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- Proposed single line solution to handle flash struct changes
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for units with non-zero min delay, like the AVR-D3-B-MS1
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This reverts commit 6a15a14fc7069fd72522dd82b8c64a4bdee21f54.
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This reverts commit 623db64a55a04e531bb847fa02ef20ce1a05a10c.
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This reverts commit 401fd942b84f8a1a8cb48e6c38ebe3dae1ab42ef.
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This reverts commit e1678aa56d0d1deaf003e0a04f09d26000d9eca5.
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This reverts commit c6550aba8a93cf543311d1b63224a8b97b339094.
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Makes PRF calibration work properly. Otherwise duty cycle is too low.
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