From a1df417e74aa6dae7352dc8cbb0ad471af5b7c69 Mon Sep 17 00:00:00 2001 From: "Michael J. Chudobiak" Date: Mon, 25 Apr 2016 10:00:44 -0400 Subject: initial Olimex linux tree from Daniel, originally Feb 3, 2016 --- linux/arch/arm/boot/dts/socfpga_arria10_socdk.dts | 48 +++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100755 linux/arch/arm/boot/dts/socfpga_arria10_socdk.dts (limited to 'linux/arch/arm/boot/dts/socfpga_arria10_socdk.dts') diff --git a/linux/arch/arm/boot/dts/socfpga_arria10_socdk.dts b/linux/arch/arm/boot/dts/socfpga_arria10_socdk.dts new file mode 100755 index 00000000..3015ce8d --- /dev/null +++ b/linux/arch/arm/boot/dts/socfpga_arria10_socdk.dts @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2014 Altera Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/dts-v1/; +#include "socfpga_arria10.dtsi" + +/ { + model = "Altera SOCFPGA Arria 10"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + chosen { + bootargs = "console=ttyS0,115200 rootwait"; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x40000000>; /* 1GB */ + }; + + soc { + clkmgr@ffd04000 { + clocks { + osc1 { + clock-frequency = <25000000>; + }; + }; + }; + + serial0@ffc02000 { + status = "okay"; + }; + }; +}; -- cgit