From a1df417e74aa6dae7352dc8cbb0ad471af5b7c69 Mon Sep 17 00:00:00 2001 From: "Michael J. Chudobiak" Date: Mon, 25 Apr 2016 10:00:44 -0400 Subject: initial Olimex linux tree from Daniel, originally Feb 3, 2016 --- linux/arch/x86/kernel/cpu/mcheck/winchip.c | 44 ++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 linux/arch/x86/kernel/cpu/mcheck/winchip.c (limited to 'linux/arch/x86/kernel/cpu/mcheck/winchip.c') diff --git a/linux/arch/x86/kernel/cpu/mcheck/winchip.c b/linux/arch/x86/kernel/cpu/mcheck/winchip.c new file mode 100644 index 00000000..44f13829 --- /dev/null +++ b/linux/arch/x86/kernel/cpu/mcheck/winchip.c @@ -0,0 +1,44 @@ +/* + * IDT Winchip specific Machine Check Exception Reporting + * (C) Copyright 2002 Alan Cox + */ +#include +#include +#include + +#include +#include +#include +#include +#include + +/* Machine check handler for WinChip C6: */ +static void winchip_machine_check(struct pt_regs *regs, long error_code) +{ + enum ctx_state prev_state = ist_enter(regs); + + printk(KERN_EMERG "CPU0: Machine Check Exception.\n"); + add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); + + ist_exit(regs, prev_state); +} + +/* Set up machine check reporting on the Winchip C6 series */ +void winchip_mcheck_init(struct cpuinfo_x86 *c) +{ + u32 lo, hi; + + machine_check_vector = winchip_machine_check; + /* Make sure the vector pointer is visible before we enable MCEs: */ + wmb(); + + rdmsr(MSR_IDT_FCR1, lo, hi); + lo |= (1<<2); /* Enable EIERRINT (int 18 MCE) */ + lo &= ~(1<<4); /* Enable MCE */ + wrmsr(MSR_IDT_FCR1, lo, hi); + + cr4_set_bits(X86_CR4_MCE); + + printk(KERN_INFO + "Winchip machine check reporting enabled on CPU#0.\n"); +} -- cgit