diff options
1939 files changed, 41599 insertions, 10971 deletions
diff --git a/.travis.yml b/.travis.yml index 00b2a73a5e..0b7a0622bf 100644 --- a/.travis.yml +++ b/.travis.yml @@ -138,6 +138,12 @@ matrix: - env: - BUILDMAN="aries" - env: + - JOB="Boundary Devices" + BUILDMAN="boundary" + - env: + - JOB="engicam" + BUILDMAN="engicam" + - env: - JOB="Freescale ARM32" BUILDMAN="freescale -x powerpc,m68k,aarch64" - env: @@ -145,13 +151,17 @@ matrix: BUILDMAN="freescale&aarch64" - env: - JOB="i.MX6 (non-Freescale)" - BUILDMAN="mx6 -x freescale" + BUILDMAN="mx6 -x freescale,toradex,boundary,engicam" - env: - JOB="i.MX (non-Freescale, non-i.MX6)" - BUILDMAN="mx -x freescale,mx6" + BUILDMAN="mx -x freescale,mx6,toradex" + - env: + - BUILDMAN="k2" - env: - BUILDMAN="samsung" - env: + - BUILDMAN="socfpga" + - env: - BUILDMAN="sun4i" - env: - BUILDMAN="sun5i" @@ -167,16 +177,19 @@ matrix: - BUILDMAN="sun50i" - env: - JOB="Catch-all ARM" - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip" + BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex,socfpga,k2,xilinx" - env: - BUILDMAN="sandbox x86" TOOLCHAIN="x86_64" - env: + - BUILDMAN="toradex" + - env: - BUILDMAN="kirkwood" - env: - BUILDMAN="mvebu" - env: - - BUILDMAN="pxa" + - JOB="PXA" + - BUILDMAN="pxa -x toradex" - env: - BUILDMAN="m68k" TOOLCHAIN="m68k" @@ -207,7 +220,8 @@ matrix: - env: - BUILDMAN="siemens" - env: - - BUILDMAN="tegra" + - JOB="tegra" + BUILDMAN="tegra -x toradex" - env: - JOB="am33xx" BUILDMAN="am33xx -x siemens" @@ -220,13 +234,17 @@ matrix: - env: - BUILDMAN="uniphier" - env: - - BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip" + - JOB="aarch64" + BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip" - env: - BUILDMAN="rockchip" - env: - BUILDMAN="sh4" TOOLCHAIN="sh4" - env: + - JOB="Xilinx (ARM)" + BUILDMAN="xilinx -x microblaze" + - env: - BUILDMAN="xtensa" TOOLCHAIN="xtensa" @@ -286,6 +304,11 @@ matrix: QEMU_TARGET="arm-softmmu" BUILDMAN="^integratorcp_cm926ejs$" - env: + - TEST_PY_BD="qemu_arm" + TEST_PY_TEST_SPEC="not sleep" + QEMU_TARGET="arm-softmmu" + BUILDMAN="^qemu_arm$" + - env: - TEST_PY_BD="qemu_mips" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="mips-softmmu" @@ -273,7 +273,7 @@ config SPL_LOAD_FIT config SPL_FIT_IMAGE_POST_PROCESS bool "Enable post-processing of FIT artifacts after loading by the SPL" - depends on SPL_LOAD_FIT && TI_SECURE_DEVICE + depends on SPL_LOAD_FIT help Allows doing any sort of manipulation to blobs after they got extracted from the U-Boot FIT image like stripping off headers or modifying the @@ -398,5 +398,3 @@ source "fs/Kconfig" source "lib/Kconfig" source "test/Kconfig" - -source "scripts/Kconfig" diff --git a/MAINTAINERS b/MAINTAINERS index 04acf2b89d..b167b028ec 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -259,8 +259,9 @@ EFI PAYLOAD M: Alexander Graf <agraf@suse.de> S: Maintained T: git git://github.com/agraf/u-boot.git -F: include/efi_loader.h -F: lib/efi_loader/ +F: include/efi* +F: lib/efi* +F: test/py/tests/test_efi* F: cmd/bootefi.c FLATTENED DEVICE TREE @@ -419,6 +420,7 @@ F: arch/arm/mach-omap2/omap5/sec-fxns.c F: arch/arm/mach-omap2/sec-common.c F: arch/arm/mach-omap2/config_secure.mk F: configs/am335x_hs_evm_defconfig +F: configs/am335x_hs_evm_uart_defconfig F: configs/am43xx_hs_evm_defconfig F: configs/am57xx_hs_evm_defconfig F: configs/dra7xx_hs_evm_defconfig @@ -3,9 +3,9 @@ # VERSION = 2017 -PATCHLEVEL = 09 +PATCHLEVEL = 11 SUBLEVEL = -EXTRAVERSION = +EXTRAVERSION = -rc2 NAME = # *DOCUMENTATION* @@ -878,7 +878,7 @@ dts/dt.dtb: u-boot quiet_cmd_copy = COPY $@ cmd_copy = cp $< $@ -ifeq ($(CONFIG_FIT_EMBED),y) +ifeq ($(CONFIG_MULTI_DTB_FIT),y) fit-dtb.blob: dts/dt.dtb FORCE $(call if_changed,mkimage) @@ -2312,13 +2312,6 @@ The following options need to be configured: this is instead controlled by the value of /config/load-environment. -- DataFlash Support: - CONFIG_HAS_DATAFLASH - - Defining this option enables DataFlash features and - allows to read/write in Dataflash via the standard - commands cp, md... - - Serial Flash support Usage requires an initial 'sf probe' to define the serial flash parameters, followed by read/write/erase/update diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h index 42e7f22b28..a12303bc73 100644 --- a/arch/arc/include/asm/io.h +++ b/arch/arc/include/asm/io.h @@ -50,30 +50,6 @@ #define __iowmb() do { } while (0) #endif -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)((unsigned long)paddr); -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - static inline void sync(void) { /* Not yet implemented */ @@ -302,9 +278,6 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen) #define setbits_8(addr, set) setbits(8, addr, set) #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) -static inline phys_addr_t virt_to_phys(void *vaddr) -{ - return (phys_addr_t)((unsigned long)vaddr); -} +#include <asm-generic/io.h> #endif /* __ASM_ARC_IO_H */ diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bb64b9c160..64e0ee43f1 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -588,6 +588,7 @@ config ARCH_OMAP2PLUS bool "TI OMAP2+" select CPU_V7 select SPL_BOARD_INIT if SPL + select SPL_STACK_R if SPL select SUPPORT_SPL imply FIT @@ -630,6 +631,14 @@ config ARCH_MX5 select CPU_V7 select BOARD_EARLY_INIT_F +config ARCH_QEMU + bool "QEMU Virtual Platform" + select CPU_V7 + select ARCH_SUPPORT_PSCI + select DM + select DM_SERIAL + select OF_CONTROL + config ARCH_RMOBILE bool "Renesas ARM SoCs" select DM @@ -693,8 +702,7 @@ config ARCH_SUNXI select USB_STORAGE if DISTRO_DEFAULTS select USB_KEYBOARD if DISTRO_DEFAULTS select USE_TINY_PRINTF - imply CMD_FASTBOOT - imply FASTBOOT + imply CMD_GPT imply FAT_WRITE imply PRE_CONSOLE_BUFFER imply SPL_GPIO_SUPPORT @@ -704,7 +712,7 @@ config ARCH_SUNXI imply SPL_MMC_SUPPORT if MMC imply SPL_POWER_SUPPORT imply SPL_SERIAL_SUPPORT - imply USB_FUNCTION_FASTBOOT + imply USB_GADGET config TARGET_TS4600 bool "Support TS4600" @@ -1114,6 +1122,9 @@ config ARCH_ROCKCHIP imply FAT_WRITE imply USB_FUNCTION_FASTBOOT imply SPL_SYSRESET + imply TPL_SYSRESET + imply ADC + imply SARADC_ROCKCHIP config TARGET_THUNDERX_88XX bool "Support ThunderX 88xx" @@ -1168,6 +1179,8 @@ source "arch/arm/mach-rmobile/Kconfig" source "arch/arm/mach-meson/Kconfig" +source "arch/arm/mach-qemu/Kconfig" + source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 3518d8601d..85b7c70937 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -72,6 +72,7 @@ config ARCH_LS1088A select SYS_FSL_ERRATUM_A010165 select SYS_FSL_ERRATUM_A008511 select SYS_FSL_ERRATUM_A008850 + select SYS_FSL_ERRATUM_A009007 select SYS_FSL_HAS_CCI400 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_RGMII diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index d21a49454e..ab5d76ea3b 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -647,13 +647,14 @@ phys_size_t get_effective_memsize(void) /* * For ARMv8 SoCs, DDR memory is split into two or three regions. The - * first region is 2GB space at 0x8000_0000. If the memory extends to - * the second region (or the third region if applicable), the secure - * memory and Management Complex (MC) memory should be put into the - * highest region, i.e. the end of DDR memory. CONFIG_MAX_MEM_MAPPED - * is set to the size of first region so U-Boot doesn't relocate itself - * into higher address. Should DDR be configured to skip the first - * region, this function needs to be adjusted. + * first region is 2GB space at 0x8000_0000. Secure memory needs to + * allocated from first region. If the memory extends to the second + * region (or the third region if applicable), Management Complex (MC) + * memory should be put into the highest region, i.e. the end of DDR + * memory. CONFIG_MAX_MEM_MAPPED is set to the size of first region so + * U-Boot doesn't relocate itself into higher address. Should DDR be + * configured to skip the first region, this function needs to be + * adjusted. */ if (gd->ram_size > CONFIG_MAX_MEM_MAPPED) { ea_size = CONFIG_MAX_MEM_MAPPED; @@ -664,16 +665,10 @@ phys_size_t get_effective_memsize(void) #ifdef CONFIG_SYS_MEM_RESERVE_SECURE /* Check if we have enough space for secure memory */ - if (rem > CONFIG_SYS_MEM_RESERVE_SECURE) { - rem -= CONFIG_SYS_MEM_RESERVE_SECURE; - } else { - if (ea_size > CONFIG_SYS_MEM_RESERVE_SECURE) { - ea_size -= CONFIG_SYS_MEM_RESERVE_SECURE; - rem = 0; /* Presume MC requires more memory */ - } else { - printf("Error: No enough space for secure memory.\n"); - } - } + if (ea_size > CONFIG_SYS_MEM_RESERVE_SECURE) + ea_size -= CONFIG_SYS_MEM_RESERVE_SECURE; + else + printf("Error: No enough space for secure memory.\n"); #endif /* Check if we have enough memory for MC */ if (rem < board_reserve_ram_top(rem)) { @@ -698,8 +693,19 @@ int dram_init_banksize(void) * memory. The DDR extends from low region to high region(s) presuming * no hole is created with DDR configuration. gd->arch.secure_ram tracks * the location of secure memory. gd->arch.resv_ram tracks the location - * of reserved memory for Management Complex (MC). + * of reserved memory for Management Complex (MC). Because gd->ram_size + * is reduced by this function if secure memory is reserved, checking + * gd->arch.secure_ram should be done to avoid running it repeatedly. */ + +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + if (gd->arch.secure_ram & MEM_RESERVE_SECURE_MAINTAINED) { + debug("No need to run again, skip %s\n", __func__); + + return 0; + } +#endif + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; if (gd->ram_size > CONFIG_SYS_DDR_BLOCK1_SIZE) { gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE; @@ -718,32 +724,14 @@ int dram_init_banksize(void) gd->bd->bi_dram[0].size = gd->ram_size; } #ifdef CONFIG_SYS_MEM_RESERVE_SECURE -#ifdef CONFIG_SYS_DDR_BLOCK3_BASE - if (gd->bd->bi_dram[2].size >= CONFIG_SYS_MEM_RESERVE_SECURE) { - gd->bd->bi_dram[2].size -= CONFIG_SYS_MEM_RESERVE_SECURE; - gd->arch.secure_ram = gd->bd->bi_dram[2].start + - gd->bd->bi_dram[2].size; + if (gd->bd->bi_dram[0].size > + CONFIG_SYS_MEM_RESERVE_SECURE) { + gd->bd->bi_dram[0].size -= + CONFIG_SYS_MEM_RESERVE_SECURE; + gd->arch.secure_ram = gd->bd->bi_dram[0].start + + gd->bd->bi_dram[0].size; gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE; - } else -#endif - { - if (gd->bd->bi_dram[1].size >= CONFIG_SYS_MEM_RESERVE_SECURE) { - gd->bd->bi_dram[1].size -= - CONFIG_SYS_MEM_RESERVE_SECURE; - gd->arch.secure_ram = gd->bd->bi_dram[1].start + - gd->bd->bi_dram[1].size; - gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; - gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE; - } else if (gd->bd->bi_dram[0].size > - CONFIG_SYS_MEM_RESERVE_SECURE) { - gd->bd->bi_dram[0].size -= - CONFIG_SYS_MEM_RESERVE_SECURE; - gd->arch.secure_ram = gd->bd->bi_dram[0].start + - gd->bd->bi_dram[0].size; - gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED; - gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE; - } } #endif /* CONFIG_SYS_MEM_RESERVE_SECURE */ @@ -797,6 +785,11 @@ int dram_init_banksize(void) } #endif +#ifdef CONFIG_SYS_MEM_RESERVE_SECURE + debug("%s is called. gd->ram_size is reduced to %lu\n", + __func__, (ulong)gd->ram_size); +#endif + return 0; } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon new file mode 100644 index 0000000000..2505f408ab --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon @@ -0,0 +1,140 @@ +Falcon boot option +------------------ +Falcon boot is a short cut boot method for SD/eMMC targets. It skips loading the +RAM version U-Boot. Instead, it loads FIT image and boot directly to Linux. +CONFIG_SPL_OS_BOOT enables falcon boot. CONFIG_SPL_LOAD_FIT enables the FIT +image support (also need CONFIG_SPL_OF_LIBFDT, CONFIG_SPL_FIT and optionally +CONFIG_SPL_GZIP). + +To enable falcon boot, a hook function spl_start_uboot() returns 0 to indicate +booting U-Boot is not the first choice. The kernel FIT image needs to be put +at CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR. SPL mmc driver reads the header to +determine if this is a FIT image. If true, FIT image components are parsed and +copied or decompressed (if applicable) to their destinations. If FIT image is +not found, normal U-Boot flow will follow. + +An important part of falcon boot is to prepare the device tree. A normal U-Boot +does FDT fixups when booting Linux. For falcon boot, Linux boots directly from +SPL, skipping the normal U-Boot. The device tree has to be prepared in advance. +A command "spl export" should be called under the normal RAM version U-Boot. +It is equivalent to go through "bootm" step-by-step until device tree fixup is +done. The device tree in memory is the one needed for falcon boot. Falcon boot +flow suggests to save this image to SD/eMMC at the location pointed by macro +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR, with maximum size specified by macro +CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS. However, when FIT image is used for +Linux, the device tree stored in FIT image overwrites the memory loaded by spl +driver from these sectors. We could change this loading order to favor the +stored sectors. But when secure boot is enabled, these sectors are used for +signature header and needs to be loaded before the FIT image. So it is important +to understand the device tree in FIT image should be the one actually used, or +leave it absent to favor the stored sectors. It is easier to deploy the FIT +image with embedded static device tree to multiple boards. + +Macro CONFIG_SYS_SPL_ARGS_ADDR serves two purposes. One is the pointer to load +the stored sectors to. Normally this is the static device tree. The second +purpose is the memory location of signature header for secure boot. After the +FIT image is loaded into memory, it is validated against the signature header +before individual components are extracted (and optionally decompressed) into +their final memory locations, respectively. After the validation, the header +is no longer used. The static device tree is copied into this location. So +this macro is passed as the location of device tree when booting Linux. + +Steps to prepare static device tree +----------------------------------- +To prepare the static device tree for Layerscape boards, it is important to +understand the fixups in U-Boot. Memory size and location, as well as reserved +memory blocks are added/updated. Ethernet MAC addressed are updated. FMan +microcode (if used) is embedded in the device tree. Kernel command line and +initrd information are embedded. Others including CPU status, boot method, +Ethernet port status, etc. are also updated. + +Following normal booting process, all variables are set, all images are loaded +before "bootm" command would be issued to boot, run command + +spl export fdt <address> + +where the address is the location of FIT image. U-Boot goes through the booting +process as if "bootm start", "bootm loados", "bootm ramdisk"... commands but +stops before "bootm go". There we have the fixed-up device tree in memory. +We can check the device tree header by these commands + +fdt addr <fdt address> +fdt header + +Where the fdt address is the device tree in memory. It is printed by U-Boot. +It is useful to know the exact size. One way to extract this static device +tree is to save it to eMMC/SD using command in U-Boot, and extract under Linux +with these commands, repectively + +mmc write <address> <sector> <sectors> +dd if=/dev/mmcblk0 of=<filename> bs=512 skip=<sector> count=<sectors> + +Note, U-Boot takes values as hexadecimals while Linux takes them as decimals by +default. If using NAND or other storage, the commands are slightly different. +When we have the static device tree image, we can re-make the FIT image with +it. It is important to specify the load addresses in FIT image for every +components. Otherwise U-Boot cannot load them correctly. + +Generate FIT image with static device tree +------------------------------------------ +Example: + +/dts-v1/; + +/ { + description = "Image file for the LS1043A Linux Kernel"; + #address-cells = <1>; + + images { + kernel@1 { + description = "ARM64 Linux kernel"; + data = /incbin/("./arch/arm64/boot/Image.gz"); + type = "kernel"; + arch = "arm64"; + os = "linux"; + compression = "gzip"; + load = <0x80080000>; + entry = <0x80080000>; + }; + fdt@1 { + description = "Flattened Device Tree blob"; + data = /incbin/("./fsl-ls1043ardb-static.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x90000000>; + }; + ramdisk@1 { + description = "LS1043 Ramdisk"; + data = /incbin/("./rootfs.cpio.gz"); + type = "ramdisk"; + arch = "arm64"; + os = "linux"; + compression = "gzip"; + load = <0xa0000000>; + }; + }; + + configurations { + default = "config@1"; + config@1 { + description = "Boot Linux kernel"; + kernel = "kernel@1"; + fdt = "fdt@1"; + ramdisk = "ramdisk@1"; + loadables = "fdt", "ramdisk"; + }; + }; +}; + +The "loadables" is not optional. It tells SPL which images to load into memory. + +Other things to consider +----------------------- +Falcon boot skips a lot of initialization in U-Boot. If Linux expects the +hardware to be initialized by U-Boot, the related code should be ported to SPL +build. For example, if Linux expect Ethernet PHY to be initialized in U-Boot +(which is not a common case), the PHY initialization has to be included in +falcon boot. This increases the SPL image size and should be handled carefully. +If Linux has PHY driver enabled, it still depends on the correct MDIO bus setup +in U-Boot. Normal U-Boot sets the MDC ratio to generate a proper clock signal. diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index a90ee0afd7..497a4b541d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -127,7 +127,7 @@ static void erratum_a008997(void) out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3); \ out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4) -#elif defined(CONFIG_ARCH_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) #define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \ out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \ @@ -149,7 +149,7 @@ static void erratum_a009007(void) usb_phy = (void __iomem *)SCFG_USB_PHY3; PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy); -#elif defined(CONFIG_ARCH_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) void __iomem *dcsr = (void __iomem *)DCSR_BASE; PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY1); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 2776240be3..1c694e7c67 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -80,6 +80,7 @@ void board_init_f(ulong dummy) get_clocks(); preloader_console_init(); + spl_set_bd(); #ifdef CONFIG_SPL_I2C_SUPPORT i2c_init_all(); @@ -116,4 +117,29 @@ void board_init_f(ulong dummy) gd->arch.tlb_allocated = gd->arch.tlb_addr; #endif /* CONFIG_SPL_FSL_LS_PPA */ } + +#ifdef CONFIG_SPL_OS_BOOT +/* + * Return + * 0 if booting into OS is selected + * 1 if booting into U-Boot is selected + */ +int spl_start_uboot(void) +{ + env_init(); + if (env_get_yesno("boot_os") != 0) + return 0; + + return 1; +} +#endif /* CONFIG_SPL_OS_BOOT */ +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif #endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7c062f0cad..5b90280468 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -313,8 +313,8 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \ sun8i-r16-parrot.dtb dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ - sun8i-a83t-cubietruck-plus.dtb \ - sun8i-a83t-sinovoip-bpi-m3.dtb + sun8i-a83t-bananapi-m3.dtb \ + sun8i-a83t-cubietruck-plus.dtb dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h3-bananapi-m2-plus.dtb \ diff --git a/arch/arm/dts/am3517-evm-u-boot.dtsi b/arch/arm/dts/am3517-evm-u-boot.dtsi new file mode 100644 index 0000000000..24a67dbd1e --- /dev/null +++ b/arch/arm/dts/am3517-evm-u-boot.dtsi @@ -0,0 +1,12 @@ +/* + * Copyright (C) 2017 + * Logic PD - http://www.logicpd.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/ { + chosen { + stdout-path = &uart3; + }; +}; diff --git a/arch/arm/dts/am3517-evm.dts b/arch/arm/dts/am3517-evm.dts new file mode 100644 index 0000000000..0e4a125f78 --- /dev/null +++ b/arch/arm/dts/am3517-evm.dts @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "am3517.dtsi" + +/ { + model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)"; + compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3"; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + vmmc_fixed: vmmc { + compatible = "regulator-fixed"; + regulator-name = "vmmc_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&davinci_emac { + status = "okay"; +}; + +&davinci_mdio { + status = "okay"; +}; + +&i2c1 { + clock-frequency = <400000>; +}; + +&i2c2 { + clock-frequency = <400000>; +}; + +&i2c3 { + clock-frequency = <400000>; +}; + +&mmc1 { + vmmc-supply = <&vmmc_fixed>; + bus-width = <4>; +}; + +&mmc2 { + status = "disabled"; +}; + +&mmc3 { + status = "disabled"; +}; + diff --git a/arch/arm/dts/am3517-u-boot.dtsi b/arch/arm/dts/am3517-u-boot.dtsi new file mode 100644 index 0000000000..219005210d --- /dev/null +++ b/arch/arm/dts/am3517-u-boot.dtsi @@ -0,0 +1,10 @@ +/* + * Copyright (C) 2017 + * Logic PD - http://www.logicpd.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +&uart4 { + reg-shift = <2>; +}; diff --git a/arch/arm/dts/am3517.dtsi b/arch/arm/dts/am3517.dtsi new file mode 100644 index 0000000000..00da3f2c40 --- /dev/null +++ b/arch/arm/dts/am3517.dtsi @@ -0,0 +1,107 @@ +/* + * Device Tree Source for am3517 SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "omap3.dtsi" + +/ { + aliases { + serial3 = &uart4; + can = &hecc; + }; + + ocp@68000000 { + am35x_otg_hs: am35x_otg_hs@5c040000 { + compatible = "ti,omap3-musb"; + ti,hwmods = "am35x_otg_hs"; + status = "disabled"; + reg = <0x5c040000 0x1000>; + interrupts = <71>; + interrupt-names = "mc"; + }; + + davinci_emac: ethernet@0x5c000000 { + compatible = "ti,am3517-emac"; + ti,hwmods = "davinci_emac"; + status = "disabled"; + reg = <0x5c000000 0x30000>; + interrupts = <67 68 69 70>; + syscon = <&scm_conf>; + ti,davinci-ctrl-reg-offset = <0x10000>; + ti,davinci-ctrl-mod-reg-offset = <0>; + ti,davinci-ctrl-ram-offset = <0x20000>; + ti,davinci-ctrl-ram-size = <0x2000>; + ti,davinci-rmii-en = /bits/ 8 <1>; + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + davinci_mdio: ethernet@0x5c030000 { + compatible = "ti,davinci_mdio"; + ti,hwmods = "davinci_mdio"; + status = "disabled"; + reg = <0x5c030000 0x1000>; + bus_freq = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + uart4: serial@4809e000 { + compatible = "ti,omap3-uart"; + ti,hwmods = "uart4"; + status = "disabled"; + reg = <0x4809e000 0x400>; + interrupts = <84>; + dmas = <&sdma 55 &sdma 54>; + dma-names = "tx", "rx"; + clock-frequency = <48000000>; + }; + + omap3_pmx_core2: pinmux@480025d8 { + compatible = "ti,omap3-padconf", "pinctrl-single"; + reg = <0x480025d8 0x24>; + #address-cells = <1>; + #size-cells = <0>; + #pinctrl-cells = <1>; + #interrupt-cells = <1>; + interrupt-controller; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0xff1f>; + }; + + hecc: can@5c050000 { + compatible = "ti,am3517-hecc"; + status = "disabled"; + reg = <0x5c050000 0x80>, + <0x5c053000 0x180>, + <0x5c052000 0x200>; + reg-names = "hecc", "hecc-ram", "mbx"; + interrupts = <24>; + clocks = <&hecc_ck>; + }; + }; +}; + +&iva { + status = "disabled"; +}; + +&mailbox { + status = "disabled"; +}; + +&mmu_isp { + status = "disabled"; +}; + +&smartreflex_mpu_iva { + status = "disabled"; +}; + +/include/ "am35xx-clocks.dtsi" +/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" diff --git a/arch/arm/dts/am35xx-clocks.dtsi b/arch/arm/dts/am35xx-clocks.dtsi new file mode 100644 index 0000000000..00dd1f091b --- /dev/null +++ b/arch/arm/dts/am35xx-clocks.dtsi @@ -0,0 +1,128 @@ +/* + * Device Tree Source for OMAP3 clock data + * + * Copyright (C) 2013 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +&scm_clocks { + emac_ick: emac_ick@32c { + #clock-cells = <0>; + compatible = "ti,am35xx-gate-clock"; + clocks = <&ipss_ick>; + reg = <0x032c>; + ti,bit-shift = <1>; + }; + + emac_fck: emac_fck@32c { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&rmii_ck>; + reg = <0x032c>; + ti,bit-shift = <9>; + }; + + vpfe_ick: vpfe_ick@32c { + #clock-cells = <0>; + compatible = "ti,am35xx-gate-clock"; + clocks = <&ipss_ick>; + reg = <0x032c>; + ti,bit-shift = <2>; + }; + + vpfe_fck: vpfe_fck@32c { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&pclk_ck>; + reg = <0x032c>; + ti,bit-shift = <10>; + }; + + hsotgusb_ick_am35xx: hsotgusb_ick_am35xx@32c { + #clock-cells = <0>; + compatible = "ti,am35xx-gate-clock"; + clocks = <&ipss_ick>; + reg = <0x032c>; + ti,bit-shift = <0>; + }; + + hsotgusb_fck_am35xx: hsotgusb_fck_am35xx@32c { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&sys_ck>; + reg = <0x032c>; + ti,bit-shift = <8>; + }; + + hecc_ck: hecc_ck@32c { + #clock-cells = <0>; + compatible = "ti,am35xx-gate-clock"; + clocks = <&sys_ck>; + reg = <0x032c>; + ti,bit-shift = <3>; + }; +}; +&cm_clocks { + ipss_ick: ipss_ick@a10 { + #clock-cells = <0>; + compatible = "ti,am35xx-interface-clock"; + clocks = <&core_l3_ick>; + reg = <0x0a10>; + ti,bit-shift = <4>; + }; + + rmii_ck: rmii_ck { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + + pclk_ck: pclk_ck { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <27000000>; + }; + + uart4_ick_am35xx: uart4_ick_am35xx@a10 { + #clock-cells = <0>; + compatible = "ti,omap3-interface-clock"; + clocks = <&core_l4_ick>; + reg = <0x0a10>; + ti,bit-shift = <23>; + }; + + uart4_fck_am35xx: uart4_fck_am35xx@a00 { + #clock-cells = <0>; + compatible = "ti,wait-gate-clock"; + clocks = <&core_48m_fck>; + reg = <0x0a00>; + ti,bit-shift = <23>; + }; +}; + +&cm_clockdomains { + core_l3_clkdm: core_l3_clkdm { + compatible = "ti,clockdomain"; + clocks = <&sdrc_ick>, <&ipss_ick>, <&emac_ick>, <&vpfe_ick>, + <&hsotgusb_ick_am35xx>, <&hsotgusb_fck_am35xx>, + <&hecc_ck>; + }; + + core_l4_clkdm: core_l4_clkdm { + compatible = "ti,clockdomain"; + clocks = <&cpefuse_fck>, <&ts_fck>, <&usbtll_fck>, + <&usbtll_ick>, <&mmchs3_ick>, <&mmchs3_fck>, + <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>, + <&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>, + <&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>, + <&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>, + <&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>, + <&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>, + <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>, + <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>, + <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, + <&uart4_ick_am35xx>, <&uart4_fck_am35xx>; + }; +}; diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts b/arch/arm/dts/at91-sama5d2_xplained.dts index b00aaa2c79..01326a1ee0 100644 --- a/arch/arm/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/dts/at91-sama5d2_xplained.dts @@ -41,6 +41,31 @@ }; apb { + hlcdc: hlcdc@f0000000 { + atmel,vl-bpix = <4>; + atmel,guard-time = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; + status = "okay"; + u-boot,dm-pre-reloc; + + display-timings { + u-boot,dm-pre-reloc; + 480x272 { + clock-frequency = <9000000>; + hactive = <480>; + vactive = <272>; + hsync-len = <41>; + hfront-porch = <2>; + hback-porch = <2>; + vfront-porch = <2>; + vback-porch = <2>; + vsync-len = <11>; + u-boot,dm-pre-reloc; + }; + }; + }; + qspi0: spi@f0020000 { status = "okay"; @@ -117,6 +142,41 @@ bias-disable; }; + pinctrl_lcd_base: pinctrl_lcd_base { + pinmux = <PIN_PC30__LCDVSYNC>, + <PIN_PC31__LCDHSYNC>, + <PIN_PD1__LCDDEN>, + <PIN_PD0__LCDPCK>; + bias-disable; + }; + + pinctrl_lcd_pwm: pinctrl_lcd_pwm { + pinmux = <PIN_PC28__LCDPWM>; + bias-disable; + }; + + pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 { + pinmux = <PIN_PC10__LCDDAT2>, + <PIN_PC11__LCDDAT3>, + <PIN_PC12__LCDDAT4>, + <PIN_PC13__LCDDAT5>, + <PIN_PC14__LCDDAT6>, + <PIN_PC15__LCDDAT7>, + <PIN_PC16__LCDDAT10>, + <PIN_PC17__LCDDAT11>, + <PIN_PC18__LCDDAT12>, + <PIN_PC19__LCDDAT13>, + <PIN_PC20__LCDDAT14>, + <PIN_PC21__LCDDAT15>, + <PIN_PC22__LCDDAT18>, + <PIN_PC23__LCDDAT19>, + <PIN_PC24__LCDDAT20>, + <PIN_PC25__LCDDAT21>, + <PIN_PC26__LCDDAT22>, + <PIN_PC27__LCDDAT23>; + bias-disable; + }; + pinctrl_macb0_phy_irq: macb0_phy_irq { pinmux = <PIN_PC9__GPIO>; bias-disable; diff --git a/arch/arm/dts/at91-sama5d4_xplained.dts b/arch/arm/dts/at91-sama5d4_xplained.dts index 0592b31b91..ea35dc21b6 100644 --- a/arch/arm/dts/at91-sama5d4_xplained.dts +++ b/arch/arm/dts/at91-sama5d4_xplained.dts @@ -74,6 +74,31 @@ ahb { apb { + hlcdc: hlcdc@f0000000 { + atmel,vl-bpix = <4>; + atmel,guard-time = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>; + status = "okay"; + u-boot,dm-pre-reloc; + + display-timings { + u-boot,dm-pre-reloc; + 480x272 { + clock-frequency = <9000000>; + hactive = <480>; + vactive = <272>; + hsync-len = <41>; + hfront-porch = <2>; + hback-porch = <2>; + vfront-porch = <2>; + vback-porch = <2>; + vsync-len = <11>; + u-boot,dm-pre-reloc; + }; + }; + }; + spi0: spi@f8010000 { u-boot,dm-pre-reloc; cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; diff --git a/arch/arm/dts/at91-sama5d4ek.dts b/arch/arm/dts/at91-sama5d4ek.dts index b965f5b39d..a5d75452cf 100644 --- a/arch/arm/dts/at91-sama5d4ek.dts +++ b/arch/arm/dts/at91-sama5d4ek.dts @@ -75,6 +75,32 @@ ahb { apb { + hlcdc: hlcdc@f0000000 { + atmel,vl-bpix = <4>; + atmel,output-mode = <18>; + atmel,guard-time = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; + status = "okay"; + u-boot,dm-pre-reloc; + + display-timings { + u-boot,dm-pre-reloc; + 800x480 { + clock-frequency = <33260000>; + hactive = <800>; + vactive = <480>; + hsync-len = <5>; + hfront-porch = <128>; + hback-porch = <0>; + vfront-porch = <23>; + vback-porch = <22>; + vsync-len = <5>; + u-boot,dm-pre-reloc; + }; + }; + }; + adc0: adc@fc034000 { pinctrl-names = "default"; pinctrl-0 = < diff --git a/arch/arm/dts/axp223.dtsi b/arch/arm/dts/axp223.dtsi new file mode 100644 index 0000000000..b91b6c1278 --- /dev/null +++ b/arch/arm/dts/axp223.dtsi @@ -0,0 +1,58 @@ +/* + * Copyright 2016 Free Electrons + * + * Quentin Schulz <quentin.schulz@free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * AXP223 Integrated Power Management Chip + * http://www.x-powers.com/product/AXP22X.php + * http://dl.linux-sunxi.org/AXP/AXP223-en.pdf + * + * The AXP223 shares most of its logic with the AXP221 but it has some + * differences, for the VBUS driver for example. + */ + +#include "axp22x.dtsi" + +&usb_power_supply { + compatible = "x-powers,axp223-usb-power-supply"; +}; diff --git a/arch/arm/dts/axp22x.dtsi b/arch/arm/dts/axp22x.dtsi index 458b6681e3..87fb08e812 100644 --- a/arch/arm/dts/axp22x.dtsi +++ b/arch/arm/dts/axp22x.dtsi @@ -52,6 +52,16 @@ interrupt-controller; #interrupt-cells = <1>; + ac_power_supply: ac-power-supply { + compatible = "x-powers,axp221-ac-power-supply"; + status = "disabled"; + }; + + battery_power_supply: battery-power-supply { + compatible = "x-powers,axp221-battery-power-supply"; + status = "disabled"; + }; + regulators { /* Default work frequency for buck regulators */ x-powers,dcdc-freq = <3000>; diff --git a/arch/arm/dts/bcm2835-rpi-a-plus.dts b/arch/arm/dts/bcm2835-rpi-a-plus.dts index 35ff4e7a4a..9f866491ef 100644 --- a/arch/arm/dts/bcm2835-rpi-a-plus.dts +++ b/arch/arm/dts/bcm2835-rpi-a-plus.dts @@ -1,6 +1,7 @@ /dts-v1/; #include "bcm2835.dtsi" #include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" / { compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; @@ -21,7 +22,72 @@ }; &gpio { - pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; + /* + * This is based on the unreleased schematic for the Model A+. + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD0", + "RXD0", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "NC", /* GPIO31 */ + "CAM_GPIO1", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "USB_LIMIT", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", /* GPIO40 */ + "CAM_GPIO0", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ i2s_alt0: i2s_alt0 { @@ -33,3 +99,9 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2835-rpi-a.dts b/arch/arm/dts/bcm2835-rpi-a.dts index 306a84ee98..4b1af06c8d 100644 --- a/arch/arm/dts/bcm2835-rpi-a.dts +++ b/arch/arm/dts/bcm2835-rpi-a.dts @@ -1,6 +1,7 @@ /dts-v1/; #include "bcm2835.dtsi" #include "bcm2835-rpi.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" / { compatible = "raspberrypi,model-a", "brcm,bcm2835"; @@ -14,7 +15,74 @@ }; &gpio { - pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>; + /* + * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf + * RPI00021 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_GPIO1", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "CAM_GPIO0", + /* Binary number representing build/revision */ + "CONFIG0", + "CONFIG1", + "CONFIG2", + "CONFIG3", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; /* I2S interface */ i2s_alt2: i2s_alt2 { @@ -26,3 +94,9 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2835-rpi-b-plus.dts b/arch/arm/dts/bcm2835-rpi-b-plus.dts index d5fdb8e761..a846f1e781 100644 --- a/arch/arm/dts/bcm2835-rpi-b-plus.dts +++ b/arch/arm/dts/bcm2835-rpi-b-plus.dts @@ -2,6 +2,7 @@ #include "bcm2835.dtsi" #include "bcm2835-rpi.dtsi" #include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" / { compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; @@ -22,7 +23,73 @@ }; &gpio { - pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; + /* + * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf + * RPI-BPLUS sheet 1 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD0", + "RXD0", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "SDA0", + "SCL0", + "NC", /* GPIO30 */ + "LAN_RUN", /* GPIO31 */ + "CAM_GPIO1", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "PWR_LOW_N", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "USB_LIMIT", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", /* GPIO40 */ + "CAM_GPIO0", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "ETHCLK", /* GPIO44 */ + "PWM1_OUT", /* GPIO45 */ + "HDMI_HPD_N", + "STATUS_LED", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ i2s_alt0: i2s_alt0 { @@ -34,3 +101,9 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/dts/bcm2835-rpi-b-rev2.dts index bfc4bd9b77..e860964e39 100644 --- a/arch/arm/dts/bcm2835-rpi-b-rev2.dts +++ b/arch/arm/dts/bcm2835-rpi-b-rev2.dts @@ -2,6 +2,7 @@ #include "bcm2835.dtsi" #include "bcm2835-rpi.dtsi" #include "bcm283x-rpi-smsc9512.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" / { compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; @@ -15,7 +16,73 @@ }; &gpio { - pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>; + /* + * Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf + * RPI00022 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_CLK", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "CAM_GPIO", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "GPIO27", + "GPIO28", + "GPIO29", + "GPIO30", + "GPIO31", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; /* I2S interface */ i2s_alt2: i2s_alt2 { @@ -27,3 +94,9 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2835-rpi-b.dts b/arch/arm/dts/bcm2835-rpi-b.dts index 0371bb7374..5d77f3f8c4 100644 --- a/arch/arm/dts/bcm2835-rpi-b.dts +++ b/arch/arm/dts/bcm2835-rpi-b.dts @@ -2,6 +2,7 @@ #include "bcm2835.dtsi" #include "bcm2835-rpi.dtsi" #include "bcm283x-rpi-smsc9512.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" / { compatible = "raspberrypi,model-b", "brcm,bcm2835"; @@ -15,9 +16,82 @@ }; &gpio { - pinctrl-0 = <&gpioout &alt0 &alt3>; + /* + * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf + * RPI00021 sheet 02 + * + * Legend: + * "NC" = not connected (no rail from the SoC) + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "SDA0", + "SCL0", + "SDA1", + "SCL1", + "GPIO_GCLK", + "CAM_GPIO1", + "LAN_RUN", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "NC", /* GPIO12 */ + "NC", /* GPIO13 */ + /* Serial port */ + "TXD0", + "RXD0", + "STATUS_LED_N", + "GPIO17", + "GPIO18", + "NC", /* GPIO19 */ + "NC", /* GPIO20 */ + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "NC", /* GPIO26 */ + "CAM_GPIO0", + /* Binary number representing build/revision */ + "CONFIG0", + "CONFIG1", + "CONFIG2", + "CONFIG3", + "NC", /* GPIO32 */ + "NC", /* GPIO33 */ + "NC", /* GPIO34 */ + "NC", /* GPIO35 */ + "NC", /* GPIO36 */ + "NC", /* GPIO37 */ + "NC", /* GPIO38 */ + "NC", /* GPIO39 */ + "PWM0_OUT", + "NC", /* GPIO41 */ + "NC", /* GPIO42 */ + "NC", /* GPIO43 */ + "NC", /* GPIO44 */ + "PWM1_OUT", + "HDMI_HPD_P", + "SD_CARD_DET", + /* Used by SD Card */ + "SD_CLK_R", + "SD_CMD_R", + "SD_DATA0_R", + "SD_DATA1_R", + "SD_DATA2_R", + "SD_DATA3_R"; + + pinctrl-0 = <&gpioout &alt0>; }; &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2835-rpi.dtsi b/arch/arm/dts/bcm2835-rpi.dtsi index e9b47b2bbc..8b95832dd0 100644 --- a/arch/arm/dts/bcm2835-rpi.dtsi +++ b/arch/arm/dts/bcm2835-rpi.dtsi @@ -39,22 +39,21 @@ }; alt0: alt0 { - brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>; + brcm,pins = <4 5 7 8 9 10 11>; brcm,function = <BCM2835_FSEL_ALT0>; }; - - alt3: alt3 { - brcm,pins = <48 49 50 51 52 53>; - brcm,function = <BCM2835_FSEL_ALT3>; - }; }; &i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_gpio0>; status = "okay"; clock-frequency = <100000>; }; &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_gpio2>; status = "okay"; clock-frequency = <100000>; }; @@ -64,11 +63,21 @@ }; &sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio48>; status = "okay"; bus-width = <4>; }; +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; + bus-width = <4>; +}; + &pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>; status = "okay"; }; @@ -84,3 +93,16 @@ power-domains = <&power RPI_POWER_DOMAIN_HDMI>; status = "okay"; }; + +&vec { + power-domains = <&power RPI_POWER_DOMAIN_VEC>; + status = "okay"; +}; + +&dsi0 { + power-domains = <&power RPI_POWER_DOMAIN_DSI0>; +}; + +&dsi1 { + power-domains = <&power RPI_POWER_DOMAIN_DSI1>; +}; diff --git a/arch/arm/dts/bcm2835.dtsi b/arch/arm/dts/bcm2835.dtsi index a78759e737..659b6e9513 100644 --- a/arch/arm/dts/bcm2835.dtsi +++ b/arch/arm/dts/bcm2835.dtsi @@ -23,3 +23,13 @@ }; }; }; + +&cpu_thermal { + coefficients = <(-538) 407000>; +}; + +/* enable thermal sensor with the correct compatible property set */ +&thermal { + compatible = "brcm,bcm2835-thermal"; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2836-rpi-2-b.dts b/arch/arm/dts/bcm2836-rpi-2-b.dts index 29e1cfe8eb..e8de41444b 100644 --- a/arch/arm/dts/bcm2836-rpi-2-b.dts +++ b/arch/arm/dts/bcm2836-rpi-2-b.dts @@ -2,6 +2,7 @@ #include "bcm2836.dtsi" #include "bcm2835-rpi.dtsi" #include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" / { compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; @@ -26,7 +27,7 @@ }; &gpio { - pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; + pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; /* I2S interface */ i2s_alt0: i2s_alt0 { @@ -38,3 +39,9 @@ &hdmi { hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio14>; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2836.dtsi b/arch/arm/dts/bcm2836.dtsi index 9d0651d8f3..2c26d0be8b 100644 --- a/arch/arm/dts/bcm2836.dtsi +++ b/arch/arm/dts/bcm2836.dtsi @@ -36,6 +36,7 @@ cpus: cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; v7_cpu0: cpu@0 { device_type = "cpu"; @@ -76,3 +77,13 @@ interrupt-parent = <&local_intc>; interrupts = <8>; }; + +&cpu_thermal { + coefficients = <(-538) 407000>; +}; + +/* enable thermal sensor with the correct compatible property set */ +&thermal { + compatible = "brcm,bcm2836-thermal"; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm2837-rpi-3-b.dts b/arch/arm/dts/bcm2837-rpi-3-b.dts index 7841b724e3..20725ca487 100644 --- a/arch/arm/dts/bcm2837-rpi-3-b.dts +++ b/arch/arm/dts/bcm2837-rpi-3-b.dts @@ -2,6 +2,7 @@ #include "bcm2837.dtsi" #include "bcm2835-rpi.dtsi" #include "bcm283x-rpi-smsc9514.dtsi" +#include "bcm283x-rpi-usb-host.dtsi" / { compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; @@ -15,16 +16,36 @@ act { gpios = <&gpio 47 0>; }; - - pwr { - label = "PWR"; - gpios = <&gpio 35 0>; - default-state = "keep"; - linux,default-trigger = "default-on"; - }; }; }; +/* uart0 communicates with the BT module */ +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; + status = "okay"; +}; + +/* uart1 is mapped to the pin header */ &uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_gpio14>; + status = "okay"; +}; + +/* SDHCI is used to control the SDIO for wireless */ +&sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio34>; + status = "okay"; + bus-width = <4>; + non-removable; +}; + +/* SDHOST is used to drive the SD card */ +&sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; status = "okay"; + bus-width = <4>; }; diff --git a/arch/arm/dts/bcm2837.dtsi b/arch/arm/dts/bcm2837.dtsi index 8216bbb29f..bc1cca5cf4 100644 --- a/arch/arm/dts/bcm2837.dtsi +++ b/arch/arm/dts/bcm2837.dtsi @@ -1,7 +1,7 @@ #include "bcm283x.dtsi" / { - compatible = "brcm,bcm2836"; + compatible = "brcm,bcm2837"; soc { ranges = <0x7e000000 0x3f000000 0x1000000>, @@ -30,6 +30,7 @@ cpus: cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit cpu0: cpu@0 { device_type = "cpu"; @@ -74,3 +75,13 @@ interrupt-parent = <&local_intc>; interrupts = <8>; }; + +&cpu_thermal { + coefficients = <(-538) 412000>; +}; + +/* enable thermal sensor with the correct compatible property set */ +&thermal { + compatible = "brcm,bcm2837-thermal"; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm283x-rpi-smsc9512.dtsi b/arch/arm/dts/bcm283x-rpi-smsc9512.dtsi index 12c981e511..9a0599f711 100644 --- a/arch/arm/dts/bcm283x-rpi-smsc9512.dtsi +++ b/arch/arm/dts/bcm283x-rpi-smsc9512.dtsi @@ -1,6 +1,6 @@ / { aliases { - ethernet = ðernet; + ethernet0 = ðernet; }; }; diff --git a/arch/arm/dts/bcm283x-rpi-smsc9514.dtsi b/arch/arm/dts/bcm283x-rpi-smsc9514.dtsi index 3f0a56ebcf..dc7ae776db 100644 --- a/arch/arm/dts/bcm283x-rpi-smsc9514.dtsi +++ b/arch/arm/dts/bcm283x-rpi-smsc9514.dtsi @@ -1,6 +1,6 @@ / { aliases { - ethernet = ðernet; + ethernet0 = ðernet; }; }; diff --git a/arch/arm/dts/bcm283x-rpi-usb-host.dtsi b/arch/arm/dts/bcm283x-rpi-usb-host.dtsi new file mode 100644 index 0000000000..73f4ece8dc --- /dev/null +++ b/arch/arm/dts/bcm283x-rpi-usb-host.dtsi @@ -0,0 +1,3 @@ +&usb { + dr_mode = "host"; +}; diff --git a/arch/arm/dts/bcm283x.dtsi b/arch/arm/dts/bcm283x.dtsi index e5b4f20c2a..05a6f489af 100644 --- a/arch/arm/dts/bcm283x.dtsi +++ b/arch/arm/dts/bcm283x.dtsi @@ -3,6 +3,11 @@ #include <dt-bindings/clock/bcm2835-aux.h> #include <dt-bindings/gpio/gpio.h> +/* firmware-provided startup stubs live here, where the secondary CPUs are + * spinning. + */ +/memreserve/ 0x00000000 0x00001000; + /* This include file covers the common peripherals and configuration between * bcm2835 and bcm2836 implementations, leaving the CPU configuration to * bcm2835.dtsi and bcm2836.dtsi. @@ -19,6 +24,26 @@ bootargs = "earlyprintk console=ttyAMA0"; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <0>; + polling-delay = <1000>; + + thermal-sensors = <&thermal>; + + trips { + cpu-crit { + temperature = <80000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + }; + }; + }; + soc: soc { compatible = "simple-bus"; #address-cells = <1>; @@ -93,10 +118,13 @@ #clock-cells = <1>; reg = <0x7e101000 0x2000>; - /* CPRMAN derives everything from the platform's - * oscillator. + /* CPRMAN derives almost everything from the + * platform's oscillator. However, the DSI + * pixel clocks come from the DSI analog PHY. */ - clocks = <&clk_osc>; + clocks = <&clk_osc>, + <&dsi0 0>, <&dsi0 1>, <&dsi0 2>, + <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; }; rng@7e104000 { @@ -104,7 +132,7 @@ reg = <0x7e104000 0x10>; }; - mailbox: mailbox@7e00b800 { + mailbox: mailbox@7e00b880 { compatible = "brcm,bcm2835-mbox"; reg = <0x7e00b880 0x40>; interrupts = <0 1>; @@ -132,6 +160,213 @@ interrupt-controller; #interrupt-cells = <2>; + + /* Defines pin muxing groups according to + * BCM2835-ARM-Peripherals.pdf page 102. + * + * While each pin can have its mux selected + * for various functions individually, some + * groups only make sense to switch to a + * particular function together. + */ + dpi_gpio0: dpi_gpio0 { + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 + 12 13 14 15 16 17 18 19 + 20 21 22 23 24 25 26 27>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + emmc_gpio22: emmc_gpio22 { + brcm,pins = <22 23 24 25 26 27>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + emmc_gpio34: emmc_gpio34 { + brcm,pins = <34 35 36 37 38 39>; + brcm,function = <BCM2835_FSEL_ALT3>; + brcm,pull = <BCM2835_PUD_OFF + BCM2835_PUD_UP + BCM2835_PUD_UP + BCM2835_PUD_UP + BCM2835_PUD_UP + BCM2835_PUD_UP>; + }; + emmc_gpio48: emmc_gpio48 { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + + gpclk0_gpio4: gpclk0_gpio4 { + brcm,pins = <4>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk1_gpio5: gpclk1_gpio5 { + brcm,pins = <5>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk1_gpio42: gpclk1_gpio42 { + brcm,pins = <42>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk1_gpio44: gpclk1_gpio44 { + brcm,pins = <44>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk2_gpio6: gpclk2_gpio6 { + brcm,pins = <6>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + gpclk2_gpio43: gpclk2_gpio43 { + brcm,pins = <43>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + + i2c0_gpio0: i2c0_gpio0 { + brcm,pins = <0 1>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + i2c0_gpio28: i2c0_gpio28 { + brcm,pins = <28 29>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + i2c0_gpio44: i2c0_gpio44 { + brcm,pins = <44 45>; + brcm,function = <BCM2835_FSEL_ALT1>; + }; + i2c1_gpio2: i2c1_gpio2 { + brcm,pins = <2 3>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + i2c1_gpio44: i2c1_gpio44 { + brcm,pins = <44 45>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + i2c_slave_gpio18: i2c_slave_gpio18 { + brcm,pins = <18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + + jtag_gpio4: jtag_gpio4 { + brcm,pins = <4 5 6 12 13>; + brcm,function = <BCM2835_FSEL_ALT4>; + }; + jtag_gpio22: jtag_gpio22 { + brcm,pins = <22 23 24 25 26 27>; + brcm,function = <BCM2835_FSEL_ALT4>; + }; + + pcm_gpio18: pcm_gpio18 { + brcm,pins = <18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pcm_gpio28: pcm_gpio28 { + brcm,pins = <28 29 30 31>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + + pwm0_gpio12: pwm0_gpio12 { + brcm,pins = <12>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pwm0_gpio18: pwm0_gpio18 { + brcm,pins = <18>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + pwm0_gpio40: pwm0_gpio40 { + brcm,pins = <40>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pwm1_gpio13: pwm1_gpio13 { + brcm,pins = <13>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pwm1_gpio19: pwm1_gpio19 { + brcm,pins = <19>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + pwm1_gpio41: pwm1_gpio41 { + brcm,pins = <41>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + pwm1_gpio45: pwm1_gpio45 { + brcm,pins = <45>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + + sdhost_gpio48: sdhost_gpio48 { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + + spi0_gpio7: spi0_gpio7 { + brcm,pins = <7 8 9 10 11>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + spi0_gpio35: spi0_gpio35 { + brcm,pins = <35 36 37 38 39>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + spi1_gpio16: spi1_gpio16 { + brcm,pins = <16 17 18 19 20 21>; + brcm,function = <BCM2835_FSEL_ALT4>; + }; + spi2_gpio40: spi2_gpio40 { + brcm,pins = <40 41 42 43 44 45>; + brcm,function = <BCM2835_FSEL_ALT4>; + }; + + uart0_gpio14: uart0_gpio14 { + brcm,pins = <14 15>; + brcm,function = <BCM2835_FSEL_ALT0>; + }; + /* Separate from the uart0_gpio14 group + * because it conflicts with spi1_gpio16, and + * people often run uart0 on the two pins + * without flow control. + */ + uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { + brcm,pins = <16 17>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 { + brcm,pins = <30 31>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + uart0_gpio32: uart0_gpio32 { + brcm,pins = <32 33>; + brcm,function = <BCM2835_FSEL_ALT3>; + }; + uart0_gpio36: uart0_gpio36 { + brcm,pins = <36 37>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 { + brcm,pins = <38 39>; + brcm,function = <BCM2835_FSEL_ALT2>; + }; + + uart1_gpio14: uart1_gpio14 { + brcm,pins = <14 15>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 { + brcm,pins = <16 17>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_gpio32: uart1_gpio32 { + brcm,pins = <32 33>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 { + brcm,pins = <30 31>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_gpio40: uart1_gpio40 { + brcm,pins = <40 41>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; + uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 { + brcm,pins = <42 43>; + brcm,function = <BCM2835_FSEL_ALT5>; + }; }; uart0: serial@7e201000 { @@ -144,6 +379,16 @@ arm,primecell-periphid = <0x00241011>; }; + sdhost: mmc@7e202000 { + compatible = "brcm,bcm2835-sdhost"; + reg = <0x7e202000 0x100>; + interrupts = <2 24>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + dmas = <&dma 13>; + dma-names = "rx-tx"; + status = "disabled"; + }; + i2s: i2s@7e203000 { compatible = "brcm,bcm2835-i2s"; reg = <0x7e203000 0x20>, @@ -187,6 +432,33 @@ interrupts = <2 14>; /* pwa1 */ }; + dsi0: dsi@7e209000 { + compatible = "brcm,bcm2835-dsi0"; + reg = <0x7e209000 0x78>; + interrupts = <2 4>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + + clocks = <&clocks BCM2835_PLLA_DSI0>, + <&clocks BCM2835_CLOCK_DSI0E>, + <&clocks BCM2835_CLOCK_DSI0P>; + clock-names = "phy", "escape", "pixel"; + + clock-output-names = "dsi0_byte", + "dsi0_ddr2", + "dsi0_ddr"; + + }; + + thermal: thermal@7e212000 { + compatible = "brcm,bcm2835-thermal"; + reg = <0x7e212000 0x8>; + clocks = <&clocks BCM2835_CLOCK_TSENS>; + #thermal-sensor-cells = <0>; + status = "disabled"; + }; + aux: aux@0x7e215000 { compatible = "brcm,bcm2835-aux"; #clock-cells = <1>; @@ -246,6 +518,26 @@ interrupts = <2 1>; }; + dsi1: dsi@7e700000 { + compatible = "brcm,bcm2835-dsi1"; + reg = <0x7e700000 0x8c>; + interrupts = <2 12>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + + clocks = <&clocks BCM2835_PLLD_DSI1>, + <&clocks BCM2835_CLOCK_DSI1E>, + <&clocks BCM2835_CLOCK_DSI1P>; + clock-names = "phy", "escape", "pixel"; + + clock-output-names = "dsi1_byte", + "dsi1_ddr2", + "dsi1_ddr"; + + status = "disabled"; + }; + i2c1: i2c@7e804000 { compatible = "brcm,bcm2835-i2c"; reg = <0x7e804000 0x1000>; @@ -266,6 +558,14 @@ status = "disabled"; }; + vec: vec@7e806000 { + compatible = "brcm,bcm2835-vec"; + reg = <0x7e806000 0x1000>; + clocks = <&clocks BCM2835_CLOCK_VEC>; + interrupts = <2 27>; + status = "disabled"; + }; + pixelvalve@7e807000 { compatible = "brcm,bcm2835-pixelvalve2"; reg = <0x7e807000 0x100>; @@ -281,6 +581,8 @@ clocks = <&clocks BCM2835_PLLH_PIX>, <&clocks BCM2835_CLOCK_HSM>; clock-names = "pixel", "hdmi"; + dmas = <&dma 17>; + dma-names = "audio-rx"; status = "disabled"; }; @@ -290,6 +592,10 @@ interrupts = <1 9>; #address-cells = <1>; #size-cells = <0>; + clocks = <&clk_usb>; + clock-names = "otg"; + phys = <&usbphy>; + phy-names = "usb2-phy"; }; v3d: v3d@7ec00000 { @@ -317,6 +623,17 @@ clock-frequency = <19200000>; }; + clk_usb: clock@4 { + compatible = "fixed-clock"; + reg = <4>; + #clock-cells = <0>; + clock-output-names = "otg"; + clock-frequency = <480000000>; + }; + }; + + usbphy: phy { + compatible = "usb-nop-xceiv"; }; }; diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi b/arch/arm/dts/da850-evm-u-boot.dtsi new file mode 100644 index 0000000000..5cc5a81f6f --- /dev/null +++ b/arch/arm/dts/da850-evm-u-boot.dtsi @@ -0,0 +1,23 @@ +/* + * da850-evm U-Boot Additions + * + * Copyright (C) 2017 Logic PD, Inc. + * Copyright (C) Adam Ford + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/ { + chosen { + stdout-path = &serial2; + }; + + aliases { + i2c0 = &i2c0; + spi0 = &spi1; + }; +}; + +&flash { + compatible = "m25p64", "spi-flash"; +}; diff --git a/arch/arm/dts/da850-evm.dts b/arch/arm/dts/da850-evm.dts new file mode 100644 index 0000000000..67e72bc72e --- /dev/null +++ b/arch/arm/dts/da850-evm.dts @@ -0,0 +1,304 @@ +/* + * Device Tree for DA850 EVM board + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation, version 2. + */ +/dts-v1/; +#include "da850.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + compatible = "ti,da850-evm", "ti,da850"; + model = "DA850/AM1808/OMAP-L138 EVM"; + + soc@1c00000 { + pmx_core: pinmux@14120 { + status = "okay"; + + mcasp0_pins: pinmux_mcasp0_pins { + pinctrl-single,bits = < + /* + * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR, + * AFSR, AMUTE + */ + 0x00 0x11111111 0xffffffff + /* AXR11, AXR12 */ + 0x04 0x00011000 0x000ff000 + >; + }; + nand_pins: nand_pins { + pinctrl-single,bits = < + /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */ + 0x1c 0x10110110 0xf0ff0ff0 + /* + * EMA_D[0], EMA_D[1], EMA_D[2], + * EMA_D[3], EMA_D[4], EMA_D[5], + * EMA_D[6], EMA_D[7] + */ + 0x24 0x11111111 0xffffffff + /* EMA_A[1], EMA_A[2] */ + 0x30 0x01100000 0x0ff00000 + >; + }; + }; + serial0: serial@42000 { + status = "okay"; + }; + serial1: serial@10c000 { + status = "okay"; + }; + serial2: serial@10d000 { + status = "okay"; + }; + rtc0: rtc@23000 { + status = "okay"; + }; + i2c0: i2c@22000 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + + tps: tps@48 { + reg = <0x48>; + }; + tlv320aic3106: tlv320aic3106@18 { + #sound-dai-cells = <0>; + compatible = "ti,tlv320aic3106"; + reg = <0x18>; + status = "okay"; + + /* Regulators */ + IOVDD-supply = <&vdcdc2_reg>; + /* Derived from VBAT: Baseboard 3.3V / 1.8V */ + AVDD-supply = <&vbat>; + DRVDD-supply = <&vbat>; + DVDD-supply = <&vbat>; + }; + tca6416: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + wdt: wdt@21000 { + status = "okay"; + }; + mmc0: mmc@40000 { + max-frequency = <50000000>; + bus-width = <4>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + }; + spi1: spi@30e000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins &spi1_cs0_pin>; + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p64"; + spi-max-frequency = <30000000>; + m25p,fast-read; + reg = <0>; + partition@0 { + label = "U-Boot-SPL"; + reg = <0x00000000 0x00010000>; + read-only; + }; + partition@1 { + label = "U-Boot"; + reg = <0x00010000 0x00080000>; + read-only; + }; + partition@2 { + label = "U-Boot-Env"; + reg = <0x00090000 0x00010000>; + read-only; + }; + partition@3 { + label = "Kernel"; + reg = <0x000a0000 0x00280000>; + }; + partition@4 { + label = "Filesystem"; + reg = <0x00320000 0x00400000>; + }; + partition@5 { + label = "MAC-Address"; + reg = <0x007f0000 0x00010000>; + read-only; + }; + }; + }; + mdio: mdio@224000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + bus_freq = <2200000>; + }; + eth0: ethernet@220000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mii_pins>; + }; + gpio: gpio@226000 { + status = "okay"; + }; + }; + vbat: fixedregulator0 { + compatible = "regulator-fixed"; + regulator-name = "vbat"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "DA850/OMAP-L138 EVM"; + simple-audio-card,widgets = + "Line", "Line In", + "Line", "Line Out"; + simple-audio-card,routing = + "LINE1L", "Line In", + "LINE1R", "Line In", + "Line Out", "LLOUT", + "Line Out", "RLOUT"; + simple-audio-card,format = "dsp_b"; + simple-audio-card,bitclock-master = <&link0_codec>; + simple-audio-card,frame-master = <&link0_codec>; + simple-audio-card,bitclock-inversion; + + simple-audio-card,cpu { + sound-dai = <&mcasp0>; + system-clock-frequency = <24576000>; + }; + + link0_codec: simple-audio-card,codec { + sound-dai = <&tlv320aic3106>; + system-clock-frequency = <24576000>; + }; + }; +}; + +/include/ "tps6507x.dtsi" + +&tps { + vdcdc1_2-supply = <&vbat>; + vdcdc3-supply = <&vbat>; + vldo1_2-supply = <&vbat>; + + regulators { + vdcdc1_reg: regulator@0 { + regulator-name = "VDCDC1_3.3V"; + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3450000>; + regulator-always-on; + regulator-boot-on; + }; + + vdcdc2_reg: regulator@1 { + regulator-name = "VDCDC2_3.3V"; + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <3450000>; + regulator-always-on; + regulator-boot-on; + ti,defdcdc_default = <1>; + }; + + vdcdc3_reg: regulator@2 { + regulator-name = "VDCDC3_1.2V"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + ti,defdcdc_default = <1>; + }; + + ldo1_reg: regulator@3 { + regulator-name = "LDO1_1.8V"; + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1890000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo2_reg: regulator@4 { + regulator-name = "LDO2_1.2V"; + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1320000>; + regulator-always-on; + regulator-boot-on; + }; + }; +}; + +&mcasp0 { + #sound-dai-cells = <0>; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcasp0_pins>; + + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + /* 4 serializer */ + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 0 0 0 0 + 0 0 0 0 + 0 0 0 1 + 2 0 0 0 + >; + tx-num-evt = <32>; + rx-num-evt = <32>; +}; + +&edma0 { + ti,edma-reserved-slot-ranges = <32 50>; +}; + +&edma1 { + ti,edma-reserved-slot-ranges = <32 90>; +}; + +&aemif { + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins>; + status = "ok"; + cs3 { + #address-cells = <2>; + #size-cells = <1>; + clock-ranges; + ranges; + + ti,cs-chipselect = <3>; + + nand@2000000,0 { + compatible = "ti,davinci-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0x02000000 0x02000000 + 1 0x00000000 0x00008000>; + + ti,davinci-chipselect = <1>; + ti,davinci-mask-ale = <0>; + ti,davinci-mask-cle = <0>; + ti,davinci-mask-chipsel = <0>; + ti,davinci-ecc-mode = "hw"; + ti,davinci-ecc-bits = <4>; + ti,davinci-nand-use-bbt; + }; + }; +}; + +&vpif { + pinctrl-names = "default"; + pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>; + status = "okay"; +}; diff --git a/arch/arm/dts/da850.dtsi b/arch/arm/dts/da850.dtsi new file mode 100644 index 0000000000..02e2f8f258 --- /dev/null +++ b/arch/arm/dts/da850.dtsi @@ -0,0 +1,581 @@ +/* + * Copyright 2012 DENX Software Engineering GmbH + * Heiko Schocher <hs@denx.de> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include "skeleton.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + arm { + #address-cells = <1>; + #size-cells = <1>; + ranges; + intc: interrupt-controller@fffee000 { + compatible = "ti,cp-intc"; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <101>; + reg = <0xfffee000 0x2000>; + }; + }; + + aliases { + spi0 = &spi0; + }; + + soc@1c00000 { + compatible = "simple-bus"; + model = "da850"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x01c00000 0x400000>; + interrupt-parent = <&intc>; + + pmx_core: pinmux@14120 { + compatible = "pinctrl-single"; + reg = <0x14120 0x50>; + #address-cells = <1>; + #size-cells = <0>; + #pinctrl-cells = <2>; + pinctrl-single,bit-per-mux; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0xf>; + status = "disabled"; + + serial0_rtscts_pins: pinmux_serial0_rtscts_pins { + pinctrl-single,bits = < + /* UART0_RTS UART0_CTS */ + 0x0c 0x22000000 0xff000000 + >; + }; + serial0_rxtx_pins: pinmux_serial0_rxtx_pins { + pinctrl-single,bits = < + /* UART0_TXD UART0_RXD */ + 0x0c 0x00220000 0x00ff0000 + >; + }; + serial1_rtscts_pins: pinmux_serial1_rtscts_pins { + pinctrl-single,bits = < + /* UART1_CTS UART1_RTS */ + 0x00 0x00440000 0x00ff0000 + >; + }; + serial1_rxtx_pins: pinmux_serial1_rxtx_pins { + pinctrl-single,bits = < + /* UART1_TXD UART1_RXD */ + 0x10 0x22000000 0xff000000 + >; + }; + serial2_rtscts_pins: pinmux_serial2_rtscts_pins { + pinctrl-single,bits = < + /* UART2_CTS UART2_RTS */ + 0x00 0x44000000 0xff000000 + >; + }; + serial2_rxtx_pins: pinmux_serial2_rxtx_pins { + pinctrl-single,bits = < + /* UART2_TXD UART2_RXD */ + 0x10 0x00220000 0x00ff0000 + >; + }; + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,bits = < + /* I2C0_SDA,I2C0_SCL */ + 0x10 0x00002200 0x0000ff00 + >; + }; + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,bits = < + /* I2C1_SDA, I2C1_SCL */ + 0x10 0x00440000 0x00ff0000 + >; + }; + mmc0_pins: pinmux_mmc_pins { + pinctrl-single,bits = < + /* MMCSD0_DAT[3] MMCSD0_DAT[2] + * MMCSD0_DAT[1] MMCSD0_DAT[0] + * MMCSD0_CMD MMCSD0_CLK + */ + 0x28 0x00222222 0x00ffffff + >; + }; + ehrpwm0a_pins: pinmux_ehrpwm0a_pins { + pinctrl-single,bits = < + /* EPWM0A */ + 0xc 0x00000002 0x0000000f + >; + }; + ehrpwm0b_pins: pinmux_ehrpwm0b_pins { + pinctrl-single,bits = < + /* EPWM0B */ + 0xc 0x00000020 0x000000f0 + >; + }; + ehrpwm1a_pins: pinmux_ehrpwm1a_pins { + pinctrl-single,bits = < + /* EPWM1A */ + 0x14 0x00000002 0x0000000f + >; + }; + ehrpwm1b_pins: pinmux_ehrpwm1b_pins { + pinctrl-single,bits = < + /* EPWM1B */ + 0x14 0x00000020 0x000000f0 + >; + }; + ecap0_pins: pinmux_ecap0_pins { + pinctrl-single,bits = < + /* ECAP0_APWM0 */ + 0x8 0x20000000 0xf0000000 + >; + }; + ecap1_pins: pinmux_ecap1_pins { + pinctrl-single,bits = < + /* ECAP1_APWM1 */ + 0x4 0x40000000 0xf0000000 + >; + }; + ecap2_pins: pinmux_ecap2_pins { + pinctrl-single,bits = < + /* ECAP2_APWM2 */ + 0x4 0x00000004 0x0000000f + >; + }; + spi0_pins: pinmux_spi0_pins { + pinctrl-single,bits = < + /* SIMO, SOMI, CLK */ + 0xc 0x00001101 0x0000ff0f + >; + }; + spi0_cs0_pin: pinmux_spi0_cs0 { + pinctrl-single,bits = < + /* CS0 */ + 0x10 0x00000010 0x000000f0 + >; + }; + spi0_cs3_pin: pinmux_spi0_cs3_pin { + pinctrl-single,bits = < + /* CS3 */ + 0xc 0x01000000 0x0f000000 + >; + }; + spi1_pins: pinmux_spi1_pins { + pinctrl-single,bits = < + /* SIMO, SOMI, CLK */ + 0x14 0x00110100 0x00ff0f00 + >; + }; + spi1_cs0_pin: pinmux_spi1_cs0 { + pinctrl-single,bits = < + /* CS0 */ + 0x14 0x00000010 0x000000f0 + >; + }; + mdio_pins: pinmux_mdio_pins { + pinctrl-single,bits = < + /* MDIO_CLK, MDIO_D */ + 0x10 0x00000088 0x000000ff + >; + }; + mii_pins: pinmux_mii_pins { + pinctrl-single,bits = < + /* + * MII_TXEN, MII_TXCLK, MII_COL + * MII_TXD_3, MII_TXD_2, MII_TXD_1 + * MII_TXD_0 + */ + 0x8 0x88888880 0xfffffff0 + /* + * MII_RXER, MII_CRS, MII_RXCLK + * MII_RXDV, MII_RXD_3, MII_RXD_2 + * MII_RXD_1, MII_RXD_0 + */ + 0xc 0x88888888 0xffffffff + >; + }; + lcd_pins: pinmux_lcd_pins { + pinctrl-single,bits = < + /* + * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5], + * LCD_D[6], LCD_D[7] + */ + 0x40 0x22222200 0xffffff00 + /* + * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13], + * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1] + */ + 0x44 0x22222222 0xffffffff + /* LCD_D[8], LCD_D[9] */ + 0x48 0x00000022 0x000000ff + + /* LCD_PCLK */ + 0x48 0x02000000 0x0f000000 + /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */ + 0x4c 0x02000022 0x0f0000ff + >; + }; + vpif_capture_pins: vpif_capture_pins { + pinctrl-single,bits = < + /* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */ + 0x38 0x11111111 0xffffffff + /* VP_DIN[10..15,0..1] */ + 0x3c 0x11111111 0xffffffff + /* VP_DIN[8..9] */ + 0x40 0x00000011 0x000000ff + >; + }; + vpif_display_pins: vpif_display_pins { + pinctrl-single,bits = < + /* VP_DOUT[2..7] */ + 0x40 0x11111100 0xffffff00 + /* VP_DOUT[10..15,0..1] */ + 0x44 0x11111111 0xffffffff + /* VP_DOUT[8..9] */ + 0x48 0x00000011 0x000000ff + /* + * VP_CLKOUT3, VP_CLKIN3, + * VP_CLKOUT2, VP_CLKIN2 + */ + 0x4c 0x00111100 0x00ffff00 + >; + }; + }; + prictrl: priority-controller@14110 { + compatible = "ti,da850-mstpri"; + reg = <0x14110 0x0c>; + status = "disabled"; + }; + cfgchip: chip-controller@1417c { + compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; + reg = <0x1417c 0x14>; + + usb_phy: usb-phy { + compatible = "ti,da830-usb-phy"; + #phy-cells = <1>; + status = "disabled"; + }; + }; + edma0: edma@0 { + compatible = "ti,edma3-tpcc"; + /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */ + reg = <0x0 0x8000>; + reg-names = "edma3_cc"; + interrupts = <11 12>; + interrupt-names = "edma3_ccint", "edma3_ccerrint"; + #dma-cells = <2>; + + ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>; + }; + edma0_tptc0: tptc@8000 { + compatible = "ti,edma3-tptc"; + reg = <0x8000 0x400>; + interrupts = <13>; + interrupt-names = "edm3_tcerrint"; + }; + edma0_tptc1: tptc@8400 { + compatible = "ti,edma3-tptc"; + reg = <0x8400 0x400>; + interrupts = <32>; + interrupt-names = "edm3_tcerrint"; + }; + edma1: edma@230000 { + compatible = "ti,edma3-tpcc"; + /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */ + reg = <0x230000 0x8000>; + reg-names = "edma3_cc"; + interrupts = <93 94>; + interrupt-names = "edma3_ccint", "edma3_ccerrint"; + #dma-cells = <2>; + + ti,tptcs = <&edma1_tptc0 7>; + }; + edma1_tptc0: tptc@238000 { + compatible = "ti,edma3-tptc"; + reg = <0x238000 0x400>; + interrupts = <95>; + interrupt-names = "edm3_tcerrint"; + }; + serial0: serial@42000 { + compatible = "ti,da830-uart", "ns16550a"; + reg = <0x42000 0x100>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = <25>; + status = "disabled"; + }; + serial1: serial@10c000 { + compatible = "ti,da830-uart", "ns16550a"; + reg = <0x10c000 0x100>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = <53>; + status = "disabled"; + }; + serial2: serial@10d000 { + compatible = "ti,da830-uart", "ns16550a"; + reg = <0x10d000 0x100>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = <61>; + status = "disabled"; + }; + rtc0: rtc@23000 { + compatible = "ti,da830-rtc"; + reg = <0x23000 0x1000>; + interrupts = <19 + 19>; + status = "disabled"; + }; + i2c0: i2c@22000 { + compatible = "ti,davinci-i2c"; + reg = <0x22000 0x1000>; + interrupts = <15>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + i2c1: i2c@228000 { + compatible = "ti,davinci-i2c"; + reg = <0x228000 0x1000>; + interrupts = <51>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + wdt: wdt@21000 { + compatible = "ti,davinci-wdt"; + reg = <0x21000 0x1000>; + status = "disabled"; + }; + mmc0: mmc@40000 { + compatible = "ti,da830-mmc"; + reg = <0x40000 0x1000>; + cap-sd-highspeed; + cap-mmc-highspeed; + interrupts = <16>; + dmas = <&edma0 16 0>, <&edma0 17 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + vpif: video@217000 { + compatible = "ti,da850-vpif"; + reg = <0x217000 0x1000>; + interrupts = <92>; + status = "disabled"; + + /* VPIF capture port */ + port@0 { + #address-cells = <1>; + #size-cells = <0>; + }; + + /* VPIF display port */ + port@1 { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + mmc1: mmc@21b000 { + compatible = "ti,da830-mmc"; + reg = <0x21b000 0x1000>; + cap-sd-highspeed; + cap-mmc-highspeed; + interrupts = <72>; + dmas = <&edma1 28 0>, <&edma1 29 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + ehrpwm0: pwm@300000 { + compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", + "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x300000 0x2000>; + status = "disabled"; + }; + ehrpwm1: pwm@302000 { + compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", + "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x302000 0x2000>; + status = "disabled"; + }; + ecap0: ecap@306000 { + compatible = "ti,da850-ecap", "ti,am3352-ecap", + "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x306000 0x80>; + status = "disabled"; + }; + ecap1: ecap@307000 { + compatible = "ti,da850-ecap", "ti,am3352-ecap", + "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x307000 0x80>; + status = "disabled"; + }; + ecap2: ecap@308000 { + compatible = "ti,da850-ecap", "ti,am3352-ecap", + "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x308000 0x80>; + status = "disabled"; + }; + spi0: spi@41000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,da830-spi"; + reg = <0x41000 0x1000>; + num-cs = <6>; + ti,davinci-spi-intr-line = <1>; + interrupts = <20>; + dmas = <&edma0 14 0>, <&edma0 15 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + spi1: spi@30e000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,da830-spi"; + reg = <0x30e000 0x1000>; + num-cs = <4>; + ti,davinci-spi-intr-line = <1>; + interrupts = <56>; + dmas = <&edma0 18 0>, <&edma0 19 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + usb0: usb@200000 { + compatible = "ti,da830-musb"; + reg = <0x200000 0x1000>; + ranges; + interrupts = <58>; + interrupt-names = "mc"; + dr_mode = "otg"; + phys = <&usb_phy 0>; + phy-names = "usb-phy"; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <1>; + + dmas = <&cppi41dma 0 0 &cppi41dma 1 0 + &cppi41dma 2 0 &cppi41dma 3 0 + &cppi41dma 0 1 &cppi41dma 1 1 + &cppi41dma 2 1 &cppi41dma 3 1>; + dma-names = + "rx1", "rx2", "rx3", "rx4", + "tx1", "tx2", "tx3", "tx4"; + + cppi41dma: dma-controller@201000 { + compatible = "ti,da830-cppi41"; + reg = <0x201000 0x1000 + 0x202000 0x1000 + 0x204000 0x4000>; + reg-names = "controller", + "scheduler", "queuemgr"; + interrupts = <58>; + #dma-cells = <2>; + #dma-channels = <4>; + status = "okay"; + }; + }; + sata: sata@218000 { + compatible = "ti,da850-ahci"; + reg = <0x218000 0x2000>, <0x22c018 0x4>; + interrupts = <67>; + status = "disabled"; + }; + mdio: mdio@224000 { + compatible = "ti,davinci_mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x224000 0x1000>; + status = "disabled"; + }; + eth0: ethernet@220000 { + compatible = "ti,davinci-dm6467-emac"; + reg = <0x220000 0x4000>; + ti,davinci-ctrl-reg-offset = <0x3000>; + ti,davinci-ctrl-mod-reg-offset = <0x2000>; + ti,davinci-ctrl-ram-offset = <0>; + ti,davinci-ctrl-ram-size = <0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <33 + 34 + 35 + 36 + >; + status = "disabled"; + }; + usb1: usb@225000 { + compatible = "ti,da830-ohci"; + reg = <0x225000 0x1000>; + interrupts = <59>; + phys = <&usb_phy 1>; + phy-names = "usb-phy"; + status = "disabled"; + }; + gpio: gpio@226000 { + compatible = "ti,dm6441-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x226000 0x1000>; + interrupts = <42 IRQ_TYPE_EDGE_BOTH + 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH + 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH + 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH + 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>; + ti,ngpio = <144>; + ti,davinci-gpio-unbanked = <0>; + status = "disabled"; + interrupt-controller; + #interrupt-cells = <2>; + }; + pinconf: pin-controller@22c00c { + compatible = "ti,da850-pupd"; + reg = <0x22c00c 0x8>; + status = "disabled"; + }; + + mcasp0: mcasp@100000 { + compatible = "ti,da830-mcasp-audio"; + reg = <0x100000 0x2000>, + <0x102000 0x400000>; + reg-names = "mpu", "dat"; + interrupts = <54>; + interrupt-names = "common"; + status = "disabled"; + dmas = <&edma0 1 1>, + <&edma0 0 1>; + dma-names = "tx", "rx"; + }; + + lcdc: display@213000 { + compatible = "ti,da850-tilcdc"; + reg = <0x213000 0x1000>; + interrupts = <52>; + max-pixelclock = <37500>; + status = "disabled"; + }; + }; + aemif: aemif@68000000 { + compatible = "ti,da850-aemif"; + #address-cells = <2>; + #size-cells = <1>; + + reg = <0x68000000 0x00008000>; + ranges = <0 0 0x60000000 0x08000000 + 1 0 0x68000000 0x00008000>; + status = "disabled"; + }; + memctrl: memory-controller@b0000000 { + compatible = "ti,da850-ddr-controller"; + reg = <0xb0000000 0xe8>; + status = "disabled"; + }; +}; diff --git a/arch/arm/dts/omap3.dtsi b/arch/arm/dts/omap3.dtsi index e6f9c9a6dd..56c94729bb 100644 --- a/arch/arm/dts/omap3.dtsi +++ b/arch/arm/dts/omap3.dtsi @@ -716,14 +716,12 @@ usbhsohci: ohci@48064400 { compatible = "ti,ohci-omap3"; reg = <0x48064400 0x400>; - interrupt-parent = <&intc>; interrupts = <76>; }; usbhsehci: ehci@48064800 { compatible = "ti,ehci-omap"; reg = <0x48064800 0x400>; - interrupt-parent = <&intc>; interrupts = <77>; }; }; @@ -834,7 +832,6 @@ reg-names = "tx", "rx"; - interrupt-parent = <&intc>; interrupts = <67>, <68>; }; @@ -847,7 +844,6 @@ reg-names = "tx", "rx"; - interrupt-parent = <&intc>; interrupts = <69>, <70>; }; diff --git a/arch/arm/dts/omap5-u-boot.dtsi b/arch/arm/dts/omap5-u-boot.dtsi index 2eeed6f4a0..fdaa69297c 100644 --- a/arch/arm/dts/omap5-u-boot.dtsi +++ b/arch/arm/dts/omap5-u-boot.dtsi @@ -60,10 +60,30 @@ }; }; +&gpio1 { + u-boot,dm-spl; +}; + &gpio2 { u-boot,dm-spl; }; +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&gpio6 { + u-boot,dm-spl; +}; + &gpio7 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/r8a7795-h3ulcb.dts b/arch/arm/dts/r8a7795-h3ulcb.dts index ab352159de..0426f41765 100644 --- a/arch/arm/dts/r8a7795-h3ulcb.dts +++ b/arch/arm/dts/r8a7795-h3ulcb.dts @@ -9,24 +9,16 @@ * kind, whether express or implied. */ +#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 + /dts-v1/; #include "r8a7795.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> +#include "ulcb.dtsi" / { - model = "Renesas H3ULCB board based on r8a7795"; + model = "Renesas H3ULCB board based on r8a7795 ES2.0+"; compatible = "renesas,h3ulcb", "renesas,r8a7795"; - aliases { - serial0 = &scif2; - ethernet0 = &avb; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ @@ -47,330 +39,4 @@ device_type = "memory"; reg = <0x7 0x00000000 0x0 0x40000000>; }; - - leds { - compatible = "gpio-leds"; - - led5 { - gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; - }; - led6 { - gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; - }; - }; - - keyboard { - compatible = "gpio-keys"; - - key-1 { - linux,code = <KEY_1>; - label = "SW3"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; - }; - }; - - x12_clk: x12 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; - }; - - reg_1p8v: regulator0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - audio_clkout: audio-clkout { - /* - * This is same as <&rcar_sound 0> - * but needed to avoid cs2000/rcar_sound probe dead-lock - */ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; - }; - - rsnd_ak4613: sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&sndcpu>; - simple-audio-card,frame-master = <&sndcpu>; - - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - sndcodec: simple-audio-card,codec { - sound-dai = <&ak4613>; - }; - }; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk_a"; - function = "scif_clk"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2_a"; - function = "i2c2"; - }; - - avb_pins: avb { - groups = "avb_mdc"; - function = "avb"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - sound_pins: sound { - groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; - function = "ssi"; - }; - - sound_clk_pins: sound-clk { - groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", - "audio_clkout_a", "audio_clkout3_a"; - function = "audio_clk"; - }; - - usb1_pins: usb1 { - groups = "usb1"; - function = "usb1"; - }; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - - status = "okay"; - - clock-frequency = <100000>; - - ak4613: codec@10 { - compatible = "asahi-kasei,ak4613"; - #sound-dai-cells = <0>; - reg = <0x10>; - clocks = <&rcar_sound 3>; - - asahi-kasei,in1-single-end; - asahi-kasei,in2-single-end; - asahi-kasei,out1-single-end; - asahi-kasei,out2-single-end; - asahi-kasei,out3-single-end; - asahi-kasei,out4-single-end; - asahi-kasei,out5-single-end; - asahi-kasei,out6-single-end; - }; - - cs2000: clk-multiplier@4f { - #clock-cells = <0>; - compatible = "cirrus,cs2000-cp"; - reg = <0x4f>; - clocks = <&audio_clkout>, <&x12_clk>; - clock-names = "clk_in", "ref_clk"; - - assigned-clocks = <&cs2000>; - assigned-clock-rates = <24576000>; /* 1/1 divide */ - }; -}; - -&rcar_sound { - pinctrl-0 = <&sound_pins &sound_clk_pins>; - pinctrl-names = "default"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - /* audio_clkout0/1/2/3 */ - #clock-cells = <1>; - clock-frequency = <11289600>; - - status = "okay"; - - /* update <audio_clk_b> to <cs2000> */ - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&cs2000>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A7795_CLK_S0D4>; - - rcar_sound,dai { - dai0 { - playback = <&ssi0 &src0 &dvc0>; - capture = <&ssi1 &src1 &dvc1>; - }; - }; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - /* used for on-board 8bit eMMC */ - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&ssi1 { - shared-pin; -}; - -&wdt0 { - timeout-sec = <60>; - status = "okay"; -}; - -&audio_clk_a { - clock-frequency = <22579200>; -}; - -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - renesas,no-ether-link; - phy-handle = <&phy0>; - status = "okay"; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio2>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -&usb2_phy1 { - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; }; diff --git a/arch/arm/dts/r8a7795-salvator-x.dts b/arch/arm/dts/r8a7795-salvator-x.dts index 639aa085d9..684fb3b9d1 100644 --- a/arch/arm/dts/r8a7795-salvator-x.dts +++ b/arch/arm/dts/r8a7795-salvator-x.dts @@ -8,577 +8,108 @@ * kind, whether express or implied. */ -/* - * SSI-AK4613 - * - * This command is required when Playback/Capture - * - * amixer set "DVC Out" 100% - * amixer set "DVC In" 100% - * - * You can use Mute - * - * amixer set "DVC Out Mute" on - * amixer set "DVC In Mute" on - * - * You can use Volume Ramp - * - * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" - * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" - * amixer set "DVC Out Ramp" on - * aplay xxx.wav & - * amixer set "DVC Out" 80% // Volume Down - * amixer set "DVC Out" 100% // Volume Up - */ +#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 /dts-v1/; #include "r8a7795.dtsi" -#include <dt-bindings/gpio/gpio.h> +#include "salvator-x.dtsi" / { - model = "Renesas Salvator-X board based on r8a7795"; + model = "Renesas Salvator-X board based on r8a7795 ES2.0+"; compatible = "renesas,salvator-x", "renesas,r8a7795"; - aliases { - serial0 = &scif2; - serial1 = &scif1; - ethernet0 = &avb; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x38000000>; }; - x12_clk: x12 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; - }; - - reg_1p8v: regulator0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - vcc_sdhi3: regulator-vcc-sdhi3 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI3 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi3: regulator-vccq-sdhi3 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI3 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + memory@500000000 { + device_type = "memory"; + reg = <0x5 0x00000000 0x0 0x40000000>; }; - vbus0_usb2: regulator-vbus0-usb2 { - compatible = "regulator-fixed"; - - regulator-name = "USB20_VBUS0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - - gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; - enable-active-high; + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; }; - audio_clkout: audio_clkout { - /* - * This is same as <&rcar_sound 0> - * but needed to avoid cs2000/rcar_sound probe dead-lock - */ - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; + memory@700000000 { + device_type = "memory"; + reg = <0x7 0x00000000 0x0 0x40000000>; }; +}; - rsnd_ak4613: sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&sndcpu>; - simple-audio-card,frame-master = <&sndcpu>; - - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - sndcodec: simple-audio-card,codec { - sound-dai = <&ak4613>; - }; - }; +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, + <&cpg CPG_MOD 721>, + <&cpg CPG_MOD 727>, + <&versaclock5 1>, + <&x21_clk>, + <&x22_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; +}; - vga-encoder { - compatible = "adi,adv7123"; +&ehci2 { + status = "okay"; +}; - ports { - #address-cells = <1>; - #size-cells = <0>; +&hdmi0 { + status = "okay"; - port@0 { - reg = <0>; - adv7123_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - port@1 { - reg = <1>; - adv7123_out: endpoint { - remote-endpoint = <&vga_in>; - }; + ports { + port@1 { + reg = <1>; + rcar_dw_hdmi0_out: endpoint { + remote-endpoint = <&hdmi0_con>; }; }; }; +}; - vga { - compatible = "vga-connector"; - - port { - vga_in: endpoint { - remote-endpoint = <&adv7123_out>; - }; - }; - }; +&hdmi0_con { + remote-endpoint = <&rcar_dw_hdmi0_out>; }; -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; +&hdmi1 { status = "okay"; ports { - port@0 { - endpoint { - remote-endpoint = <&adv7123_in>; - }; - }; - port@3 { - lvds_connector: endpoint { + port@1 { + reg = <1>; + rcar_dw_hdmi1_out: endpoint { + remote-endpoint = <&hdmi1_con>; }; }; }; }; -&extal_clk { - clock-frequency = <16666666>; +&hdmi1_con { + remote-endpoint = <&rcar_dw_hdmi1_out>; }; -&extalr_clk { - clock-frequency = <32768>; +&ohci2 { + status = "okay"; }; &pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - scif1_pins: scif1 { - groups = "scif1_data_a", "scif1_ctrl"; - function = "scif1"; - }; - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - scif_clk_pins: scif_clk { - groups = "scif_clk_a"; - function = "scif_clk"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2_a"; - function = "i2c2"; - }; - - avb_pins: avb { - mux { - groups = "avb_link", "avb_phy_int", "avb_mdc", - "avb_mii"; - function = "avb"; - }; - - pins_mdc { - groups = "avb_mdc"; - drive-strength = <24>; - }; - - pins_mii_tx { - pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", - "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; - drive-strength = <12>; - }; - }; - - du_pins: du { - groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; - function = "du"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - sdhi3_pins: sd3 { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <3300>; - }; - - sdhi3_pins_uhs: sd3_uhs { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <1800>; - }; - - sound_pins: sound { - groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; - function = "ssi"; - }; - - sound_clk_pins: sound_clk { - groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", - "audio_clkout_a", "audio_clkout3_a"; - function = "audio_clk"; - }; - - usb0_pins: usb0 { - groups = "usb0"; - function = "usb0"; - }; - - usb1_pins: usb1 { - mux { - groups = "usb1"; - function = "usb1"; - }; - - ovc { - pins = "GP_6_27"; - bias-pull-up; - }; - - pwen { - pins = "GP_6_26"; - bias-pull-down; - }; - }; - usb2_pins: usb2 { groups = "usb2"; function = "usb2"; }; }; -&scif1 { - pinctrl-0 = <&scif1_pins>; - pinctrl-names = "default"; - - uart-has-rtscts; - status = "okay"; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - - status = "okay"; - - clock-frequency = <100000>; - - ak4613: codec@10 { - compatible = "asahi-kasei,ak4613"; - #sound-dai-cells = <0>; - reg = <0x10>; - clocks = <&rcar_sound 3>; - - asahi-kasei,in1-single-end; - asahi-kasei,in2-single-end; - asahi-kasei,out1-single-end; - asahi-kasei,out2-single-end; - asahi-kasei,out3-single-end; - asahi-kasei,out4-single-end; - asahi-kasei,out5-single-end; - asahi-kasei,out6-single-end; - }; - - cs2000: clk_multiplier@4f { - #clock-cells = <0>; - compatible = "cirrus,cs2000-cp"; - reg = <0x4f>; - clocks = <&audio_clkout>, <&x12_clk>; - clock-names = "clk_in", "ref_clk"; - - assigned-clocks = <&cs2000>; - assigned-clock-rates = <24576000>; /* 1/1 divide */ - }; -}; - -&rcar_sound { - pinctrl-0 = <&sound_pins &sound_clk_pins>; - pinctrl-names = "default"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - /* audio_clkout0/1/2/3 */ - #clock-cells = <1>; - clock-frequency = <11289600>; - - status = "okay"; - - /* update <audio_clk_b> to <cs2000> */ - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&cs2000>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A7795_CLK_S0D4>; - - rcar_sound,dai { - dai0 { - playback = <&ssi0 &src0 &dvc0>; - capture = <&ssi1 &src1 &dvc1>; - }; - }; -}; - &sata { status = "okay"; }; -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - /* used for on-board 8bit eMMC */ - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&sdhi3 { - pinctrl-0 = <&sdhi3_pins>; - pinctrl-1 = <&sdhi3_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi3>; - vqmmc-supply = <&vccq_sdhi3>; - cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&ssi1 { - shared-pin; -}; - -&wdt0 { - timeout-sec = <60>; - status = "okay"; -}; - -&audio_clk_a { - clock-frequency = <22579200>; -}; - -&i2c_dvfs { - status = "okay"; -}; - -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - renesas,no-ether-link; - phy-handle = <&phy0>; - status = "okay"; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio2>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -&xhci0 { - status = "okay"; -}; - -&usb2_phy0 { - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; - - vbus-supply = <&vbus0_usb2>; - status = "okay"; -}; - -&usb2_phy1 { - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - &usb2_phy2 { pinctrl-0 = <&usb2_pins>; pinctrl-names = "default"; status = "okay"; }; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&ehci2 { - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&ohci2 { - status = "okay"; -}; - -&hsusb { - status = "okay"; -}; - -&pcie_bus_clk { - clock-frequency = <100000000>; -}; - -&pciec0 { - status = "okay"; -}; - -&pciec1 { - status = "okay"; -}; diff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a7795.dtsi index 110d0681c8..615b652131 100644 --- a/arch/arm/dts/r8a7795.dtsi +++ b/arch/arm/dts/r8a7795.dtsi @@ -184,7 +184,7 @@ clock-frequency = <0>; }; - soc { + soc: soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -402,7 +402,7 @@ #power-domain-cells = <1>; }; - pfc: pfc@e6060000 { + pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a7795"; reg = <0 0xe6060000 0 0x50c>; }; @@ -887,6 +887,8 @@ clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 926>; + dmas = <&dmac0 0x11>, <&dmac0 0x10>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -1122,6 +1124,16 @@ "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 1005>, + <&cpg 1006>, <&cpg 1007>, + <&cpg 1008>, <&cpg 1009>, + <&cpg 1010>, <&cpg 1011>, + <&cpg 1012>, <&cpg 1013>, + <&cpg 1014>, <&cpg 1015>; + reset-names = "ssi-all", + "ssi.9", "ssi.8", "ssi.7", "ssi.6", + "ssi.5", "ssi.4", "ssi.3", "ssi.2", + "ssi.1", "ssi.0"; status = "disabled"; rcar_sound,dvc { @@ -1278,16 +1290,6 @@ status = "disabled"; }; - xhci1: usb@ee0400000 { - compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; - reg = <0 0xee040000 0 0xc00>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 327>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 327>; - status = "disabled"; - }; - usb_dmac0: dma-controller@e65a0000 { compatible = "renesas,r8a7795-usb-dmac", "renesas,usb-dmac"; @@ -1572,14 +1574,6 @@ resets = <&cpg 614>; }; - fcpf2: fcp@fe952000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe952000 0 0x200>; - clocks = <&cpg CPG_MOD 613>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 613>; - }; - vspbd: vsp@fe960000 { compatible = "renesas,vsp2"; reg = <0 0xfe960000 0 0x8000>; @@ -1637,25 +1631,6 @@ resets = <&cpg 610>; }; - vspi2: vsp@fe9c0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9c0000 0 0x8000>; - interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 629>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 629>; - - renesas,fcp = <&fcpvi2>; - }; - - fcpvi2: fcp@fe9cf000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9cf000 0 0x200>; - clocks = <&cpg CPG_MOD 609>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 609>; - }; - vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; reg = <0 0xfea20000 0 0x4000>; @@ -1713,25 +1688,6 @@ resets = <&cpg 601>; }; - vspd3: vsp@fea38000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea38000 0 0x4000>; - interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 620>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 620>; - - renesas,fcp = <&fcpvd3>; - }; - - fcpvd3: fcp@fea3f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea3f000 0 0x200>; - clocks = <&cpg CPG_MOD 600>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 600>; - }; - fdp1@fe940000 { compatible = "renesas,fdp1"; reg = <0 0xfe940000 0 0x2400>; @@ -1752,18 +1708,57 @@ renesas,fcp = <&fcpf1>; }; - fdp1@fe948000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe948000 0 0x2400>; - interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 117>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 117>; - renesas,fcp = <&fcpf2>; + hdmi0: hdmi0@fead0000 { + compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; + reg = <0 0xfead0000 0 0x10000>; + interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; + clock-names = "iahb", "isfr"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 729>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dw_hdmi0_in: endpoint { + remote-endpoint = <&du_out_hdmi0>; + }; + }; + port@1 { + reg = <1>; + }; + }; + }; + + hdmi1: hdmi1@feae0000 { + compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; + reg = <0 0xfeae0000 0 0x10000>; + interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; + clock-names = "iahb", "isfr"; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 728>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dw_hdmi1_in: endpoint { + remote-endpoint = <&du_out_hdmi1>; + }; + }; + port@1 { + reg = <1>; + }; + }; }; du: display@feb00000 { - compatible = "renesas,du-r8a7795"; reg = <0 0xfeb00000 0 0x80000>, <0 0xfeb90000 0 0x14>; reg-names = "du", "lvds.0"; @@ -1779,8 +1774,6 @@ clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0"; status = "disabled"; - vsps = <&vspd0 &vspd1 &vspd2 &vspd3>; - ports { #address-cells = <1>; #size-cells = <0>; @@ -1793,11 +1786,13 @@ port@1 { reg = <1>; du_out_hdmi0: endpoint { + remote-endpoint = <&dw_hdmi0_in>; }; }; port@2 { reg = <2>; du_out_hdmi1: endpoint { + remote-endpoint = <&dw_hdmi1_in>; }; }; port@3 { diff --git a/arch/arm/dts/r8a7796-m3ulcb.dts b/arch/arm/dts/r8a7796-m3ulcb.dts index 372b2a9447..38b58b7fca 100644 --- a/arch/arm/dts/r8a7796-m3ulcb.dts +++ b/arch/arm/dts/r8a7796-m3ulcb.dts @@ -9,180 +9,24 @@ * kind, whether express or implied. */ +#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 + /dts-v1/; #include "r8a7796.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> +#include "ulcb.dtsi" / { model = "Renesas M3ULCB board based on r8a7796"; compatible = "renesas,m3ulcb", "renesas,r8a7796"; - aliases { - serial0 = &scif2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x38000000>; }; - leds { - compatible = "gpio-leds"; - - led5 { - gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; - }; - led6 { - gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; - }; - }; - - keyboard { - compatible = "gpio-keys"; - - key-1 { - linux,code = <KEY_1>; - label = "SW3"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; - }; - }; - - reg_1p8v: regulator0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk_a"; - function = "scif_clk"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; }; }; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - /* used for on-board 8bit eMMC */ - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&wdt0 { - timeout-sec = <60>; - status = "okay"; -}; diff --git a/arch/arm/dts/r8a7796-salvator-x.dts b/arch/arm/dts/r8a7796-salvator-x.dts index c9f59b6ce3..db4f162d6b 100644 --- a/arch/arm/dts/r8a7796-salvator-x.dts +++ b/arch/arm/dts/r8a7796-salvator-x.dts @@ -8,25 +8,16 @@ * kind, whether express or implied. */ +#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 + /dts-v1/; #include "r8a7796.dtsi" -#include <dt-bindings/gpio/gpio.h> +#include "salvator-x.dtsi" / { model = "Renesas Salvator-X board based on r8a7796"; compatible = "renesas,salvator-x", "renesas,r8a7796"; - aliases { - serial0 = &scif2; - serial1 = &scif1; - ethernet0 = &avb; - }; - - chosen { - bootargs = "ignore_loglevel"; - stdout-path = "serial0:115200n8"; - }; - memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ @@ -37,233 +28,4 @@ device_type = "memory"; reg = <0x6 0x00000000 0x0 0x80000000>; }; - - reg_1p8v: regulator0 { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator1 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - vcc_sdhi3: regulator-vcc-sdhi3 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI3 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi3: regulator-vccq-sdhi3 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI3 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - avb_pins: avb { - groups = "avb_mdc"; - function = "avb"; - }; - - scif1_pins: scif1 { - groups = "scif1_data_a", "scif1_ctrl"; - function = "scif1"; - }; - - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - scif_clk_pins: scif_clk { - groups = "scif_clk_a"; - function = "scif_clk"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2_a"; - function = "i2c2"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data8", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - sdhi3_pins: sd3 { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <3300>; - }; - - sdhi3_pins_uhs: sd3_uhs { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <1800>; - }; -}; - -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - renesas,no-ether-link; - phy-handle = <&phy0>; - status = "okay"; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio2>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - /* used for on-board 8bit eMMC */ - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&sdhi3 { - pinctrl-0 = <&sdhi3_pins>; - pinctrl-1 = <&sdhi3_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi3>; - vqmmc-supply = <&vccq_sdhi3>; - cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; - bus-width = <4>; - sd-uhs-sdr50; - status = "okay"; -}; - -&scif1 { - pinctrl-0 = <&scif1_pins>; - pinctrl-names = "default"; - - uart-has-rtscts; - status = "okay"; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&wdt0 { - timeout-sec = <60>; - status = "okay"; -}; - -&i2c_dvfs { - status = "okay"; }; diff --git a/arch/arm/dts/r8a7796.dtsi b/arch/arm/dts/r8a7796.dtsi index 298df5db9f..9e6a5f231e 100644 --- a/arch/arm/dts/r8a7796.dtsi +++ b/arch/arm/dts/r8a7796.dtsi @@ -122,6 +122,29 @@ u-boot,dm-pre-reloc; }; + /* + * The external audio clocks are configured as 0 Hz fixed frequency + * clocks by default. + * Boards that provide audio clocks should override them. + */ + audio_clk_a: audio_clk_a { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + audio_clk_b: audio_clk_b { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + audio_clk_c: audio_clk_c { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + /* External CAN clock - to be overridden by boards that provide it */ can_clk: can { compatible = "fixed-clock"; @@ -136,6 +159,13 @@ clock-frequency = <0>; }; + /* External PCIe clock - can be overridden by the board */ + pcie_bus_clk: pcie_bus { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -366,6 +396,78 @@ clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 926>; + dmas = <&dmac0 0x11>, <&dmac0 0x10>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + pwm0: pwm@e6e30000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e30000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm1: pwm@e6e31000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e31000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm2: pwm@e6e32000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e32000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm3: pwm@e6e33000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e33000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm4: pwm@e6e34000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e34000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm5: pwm@e6e35000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e35000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + pwm6: pwm@e6e36000 { + compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; + reg = <0 0xe6e36000 0 8>; + #pwm-cells = <2>; + clocks = <&cpg CPG_MOD 523>; + resets = <&cpg 523>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; @@ -935,6 +1037,153 @@ dma-channels = <16>; }; + audma0: dma-controller@ec700000 { + compatible = "renesas,dmac-r8a7796", + "renesas,rcar-dmac"; + reg = <0 0xec700000 0 0x10000>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 502>; + clock-names = "fck"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 502>; + #dma-cells = <1>; + dma-channels = <16>; + }; + + audma1: dma-controller@ec720000 { + compatible = "renesas,dmac-r8a7796", + "renesas,rcar-dmac"; + reg = <0 0xec720000 0 0x10000>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&cpg CPG_MOD 501>; + clock-names = "fck"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 501>; + #dma-cells = <1>; + dma-channels = <16>; + }; + + hsusb: usb@e6590000 { + compatible = "renesas,usbhs-r8a7796", + "renesas,rcar-gen3-usbhs"; + reg = <0 0xe6590000 0 0x100>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 704>; + renesas,buswait = <11>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 704>; + status = "disabled"; + }; + + xhci0: usb@ee000000 { + compatible = "renesas,xhci-r8a7796", "renesas,rcar-gen3-xhci"; + reg = <0 0xee000000 0 0xc00>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 328>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 328>; + status = "disabled"; + }; + + ohci0: usb@ee080000 { + /* placeholder */ + }; + + ehci0: usb@ee080100 { + compatible = "generic-ehci"; + reg = <0 0xee080100 0 0x100>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + usb2_phy0: usb-phy@ee080200 { + compatible = "renesas,usb2-phy-r8a7796", + "renesas,rcar-gen3-usb2-phy"; + reg = <0 0xee080200 0 0x700>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 703>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 703>; + #phy-cells = <0>; + status = "disabled"; + }; + + ohci1: usb@ee0a0000 { + /* placeholder */ + }; + + ehci1: usb@ee0a0100 { + compatible = "generic-ehci"; + reg = <0 0xee0a0100 0 0x100>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 702>; + phys = <&usb2_phy1>; + phy-names = "usb"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 702>; + status = "disabled"; + }; + + usb2_phy1: usb-phy@ee0a0200 { + compatible = "renesas,usb2-phy-r8a7796", + "renesas,rcar-gen3-usb2-phy"; + reg = <0 0xee0a0200 0 0x700>; + clocks = <&cpg CPG_MOD 702>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 702>; + #phy-cells = <0>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a7796"; reg = <0 0xee100000 0 0x2000>; @@ -1037,5 +1286,224 @@ }; }; }; + + rcar_sound: sound@ec500000 { + /* + * #sound-dai-cells is required + * + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; + */ + /* + * #clock-cells is required for audio_clkout0/1/2/3 + * + * clkout : #clock-cells = <0>; <&rcar_sound>; + * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; + */ + compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; + reg = <0 0xec500000 0 0x1000>, /* SCU */ + <0 0xec5a0000 0 0x100>, /* ADG */ + <0 0xec540000 0 0x1000>, /* SSIU */ + <0 0xec541000 0 0x280>, /* SSI */ + <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ + reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; + + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&audio_clk_a>, <&audio_clk_b>, + <&audio_clk_c>, + <&cpg CPG_CORE R8A7796_CLK_S0D4>; + clock-names = "ssi-all", + "ssi.9", "ssi.8", "ssi.7", "ssi.6", + "ssi.5", "ssi.4", "ssi.3", "ssi.2", + "ssi.1", "ssi.0", + "src.9", "src.8", "src.7", "src.6", + "src.5", "src.4", "src.3", "src.2", + "src.1", "src.0", + "mix.1", "mix.0", + "ctu.1", "ctu.0", + "dvc.0", "dvc.1", + "clk_a", "clk_b", "clk_c", "clk_i"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 1005>, + <&cpg 1006>, <&cpg 1007>, + <&cpg 1008>, <&cpg 1009>, + <&cpg 1010>, <&cpg 1011>, + <&cpg 1012>, <&cpg 1013>, + <&cpg 1014>, <&cpg 1015>; + reset-names = "ssi-all", + "ssi.9", "ssi.8", "ssi.7", "ssi.6", + "ssi.5", "ssi.4", "ssi.3", "ssi.2", + "ssi.1", "ssi.0"; + status = "disabled"; + + rcar_sound,dvc { + dvc0: dvc-0 { + dmas = <&audma1 0xbc>; + dma-names = "tx"; + }; + dvc1: dvc-1 { + dmas = <&audma1 0xbe>; + dma-names = "tx"; + }; + }; + + rcar_sound,mix { + mix0: mix-0 { }; + mix1: mix-1 { }; + }; + + rcar_sound,ctu { + ctu00: ctu-0 { }; + ctu01: ctu-1 { }; + ctu02: ctu-2 { }; + ctu03: ctu-3 { }; + ctu10: ctu-4 { }; + ctu11: ctu-5 { }; + ctu12: ctu-6 { }; + ctu13: ctu-7 { }; + }; + + rcar_sound,src { + src0: src-0 { + interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x85>, <&audma1 0x9a>; + dma-names = "rx", "tx"; + }; + src1: src-1 { + interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x87>, <&audma1 0x9c>; + dma-names = "rx", "tx"; + }; + src2: src-2 { + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x89>, <&audma1 0x9e>; + dma-names = "rx", "tx"; + }; + src3: src-3 { + interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x8b>, <&audma1 0xa0>; + dma-names = "rx", "tx"; + }; + src4: src-4 { + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x8d>, <&audma1 0xb0>; + dma-names = "rx", "tx"; + }; + src5: src-5 { + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x8f>, <&audma1 0xb2>; + dma-names = "rx", "tx"; + }; + src6: src-6 { + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x91>, <&audma1 0xb4>; + dma-names = "rx", "tx"; + }; + src7: src-7 { + interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x93>, <&audma1 0xb6>; + dma-names = "rx", "tx"; + }; + src8: src-8 { + interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x95>, <&audma1 0xb8>; + dma-names = "rx", "tx"; + }; + src9: src-9 { + interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x97>, <&audma1 0xba>; + dma-names = "rx", "tx"; + }; + }; + + rcar_sound,ssi { + ssi0: ssi-0 { + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi1: ssi-1 { + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi2: ssi-2 { + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi3: ssi-3 { + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi4: ssi-4 { + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi5: ssi-5 { + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi6: ssi-6 { + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi7: ssi-7 { + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi8: ssi-8 { + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + ssi9: ssi-9 { + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; + dma-names = "rx", "tx", "rxu", "txu"; + }; + }; + }; + + pciec0: pcie@fe000000 { + /* placeholder */ + }; + + pciec1: pcie@ee800000 { + /* placeholder */ + }; + + du: display@feb00000 { + /* placeholder */ + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_rgb: endpoint { + }; + }; + }; + }; }; }; diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts index 64f1c2d7da..ae0b0a4b8e 100644 --- a/arch/arm/dts/rk3229-evb.dts +++ b/arch/arm/dts/rk3229-evb.dts @@ -40,7 +40,6 @@ }; &dmc { - rockchip,sdram-channel = /bits/ 8 <1 10 3 2 1 0 15 15>; rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3 0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4 0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1 diff --git a/arch/arm/dts/rk3288-popmetal.dtsi b/arch/arm/dts/rk3288-popmetal.dtsi index dd6ce8b69e..63785eb55e 100644 --- a/arch/arm/dts/rk3288-popmetal.dtsi +++ b/arch/arm/dts/rk3288-popmetal.dtsi @@ -491,6 +491,10 @@ }; }; +&saradc { + status = "okay"; +}; + &tsadc { rockchip,hw-tshut-mode = <0>; rockchip,hw-tshut-polarity = <0>; diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts index 8a14c653e4..3dd9d81961 100644 --- a/arch/arm/dts/rk3328-evb.dts +++ b/arch/arm/dts/rk3328-evb.dts @@ -42,6 +42,10 @@ }; }; +&saradc { + status = "okay"; +}; + &uart2 { status = "okay"; }; @@ -87,3 +91,121 @@ vbus-supply = <&vcc5v0_host_xhci>; status = "okay"; }; + +&i2c1 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + rk805: pmic@18 { + compatible = "rockchip,rk805"; + status = "okay"; + reg = <0x18>; + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + gpio-controller; + #gpio-cells = <2>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk805-clkout2"; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <6001>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <6001>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd_18: LDO_REG1 { + regulator-name = "vdd_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_18emmc: LDO_REG2 { + regulator-name = "vcc_18emmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-name = "vdd_10"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-boot-on; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + }; + }; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio2_a6 */ + }; + }; +}; + diff --git a/arch/arm/dts/rk3368-px5-evb.dts b/arch/arm/dts/rk3368-px5-evb.dts index c7478f7ddb..e9c5ebad47 100644 --- a/arch/arm/dts/rk3368-px5-evb.dts +++ b/arch/arm/dts/rk3368-px5-evb.dts @@ -296,6 +296,10 @@ }; }; +&saradc { + status = "okay"; +}; + &tsadc { status = "okay"; rockchip,hw-tshut-mode = <0>; /* CRU */ diff --git a/arch/arm/dts/rk3368-sheep.dts b/arch/arm/dts/rk3368-sheep.dts index 7c190f7456..27befadd67 100644 --- a/arch/arm/dts/rk3368-sheep.dts +++ b/arch/arm/dts/rk3368-sheep.dts @@ -260,6 +260,10 @@ }; }; +&saradc { + status = "okay"; +}; + &tsadc { status = "okay"; rockchip,hw-tshut-mode = <0>; /* CRU */ diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index be0c6d98bd..0e5d8d79a1 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -149,6 +149,10 @@ status = "okay"; }; +&saradc { + status = "okay"; +}; + &sdmmc { bus-width = <4>; status = "okay"; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index a04878e223..65ab380139 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -20,7 +20,8 @@ chosen { stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc; + u-boot,spl-boot-order = \ + "same-as-spl", &spiflash, &sdhci, &sdmmc; }; aliases { @@ -100,6 +101,24 @@ regulator-max-microvolt = <3300000>; }; + /* + * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module + * eMMC and SPI flash powered-down initially (in fact it keeps the + * reset signal asserted). Even though it is an enable signal, we + * model this as a regulator. + */ + bios_enable: bios_enable { + compatible = "regulator-fixed"; + u-boot,dm-pre-reloc; + regulator-name = "bios_enable"; + enable-active-low; + gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + vccadc_ref: vccadc-ref { compatible = "regulator-fixed"; regulator-name = "vcc1v8_sys"; @@ -458,7 +477,7 @@ }; &pcie_phy { - status = "okay"; + status = "okay"; }; &pmu_io_domains { @@ -485,7 +504,7 @@ }; &sdmmc { - u-boot,dm-pre-reloc; + u-boot,dm-pre-reloc; clock-frequency = <150000000>; clock-freq-min-max = <100000 150000000>; supports-sd; @@ -532,10 +551,15 @@ status = "okay"; }; +&gpio3 { + u-boot,dm-pre-reloc; +}; + &pinctrl { /* Pins that are not explicitely used by any devices */ pinctrl-names = "default"; pinctrl-0 = <&puma_pin_hog>; + hog { puma_pin_hog: puma_pin_hog { rockchip,pins = @@ -575,7 +599,7 @@ i2c8 { i2c8_xfer_a: i2c8-xfer { rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>, - <1 20 RK_FUNC_1 &pcfg_pull_up>; + <1 20 RK_FUNC_1 &pcfg_pull_up>; }; }; }; @@ -651,4 +675,3 @@ &spi5 { status = "okay"; }; - diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts index 2b221b6d61..8e857b2c89 100644 --- a/arch/arm/dts/rv1108-evb.dts +++ b/arch/arm/dts/rv1108-evb.dts @@ -39,6 +39,10 @@ snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>; }; +&saradc { + status = "okay"; +}; + &sfc { status = "okay"; flash@0 { diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi index 3153dfe658..31b4d93b07 100644 --- a/arch/arm/dts/rv1108.dtsi +++ b/arch/arm/dts/rv1108.dtsi @@ -126,6 +126,17 @@ reg = <0x10300000 0x1000>; }; + saradc: saradc@1038c000 { + compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc"; + reg = <0x1038c000 0x100>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + clock-frequency = <1000000>; + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + status = "disabled"; + }; + pmugrf: syscon@20060000 { compatible = "rockchip,rv1108-pmugrf", "syscon"; reg = <0x20060000 0x1000>; diff --git a/arch/arm/dts/salvator-common.dtsi b/arch/arm/dts/salvator-common.dtsi new file mode 100644 index 0000000000..ce06a7cbd5 --- /dev/null +++ b/arch/arm/dts/salvator-common.dtsi @@ -0,0 +1,639 @@ +/* + * Device Tree Source for common parts of Salvator-X board variants + * + * Copyright (C) 2015-2016 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/* + * SSI-AK4613 + * + * This command is required when Playback/Capture + * + * amixer set "DVC Out" 100% + * amixer set "DVC In" 100% + * + * You can use Mute + * + * amixer set "DVC Out Mute" on + * amixer set "DVC In Mute" on + * + * You can use Volume Ramp + * + * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" + * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" + * amixer set "DVC Out Ramp" on + * aplay xxx.wav & + * amixer set "DVC Out" 80% // Volume Down + * amixer set "DVC Out" 100% // Volume Up + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + aliases { + serial0 = &scif2; + serial1 = &scif1; + ethernet0 = &avb; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + stdout-path = "serial0:115200n8"; + }; + + audio_clkout: audio-clkout { + /* + * This is same as <&rcar_sound 0> + * but needed to avoid cs2000/rcar_sound probe dead-lock + */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <11289600>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 50000>; + + brightness-levels = <256 128 64 16 8 4 0>; + default-brightness-level = <6>; + + enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + }; + + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + rsnd_ak4613: sound { + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec { + sound-dai = <&ak4613>; + }; + }; + + vbus0_usb2: regulator-vbus0-usb2 { + compatible = "regulator-fixed"; + + regulator-name = "USB20_VBUS0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi3: regulator-vcc-sdhi3 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi3: regulator-vccq-sdhi3 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI3 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + hdmi0-out { + compatible = "hdmi-connector"; + label = "HDMI0 OUT"; + type = "a"; + + port { + hdmi0_con: endpoint { + }; + }; + }; + + hdmi1-out { + compatible = "hdmi-connector"; + label = "HDMI1 OUT"; + type = "a"; + + port { + hdmi1_con: endpoint { + }; + }; + }; + + vga { + compatible = "vga-connector"; + + port { + vga_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + + vga-encoder { + compatible = "adi,adv7123"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_in>; + }; + }; + }; + }; + + x12_clk: x12 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; + + /* External DU dot clocks */ + x21_clk: x21-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33000000>; + }; + + x22_clk: x22-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <33000000>; + }; + + x23_clk: x23-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; +}; + +&audio_clk_a { + clock-frequency = <22579200>; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&du { + pinctrl-0 = <&du_pins>; + pinctrl-names = "default"; + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + port@3 { + lvds_connector: endpoint { + }; + }; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&hsusb { + status = "okay"; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + + status = "okay"; + + clock-frequency = <100000>; + + ak4613: codec@10 { + compatible = "asahi-kasei,ak4613"; + #sound-dai-cells = <0>; + reg = <0x10>; + clocks = <&rcar_sound 3>; + + asahi-kasei,in1-single-end; + asahi-kasei,in2-single-end; + asahi-kasei,out1-single-end; + asahi-kasei,out2-single-end; + asahi-kasei,out3-single-end; + asahi-kasei,out4-single-end; + asahi-kasei,out5-single-end; + asahi-kasei,out6-single-end; + }; + + cs2000: clk_multiplier@4f { + #clock-cells = <0>; + compatible = "cirrus,cs2000-cp"; + reg = <0x4f>; + clocks = <&audio_clkout>, <&x12_clk>; + clock-names = "clk_in", "ref_clk"; + + assigned-clocks = <&cs2000>; + assigned-clock-rates = <24576000>; /* 1/1 divide */ + }; +}; + +&i2c4 { + status = "okay"; + + csa_vdd: adc@7c { + compatible = "maxim,max9611"; + reg = <0x7c>; + + shunt-resistor-micro-ohms = <5000>; + }; + + csa_dvfs: adc@7f { + compatible = "maxim,max9611"; + reg = <0x7f>; + + shunt-resistor-micro-ohms = <5000>; + }; +}; + +&i2c_dvfs { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; +}; + +&pciec0 { + status = "okay"; +}; + +&pciec1 { + status = "okay"; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + avb_pins: avb { + mux { + groups = "avb_link", "avb_phy_int", "avb_mdc", + "avb_mii"; + function = "avb"; + }; + + pins_mdc { + groups = "avb_mdc"; + drive-strength = <24>; + }; + + pins_mii_tx { + pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", + "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; + drive-strength = <12>; + }; + }; + + du_pins: du { + groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; + function = "du"; + }; + + i2c2_pins: i2c2 { + groups = "i2c2_a"; + function = "i2c2"; + }; + + pwm1_pins: pwm1 { + groups = "pwm1_a"; + function = "pwm1"; + }; + + scif1_pins: scif1 { + groups = "scif1_data_a", "scif1_ctrl"; + function = "scif1"; + }; + + scif2_pins: scif2 { + groups = "scif2_data_a"; + function = "scif2"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_a"; + function = "scif_clk"; + }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; + + sdhi3_pins: sd3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <3300>; + }; + + sdhi3_pins_uhs: sd3_uhs { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <1800>; + }; + + sound_pins: sound { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + sound_clk_pins: sound_clk { + groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", + "audio_clkout_a", "audio_clkout3_a"; + function = "audio_clk"; + }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + usb1_pins: usb1 { + mux { + groups = "usb1"; + function = "usb1"; + }; + + ovc { + pins = "GP_6_27"; + bias-pull-up; + }; + + pwen { + pins = "GP_6_26"; + bias-pull-down; + }; + }; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; + + /* Single DAI */ + #sound-dai-cells = <0>; + + /* audio_clkout0/1/2/3 */ + #clock-cells = <1>; + clock-frequency = <12288000 11289600>; + + status = "okay"; + + /* update <audio_clk_b> to <cs2000> */ + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&audio_clk_a>, <&cs2000>, + <&audio_clk_c>, + <&cpg CPG_CORE CPG_AUDIO_CLK_I>; + + rcar_sound,dai { + dai0 { + playback = <&ssi0 &src0 &dvc0>; + capture = <&ssi1 &src1 &dvc1>; + }; + }; +}; + +&scif1 { + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + + uart-has-rtscts; + status = "okay"; +}; + +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "okay"; + + max-frequency = <208000000>; +}; + +&sdhi2 { + /* used for on-board 8bit eMMC */ + pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + status = "okay"; + + max-frequency = <200000000>; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins>; + pinctrl-1 = <&sdhi3_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi3>; + vqmmc-supply = <&vccq_sdhi3>; + cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "okay"; + + max-frequency = <208000000>; +}; + +&ssi1 { + shared-pin; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + vbus-supply = <&vbus0_usb2>; + status = "okay"; +}; + +&usb2_phy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; + +&xhci0 { + status = "okay"; +}; diff --git a/arch/arm/dts/salvator-x.dtsi b/arch/arm/dts/salvator-x.dtsi new file mode 100644 index 0000000000..468868c8ed --- /dev/null +++ b/arch/arm/dts/salvator-x.dtsi @@ -0,0 +1,30 @@ +/* + * Device Tree Source for the Salvator-X board + * + * Copyright (C) 2015-2016 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "salvator-common.dtsi" + +/ { + model = "Renesas Salvator-X board"; + compatible = "renesas,salvator-x"; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&i2c4 { + versaclock5: clock-generator@6a { + compatible = "idt,5p49v5923"; + reg = <0x6a>; + #clock-cells = <1>; + clocks = <&x23_clk>; + clock-names = "xin"; + }; +}; diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index b02a602378..7520446dc1 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -69,6 +69,13 @@ #size-cells = <1>; u-boot,dm-pre-reloc; + hlcdc: hlcdc@f0000000 { + compatible = "atmel,at91sam9x5-hlcdc"; + reg = <0xf0000000 0x2000>; + clocks = <&lcdc_clk>; + status = "disabled"; + }; + pmc: pmc@f0014000 { compatible = "atmel,sama5d2-pmc", "syscon"; reg = <0xf0014000 0x160>; diff --git a/arch/arm/dts/sama5d36ek_cmp.dts b/arch/arm/dts/sama5d36ek_cmp.dts index be41490f63..c17bc9f0dc 100644 --- a/arch/arm/dts/sama5d36ek_cmp.dts +++ b/arch/arm/dts/sama5d36ek_cmp.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "sama5d36.dtsi" #include "sama5d3xmb_cmp.dtsi" +#include "sama5d3xdm.dtsi" / { model = "Atmel SAMA5D36-EK"; diff --git a/arch/arm/dts/sama5d3_lcd.dtsi b/arch/arm/dts/sama5d3_lcd.dtsi index 14d7c2bc75..10fb3a97ea 100644 --- a/arch/arm/dts/sama5d3_lcd.dtsi +++ b/arch/arm/dts/sama5d3_lcd.dtsi @@ -14,31 +14,12 @@ ahb { apb { hlcdc: hlcdc@f0030000 { - compatible = "atmel,sama5d3-hlcdc"; + compatible = "atmel,at91sam9x5-hlcdc"; reg = <0xf0030000 0x2000>; interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; clock-names = "periph_clk","sys_clk", "slow_clk"; status = "disabled"; - - hlcdc-display-controller { - compatible = "atmel,hlcdc-display-controller"; - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - }; - }; - - hlcdc_pwm: hlcdc-pwm { - compatible = "atmel,hlcdc-pwm"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_pwm>; - #pwm-cells = <3>; - }; }; pinctrl@fffff200 { diff --git a/arch/arm/dts/sama5d3xdm.dtsi b/arch/arm/dts/sama5d3xdm.dtsi index 035ab72b39..b3df9af2b4 100644 --- a/arch/arm/dts/sama5d3xdm.dtsi +++ b/arch/arm/dts/sama5d3xdm.dtsi @@ -10,6 +10,32 @@ / { ahb { apb { + hlcdc: hlcdc@f0030000 { + atmel,vl-bpix = <4>; + atmel,output-mode = <24>; + atmel,guard-time = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888_alt>; + status = "okay"; + u-boot,dm-pre-reloc; + + display-timings { + u-boot,dm-pre-reloc; + 800x480 { + clock-frequency = <24000000>; + hactive = <800>; + vactive = <480>; + hsync-len = <5>; + hfront-porch = <64>; + hback-porch = <64>; + vfront-porch = <22>; + vback-porch = <21>; + vsync-len = <5>; + u-boot,dm-pre-reloc; + }; + }; + }; + i2c1: i2c@f0018000 { qt1070: keyboard@1b { compatible = "qt1070"; diff --git a/arch/arm/dts/sama5d4.dtsi b/arch/arm/dts/sama5d4.dtsi index c6512ae437..8072b8a4f2 100644 --- a/arch/arm/dts/sama5d4.dtsi +++ b/arch/arm/dts/sama5d4.dtsi @@ -320,31 +320,12 @@ u-boot,dm-pre-reloc; hlcdc: hlcdc@f0000000 { - compatible = "atmel,sama5d4-hlcdc"; + compatible = "atmel,at91sam9x5-hlcdc"; reg = <0xf0000000 0x4000>; interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; clock-names = "periph_clk","sys_clk", "slow_clk"; status = "disabled"; - - hlcdc-display-controller { - compatible = "atmel,hlcdc-display-controller"; - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - }; - }; - - hlcdc_pwm: hlcdc-pwm { - compatible = "atmel,hlcdc-pwm"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcd_pwm>; - #pwm-cells = <3>; - }; }; dma1: dma-controller@f0004000 { diff --git a/arch/arm/dts/stm32h743-pinctrl.dtsi b/arch/arm/dts/stm32h743-pinctrl.dtsi index d3e11d53ab..e4f4aa579b 100644 --- a/arch/arm/dts/stm32h743-pinctrl.dtsi +++ b/arch/arm/dts/stm32h743-pinctrl.dtsi @@ -244,6 +244,32 @@ slew-rate = <3>; }; }; + + sdmmc1_pins: sdmmc@0 { + pins { + pinmux = <STM32H7_PC8_FUNC_SDMMC1_D0>, + <STM32H7_PC9_FUNC_SDMMC1_D1>, + <STM32H7_PC10_FUNC_SDMMC1_D2>, + <STM32H7_PC11_FUNC_SDMMC1_D3>, + <STM32H7_PC12_FUNC_SDMMC1_CK>, + <STM32H7_PD2_FUNC_SDMMC1_CMD>; + + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + pinctrl_sdmmc1_level_shifter: sdmmc0_ls@0 { + pins { + pinmux = <STM32H7_PB8_FUNC_SDMMC1_CKIN>, + <STM32H7_PB9_FUNC_SDMMC1_CDIR>, + <STM32H7_PC6_FUNC_SDMMC1_D0DIR>, + <STM32H7_PC7_FUNC_SDMMC1_D123DIR>; + drive-push-pull; + slew-rate = <3>; + }; + }; }; }; }; diff --git a/arch/arm/dts/stm32h743.dtsi b/arch/arm/dts/stm32h743.dtsi index 16e93089d7..d5b8d879ee 100644 --- a/arch/arm/dts/stm32h743.dtsi +++ b/arch/arm/dts/stm32h743.dtsi @@ -43,6 +43,7 @@ #include "skeleton.dtsi" #include "armv7-m.dtsi" #include <dt-bindings/clock/stm32h7-clks.h> +#include <dt-bindings/mfd/stm32h7-rcc.h> / { clocks { @@ -76,7 +77,7 @@ }; usart1: serial@40011000 { - compatible = "st,stm32h7-usart", "st,stm32h7-uart"; + compatible = "st,stm32h7-uart"; reg = <0x40011000 0x400>; interrupts = <37>; status = "disabled"; @@ -84,7 +85,7 @@ }; usart2: serial@40004400 { - compatible = "st,stm32h7-usart", "st,stm32h7-uart"; + compatible = "st,stm32h7-uart"; reg = <0x40004400 0x400>; interrupts = <38>; status = "disabled"; @@ -120,6 +121,18 @@ compatible = "fixed-clock"; clock-frequency = <4000000>; }; + + sdmmc1: sdmmc@52007000 { + compatible = "st,stm32-sdmmc2"; + reg = <0x52007000 0x1000>; + interrupts = <49>; + clocks = <&rcc SDMMC1_CK>; + resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>; + st,idma = <1>; + cap-sd-highspeed; + cap-mmc-highspeed; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/stm32h743i-disco.dts b/arch/arm/dts/stm32h743i-disco.dts index bef7e90f20..917a859a09 100644 --- a/arch/arm/dts/stm32h743i-disco.dts +++ b/arch/arm/dts/stm32h743i-disco.dts @@ -60,6 +60,7 @@ aliases { serial0 = &usart2; + mmc0 = &sdmmc1; gpio0 = &gpioa; gpio1 = &gpiob; gpio2 = &gpioc; @@ -98,3 +99,11 @@ st,sdram-refcount = <1539>; }; }; + +&sdmmc1 { + status = "okay"; + pinctrl-0 = <&sdmmc1_pins>; + pinctrl-names = "default"; + bus-width = <4>; + cd-gpios = <&gpioi 8 1>; +}; diff --git a/arch/arm/dts/stm32h743i-eval.dts b/arch/arm/dts/stm32h743i-eval.dts index 0e01ce51ab..28c876be27 100644 --- a/arch/arm/dts/stm32h743i-eval.dts +++ b/arch/arm/dts/stm32h743i-eval.dts @@ -98,3 +98,12 @@ st,sdram-refcount = <1539>; }; }; + +&sdmmc1 { + status = "okay"; + pinctrl-0 = <&sdmmc1_pins>, + <&pinctrl_sdmmc1_level_shifter>; + pinctrl-names = "default"; + bus-width = <4>; + st,dirpol; +}; diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts index ba5bca0fe9..4c03cc3fd7 100644 --- a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts +++ b/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts @@ -105,6 +105,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &ehci0 { status = "okay"; }; @@ -132,16 +136,14 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; +#include "axp209.dtsi" + &ir0 { pinctrl-names = "default"; pinctrl-0 = <&ir0_rx_pins_a>; @@ -167,10 +169,10 @@ mmc-pwrseq = <&mmc3_pwrseq>; bus-width = <4>; non-removable; - enable-sdio-wakeup; + wakeup-source; status = "okay"; - brcmf: bcrmf@1 { + brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; @@ -181,7 +183,7 @@ &mmc3_pins_a { /* AP6210 requires pull-up */ - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + bias-pull-up; }; &ohci0 { @@ -192,38 +194,81 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { gmac_power_pin_bpi_m1p: gmac_power_pin@0 { - allwinner,pins = "PH23"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH23"; + function = "gpio_out"; }; led_pins_bpi_m1p: led_pins@0 { - allwinner,pins = "PH24", "PH25"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH24", "PH25"; + function = "gpio_out"; }; mmc0_cd_pin_bpi_m1p: mmc0_cd_pin@0 { - allwinner,pins = "PH10"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + pins = "PH10"; + function = "gpio_in"; + bias-pull-up; }; mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin@0 { - allwinner,pins = "PH22"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH22"; + function = "gpio_out"; }; }; +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_usb0_vbus { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + /* VBUS on usb host ports are tied to DC5V and therefore always on */ + status = "okay"; +}; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts new file mode 100644 index 0000000000..d99e7b193e --- /dev/null +++ b/arch/arm/dts/sun7i-a20-olinuxino-micro-emmc.dts @@ -0,0 +1,70 @@ + /* + * Copyright 2017 Olimex Ltd. + * Stefan Mavrodiev <stefan@olimex.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sun7i-a20-olinuxino-micro.dts" + +/ { + model = "Olimex A20-OLinuXino-MICRO-eMMC"; + compatible = "olimex,a20-olinuxino-micro-emmc", "allwinner,sun7i-a20"; + + mmc2_pwrseq: pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>; + }; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins_a>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + non-removable; + mmc-pwrseq = <&mmc2_pwrseq>; + status = "okay"; + + emmc: emmc@0 { + reg = <0>; + compatible = "mmc-card"; + broken-hpi; + }; +}; diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi index f97c38f097..ea50dda75a 100644 --- a/arch/arm/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/dts/sun8i-a23-a33.dtsi @@ -46,7 +46,8 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> +#include <dt-bindings/clock/sun8i-a23-a33-ccu.h> +#include <dt-bindings/reset/sun8i-a23-a33-ccu.h> / { interrupt-parent = <&gic>; @@ -60,7 +61,9 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; - clocks = <&pll6 0>; + clocks = <&ccu CLK_BUS_LCD>, <&ccu CLK_BUS_DE_BE>, + <&ccu CLK_LCD_CH0>, <&ccu CLK_DE_BE>, + <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_DRC>; status = "disabled"; }; }; @@ -80,7 +83,7 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; @@ -102,151 +105,16 @@ #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; + clock-accuracy = <50000>; clock-output-names = "osc24M"; }; - osc32k: osc32k_clk { + ext_osc32k: ext_osc32k_clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; - clock-output-names = "osc32k"; - }; - - pll1: clk@01c20000 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-pll1-clk"; - reg = <0x01c20000 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll1"; - }; - - /* dummy clock until actually implemented */ - pll5: pll5_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - clock-output-names = "pll5"; - }; - - pll6: clk@01c20028 { - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-pll6-clk"; - reg = <0x01c20028 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll6", "pll6x2"; - }; - - cpu: cpu_clk@01c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-cpu-clk"; - reg = <0x01c20050 0x4>; - - /* - * PLL1 is listed twice here. - * While it looks suspicious, it's actually documented - * that way both in the datasheet and in the code from - * Allwinner. - */ - clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>; - clock-output-names = "cpu"; - }; - - axi: axi_clk@01c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-axi-clk"; - reg = <0x01c20050 0x4>; - clocks = <&cpu>; - clock-output-names = "axi"; - }; - - ahb1: ahb1_clk@01c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun6i-a31-ahb1-clk"; - reg = <0x01c20054 0x4>; - clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; - clock-output-names = "ahb1"; - }; - - apb1: apb1_clk@01c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb0-clk"; - reg = <0x01c20054 0x4>; - clocks = <&ahb1>; - clock-output-names = "apb1"; - }; - - apb1_gates: clk@01c20068 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a23-apb1-gates-clk"; - reg = <0x01c20068 0x4>; - clocks = <&apb1>; - clock-indices = <0>, <5>, - <12>, <13>; - clock-output-names = "apb1_codec", "apb1_pio", - "apb1_daudio0", "apb1_daudio1"; - }; - - apb2: clk@01c20058 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb1-clk"; - reg = <0x01c20058 0x4>; - clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>; - clock-output-names = "apb2"; - }; - - apb2_gates: clk@01c2006c { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a23-apb2-gates-clk"; - reg = <0x01c2006c 0x4>; - clocks = <&apb2>; - clock-indices = <0>, <1>, - <2>, <16>, - <17>, <18>, - <19>, <20>; - clock-output-names = "apb2_i2c0", "apb2_i2c1", - "apb2_i2c2", "apb2_uart0", - "apb2_uart1", "apb2_uart2", - "apb2_uart3", "apb2_uart4"; - }; - - mmc0_clk: clk@01c20088 { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20088 0x4>; - clocks = <&osc24M>, <&pll6 0>; - clock-output-names = "mmc0", - "mmc0_output", - "mmc0_sample"; - }; - - mmc1_clk: clk@01c2008c { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c2008c 0x4>; - clocks = <&osc24M>, <&pll6 0>; - clock-output-names = "mmc1", - "mmc1_output", - "mmc1_sample"; - }; - - mmc2_clk: clk@01c20090 { - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20090 0x4>; - clocks = <&osc24M>, <&pll6 0>; - clock-output-names = "mmc2", - "mmc2_output", - "mmc2_sample"; - }; - - usb_clk: clk@01c200cc { - #clock-cells = <1>; - #reset-cells = <1>; - compatible = "allwinner,sun8i-a23-usb-clk"; - reg = <0x01c200cc 0x4>; - clocks = <&osc24M>; - clock-output-names = "usb_phy0", "usb_phy1", "usb_hsic", - "usb_hsic_12M", "usb_ohci0"; + clock-accuracy = <50000>; + clock-output-names = "ext-osc32k"; }; }; @@ -260,24 +128,23 @@ compatible = "allwinner,sun8i-a23-dma"; reg = <0x01c02000 0x1000>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ahb1_gates 6>; - resets = <&ahb1_rst 6>; + clocks = <&ccu CLK_BUS_DMA>; + resets = <&ccu RST_BUS_DMA>; #dma-cells = <1>; }; mmc0: mmc@01c0f000 { - compatible = "allwinner,sun7i-a20-mmc", - "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>; - clocks = <&ahb1_gates 8>, - <&mmc0_clk 0>, - <&mmc0_clk 1>, - <&mmc0_clk 2>; + clocks = <&ccu CLK_BUS_MMC0>, + <&ccu CLK_MMC0>, + <&ccu CLK_MMC0_OUTPUT>, + <&ccu CLK_MMC0_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ahb1_rst 8>; + resets = <&ccu RST_BUS_MMC0>; reset-names = "ahb"; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -286,18 +153,17 @@ }; mmc1: mmc@01c10000 { - compatible = "allwinner,sun7i-a20-mmc", - "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c10000 0x1000>; - clocks = <&ahb1_gates 9>, - <&mmc1_clk 0>, - <&mmc1_clk 1>, - <&mmc1_clk 2>; + clocks = <&ccu CLK_BUS_MMC1>, + <&ccu CLK_MMC1>, + <&ccu CLK_MMC1_OUTPUT>, + <&ccu CLK_MMC1_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ahb1_rst 9>; + resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -306,18 +172,17 @@ }; mmc2: mmc@01c11000 { - compatible = "allwinner,sun7i-a20-mmc", - "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c11000 0x1000>; - clocks = <&ahb1_gates 10>, - <&mmc2_clk 0>, - <&mmc2_clk 1>, - <&mmc2_clk 2>; + clocks = <&ccu CLK_BUS_MMC2>, + <&ccu CLK_MMC2>, + <&ccu CLK_MMC2_OUTPUT>, + <&ccu CLK_MMC2_SAMPLE>; clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ahb1_rst 10>; + resets = <&ccu RST_BUS_MMC2>; reset-names = "ahb"; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -325,12 +190,55 @@ #size-cells = <0>; }; + nfc: nand@01c03000 { + compatible = "allwinner,sun4i-a10-nand"; + reg = <0x01c03000 0x1000>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>; + clock-names = "ahb", "mod"; + resets = <&ccu RST_BUS_NAND>; + reset-names = "ahb"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + usb_otg: usb@01c19000 { + /* compatible gets set in SoC specific dtsi file */ + reg = <0x01c19000 0x0400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: phy@01c19400 { + /* + * compatible and address regions get set in + * SoC specific dtsi file + */ + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + ehci0: usb@01c1a000 { compatible = "allwinner,sun8i-a23-ehci", "generic-ehci"; reg = <0x01c1a000 0x100>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ahb1_gates 26>; - resets = <&ahb1_rst 26>; + clocks = <&ccu CLK_BUS_EHCI>; + resets = <&ccu RST_BUS_EHCI>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; @@ -340,101 +248,100 @@ compatible = "allwinner,sun8i-a23-ohci", "generic-ohci"; reg = <0x01c1a400 0x100>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ahb1_gates 29>, <&usb_clk 16>; - resets = <&ahb1_rst 29>; + clocks = <&ccu CLK_BUS_OHCI>, <&ccu CLK_USB_OHCI>; + resets = <&ccu RST_BUS_OHCI>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; }; + ccu: clock@01c20000 { + reg = <0x01c20000 0x400>; + clocks = <&osc24M>, <&rtc 0>; + clock-names = "hosc", "losc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + pio: pinctrl@01c20800 { /* compatible gets set in SoC specific dtsi file */ reg = <0x01c20800 0x400>; /* interrupts get set in SoC specific dtsi file */ - clocks = <&apb1_gates 5>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>; #gpio-cells = <3>; uart0_pins_a: uart0@0 { - allwinner,pins = "PF2", "PF4"; - allwinner,function = "uart0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PF2", "PF4"; + function = "uart0"; + }; + + uart1_pins_a: uart1@0 { + pins = "PG6", "PG7"; + function = "uart1"; + }; + + uart1_pins_cts_rts_a: uart1-cts-rts@0 { + pins = "PG8", "PG9"; + function = "uart1"; }; mmc0_pins_a: mmc0@0 { - allwinner,pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - allwinner,function = "mmc0"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; + function = "mmc0"; + drive-strength = <30>; + bias-pull-up; }; mmc1_pins_a: mmc1@0 { - allwinner,pins = "PG0", "PG1", "PG2", - "PG3", "PG4", "PG5"; - allwinner,function = "mmc1"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PG0", "PG1", "PG2", + "PG3", "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; }; mmc2_8bit_pins: mmc2_8bit { - allwinner,pins = "PC5", "PC6", "PC8", - "PC9", "PC10", "PC11", - "PC12", "PC13", "PC14", - "PC15", "PC16"; - allwinner,function = "mmc2"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PC5", "PC6", "PC8", + "PC9", "PC10", "PC11", + "PC12", "PC13", "PC14", + "PC15", "PC16"; + function = "mmc2"; + drive-strength = <30>; + bias-pull-up; }; pwm0_pins: pwm0 { - allwinner,pins = "PH0"; - allwinner,function = "pwm0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH0"; + function = "pwm0"; }; i2c0_pins_a: i2c0@0 { - allwinner,pins = "PH2", "PH3"; - allwinner,function = "i2c0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH2", "PH3"; + function = "i2c0"; }; i2c1_pins_a: i2c1@0 { - allwinner,pins = "PH4", "PH5"; - allwinner,function = "i2c1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PH4", "PH5"; + function = "i2c1"; }; i2c2_pins_a: i2c2@0 { - allwinner,pins = "PE12", "PE13"; - allwinner,function = "i2c2"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PE12", "PE13"; + function = "i2c2"; }; - }; - - ahb1_rst: reset@01c202c0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202c0 0xc>; - }; - apb1_rst: reset@01c202d0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d0 0x4>; - }; - - apb2_rst: reset@01c202d8 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d8 0x4>; + lcd_rgb666_pins: lcd-rgb666@0 { + pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", + "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", + "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", + "PD24", "PD25", "PD26", "PD27"; + function = "lcd0"; + }; }; timer@01c20c00 { @@ -472,8 +379,8 @@ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&apb2_gates 16>; - resets = <&apb2_rst 16>; + clocks = <&ccu CLK_BUS_UART0>; + resets = <&ccu RST_BUS_UART0>; dmas = <&dma 6>, <&dma 6>; dma-names = "rx", "tx"; status = "disabled"; @@ -485,8 +392,8 @@ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&apb2_gates 17>; - resets = <&apb2_rst 17>; + clocks = <&ccu CLK_BUS_UART1>; + resets = <&ccu RST_BUS_UART1>; dmas = <&dma 7>, <&dma 7>; dma-names = "rx", "tx"; status = "disabled"; @@ -498,8 +405,8 @@ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&apb2_gates 18>; - resets = <&apb2_rst 18>; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; dmas = <&dma 8>, <&dma 8>; dma-names = "rx", "tx"; status = "disabled"; @@ -511,8 +418,8 @@ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&apb2_gates 19>; - resets = <&apb2_rst 19>; + clocks = <&ccu CLK_BUS_UART3>; + resets = <&ccu RST_BUS_UART3>; dmas = <&dma 9>, <&dma 9>; dma-names = "rx", "tx"; status = "disabled"; @@ -524,8 +431,8 @@ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&apb2_gates 20>; - resets = <&apb2_rst 20>; + clocks = <&ccu CLK_BUS_UART4>; + resets = <&ccu RST_BUS_UART4>; dmas = <&dma 10>, <&dma 10>; dma-names = "rx", "tx"; status = "disabled"; @@ -535,8 +442,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2ac00 0x400>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb2_gates 0>; - resets = <&apb2_rst 0>; + clocks = <&ccu CLK_BUS_I2C0>; + resets = <&ccu RST_BUS_I2C0>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -546,8 +453,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b000 0x400>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb2_gates 1>; - resets = <&apb2_rst 1>; + clocks = <&ccu CLK_BUS_I2C1>; + resets = <&ccu RST_BUS_I2C1>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -557,17 +464,44 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b400 0x400>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb2_gates 2>; - resets = <&apb2_rst 2>; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; + mali: gpu@1c40000 { + compatible = "allwinner,sun8i-a23-mali", + "allwinner,sun7i-a20-mali", "arm,mali-400"; + reg = <0x01c40000 0x10000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", + "gpmmu", + "pp0", + "ppmmu0", + "pp1", + "ppmmu1", + "pmu"; + clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; + clock-names = "bus", "core"; + resets = <&ccu RST_BUS_GPU>; + #cooling-cells = <2>; + + assigned-clocks = <&ccu CLK_GPU>; + assigned-clock-rates = <384000000>; + }; + gic: interrupt-controller@01c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>, - <0x01c82000 0x1000>, + <0x01c82000 0x2000>, <0x01c84000 0x2000>, <0x01c86000 0x2000>; interrupt-controller; @@ -580,13 +514,16 @@ reg = <0x01f00000 0x54>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + clock-output-names = "osc32k"; + clocks = <&ext_osc32k>; + #clock-cells = <1>; }; - nmi_intc: interrupt-controller@01f00c0c { - compatible = "allwinner,sun6i-a31-sc-nmi"; + nmi_intc: interrupt-controller@1f00c00 { + compatible = "allwinner,sun6i-a31-r-intc"; interrupt-controller; #interrupt-cells = <2>; - reg = <0x01f00c0c 0x38>; + reg = <0x01f00c00 0x400>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; }; @@ -632,6 +569,10 @@ compatible = "allwinner,sun6i-a31-clock-reset"; #reset-cells = <1>; }; + + codec_analog: codec-analog { + compatible = "allwinner,sun8i-a23-codec-analog"; + }; }; cpucfg@01f01c00 { @@ -654,7 +595,8 @@ compatible = "allwinner,sun8i-a23-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb0_gates 0>; + clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; + clock-names = "apb", "hosc", "losc"; resets = <&apb0_rst 0>; gpio-controller; interrupt-controller; @@ -664,17 +606,15 @@ #gpio-cells = <3>; r_rsb_pins: r_rsb { - allwinner,pins = "PL0", "PL1"; - allwinner,function = "s_rsb"; - allwinner,drive = <SUN4I_PINCTRL_20_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + pins = "PL0", "PL1"; + function = "s_rsb"; + drive-strength = <20>; + bias-pull-up; }; r_uart_pins_a: r_uart@0 { - allwinner,pins = "PL2", "PL3"; - allwinner,function = "s_uart"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PL2", "PL3"; + function = "s_uart"; }; }; diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/sun8i-a23.dtsi index 92e6616979..4d1f929780 100644 --- a/arch/arm/dts/sun8i-a23.dtsi +++ b/arch/arm/dts/sun8i-a23.dtsi @@ -49,78 +49,40 @@ reg = <0x40000000 0x40000000>; }; - clocks { - ahb1_gates: clk@01c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a23-ahb1-gates-clk"; - reg = <0x01c20060 0x8>; - clocks = <&ahb1>; - clock-indices = <1>, <6>, - <8>, <9>, <10>, - <13>, <14>, - <19>, <20>, - <21>, <24>, <26>, - <29>, <32>, <36>, - <40>, <44>, <46>, - <52>, <53>, - <54>, <57>; - clock-output-names = "ahb1_mipidsi", "ahb1_dma", - "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", - "ahb1_nand", "ahb1_sdram", - "ahb1_hstimer", "ahb1_spi0", - "ahb1_spi1", "ahb1_otg", "ahb1_ehci", - "ahb1_ohci", "ahb1_ve", "ahb1_lcd", - "ahb1_csi", "ahb1_be", "ahb1_fe", - "ahb1_gpu", "ahb1_msgbox", - "ahb1_spinlock", "ahb1_drc"; - }; - - mbus_clk: clk@01c2015c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-mbus-clk"; - reg = <0x01c2015c 0x4>; - clocks = <&osc24M>, <&pll6 1>, <&pll5>; - clock-output-names = "mbus"; - }; - }; - soc@01c00000 { - usb_otg: usb@01c19000 { - compatible = "allwinner,sun6i-a31-musb"; - reg = <0x01c19000 0x0400>; - clocks = <&ahb1_gates 24>; - resets = <&ahb1_rst 24>; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "mc"; - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; - status = "disabled"; - }; - - usbphy: phy@01c19400 { - compatible = "allwinner,sun8i-a23-usb-phy"; - reg = <0x01c19400 0x10>, - <0x01c1a800 0x4>; - reg-names = "phy_ctrl", - "pmu1"; - clocks = <&usb_clk 8>, - <&usb_clk 9>; - clock-names = "usb0_phy", - "usb1_phy"; - resets = <&usb_clk 0>, - <&usb_clk 1>; - reset-names = "usb0_reset", - "usb1_reset"; + codec: codec@01c22c00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun8i-a23-codec"; + reg = <0x01c22c00 0x400>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; + clock-names = "apb", "codec"; + resets = <&ccu RST_BUS_CODEC>; + dmas = <&dma 15>, <&dma 15>; + dma-names = "rx", "tx"; + allwinner,codec-analog-controls = <&codec_analog>; status = "disabled"; - #phy-cells = <1>; }; }; }; +&ccu { + compatible = "allwinner,sun8i-a23-ccu"; +}; + &pio { compatible = "allwinner,sun8i-a23-pinctrl"; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; }; + +&usb_otg { + compatible = "allwinner,sun6i-a31-musb"; +}; + +&usbphy { + compatible = "allwinner,sun8i-a23-usb-phy"; + reg = <0x01c19400 0x10>, <0x01c1a800 0x4>; + reg-names = "phy_ctrl", "pmu1"; +}; diff --git a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts index fef6abc0a7..b1bc88c46c 100644 --- a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts @@ -61,6 +61,31 @@ chosen { stdout-path = "serial0:115200n8"; }; + + panel { + compatible = "netron-dy,e231732"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + panel_input: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_out_panel>; + }; + }; + }; +}; + +&de { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc3>; }; &ehci0 { @@ -207,12 +232,30 @@ regulator-name = "vcc-rtc"; }; +&tcon0 { + pinctrl-names = "default"; + pinctrl-0 = <&lcd_rgb666_pins>; + status = "okay"; +}; + +&tcon0_out { + tcon0_out_panel: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_input>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_b>; status = "okay"; }; +&usb_otg { + dr_mode = "peripheral"; + status = "okay"; +}; + &usbphy { status = "okay"; usb1_vbus-supply = <®_vcc5v0>; /* USB1 VBUS is always on */ diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi index 001d8402ca..22660919bd 100644 --- a/arch/arm/dts/sun8i-a33.dtsi +++ b/arch/arm/dts/sun8i-a33.dtsi @@ -43,19 +43,137 @@ */ #include "sun8i-a23-a33.dtsi" +#include <dt-bindings/thermal/thermal.h> / { + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-120000000 { + opp-hz = /bits/ 64 <120000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-240000000 { + opp-hz = /bits/ 64 <240000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-312000000 { + opp-hz = /bits/ 64 <312000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-504000000 { + opp-hz = /bits/ 64 <504000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-648000000 { + opp-hz = /bits/ 64 <648000000>; + opp-microvolt = <1040000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1200000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1200000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + }; + cpus { + cpu@0 { + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; + }; + + cpu@1 { + operating-points-v2 = <&cpu0_opp_table>; + }; + cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + operating-points-v2 = <&cpu0_opp_table>; }; cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + operating-points-v2 = <&cpu0_opp_table>; + }; + }; + + de: display-engine { + compatible = "allwinner,sun8i-a33-display-engine"; + allwinner,pipelines = <&fe0>; + status = "disabled"; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&ths>; + }; + + mali_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp-144000000 { + opp-hz = /bits/ 64 <144000000>; + }; + + opp-240000000 { + opp-hz = /bits/ 64 <240000000>; + }; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; }; }; @@ -63,113 +181,310 @@ reg = <0x40000000 0x80000000>; }; - clocks { - /* Dummy clock for pll11 (DDR1) until actually implemented */ - pll11: pll11_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - clock-output-names = "pll11"; - }; - - ahb1_gates: clk@01c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a33-ahb1-gates-clk"; - reg = <0x01c20060 0x8>; - clocks = <&ahb1>; - clock-indices = <1>, <5>, - <6>, <8>, <9>, - <10>, <13>, <14>, - <19>, <20>, - <21>, <24>, <26>, - <29>, <32>, <36>, - <40>, <44>, <46>, - <52>, <53>, - <54>, <57>, - <58>; - clock-output-names = "ahb1_mipidsi", "ahb1_ss", - "ahb1_dma","ahb1_mmc0", "ahb1_mmc1", - "ahb1_mmc2", "ahb1_nand", "ahb1_sdram", - "ahb1_hstimer", "ahb1_spi0", - "ahb1_spi1", "ahb1_otg", "ahb1_ehci", - "ahb1_ohci", "ahb1_ve", "ahb1_lcd", - "ahb1_csi", "ahb1_be", "ahb1_fe", - "ahb1_gpu", "ahb1_msgbox", - "ahb1_spinlock", "ahb1_drc", - "ahb1_sat"; - }; - - ss_clk: clk@01c2009c { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-mod0-clk"; - reg = <0x01c2009c 0x4>; - clocks = <&osc24M>, <&pll6 0>; - clock-output-names = "ss"; - }; - - mbus_clk: clk@01c2015c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-mbus-clk"; - reg = <0x01c2015c 0x4>; - clocks = <&osc24M>, <&pll6 1>, <&pll5>, <&pll11>; - clock-output-names = "mbus"; + sound: sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "sun8i-a33-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&link_codec>; + simple-audio-card,bitclock-master = <&link_codec>; + simple-audio-card,mclk-fs = <512>; + simple-audio-card,aux-devs = <&codec_analog>; + simple-audio-card,routing = + "Left DAC", "AIF1 Slot 0 Left", + "Right DAC", "AIF1 Slot 0 Right"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&dai>; + }; + + link_codec: simple-audio-card,codec { + sound-dai = <&codec>; }; }; soc@01c00000 { + tcon0: lcd-controller@01c0c000 { + compatible = "allwinner,sun8i-a33-tcon"; + reg = <0x01c0c000 0x1000>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_LCD>, + <&ccu CLK_LCD_CH0>; + clock-names = "ahb", + "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; + resets = <&ccu RST_BUS_LCD>; + reset-names = "lcd"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon0_in_drc0: endpoint@0 { + reg = <0>; + remote-endpoint = <&drc0_out_tcon0>; + }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + crypto: crypto-engine@01c15000 { compatible = "allwinner,sun4i-a10-crypto"; reg = <0x01c15000 0x1000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ahb1_gates 5>, <&ss_clk>; + clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>; clock-names = "ahb", "mod"; - resets = <&ahb1_rst 5>; + resets = <&ccu RST_BUS_SS>; reset-names = "ahb"; }; - usb_otg: usb@01c19000 { - compatible = "allwinner,sun8i-a33-musb"; - reg = <0x01c19000 0x0400>; - clocks = <&ahb1_gates 24>; - resets = <&ahb1_rst 24>; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "mc"; - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; + dai: dai@01c22c00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun6i-a31-i2s"; + reg = <0x01c22c00 0x200>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; + clock-names = "apb", "mod"; + resets = <&ccu RST_BUS_CODEC>; + dmas = <&dma 15>, <&dma 15>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + codec: codec@01c22e00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun8i-a33-codec"; + reg = <0x01c22e00 0x400>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; + clock-names = "bus", "mod"; status = "disabled"; }; - usbphy: phy@01c19400 { - compatible = "allwinner,sun8i-a33-usb-phy"; - reg = <0x01c19400 0x14>, - <0x01c1a800 0x4>; - reg-names = "phy_ctrl", - "pmu1"; - clocks = <&usb_clk 8>, - <&usb_clk 9>; - clock-names = "usb0_phy", - "usb1_phy"; - resets = <&usb_clk 0>, - <&usb_clk 1>; - reset-names = "usb0_reset", - "usb1_reset"; + ths: ths@01c25000 { + compatible = "allwinner,sun8i-a33-ths"; + reg = <0x01c25000 0x100>; + #thermal-sensor-cells = <0>; + #io-channel-cells = <0>; + }; + + fe0: display-frontend@01e00000 { + compatible = "allwinner,sun8i-a33-display-frontend"; + reg = <0x01e00000 0x20000>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>, + <&ccu CLK_DRAM_DE_FE>; + clock-names = "ahb", "mod", + "ram"; + resets = <&ccu RST_BUS_DE_FE>; status = "disabled"; - #phy-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + fe0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + fe0_out_be0: endpoint@0 { + reg = <0>; + remote-endpoint = <&be0_in_fe0>; + }; + }; + }; + }; + + be0: display-backend@01e60000 { + compatible = "allwinner,sun8i-a33-display-backend"; + reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>; + reg-names = "be", "sat"; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>, + <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>; + clock-names = "ahb", "mod", + "ram", "sat"; + resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>; + reset-names = "be", "sat"; + assigned-clocks = <&ccu CLK_DE_BE>; + assigned-clock-rates = <300000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + be0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + be0_in_fe0: endpoint@0 { + reg = <0>; + remote-endpoint = <&fe0_out_be0>; + }; + }; + + be0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + be0_out_drc0: endpoint@0 { + reg = <0>; + remote-endpoint = <&drc0_in_be0>; + }; + }; + }; + }; + + drc0: drc@01e70000 { + compatible = "allwinner,sun8i-a33-drc"; + reg = <0x01e70000 0x10000>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DRC>, <&ccu CLK_DRC>, + <&ccu CLK_DRAM_DRC>; + clock-names = "ahb", "mod", "ram"; + resets = <&ccu RST_BUS_DRC>; + + assigned-clocks = <&ccu CLK_DRC>; + assigned-clock-rates = <300000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + drc0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + drc0_in_be0: endpoint@0 { + reg = <0>; + remote-endpoint = <&be0_out_drc0>; + }; + }; + + drc0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + drc0_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_drc0>; + }; + }; + }; + }; + }; + + thermal-zones { + cpu_thermal { + /* milliseconds */ + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&ths>; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map1 { + trip = <&cpu_alert1>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map2 { + trip = <&gpu_alert0>; + cooling-device = <&mali 1 THERMAL_NO_LIMIT>; + }; + + map3 { + trip = <&gpu_alert1>; + cooling-device = <&mali 2 THERMAL_NO_LIMIT>; + }; + }; + + trips { + cpu_alert0: cpu_alert0 { + /* milliCelsius */ + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + gpu_alert0: gpu_alert0 { + /* milliCelsius */ + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_alert1: cpu_alert1 { + /* milliCelsius */ + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + + gpu_alert1: gpu_alert1 { + /* milliCelsius */ + temperature = <95000>; + hysteresis = <2000>; + type = "hot"; + }; + + cpu_crit: cpu_crit { + /* milliCelsius */ + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; }; }; }; +&ccu { + compatible = "allwinner,sun8i-a33-ccu"; +}; + +&mali { + operating-points-v2 = <&mali_opp_table>; +}; + &pio { compatible = "allwinner,sun8i-a33-pinctrl"; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; uart0_pins_b: uart0@1 { - allwinner,pins = "PB0", "PB1"; - allwinner,function = "uart0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + pins = "PB0", "PB1"; + function = "uart0"; }; }; + +&usb_otg { + compatible = "allwinner,sun8i-a33-musb"; +}; + +&usbphy { + compatible = "allwinner,sun8i-a33-usb-phy"; + reg = <0x01c19400 0x14>, <0x01c1a800 0x4>; + reg-names = "phy_ctrl", "pmu1"; +}; diff --git a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts index dfc16a0272..dfc16a0272 100644 --- a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts +++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts diff --git a/arch/arm/dts/tps6507x.dtsi b/arch/arm/dts/tps6507x.dtsi new file mode 100644 index 0000000000..4c326e591e --- /dev/null +++ b/arch/arm/dts/tps6507x.dtsi @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Integrated Power Management Chip + * http://www.ti.com/lit/ds/symlink/tps65070.pdf + */ + +&tps { + compatible = "ti,tps6507x"; + + regulators { + #address-cells = <1>; + #size-cells = <0>; + + vdcdc1_reg: regulator@0 { + reg = <0>; + regulator-compatible = "VDCDC1"; + }; + + vdcdc2_reg: regulator@1 { + reg = <1>; + regulator-compatible = "VDCDC2"; + }; + + vdcdc3_reg: regulator@2 { + reg = <2>; + regulator-compatible = "VDCDC3"; + }; + + ldo1_reg: regulator@3 { + reg = <3>; + regulator-compatible = "LDO1"; + }; + + ldo2_reg: regulator@4 { + reg = <4>; + regulator-compatible = "LDO2"; + }; + + }; +}; diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi new file mode 100644 index 0000000000..e21cf332c9 --- /dev/null +++ b/arch/arm/dts/ulcb.dtsi @@ -0,0 +1,368 @@ +/* + * Device Tree Source for the R-Car Gen3 ULCB board + * + * Copyright (C) 2016 Renesas Electronics Corp. + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + model = "Renesas R-Car Gen3 ULCB board"; + + aliases { + serial0 = &scif2; + ethernet0 = &avb; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + audio_clkout: audio-clkout { + /* + * This is same as <&rcar_sound 0> + * but needed to avoid cs2000/rcar_sound probe dead-lock + */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <11289600>; + }; + + keyboard { + compatible = "gpio-keys"; + + key-1 { + linux,code = <KEY_1>; + label = "SW3"; + wakeup-source; + debounce-interval = <20>; + gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led5 { + gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; + }; + led6 { + gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + rsnd_ak4613: sound { + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&sndcpu>; + simple-audio-card,frame-master = <&sndcpu>; + + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec { + sound-dai = <&ak4613>; + }; + }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + x12_clk: x12 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; +}; + +&audio_clk_a { + clock-frequency = <22579200>; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + + status = "okay"; + + clock-frequency = <100000>; + + ak4613: codec@10 { + compatible = "asahi-kasei,ak4613"; + #sound-dai-cells = <0>; + reg = <0x10>; + clocks = <&rcar_sound 3>; + + asahi-kasei,in1-single-end; + asahi-kasei,in2-single-end; + asahi-kasei,out1-single-end; + asahi-kasei,out2-single-end; + asahi-kasei,out3-single-end; + asahi-kasei,out4-single-end; + asahi-kasei,out5-single-end; + asahi-kasei,out6-single-end; + }; + + cs2000: clk-multiplier@4f { + #clock-cells = <0>; + compatible = "cirrus,cs2000-cp"; + reg = <0x4f>; + clocks = <&audio_clkout>, <&x12_clk>; + clock-names = "clk_in", "ref_clk"; + + assigned-clocks = <&cs2000>; + assigned-clock-rates = <24576000>; /* 1/1 divide */ + }; +}; + +&ohci1 { + status = "okay"; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + avb_pins: avb { + mux { + groups = "avb_link", "avb_phy_int", "avb_mdc", + "avb_mii"; + function = "avb"; + }; + + pins_mdc { + groups = "avb_mdc"; + drive-strength = <24>; + }; + + pins_mii_tx { + pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", + "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; + drive-strength = <12>; + }; + }; + + i2c2_pins: i2c2 { + groups = "i2c2_a"; + function = "i2c2"; + }; + + scif2_pins: scif2 { + groups = "scif2_data_a"; + function = "scif2"; + }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_a"; + function = "scif_clk"; + }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; + + sdhi2_pins: sd2 { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data8", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; + }; + + sound_pins: sound { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; + function = "ssi"; + }; + + sound_clk_pins: sound-clk { + groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", + "audio_clkout_a", "audio_clkout3_a"; + function = "audio_clk"; + }; + + usb1_pins: usb1 { + groups = "usb1"; + function = "usb1"; + }; +}; + +&rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; + + /* Single DAI */ + #sound-dai-cells = <0>; + + /* audio_clkout0/1/2/3 */ + #clock-cells = <1>; + clock-frequency = <12288000 11289600>; + + status = "okay"; + + /* update <audio_clk_b> to <cs2000> */ + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&audio_clk_a>, <&cs2000>, + <&audio_clk_c>, + <&cpg CPG_CORE CPG_AUDIO_CLK_I>; + + rcar_sound,dai { + dai0 { + playback = <&ssi0 &src0 &dvc0>; + capture = <&ssi1 &src1 &dvc1>; + }; + }; +}; + +&scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + sd-uhs-sdr50; + status = "okay"; +}; + +&sdhi2 { + /* used for on-board 8bit eMMC */ + pinctrl-0 = <&sdhi2_pins>; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + status = "okay"; +}; + +&ssi1 { + shared-pin; +}; + +&usb2_phy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 0f172c31db..0cc6fd716e 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -154,6 +154,29 @@ clock-frequency = <58820000>; }; + gpio: gpio@55000000 { + compatible = "socionext,uniphier-gpio"; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>, + <&pinctrl 43 0 0>, + <&pinctrl 51 0 0>, + <&pinctrl 96 0 0>, + <&pinctrl 160 0 0>, + <&pinctrl 184 0 0>; + gpio-ranges-group-names = "gpio_range0", + "gpio_range1", + "gpio_range2", + "gpio_range3", + "gpio_range4", + "gpio_range5"; + ngpios = <200>; + }; + i2c0: i2c@58780000 { compatible = "socionext,uniphier-fi2c"; status = "disabled"; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index a3bcf227f4..b81603820a 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -108,116 +108,17 @@ clock-frequency = <36864000>; }; - port0x: gpio@55000008 { + gpio: gpio@55000000 { compatible = "socionext,uniphier-gpio"; - reg = <0x55000008 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port1x: gpio@55000010 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000010 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port2x: gpio@55000018 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000018 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port3x: gpio@55000020 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000020 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port4: gpio@55000028 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000028 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port5x: gpio@55000030 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000030 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port6x: gpio@55000038 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000038 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port7x: gpio@55000040 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000040 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port8x: gpio@55000048 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000048 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port9x: gpio@55000050 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000050 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port10x: gpio@55000058 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000058 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port11x: gpio@55000060 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000060 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port12x: gpio@55000068 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000068 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port13x: gpio@55000070 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000070 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port14x: gpio@55000078 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000078 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port16x: gpio@55000088 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000088 0x8>; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <136>; }; i2c0: i2c@58400000 { diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index b45f23ce7c..5f39972f67 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -116,207 +116,17 @@ clock-frequency = <73728000>; }; - port0x: gpio@55000008 { + gpio: gpio@55000000 { compatible = "socionext,uniphier-gpio"; - reg = <0x55000008 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port1x: gpio@55000010 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000010 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port2x: gpio@55000018 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000018 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port3x: gpio@55000020 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000020 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port4: gpio@55000028 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000028 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port5x: gpio@55000030 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000030 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port6x: gpio@55000038 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000038 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port7x: gpio@55000040 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000040 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port8x: gpio@55000048 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000048 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port9x: gpio@55000050 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000050 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port10x: gpio@55000058 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000058 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port11x: gpio@55000060 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000060 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port12x: gpio@55000068 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000068 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port13x: gpio@55000070 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000070 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port14x: gpio@55000078 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000078 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port17x: gpio@550000a0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000a0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port18x: gpio@550000a8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000a8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port19x: gpio@550000b0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000b0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port20x: gpio@550000b8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000b8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port21x: gpio@550000c0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000c0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port22x: gpio@550000c8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000c8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port23x: gpio@550000d0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000d0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port24x: gpio@550000d8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000d8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port25x: gpio@550000e0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000e0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port26x: gpio@550000e8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000e8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port27x: gpio@550000f0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000f0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port28x: gpio@550000f8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000f8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port29x: gpio@55000100 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000100 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port30x: gpio@55000108 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000108 0x8>; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; }; i2c0: i2c@58780000 { diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi index 94eb656512..950b02c5b0 100644 --- a/arch/arm/dts/uniphier-pro5.dtsi +++ b/arch/arm/dts/uniphier-pro5.dtsi @@ -203,207 +203,17 @@ clock-frequency = <73728000>; }; - port0x: gpio@55000008 { + gpio: gpio@55000000 { compatible = "socionext,uniphier-gpio"; - reg = <0x55000008 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port1x: gpio@55000010 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000010 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port2x: gpio@55000018 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000018 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port3x: gpio@55000020 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000020 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port4: gpio@55000028 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000028 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port5x: gpio@55000030 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000030 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port6x: gpio@55000038 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000038 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port7x: gpio@55000040 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000040 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port8x: gpio@55000048 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000048 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port9x: gpio@55000050 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000050 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port10x: gpio@55000058 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000058 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port11x: gpio@55000060 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000060 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port12x: gpio@55000068 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000068 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port13x: gpio@55000070 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000070 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port14x: gpio@55000078 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000078 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port17x: gpio@550000a0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000a0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port18x: gpio@550000a8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000a8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port19x: gpio@550000b0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000b0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port20x: gpio@550000b8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000b8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port21x: gpio@550000c0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000c0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port22x: gpio@550000c8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000c8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port23x: gpio@550000d0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000d0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port24x: gpio@550000d8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000d8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port25x: gpio@550000e0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000e0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port26x: gpio@550000e8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000e8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port27x: gpio@550000f0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000f0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port28x: gpio@550000f8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000f8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port29x: gpio@55000100 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000100 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port30x: gpio@55000108 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000108 0x8>; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>; + gpio-ranges-group-names = "gpio_range"; + ngpios = <248>; }; i2c0: i2c@58780000 { diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index c304d90874..ac84d15560 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -178,200 +178,19 @@ clock-frequency = <88900000>; }; - port0x: gpio@55000008 { + gpio: gpio@55000000 { compatible = "socionext,uniphier-gpio"; - reg = <0x55000008 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port1x: gpio@55000010 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000010 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port2x: gpio@55000018 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000018 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port3x: gpio@55000020 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000020 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port4: gpio@55000028 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000028 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port5x: gpio@55000030 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000030 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port6x: gpio@55000038 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000038 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port7x: gpio@55000040 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000040 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port8x: gpio@55000048 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000048 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port9x: gpio@55000050 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000050 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port10x: gpio@55000058 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000058 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port12x: gpio@55000068 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000068 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port13x: gpio@55000070 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000070 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port14x: gpio@55000078 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000078 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port15x: gpio@55000080 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000080 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port16x: gpio@55000088 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000088 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port17x: gpio@550000a0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000a0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port18x: gpio@550000a8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000a8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port19x: gpio@550000b0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000b0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port20x: gpio@550000b8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000b8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port21x: gpio@550000c0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000c0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port22x: gpio@550000c8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000c8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port23x: gpio@550000d0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000d0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port24x: gpio@550000d8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000d8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port25x: gpio@550000e0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000e0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port26x: gpio@550000e8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000e8 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port27x: gpio@550000f0 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000f0 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port28x: gpio@550000f8 { - compatible = "socionext,uniphier-gpio"; - reg = <0x550000f8 0x8>; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>, + <&pinctrl 96 0 0>; + gpio-ranges-group-names = "gpio_range0", + "gpio_range1"; + ngpios = <232>; }; i2c0: i2c@58780000 { diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index 8944005ac0..a004bd112f 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -183,7 +183,7 @@ }; gpio: gpio@55000000 { - compatible = "socionext,uniphier-pxs3-gpio"; + compatible = "socionext,uniphier-gpio"; reg = <0x55000000 0x200>; interrupt-parent = <&aidet>; interrupt-controller; @@ -196,6 +196,7 @@ gpio-ranges-group-names = "gpio_range0", "gpio_range1", "gpio_range2"; + ngpios = <286>; }; i2c0: i2c@58780000 { diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index a3de26b40c..70a5ea454c 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -108,116 +108,21 @@ clock-frequency = <80000000>; }; - port0x: gpio@55000008 { + gpio: gpio@55000000 { compatible = "socionext,uniphier-gpio"; - reg = <0x55000008 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port1x: gpio@55000010 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000010 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port2x: gpio@55000018 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000018 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port3x: gpio@55000020 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000020 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port4: gpio@55000028 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000028 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port5x: gpio@55000030 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000030 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port6x: gpio@55000038 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000038 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port7x: gpio@55000040 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000040 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port8x: gpio@55000048 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000048 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port9x: gpio@55000050 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000050 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port10x: gpio@55000058 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000058 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port11x: gpio@55000060 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000060 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port12x: gpio@55000068 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000068 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port13x: gpio@55000070 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000070 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port14x: gpio@55000078 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000078 0x8>; - gpio-controller; - #gpio-cells = <2>; - }; - - port16x: gpio@55000088 { - compatible = "socionext,uniphier-gpio"; - reg = <0x55000088 0x8>; + reg = <0x55000000 0x200>; + interrupt-parent = <&aidet>; + interrupt-controller; + #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 0>, + <&pinctrl 104 0 0>, + <&pinctrl 112 0 0>; + gpio-ranges-group-names = "gpio_range0", + "gpio_range1", + "gpio_range2"; + ngpios = <136>; }; i2c0: i2c@58400000 { diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index 2d9c45e255..26afefb081 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -80,4 +80,5 @@ void enable_thermal_clk(void); void mxs_set_lcdclk(u32 base_addr, u32 freq); void select_ldb_di_clock_source(enum ldb_di_clock clk); void enable_eim_clk(unsigned char enable); +int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); #endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index ba73943260..b22a7a0f8b 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -13,3 +13,6 @@ #define is_usbotg_phy_active(void) (!(readl(USB_PHY0_BASE_ADDR + USBPHY_PWD) & \ USBPHY_PWD_RXPWDRX)) + +int imx6_pcie_toggle_power(void); +int imx6_pcie_toggle_reset(void); diff --git a/arch/arm/include/asm/arch-mx7/crm_regs.h b/arch/arm/include/asm/arch-mx7/crm_regs.h index d65d4d9daf..611190eee7 100644 --- a/arch/arm/include/asm/arch-mx7/crm_regs.h +++ b/arch/arm/include/asm/arch-mx7/crm_regs.h @@ -2000,29 +2000,29 @@ struct mxc_ccm_anatop_reg { #define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR(x) (((uint32_t)(((uint32_t)(x))<<TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_SHIFT))&TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_TOG_T_MUX_ADDR_MASK) -#define CCM_GPR(i) (CCM_BASE_ADDRESS + CCM_GPR0_OFFSET + 0x10 * (i)) -#define CCM_OBSERVE(i) (CCM_BASE_ADDRESS + CCM_OBSERVE0_OFFSET + 0x10 * (i)) -#define CCM_SCTRL(i) (CCM_BASE_ADDRESS + CCM_SCTRL0_OFFSET + 0x10 * (i)) -#define CCM_CCGR(i) (CCM_BASE_ADDRESS + CCM_CCGR0_OFFSET + 0x10 * (i)) -#define CCM_ROOT_TARGET(i) (CCM_BASE_ADDRESS + CCM_ROOT0_TARGET_OFFSET + 0x80 * (i)) - -#define CCM_GPR_SET(i) (CCM_BASE_ADDRESS + CCM_GPR0_OFFSET + 0x10 * (i) + 4) -#define CCM_OBSERVE_SET(i) (CCM_BASE_ADDRESS + CCM_OBSERVE0_OFFSET + 0x10 * (i) + 4) -#define CCM_SCTRL_SET(i) (CCM_BASE_ADDRESS + CCM_SCTRL0_OFFSET + 0x10 * (i) + 4) -#define CCM_CCGR_SET(i) (CCM_BASE_ADDRESS + CCM_CCGR0_OFFSET + 0x10 * (i) + 4) -#define CCM_ROOT_TARGET_SET(i) (CCM_BASE_ADDRESS + CCM_ROOT0_TARGET_OFFSET + 0x80 * (i) + 4) - -#define CCM_GPR_CLR(i) (CCM_BASE_ADDRESS + CCM_GPR0_OFFSET + 0x10 * (i) + 8) -#define CCM_OBSERVE_CLR(i) (CCM_BASE_ADDRESS + CCM_OBSERVE0_OFFSET + 0x10 * (i) + 8) -#define CCM_SCTRL_CLR(i) (CCM_BASE_ADDRESS + CCM_SCTRL0_OFFSET + 0x10 * (i) + 8) -#define CCM_CCGR_CLR(i) (CCM_BASE_ADDRESS + CCM_CCGR0_OFFSET + 0x10 * (i) + 8) -#define CCM_ROOT_TARGET_CLR(i) (CCM_BASE_ADDRESS + CCM_ROOT0_TARGET_OFFSET + 0x80 * (i) + 8) - -#define CCM_GPR_TOGGLE(i) (CCM_BASE_ADDRESS + CCM_GPR0_OFFSET + 0x10 * (i) + 12) -#define CCM_OBSERVE_TOGGLE(i) (CCM_BASE_ADDRESS + CCM_OBSERVE0_OFFSET + 0x10 * (i) + 12) -#define CCM_SCTRL_TOGGLE(i) (CCM_BASE_ADDRESS + CCM_SCTRL0_OFFSET + 0x10 * (i) + 12) -#define CCM_CCGR_TOGGLE(i) (CCM_BASE_ADDRESS + CCM_CCGR0_OFFSET + 0x10 * (i) + 12) -#define CCM_ROOT_TARGET_TOGGLE(i) (CCM_BASE_ADDRESS + CCM_ROOT0_TARGET_OFFSET + 0x80 * (i) + 12) +#define CCM_GPR(i) (CCM_BASE_ADDR + CCM_GPR0_OFFSET + 0x10 * (i)) +#define CCM_OBSERVE(i) (CCM_BASE_ADDR + CCM_OBSERVE0_OFFSET + 0x10 * (i)) +#define CCM_SCTRL(i) (CCM_BASE_ADDR + CCM_SCTRL0_OFFSET + 0x10 * (i)) +#define CCM_CCGR(i) (CCM_BASE_ADDR + CCM_CCGR0_OFFSET + 0x10 * (i)) +#define CCM_ROOT_TARGET(i) (CCM_BASE_ADDR + CCM_ROOT0_TARGET_OFFSET + 0x80 * (i)) + +#define CCM_GPR_SET(i) (CCM_BASE_ADDR + CCM_GPR0_OFFSET + 0x10 * (i) + 4) +#define CCM_OBSERVE_SET(i) (CCM_BASE_ADDR + CCM_OBSERVE0_OFFSET + 0x10 * (i) + 4) +#define CCM_SCTRL_SET(i) (CCM_BASE_ADDR + CCM_SCTRL0_OFFSET + 0x10 * (i) + 4) +#define CCM_CCGR_SET(i) (CCM_BASE_ADDR + CCM_CCGR0_OFFSET + 0x10 * (i) + 4) +#define CCM_ROOT_TARGET_SET(i) (CCM_BASE_ADDR + CCM_ROOT0_TARGET_OFFSET + 0x80 * (i) + 4) + +#define CCM_GPR_CLR(i) (CCM_BASE_ADDR + CCM_GPR0_OFFSET + 0x10 * (i) + 8) +#define CCM_OBSERVE_CLR(i) (CCM_BASE_ADDR + CCM_OBSERVE0_OFFSET + 0x10 * (i) + 8) +#define CCM_SCTRL_CLR(i) (CCM_BASE_ADDR + CCM_SCTRL0_OFFSET + 0x10 * (i) + 8) +#define CCM_CCGR_CLR(i) (CCM_BASE_ADDR + CCM_CCGR0_OFFSET + 0x10 * (i) + 8) +#define CCM_ROOT_TARGET_CLR(i) (CCM_BASE_ADDR + CCM_ROOT0_TARGET_OFFSET + 0x80 * (i) + 8) + +#define CCM_GPR_TOGGLE(i) (CCM_BASE_ADDR + CCM_GPR0_OFFSET + 0x10 * (i) + 12) +#define CCM_OBSERVE_TOGGLE(i) (CCM_BASE_ADDR + CCM_OBSERVE0_OFFSET + 0x10 * (i) + 12) +#define CCM_SCTRL_TOGGLE(i) (CCM_BASE_ADDR + CCM_SCTRL0_OFFSET + 0x10 * (i) + 12) +#define CCM_CCGR_TOGGLE(i) (CCM_BASE_ADDR + CCM_CCGR0_OFFSET + 0x10 * (i) + 12) +#define CCM_ROOT_TARGET_TOGGLE(i) (CCM_BASE_ADDR + CCM_ROOT0_TARGET_OFFSET + 0x80 * (i) + 12) #define HW_CCM_GPR_WR(i, v) writel((v), CCM_GPR(i)) #define HW_CCM_CCM_OBSERVE_WR(i, v) writel((v), CCM_OBSERVE(i)) @@ -2055,6 +2055,11 @@ struct mxc_ccm_anatop_reg { #define HW_CCM_ROOT_TARGET_TOGGLE(i, v) writel((v), CCM_ROOT_TARGET_TOGGLE(i)) #define CCM_CLK_ON_MSK 0x03 +#define CCM_CLK_ON_N_N 0x00 /* Domain clocks not needed */ +#define CCM_CLK_ON_R_W 0x02 /* Domain clocks needed when in RUN and WAIT */ + +/* CCGR Mapping */ +#define CCGR_IDX_DDR 19 /* CCM_CCGR19 */ #define CCM_ROOT_TGT_POST_DIV_SHIFT 0 #define CCM_ROOT_TGT_PRE_DIV_SHIFT 15 diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index aab3a9a7a6..f0693f9028 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -268,6 +268,8 @@ struct src { #define SRC_M4RCR_M4C_NON_SCLR_RST_MASK (1 << 0) #define SRC_M4RCR_ENABLE_M4_OFFSET 3 #define SRC_M4RCR_ENABLE_M4_MASK (1 << 3) +#define SRC_DDRC_RCR_DDRC_CORE_RST_OFFSET 1 +#define SRC_DDRC_RCR_DDRC_CORE_RST_MASK (1 << 1) /* GPR0 Bit Fields */ #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_MASK 0x1u diff --git a/arch/arm/include/asm/arch-mx7/mx7-ddr.h b/arch/arm/include/asm/arch-mx7/mx7-ddr.h new file mode 100644 index 0000000000..3a4841cb02 --- /dev/null +++ b/arch/arm/include/asm/arch-mx7/mx7-ddr.h @@ -0,0 +1,155 @@ +/* + * DDR controller registers of the i.MX7 architecture + * + * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com + * + * Author: Uri Mashiach <uri.mashiach@compulab.co.il> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARCH_MX7_DDR_H__ +#define __ASM_ARCH_MX7_DDR_H__ + +/* DDRC Registers (DDRC_IPS_BASE_ADDR) */ +struct ddrc { + u32 mstr; /* 0x0000 */ + u32 reserved1[0x18]; + u32 rfshtmg; /* 0x0064 */ + u32 reserved2[0x1a]; + u32 init0; /* 0x00d0 */ + u32 init1; /* 0x00d4 */ + u32 reserved3; + u32 init3; /* 0x00dc */ + u32 init4; /* 0x00e0 */ + u32 init5; /* 0x00e4 */ + u32 reserved4[0x03]; + u32 rankctl; /* 0x00f4 */ + u32 reserved5[0x02]; + u32 dramtmg0; /* 0x0100 */ + u32 dramtmg1; /* 0x0104 */ + u32 dramtmg2; /* 0x0108 */ + u32 dramtmg3; /* 0x010c */ + u32 dramtmg4; /* 0x0110 */ + u32 dramtmg5; /* 0x0114 */ + u32 reserved6[0x02]; + u32 dramtmg8; /* 0x0120 */ + u32 reserved7[0x17]; + u32 zqctl0; /* 0x0180 */ + u32 reserved8[0x03]; + u32 dfitmg0; /* 0x0190 */ + u32 dfitmg1; /* 0x0194 */ + u32 reserved9[0x02]; + u32 dfiupd0; /* 0x01a0 */ + u32 dfiupd1; /* 0x01a4 */ + u32 dfiupd2; /* 0x01a8 */ + u32 reserved10[0x15]; + u32 addrmap0; /* 0x0200 */ + u32 addrmap1; /* 0x0204 */ + u32 addrmap2; /* 0x0208 */ + u32 addrmap3; /* 0x020c */ + u32 addrmap4; /* 0x0210 */ + u32 addrmap5; /* 0x0214 */ + u32 addrmap6; /* 0x0218 */ + u32 reserved12[0x09]; + u32 odtcfg; /* 0x0240 */ + u32 odtmap; /* 0x0244 */ +}; + +/* DDRC_MSTR fields */ +#define MSTR_DATA_BUS_WIDTH_MASK 0x3 << 12 +#define MSTR_DATA_BUS_WIDTH_SHIFT 12 +#define MSTR_DATA_ACTIVE_RANKS_MASK 0xf << 24 +#define MSTR_DATA_ACTIVE_RANKS_SHIFT 24 +/* DDRC_ADDRMAP1 fields */ +#define ADDRMAP1_BANK_B0_MASK 0x1f << 0 +#define ADDRMAP1_BANK_B0_SHIFT 0 +#define ADDRMAP1_BANK_B1_MASK 0x1f << 8 +#define ADDRMAP1_BANK_B1_SHIFT 8 +#define ADDRMAP1_BANK_B2_MASK 0x1f << 16 +#define ADDRMAP1_BANK_B2_SHIFT 16 +/* DDRC_ADDRMAP2 fields */ +#define ADDRMAP2_COL_B2_MASK 0xF << 0 +#define ADDRMAP2_COL_B2_SHIFT 0 +#define ADDRMAP2_COL_B3_MASK 0xF << 8 +#define ADDRMAP2_COL_B3_SHIFT 8 +#define ADDRMAP2_COL_B4_MASK 0xF << 16 +#define ADDRMAP2_COL_B4_SHIFT 16 +#define ADDRMAP2_COL_B5_MASK 0xF << 24 +#define ADDRMAP2_COL_B5_SHIFT 24 +/* DDRC_ADDRMAP3 fields */ +#define ADDRMAP3_COL_B6_MASK 0xF << 0 +#define ADDRMAP3_COL_B6_SHIFT 0 +#define ADDRMAP3_COL_B7_MASK 0xF << 8 +#define ADDRMAP3_COL_B7_SHIFT 8 +#define ADDRMAP3_COL_B8_MASK 0xF << 16 +#define ADDRMAP3_COL_B8_SHIFT 16 +#define ADDRMAP3_COL_B9_MASK 0xF << 24 +#define ADDRMAP3_COL_B9_SHIFT 24 +/* DDRC_ADDRMAP4 fields */ +#define ADDRMAP4_COL_B10_MASK 0xF << 0 +#define ADDRMAP4_COL_B10_SHIFT 0 +#define ADDRMAP4_COL_B11_MASK 0xF << 8 +#define ADDRMAP4_COL_B11_SHIFT 8 +/* DDRC_ADDRMAP5 fields */ +#define ADDRMAP5_ROW_B0_MASK 0xF << 0 +#define ADDRMAP5_ROW_B0_SHIFT 0 +#define ADDRMAP5_ROW_B1_MASK 0xF << 8 +#define ADDRMAP5_ROW_B1_SHIFT 8 +#define ADDRMAP5_ROW_B2_10_MASK 0xF << 16 +#define ADDRMAP5_ROW_B2_10_SHIFT 16 +#define ADDRMAP5_ROW_B11_MASK 0xF << 24 +#define ADDRMAP5_ROW_B11_SHIFT 24 +/* DDRC_ADDRMAP6 fields */ +#define ADDRMAP6_ROW_B12_MASK 0xF << 0 +#define ADDRMAP6_ROW_B12_SHIFT 0 +#define ADDRMAP6_ROW_B13_MASK 0xF << 8 +#define ADDRMAP6_ROW_B13_SHIFT 8 +#define ADDRMAP6_ROW_B14_MASK 0xF << 16 +#define ADDRMAP6_ROW_B14_SHIFT 16 +#define ADDRMAP6_ROW_B15_MASK 0xF << 24 +#define ADDRMAP6_ROW_B15_SHIFT 24 + +/* DDRC_MP Registers */ +#define DDRC_MP_BASE_ADDR (DDRC_IPS_BASE_ADDR + 0x03fc) +struct ddrc_mp { + u32 reserved1[0x25]; + u32 pctrl_0; /* 0x0094 */ +}; + +/* DDR_PHY registers */ +struct ddr_phy { + u32 phy_con0; /* 0x0000 */ + u32 phy_con1; /* 0x0004 */ + u32 reserved1[0x02]; + u32 phy_con4; /* 0x0010 */ + u32 reserved2; + u32 offset_lp_con0; /* 0x0018 */ + u32 reserved3; + u32 offset_rd_con0; /* 0x0020 */ + u32 reserved4[0x03]; + u32 offset_wr_con0; /* 0x0030 */ + u32 reserved5[0x07]; + u32 cmd_sdll_con0; /* 0x0050 */ + u32 reserved6[0x12]; + u32 drvds_con0; /* 0x009c */ + u32 reserved7[0x04]; + u32 mdll_con0; /* 0x00b0 */ + u32 reserved8[0x03]; + u32 zq_con0; /* 0x00c0 */ +}; + +#define DDR_PHY_CMD_SDLL_CON0_CTRL_RESYNC_MASK BIT(24) + +#define MX7_CAL_VAL_MAX 5 +/* Calibration parameters */ +struct mx7_calibration { + int num_val; /* Number of calibration values */ + u32 values[MX7_CAL_VAL_MAX]; /* calibration values */ +}; + +void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val, + struct ddr_phy *ddr_phy_regs_val, + struct mx7_calibration *calib_param); + +#endif /*__ASM_ARCH_MX7_DDR_H__ */ diff --git a/arch/arm/include/asm/arch-mx7/sys_proto.h b/arch/arm/include/asm/arch-mx7/sys_proto.h index 15e24d44b3..fa624248b2 100644 --- a/arch/arm/include/asm/arch-mx7/sys_proto.h +++ b/arch/arm/include/asm/arch-mx7/sys_proto.h @@ -7,3 +7,4 @@ #include <asm/mach-imx/sys_proto.h> void set_wdog_reset(struct wdog_regs *wdog); +enum boot_device get_boot_device(void); diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h index 92eb8783a3..169cc5e50b 100644 --- a/arch/arm/include/asm/arch-rockchip/bootrom.h +++ b/arch/arm/include/asm/arch-rockchip/bootrom.h @@ -24,4 +24,22 @@ void back_to_bootrom(void); */ void _back_to_bootrom_s(void); +/** + * Boot-device identifiers as used by the BROM + */ +enum { + BROM_BOOTSOURCE_NAND = 1, + BROM_BOOTSOURCE_EMMC = 2, + BROM_BOOTSOURCE_SPINOR = 3, + BROM_BOOTSOURCE_SPINAND = 4, + BROM_BOOTSOURCE_SD = 5, + BROM_BOOTSOURCE_USB = 10, + BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB +}; + +/** + * Locations of the boot-device identifier in SRAM + */ +#define RK3399_BROM_BOOTSOURCE_ID_ADDR 0xff8c0010 + #endif diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h index 2b1197fd46..5f6a5fbe4c 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h @@ -89,6 +89,11 @@ enum { MCU_CLK_DIV_SHIFT = 0, MCU_CLK_DIV_MASK = GENMASK(4, 0), + /* CLKSEL_CON25 */ + CLK_SARADC_DIV_CON_SHIFT = 8, + CLK_SARADC_DIV_CON_MASK = GENMASK(15, 8), + CLK_SARADC_DIV_CON_WIDTH = 8, + /* CLKSEL43_CON */ GMAC_MUX_SEL_EXTCLK = BIT(8), diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h index 2a1ae692be..ad2dc96467 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h @@ -90,6 +90,11 @@ enum { CORE_CLK_DIV_SHIFT = 0, CORE_CLK_DIV_MASK = 0x1f << CORE_CLK_DIV_SHIFT, + /* CLKSEL_CON22 */ + CLK_SARADC_DIV_CON_SHIFT= 0, + CLK_SARADC_DIV_CON_MASK = GENMASK(9, 0), + CLK_SARADC_DIV_CON_WIDTH= 10, + /* CLKSEL24_CON */ MAC_PLL_SEL_SHIFT = 12, MAC_PLL_SEL_MASK = 1 << MAC_PLL_SEL_SHIFT, diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3036.h b/arch/arm/include/asm/arch-rockchip/grf_rk3036.h index 7625f249bd..d995b7db14 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3036.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3036.h @@ -209,10 +209,10 @@ enum { GPIO1A3_I2S_LRCKTX, GPIO1A2_SHIFT = 4, - GPIO1A2_MASK = 6 << GPIO1A2_SHIFT, + GPIO1A2_MASK = 3 << GPIO1A2_SHIFT, GPIO1A2_GPIO = 0, GPIO1A2_I2S_LRCKRX, - GPIO1A2_I2S_PWM1_0, + GPIO1A2_PWM1_0, GPIO1A1_SHIFT = 2, GPIO1A1_MASK = 1 << GPIO1A1_SHIFT, diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h new file mode 100644 index 0000000000..b40da409d4 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h @@ -0,0 +1,581 @@ +/* + * (C) Copyright 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef _ASM_ARCH_SDRAM_RK322X_H +#define _ASM_ARCH_SDRAM_RK322X_H + +#include <common.h> + +enum { + DDR3 = 3, + LPDDR2 = 5, + LPDDR3 = 6, + UNUSED = 0xFF, +}; + +struct rk322x_sdram_channel { + /* + * bit width in address, eg: + * 8 banks using 3 bit to address, + * 2 cs using 1 bit to address. + */ + u8 rank; + u8 col; + u8 bk; + u8 bw; + u8 dbw; + u8 row_3_4; + u8 cs0_row; + u8 cs1_row; +#if CONFIG_IS_ENABLED(OF_PLATDATA) + /* + * For of-platdata, which would otherwise convert this into two + * byte-swapped integers. With a size of 9 bytes, this struct will + * appear in of-platdata as a byte array. + * + * If OF_PLATDATA enabled, need to add a dummy byte in dts.(i.e 0xff) + */ + u8 dummy; +#endif +}; + +struct rk322x_ddr_pctl { + u32 scfg; + u32 sctl; + u32 stat; + u32 intrstat; + u32 reserved0[(0x40 - 0x10) / 4]; + u32 mcmd; + u32 powctl; + u32 powstat; + u32 cmdtstat; + u32 cmdtstaten; + u32 reserved1[(0x60 - 0x54) / 4]; + u32 mrrcfg0; + u32 mrrstat0; + u32 mrrstat1; + u32 reserved2[(0x7c - 0x6c) / 4]; + + u32 mcfg1; + u32 mcfg; + u32 ppcfg; + u32 mstat; + u32 lpddr2zqcfg; + u32 reserved3; + + u32 dtupdes; + u32 dtuna; + u32 dtune; + u32 dtuprd0; + u32 dtuprd1; + u32 dtuprd2; + u32 dtuprd3; + u32 dtuawdt; + u32 reserved4[(0xc0 - 0xb4) / 4]; + + u32 togcnt1u; + u32 tinit; + u32 trsth; + u32 togcnt100n; + u32 trefi; + u32 tmrd; + u32 trfc; + u32 trp; + u32 trtw; + u32 tal; + u32 tcl; + u32 tcwl; + u32 tras; + u32 trc; + u32 trcd; + u32 trrd; + u32 trtp; + u32 twr; + u32 twtr; + u32 texsr; + u32 txp; + u32 txpdll; + u32 tzqcs; + u32 tzqcsi; + u32 tdqs; + u32 tcksre; + u32 tcksrx; + u32 tcke; + u32 tmod; + u32 trstl; + u32 tzqcl; + u32 tmrr; + u32 tckesr; + u32 tdpd; + u32 tref_mem_ddr3; + u32 reserved5[(0x180 - 0x14c) / 4]; + u32 ecccfg; + u32 ecctst; + u32 eccclr; + u32 ecclog; + u32 reserved6[(0x200 - 0x190) / 4]; + u32 dtuwactl; + u32 dturactl; + u32 dtucfg; + u32 dtuectl; + u32 dtuwd0; + u32 dtuwd1; + u32 dtuwd2; + u32 dtuwd3; + u32 dtuwdm; + u32 dturd0; + u32 dturd1; + u32 dturd2; + u32 dturd3; + u32 dtulfsrwd; + u32 dtulfsrrd; + u32 dtueaf; + /* dfi control registers */ + u32 dfitctrldelay; + u32 dfiodtcfg; + u32 dfiodtcfg1; + u32 dfiodtrankmap; + /* dfi write data registers */ + u32 dfitphywrdata; + u32 dfitphywrlat; + u32 reserved7[(0x260 - 0x258) / 4]; + u32 dfitrddataen; + u32 dfitphyrdlat; + u32 reserved8[(0x270 - 0x268) / 4]; + u32 dfitphyupdtype0; + u32 dfitphyupdtype1; + u32 dfitphyupdtype2; + u32 dfitphyupdtype3; + u32 dfitctrlupdmin; + u32 dfitctrlupdmax; + u32 dfitctrlupddly; + u32 reserved9; + u32 dfiupdcfg; + u32 dfitrefmski; + u32 dfitctrlupdi; + u32 reserved10[(0x2ac - 0x29c) / 4]; + u32 dfitrcfg0; + u32 dfitrstat0; + u32 dfitrwrlvlen; + u32 dfitrrdlvlen; + u32 dfitrrdlvlgateen; + u32 dfiststat0; + u32 dfistcfg0; + u32 dfistcfg1; + u32 reserved11; + u32 dfitdramclken; + u32 dfitdramclkdis; + u32 dfistcfg2; + u32 dfistparclr; + u32 dfistparlog; + u32 reserved12[(0x2f0 - 0x2e4) / 4]; + + u32 dfilpcfg0; + u32 reserved13[(0x300 - 0x2f4) / 4]; + u32 dfitrwrlvlresp0; + u32 dfitrwrlvlresp1; + u32 dfitrwrlvlresp2; + u32 dfitrrdlvlresp0; + u32 dfitrrdlvlresp1; + u32 dfitrrdlvlresp2; + u32 dfitrwrlvldelay0; + u32 dfitrwrlvldelay1; + u32 dfitrwrlvldelay2; + u32 dfitrrdlvldelay0; + u32 dfitrrdlvldelay1; + u32 dfitrrdlvldelay2; + u32 dfitrrdlvlgatedelay0; + u32 dfitrrdlvlgatedelay1; + u32 dfitrrdlvlgatedelay2; + u32 dfitrcmd; + u32 reserved14[(0x3f8 - 0x340) / 4]; + u32 ipvr; + u32 iptr; +}; +check_member(rk322x_ddr_pctl, iptr, 0x03fc); + +struct rk322x_ddr_phy { + u32 ddrphy_reg[0x100]; +}; + +struct rk322x_pctl_timing { + u32 togcnt1u; + u32 tinit; + u32 trsth; + u32 togcnt100n; + u32 trefi; + u32 tmrd; + u32 trfc; + u32 trp; + u32 trtw; + u32 tal; + u32 tcl; + u32 tcwl; + u32 tras; + u32 trc; + u32 trcd; + u32 trrd; + u32 trtp; + u32 twr; + u32 twtr; + u32 texsr; + u32 txp; + u32 txpdll; + u32 tzqcs; + u32 tzqcsi; + u32 tdqs; + u32 tcksre; + u32 tcksrx; + u32 tcke; + u32 tmod; + u32 trstl; + u32 tzqcl; + u32 tmrr; + u32 tckesr; + u32 tdpd; + u32 trefi_mem_ddr3; +}; + +struct rk322x_phy_timing { + u32 mr[4]; + u32 mr11; + u32 bl; + u32 cl_al; +}; + +struct rk322x_msch_timings { + u32 ddrtiming; + u32 ddrmode; + u32 readlatency; + u32 activate; + u32 devtodev; +}; + +struct rk322x_service_sys { + u32 id_coreid; + u32 id_revisionid; + u32 ddrconf; + u32 ddrtiming; + u32 ddrmode; + u32 readlatency; + u32 activate; + u32 devtodev; +}; + +struct rk322x_base_params { + struct rk322x_msch_timings noc_timing; + u32 ddrconfig; + u32 ddr_freq; + u32 dramtype; + /* + * unused for rk322x + */ + u32 stride; + u32 odt; +}; + +/* PCT_DFISTCFG0 */ +#define DFI_INIT_START BIT(0) +#define DFI_DATA_BYTE_DISABLE_EN BIT(2) + +/* PCT_DFISTCFG1 */ +#define DFI_DRAM_CLK_SR_EN BIT(0) +#define DFI_DRAM_CLK_DPD_EN BIT(1) + +/* PCT_DFISTCFG2 */ +#define DFI_PARITY_INTR_EN BIT(0) +#define DFI_PARITY_EN BIT(1) + +/* PCT_DFILPCFG0 */ +#define TLP_RESP_TIME_SHIFT 16 +#define LP_SR_EN BIT(8) +#define LP_PD_EN BIT(0) + +/* PCT_DFITCTRLDELAY */ +#define TCTRL_DELAY_TIME_SHIFT 0 + +/* PCT_DFITPHYWRDATA */ +#define TPHY_WRDATA_TIME_SHIFT 0 + +/* PCT_DFITPHYRDLAT */ +#define TPHY_RDLAT_TIME_SHIFT 0 + +/* PCT_DFITDRAMCLKDIS */ +#define TDRAM_CLK_DIS_TIME_SHIFT 0 + +/* PCT_DFITDRAMCLKEN */ +#define TDRAM_CLK_EN_TIME_SHIFT 0 + +/* PCTL_DFIODTCFG */ +#define RANK0_ODT_WRITE_SEL BIT(3) +#define RANK1_ODT_WRITE_SEL BIT(11) + +/* PCTL_DFIODTCFG1 */ +#define ODT_LEN_BL8_W_SHIFT 16 + +/* PUBL_ACDLLCR */ +#define ACDLLCR_DLLDIS BIT(31) +#define ACDLLCR_DLLSRST BIT(30) + +/* PUBL_DXDLLCR */ +#define DXDLLCR_DLLDIS BIT(31) +#define DXDLLCR_DLLSRST BIT(30) + +/* PUBL_DLLGCR */ +#define DLLGCR_SBIAS BIT(30) + +/* PUBL_DXGCR */ +#define DQSRTT BIT(9) +#define DQRTT BIT(10) + +/* PIR */ +#define PIR_INIT BIT(0) +#define PIR_DLLSRST BIT(1) +#define PIR_DLLLOCK BIT(2) +#define PIR_ZCAL BIT(3) +#define PIR_ITMSRST BIT(4) +#define PIR_DRAMRST BIT(5) +#define PIR_DRAMINIT BIT(6) +#define PIR_QSTRN BIT(7) +#define PIR_RVTRN BIT(8) +#define PIR_ICPC BIT(16) +#define PIR_DLLBYP BIT(17) +#define PIR_CTLDINIT BIT(18) +#define PIR_CLRSR BIT(28) +#define PIR_LOCKBYP BIT(29) +#define PIR_ZCALBYP BIT(30) +#define PIR_INITBYP BIT(31) + +/* PGCR */ +#define PGCR_DFTLMT_SHIFT 3 +#define PGCR_DFTCMP_SHIFT 2 +#define PGCR_DQSCFG_SHIFT 1 +#define PGCR_ITMDMD_SHIFT 0 + +/* PGSR */ +#define PGSR_IDONE BIT(0) +#define PGSR_DLDONE BIT(1) +#define PGSR_ZCDONE BIT(2) +#define PGSR_DIDONE BIT(3) +#define PGSR_DTDONE BIT(4) +#define PGSR_DTERR BIT(5) +#define PGSR_DTIERR BIT(6) +#define PGSR_DFTERR BIT(7) +#define PGSR_RVERR BIT(8) +#define PGSR_RVEIRR BIT(9) + +/* PTR0 */ +#define PRT_ITMSRST_SHIFT 18 +#define PRT_DLLLOCK_SHIFT 6 +#define PRT_DLLSRST_SHIFT 0 + +/* PTR1 */ +#define PRT_DINIT0_SHIFT 0 +#define PRT_DINIT1_SHIFT 19 + +/* PTR2 */ +#define PRT_DINIT2_SHIFT 0 +#define PRT_DINIT3_SHIFT 17 + +/* DCR */ +#define DDRMD_LPDDR 0 +#define DDRMD_DDR 1 +#define DDRMD_DDR2 2 +#define DDRMD_DDR3 3 +#define DDRMD_LPDDR2_LPDDR3 4 +#define DDRMD_MASK 7 +#define DDRMD_SHIFT 0 +#define PDQ_MASK 7 +#define PDQ_SHIFT 4 + +/* DXCCR */ +#define DQSNRES_MASK 0xf +#define DQSNRES_SHIFT 8 +#define DQSRES_MASK 0xf +#define DQSRES_SHIFT 4 + +/* DTPR */ +#define TDQSCKMAX_SHIFT 27 +#define TDQSCKMAX_MASK 7 +#define TDQSCK_SHIFT 24 +#define TDQSCK_MASK 7 + +/* DSGCR */ +#define DQSGX_SHIFT 5 +#define DQSGX_MASK 7 +#define DQSGE_SHIFT 8 +#define DQSGE_MASK 7 + +/* SCTL */ +#define INIT_STATE 0 +#define CFG_STATE 1 +#define GO_STATE 2 +#define SLEEP_STATE 3 +#define WAKEUP_STATE 4 + +/* STAT */ +#define LP_TRIG_SHIFT 4 +#define LP_TRIG_MASK 7 +#define PCTL_STAT_MASK 7 +#define INIT_MEM 0 +#define CONFIG 1 +#define CONFIG_REQ 2 +#define ACCESS 3 +#define ACCESS_REQ 4 +#define LOW_POWER 5 +#define LOW_POWER_ENTRY_REQ 6 +#define LOW_POWER_EXIT_REQ 7 + +/* ZQCR*/ +#define PD_OUTPUT_SHIFT 0 +#define PU_OUTPUT_SHIFT 5 +#define PD_ONDIE_SHIFT 10 +#define PU_ONDIE_SHIFT 15 +#define ZDEN_SHIFT 28 + +/* DDLGCR */ +#define SBIAS_BYPASS BIT(23) + +/* MCFG */ +#define MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT 24 +#define PD_IDLE_SHIFT 8 +#define MDDR_EN (2 << 22) +#define LPDDR2_EN (3 << 22) +#define LPDDR3_EN (1 << 22) +#define DDR2_EN (0 << 5) +#define DDR3_EN (1 << 5) +#define LPDDR2_S2 (0 << 6) +#define LPDDR2_S4 (1 << 6) +#define MDDR_LPDDR2_BL_2 (0 << 20) +#define MDDR_LPDDR2_BL_4 (1 << 20) +#define MDDR_LPDDR2_BL_8 (2 << 20) +#define MDDR_LPDDR2_BL_16 (3 << 20) +#define DDR2_DDR3_BL_4 0 +#define DDR2_DDR3_BL_8 1 +#define TFAW_SHIFT 18 +#define PD_EXIT_SLOW (0 << 17) +#define PD_EXIT_FAST (1 << 17) +#define PD_TYPE_SHIFT 16 +#define BURSTLENGTH_SHIFT 20 + +/* POWCTL */ +#define POWER_UP_START BIT(0) + +/* POWSTAT */ +#define POWER_UP_DONE BIT(0) + +/* MCMD */ +enum { + DESELECT_CMD = 0, + PREA_CMD, + REF_CMD, + MRS_CMD, + ZQCS_CMD, + ZQCL_CMD, + RSTL_CMD, + MRR_CMD = 8, + DPDE_CMD, +}; + +#define BANK_ADDR_MASK 7 +#define BANK_ADDR_SHIFT 17 +#define CMD_ADDR_MASK 0x1fff +#define CMD_ADDR_SHIFT 4 + +#define LPDDR23_MA_SHIFT 4 +#define LPDDR23_MA_MASK 0xff +#define LPDDR23_OP_SHIFT 12 +#define LPDDR23_OP_MASK 0xff + +#define START_CMD (1u << 31) + +/* DDRPHY REG */ +enum { + /* DDRPHY_REG0 */ + SOFT_RESET_MASK = 3, + SOFT_DERESET_ANALOG = 1 << 2, + SOFT_DERESET_DIGITAL = 1 << 3, + SOFT_RESET_SHIFT = 2, + + /* DDRPHY REG1 */ + PHY_DDR3 = 0, + PHY_DDR2 = 1, + PHY_LPDDR3 = 2, + PHY_LPDDR2 = 3, + + PHT_BL_8 = 1 << 2, + PHY_BL_4 = 0 << 2, + + /* DDRPHY_REG2 */ + MEMORY_SELECT_DDR3 = 0 << 0, + MEMORY_SELECT_LPDDR3 = 2 << 0, + MEMORY_SELECT_LPDDR2 = 3 << 0, + DQS_SQU_CAL_SEL_CS0_CS1 = 0 << 4, + DQS_SQU_CAL_SEL_CS1 = 1 << 4, + DQS_SQU_CAL_SEL_CS0 = 2 << 4, + DQS_SQU_CAL_NORMAL_MODE = 0 << 1, + DQS_SQU_CAL_BYPASS_MODE = 1 << 1, + DQS_SQU_CAL_START = 1 << 0, + DQS_SQU_NO_CAL = 0 << 0, +}; + +/* CK pull up/down driver strength control */ +enum { + PHY_RON_RTT_DISABLE = 0, + PHY_RON_RTT_451OHM = 1, + PHY_RON_RTT_225OHM, + PHY_RON_RTT_150OHM, + PHY_RON_RTT_112OHM, + PHY_RON_RTT_90OHM, + PHY_RON_RTT_75OHM, + PHY_RON_RTT_64OHM = 7, + + PHY_RON_RTT_56OHM = 16, + PHY_RON_RTT_50OHM, + PHY_RON_RTT_45OHM, + PHY_RON_RTT_41OHM, + PHY_RON_RTT_37OHM, + PHY_RON_RTT_34OHM, + PHY_RON_RTT_33OHM, + PHY_RON_RTT_30OHM = 23, + + PHY_RON_RTT_28OHM = 24, + PHY_RON_RTT_26OHM, + PHY_RON_RTT_25OHM, + PHY_RON_RTT_23OHM, + PHY_RON_RTT_22OHM, + PHY_RON_RTT_21OHM, + PHY_RON_RTT_20OHM, + PHY_RON_RTT_19OHM = 31, +}; + +/* DQS squelch DLL delay */ +enum { + DQS_DLL_NO_DELAY = 0, + DQS_DLL_22P5_DELAY, + DQS_DLL_45_DELAY, + DQS_DLL_67P5_DELAY, + DQS_DLL_90_DELAY, + DQS_DLL_112P5_DELAY, + DQS_DLL_135_DELAY, + DQS_DLL_157P5_DELAY, +}; + +/* GRF_SOC_CON0 */ +#define GRF_DDR_16BIT_EN (((0x1 << 0) << 16) | (0x1 << 0)) +#define GRF_DDR_32BIT_EN (((0x1 << 0) << 16) | (0x0 << 0)) +#define GRF_MSCH_NOC_16BIT_EN (((0x1 << 7) << 16) | (0x1 << 7)) +#define GRF_MSCH_NOC_32BIT_EN (((0x1 << 7) << 16) | (0x0 << 7)) + +#define GRF_DDRPHY_BUFFEREN_CORE_EN (((0x1 << 8) << 16) | (0x0 << 8)) +#define GRF_DDRPHY_BUFFEREN_CORE_DIS (((0x1 << 8) << 16) | (0x1 << 8)) + +#define GRF_DDR3_EN (((0x1 << 6) << 16) | (0x1 << 6)) +#define GRF_LPDDR2_3_EN (((0x1 << 6) << 16) | (0x0 << 6)) + +#define PHY_DRV_ODT_SET(n) (((n) << 4) | (n)) +#define DDR3_DLL_RESET (1 << 8) + +#endif /* _ASM_ARCH_SDRAM_RK322X_H */ diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h index 35423e1ba0..e428d59336 100644 --- a/arch/arm/include/asm/arch-rockchip/sys_proto.h +++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h @@ -7,4 +7,27 @@ #ifndef _ASM_ARCH_SYS_PROTO_H #define _ASM_ARCH_SYS_PROTO_H +#ifdef CONFIG_ROCKCHIP_RK3288 +#include <asm/armv7.h> + +static void configure_l2ctlr(void) +{ + uint32_t l2ctlr; + + l2ctlr = read_l2ctlr(); + l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */ + + /* + * Data RAM write latency: 2 cycles + * Data RAM read latency: 2 cycles + * Data RAM setup latency: 1 cycle + * Tag RAM write latency: 1 cycle + * Tag RAM read latency: 1 cycle + * Tag RAM setup latency: 1 cycle + */ + l2ctlr |= (1 << 3 | 1 << 0); + write_l2ctlr(l2ctlr); +} +#endif /* CONFIG_ROCKCHIP_RK3288 */ + #endif /* _ASM_ARCH_SYS_PROTO_H */ diff --git a/arch/arm/include/asm/arch-sunxi/spl.h b/arch/arm/include/asm/arch-sunxi/spl.h index 9358397da2..a70b1797e5 100644 --- a/arch/arm/include/asm/arch-sunxi/spl.h +++ b/arch/arm/include/asm/arch-sunxi/spl.h @@ -78,4 +78,6 @@ typedef char boot_file_head_not_multiple_of_32[1 - 2*(sizeof(struct boot_file_he #define is_boot0_magic(addr) (memcmp((void *)addr, BOOT0_MAGIC, 8) == 0) +uint32_t sunxi_get_boot_device(void); + #endif diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h b/arch/arm/include/asm/arch-sunxi/usb_phy.h index cef6c985bc..5a9cacb6f4 100644 --- a/arch/arm/include/asm/arch-sunxi/usb_phy.h +++ b/arch/arm/include/asm/arch-sunxi/usb_phy.h @@ -19,10 +19,3 @@ void sunxi_usb_phy_power_off(int index); int sunxi_usb_phy_vbus_detect(int index); int sunxi_usb_phy_id_detect(int index); void sunxi_usb_phy_enable_squelch_detect(int index, int enable); - -/* Not really phy related, but we have to declare this somewhere ... */ -#if defined(CONFIG_USB_MUSB_HOST) || defined(CONFIG_USB_MUSB_GADGET) -void sunxi_musb_board_init(void); -#else -#define sunxi_musb_board_init() -#endif diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h index a20702e612..efc515eb33 100644 --- a/arch/arm/include/asm/armv7.h +++ b/arch/arm/include/asm/armv7.h @@ -61,6 +61,27 @@ #include <asm/io.h> #include <asm/barriers.h> +/* read L2 control register (L2CTLR) */ +static inline uint32_t read_l2ctlr(void) +{ + uint32_t val = 0; + + asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val)); + + return val; +} + +/* write L2 control register (L2CTLR) */ +static inline void write_l2ctlr(uint32_t val) +{ + /* + * Note: L2CTLR can only be written when the L2 memory system + * is idle, ie before the MMU is enabled. + */ + asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory"); + isb(); +} + /* * Workaround for ARM errata # 798870 * Set L2ACTLR[7] to reissue any memory transaction in the L2 that has been diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 5834f5b3dc..5df74728de 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -35,35 +35,6 @@ static inline void sync(void) } /* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)((unsigned long)paddr); -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - -static inline phys_addr_t virt_to_phys(void * vaddr) -{ - return (phys_addr_t)((unsigned long)vaddr); -} - -/* * Generic virtual read/write. Note that we don't support half-word * read/writes. We define __arch_*[bl] here, and leave __arch_*w * to the architecture specific code. @@ -426,6 +397,7 @@ out: #endif /* __mem_isa */ #endif /* __KERNEL__ */ +#include <asm-generic/io.h> #include <iotrace.h> #endif /* __ASM_ARM_IO_H */ diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 970c4ca760..703634334f 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -107,6 +107,8 @@ void init_aips(void); void init_src(void); void imx_set_wdog_powerdown(bool enable); +int board_mmc_get_env_dev(int devno); + /* * Initializes on-chip ethernet controllers. * to override, implement board_eth_init() diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index e1916f7705..0c8652a675 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -131,6 +131,7 @@ lr .req x30 /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg1, mpidr_el1 lsr \xreg2, \xreg1, #32 + lsl \xreg2, \xreg2, #32 lsl \xreg1, \xreg1, #40 lsr \xreg1, \xreg1, #40 orr \xreg1, \xreg1, \xreg2 diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 79bd19af7d..1d7d4f35c4 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -215,8 +215,8 @@ void __asm_switch_ttbr(u64 new_ttbr); * @entry_point: kernel entry point * @es_flag: execution state flag, ES_TO_AARCH64 or ES_TO_AARCH32 */ -void armv8_switch_to_el2(u64 args, u64 mach_nr, u64 fdt_addr, - u64 arg4, u64 entry_point, u64 es_flag); +void __noreturn armv8_switch_to_el2(u64 args, u64 mach_nr, u64 fdt_addr, + u64 arg4, u64 entry_point, u64 es_flag); /* * Switch from EL2 to EL1 for ARMv8 * diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 62fad452b2..9c46c93ca4 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -95,8 +95,7 @@ ENTRY(_main) */ ldr x0, [x18, #GD_START_ADDR_SP] /* x0 <- gd->start_addr_sp */ bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */ - ldr x18, [x18, #GD_BD] /* x18 <- gd->bd */ - sub x18, x18, #GD_SIZE /* new GD is below bd */ + ldr x18, [x18, #GD_NEW_GD] /* x18 <- gd->new_gd */ adr lr, relocation_return ldr x9, [x18, #GD_RELOC_OFF] /* x9 <- gd->reloc_off */ diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S index c760053706..fdba004363 100644 --- a/arch/arm/lib/relocate_64.S +++ b/arch/arm/lib/relocate_64.S @@ -73,6 +73,6 @@ relocate_done: isb sy 4: ldp x0, x1, [sp, #16] bl __asm_flush_dcache_range -5: ldp x29, x30, [sp],#16 +5: ldp x29, x30, [sp],#32 ret ENDPROC(relocate_code) diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c index 27d6682c0b..ab5d2277aa 100644 --- a/arch/arm/lib/spl.c +++ b/arch/arm/lib/spl.c @@ -7,6 +7,7 @@ * * SPDX-License-Identifier: GPL-2.0+ */ + #include <common.h> #include <config.h> #include <spl.h> @@ -47,6 +48,15 @@ void __weak board_init_f(ulong dummy) * image. */ #ifdef CONFIG_SPL_OS_BOOT +#ifdef CONFIG_ARM64 +void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) +{ + debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg); + cleanup_before_linux(); + armv8_switch_to_el2((u64)spl_image->arg, 0, 0, 0, + spl_image->entry_point, ES_TO_AARCH64); +} +#else void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) { unsigned long machid = 0xffffffff; @@ -62,4 +72,5 @@ void __noreturn jump_to_image_linux(struct spl_image_info *spl_image) cleanup_before_linux(); image_entry(0, machid, spl_image->arg); } +#endif /* CONFIG_ARM64 */ #endif diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 0e71b69a19..7e85b69679 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -141,6 +141,7 @@ config TARGET_AT91SAM9X5EK select AT91SAM9X5 select SUPPORT_SPL select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT config TARGET_SAMA5D2_PTC bool "SAMA5D2 PTC board" @@ -153,6 +154,7 @@ config TARGET_SAMA5D2_XPLAINED select SAMA5D2 select SUPPORT_SPL select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT config TARGET_SAMA5D27_SOM1_EK bool "SAMA5D27 SOM1 EK board" @@ -185,12 +187,14 @@ config TARGET_SAMA5D4_XPLAINED select SAMA5D4 select SUPPORT_SPL select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT config TARGET_SAMA5D4EK bool "SAMA5D4 Evaluation Kit" select SAMA5D4 select SUPPORT_SPL select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT config TARGET_MA5D4EVK bool "Aries MA5D4EVK Evaluation Kit" diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c index 912a966bae..bb3e36552a 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c @@ -58,7 +58,7 @@ void at91_seriald_hw_init(void) at91_periph_clk_enable(ATMEL_ID_SYS); } -#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) +#ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */ diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c index 4bd4e75e0b..58050a2a24 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c @@ -55,7 +55,7 @@ void at91_seriald_hw_init(void) at91_periph_clk_enable(ATMEL_ID_SYS); } -#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) +#ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */ diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c index f3f480010a..674eb66e8e 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c @@ -59,7 +59,7 @@ void at91_seriald_hw_init(void) at91_periph_clk_enable(ATMEL_ID_SYS); } -#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) +#ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { at91_set_b_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */ diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c index eddfdb0853..b9efa273a0 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c @@ -56,7 +56,7 @@ void at91_seriald_hw_init(void) at91_periph_clk_enable(ATMEL_ID_SYS); } -#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) +#ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI0_MISO */ diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c index dbf9386faa..cd38c6597a 100644 --- a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c @@ -55,7 +55,7 @@ void at91_seriald_hw_init(void) at91_periph_clk_enable(ATMEL_ID_SYS); } -#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) +#ifdef CONFIG_ATMEL_SPI void at91_spi0_hw_init(unsigned long cs_mask) { at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* SPI0_MISO */ diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 1017eb84f9..18205dc984 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -25,7 +25,7 @@ #include <fsl_esdhc.h> #endif -#if defined(CONFIG_DISPLAY_CPUINFO) +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) static u32 reset_cause = -1; static char *get_reset_cause(void) @@ -132,7 +132,7 @@ unsigned imx_ddr_size(void) } #endif -#if defined(CONFIG_DISPLAY_CPUINFO) +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) const char *get_imx_type(u32 imxtype) { diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 540f2b29b1..b82db3af22 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -129,6 +129,15 @@ config TARGET_COLIBRI_IMX6 select DM_SERIAL select DM_THERMAL +config TARGET_DHCOMIMX6 + bool "dh_imx6" + select BOARD_LATE_INIT + select BOARD_EARLY_INIT_F + select SUPPORT_SPL + select DM + select DM_THERMAL + imply CMD_SPL + config TARGET_EMBESTMX6BOARDS bool "embestmx6boards" select BOARD_LATE_INIT @@ -428,6 +437,7 @@ source "board/boundary/nitrogen6x/Kconfig" source "board/ccv/xpress/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" +source "board/dhelectronics/dh_imx6/Kconfig" source "board/el/el6x/Kconfig" source "board/embest/mx6boards/Kconfig" source "board/engicam/geam6ul/Kconfig" diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index 0e019c4262..71a9e6bca0 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -1220,6 +1220,20 @@ void enable_thermal_clk(void) enable_pll3(); } +#ifdef CONFIG_MTD_NOR_FLASH +void enable_eim_clk(unsigned char enable) +{ + u32 reg; + + reg = __raw_readl(&imx_ccm->CCGR6); + if (enable) + reg |= MXC_CCM_CCGR6_EMI_SLOW_MASK; + else + reg &= ~MXC_CCM_CCGR6_EMI_SLOW_MASK; + __raw_writel(reg, &imx_ccm->CCGR6); +} +#endif + unsigned int mxc_get_clock(enum mxc_clock clk) { switch (clk) { @@ -1262,6 +1276,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return 0; } +#ifndef CONFIG_SPL_BUILD /* * Dump some core clockes. */ @@ -1463,20 +1478,6 @@ void select_ldb_di_clock_source(enum ldb_di_clock clk) } #endif -#ifdef CONFIG_MTD_NOR_FLASH -void enable_eim_clk(unsigned char enable) -{ - u32 reg; - - reg = __raw_readl(&imx_ccm->CCGR6); - if (enable) - reg |= MXC_CCM_CCGR6_EMI_SLOW_MASK; - else - reg &= ~MXC_CCM_CCGR6_EMI_SLOW_MASK; - __raw_writel(reg, &imx_ccm->CCGR6); -} -#endif - /***************************************************/ U_BOOT_CMD( @@ -1484,3 +1485,4 @@ U_BOOT_CMD( "display clocks", "" ); +#endif diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index b72466808c..ad72c12511 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -13,6 +13,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> +#include <asm/bootm.h> #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/dma.h> #include <asm/mach-imx/hab.h> diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index aea85265ef..365501d518 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -18,6 +18,13 @@ choice prompt "MX7 board select" optional +config TARGET_CL_SOM_IMX7 + bool "CL-SOM-iMX7" + select MX7D + select DM + select DM_THERMAL + select SUPPORT_SPL + config TARGET_MX7DSABRESD bool "mx7dsabresd" select BOARD_LATE_INIT @@ -51,6 +58,7 @@ endchoice config SYS_SOC default "mx7" +source "board/compulab/cl-som-imx7/Kconfig" source "board/freescale/mx7dsabresd/Kconfig" source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" diff --git a/arch/arm/mach-imx/mx7/Makefile b/arch/arm/mach-imx/mx7/Makefile index d21f87f18c..ce289c1415 100644 --- a/arch/arm/mach-imx/mx7/Makefile +++ b/arch/arm/mach-imx/mx7/Makefile @@ -5,7 +5,7 @@ # # -obj-y := soc.o clock.o clock_slice.o +obj-y := soc.o clock.o clock_slice.o ddr.o ifdef CONFIG_ARMV7_PSCI obj-y += psci-mx7.o psci.o diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c new file mode 100644 index 0000000000..9268ad9470 --- /dev/null +++ b/arch/arm/mach-imx/mx7/ddr.c @@ -0,0 +1,201 @@ +/* + * DDR controller configuration for the i.MX7 architecture + * + * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com + * + * Author: Uri Mashiach <uri.mashiach@compulab.co.il> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/types.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx7-ddr.h> +#include <common.h> + +/* + * Routine: mx7_dram_cfg + * Description: DDR controller configuration + * + * @ddrc_regs_val: DDRC registers value + * @ddrc_mp_val: DDRC_MP registers value + * @ddr_phy_regs_val: DDR_PHY registers value + * @calib_param: calibration parameters + * + */ +void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val, + struct ddr_phy *ddr_phy_regs_val, + struct mx7_calibration *calib_param) +{ + struct src *const src_regs = (struct src *)SRC_BASE_ADDR; + struct ddrc *const ddrc_regs = (struct ddrc *)DDRC_IPS_BASE_ADDR; + struct ddrc_mp *const ddrc_mp_reg = (struct ddrc_mp *)DDRC_MP_BASE_ADDR; + struct ddr_phy *const ddr_phy_regs = + (struct ddr_phy *)DDRPHY_IPS_BASE_ADDR; + struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + int i; + + /* Assert DDR Controller preset and DDR PHY reset */ + writel(SRC_DDRC_RCR_DDRC_CORE_RST_MASK, &src_regs->ddrc_rcr); + + /* DDR controller configuration */ + writel(ddrc_regs_val->mstr, &ddrc_regs->mstr); + writel(ddrc_regs_val->rfshtmg, &ddrc_regs->rfshtmg); + writel(ddrc_mp_val->pctrl_0, &ddrc_mp_reg->pctrl_0); + writel(ddrc_regs_val->init1, &ddrc_regs->init1); + writel(ddrc_regs_val->init0, &ddrc_regs->init0); + writel(ddrc_regs_val->init3, &ddrc_regs->init3); + writel(ddrc_regs_val->init4, &ddrc_regs->init4); + writel(ddrc_regs_val->init5, &ddrc_regs->init5); + writel(ddrc_regs_val->rankctl, &ddrc_regs->rankctl); + writel(ddrc_regs_val->dramtmg0, &ddrc_regs->dramtmg0); + writel(ddrc_regs_val->dramtmg1, &ddrc_regs->dramtmg1); + writel(ddrc_regs_val->dramtmg2, &ddrc_regs->dramtmg2); + writel(ddrc_regs_val->dramtmg3, &ddrc_regs->dramtmg3); + writel(ddrc_regs_val->dramtmg4, &ddrc_regs->dramtmg4); + writel(ddrc_regs_val->dramtmg5, &ddrc_regs->dramtmg5); + writel(ddrc_regs_val->dramtmg8, &ddrc_regs->dramtmg8); + writel(ddrc_regs_val->zqctl0, &ddrc_regs->zqctl0); + writel(ddrc_regs_val->dfitmg0, &ddrc_regs->dfitmg0); + writel(ddrc_regs_val->dfitmg1, &ddrc_regs->dfitmg1); + writel(ddrc_regs_val->dfiupd0, &ddrc_regs->dfiupd0); + writel(ddrc_regs_val->dfiupd1, &ddrc_regs->dfiupd1); + writel(ddrc_regs_val->dfiupd2, &ddrc_regs->dfiupd2); + writel(ddrc_regs_val->addrmap0, &ddrc_regs->addrmap0); + writel(ddrc_regs_val->addrmap1, &ddrc_regs->addrmap1); + writel(ddrc_regs_val->addrmap4, &ddrc_regs->addrmap4); + writel(ddrc_regs_val->addrmap5, &ddrc_regs->addrmap5); + writel(ddrc_regs_val->addrmap6, &ddrc_regs->addrmap6); + writel(ddrc_regs_val->odtcfg, &ddrc_regs->odtcfg); + writel(ddrc_regs_val->odtmap, &ddrc_regs->odtmap); + + /* De-assert DDR Controller preset and DDR PHY reset */ + clrbits_le32(&src_regs->ddrc_rcr, SRC_DDRC_RCR_DDRC_CORE_RST_MASK); + + /* PHY configuration */ + writel(ddr_phy_regs_val->phy_con0, &ddr_phy_regs->phy_con0); + writel(ddr_phy_regs_val->phy_con1, &ddr_phy_regs->phy_con1); + writel(ddr_phy_regs_val->phy_con4, &ddr_phy_regs->phy_con4); + writel(ddr_phy_regs_val->mdll_con0, &ddr_phy_regs->mdll_con0); + writel(ddr_phy_regs_val->drvds_con0, &ddr_phy_regs->drvds_con0); + writel(ddr_phy_regs_val->offset_wr_con0, &ddr_phy_regs->offset_wr_con0); + writel(ddr_phy_regs_val->offset_rd_con0, &ddr_phy_regs->offset_rd_con0); + writel(ddr_phy_regs_val->cmd_sdll_con0 | + DDR_PHY_CMD_SDLL_CON0_CTRL_RESYNC_MASK, + &ddr_phy_regs->cmd_sdll_con0); + writel(ddr_phy_regs_val->cmd_sdll_con0 & + ~DDR_PHY_CMD_SDLL_CON0_CTRL_RESYNC_MASK, + &ddr_phy_regs->cmd_sdll_con0); + writel(ddr_phy_regs_val->offset_lp_con0, &ddr_phy_regs->offset_lp_con0); + + /* calibration */ + for (i = 0; i < calib_param->num_val; i++) + writel(calib_param->values[i], &ddr_phy_regs->zq_con0); + + /* Wake_up DDR PHY */ + HW_CCM_CCGR_WR(CCGR_IDX_DDR, CCM_CLK_ON_N_N); + writel(IOMUXC_GPR_GPR8_ddr_phy_ctrl_wake_up(0xf) | + IOMUXC_GPR_GPR8_ddr_phy_dfi_init_start_MASK, + &iomuxc_gpr_regs->gpr[8]); + HW_CCM_CCGR_WR(CCGR_IDX_DDR, CCM_CLK_ON_R_W); +} + +/* + * Routine: imx_ddr_size + * Description: extract the current DRAM size from the DDRC registers + * + * @return: DRAM size + */ +unsigned int imx_ddr_size(void) +{ + struct ddrc *const ddrc_regs = (struct ddrc *)DDRC_IPS_BASE_ADDR; + u32 reg_val, field_val; + int bits = 0;/* Number of address bits */ + + /* Count data bus width bits */ + reg_val = readl(&ddrc_regs->mstr); + field_val = (reg_val & MSTR_DATA_BUS_WIDTH_MASK) >> MSTR_DATA_BUS_WIDTH_SHIFT; + bits += 2 - field_val; + /* Count rank address bits */ + field_val = (reg_val & MSTR_DATA_ACTIVE_RANKS_MASK) >> MSTR_DATA_ACTIVE_RANKS_SHIFT; + if (field_val > 1) + bits += field_val - 1; + /* Count column address bits */ + bits += 2;/* Column address 0 and 1 are fixed mapped */ + reg_val = readl(&ddrc_regs->addrmap2); + field_val = (reg_val & ADDRMAP2_COL_B2_MASK) >> ADDRMAP2_COL_B2_SHIFT; + if (field_val <= 7) + bits++; + field_val = (reg_val & ADDRMAP2_COL_B3_MASK) >> ADDRMAP2_COL_B3_SHIFT; + if (field_val <= 7) + bits++; + field_val = (reg_val & ADDRMAP2_COL_B4_MASK) >> ADDRMAP2_COL_B4_SHIFT; + if (field_val <= 7) + bits++; + field_val = (reg_val & ADDRMAP2_COL_B5_MASK) >> ADDRMAP2_COL_B5_SHIFT; + if (field_val <= 7) + bits++; + reg_val = readl(&ddrc_regs->addrmap3); + field_val = (reg_val & ADDRMAP3_COL_B6_MASK) >> ADDRMAP3_COL_B6_SHIFT; + if (field_val <= 7) + bits++; + field_val = (reg_val & ADDRMAP3_COL_B7_MASK) >> ADDRMAP3_COL_B7_SHIFT; + if (field_val <= 7) + bits++; + field_val = (reg_val & ADDRMAP3_COL_B8_MASK) >> ADDRMAP3_COL_B8_SHIFT; + if (field_val <= 7) + bits++; + field_val = (reg_val & ADDRMAP3_COL_B9_MASK) >> ADDRMAP3_COL_B9_SHIFT; + if (field_val <= 7) + bits++; + reg_val = readl(&ddrc_regs->addrmap4); + field_val = (reg_val & ADDRMAP4_COL_B10_MASK) >> ADDRMAP4_COL_B10_SHIFT; + if (field_val <= 7) + bits++; + field_val = (reg_val & ADDRMAP4_COL_B11_MASK) >> ADDRMAP4_COL_B11_SHIFT; + if (field_val <= 7) + bits++; + /* Count row address bits */ + reg_val = readl(&ddrc_regs->addrmap5); + field_val = (reg_val & ADDRMAP5_ROW_B0_MASK) >> ADDRMAP5_ROW_B0_SHIFT; + if (field_val <= 11) + bits++; + field_val = (reg_val & ADDRMAP5_ROW_B1_MASK) >> ADDRMAP5_ROW_B1_SHIFT; + if (field_val <= 11) + bits++; + field_val = (reg_val & ADDRMAP5_ROW_B2_10_MASK) >> ADDRMAP5_ROW_B2_10_SHIFT; + if (field_val <= 11) + bits += 9; + field_val = (reg_val & ADDRMAP5_ROW_B11_MASK) >> ADDRMAP5_ROW_B11_SHIFT; + if (field_val <= 11) + bits++; + reg_val = readl(&ddrc_regs->addrmap6); + field_val = (reg_val & ADDRMAP6_ROW_B12_MASK) >> ADDRMAP6_ROW_B12_SHIFT; + if (field_val <= 11) + bits++; + field_val = (reg_val & ADDRMAP6_ROW_B13_MASK) >> ADDRMAP6_ROW_B13_SHIFT; + if (field_val <= 11) + bits++; + field_val = (reg_val & ADDRMAP6_ROW_B14_MASK) >> ADDRMAP6_ROW_B14_SHIFT; + if (field_val <= 11) + bits++; + field_val = (reg_val & ADDRMAP6_ROW_B15_MASK) >> ADDRMAP6_ROW_B15_SHIFT; + if (field_val <= 11) + bits++; + /* Count bank bits */ + reg_val = readl(&ddrc_regs->addrmap1); + field_val = (reg_val & ADDRMAP1_BANK_B0_MASK) >> ADDRMAP1_BANK_B0_SHIFT; + if (field_val <= 30) + bits++; + field_val = (reg_val & ADDRMAP1_BANK_B1_MASK) >> ADDRMAP1_BANK_B1_SHIFT; + if (field_val <= 30) + bits++; + field_val = (reg_val & ADDRMAP1_BANK_B2_MASK) >> ADDRMAP1_BANK_B2_SHIFT; + if (field_val <= 29) + bits++; + + return 1 << bits; +} diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index 5944f99482..d0d1b73aa6 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -14,6 +14,7 @@ #include <asm/spl.h> #include <spl.h> #include <asm/mach-imx/hab.h> +#include <asm/mach-imx/boot_mode.h> #include <g_dnl.h> DECLARE_GLOBAL_DATA_PTR; @@ -96,15 +97,35 @@ u32 spl_boot_device(void) return BOOT_DEVICE_NONE; } +#elif defined(CONFIG_MX7) +/* Translate iMX7 boot device to the SPL boot device enumeration */ +u32 spl_boot_device(void) +{ + enum boot_device boot_device_spl = get_boot_device(); + + switch (boot_device_spl) { + case SD1_BOOT: + case MMC1_BOOT: + return BOOT_DEVICE_MMC1; + case SD2_BOOT: + case MMC2_BOOT: + return BOOT_DEVICE_MMC2; + case SPI_NOR_BOOT: + return BOOT_DEVICE_SPI; + default: + return BOOT_DEVICE_NONE; + } +} +#endif /* CONFIG_MX6 || CONFIG_MX7 */ + #ifdef CONFIG_SPL_USB_GADGET_SUPPORT int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) { - put_unaligned(CONFIG_G_DNL_PRODUCT_NUM + 0xfff, &dev->idProduct); + put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM + 0xfff, &dev->idProduct); return 0; } #endif -#endif #if defined(CONFIG_SPL_MMC_SUPPORT) /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */ diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 14457317ce..74a63dd656 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -62,6 +62,11 @@ int mvebu_soc_family(void) case SOC_88F6820_ID: case SOC_88F6828_ID: return MVEBU_SOC_A38X; + + case SOC_98DX3236_ID: + case SOC_98DX3336_ID: + case SOC_98DX4251_ID: + return MVEBU_SOC_MSYS; } return MVEBU_SOC_UNKNOWN; @@ -107,13 +112,15 @@ static const struct sar_freq_modes sar_freq_tab[] = { #elif defined(CONFIG_ARMADA_38X) /* SAR frequency values for Armada 38x */ static const struct sar_freq_modes sar_freq_tab[] = { - { 0x0, 0x0, 666, 333, 333 }, - { 0x2, 0x0, 800, 400, 400 }, - { 0x4, 0x0, 1066, 533, 533 }, - { 0x6, 0x0, 1200, 600, 600 }, - { 0x8, 0x0, 1332, 666, 666 }, - { 0xc, 0x0, 1600, 800, 800 }, - { 0xff, 0xff, 0, 0, 0 } /* 0xff marks end of array */ + { 0x0, 0x0, 666, 333, 333 }, + { 0x2, 0x0, 800, 400, 400 }, + { 0x4, 0x0, 1066, 533, 533 }, + { 0x6, 0x0, 1200, 600, 600 }, + { 0x8, 0x0, 1332, 666, 666 }, + { 0xc, 0x0, 1600, 800, 800 }, + { 0x10, 0x0, 1866, 933, 933 }, + { 0x13, 0x0, 2000, 1000, 933 }, + { 0xff, 0xff, 0, 0, 0 } /* 0xff marks end of array */ }; #else /* SAR frequency values for Armada XP */ @@ -208,6 +215,15 @@ int print_cpuinfo(void) case SOC_88F6828_ID: puts("MV88F6828-"); break; + case SOC_98DX3236_ID: + puts("98DX3236-"); + break; + case SOC_98DX3336_ID: + puts("98DX3336-"); + break; + case SOC_98DX4251_ID: + puts("98DX4251-"); + break; default: puts("Unknown-"); break; diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c index e3f304c366..e634905618 100644 --- a/arch/arm/mach-mvebu/dram.c +++ b/arch/arm/mach-mvebu/dram.c @@ -179,11 +179,11 @@ static void dram_ecc_scrubbing(void) reg_write(REG_SDRAM_CONFIG_ADDR, temp); for (cs = 0; cs < CONFIG_NR_DRAM_BANKS; cs++) { - size = mvebu_sdram_bs(cs) - 1; + size = mvebu_sdram_bs(cs); if (size == 0) continue; - total = (u64)size + 1; + total = (u64)size; total_mem += (u32)(total / (1 << 30)); start_addr = 0; mv_xor_init2(cs); @@ -194,7 +194,7 @@ static void dram_ecc_scrubbing(void) size -= start_addr; } - mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size, + mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size - 1, SCRUB_MAGIC, SCRUB_MAGIC); /* Wait for previous transfer completion */ @@ -216,6 +216,35 @@ static int ecc_enabled(void) return 0; } + +/* Return the width of the DRAM bus, or 0 for unknown. */ +static int bus_width(void) +{ + int full_width = 0; + + if (reg_read(REG_SDRAM_CONFIG_ADDR) & (1 << REG_SDRAM_CONFIG_WIDTH_OFFS)) + full_width = 1; + + switch (mvebu_soc_family()) { + case MVEBU_SOC_AXP: + return full_width ? 64 : 32; + break; + case MVEBU_SOC_A375: + case MVEBU_SOC_A38X: + case MVEBU_SOC_MSYS: + return full_width ? 32 : 16; + default: + return 0; + } +} + +static int cycle_mode(void) +{ + int val = reg_read(REG_DUNIT_CTRL_LOW_ADDR); + + return (val >> REG_DUNIT_CTRL_LOW_2T_OFFS) & REG_DUNIT_CTRL_LOW_2T_MASK; +} + #else static void dram_ecc_scrubbing(void) { @@ -295,10 +324,26 @@ int dram_init_banksize(void) void board_add_ram_info(int use_default) { struct sar_freq_modes sar_freq; + int mode; + int width; get_sar_freq(&sar_freq); printf(" (%d MHz, ", sar_freq.d_clk); + width = bus_width(); + if (width) + printf("%d-bit, ", width); + + mode = cycle_mode(); + /* Mode 0 = Single cycle + * Mode 1 = Two cycles (2T) + * Mode 2 = Three cycles (3T) + */ + if (mode == 1) + printf("2T, "); + if (mode == 2) + printf("3T, "); + if (ecc_enabled()) printf("ECC"); else diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 2dc9b1dea3..cfd0952470 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -76,9 +76,6 @@ */ #ifdef CONFIG_CMD_NET #define CONFIG_MII /* expose smi ove miiphy interface */ -#if !defined(CONFIG_ARMADA_375) -#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ -#endif #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index d241eea956..b67b77ae0d 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -65,6 +65,7 @@ enum { MVEBU_SOC_AXP, MVEBU_SOC_A375, MVEBU_SOC_A38X, + MVEBU_SOC_MSYS, MVEBU_SOC_UNKNOWN, }; diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 0900e4008c..1d302761f0 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -18,6 +18,9 @@ #define SOC_88F6810_ID 0x6810 #define SOC_88F6820_ID 0x6820 #define SOC_88F6828_ID 0x6828 +#define SOC_98DX3236_ID 0xf410 +#define SOC_98DX3336_ID 0xf400 +#define SOC_98DX4251_ID 0xfc00 /* A375 revisions */ #define MV_88F67XX_A0_ID 0x3 @@ -139,6 +142,7 @@ #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) #define BOOT_FROM_UART 0x28 +#define BOOT_FROM_UART_ALT 0x3f #define BOOT_FROM_SPI 0x32 #define BOOT_FROM_MMC 0x30 #define BOOT_FROM_MMC_ALT 0x31 diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 3cf02a54ce..a72a769f7c 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -42,6 +42,9 @@ static u32 get_boot_device(void) return BOOT_DEVICE_MMC1; #endif case BOOT_FROM_UART: +#ifdef BOOT_FROM_UART_ALT + case BOOT_FROM_UART_ALT: +#endif return BOOT_DEVICE_UART; case BOOT_FROM_SPI: default: diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 913a44ad64..ae86b69b9c 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -241,7 +241,7 @@ int arch_misc_init(void) #if defined(CONFIG_DM_ETH) && defined(CONFIG_USB_ETHER) ret = usb_ether_init(); if (ret) { - error("USB ether init failed\n"); + pr_err("USB ether init failed\n"); return ret; } #endif diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index 7324d522ee..56890a0c54 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -165,9 +165,11 @@ void early_system_init(void) * to prevent overwrites. */ save_omap_boot_params(); - spl_early_init(); #endif do_board_detect(); +#ifdef CONFIG_SPL_BUILD + spl_early_init(); +#endif vcores_init(); #ifdef CONFIG_DEBUG_UART_OMAP debug_uart_init(); diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 11f5f058b9..4dbf9a27da 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -22,6 +22,11 @@ choice config TARGET_AM3517_EVM bool "AM3517 EVM" + select DM + select DM_SERIAL + select DM_GPIO + select DM_I2C + select DM_MMC config TARGET_MT_VENTOUX bool "TeeJet Mt.Ventoux" diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c index 52e1785b4a..2630e7d316 100644 --- a/arch/arm/mach-omap2/sec-common.c +++ b/arch/arm/mach-omap2/sec-common.c @@ -41,6 +41,9 @@ #define PPA_SERV_HAL_SETUP_EMIF_FW_REGION (PPA_HAL_SERVICES_START_INDEX + 26) #define PPA_SERV_HAL_LOCK_EMIF_FW (PPA_HAL_SERVICES_START_INDEX + 27) +/* Offset of header size if image is signed as ISW */ +#define HEADER_SIZE_OFFSET (0x6D) + int tee_loaded = 0; /* Argument for PPA_SERV_HAL_TEE_LOAD_MASTER */ @@ -125,6 +128,9 @@ int secure_boot_verify_image(void **image, size_t *size) } *size = sig_addr - cert_addr; /* Subtract out the signature size */ + /* Subtract header if present */ + if (strncmp((char *)sig_addr, "CERT_ISW_", 9) == 0) + *size = ((u32 *)*image)[HEADER_SIZE_OFFSET]; cert_size = *size; /* Check if image load address is 32-bit aligned */ diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c index 0b0bf1837c..2e8778043b 100644 --- a/arch/arm/mach-omap2/utils.c +++ b/arch/arm/mach-omap2/utils.c @@ -26,6 +26,9 @@ static void omap_set_fastboot_cpu(void) u32 cpu_rev = omap_revision(); switch (cpu_rev) { + case DRA762_ES1_0: + cpu = "DRA762"; + break; case DRA752_ES1_0: case DRA752_ES1_1: case DRA752_ES2_0: @@ -33,6 +36,7 @@ static void omap_set_fastboot_cpu(void) break; case DRA722_ES1_0: case DRA722_ES2_0: + case DRA722_ES2_1: cpu = "DRA722"; break; default: @@ -87,15 +91,14 @@ static u32 omap_mmc_get_part_size(const char *part) dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { - error("invalid mmc device\n"); + pr_err("invalid mmc device\n"); return 0; } - res = part_get_info_by_name(dev_desc, part, &info); - if (res < 0) { - error("cannot find partition: '%s'\n", part); + /* Check only for EFI (GPT) partition table */ + res = part_get_info_by_name_type(dev_desc, part, &info, PART_TYPE_EFI); + if (res < 0) return 0; - } /* Calculate size in bytes */ sz = (info.size * (u64)info.blksz); @@ -111,13 +114,10 @@ static void omap_set_fastboot_userdata_size(void) u32 sz_kb; sz_kb = omap_mmc_get_part_size("userdata"); - if (sz_kb == 0) { - buf[0] = '\0'; - printf("Warning: fastboot.userdata_size: unable to calc\n"); - } else { - sprintf(buf, "%u", sz_kb); - } + if (sz_kb == 0) + return; /* probably it's not Android partition table */ + sprintf(buf, "%u", sz_kb); env_set("fastboot.userdata_size", buf); } #else diff --git a/arch/arm/mach-qemu/Kconfig b/arch/arm/mach-qemu/Kconfig new file mode 100644 index 0000000000..3500b56cb0 --- /dev/null +++ b/arch/arm/mach-qemu/Kconfig @@ -0,0 +1,12 @@ +if ARCH_QEMU + +config SYS_VENDOR + default "emulation" + +config SYS_BOARD + default "qemu-arm" + +config SYS_CONFIG_NAME + default "qemu-arm" + +endif diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 79e9704a2c..daafc8de6a 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -12,6 +12,7 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o +obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index d3866bf029..406207ed21 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -151,7 +151,7 @@ void board_init_f(ulong dummy) */ pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU); if (IS_ERR(pmu)) - error("pmu syscon returned %ld\n", PTR_ERR(pmu)); + pr_err("pmu syscon returned %ld\n", PTR_ERR(pmu)); SAVE_SP_ADDR = readl(&pmu->sys_reg[2]); ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c index 622e046dc0..96859a5b4b 100644 --- a/arch/arm/mach-rockchip/rk3188-board.c +++ b/arch/arm/mach-rockchip/rk3188-board.c @@ -26,7 +26,7 @@ int board_late_init(void) grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); if (IS_ERR(grf)) { - error("grf syscon returned %ld\n", PTR_ERR(grf)); + pr_err("grf syscon returned %ld\n", PTR_ERR(grf)); } else { /* enable noc remap to mimic legacy loaders */ rk_clrsetreg(&grf->soc_con0, diff --git a/arch/arm/mach-rockchip/rk3188/Makefile b/arch/arm/mach-rockchip/rk3188/Makefile index 2dc9511de7..7fa010405b 100644 --- a/arch/arm/mach-rockchip/rk3188/Makefile +++ b/arch/arm/mach-rockchip/rk3188/Makefile @@ -6,6 +6,5 @@ ifndef CONFIG_TPL_BUILD obj-y += clk_rk3188.o -obj-y += sdram_rk3188.o obj-y += syscon_rk3188.o endif diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index dcd8cf805f..d44311457a 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -21,12 +21,12 @@ DECLARE_GLOBAL_DATA_PTR; static void setup_boot_mode(void) { struct rk322x_grf *const grf = (void *)GRF_BASE; - int boot_mode = readl(&grf->os_reg[4]); + int boot_mode = readl(&grf->os_reg[0]); debug("boot mode %x.\n", boot_mode); /* Clear boot mode */ - writel(BOOT_NORMAL, &grf->os_reg[4]); + writel(BOOT_NORMAL, &grf->os_reg[0]); switch (boot_mode) { case BOOT_FASTBOOT: diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 6b7bf85d8d..7b7fd5a6f1 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -19,7 +19,10 @@ #include <asm/arch/clock.h> #include <asm/arch/hardware.h> #include <asm/arch/periph.h> +#include <asm/arch/pmu_rk3288.h> #include <asm/arch/sdram.h> +#include <asm/arch/sdram_common.h> +#include <asm/arch/sys_proto.h> #include <asm/arch/timer.h> #include <dm/pinctrl.h> #include <dm/root.h> @@ -80,46 +83,6 @@ u32 spl_boot_mode(const u32 boot_device) return MMCSD_MODE_RAW; } -/* read L2 control register (L2CTLR) */ -static inline uint32_t read_l2ctlr(void) -{ - uint32_t val = 0; - - asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val)); - - return val; -} - -/* write L2 control register (L2CTLR) */ -static inline void write_l2ctlr(uint32_t val) -{ - /* - * Note: L2CTLR can only be written when the L2 memory system - * is idle, ie before the MMU is enabled. - */ - asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory"); - isb(); -} - -static void configure_l2ctlr(void) -{ - uint32_t l2ctlr; - - l2ctlr = read_l2ctlr(); - l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */ - - /* - * Data RAM write latency: 2 cycles - * Data RAM read latency: 2 cycles - * Data RAM setup latency: 1 cycle - * Tag RAM write latency: 1 cycle - * Tag RAM read latency: 1 cycle - * Tag RAM setup latency: 1 cycle - */ - l2ctlr |= (1 << 3 | 1 << 0); - write_l2ctlr(l2ctlr); -} - #ifdef CONFIG_SPL_MMC_SUPPORT static int configure_emmc(struct udevice *pinctrl) { @@ -243,12 +206,15 @@ void board_init_f(ulong dummy) } #endif +#if !defined(CONFIG_SUPPORT_TPL) debug("\nspl:init dram\n"); ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) { debug("DRAM init failed: %d\n", ret); return; } +#endif + #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(); #endif @@ -326,3 +292,18 @@ err: /* No way to report error here */ hang(); } + +#ifdef CONFIG_SPL_OS_BOOT + +#define PMU_BASE 0xff730000 +int dram_init_banksize(void) +{ + struct rk3288_pmu *const pmu = (void *)PMU_BASE; + size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]); + + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = size; + + return 0; +} +#endif diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c new file mode 100644 index 0000000000..3d08b5b6d8 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2017 Amarula Solutions + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <debug_uart.h> +#include <dm.h> +#include <ram.h> +#include <spl.h> +#include <version.h> +#include <asm/io.h> +#include <asm/arch/bootrom.h> +#include <asm/arch/clock.h> +#include <asm/arch/grf_rk3288.h> +#include <asm/arch/periph.h> +#include <asm/arch/pmu_rk3288.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/timer.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define GRF_BASE 0xff770000 +void board_init_f(ulong dummy) +{ + struct udevice *dev; + int ret; + + /* Example code showing how to enable the debug UART on RK3288 */ + /* Enable early UART on the RK3288 */ + struct rk3288_grf * const grf = (void *)GRF_BASE; + + rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT | + GPIO7C6_MASK << GPIO7C6_SHIFT, + GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT | + GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); + /* + * Debug UART can be used from here if required: + * + * debug_uart_init(); + * printch('a'); + * printhex8(0x1234); + * printascii("string"); + */ + debug_uart_init(); + + ret = spl_early_init(); + if (ret) { + debug("spl_early_init() failed: %d\n", ret); + hang(); + } + + rockchip_timer_init(); + configure_l2ctlr(); + + ret = rockchip_get_clk(&dev); + if (ret) { + debug("CLK init failed: %d\n", ret); + return; + } + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + debug("DRAM init failed: %d\n", ret); + return; + } +} + +void board_return_to_bootrom(void) +{ + back_to_bootrom(); +} + +u32 spl_boot_device(void) +{ + return BOOT_DEVICE_BOOTROM; +} + +void spl_board_init(void) +{ + puts("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \ + U_BOOT_TIME ")\n"); +} diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 4ad2940069..6beb26fd7a 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -87,6 +87,22 @@ config TARGET_POPMETAL_RK3288 config TARGET_VYASA_RK3288 bool "Vyasa-RK3288" select BOARD_LATE_INIT + select TPL + select SUPPORT_TPL + select TPL_DM + select TPL_REGMAP + select TPL_SYSCON + select TPL_CLK + select TPL_RAM + select TPL_OF_PLATDATA + select TPL_OF_CONTROL + select TPL_BOOTROM_SUPPORT + select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL + select ROCKCHIP_BROM_HELPER + select TPL_DRIVERS_MISC_SUPPORT + select TPL_LIBCOMMON_SUPPORT + select TPL_LIBGENERIC_SUPPORT + select TPL_SERIAL_SUPPORT help Vyasa is a RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It diff --git a/arch/arm/mach-rockchip/rk3288/Makefile b/arch/arm/mach-rockchip/rk3288/Makefile index b5b28efbe8..a0033a0d84 100644 --- a/arch/arm/mach-rockchip/rk3288/Makefile +++ b/arch/arm/mach-rockchip/rk3288/Makefile @@ -6,5 +6,4 @@ obj-y += clk_rk3288.o obj-y += rk3288.o -obj-y += sdram_rk3288.o obj-y += syscon_rk3288.o diff --git a/arch/arm/mach-rockchip/rk3328/Makefile b/arch/arm/mach-rockchip/rk3328/Makefile index 72873e29e6..bbab036a12 100644 --- a/arch/arm/mach-rockchip/rk3328/Makefile +++ b/arch/arm/mach-rockchip/rk3328/Makefile @@ -6,5 +6,4 @@ obj-y += clk_rk3328.o obj-y += rk3328.o -obj-y += sdram_rk3328.o obj-y += syscon_rk3328.o diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c index cabf344486..72d2c97d36 100644 --- a/arch/arm/mach-rockchip/rk3368-board-spl.c +++ b/arch/arm/mach-rockchip/rk3368-board-spl.c @@ -38,13 +38,13 @@ void board_init_f(ulong dummy) /* Set up our preloader console */ ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); if (ret) { - error("%s: pinctrl init failed: %d\n", __func__, ret); + pr_err("%s: pinctrl init failed: %d\n", __func__, ret); hang(); } ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0); if (ret) { - error("%s: failed to set up console UART\n", __func__); + pr_err("%s: failed to set up console UART\n", __func__); hang(); } diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 3406156447..9c20f56dc9 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -1,10 +1,12 @@ /* * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH * * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> +#include <asm/arch/bootrom.h> #include <asm/arch/clock.h> #include <asm/arch/grf_rk3399.h> #include <asm/arch/hardware.h> @@ -19,9 +21,43 @@ DECLARE_GLOBAL_DATA_PTR; +void board_return_to_bootrom(void) +{ + back_to_bootrom(); +} + +static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000", + [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000", + [BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000", +}; + +const char *board_spl_was_booted_from(void) +{ + u32 bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR); + const char *bootdevice_ofpath = NULL; + + if (bootdevice_brom_id < ARRAY_SIZE(boot_devices)) + bootdevice_ofpath = boot_devices[bootdevice_brom_id]; + + if (bootdevice_ofpath) + debug("%s: brom_bootdevice_id %x maps to '%s'\n", + __func__, bootdevice_brom_id, bootdevice_ofpath); + else + debug("%s: failed to resolve brom_bootdevice_id %x\n", + __func__, bootdevice_brom_id); + + return bootdevice_ofpath; +} + u32 spl_boot_device(void) { - return BOOT_DEVICE_MMC1; + u32 boot_device = BOOT_DEVICE_MMC1; + + if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) + return BOOT_DEVICE_BOOTROM; + + return boot_device; } u32 spl_boot_mode(const u32 boot_device) @@ -137,37 +173,6 @@ void board_init_f(ulong dummy) } } -void spl_board_init(void) -{ - struct udevice *pinctrl; - int ret; - - ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); - if (ret) { - debug("%s: Cannot find pinctrl device\n", __func__); - goto err; - } - - /* Enable debug UART */ - ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG); - if (ret) { - debug("%s: Failed to set up console UART\n", __func__); - goto err; - } - - preloader_console_init(); -#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) - back_to_bootrom(); -#endif - - return; -err: - printf("spl_board_init: Error %d\n", ret); - - /* No way to report error here */ - hang(); -} - #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { diff --git a/arch/arm/mach-rockchip/rk3399/Makefile b/arch/arm/mach-rockchip/rk3399/Makefile index 793ce31c12..98ebeac340 100644 --- a/arch/arm/mach-rockchip/rk3399/Makefile +++ b/arch/arm/mach-rockchip/rk3399/Makefile @@ -6,5 +6,4 @@ obj-y += clk_rk3399.o obj-y += rk3399.o -obj-y += sdram_rk3399.o obj-y += syscon_rk3399.o diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c index 4f78c72720..843998dfdc 100644 --- a/arch/arm/mach-rockchip/spl-boot-order.c +++ b/arch/arm/mach-rockchip/spl-boot-order.c @@ -10,6 +10,25 @@ #include <spl.h> #if CONFIG_IS_ENABLED(OF_CONTROL) +/** + * spl_node_to_boot_device() - maps from a DT-node to a SPL boot device + * @node: of_offset of the node + * + * The SPL framework uses BOOT_DEVICE_... constants to identify its boot + * sources. These may take on a device-specific meaning, depending on + * what nodes are enabled in a DTS (e.g. BOOT_DEVICE_MMC1 may refer to + * different controllers/block-devices, depending on which SD/MMC controllers + * are enabled in any given DTS). This function maps from a DT-node back + * onto a BOOT_DEVICE_... constant, considering the currently active devices. + * + * Returns + * -ENOENT, if no device matching the node could be found + * -ENOSYS, if the device matching the node can not be mapped onto a + * SPL boot device (e.g. the third MMC device) + * -1, for unspecified failures + * a positive integer (from the BOOT_DEVICE_... family) on succes. + */ + static int spl_node_to_boot_device(int node) { struct udevice *parent; @@ -57,6 +76,24 @@ static int spl_node_to_boot_device(int node) return -1; } +/** + * board_spl_was_booted_from() - retrieves the of-path the SPL was loaded from + * + * To support a 'same-as-spl' specification in the search-order for the next + * stage, we need a SoC- or board-specific way to handshake with what 'came + * before us' (either a BROM or TPL stage) and map the info retrieved onto + * a OF path. + * + * Returns + * NULL, on failure or if the device could not be identified + * a of_path (a string), on success + */ +__weak const char *board_spl_was_booted_from(void) +{ + debug("%s: no support for 'same-as-spl' for this board\n", __func__); + return NULL; +} + void board_boot_order(u32 *spl_boot_list) { const void *blob = gd->fdt_blob; @@ -78,8 +115,17 @@ void board_boot_order(u32 *spl_boot_list) (conf = fdt_stringlist_get(blob, chosen_node, "u-boot,spl-boot-order", elem, NULL)); elem++) { + const char *alias; + + /* Handle the case of 'same device the SPL was loaded from' */ + if (strncmp(conf, "same-as-spl", 11) == 0) { + conf = board_spl_was_booted_from(); + if (!conf) + continue; + } + /* First check if the list element is an alias */ - const char *alias = fdt_get_alias(blob, conf); + alias = fdt_get_alias(blob, conf); if (alias) conf = alias; diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c index 66f1ec21f1..ae16897494 100644 --- a/arch/arm/mach-socfpga/reset_manager_arria10.c +++ b/arch/arm/mach-socfpga/reset_manager_arria10.c @@ -174,7 +174,7 @@ void socfpga_emac_manage_reset(ulong emacbase, u32 state) emacmask = ALT_RSTMGR_PER0MODRST_EMAC2_SET_MSK; break; default: - error("emac base address unexpected! %lx", emacbase); + pr_err("emac base address unexpected! %lx", emacbase); hang(); break; } diff --git a/arch/arm/mach-stm32/stm32f7/timer.c b/arch/arm/mach-stm32/stm32f7/timer.c index c15f8bbe32..b04c1013e9 100644 --- a/arch/arm/mach-stm32/stm32f7/timer.c +++ b/arch/arm/mach-stm32/stm32f7/timer.c @@ -26,7 +26,7 @@ int timer_init(void) /* Stop the timer */ writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1); - writel((CONFIG_SYS_CLK_FREQ/CONFIG_SYS_HZ_CLOCK) - 1, + writel((CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ_CLOCK) - 1, &gpt1_regs_ptr->psc); /* Configure timer for auto-reload */ diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 65b1ebd837..0c60ee04da 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -14,9 +14,7 @@ #include <mmc.h> #include <i2c.h> #include <serial.h> -#ifdef CONFIG_SPL_BUILD #include <spl.h> -#endif #include <asm/gpio.h> #include <asm/io.h> #include <asm/arch/clock.h> @@ -212,11 +210,12 @@ void s_init(void) #ifdef CONFIG_SPL_BUILD DECLARE_GLOBAL_DATA_PTR; +#endif /* The sunxi internal brom will try to loader external bootloader * from mmc0, nand flash, mmc2. */ -u32 spl_boot_device(void) +uint32_t sunxi_get_boot_device(void) { int boot_source; @@ -255,6 +254,12 @@ u32 spl_boot_device(void) return -1; /* Never reached */ } +#ifdef CONFIG_SPL_BUILD +u32 spl_boot_device(void) +{ + return sunxi_get_boot_device(); +} + /* No confirmation data available in SPL yet. Hardcode bootmode */ u32 spl_boot_mode(const u32 boot_device) { diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 9bf0b5633d..2f1cad1aad 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -18,12 +18,18 @@ #include <asm/io.h> #include <errno.h> -#define SUNXI_USB_PMU_IRQ_ENABLE 0x800 -#ifdef CONFIG_MACH_SUN8I_A33 -#define SUNXI_USB_CSR 0x410 -#else +#if defined(CONFIG_MACH_SUN4I) || \ + defined(CONFIG_MACH_SUN5I) || \ + defined(CONFIG_MACH_SUN6I) || \ + defined(CONFIG_MACH_SUN7I) || \ + defined(CONFIG_MACH_SUN8I_A23) || \ + defined(CONFIG_MACH_SUN9I) #define SUNXI_USB_CSR 0x404 +#else +#define SUNXI_USB_CSR 0x410 #endif + +#define SUNXI_USB_PMU_IRQ_ENABLE 0x800 #define SUNXI_USB_PASSBY_EN 1 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c index cf6626fb12..dec7d90c5d 100644 --- a/arch/arm/mach-tegra/ivc.c +++ b/arch/arm/mach-tegra/ivc.c @@ -493,7 +493,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes, (TEGRA_IVC_ALIGN - 1)); if ((uint64_t)nframes * (uint64_t)frame_size >= 0x100000000) { - error("tegra_ivc: nframes * frame_size overflows\n"); + pr_err("tegra_ivc: nframes * frame_size overflows\n"); return -EINVAL; } @@ -503,12 +503,12 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes, */ if ((qbase1 & (TEGRA_IVC_ALIGN - 1)) || (qbase2 & (TEGRA_IVC_ALIGN - 1))) { - error("tegra_ivc: channel start not aligned\n"); + pr_err("tegra_ivc: channel start not aligned\n"); return -EINVAL; } if (frame_size & (TEGRA_IVC_ALIGN - 1)) { - error("tegra_ivc: frame size not adequately aligned\n"); + pr_err("tegra_ivc: frame size not adequately aligned\n"); return -EINVAL; } @@ -521,7 +521,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes, } if (ret) { - error("tegra_ivc: queue regions overlap\n"); + pr_err("tegra_ivc: queue regions overlap\n"); return ret; } diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c index d326a6ae57..bfc0ab8f10 100644 --- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c +++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c @@ -137,7 +137,7 @@ static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl) u32 value; if (padctl->enable == 0) { - error("unbalanced enable/disable"); + pr_err("unbalanced enable/disable"); return 0; } diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c index 966cf9f1c4..5224ef641c 100644 --- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c +++ b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c @@ -45,12 +45,12 @@ int dram_init(void) node = fdt_path_offset(nvtboot_blob, "/memory"); if (node < 0) { - error("Can't find /memory node in nvtboot DTB"); + pr_err("Can't find /memory node in nvtboot DTB"); hang(); } prop = fdt_getprop(nvtboot_blob, node, "reg", &len); if (!prop) { - error("Can't find /memory/reg property in nvtboot DTB"); + pr_err("Can't find /memory/reg property in nvtboot DTB"); hang(); } diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c index ec04cf5261..81fb1d840f 100644 --- a/arch/arm/mach-tegra/tegra20/clock.c +++ b/arch/arm/mach-tegra/tegra20/clock.c @@ -667,7 +667,7 @@ static int tegra_plle_train(void) } while (--timeout); if (timeout == 0) { - error("timeout waiting for PLLE to become ready"); + pr_err("timeout waiting for PLLE to become ready"); return -ETIMEDOUT; } @@ -697,7 +697,7 @@ int tegra_plle_enable(void) if ((value & PLLE_MISC_PLL_READY) == 0) { err = tegra_plle_train(); if (err < 0) { - error("failed to train PLLE: %d", err); + pr_err("failed to train PLLE: %d", err); return err; } } @@ -726,7 +726,7 @@ int tegra_plle_enable(void) } while (--timeout); if (timeout == 0) { - error("timeout waiting for PLLE to lock"); + pr_err("timeout waiting for PLLE to lock"); return -ETIMEDOUT; } diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c index bf85e075de..a3e3e378e1 100644 --- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c +++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c @@ -125,7 +125,7 @@ static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl) u32 value; if (padctl->enable == 0) { - error("unbalanced enable/disable"); + pr_err("unbalanced enable/disable"); return 0; } diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index 4fd8b8a3b1..282f34fb89 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -696,7 +696,7 @@ static int tegra_plle_train(void) } while (--timeout); if (timeout == 0) { - error("timeout waiting for PLLE to become ready"); + pr_err("timeout waiting for PLLE to become ready"); return -ETIMEDOUT; } @@ -726,7 +726,7 @@ int tegra_plle_enable(void) if ((value & PLLE_MISC_PLL_READY) == 0) { err = tegra_plle_train(); if (err < 0) { - error("failed to train PLLE: %d", err); + pr_err("failed to train PLLE: %d", err); return err; } } @@ -772,7 +772,7 @@ int tegra_plle_enable(void) } while (--timeout); if (timeout == 0) { - error("timeout waiting for PLLE to lock"); + pr_err("timeout waiting for PLLE to lock"); return -ETIMEDOUT; } diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c index abc18c03a5..c8a468a034 100644 --- a/arch/arm/mach-tegra/xusb-padctl-common.c +++ b/arch/arm/mach-tegra/xusb-padctl-common.c @@ -84,7 +84,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, len = ofnode_read_string_count(node, "nvidia,lanes"); if (len < 0) { - error("failed to parse \"nvidia,lanes\" property"); + pr_err("failed to parse \"nvidia,lanes\" property"); return -EINVAL; } @@ -94,7 +94,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, ret = ofnode_read_string_index(node, "nvidia,lanes", i, &group->pins[i]); if (ret) { - error("failed to read string from \"nvidia,lanes\" property"); + pr_err("failed to read string from \"nvidia,lanes\" property"); return -EINVAL; } } @@ -104,7 +104,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, ret = ofnode_read_string_index(node, "nvidia,function", 0, &group->func); if (ret) { - error("failed to parse \"nvidia,func\" property"); + pr_err("failed to parse \"nvidia,func\" property"); return -EINVAL; } @@ -157,14 +157,14 @@ tegra_xusb_padctl_group_apply(struct tegra_xusb_padctl *padctl, lane = tegra_xusb_padctl_find_lane(padctl, group->pins[i]); if (!lane) { - error("no lane for pin %s", group->pins[i]); + pr_err("no lane for pin %s", group->pins[i]); continue; } func = tegra_xusb_padctl_lane_find_function(padctl, lane, group->func); if (func < 0) { - error("function %s invalid for lane %s: %d", + pr_err("function %s invalid for lane %s: %d", group->func, lane->name, func); continue; } @@ -206,7 +206,7 @@ tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_group_apply(padctl, group); if (err < 0) { - error("failed to apply group %s: %d", + pr_err("failed to apply group %s: %d", group->name, err); continue; } @@ -232,7 +232,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode); if (err < 0) { - error("failed to parse group %s", group->name); + pr_err("failed to parse group %s", group->name); return err; } @@ -250,7 +250,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, err = ofnode_read_resource(node, 0, &padctl->regs); if (err < 0) { - error("registers not found"); + pr_err("registers not found"); return err; } @@ -261,7 +261,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, err = tegra_xusb_padctl_config_parse_dt(padctl, config, subnode); if (err < 0) { - error("failed to parse entry %s: %d", + pr_err("failed to parse entry %s: %d", config->name, err); continue; } @@ -289,7 +289,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count, err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]); if (err < 0) { - error("failed to parse DT: %d", err); + pr_err("failed to parse DT: %d", err); continue; } @@ -298,7 +298,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count, err = tegra_xusb_padctl_config_apply(&padctl, &padctl.config); if (err < 0) { - error("failed to apply pinmux: %d", err); + pr_err("failed to apply pinmux: %d", err); continue; } diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index c8b5ab4d32..de3bdc0bc2 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -12,7 +12,7 @@ config ARCH_UNIPHIER_32BIT choice prompt "UniPhier SoC select" - default ARCH_UNIPHIER_V8_MULTI + default ARCH_UNIPHIER_V7_MULTI config ARCH_UNIPHIER_LD4_SLD8 bool "UniPhier LD4/sLD8 SoCs" diff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c index 3ab101a9cf..efe7419cc9 100644 --- a/arch/arm/mach-uniphier/arm32/psci.c +++ b/arch/arm/mach-uniphier/arm32/psci.c @@ -7,8 +7,10 @@ #include <common.h> #include <linux/bitops.h> +#include <linux/delay.h> #include <linux/io.h> #include <linux/kernel.h> +#include <linux/printk.h> #include <linux/psci.h> #include <linux/sizes.h> #include <asm/processor.h> @@ -91,7 +93,7 @@ static void uniphier_smp_kick_all_cpus(void) } if (!timeout) - printf("warning: some of secondary CPUs may not boot\n"); + pr_warn("warning: some of secondary CPUs may not boot\n"); uniphier_cache_disable(); } diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index b9a2cbe148..6849b3dcab 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -10,7 +10,9 @@ #include <spl.h> #include <libfdt.h> #include <nand.h> +#include <stdio.h> #include <linux/io.h> +#include <linux/printk.h> #include <../drivers/mtd/nand/denali.h> #include "init.h" @@ -92,7 +94,7 @@ int board_late_init(void) printf("\n"); if (uniphier_set_fdt_file()) - printf("fdt_file environment was not set correctly\n"); + pr_warn("fdt_file environment was not set correctly\n"); return 0; } diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c index 0f93926f28..2818b506c4 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device.c +++ b/arch/arm/mach-uniphier/boot-device/boot-device.c @@ -7,6 +7,7 @@ #include <common.h> #include <spl.h> +#include <stdio.h> #include <linux/log2.h> #include "../init.h" diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 19be4f3145..8a978d20ff 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -17,7 +17,7 @@ void uniphier_pro4_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | SC_RSTCTRL_NRST_GIO; #endif @@ -30,7 +30,7 @@ void uniphier_pro4_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1; writel(tmp, SC_RSTCTRL2); @@ -39,7 +39,7 @@ void uniphier_pro4_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 823bb06373..dd86cadf5b 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c @@ -15,7 +15,7 @@ void uniphier_pro5_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif #ifdef CONFIG_NAND_DENALI @@ -24,7 +24,7 @@ void uniphier_pro5_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, SC_RSTCTRL2); @@ -33,7 +33,7 @@ void uniphier_pro5_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 0d9240519c..9775127650 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -16,7 +16,7 @@ void uniphier_pxs2_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif #ifdef CONFIG_UNIPHIER_ETH @@ -28,7 +28,7 @@ void uniphier_pxs2_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, SC_RSTCTRL2); @@ -41,7 +41,7 @@ void uniphier_pxs2_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif diff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c index 90ef411087..bf41d0561c 100644 --- a/arch/arm/mach-uniphier/cpu-info.c +++ b/arch/arm/mach-uniphier/cpu-info.c @@ -6,9 +6,10 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> +#include <stdio.h> #include <linux/errno.h> #include <linux/io.h> +#include <linux/printk.h> #include "soc-info.h" @@ -59,11 +60,11 @@ int print_cpuinfo(void) printf(" (model %d, revision %d)\n", model, rev); if (model < required_model) { - printf("Only model %d or newer is supported.\n", + pr_err("Only model %d or newer is supported.\n", required_model); return -ENOTSUPP; } else if (rev < required_rev) { - printf("Only revision %d or newer is supported.\n", + pr_err("Only revision %d or newer is supported.\n", required_rev); return -ENOTSUPP; } diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c index 873dad229a..50f0dde544 100644 --- a/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c +++ b/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c @@ -6,7 +6,9 @@ */ #include <common.h> +#include <stdio.h> #include <linux/io.h> +#include <linux/printk.h> #include <linux/sizes.h> #include "../soc-info.h" @@ -297,7 +299,7 @@ static int do_ddrm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) param = uniphier_get_ddrmphy_param(); if (!param) { - printf("unsupported SoC\n"); + pr_err("unsupported SoC\n"); return CMD_RET_FAILURE; } diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c index a71f704b0c..0283edaeda 100644 --- a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c +++ b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c @@ -7,7 +7,9 @@ */ #include <common.h> +#include <stdio.h> #include <linux/io.h> +#include <linux/printk.h> #include <linux/sizes.h> #include "../soc-info.h" @@ -267,7 +269,7 @@ static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) param = uniphier_get_ddrphy_param(); if (!param) { - printf("unsupported SoC\n"); + pr_err("unsupported SoC\n"); return CMD_RET_FAILURE; } diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ld4.c b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c index c20730d820..ba3d314841 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-ld4.c +++ b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c @@ -5,9 +5,10 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> +#include <linux/bitops.h> #include <linux/errno.h> #include <linux/io.h> +#include <linux/printk.h> #include "ddrphy-init.h" #include "ddrphy-regs.h" @@ -41,7 +42,7 @@ int uniphier_ld4_ddrphy_init(void __iomem *phy_base, int freq, bool ddr3plus) freq_e = DRAM_FREQ_1600M; break; default: - printf("unsupported DRAM frequency %d MHz\n", freq); + pr_err("unsupported DRAM frequency %d MHz\n", freq); return -EINVAL; } diff --git a/arch/arm/mach-uniphier/dram/umc-pxs2.c b/arch/arm/mach-uniphier/dram/umc-pxs2.c index 8068ef1388..fccdb98ed8 100644 --- a/arch/arm/mach-uniphier/dram/umc-pxs2.c +++ b/arch/arm/mach-uniphier/dram/umc-pxs2.c @@ -8,11 +8,13 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> +#include <linux/delay.h> #include <linux/errno.h> #include <linux/io.h> +#include <linux/printk.h> #include <linux/sizes.h> #include <asm/processor.h> +#include <time.h> #include "../init.h" #include "../soc-info.h" @@ -134,7 +136,7 @@ static int ddrphy_get_system_latency(void __iomem *phy_base, int width) } if (dgsl_min != dgsl_max) - printf("DQS Gateing System Latencies are not all leveled.\n"); + pr_warn("DQS Gateing System Latencies are not all leveled.\n"); return dgsl_max; } @@ -149,7 +151,7 @@ static void ddrphy_init(void __iomem *phy_base, enum dram_freq freq, int width, nr_dx = width / 8; - writel(MPHY_PIR_ZCALBYP, phy_base + MPHY_PIR); + writel(MPHY_PIR_ZCALBYP, phy_base + MPHY_PIR); /* * Disable RGLVT bit (Read DQS Gating LCDL Delay VT Compensation) * to avoid read error issue. @@ -315,8 +317,10 @@ static int __ddrphy_training(void __iomem *phy_base, u32 init_flag = MPHY_PIR_INIT; u32 done_flag = MPHY_PGSR0_IDONE; int timeout = 50000; /* 50 msec is long enough */ -#ifdef DISPLAY_ELAPSED_TIME - ulong start = get_timer(0); + unsigned long start = 0; + +#ifdef DEBUG + start = get_timer(0); #endif for (s = seq; s->description; s++) { @@ -344,9 +348,7 @@ static int __ddrphy_training(void __iomem *phy_base, } } -#ifdef DISPLAY_ELAPSED_TIME - printf("%s: info: elapsed time %ld msec\n", get_timer(start)); -#endif + pr_debug("DDRPHY training: elapsed time %ld msec\n", get_timer(start)); return 0; } diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 32d359321a..e9672d2f1b 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -10,14 +10,14 @@ #include <fdt_support.h> #include <fdtdec.h> #include <linux/errno.h> +#include <linux/kernel.h> +#include <linux/printk.h> #include <linux/sizes.h> +#include <asm/global_data.h> #include "sg-regs.h" #include "soc-info.h" -#define pr_warn(fmt, args...) printf(fmt, ##args) -#define pr_err(fmt, args...) printf(fmt, ##args) - DECLARE_GLOBAL_DATA_PTR; struct uniphier_memif_data { @@ -267,8 +267,8 @@ int ft_board_setup(void *fdt, bd_t *bd) if (ret) return -ENOSPC; - printf(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n", - rsv_addr, rsv_size); + pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n", + rsv_addr, rsv_size); } return 0; diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index 29f638d947..da209354ed 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -104,9 +104,4 @@ int uniphier_have_internal_stm(void); int uniphier_boot_from_backend(void); int uniphier_pin_init(const char *pinconfig_name); -#undef pr_warn -#define pr_warn(fmt, args...) printf(fmt, ##args) -#undef pr_err -#define pr_err(fmt, args...) printf(fmt, ##args) - #endif /* __MACH_INIT_H */ diff --git a/arch/m68k/include/asm/io.h b/arch/m68k/include/asm/io.h index 384308b747..dfe77f0756 100644 --- a/arch/m68k/include/asm/io.h +++ b/arch/m68k/include/asm/io.h @@ -253,33 +253,6 @@ static inline void sync(void) */ } -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void *map_physmem(phys_addr_t paddr, unsigned long len, - unsigned long flags) -{ - return (void *)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - -static inline phys_addr_t virt_to_phys(void * vaddr) -{ - return (phys_addr_t)(vaddr); -} +#include <asm-generic/io.h> #endif /* __ASM_M68K_IO_H__ */ diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index 584cbce358..c7516a47e8 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h @@ -131,33 +131,6 @@ static inline void sync(void) { } -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - -static inline phys_addr_t virt_to_phys(void * vaddr) -{ - return (phys_addr_t)(vaddr); -} +#include <asm-generic/io.h> #endif /* __MICROBLAZE_IO_H__ */ diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index ee7a59290d..45d7ca0cc6 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -95,6 +95,7 @@ static inline unsigned long virt_to_phys(volatile const void *address) #endif return CPHYSADDR(addr); } +#define virt_to_phys virt_to_phys /* * phys_to_virt - map physical address to virtual @@ -112,6 +113,7 @@ static inline void *phys_to_virt(unsigned long address) { return (void *)(address + PAGE_OFFSET - PHYS_OFFSET); } +#define phys_to_virt phys_to_virt /* * ISA I/O bus memory addresses are 1:1 with the physical address. @@ -490,10 +492,7 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int */ #define sync() mmiowb() -#define MAP_NOCACHE (1) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) +#define MAP_NOCACHE 1 static inline void * map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) @@ -503,13 +502,7 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) return (void *)CKSEG0ADDR(paddr); } - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ -} +#define map_physmem map_physmem #define __BUILD_CLRBITS(bwlq, sfx, end, type) \ \ @@ -566,4 +559,6 @@ BUILD_CLRSETBITS(q, le64, le64, u64) BUILD_CLRSETBITS(q, be64, be64, u64) BUILD_CLRSETBITS(q, 64, _, u64) +#include <asm-generic/io.h> + #endif /* _ASM_IO_H */ diff --git a/arch/nds32/include/asm/io.h b/arch/nds32/include/asm/io.h index e8ee961526..c6d8d9b471 100644 --- a/arch/nds32/include/asm/io.h +++ b/arch/nds32/include/asm/io.h @@ -38,16 +38,6 @@ static inline void sync(void) { } -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - #ifdef CONFIG_ARCH_MAP_SYSMEM static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) { @@ -69,25 +59,6 @@ static inline phys_addr_t map_to_sysmem(const void *ptr) } #endif -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - -static inline phys_addr_t virt_to_phys(void *vaddr) -{ - return (phys_addr_t)(vaddr); -} - /* * Generic virtual read/write. Note that we don't support half-word * read/writes. We define __arch_*[bl] here, and leave __arch_*w @@ -125,26 +96,26 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen); #define __iormb() dmb() #define __iowmb() dmb() -static inline void writeb(unsigned char val, unsigned char *addr) +static inline void writeb(u8 val, volatile void __iomem *addr) { __iowmb(); __arch_putb(val, addr); } -static inline void writew(unsigned short val, unsigned short *addr) +static inline void writew(u16 val, volatile void __iomem *addr) { __iowmb(); __arch_putw(val, addr); } -static inline void writel(unsigned int val, unsigned int *addr) +static inline void writel(u32 val, volatile void __iomem *addr) { __iowmb(); __arch_putl(val, addr); } -static inline unsigned char readb(unsigned char *addr) +static inline u8 readb(const volatile void __iomem *addr) { u8 val; @@ -153,7 +124,7 @@ static inline unsigned char readb(unsigned char *addr) return val; } -static inline unsigned short readw(unsigned short *addr) +static inline u16 readw(const volatile void __iomem *addr) { u16 val; @@ -162,7 +133,7 @@ static inline unsigned short readw(unsigned short *addr) return val; } -static inline unsigned int readl(unsigned int *addr) +static inline u32 readl(const volatile void __iomem *addr) { u32 val; @@ -480,5 +451,8 @@ out: #define isa_check_signature(io, sig, len) (0) #endif /* __mem_isa */ + +#include <asm-generic/io.h> + #endif /* __KERNEL__ */ #endif /* __ASM_NDS_IO_H */ diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h index e951500190..4e5b44a4e4 100644 --- a/arch/nios2/include/asm/io.h +++ b/arch/nios2/include/asm/io.h @@ -19,9 +19,6 @@ static inline void sync(void) * properties specified by "flags". */ #define MAP_NOCACHE 1 -#define MAP_WRCOMBINE 0 -#define MAP_WRBACK 0 -#define MAP_WRTHROUGH 0 static inline void * map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) @@ -32,20 +29,22 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) else return (void *)(paddr | gd->arch.mem_region_base); } +#define map_physmem map_physmem -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) +static inline void *phys_to_virt(phys_addr_t paddr) { + DECLARE_GLOBAL_DATA_PTR; + return (void *)(paddr | gd->arch.mem_region_base); } +#define phys_to_virt phys_to_virt static inline phys_addr_t virt_to_phys(void * vaddr) { DECLARE_GLOBAL_DATA_PTR; return (phys_addr_t)vaddr & gd->arch.physaddr_mask; } +#define virt_to_phys virt_to_phys #define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v)) #define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v)) @@ -171,4 +170,6 @@ static inline void outsl (unsigned long port, const void *src, unsigned long cou #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) +#include <asm-generic/io.h> + #endif /* __ASM_NIOS2_IO_H_ */ diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h index a54fc468d5..34fbfdf1cf 100644 --- a/arch/powerpc/include/asm/io.h +++ b/arch/powerpc/include/asm/io.h @@ -282,18 +282,7 @@ static inline void out_be32(volatile unsigned __iomem *addr, u32 val) #define setbits_8(addr, set) setbits(8, addr, set) #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) +static inline void *phys_to_virt(phys_addr_t paddr) { #ifdef CONFIG_ADDR_MAP return addrmap_phys_to_virt(paddr); @@ -301,14 +290,7 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) return (void *)((unsigned long)paddr); #endif } - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} +#define phys_to_virt phys_to_virt static inline phys_addr_t virt_to_phys(void * vaddr) { @@ -318,5 +300,8 @@ static inline phys_addr_t virt_to_phys(void * vaddr) return (phys_addr_t)((unsigned long)vaddr); #endif } +#define virt_to_phys virt_to_phys + +#include <asm-generic/io.h> #endif diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index 01991049cc..66c3a6a88a 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -56,6 +56,16 @@ int cleanup_before_linux_select(int flags) return 0; } +void *phys_to_virt(phys_addr_t paddr) +{ + return (void *)(gd->arch.ram_buf + paddr); +} + +phys_addr_t virt_to_phys(void *vaddr) +{ + return (phys_addr_t)((uint8_t *)vaddr - gd->arch.ram_buf); +} + void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) { #if defined(CONFIG_PCI) && !defined(CONFIG_SPL_BUILD) @@ -73,7 +83,7 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) } #endif - return (void *)(gd->arch.ram_buf + paddr); + return phys_to_virt(paddr); } void unmap_physmem(const void *vaddr, unsigned long flags) diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 22d6aab534..c524957b6c 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -319,6 +319,7 @@ int os_dirent_ls(const char *dirname, struct os_dirent_node **headp) DIR *dir; int ret; char *fname; + char *old_fname; int len; int dirlen; @@ -344,16 +345,23 @@ int os_dirent_ls(const char *dirname, struct os_dirent_node **headp) break; } next = malloc(sizeof(*node) + strlen(entry->d_name) + 1); - if (dirlen + strlen(entry->d_name) > len) { - len = dirlen + strlen(entry->d_name); - fname = realloc(fname, len); - } - if (!next || !fname) { - free(next); + if (!next) { os_dirent_free(head); ret = -ENOMEM; goto done; } + if (dirlen + strlen(entry->d_name) > len) { + len = dirlen + strlen(entry->d_name); + old_fname = fname; + fname = realloc(fname, len); + if (!fname) { + free(old_fname); + free(next); + os_dirent_free(head); + ret = -ENOMEM; + goto done; + } + } next->next = NULL; strcpy(next->name, entry->d_name); switch (entry->d_type) { diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index a6856356df..ae6883f33d 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -7,22 +7,22 @@ #ifndef __SANDBOX_ASM_IO_H #define __SANDBOX_ASM_IO_H -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) +void *phys_to_virt(phys_addr_t paddr); +#define phys_to_virt phys_to_virt + +phys_addr_t virt_to_phys(void *vaddr); +#define virt_to_phys virt_to_phys void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags); +#define map_physmem map_physmem /* * Take down a mapping set up by map_physmem(). */ void unmap_physmem(const void *vaddr, unsigned long flags); +#define unmap_physmem unmap_physmem + +#include <asm-generic/io.h> /* For sandbox, we want addresses to point into our RAM buffer */ static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) @@ -56,6 +56,53 @@ void outl(unsigned int value, unsigned int addr); void outw(unsigned int value, unsigned int addr); void outb(unsigned int value, unsigned int addr); +#define out_arch(type,endian,a,v) write##type(cpu_to_##endian(v),a) +#define in_arch(type,endian,a) endian##_to_cpu(read##type(a)) + +#define out_le32(a,v) out_arch(l,le32,a,v) +#define out_le16(a,v) out_arch(w,le16,a,v) + +#define in_le32(a) in_arch(l,le32,a) +#define in_le16(a) in_arch(w,le16,a) + +#define out_be32(a,v) out_arch(l,be32,a,v) +#define out_be16(a,v) out_arch(w,be16,a,v) + +#define in_be32(a) in_arch(l,be32,a) +#define in_be16(a) in_arch(w,be16,a) + +#define out_8(a,v) writeb(v,a) +#define in_8(a) readb(a) + +#define clrbits(type, addr, clear) \ + out_##type((addr), in_##type(addr) & ~(clear)) + +#define setbits(type, addr, set) \ + out_##type((addr), in_##type(addr) | (set)) + +#define clrsetbits(type, addr, clear, set) \ + out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) + +#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) +#define setbits_be32(addr, set) setbits(be32, addr, set) +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) + +#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) +#define setbits_le32(addr, set) setbits(le32, addr, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) +#define setbits_be16(addr, set) setbits(be16, addr, set) +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) + +#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) +#define setbits_le16(addr, set) setbits(le16, addr, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) + +#define clrbits_8(addr, clear) clrbits(8, addr, clear) +#define setbits_8(addr, set) setbits(8, addr, set) +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + static inline void _insw(volatile u16 *port, void *buf, int ns) { } diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 5cb000cada..be1ff4ad70 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -231,34 +231,7 @@ static inline void sync(void) #define setbits_8(addr, set) setbits(8, addr, set) #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - -static inline phys_addr_t virt_to_phys(void *vaddr) -{ - return (phys_addr_t)(vaddr); -} +#include <asm-generic/io.h> #endif /* __KERNEL__ */ #endif /* __ASM_SH_IO_H */ diff --git a/arch/x86/cpu/tangier/Makefile b/arch/x86/cpu/tangier/Makefile index d146b3f5c2..92cfa555ed 100644 --- a/arch/x86/cpu/tangier/Makefile +++ b/arch/x86/cpu/tangier/Makefile @@ -5,3 +5,4 @@ # obj-y += car.o tangier.o sdram.o +obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c new file mode 100644 index 0000000000..75e777dcd7 --- /dev/null +++ b/arch/x86/cpu/tangier/acpi.c @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * Partially based on acpi.c for other x86 platforms + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <cpu.h> +#include <dm.h> +#include <dm/uclass-internal.h> +#include <asm/acpi_table.h> +#include <asm/ioapic.h> +#include <asm/mpspec.h> +#include <asm/tables.h> +#include <asm/arch/global_nvs.h> + +void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, + void *dsdt) +{ + struct acpi_table_header *header = &(fadt->header); + + memset((void *)fadt, 0, sizeof(struct acpi_fadt)); + + acpi_fill_header(header, "FACP"); + header->length = sizeof(struct acpi_fadt); + header->revision = 6; + + fadt->firmware_ctrl = (u32)facs; + fadt->dsdt = (u32)dsdt; + fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED; + + fadt->iapc_boot_arch = ACPI_FADT_VGA_NOT_PRESENT | + ACPI_FADT_NO_PCIE_ASPM_CONTROL; + fadt->flags = + ACPI_FADT_WBINVD | + ACPI_FADT_POWER_BUTTON | ACPI_FADT_SLEEP_BUTTON | + ACPI_FADT_SEALED_CASE | ACPI_FADT_HEADLESS | + ACPI_FADT_HW_REDUCED_ACPI; + + fadt->minor_revision = 2; + + fadt->x_firmware_ctl_l = (u32)facs; + fadt->x_firmware_ctl_h = 0; + fadt->x_dsdt_l = (u32)dsdt; + fadt->x_dsdt_h = 0; + + header->checksum = table_compute_checksum(fadt, header->length); +} + +u32 acpi_fill_madt(u32 current) +{ + current += acpi_create_madt_lapics(current); + + current += acpi_create_madt_ioapic((struct acpi_madt_ioapic *)current, + io_apic_read(IO_APIC_ID) >> 24, IO_APIC_ADDR, 0); + + return current; +} + +u32 acpi_fill_mcfg(u32 current) +{ + /* TODO: Derive parameters from SFI MCFG table */ + current += acpi_create_mcfg_mmconfig + ((struct acpi_mcfg_mmconfig *)current, + 0x3f500000, 0x0, 0x0, 0x0); + + return current; +} + +void acpi_create_gnvs(struct acpi_global_nvs *gnvs) +{ + struct udevice *dev; + int ret; + + /* at least we have one processor */ + gnvs->pcnt = 1; + + /* override the processor count with actual number */ + ret = uclass_find_first_device(UCLASS_CPU, &dev); + if (ret == 0 && dev != NULL) { + ret = cpu_get_count(dev); + if (ret > 0) + gnvs->pcnt = ret; + } +} diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c index 5743077431..eae8d785df 100644 --- a/arch/x86/cpu/tangier/sdram.c +++ b/arch/x86/cpu/tangier/sdram.c @@ -39,7 +39,7 @@ static int sfi_table_check(struct sfi_table_header *sbh) chksum += *pos++; if (chksum) - error("sfi: Invalid checksum\n"); + pr_err("sfi: Invalid checksum\n"); /* Checksum is OK if zero */ return chksum ? -EILSEQ : 0; @@ -76,7 +76,7 @@ static struct sfi_table_simple *sfi_search_mmap(void) /* Find SYST table */ sb = sfi_get_table_by_sig(SFI_BASE_ADDR, SFI_SIG_SYST); if (!sb) { - error("sfi: failed to locate SYST table\n"); + pr_err("sfi: failed to locate SYST table\n"); return NULL; } @@ -90,7 +90,7 @@ static struct sfi_table_simple *sfi_search_mmap(void) return (struct sfi_table_simple *)sbh; } - error("sfi: failed to locate SFI MMAP table\n"); + pr_err("sfi: failed to locate SFI MMAP table\n"); return NULL; } diff --git a/arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl b/arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl new file mode 100644 index 0000000000..b1f0f67979 --- /dev/null +++ b/arch/x86/include/asm/arch-tangier/acpi/global_nvs.asl @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * Partially based on global_nvs.asl for other x86 platforms + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/acpi/global_nvs.h> + +OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE) +Field(GNVS, ByteAcc, NoLock, Preserve) +{ + Offset (0x00), + PCNT, 8, /* processor count */ +} diff --git a/arch/x86/include/asm/arch-tangier/acpi/platform.asl b/arch/x86/include/asm/arch-tangier/acpi/platform.asl new file mode 100644 index 0000000000..a57b7cb319 --- /dev/null +++ b/arch/x86/include/asm/arch-tangier/acpi/platform.asl @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * Partially based on platform.asl for other x86 platforms + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/acpi/statdef.asl> + +/* + * The _PTS method (Prepare To Sleep) is called before the OS is + * entering a sleep state. The sleep state number is passed in Arg0. + */ +Method(_PTS, 1) +{ +} + +/* The _WAK method is called on system wakeup */ +Method(_WAK, 1) +{ + Return (Package() {0, 0}) +} + +/* ACPI global NVS */ +#include "global_nvs.asl" + +Scope (\_SB) +{ + #include "southcluster.asl" +} diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl new file mode 100644 index 0000000000..e80ec0a9be --- /dev/null +++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl @@ -0,0 +1,298 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * Partially based on southcluster.asl for other x86 platforms + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +Device (PCI0) +{ + Name (_HID, EISAID("PNP0A08")) /* PCIe */ + Name (_CID, EISAID("PNP0A03")) /* PCI */ + + Name (_ADR, 0) + Name (_BBN, 0) + + Name (MCRS, ResourceTemplate() + { + /* Bus Numbers */ + WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00) + + /* IO Region 0 */ + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00) + + /* PCI Config Space */ + IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) + + /* IO Region 1 */ + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01) + + /* GPIO Low Memory Region */ + DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x000ddcc0, 0x000ddccf, 0x00000000, + 0x00000010, , , GP00) + + /* PSH Memory Region 0 */ + DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x04819000, 0x04898fff, 0x00000000, + 0x00080000, , , PSH0) + + /* PSH Memory Region 1 */ + DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x04919000, 0x04920fff, 0x00000000, + 0x00008000, , , PSH1) + + /* SST Memory Region */ + DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x05e00000, 0x05ffffff, 0x00000000, + 0x00200000, , , SST0) + + /* PCI Memory Region */ + DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, 0x80000000, 0xffffffff, 0x00000000, + 0x80000000, , , PMEM) + }) + + Method (_CRS, 0, Serialized) + { + Return (MCRS) + } + + Method (_OSC, 4) + { + /* Check for proper GUID */ + If (LEqual(Arg0, ToUUID("33db4d5b-1ff7-401c-9657-7441c03dd766"))) { + /* Let OS control everything */ + Return (Arg3) + } Else { + /* Unrecognized UUID */ + CreateDWordField(Arg3, 0, CDW1) + Or(CDW1, 4, CDW1) + Return (Arg3) + } + } + + Device (SDHC) + { + Name (_ADR, 0x00010003) + Name (_DEP, Package (0x01) + { + GPIO + }) + Name (PSTS, Zero) + + Method (_STA) + { + Return (STA_VISIBLE) + } + + Method (_PS3, 0, NotSerialized) + { + } + + Method (_PS0, 0, NotSerialized) + { + If (PSTS == Zero) + { + If (^^GPIO.AVBL == One) + { + ^^GPIO.WFD3 = One + PSTS = One + } + } + } + + /* BCM43340 */ + Device (BRC1) + { + Name (_ADR, 0x01) + Name (_DEP, Package (0x01) + { + GPIO + }) + + Method (_STA) + { + Return (STA_VISIBLE) + } + + Method (_RMV, 0, NotSerialized) + { + Return (Zero) + } + + Method (_PS3, 0, NotSerialized) + { + If (^^^GPIO.AVBL == One) + { + ^^^GPIO.WFD3 = Zero + PSTS = Zero + } + } + + Method (_PS0, 0, NotSerialized) + { + If (PSTS == Zero) + { + If (^^^GPIO.AVBL == One) + { + ^^^GPIO.WFD3 = One + PSTS = One + } + } + } + } + + Device (BRC2) + { + Name (_ADR, 0x02) + Method (_STA, 0, NotSerialized) + { + Return (STA_VISIBLE) + } + + Method (_RMV, 0, NotSerialized) + { + Return (Zero) + } + } + } + + Device (SPI5) + { + Name (_ADR, 0x00070001) + Name (RBUF, ResourceTemplate() + { + GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 91 } + GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 92 } + GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 93 } + GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 94 } + }) + + Method (_CRS, 0, NotSerialized) + { + Return (RBUF) + } + + /* + * See + * http://www.kernel.org/doc/Documentation/acpi/gpio-properties.txt + * for more information about GPIO bindings. + */ + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { + "cs-gpios", Package () { + ^SPI5, 0, 0, 0, + ^SPI5, 1, 0, 0, + ^SPI5, 2, 0, 0, + ^SPI5, 3, 0, 0, + }, + }, + } + }) + + Method (_STA, 0, NotSerialized) + { + Return (STA_VISIBLE) + } + } + + Device (I2C1) + { + Name (_ADR, 0x00080000) + + Method (_STA, 0, NotSerialized) + { + Return (STA_VISIBLE) + } + } + + Device (GPIO) + { + Name (_ADR, 0x000c0000) + + Method (_STA) + { + Return (STA_VISIBLE) + } + + Name (AVBL, Zero) + Method (_REG, 2, NotSerialized) + { + If (Arg0 == 0x08) + { + AVBL = Arg1 + } + } + + OperationRegion (GPOP, GeneralPurposeIo, 0, 1) + Field (GPOP, ByteAcc, NoLock, Preserve) + { + Connection ( + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, + "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 56 } + ), + WFD3, 1, + } + } + + Device (PWM0) + { + Name (_ADR, 0x00170000) + + Method (_STA, 0, NotSerialized) + { + Return (STA_VISIBLE) + } + } +} + +Device (FLIS) +{ + Name (_HID, "PRP0001") + Name (_DDN, "Intel Merrifield Family-Level Interface Shim") + Name (RBUF, ResourceTemplate() + { + Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000, ) + PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 } + PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 } + PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 } + PinGroup("uart2", ResourceProducer, ) { 123, 124, 125, 126 } + PinGroup("pwm0", ResourceProducer, ) { 144 } + PinGroup("pwm1", ResourceProducer, ) { 145 } + PinGroup("pwm2", ResourceProducer, ) { 132 } + PinGroup("pwm3", ResourceProducer, ) { 133 } + }) + + Method (_CRS, 0, NotSerialized) + { + Return (RBUF) + } + + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () {"compatible", "intel,merrifield-pinctrl"}, + } + }) + + Method (_STA, 0, NotSerialized) + { + Return (STA_VISIBLE) + } +} diff --git a/arch/x86/include/asm/arch-tangier/global_nvs.h b/arch/x86/include/asm/arch-tangier/global_nvs.h new file mode 100644 index 0000000000..8ab5cf2aa2 --- /dev/null +++ b/arch/x86/include/asm/arch-tangier/global_nvs.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * Partially based on global_nvs.h for other x86 platforms + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _GLOBAL_NVS_H_ +#define _GLOBAL_NVS_H_ + +struct __packed acpi_global_nvs { + u8 pcnt; /* processor count */ + + /* + * Add padding so sizeof(struct acpi_global_nvs) == 0x100. + * This must match the size defined in the global_nvs.asl. + */ + u8 rsvd[255]; +}; + +#endif /* _GLOBAL_NVS_H_ */ diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index a72daf2263..263dd8fd17 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -231,35 +231,6 @@ static inline void sync(void) } /* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)(uintptr_t)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ - -} - -static inline phys_addr_t virt_to_phys(void * vaddr) -{ - return (phys_addr_t)(uintptr_t)(vaddr); -} - -/* * TODO: The kernel offers some more advanced versions of barriers, it might * have some advantages to use them instead of the simple one here. */ @@ -267,4 +238,6 @@ static inline phys_addr_t virt_to_phys(void * vaddr) #define __iormb() dmb() #define __iowmb() dmb() +#include <asm-generic/io.h> + #endif /* _ASM_IO_H */ diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h index e34d6e1d7f..c9e335f4f6 100644 --- a/arch/xtensa/include/asm/io.h +++ b/arch/xtensa/include/asm/io.h @@ -115,29 +115,6 @@ void outsl(unsigned long port, const void *src, unsigned long count); */ #define xlate_dev_kmem_ptr(p) p -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ -} - -static inline phys_addr_t virt_to_phys(void *vaddr) -{ - return (phys_addr_t)((unsigned long)vaddr); -} - /* * Dummy function to keep U-Boot's cfi_flash.c driver happy. */ @@ -145,4 +122,6 @@ static inline void sync(void) { } +#include <asm-generic/io.h> + #endif /* _XTENSA_IO_H */ diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c index c72894357c..6fe74714cc 100644 --- a/board/advantech/dms-ba16/dms-ba16.c +++ b/board/advantech/dms-ba16/dms-ba16.c @@ -25,6 +25,7 @@ #include <asm/io.h> #include <asm/arch/sys_proto.h> #include <i2c.h> +#include <input.h> #include <pwm.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c index ceee42c16e..7985671fbd 100644 --- a/board/amarula/vyasa-rk3288/vyasa-rk3288.c +++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c @@ -5,3 +5,16 @@ */ #include <common.h> + +#ifndef CONFIG_TPL_BUILD +#include <spl.h> + +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + + return 0; +} +#endif diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index 872fedd290..a60cbfca85 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -28,6 +28,7 @@ #include <asm/arch/crm_regs.h> #include <linux/fb.h> #include <ipu_pixfmt.h> +#include <input.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> #include <pwm.h> diff --git a/board/atmel/at91sam9260ek/Makefile b/board/atmel/at91sam9260ek/Makefile index 07c6184352..ad95928701 100644 --- a/board/atmel/at91sam9260ek/Makefile +++ b/board/atmel/at91sam9260ek/Makefile @@ -11,4 +11,3 @@ obj-y += at91sam9260ek.o obj-$(CONFIG_AT91_LED) += led.o -obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/atmel/at91sam9260ek/partition.c b/board/atmel/at91sam9260ek/partition.c deleted file mode 100644 index e41eefe461..0000000000 --- a/board/atmel/at91sam9260ek/partition.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * (C) Copyright 2008 - * Ulf Samuelsson <ulf@atmel.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <config.h> -#include <asm/hardware.h> -#include <dataflash.h> - -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1} -}; - -/*define the area offsets*/ -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, - {0x00008400, 0x00083FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, - {0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, - {0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, -}; diff --git a/board/atmel/at91sam9261ek/Makefile b/board/atmel/at91sam9261ek/Makefile index d7ba1533d8..1e807ecc14 100644 --- a/board/atmel/at91sam9261ek/Makefile +++ b/board/atmel/at91sam9261ek/Makefile @@ -11,4 +11,3 @@ obj-y += at91sam9261ek.o obj-$(CONFIG_AT91_LED) += led.o -obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/atmel/at91sam9261ek/partition.c b/board/atmel/at91sam9261ek/partition.c deleted file mode 100644 index ed97609297..0000000000 --- a/board/atmel/at91sam9261ek/partition.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * (C) Copyright 2008 - * Ulf Samuelsson <ulf@atmel.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <config.h> -#include <asm/hardware.h> -#include <dataflash.h> - -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3} -}; - -/*define the area offsets*/ -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, - {0x00008400, 0x00083FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, - {0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, - {0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, -}; diff --git a/board/atmel/at91sam9263ek/Makefile b/board/atmel/at91sam9263ek/Makefile index f3cd9d556e..b7a30ee6ef 100644 --- a/board/atmel/at91sam9263ek/Makefile +++ b/board/atmel/at91sam9263ek/Makefile @@ -11,4 +11,3 @@ obj-y += at91sam9263ek.o obj-$(CONFIG_AT91_LED) += led.o -obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/atmel/at91sam9263ek/partition.c b/board/atmel/at91sam9263ek/partition.c deleted file mode 100644 index 8617f4899c..0000000000 --- a/board/atmel/at91sam9263ek/partition.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * (C) Copyright 2008 - * Ulf Samuelsson <ulf@atmel.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <config.h> -#include <asm/hardware.h> -#include <dataflash.h> - -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ -}; - -/*define the area offsets*/ -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, - {0x00008400, 0x00083FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, - {0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, - {0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, -}; diff --git a/board/atmel/at91sam9rlek/Makefile b/board/atmel/at91sam9rlek/Makefile index 7acfee5350..89f6c0833c 100644 --- a/board/atmel/at91sam9rlek/Makefile +++ b/board/atmel/at91sam9rlek/Makefile @@ -11,4 +11,3 @@ obj-y += at91sam9rlek.o obj-$(CONFIG_AT91_LED) += led.o -obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/atmel/at91sam9rlek/partition.c b/board/atmel/at91sam9rlek/partition.c deleted file mode 100644 index 8617f4899c..0000000000 --- a/board/atmel/at91sam9rlek/partition.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * (C) Copyright 2008 - * Ulf Samuelsson <ulf@atmel.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <config.h> -#include <asm/hardware.h> -#include <dataflash.h> - -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ -}; - -/*define the area offsets*/ -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, - {0x00008400, 0x00083FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, - {0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, - {0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, -}; diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index be6dd4a6d3..d69831ad15 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -13,12 +13,6 @@ #include <asm/arch/clk.h> #include <asm/arch/gpio.h> #include <debug_uart.h> -#include <lcd.h> -#include <atmel_hlcdc.h> -#ifdef CONFIG_LCD_INFO -#include <nand.h> -#include <version.h> -#endif #include <asm/mach-types.h> DECLARE_GLOBAL_DATA_PTR; @@ -86,103 +80,15 @@ static void at91sam9x5ek_nand_hw_init(void) } #endif -#ifdef CONFIG_LCD -vidinfo_t panel_info = { - .vl_col = 800, - .vl_row = 480, - .vl_clk = 24000000, - .vl_sync = LCDC_LCDCFG5_HSPOL | LCDC_LCDCFG5_VSPOL, - .vl_bpix = LCD_BPP, - .vl_tft = 1, - .vl_clk_pol = 1, - .vl_hsync_len = 128, - .vl_left_margin = 64, - .vl_right_margin = 64, - .vl_vsync_len = 2, - .vl_upper_margin = 22, - .vl_lower_margin = 21, - .mmio = ATMEL_BASE_LCDC, -}; - -void lcd_enable(void) -{ - if (has_lcdc()) - at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 1); /* power up */ -} - -void lcd_disable(void) -{ - if (has_lcdc()) - at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0); /* power down */ -} - -static void at91sam9x5ek_lcd_hw_init(void) -{ - if (has_lcdc()) { - at91_pio3_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDPWM */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDVSYNC */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDHSYNC */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDISP */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDEN */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDPCK */ - - at91_pio3_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDD0 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDD1 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDD2 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDD3 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 4, 0); /* LCDD4 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 5, 0); /* LCDD5 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD6 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD7 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD8 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD9 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD10 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD11 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDD12 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDD13 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD14 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD15 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD16 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDD17 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD18 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD19 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDD20 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDD21 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD22 */ - at91_pio3_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD23 */ - - at91_periph_clk_enable(ATMEL_ID_LCDC); - } -} - -#ifdef CONFIG_LCD_INFO -void lcd_show_board_info(void) +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) { - ulong dram_size, nand_size; - int i; - char temp[32]; - - if (has_lcdc()) { - lcd_printf("%s\n", U_BOOT_VERSION); - lcd_printf("(C) 2012 ATMEL Corp\n"); - lcd_printf("at91support@atmel.com\n"); - lcd_printf("%s CPU at %s MHz\n", - get_cpu_name(), - strmhz(temp, get_cpu_clk_rate())); - - dram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - dram_size += gd->bd->bi_dram[i].size; - nand_size = 0; - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += get_nand_dev_by_index(i)->size; - lcd_printf(" %ld MB SDRAM, %ld MB NAND\n", - dram_size >> 20, - nand_size >> 20); - } +#ifdef CONFIG_DM_VIDEO + at91_video_show_board_info(); +#endif + return 0; } -#endif /* CONFIG_LCD_INFO */ -#endif /* CONFIG_LCD */ +#endif #ifdef CONFIG_DEBUG_UART_BOARD_INIT void board_debug_uart_init(void) @@ -216,9 +122,6 @@ int board_init(void) #if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI_HCD) at91_uhp_hw_init(); #endif -#ifdef CONFIG_LCD - at91sam9x5ek_lcd_hw_init(); -#endif return 0; } diff --git a/board/atmel/common/video_display.c b/board/atmel/common/video_display.c index 39ad619819..b20abc7386 100644 --- a/board/atmel/common/video_display.c +++ b/board/atmel/common/video_display.c @@ -43,7 +43,7 @@ int at91_video_show_board_info(void) nand_size = 0; #ifdef CONFIG_NAND_ATMEL for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += nand_info[i]->size; + nand_size += get_nand_dev_by_index(i)->size; #endif len += sprintf(&buf[len], "%ld MB SDRAM, %ld MB NAND\n", diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c index 5758653030..778142ac71 100644 --- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c +++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c @@ -6,10 +6,7 @@ */ #include <common.h> -#include <atmel_hlcdc.h> #include <debug_uart.h> -#include <lcd.h> -#include <version.h> #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/atmel_pio4.h> @@ -26,90 +23,15 @@ static void board_usb_hw_init(void) atmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 1); } -#ifdef CONFIG_LCD -vidinfo_t panel_info = { - .vl_col = 480, - .vl_row = 272, - .vl_clk = 9000000, - .vl_bpix = LCD_BPP, - .vl_tft = 1, - .vl_hsync_len = 41, - .vl_left_margin = 2, - .vl_right_margin = 2, - .vl_vsync_len = 11, - .vl_upper_margin = 2, - .vl_lower_margin = 2, - .mmio = ATMEL_BASE_LCDC, -}; - -/* No power up/down pin for the LCD pannel */ -void lcd_enable(void) { /* Empty! */ } -void lcd_disable(void) { /* Empty! */ } - -unsigned int has_lcdc(void) +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) { - return 1; -} - -static void board_lcd_hw_init(void) -{ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 28, 0); /* LCDPWM */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 29, 0); /* LCDDISP */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 30, 0); /* LCDVSYNC */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 31, 0); /* LCDHSYNC */ - atmel_pio4_set_a_periph(AT91_PIO_PORTD, 0, 0); /* LCDPCK */ - atmel_pio4_set_a_periph(AT91_PIO_PORTD, 1, 0); /* LCDDEN */ - - /* LCDDAT0 */ - /* LCDDAT1 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDDAT2 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDDAT3 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 12, 0); /* LCDDAT4 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 13, 0); /* LCDDAT5 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDDAT6 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDDAT7 */ - - /* LCDDAT8 */ - /* LCDDAT9 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDDAT10 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 17, 0); /* LCDDAT11 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDDAT12 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDDAT13 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 20, 0); /* LCDDAT14 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 21, 0); /* LCDDAT15 */ - - /* LCDD16 */ - /* LCDD17 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDDAT18 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDDAT19 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDDAT20 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 25, 0); /* LCDDAT21 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDDAT22 */ - atmel_pio4_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDDAT23 */ - - at91_periph_clk_enable(ATMEL_ID_LCDC); -} - -#ifdef CONFIG_LCD_INFO -void lcd_show_board_info(void) -{ - ulong dram_size; - int i; - char temp[32]; - - lcd_printf("%s\n", U_BOOT_VERSION); - lcd_printf("2015 ATMEL Corp\n"); - lcd_printf("%s CPU at %s MHz\n", get_cpu_name(), - strmhz(temp, get_cpu_clk_rate())); - - dram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - dram_size += gd->bd->bi_dram[i].size; - - lcd_printf("%ld MB SDRAM\n", dram_size >> 20); +#ifdef CONFIG_DM_VIDEO + at91_video_show_board_info(); +#endif + return 0; } -#endif /* CONFIG_LCD_INFO */ -#endif /* CONFIG_LCD */ +#endif #ifdef CONFIG_DEBUG_UART_BOARD_INIT static void board_uart1_hw_init(void) @@ -142,9 +64,6 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; -#ifdef CONFIG_LCD - board_lcd_hw_init(); -#endif #ifdef CONFIG_CMD_USB board_usb_hw_init(); #endif diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c index 6d473fc06d..98d846fd79 100644 --- a/board/atmel/sama5d3xek/sama5d3xek.c +++ b/board/atmel/sama5d3xek/sama5d3xek.c @@ -13,9 +13,7 @@ #include <asm/arch/gpio.h> #include <asm/arch/clk.h> #include <debug_uart.h> -#include <lcd.h> #include <linux/ctype.h> -#include <atmel_hlcdc.h> #include <phy.h> #include <micrel.h> #include <spl.h> @@ -132,80 +130,6 @@ static void sama5d3xek_mci_hw_init(void) } #endif -#ifdef CONFIG_LCD -vidinfo_t panel_info = { - .vl_col = 800, - .vl_row = 480, - .vl_clk = 24000000, - .vl_bpix = LCD_BPP, - .vl_tft = 1, - .vl_hsync_len = 128, - .vl_left_margin = 64, - .vl_right_margin = 64, - .vl_vsync_len = 2, - .vl_upper_margin = 22, - .vl_lower_margin = 21, - .mmio = ATMEL_BASE_LCDC, -}; - -void lcd_enable(void) -{ -} - -void lcd_disable(void) -{ -} - -static void sama5d3xek_lcd_hw_init(void) -{ - gd->fb_base = CONFIG_SAMA5D3_LCD_BASE; - - /* The higher 8 bit of LCD is board related */ - at91_pio3_set_c_periph(AT91_PIO_PORTC, 14, 0); /* LCDD16 */ - at91_pio3_set_c_periph(AT91_PIO_PORTC, 13, 0); /* LCDD17 */ - at91_pio3_set_c_periph(AT91_PIO_PORTC, 12, 0); /* LCDD18 */ - at91_pio3_set_c_periph(AT91_PIO_PORTC, 11, 0); /* LCDD19 */ - at91_pio3_set_c_periph(AT91_PIO_PORTC, 10, 0); /* LCDD20 */ - at91_pio3_set_c_periph(AT91_PIO_PORTC, 15, 0); /* LCDD21 */ - at91_pio3_set_c_periph(AT91_PIO_PORTE, 27, 0); /* LCDD22 */ - at91_pio3_set_c_periph(AT91_PIO_PORTE, 28, 0); /* LCDD23 */ - - /* Configure lower 16 bit of LCD and enable clock */ - at91_lcd_hw_init(); -} - -#ifdef CONFIG_LCD_INFO -#include <nand.h> -#include <version.h> - -void lcd_show_board_info(void) -{ - ulong dram_size; - uint64_t nand_size; - int i; - char temp[32]; - - lcd_printf("%s\n", U_BOOT_VERSION); - lcd_printf("(C) 2013 ATMEL Corp\n"); - lcd_printf("at91@atmel.com\n"); - lcd_printf("%s CPU at %s MHz\n", get_cpu_name(), - strmhz(temp, get_cpu_clk_rate())); - - dram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - dram_size += gd->bd->bi_dram[i].size; - - nand_size = 0; -#ifdef CONFIG_NAND_ATMEL - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += get_nand_dev_by_index(i)->size; -#endif - lcd_printf("%ld MB SDRAM, %lld MB NAND\n", - dram_size >> 20, nand_size >> 20); -} -#endif /* CONFIG_LCD_INFO */ -#endif /* CONFIG_LCD */ - #ifdef CONFIG_DEBUG_UART_BOARD_INIT void board_debug_uart_init(void) { @@ -240,10 +164,6 @@ int board_init(void) #ifdef CONFIG_GENERIC_ATMEL_MCI sama5d3xek_mci_hw_init(); #endif -#ifdef CONFIG_LCD - if (has_lcdc()) - sama5d3xek_lcd_hw_init(); -#endif return 0; } @@ -269,6 +189,9 @@ int board_late_init(void) strcat(name, "ek.dtb"); env_set("dtb_name", name); #endif +#ifdef CONFIG_DM_VIDEO + at91_video_show_board_info(); +#endif return 0; } #endif diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c index 9236a28549..78eddb8beb 100644 --- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c +++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c @@ -14,11 +14,7 @@ #include <asm/arch/clk.h> #include <asm/arch/sama5d3_smc.h> #include <asm/arch/sama5d4.h> -#include <atmel_hlcdc.h> #include <debug_uart.h> -#include <lcd.h> -#include <nand.h> -#include <version.h> DECLARE_GLOBAL_DATA_PTR; @@ -73,98 +69,15 @@ static void sama5d4_xplained_usb_hw_init(void) } #endif -#ifdef CONFIG_LCD -vidinfo_t panel_info = { - .vl_col = 480, - .vl_row = 272, - .vl_clk = 9000000, - .vl_bpix = LCD_BPP, - .vl_tft = 1, - .vl_hsync_len = 41, - .vl_left_margin = 2, - .vl_right_margin = 2, - .vl_vsync_len = 11, - .vl_upper_margin = 2, - .vl_lower_margin = 2, - .mmio = ATMEL_BASE_LCDC, -}; - -/* No power up/down pin for the LCD pannel */ -void lcd_enable(void) { /* Empty! */ } -void lcd_disable(void) { /* Empty! */ } - -unsigned int has_lcdc(void) +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) { - return 1; -} - -static void sama5d4_xplained_lcd_hw_init(void) -{ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 24, 0); /* LCDPWM */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 25, 0); /* LCDDISP */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 26, 0); /* LCDVSYNC */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 27, 0); /* LCDHSYNC */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 28, 0); /* LCDDOTCK */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 29, 0); /* LCDDEN */ - - at91_pio3_set_a_periph(AT91_PIO_PORTA, 0, 0); /* LCDD0 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 1, 0); /* LCDD1 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 2, 0); /* LCDD2 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 3, 0); /* LCDD3 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 4, 0); /* LCDD4 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 5, 0); /* LCDD5 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 6, 0); /* LCDD6 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 7, 0); /* LCDD7 */ - - at91_pio3_set_a_periph(AT91_PIO_PORTA, 8, 0); /* LCDD9 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 9, 0); /* LCDD8 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 0); /* LCDD10 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0); /* LCDD11 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0); /* LCDD12 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0); /* LCDD13 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 14, 0); /* LCDD14 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0); /* LCDD15 */ - - at91_pio3_set_a_periph(AT91_PIO_PORTA, 16, 0); /* LCDD16 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 17, 0); /* LCDD17 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 0); /* LCDD18 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 0); /* LCDD19 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 0); /* LCDD20 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 21, 0); /* LCDD21 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 22, 0); /* LCDD22 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 23, 0); /* LCDD23 */ - - /* Enable clock */ - at91_periph_clk_enable(ATMEL_ID_LCDC); -} - -#ifdef CONFIG_LCD_INFO -void lcd_show_board_info(void) -{ - ulong dram_size, nand_size; - int i; - char temp[32]; - - lcd_printf("%s\n", U_BOOT_VERSION); - lcd_printf("2014 ATMEL Corp\n"); - lcd_printf("%s CPU at %s MHz\n", get_cpu_name(), - strmhz(temp, get_cpu_clk_rate())); - - dram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - dram_size += gd->bd->bi_dram[i].size; - - nand_size = 0; -#ifdef CONFIG_NAND_ATMEL - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += get_nand_dev_by_index(i)->size; +#ifdef CONFIG_DM_VIDEO + at91_video_show_board_info(); #endif - lcd_printf("%ld MB SDRAM, %ld MB NAND\n", - dram_size >> 20, nand_size >> 20); + return 0; } -#endif /* CONFIG_LCD_INFO */ - -#endif /* CONFIG_LCD */ +#endif #ifdef CONFIG_DEBUG_UART_BOARD_INIT static void sama5d4_xplained_serial3_hw_init(void) @@ -212,9 +125,6 @@ int board_init(void) #ifdef CONFIG_NAND_ATMEL sama5d4_xplained_nand_hw_init(); #endif -#ifdef CONFIG_LCD - sama5d4_xplained_lcd_hw_init(); -#endif #ifdef CONFIG_CMD_USB sama5d4_xplained_usb_hw_init(); #endif diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c index ee07038e2e..48c43f0163 100644 --- a/board/atmel/sama5d4ek/sama5d4ek.c +++ b/board/atmel/sama5d4ek/sama5d4ek.c @@ -14,11 +14,7 @@ #include <asm/arch/clk.h> #include <asm/arch/sama5d3_smc.h> #include <asm/arch/sama5d4.h> -#include <atmel_hlcdc.h> #include <debug_uart.h> -#include <lcd.h> -#include <nand.h> -#include <version.h> DECLARE_GLOBAL_DATA_PTR; @@ -74,93 +70,15 @@ static void sama5d4ek_usb_hw_init(void) } #endif -#ifdef CONFIG_LCD -vidinfo_t panel_info = { - .vl_col = 800, - .vl_row = 480, - .vl_clk = 33260000, - .vl_bpix = LCD_BPP, - .vl_tft = 1, - .vl_hsync_len = 5, - .vl_left_margin = 128, - .vl_right_margin = 0, - .vl_vsync_len = 5, - .vl_upper_margin = 23, - .vl_lower_margin = 22, - .mmio = ATMEL_BASE_LCDC, -}; - -/* No power up/down pin for the LCD pannel */ -void lcd_enable(void) { /* Empty! */ } -void lcd_disable(void) { /* Empty! */ } - -unsigned int has_lcdc(void) +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) { - return 1; -} - -static void sama5d4ek_lcd_hw_init(void) -{ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 24, 0); /* LCDPWM */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 25, 0); /* LCDDISP */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 26, 0); /* LCDVSYNC */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 27, 0); /* LCDHSYNC */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 28, 0); /* LCDDOTCK */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 29, 0); /* LCDDEN */ - - at91_pio3_set_a_periph(AT91_PIO_PORTA, 2, 0); /* LCDD2 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 3, 0); /* LCDD3 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 4, 0); /* LCDD4 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 5, 0); /* LCDD5 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 6, 0); /* LCDD6 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 7, 0); /* LCDD7 */ - - at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 0); /* LCDD10 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0); /* LCDD11 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0); /* LCDD12 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0); /* LCDD13 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 14, 0); /* LCDD14 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0); /* LCDD15 */ - - at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 0); /* LCDD18 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 0); /* LCDD19 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 0); /* LCDD20 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 21, 0); /* LCDD21 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 22, 0); /* LCDD22 */ - at91_pio3_set_a_periph(AT91_PIO_PORTA, 23, 0); /* LCDD23 */ - - /* Enable clock */ - at91_periph_clk_enable(ATMEL_ID_LCDC); -} - -#ifdef CONFIG_LCD_INFO -void lcd_show_board_info(void) -{ - ulong dram_size, nand_size; - int i; - char temp[32]; - - lcd_printf("%s\n", U_BOOT_VERSION); - lcd_printf("2014 ATMEL Corp\n"); - lcd_printf("at91@atmel.com\n"); - lcd_printf("%s CPU at %s MHz\n", get_cpu_name(), - strmhz(temp, get_cpu_clk_rate())); - - dram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - dram_size += gd->bd->bi_dram[i].size; - - nand_size = 0; -#ifdef CONFIG_NAND_ATMEL - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += get_nand_dev_by_index(i)->size; +#ifdef CONFIG_DM_VIDEO + at91_video_show_board_info(); #endif - lcd_printf("%ld MB SDRAM, %ld MB NAND\n", - dram_size >> 20, nand_size >> 20); + return 0; } -#endif /* CONFIG_LCD_INFO */ - -#endif /* CONFIG_LCD */ +#endif #ifdef CONFIG_DEBUG_UART_BOARD_INIT static void sama5d4ek_serial3_hw_init(void) @@ -196,9 +114,6 @@ int board_init(void) #ifdef CONFIG_NAND_ATMEL sama5d4ek_nand_hw_init(); #endif -#ifdef CONFIG_LCD - sama5d4ek_lcd_hw_init(); -#endif #ifdef CONFIG_CMD_USB sama5d4ek_usb_hw_init(); #endif diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c index a18a4e8ac5..021bd967c4 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020.c @@ -26,6 +26,7 @@ #include <asm/gpio.h> #include <linux/fb.h> #include <ipu_pixfmt.h> +#include <input.h> #include <fs.h> #include <dm/platform_data/serial_mxc.h> diff --git a/board/ccv/xpress/xpress.c b/board/ccv/xpress/xpress.c index b65646588a..8de2c4e6c2 100644 --- a/board/ccv/xpress/xpress.c +++ b/board/ccv/xpress/xpress.c @@ -108,6 +108,8 @@ int dram_init(void) static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_UART1_CTS_B__UART1_DCE_CTS | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_UART1_RTS_B__UART1_DCE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL), }; static iomux_v3_cfg_t const uart4_pads[] = { @@ -122,11 +124,14 @@ static iomux_v3_cfg_t const uart5_pads[] = { MX6_PAD_GPIO1_IO08__UART5_DCE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL), }; +static iomux_v3_cfg_t const uart7_pads[] = { + MX6_PAD_ENET2_RX_EN__UART7_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_ENET2_TX_DATA0__UART7_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + static iomux_v3_cfg_t const uart8_pads[] = { - MX6_PAD_ENET2_TX_DATA1__UART8_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_ENET2_TX_EN__UART8_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_ENET2_TX_CLK__UART8_DCE_CTS | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_ENET2_RX_ER__UART8_DCE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_LCD_DATA20__UART8_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_LCD_DATA21__UART8_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), }; static void setup_iomux_uart(void) @@ -134,6 +139,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); imx_iomux_v3_setup_multiple_pads(uart5_pads, ARRAY_SIZE(uart5_pads)); + imx_iomux_v3_setup_multiple_pads(uart7_pads, ARRAY_SIZE(uart7_pads)); imx_iomux_v3_setup_multiple_pads(uart8_pads, ARRAY_SIZE(uart8_pads)); } diff --git a/board/compulab/cl-som-imx7/Kconfig b/board/compulab/cl-som-imx7/Kconfig new file mode 100644 index 0000000000..6d69cf31f4 --- /dev/null +++ b/board/compulab/cl-som-imx7/Kconfig @@ -0,0 +1,28 @@ +if TARGET_CL_SOM_IMX7 + +config SYS_BOARD + default "cl-som-imx7" + +config SYS_VENDOR + default "compulab" + +config SYS_CONFIG_NAME + default "cl-som-imx7" + +config SYS_MMC_DEV + int + default 0 + +config SYS_USB_DEV + int + default 0 + +config SYS_MMC_IMG_LOAD_PART + int + default 1 + +config SYS_USB_IMG_LOAD_PART + int + default 1 + +endif diff --git a/board/compulab/cl-som-imx7/MAINTAINERS b/board/compulab/cl-som-imx7/MAINTAINERS new file mode 100644 index 0000000000..2b917a5c80 --- /dev/null +++ b/board/compulab/cl-som-imx7/MAINTAINERS @@ -0,0 +1,6 @@ +CL-SOM-IMX7 BOARD +M: Uri Mashiach <uri.mashiach@compulab.co.il> +S: Maintained +F: board/compulab/cl-som-imx7 +F: include/configs/cl-som-imx7.h +F: configs/cl-som-imx7_defconfig diff --git a/board/compulab/cl-som-imx7/Makefile b/board/compulab/cl-som-imx7/Makefile new file mode 100644 index 0000000000..8f0e068b7e --- /dev/null +++ b/board/compulab/cl-som-imx7/Makefile @@ -0,0 +1,17 @@ +# +# Makefile +# +# (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com +# +# Author: Uri Mashiach <uri.mashiach@compulab.co.il> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mux.o common.o + +ifdef CONFIG_SPL_BUILD +obj-y += spl.o +else +obj-y += cl-som-imx7.o +endif diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c new file mode 100644 index 0000000000..f8b1cda5bb --- /dev/null +++ b/board/compulab/cl-som-imx7/cl-som-imx7.c @@ -0,0 +1,331 @@ +/* + * U-Boot board functions for CompuLab CL-SOM-iMX7 module + * + * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com + * + * Author: Uri Mashiach <uri.mashiach@compulab.co.il> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <mmc.h> +#include <phy.h> +#include <netdev.h> +#include <fsl_esdhc.h> +#include <power/pmic.h> +#include <power/pfuze3000_pmic.h> +#include <asm/mach-imx/mxc_i2c.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/arch-mx7/mx7-pins.h> +#include <asm/arch-mx7/sys_proto.h> +#include <asm/arch-mx7/clock.h> +#include "../common/eeprom.h" +#include "common.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SYS_I2C_MXC + +#define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ + PAD_CTL_HYS) + +#define CL_SOM_IMX7_GPIO_I2C2_SCL IMX_GPIO_NR(1, 6) +#define CL_SOM_IMX7_GPIO_I2C2_SDA IMX_GPIO_NR(1, 7) + +static struct i2c_pads_info cl_som_imx7_i2c_pad_info2 = { + .scl = { + .i2c_mode = MX7D_PAD_GPIO1_IO06__I2C2_SCL | + MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX7D_PAD_GPIO1_IO06__GPIO1_IO6 | + MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = CL_SOM_IMX7_GPIO_I2C2_SCL, + }, + .sda = { + .i2c_mode = MX7D_PAD_GPIO1_IO07__I2C2_SDA | + MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX7D_PAD_GPIO1_IO07__GPIO1_IO7 | + MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = CL_SOM_IMX7_GPIO_I2C2_SDA, + }, +}; + +/* + * cl_som_imx7_setup_i2c() - I2C pinmux configuration. + */ +static void cl_som_imx7_setup_i2c(void) +{ + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &cl_som_imx7_i2c_pad_info2); +} +#else /* !CONFIG_SYS_I2C_MXC */ +static void cl_som_imx7_setup_i2c(void) {} +#endif /* CONFIG_SYS_I2C_MXC */ + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +#ifdef CONFIG_FSL_ESDHC + +#define CL_SOM_IMX7_GPIO_USDHC3_PWR IMX_GPIO_NR(6, 11) + +static struct fsl_esdhc_cfg cl_som_imx7_usdhc_cfg[3] = { + {USDHC1_BASE_ADDR, 0, 4}, + {USDHC3_BASE_ADDR}, +}; + +int board_mmc_init(bd_t *bis) +{ + int i, ret; + /* + * According to the board_mmc_init() the following map is done: + * (U-boot device node) (Physical Port) + * mmc0 USDHC1 + * mmc2 USDHC3 (eMMC) + */ + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + cl_som_imx7_usdhc1_pads_set(); + gpio_request(CL_SOM_IMX7_GPIO_USDHC1_CD, "usdhc1_cd"); + cl_som_imx7_usdhc_cfg[0].sdhc_clk = + mxc_get_clock(MXC_ESDHC_CLK); + break; + case 1: + cl_som_imx7_usdhc3_emmc_pads_set(); + gpio_request(CL_SOM_IMX7_GPIO_USDHC3_PWR, "usdhc3_pwr"); + gpio_direction_output(CL_SOM_IMX7_GPIO_USDHC3_PWR, 0); + udelay(500); + gpio_direction_output(CL_SOM_IMX7_GPIO_USDHC3_PWR, 1); + cl_som_imx7_usdhc_cfg[1].sdhc_clk = + mxc_get_clock(MXC_ESDHC3_CLK); + break; + default: + printf("Warning: you configured more USDHC controllers " + "(%d) than supported by the board\n", i + 1); + return -EINVAL; + } + + ret = fsl_esdhc_initialize(bis, &cl_som_imx7_usdhc_cfg[i]); + if (ret) + return ret; + } + + return 0; +} +#endif /* CONFIG_FSL_ESDHC */ + +#ifdef CONFIG_FEC_MXC + +#define CL_SOM_IMX7_ETH1_PHY_NRST IMX_GPIO_NR(1, 4) + +/* + * cl_som_imx7_rgmii_rework() - Ethernet PHY configuration. + */ +static void cl_som_imx7_rgmii_rework(struct phy_device *phydev) +{ + unsigned short val; + + /* Ar8031 phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= ~(0x1 << 8); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); + + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= 0xffe3; + val |= 0x18; + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* introduce tx clock delay */ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); + val |= 0x0100; + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); +} + +int board_phy_config(struct phy_device *phydev) +{ + cl_som_imx7_rgmii_rework(phydev); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +/* + * cl_som_imx7_handle_mac_address() - set Ethernet MAC address environment. + * + * @env_var: MAC address environment variable + * @eeprom_bus: I2C bus of the environment EEPROM + * + * @return: 0 on success, < 0 on failure + */ +static int cl_som_imx7_handle_mac_address(char *env_var, uint eeprom_bus) +{ + int ret; + unsigned char enetaddr[6]; + + ret = eth_env_get_enetaddr(env_var, enetaddr); + if (ret) + return 0; + + ret = cl_eeprom_read_mac_addr(enetaddr, eeprom_bus); + if (ret) + return ret; + + ret = is_valid_ethaddr(enetaddr); + if (!ret) + return -1; + + return eth_env_set_enetaddr(env_var, enetaddr); +} + +#define CL_SOM_IMX7_FEC_DEV_ID_PRI 0 + +int board_eth_init(bd_t *bis) +{ + /* set Ethernet MAC address environment */ + cl_som_imx7_handle_mac_address("ethaddr", CONFIG_SYS_I2C_EEPROM_BUS); + /* Ethernet interface pinmux configuration */ + cl_som_imx7_phy1_rst_pads_set(); + cl_som_imx7_fec1_pads_set(); + /* PHY reset */ + gpio_request(CL_SOM_IMX7_ETH1_PHY_NRST, "eth1_phy_nrst"); + gpio_direction_output(CL_SOM_IMX7_ETH1_PHY_NRST, 0); + mdelay(10); + gpio_set_value(CL_SOM_IMX7_ETH1_PHY_NRST, 1); + /* MAC initialization */ + return fecmxc_initialize_multi(bis, CL_SOM_IMX7_FEC_DEV_ID_PRI, + CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE); +} + +/* + * cl_som_imx7_setup_fec() - Ethernet MAC 1 clock configuration. + * - ENET1 reference clock mode select. + * - ENET1_TX_CLK output driver is disabled when configured for ALT1. + */ +static void cl_som_imx7_setup_fec(void) +{ + struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs + = (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + + /* Use 125M anatop REF_CLK1 for ENET1, clear gpr1[13], gpr1[17]*/ + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], + (IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK | + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0); + + set_clk_enet(ENET_125MHZ); +} +#else /* !CONFIG_FEC_MXC */ +static void cl_som_imx7_setup_fec(void) {} +#endif /* CONFIG_FEC_MXC */ + +#ifdef CONFIG_SPI + +static void cl_som_imx7_spi_init(void) +{ + cl_som_imx7_espi1_pads_set(); +} +#else /* !CONFIG_SPI */ +static void cl_som_imx7_spi_init(void) {} +#endif /* CONFIG_SPI */ + +int board_early_init_f(void) +{ + cl_som_imx7_uart1_pads_set(); + cl_som_imx7_usb_otg1_pads_set(); + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + cl_som_imx7_setup_i2c(); + cl_som_imx7_setup_fec(); + cl_som_imx7_spi_init(); + + return 0; +} + +#ifdef CONFIG_POWER +#define I2C_PMIC 0 +int power_init_board(void) +{ + struct pmic *p; + int ret; + unsigned int reg, rev_id; + + ret = power_pfuze3000_init(I2C_PMIC); + if (ret) + return ret; + + p = pmic_get("PFUZE3000"); + ret = pmic_probe(p); + if (ret) + return ret; + + pmic_reg_read(p, PFUZE3000_DEVICEID, ®); + pmic_reg_read(p, PFUZE3000_REVID, &rev_id); + printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id); + + /* disable Low Power Mode during standby mode */ + pmic_reg_write(p, PFUZE3000_LDOGCTL, 0x1); + + return 0; +} +#endif /* CONFIG_POWER */ + +/* + * cl_som_imx7_setup_wdog() - watchdog configuration. + * - Output WDOG_B signal to reset external pmic. + * - Suspend the watchdog timer during low-power modes. + */ +void cl_som_imx7_setup_wdog(void) +{ + struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + + cl_som_imx7_wdog_pads_set(); + set_wdog_reset(wdog); + /* + * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4), + * since we use PMIC_PWRON to reset the board. + */ + clrsetbits_le16(&wdog->wcr, 0, 0x10); +} + +int board_late_init(void) +{ + env_set("board_name", "CL-SOM-iMX7"); + cl_som_imx7_setup_wdog(); + return 0; +} + +int checkboard(void) +{ + char *mode; + + if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT)) + mode = "secure"; + else + mode = "non-secure"; + + printf("Board: CL-SOM-iMX7 in %s mode\n", mode); + + return 0; +} diff --git a/board/compulab/cl-som-imx7/common.c b/board/compulab/cl-som-imx7/common.c new file mode 100644 index 0000000000..5ee688a69f --- /dev/null +++ b/board/compulab/cl-som-imx7/common.c @@ -0,0 +1,46 @@ +/* + * SPL/U-Boot common functions for CompuLab CL-SOM-iMX7 module + * + * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com + * + * Author: Uri Mashiach <uri.mashiach@compulab.co.il> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <fsl_esdhc.h> +#include <asm-generic/gpio.h> +#include "common.h" + +#ifdef CONFIG_SPI + +#define CL_SOM_IMX7_GPIO_SPI_CS IMX_GPIO_NR(4, 19) + +int board_spi_cs_gpio(unsigned int bus, unsigned int cs) +{ + return CL_SOM_IMX7_GPIO_SPI_CS; +} + +#endif /* CONFIG_SPI */ + +#ifdef CONFIG_FSL_ESDHC + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(CL_SOM_IMX7_GPIO_USDHC1_CD); + break; + case USDHC3_BASE_ADDR: + ret = 1; /* Assume uSDHC3 emmc is always present */ + break; + } + + return ret; +} + +#endif /* CONFIG_FSL_ESDHC */ diff --git a/board/compulab/cl-som-imx7/common.h b/board/compulab/cl-som-imx7/common.h new file mode 100644 index 0000000000..72d96af2ba --- /dev/null +++ b/board/compulab/cl-som-imx7/common.h @@ -0,0 +1,32 @@ +/* + * SPL/U-Boot common header file for CompuLab CL-SOM-iMX7 module + * + * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com + * + * Author: Uri Mashiach <uri.mashiach@compulab.co.il> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#define PADS_SET_PROT(pads_array) void cl_som_imx7_##pads_array##_set(void) + +#ifdef CONFIG_FSL_ESDHC +#define CL_SOM_IMX7_GPIO_USDHC1_CD IMX_GPIO_NR(5, 0) +PADS_SET_PROT(usdhc1_pads); +#endif /* CONFIG_FSL_ESDHC */ +PADS_SET_PROT(uart1_pads); +#ifdef CONFIG_SPI +PADS_SET_PROT(espi1_pads); +#endif /* CONFIG_SPI */ + +#ifndef CONFIG_SPL_BUILD +#ifdef CONFIG_FSL_ESDHC +PADS_SET_PROT(usdhc3_emmc_pads); +#endif /* CONFIG_FSL_ESDHC */ +#ifdef CONFIG_FEC_MXC +PADS_SET_PROT(phy1_rst_pads); +PADS_SET_PROT(fec1_pads); +#endif /* CONFIG_FEC_MXC */ +PADS_SET_PROT(usb_otg1_pads); +PADS_SET_PROT(wdog_pads); +#endif /* !CONFIG_SPL_BUILD */ diff --git a/board/compulab/cl-som-imx7/mux.c b/board/compulab/cl-som-imx7/mux.c new file mode 100644 index 0000000000..82e8b9f237 --- /dev/null +++ b/board/compulab/cl-som-imx7/mux.c @@ -0,0 +1,142 @@ +/* + * SPL/U-Boot mux functions for CompuLab CL-SOM-iMX7 module + * + * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com + * + * Author: Uri Mashiach <uri.mashiach@compulab.co.il> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/arch-mx7/mx7-pins.h> + +#define PADS_SET(pads_array) \ +void cl_som_imx7_##pads_array##_set(void) \ +{ \ + imx_iomux_v3_setup_multiple_pads(pads_array, ARRAY_SIZE(pads_array)); \ +} + +#ifdef CONFIG_FSL_ESDHC + +#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ + PAD_CTL_HYS | PAD_CTL_PUE | \ + PAD_CTL_PUS_PU47KOHM) + +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + MX7D_PAD_SD1_CD_B__GPIO5_IO0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +PADS_SET(usdhc1_pads) + +#endif /* CONFIG_FSL_ESDHC */ + +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ + PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +PADS_SET(uart1_pads) + +#ifdef CONFIG_SPI + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_3P3V_32OHM) + +#define GPIO_PAD_CTRL (PAD_CTL_PUS_PU5KOHM | PAD_CTL_PUE | \ + PAD_CTL_SRE_SLOW) + +static iomux_v3_cfg_t const espi1_pads[] = { + MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 | MUX_PAD_CTRL(GPIO_PAD_CTRL), +}; + +PADS_SET(espi1_pads) + +#endif /* CONFIG_SPI */ + +#ifndef CONFIG_SPL_BUILD + +#ifdef CONFIG_FSL_ESDHC + +static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { + MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_DATA7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD3_STROBE__SD3_STROBE | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +PADS_SET(usdhc3_emmc_pads) + +#endif /* CONFIG_FSL_ESDHC */ + +#ifdef CONFIG_FEC_MXC + +#define ENET_PAD_CTRL (PAD_CTL_PUS_PD100KOHM | PAD_CTL_DSE_3P3V_49OHM) +#define ENET_PAD_CTRL_MII (PAD_CTL_PUS_PU5KOHM) + +static iomux_v3_cfg_t const phy1_rst_pads[] = { + /* PHY1 RST */ + MX7D_PAD_GPIO1_IO04__GPIO1_IO4 | MUX_PAD_CTRL(GPIO_PAD_CTRL), +}; + +PADS_SET(phy1_rst_pads) + +static iomux_v3_cfg_t const fec1_pads[] = { + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX7D_PAD_SD2_CD_B__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), + MX7D_PAD_SD2_WP__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL_MII), +}; + +PADS_SET(fec1_pads) + +#endif /* CONFIG_FEC_MXC */ + +static iomux_v3_cfg_t const usb_otg1_pads[] = { + MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +PADS_SET(usb_otg1_pads) + +static iomux_v3_cfg_t const wdog_pads[] = { + MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +PADS_SET(wdog_pads) + +#endif /* !CONFIG_SPL_BUILD */ diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c new file mode 100644 index 0000000000..3b013c048f --- /dev/null +++ b/board/compulab/cl-som-imx7/spl.c @@ -0,0 +1,211 @@ +/* + * SPL board functions for CompuLab CL-SOM-iMX7 module + * + * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com + * + * Author: Uri Mashiach <uri.mashiach@compulab.co.il> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> +#include <fsl_esdhc.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/arch-mx7/mx7-pins.h> +#include <asm/arch-mx7/clock.h> +#include <asm/arch-mx7/mx7-ddr.h> +#include "common.h" + +#ifdef CONFIG_FSL_ESDHC + +static struct fsl_esdhc_cfg cl_som_imx7_spl_usdhc_cfg = { + USDHC1_BASE_ADDR, 0, 4}; + +int board_mmc_init(bd_t *bis) +{ + cl_som_imx7_usdhc1_pads_set(); + cl_som_imx7_spl_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + return fsl_esdhc_initialize(bis, &cl_som_imx7_spl_usdhc_cfg); +} +#endif /* CONFIG_FSL_ESDHC */ + +static iomux_v3_cfg_t const led_pads[] = { + MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 | MUX_PAD_CTRL(PAD_CTL_PUS_PU5KOHM | + PAD_CTL_PUE | PAD_CTL_SRE_SLOW) +}; + +static struct ddrc cl_som_imx7_spl_ddrc_regs_val = { + .init1 = 0x00690000, + .init0 = 0x00020083, + .init3 = 0x09300004, + .init4 = 0x04080000, + .init5 = 0x00100004, + .rankctl = 0x0000033F, + .dramtmg1 = 0x0007020E, + .dramtmg2 = 0x03040407, + .dramtmg3 = 0x00002006, + .dramtmg4 = 0x04020305, + .dramtmg5 = 0x03030202, + .dramtmg8 = 0x00000803, + .zqctl0 = 0x00810021, + .dfitmg0 = 0x02098204, + .dfitmg1 = 0x00030303, + .dfiupd0 = 0x80400003, + .dfiupd1 = 0x00100020, + .dfiupd2 = 0x80100004, + .addrmap4 = 0x00000F0F, + .odtcfg = 0x06000604, + .odtmap = 0x00000001, +}; + +static struct ddrc_mp cl_som_imx7_spl_ddrc_mp_val = { + .pctrl_0 = 0x00000001, +}; + +static struct ddr_phy cl_som_imx7_spl_ddr_phy_regs_val = { + .phy_con0 = 0x17420F40, + .phy_con1 = 0x10210100, + .phy_con4 = 0x00060807, + .mdll_con0 = 0x1010007E, + .drvds_con0 = 0x00000D6E, + .cmd_sdll_con0 = 0x00000010, + .offset_lp_con0 = 0x0000000F, +}; + +struct mx7_calibration cl_som_imx7_spl_calib_param = { + .num_val = 5, + .values = { + 0x0E407304, + 0x0E447304, + 0x0E447306, + 0x0E447304, + 0x0E407304, + }, +}; + +static void cl_som_imx7_spl_dram_cfg_size(u32 ram_size) +{ + switch (ram_size) { + case SZ_256M: + cl_som_imx7_spl_ddrc_regs_val.mstr = 0x01041001; + cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; + cl_som_imx7_spl_ddrc_regs_val.dramtmg0 = 0x090E1109; + cl_som_imx7_spl_ddrc_regs_val.addrmap0 = 0x00000014; + cl_som_imx7_spl_ddrc_regs_val.addrmap1 = 0x00151515; + cl_som_imx7_spl_ddrc_regs_val.addrmap5 = 0x03030303; + cl_som_imx7_spl_ddrc_regs_val.addrmap6 = 0x0F0F0303; + cl_som_imx7_spl_ddr_phy_regs_val.offset_rd_con0 = 0x0C0C0C0C; + cl_som_imx7_spl_ddr_phy_regs_val.offset_wr_con0 = 0x04040404; + break; + case SZ_512M: + cl_som_imx7_spl_ddrc_regs_val.mstr = 0x01040001; + cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; + cl_som_imx7_spl_ddrc_regs_val.dramtmg0 = 0x090E1109; + cl_som_imx7_spl_ddrc_regs_val.addrmap0 = 0x00000015; + cl_som_imx7_spl_ddrc_regs_val.addrmap1 = 0x00161616; + cl_som_imx7_spl_ddrc_regs_val.addrmap5 = 0x04040404; + cl_som_imx7_spl_ddrc_regs_val.addrmap6 = 0x0F0F0404; + cl_som_imx7_spl_ddr_phy_regs_val.offset_rd_con0 = 0x0C0C0C0C; + cl_som_imx7_spl_ddr_phy_regs_val.offset_wr_con0 = 0x04040404; + break; + case SZ_1G: + cl_som_imx7_spl_ddrc_regs_val.mstr = 0x01040001; + cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; + cl_som_imx7_spl_ddrc_regs_val.dramtmg0 = 0x090E1109; + cl_som_imx7_spl_ddrc_regs_val.addrmap0 = 0x00000016; + cl_som_imx7_spl_ddrc_regs_val.addrmap1 = 0x00171717; + cl_som_imx7_spl_ddrc_regs_val.addrmap5 = 0x04040404; + cl_som_imx7_spl_ddrc_regs_val.addrmap6 = 0x0F040404; + cl_som_imx7_spl_ddr_phy_regs_val.offset_rd_con0 = 0x0A0A0A0A; + cl_som_imx7_spl_ddr_phy_regs_val.offset_wr_con0 = 0x02020202; + break; + case SZ_2G: + cl_som_imx7_spl_ddrc_regs_val.mstr = 0x01040001; + cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x0040005E; + cl_som_imx7_spl_ddrc_regs_val.dramtmg0 = 0x090E110A; + cl_som_imx7_spl_ddrc_regs_val.addrmap0 = 0x00000018; + cl_som_imx7_spl_ddrc_regs_val.addrmap1 = 0x00181818; + cl_som_imx7_spl_ddrc_regs_val.addrmap5 = 0x04040404; + cl_som_imx7_spl_ddrc_regs_val.addrmap6 = 0x04040404; + cl_som_imx7_spl_ddr_phy_regs_val.offset_rd_con0 = 0x0A0A0A0A; + cl_som_imx7_spl_ddr_phy_regs_val.offset_wr_con0 = 0x04040404; + break; + } + + mx7_dram_cfg(&cl_som_imx7_spl_ddrc_regs_val, + &cl_som_imx7_spl_ddrc_mp_val, + &cl_som_imx7_spl_ddr_phy_regs_val, + &cl_som_imx7_spl_calib_param); +} + +static void cl_som_imx7_spl_dram_cfg(void) +{ + ulong ram_size_test, ram_size = 0; + + for (ram_size = SZ_2G; ram_size >= SZ_256M; ram_size >>= 1) { + cl_som_imx7_spl_dram_cfg_size(ram_size); + ram_size_test = get_ram_size((long int *)PHYS_SDRAM, ram_size); + if (ram_size_test == ram_size) + break; + } + + if (ram_size < SZ_256M) { + puts("!!!ERROR!!! DRAM detection failed!!!\n"); + hang(); + } +} + +#ifdef CONFIG_SPL_SPI_SUPPORT + +static void cl_som_imx7_spl_spi_init(void) +{ + cl_som_imx7_espi1_pads_set(); +} +#else /* !CONFIG_SPL_SPI_SUPPORT */ +static void cl_som_imx7_spl_spi_init(void) {} +#endif /* CONFIG_SPL_SPI_SUPPORT */ + +void board_init_f(ulong dummy) +{ + imx_iomux_v3_setup_multiple_pads(led_pads, 1); + /* setup AIPS and disable watchdog */ + arch_cpu_init(); + /* setup GP timer */ + timer_init(); + cl_som_imx7_spl_spi_init(); + cl_som_imx7_uart1_pads_set(); + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + /* DRAM detection */ + cl_som_imx7_spl_dram_cfg(); + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + /* load/boot image from boot device */ + board_init_r(NULL, 0); +} + +void spl_board_init(void) +{ + u32 boot_device = spl_boot_device(); + + if (boot_device == BOOT_DEVICE_SPI) + puts("Booting from SPI flash\n"); + else if (boot_device == BOOT_DEVICE_MMC1) + puts("Booting from SD card\n"); + else + puts("Unknown boot device\n"); +} + +void board_boot_order(u32 *spl_boot_list) +{ + spl_boot_list[0] = spl_boot_device(); + switch (spl_boot_list[0]) { + case BOOT_DEVICE_SPI: + spl_boot_list[1] = BOOT_DEVICE_MMC1; + break; + case BOOT_DEVICE_MMC1: + spl_boot_list[1] = BOOT_DEVICE_SPI; + break; + } +} diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 2ed66d3ba3..f982839e7c 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -24,6 +24,7 @@ #include <mmc.h> #include <fsl_esdhc.h> #include <i2c.h> +#include <input.h> #include <power/pmic.h> #include <power/pfuze100_pmic.h> #include <linux/fb.h> @@ -683,8 +684,6 @@ int overwrite_console(void) int board_early_init_f(void) { setup_iomux_uart(); - setup_display(); - #ifdef CONFIG_MXC_SPI setup_spi(); #endif @@ -702,6 +701,8 @@ int board_init(void) else setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1); + setup_display(); + #ifdef CONFIG_SATA setup_sata(); #endif diff --git a/board/davinci/da8xxevm/Kconfig b/board/davinci/da8xxevm/Kconfig index bb1188b4ea..e0df97ca0e 100644 --- a/board/davinci/da8xxevm/Kconfig +++ b/board/davinci/da8xxevm/Kconfig @@ -33,6 +33,8 @@ config MAC_ADDR_IN_EEPROM endif +source "board/ti/common/Kconfig" + endif if TARGET_OMAPL138_LCDK diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 516d86df50..83c9f2940f 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -60,7 +60,7 @@ static int get_mac_addr(u8 *addr) return -1; } - ret = spi_flash_read(flash, CFG_MAC_ADDR_OFFSET, 6, addr); + ret = spi_flash_read(flash, (CFG_MAC_ADDR_OFFSET) + 1, 7, addr); if (ret) { printf("Error - unable to read MAC address from SPI flash.\n"); return -1; @@ -140,6 +140,7 @@ int misc_init_r(void) uchar buff[6]; spi_mac_read = get_mac_addr(buff); + buff[0] = 0; /* * MAC address not present in the environment diff --git a/board/dhelectronics/dh_imx6/Kconfig b/board/dhelectronics/dh_imx6/Kconfig new file mode 100644 index 0000000000..0cfef9b097 --- /dev/null +++ b/board/dhelectronics/dh_imx6/Kconfig @@ -0,0 +1,12 @@ +if TARGET_DHCOMIMX6 + +config SYS_BOARD + default "dh_imx6" + +config SYS_VENDOR + default "dhelectronics" + +config SYS_CONFIG_NAME + default "dh_imx6" + +endif diff --git a/board/dhelectronics/dh_imx6/MAINTAINERS b/board/dhelectronics/dh_imx6/MAINTAINERS new file mode 100644 index 0000000000..e54bd60adb --- /dev/null +++ b/board/dhelectronics/dh_imx6/MAINTAINERS @@ -0,0 +1,7 @@ +DH_IMX6 BOARD +M: Andreas Geisreiter <ageisreiter@dh-electronics.de>, Ludwig Zenz <lzenz@dh-electronics.de> +S: Maintained +F: board/dhelectronics/dh_imx6/ +F: include/configs/dh_imx6.h +F: configs/dh_mx6q_defconfig +F: configs/dh_mx6dl_defconfig diff --git a/board/dhelectronics/dh_imx6/Makefile b/board/dhelectronics/dh_imx6/Makefile new file mode 100644 index 0000000000..bddc8d8568 --- /dev/null +++ b/board/dhelectronics/dh_imx6/Makefile @@ -0,0 +1,11 @@ +# +# Copyright (C) 2017 Marek Vasut <marex@denx.de> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifdef CONFIG_SPL_BUILD +obj-y := dh_imx6_spl.o +else +obj-y := dh_imx6.o +endif diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c new file mode 100644 index 0000000000..c76da4d2af --- /dev/null +++ b/board/dhelectronics/dh_imx6/dh_imx6.c @@ -0,0 +1,437 @@ +/* + * DHCOM DH-iMX6 PDK board support + * + * Copyright (C) 2017 Marek Vasut <marex@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/mxc_i2c.h> +#include <asm/mach-imx/sata.h> +#include <errno.h> +#include <fsl_esdhc.h> +#include <fuse.h> +#include <i2c.h> +#include <miiphy.h> +#include <mmc.h> +#include <net.h> +#include <netdev.h> +#include <usb.h> +#include <usb/ehci-ci.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define I2C_PAD_CTRL \ + (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define EEPROM_I2C_ADDRESS 0x50 + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +static struct i2c_pads_info dh6sdl_i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +static struct i2c_pads_info dh6sdl_i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +static struct i2c_pads_info dh6sdl_i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC, + .gpio_mode = MX6DL_PAD_GPIO_3__GPIO1_IO03 | PC, + .gp = IMX_GPIO_NR(1, 3) + }, + .sda = { + .i2c_mode = MX6DL_PAD_GPIO_6__I2C3_SDA | PC, + .gpio_mode = MX6DL_PAD_GPIO_6__GPIO1_IO06 | PC, + .gp = IMX_GPIO_NR(1, 6) + } +}; + +static struct i2c_pads_info dh6dq_i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +static struct i2c_pads_info dh6dq_i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +static struct i2c_pads_info dh6dq_i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC, + .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC, + .gp = IMX_GPIO_NR(1, 3) + }, + .sda = { + .i2c_mode = MX6Q_PAD_GPIO_6__I2C3_SDA | PC, + .gpio_mode = MX6Q_PAD_GPIO_6__GPIO1_IO06 | PC, + .gp = IMX_GPIO_NR(1, 6) + } +}; + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +#ifdef CONFIG_FEC_MXC +static void eth_phy_reset(void) +{ + /* Reset PHY */ + gpio_direction_output(IMX_GPIO_NR(5, 0) , 0); + udelay(500); + gpio_set_value(IMX_GPIO_NR(5, 0), 1); + + /* Enable VIO */ + gpio_direction_output(IMX_GPIO_NR(1, 7) , 0); + + /* + * KSZ9021 PHY needs at least 10 mSec after PHY reset + * is released to stabilize + */ + mdelay(10); +} + +static int setup_fec_clock(void) +{ + struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + /* set gpr1[21] to select anatop clock */ + clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, 0x1 << 21); + + return enable_fec_anatop_clock(0, ENET_50MHZ); +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + + setup_fec_clock(); + + eth_phy_reset(); + + bus = fec_get_miibus(base, -1); + if (!bus) + return -EINVAL; + + /* Scan PHY 0 */ + phydev = phy_find_by_mask(bus, 0xf, PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + printf("Ethernet PHY not found!\n"); + return -EINVAL; + } + + return fec_probe(bis, -1, base, bus, phydev); +} +#endif + +#ifdef CONFIG_FSL_ESDHC + +#define USDHC2_CD_GPIO IMX_GPIO_NR(6, 16) +#define USDHC3_CD_GPIO IMX_GPIO_NR(7, 8) + +static struct fsl_esdhc_cfg usdhc_cfg[3] = { + { USDHC2_BASE_ADDR }, + { USDHC3_BASE_ADDR }, + { USDHC4_BASE_ADDR }, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + + switch (cfg->esdhc_base) { + case USDHC2_BASE_ADDR: + return gpio_get_value(USDHC2_CD_GPIO); + case USDHC3_BASE_ADDR: + return !gpio_get_value(USDHC3_CD_GPIO); + case USDHC4_BASE_ADDR: + return 1; /* eMMC/uSDHC4 is always present */ + } + + return 0; +} + +int board_mmc_init(bd_t *bis) +{ + int i, ret; + + /* + * According to the board_mmc_init() the following map is done: + * (U-Boot device node) (Physical Port) + * mmc0 SD interface + * mmc1 micro SD + * mmc2 eMMC + */ + gpio_direction_input(USDHC2_CD_GPIO); + gpio_direction_input(USDHC3_CD_GPIO); + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) + return ret; + } + + return 0; +} +#endif + +#ifdef CONFIG_USB_EHCI_MX6 +static void setup_usb(void) +{ + /* + * Set daisy chain for otg_pin_id on MX6Q. + * For MX6DL, this bit is reserved. + */ + imx_iomux_set_gpr_register(1, 13, 1, 0); +} + +int board_usb_phy_mode(int port) +{ + return USB_INIT_HOST; +} + +/* Use only Port 1 == DHCOM USB Host 1 */ +int board_ehci_hcd_init(int port) +{ + if (port == 1) + return 0; + else + return -ENODEV; +} + +int board_ehci_power(int port, int on) +{ + switch (port) { + case 0: + break; + case 1: + gpio_direction_output(IMX_GPIO_NR(3, 31), !!on); + break; + default: + printf("MXC USB port %d not yet supported\n", port); + return -EINVAL; + } + + return 0; +} +#endif + +static int setup_dhcom_mac_from_fuse(void) +{ + unsigned char enetaddr[6]; + int ret; + + ret = eth_env_get_enetaddr("ethaddr", enetaddr); + if (ret) /* ethaddr is already set */ + return 0; + + imx_get_mac_from_fuse(0, enetaddr); + + if (is_valid_ethaddr(enetaddr)) { + eth_env_set_enetaddr("ethaddr", enetaddr); + return 0; + } + + ret = i2c_set_bus_num(2); + if (ret) { + printf("Error switching I2C bus!\n"); + return ret; + } + + ret = i2c_read(EEPROM_I2C_ADDRESS, 0xfa, 0x1, enetaddr, 0x6); + if (ret) { + printf("Error reading configuration EEPROM!\n"); + return ret; + } + + if (is_valid_ethaddr(enetaddr)) + eth_env_set_enetaddr("ethaddr", enetaddr); + + return 0; +} + +int board_early_init_f(void) +{ +#ifdef CONFIG_USB_EHCI_MX6 + setup_usb(); +#endif + + return 0; +} + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + if (bus == 0 && cs == 0) + return IMX_GPIO_NR(2, 30); + else + return -1; +} +#endif + +int board_init(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + /* Enable eim_slow clocks */ + setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET); + +#ifdef CONFIG_SYS_I2C_MXC + if (is_mx6dq()) { + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6dq_i2c_pad_info2); + } else { + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &dh6sdl_i2c_pad_info2); + } +#endif + +#ifdef CONFIG_SATA + setup_sata(); +#endif + + setup_dhcom_mac_from_fuse(); + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, + {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + /* 8 bit bus width */ + {"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +#define HW_CODE_BIT_0 IMX_GPIO_NR(2, 19) +#define HW_CODE_BIT_1 IMX_GPIO_NR(6, 6) +#define HW_CODE_BIT_2 IMX_GPIO_NR(2, 16) + +static int board_get_hwcode(void) +{ + int hw_code; + + gpio_direction_input(HW_CODE_BIT_0); + gpio_direction_input(HW_CODE_BIT_1); + gpio_direction_input(HW_CODE_BIT_2); + + /* HW 100 + HW 200 = 00b; HW 300 = 01b */ + hw_code = ((gpio_get_value(HW_CODE_BIT_2) << 2) | + (gpio_get_value(HW_CODE_BIT_1) << 1) | + gpio_get_value(HW_CODE_BIT_0)) + 2; + + return hw_code; +} + +int board_late_init(void) +{ + u32 hw_code; + char buf[16]; + + hw_code = board_get_hwcode(); + + switch (get_cpu_type()) { + case MXC_CPU_MX6SOLO: + snprintf(buf, sizeof(buf), "imx6s-dhcom%1d", hw_code); + break; + case MXC_CPU_MX6DL: + snprintf(buf, sizeof(buf), "imx6dl-dhcom%1d", hw_code); + break; + case MXC_CPU_MX6D: + snprintf(buf, sizeof(buf), "imx6d-dhcom%1d", hw_code); + break; + case MXC_CPU_MX6Q: + snprintf(buf, sizeof(buf), "imx6q-dhcom%1d", hw_code); + break; + default: + snprintf(buf, sizeof(buf), "UNKNOWN%1d", hw_code); + break; + } + + env_set("dhcom", buf); + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int checkboard(void) +{ + puts("Board: DHCOM i.MX6\n"); + return 0; +} diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c new file mode 100644 index 0000000000..e22ff5c8c6 --- /dev/null +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -0,0 +1,399 @@ +/* + * DHCOM DH-iMX6 PDK SPL support + * + * Copyright (C) 2017 Marek Vasut <marex@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-ddr.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/mxc_i2c.h> +#include <asm/io.h> +#include <errno.h> +#include <fuse.h> +#include <fsl_esdhc.h> +#include <i2c.h> +#include <mmc.h> +#include <spl.h> + +#define ENET_PAD_CTRL \ + (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS) + +#define GPIO_PAD_CTRL \ + (PAD_CTL_HYS | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm) + +#define SPI_PAD_CTRL \ + (PAD_CTL_HYS | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST) + +#define UART_PAD_CTRL \ + (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL \ + (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +DECLARE_GLOBAL_DATA_PTR; + +static const struct mx6dq_iomux_ddr_regs dhcom6dq_ddr_ioregs = { + .dram_sdclk_0 = 0x00020030, + .dram_sdclk_1 = 0x00020030, + .dram_cas = 0x00020030, + .dram_ras = 0x00020030, + .dram_reset = 0x00020030, + .dram_sdcke0 = 0x00003000, + .dram_sdcke1 = 0x00003000, + .dram_sdba2 = 0x00000000, + .dram_sdodt0 = 0x00003030, + .dram_sdodt1 = 0x00003030, + .dram_sdqs0 = 0x00000030, + .dram_sdqs1 = 0x00000030, + .dram_sdqs2 = 0x00000030, + .dram_sdqs3 = 0x00000030, + .dram_sdqs4 = 0x00000030, + .dram_sdqs5 = 0x00000030, + .dram_sdqs6 = 0x00000030, + .dram_sdqs7 = 0x00000030, + .dram_dqm0 = 0x00020030, + .dram_dqm1 = 0x00020030, + .dram_dqm2 = 0x00020030, + .dram_dqm3 = 0x00020030, + .dram_dqm4 = 0x00020030, + .dram_dqm5 = 0x00020030, + .dram_dqm6 = 0x00020030, + .dram_dqm7 = 0x00020030, +}; + +static const struct mx6dq_iomux_grp_regs dhcom6dq_grp_ioregs = { + .grp_ddr_type = 0x000C0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = 0x00000030, + .grp_ctlds = 0x00000030, + .grp_ddrmode = 0x00020000, + .grp_b0ds = 0x00000030, + .grp_b1ds = 0x00000030, + .grp_b2ds = 0x00000030, + .grp_b3ds = 0x00000030, + .grp_b4ds = 0x00000030, + .grp_b5ds = 0x00000030, + .grp_b6ds = 0x00000030, + .grp_b7ds = 0x00000030, +}; + +static const struct mx6sdl_iomux_ddr_regs dhcom6sdl_ddr_ioregs = { + .dram_sdclk_0 = 0x00020030, + .dram_sdclk_1 = 0x00020030, + .dram_cas = 0x00020030, + .dram_ras = 0x00020030, + .dram_reset = 0x00020030, + .dram_sdcke0 = 0x00003000, + .dram_sdcke1 = 0x00003000, + .dram_sdba2 = 0x00000000, + .dram_sdodt0 = 0x00003030, + .dram_sdodt1 = 0x00003030, + .dram_sdqs0 = 0x00000030, + .dram_sdqs1 = 0x00000030, + .dram_sdqs2 = 0x00000030, + .dram_sdqs3 = 0x00000030, + .dram_sdqs4 = 0x00000030, + .dram_sdqs5 = 0x00000030, + .dram_sdqs6 = 0x00000030, + .dram_sdqs7 = 0x00000030, + .dram_dqm0 = 0x00020030, + .dram_dqm1 = 0x00020030, + .dram_dqm2 = 0x00020030, + .dram_dqm3 = 0x00020030, + .dram_dqm4 = 0x00020030, + .dram_dqm5 = 0x00020030, + .dram_dqm6 = 0x00020030, + .dram_dqm7 = 0x00020030, +}; + +static const struct mx6sdl_iomux_grp_regs dhcom6sdl_grp_ioregs = { + .grp_ddr_type = 0x000C0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = 0x00000030, + .grp_ctlds = 0x00000030, + .grp_ddrmode = 0x00020000, + .grp_b0ds = 0x00000030, + .grp_b1ds = 0x00000030, + .grp_b2ds = 0x00000030, + .grp_b3ds = 0x00000030, + .grp_b4ds = 0x00000030, + .grp_b5ds = 0x00000030, + .grp_b6ds = 0x00000030, + .grp_b7ds = 0x00000030, +}; + +static const struct mx6_mmdc_calibration dhcom_mmdc_calib = { + .p0_mpwldectrl0 = 0x001F001F, + .p0_mpwldectrl1 = 0x001F001F, + .p1_mpwldectrl0 = 0x00440044, + .p1_mpwldectrl1 = 0x00440044, + .p0_mpdgctrl0 = 0x434B0350, + .p0_mpdgctrl1 = 0x034C0359, + .p1_mpdgctrl0 = 0x434B0350, + .p1_mpdgctrl1 = 0x03650348, + .p0_mprddlctl = 0x4436383B, + .p1_mprddlctl = 0x39393341, + .p0_mpwrdlctl = 0x35373933, + .p1_mpwrdlctl = 0x48254A36, +}; + +static const struct mx6_ddr3_cfg dhcom_mem_ddr = { + .mem_speed = 1600, + .density = 4, + .width = 64, + .banks = 8, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, +}; + +static const struct mx6_ddr_sysinfo dhcom_ddr_info = { + /* width of data bus:0=16,1=32,2=64 */ + .dsize = 2, + /* config for full 4GB range so that get_mem_size() works */ + .cs_density = 32, /* 32Gb per CS */ + .ncs = 1, /* single chip select */ + .cs1_mirror = 0, + .rtt_wr = 1, /* DDR3_RTT_60_OHM, RTT_Wr = RZQ/4 */ + .rtt_nom = 1, /* DDR3_RTT_60_OHM, RTT_Nom = RZQ/4 */ + .walat = 1, /* Write additional latency */ + .ralat = 5, /* Read additional latency */ + .mif3_mode = 3, /* Command prediction working mode */ + .bi_on = 1, /* Bank interleaving enabled */ + .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0x00C03F3F, &ccm->CCGR0); + writel(0x0030FC03, &ccm->CCGR1); + writel(0x0FFFC000, &ccm->CCGR2); + writel(0x3FF00000, &ccm->CCGR3); + writel(0x00FFF300, &ccm->CCGR4); + writel(0x0F0000C3, &ccm->CCGR5); + writel(0x000003FF, &ccm->CCGR6); +} + +/* Board ID */ +static iomux_v3_cfg_t const hwcode_pads[] = { + IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A22__GPIO2_IO16 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), +}; + +static void setup_iomux_boardid(void) +{ + /* HW code pins: Setup alternate function and configure pads */ + SETUP_IOMUX_PADS(hwcode_pads); +} + +/* GPIO */ +static iomux_v3_cfg_t const gpio_pads[] = { + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_CSI0_DAT17__GPIO6_IO03 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_CSI0_VSYNC__GPIO5_IO21 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_CSI0_PIXCLK__GPIO5_IO18 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), + IOMUX_PADS(PAD_CSI0_MCLK__GPIO5_IO19 | MUX_PAD_CTRL(GPIO_PAD_CTRL)), +}; + +static void setup_iomux_gpio(void) +{ + SETUP_IOMUX_PADS(gpio_pads); +} + +/* Ethernet */ +static iomux_v3_cfg_t const enet_pads[] = { + IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_RX_ER__ENET_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL)), + /* SMSC PHY Reset */ + IOMUX_PADS(PAD_EIM_WAIT__GPIO5_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL)), + /* ENET_VIO_GPIO */ + IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL)), + /* ENET_Interrupt - (not used) */ + IOMUX_PADS(PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static void setup_iomux_enet(void) +{ + SETUP_IOMUX_PADS(enet_pads); +} + +/* SD interface */ +static iomux_v3_cfg_t const usdhc2_pads[] = { + IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* CD */ +}; + +/* onboard microSD */ +static iomux_v3_cfg_t const usdhc3_pads[] = { + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* CD */ +}; + +/* eMMC */ +static iomux_v3_cfg_t const usdhc4_pads[] = { + IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), +}; + +/* SD */ +static void setup_iomux_sd(void) +{ + SETUP_IOMUX_PADS(usdhc2_pads); + SETUP_IOMUX_PADS(usdhc3_pads); + SETUP_IOMUX_PADS(usdhc4_pads); +} + +/* SPI */ +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS0 */ + IOMUX_PADS(PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(SPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)), +}; + +static void setup_iomux_spi(void) +{ + SETUP_IOMUX_PADS(ecspi1_pads); +} + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + if (bus == 0 && cs == 0) + return IMX_GPIO_NR(2, 30); + else + return -1; +} + +/* UART */ +static iomux_v3_cfg_t const uart1_pads[] = { + IOMUX_PADS(PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), +}; + +static void setup_iomux_uart(void) +{ + SETUP_IOMUX_PADS(uart1_pads); +} + +/* USB */ +static iomux_v3_cfg_t const usb_pads[] = { + IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static void setup_iomux_usb(void) +{ + SETUP_IOMUX_PADS(usb_pads); +} + +void board_init_f(ulong dummy) +{ + /* setup AIPS and disable watchdog */ + arch_cpu_init(); + + ccgr_init(); + gpr_init(); + + /* setup GP timer */ + timer_init(); + + setup_iomux_boardid(); + setup_iomux_gpio(); + setup_iomux_enet(); + setup_iomux_sd(); + setup_iomux_spi(); + setup_iomux_uart(); + setup_iomux_usb(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + /* Start the DDR DRAM */ + if (is_mx6dq()) + mx6dq_dram_iocfg(dhcom_mem_ddr.width, &dhcom6dq_ddr_ioregs, + &dhcom6dq_grp_ioregs); + else + mx6sdl_dram_iocfg(dhcom_mem_ddr.width, &dhcom6sdl_ddr_ioregs, + &dhcom6sdl_grp_ioregs); + mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr); + + /* Perform DDR DRAM calibration */ + udelay(100); + mmdc_do_write_level_calibration(&dhcom_ddr_info); + mmdc_do_dqs_calibration(&dhcom_ddr_info); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + /* load/boot image from boot device */ + board_init_r(NULL, 0); +} diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c index fb128f5d4c..b2fe7fd291 100644 --- a/board/el/el6x/el6x.c +++ b/board/el/el6x/el6x.c @@ -25,6 +25,7 @@ #include <asm/io.h> #include <asm/arch/sys_proto.h> #include <i2c.h> +#include <input.h> #include <power/pmic.h> #include <power/pfuze100_pmic.h> #include <asm/arch/mx6-ddr.h> diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index 867459909d..ae04f68445 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -26,6 +26,7 @@ #include <asm/mach-imx/spi.h> #include <asm/mach-imx/video.h> #include <i2c.h> +#include <input.h> #include <mmc.h> #include <fsl_esdhc.h> #include <miiphy.h> diff --git a/board/emulation/qemu-arm/MAINTAINERS b/board/emulation/qemu-arm/MAINTAINERS new file mode 100644 index 0000000000..a803061ff4 --- /dev/null +++ b/board/emulation/qemu-arm/MAINTAINERS @@ -0,0 +1,6 @@ +QEMU ARM 'VIRT' BOARD +M: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> +S: Maintained +F: board/emulation/qemu-arm/ +F: include/configs/qemu-arm.h +F: configs/qemu_arm_defconfig diff --git a/board/emulation/qemu-arm/Makefile b/board/emulation/qemu-arm/Makefile new file mode 100644 index 0000000000..716a6e9c28 --- /dev/null +++ b/board/emulation/qemu-arm/Makefile @@ -0,0 +1,5 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += qemu-arm.o diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c new file mode 100644 index 0000000000..e29ba4630f --- /dev/null +++ b/board/emulation/qemu-arm/qemu-arm.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2017 Tuomas Tynkkynen + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <fdtdec.h> + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_memory_size() != 0) + return -EINVAL; + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +void *board_fdt_blob_setup(void) +{ + /* QEMU loads a generated DTB for us at the start of RAM. */ + return (void *)CONFIG_SYS_SDRAM_BASE; +} diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 2a321dca50..01148894c3 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -27,8 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_ENV_IS_IN_MMC int board_mmc_get_env_dev(int devno) { - /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ - return (devno == 3) ? 1 : 0; + return devno; } #endif diff --git a/board/esd/meesc/Makefile b/board/esd/meesc/Makefile index 5d1673820d..f3bf05d47b 100644 --- a/board/esd/meesc/Makefile +++ b/board/esd/meesc/Makefile @@ -10,4 +10,3 @@ # obj-y += meesc.o -obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/esd/meesc/partition.c b/board/esd/meesc/partition.c deleted file mode 100644 index b6afafc239..0000000000 --- a/board/esd/meesc/partition.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * (C) Copyright 2008 - * Ulf Samuelsson <ulf@atmel.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <config.h> -#include <asm/hardware.h> -#include <dataflash.h> - -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ -}; - -/* define the area offsets */ -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, - {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, -}; diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c index 354b864eb9..fc0c1f6f82 100644 --- a/board/freescale/ls1043ardb/ddr.c +++ b/board/freescale/ls1043ardb/ddr.c @@ -169,18 +169,64 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, return 0; } +#else + +phys_size_t fixed_sdram(void) +{ + int i; + char buf[32]; + fsl_ddr_cfg_regs_t ddr_cfg_regs; + phys_size_t ddr_size; + ulong ddr_freq, ddr_freq_mhz; + + ddr_freq = get_ddr_freq(0); + ddr_freq_mhz = ddr_freq / 1000000; + + printf("Configuring DDR for %s MT/s data rate\n", + strmhz(buf, ddr_freq)); + + for (i = 0; fixed_ddr_parm_0[i].max_freq > 0; i++) { + if ((ddr_freq_mhz > fixed_ddr_parm_0[i].min_freq) && + (ddr_freq_mhz <= fixed_ddr_parm_0[i].max_freq)) { + memcpy(&ddr_cfg_regs, + fixed_ddr_parm_0[i].ddr_settings, + sizeof(ddr_cfg_regs)); + break; + } + } + + if (fixed_ddr_parm_0[i].max_freq == 0) + panic("Unsupported DDR data rate %s MT/s data rate\n", + strmhz(buf, ddr_freq)); + + ddr_size = (phys_size_t)2048 * 1024 * 1024; + fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0); + + return ddr_size; +} #endif int fsl_initdram(void) { phys_size_t dram_size; +#ifdef CONFIG_SYS_DDR_RAW_TIMING #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL) puts("Initializing DDR....\n"); dram_size = fsl_ddr_sdram(); #else dram_size = fsl_ddr_sdram_size(); #endif +#else +#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL) + puts("Initialzing DDR using fixed setting\n"); + dram_size = fixed_sdram(); +#else + gd->ram_size = 0x80000000; + + return 0; +#endif +#endif erratum_a008850_post(); #ifdef CONFIG_FSL_DEEP_SLEEP diff --git a/board/freescale/ls1043ardb/ddr.h b/board/freescale/ls1043ardb/ddr.h index a77ddf3d24..6bc0eb67cc 100644 --- a/board/freescale/ls1043ardb/ddr.h +++ b/board/freescale/ls1043ardb/ddr.h @@ -45,4 +45,73 @@ static const struct board_specific_parameters *udimms[] = { udimm0, }; +#ifndef CONFIG_SYS_DDR_RAW_TIMING +fsl_ddr_cfg_regs_t ddr_cfg_regs_1600 = { + .cs[0].bnds = 0x0000007F, + .cs[1].bnds = 0, + .cs[2].bnds = 0, + .cs[3].bnds = 0, + .cs[0].config = 0x80040322, + .cs[0].config_2 = 0, + .cs[1].config = 0, + .cs[1].config_2 = 0, + .cs[2].config = 0, + .cs[3].config = 0, + .timing_cfg_3 = 0x010C1000, + .timing_cfg_0 = 0x91550018, + .timing_cfg_1 = 0xBBB48C42, + .timing_cfg_2 = 0x0048C111, + .ddr_sdram_cfg = 0xC50C0008, + .ddr_sdram_cfg_2 = 0x00401100, + .ddr_sdram_cfg_3 = 0, + .ddr_sdram_mode = 0x03010210, + .ddr_sdram_mode_2 = 0, + .ddr_sdram_mode_3 = 0x00010210, + .ddr_sdram_mode_4 = 0, + .ddr_sdram_mode_5 = 0x00010210, + .ddr_sdram_mode_6 = 0, + .ddr_sdram_mode_7 = 0x00010210, + .ddr_sdram_mode_8 = 0, + .ddr_sdram_mode_9 = 0x00000500, + .ddr_sdram_mode_10 = 0x04000000, + .ddr_sdram_mode_11 = 0x00000400, + .ddr_sdram_mode_12 = 0x04000000, + .ddr_sdram_mode_13 = 0x00000400, + .ddr_sdram_mode_14 = 0x04000000, + .ddr_sdram_mode_15 = 0x00000400, + .ddr_sdram_mode_16 = 0x04000000, + .ddr_sdram_interval = 0x18600618, + .ddr_data_init = 0xDEADBEEF, + .ddr_sdram_clk_cntl = 0x03000000, + .ddr_init_addr = 0, + .ddr_init_ext_addr = 0, + .timing_cfg_4 = 0x00000002, + .timing_cfg_5 = 0x03401400, + .timing_cfg_6 = 0, + .timing_cfg_7 = 0x13300000, + .timing_cfg_8 = 0x02115600, + .timing_cfg_9 = 0, + .ddr_zq_cntl = 0x8A090705, + .ddr_wrlvl_cntl = 0x8675F607, + .ddr_wrlvl_cntl_2 = 0x07090800, + .ddr_wrlvl_cntl_3 = 0, + .ddr_sr_cntr = 0, + .ddr_sdram_rcw_1 = 0, + .ddr_sdram_rcw_2 = 0, + .ddr_cdr1 = 0x80040000, + .ddr_cdr2 = 0x0000A181, + .dq_map_0 = 0, + .dq_map_1 = 0, + .dq_map_2 = 0, + .dq_map_3 = 0, + .debug[28] = 0x00700046, + +}; + +fixed_ddr_parm_t fixed_ddr_parm_0[] = { + {1550, 1650, &ddr_cfg_regs_1600}, + {0, 0, NULL} +}; + +#endif #endif diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c index c19f59a11c..de70aee867 100644 --- a/board/freescale/ls1088a/eth_ls1088aqds.c +++ b/board/freescale/ls1088a/eth_ls1088aqds.c @@ -14,14 +14,13 @@ #include <fm_eth.h> #include <i2c.h> #include <miiphy.h> +#include <fsl-mc/fsl_mc.h> #include <fsl-mc/ldpaa_wriop.h> #include "../common/qixis.h" #include "ls1088a_qixis.h" -#define MC_BOOT_ENV_VAR "mcinitcmd" - #ifdef CONFIG_FSL_MC_ENET #define SFP_TX 0 @@ -612,7 +611,6 @@ static void ls1088a_handle_phy_interface_rgmii(int dpmac_id) int board_eth_init(bd_t *bis) { int error = 0, i; - char *mc_boot_env_var; #ifdef CONFIG_FSL_MC_ENET struct memac_mdio_info *memac_mdio0_info; char *env_hwconfig = env_get("hwconfig"); @@ -655,9 +653,6 @@ int board_eth_init(bd_t *bis) } } - mc_boot_env_var = env_get(MC_BOOT_ENV_VAR); - if (mc_boot_env_var) - run_command_list(mc_boot_env_var, -1, 0); error = cpu_eth_init(bis); if (hwconfig_f("xqsgmii", env_hwconfig)) { @@ -681,3 +676,10 @@ int board_eth_init(bd_t *bis) error = pci_eth_init(bis); return error; } + +#if defined(CONFIG_RESET_PHY_R) +void reset_phy(void) +{ + mc_env_boot(); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/freescale/ls1088a/eth_ls1088ardb.c b/board/freescale/ls1088a/eth_ls1088ardb.c index 853d815da5..97accc90fd 100644 --- a/board/freescale/ls1088a/eth_ls1088ardb.c +++ b/board/freescale/ls1088a/eth_ls1088ardb.c @@ -15,15 +15,14 @@ #include <asm/io.h> #include <exports.h> #include <asm/arch/fsl_serdes.h> +#include <fsl-mc/fsl_mc.h> #include <fsl-mc/ldpaa_wriop.h> DECLARE_GLOBAL_DATA_PTR; -#define MC_BOOT_ENV_VAR "mcinitcmd" int board_eth_init(bd_t *bis) { #if defined(CONFIG_FSL_MC_ENET) - char *mc_boot_env_var; int i, interface; struct memac_mdio_info mdio_info; struct mii_dev *dev; @@ -92,11 +91,15 @@ int board_eth_init(bd_t *bis) dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO2_NAME); wriop_set_mdio(WRIOP1_DPMAC2, dev); - mc_boot_env_var = env_get(MC_BOOT_ENV_VAR); - if (mc_boot_env_var) - run_command_list(mc_boot_env_var, -1, 0); cpu_eth_init(bis); #endif /* CONFIG_FMAN_ENET */ return pci_eth_init(bis); } + +#if defined(CONFIG_RESET_PHY_R) +void reset_phy(void) +{ + mc_env_boot(); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index a88ff8fe13..9e8a02efe6 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -15,6 +15,7 @@ #include <asm/arch/clock.h> #include <asm/mach-imx/mx5_video.h> #include <i2c.h> +#include <input.h> #include <mmc.h> #include <fsl_esdhc.h> #include <power/pmic.h> diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index ea36603686..db0e2fbdd6 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -17,6 +17,7 @@ #include <asm/mach-imx/mx5_video.h> #include <netdev.h> #include <i2c.h> +#include <input.h> #include <mmc.h> #include <fsl_esdhc.h> #include <asm/gpio.h> diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c index 15ca0294f5..bdeb5f7667 100644 --- a/board/freescale/mx6sabreauto/mx6sabreauto.c +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c @@ -24,6 +24,7 @@ #include <netdev.h> #include <asm/arch/sys_proto.h> #include <i2c.h> +#include <input.h> #include <asm/arch/mxc_hdmi.h> #include <asm/mach-imx/video.h> #include <asm/arch/crm_regs.h> diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 5b50bc815f..878e1e7c0b 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -10,6 +10,7 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/iomux.h> #include <asm/arch/mx6-pins.h> +#include <asm/mach-imx/spi.h> #include <linux/errno.h> #include <asm/gpio.h> #include <asm/mach-imx/mxc_i2c.h> @@ -25,10 +26,12 @@ #include <asm/io.h> #include <asm/arch/sys_proto.h> #include <i2c.h> +#include <input.h> #include <power/pmic.h> #include <power/pfuze100_pmic.h> #include "../common/pfuze.h" #include <usb.h> +#include <usb/ehci-ci.h> DECLARE_GLOBAL_DATA_PTR; @@ -620,9 +623,6 @@ int board_ehci_power(int port, int on) int board_early_init_f(void) { setup_iomux_uart(); -#if defined(CONFIG_VIDEO_IPUV3) - setup_display(); -#endif return 0; } @@ -639,6 +639,9 @@ int board_init(void) setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1); else setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1); +#if defined(CONFIG_VIDEO_IPUV3) + setup_display(); +#endif #ifdef CONFIG_USB_EHCI_MX6 setup_usb(); #endif diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index c7df4ce847..2e8f394eaf 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -25,6 +25,7 @@ #include <asm/io.h> #include <asm/arch/sys_proto.h> #include <i2c.h> +#include <input.h> #include <pwm.h> #include <stdlib.h> #include "vpd_reader.h" diff --git a/board/intel/edison/.gitignore b/board/intel/edison/.gitignore new file mode 100644 index 0000000000..6eb8a5481a --- /dev/null +++ b/board/intel/edison/.gitignore @@ -0,0 +1,3 @@ +dsdt.aml +dsdt.asl.tmp +dsdt.c diff --git a/board/intel/edison/Kconfig b/board/intel/edison/Kconfig index 4ff9d5adec..ef9b14aa2b 100644 --- a/board/intel/edison/Kconfig +++ b/board/intel/edison/Kconfig @@ -15,6 +15,12 @@ config SYS_CONFIG_NAME config SYS_TEXT_BASE default 0x01101000 +config ROM_TABLE_ADDR + default 0x0e4500 + +config ROM_TABLE_SIZE + default 0x007b00 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select X86_LOAD_FROM_32_BIT diff --git a/board/intel/edison/Makefile b/board/intel/edison/Makefile index dde159435b..eed8d65eb6 100644 --- a/board/intel/edison/Makefile +++ b/board/intel/edison/Makefile @@ -5,3 +5,4 @@ # obj-y += start.o edison.o +obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o diff --git a/board/intel/edison/dsdt.asl b/board/intel/edison/dsdt.asl new file mode 100644 index 0000000000..d2e04730c9 --- /dev/null +++ b/board/intel/edison/dsdt.asl @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2017 Intel Corporation + * + * Partially based on dsdt.asl for other x86 boards + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DefinitionBlock("dsdt.aml", "DSDT", 2, "U-BOOT", "U-BOOTBL", 0x00010000) +{ + /* platform specific */ + #include <asm/arch/acpi/platform.asl> +} diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c index c18a5a3140..29f136a530 100644 --- a/board/logicpd/am3517evm/am3517evm.c +++ b/board/logicpd/am3517evm/am3517evm.c @@ -12,6 +12,8 @@ */ #include <common.h> +#include <dm.h> +#include <ns16550.h> #include <asm/io.h> #include <asm/omap_musb.h> #include <asm/arch/am35x_def.h> @@ -34,6 +36,22 @@ DECLARE_GLOBAL_DATA_PTR; #define AM3517_IP_SW_RESET 0x48002598 #define CPGMACSS_SW_RST (1 << 1) +#define PHY_GPIO 30 + +/* This is only needed until SPL gets OF support */ +#ifdef CONFIG_SPL_BUILD +static const struct ns16550_platdata am3517_serial = { + .base = OMAP34XX_UART3, + .reg_shift = 2, + .clock = V_NS16550_CLK, + .fcr = UART_FCR_DEFVAL, +}; + +U_BOOT_DEVICE(am3517_uart) = { + "ns16550_serial", + &am3517_serial +}; +#endif /* * Routine: board_init @@ -113,30 +131,35 @@ int misc_init_r(void) am3517_evm_musb_init(); - /* activate PHY reset */ - gpio_direction_output(30, 0); - gpio_set_value(30, 0); - - ctr = 0; - do { - udelay(1000); - ctr++; - } while (ctr < 300); - - /* deactivate PHY reset */ - gpio_set_value(30, 1); - - /* allow the PHY to stabilize and settle down */ - ctr = 0; - do { - udelay(1000); - ctr++; - } while (ctr < 300); - - /* ensure that the module is out of reset */ - reset = readl(AM3517_IP_SW_RESET); - reset &= (~CPGMACSS_SW_RST); - writel(reset,AM3517_IP_SW_RESET); + if (gpio_request(PHY_GPIO, "gpio_30") == 0) { + /* activate PHY reset */ + gpio_direction_output(PHY_GPIO, 0); + gpio_set_value(PHY_GPIO, 0); + + ctr = 0; + do { + udelay(1000); + ctr++; + } while (ctr < 300); + + /* deactivate PHY reset */ + gpio_set_value(PHY_GPIO, 1); + + /* allow the PHY to stabilize and settle down */ + ctr = 0; + do { + udelay(1000); + ctr++; + } while (ctr < 300); + + /* ensure that the module is out of reset */ + reset = readl(AM3517_IP_SW_RESET); + reset &= (~CPGMACSS_SW_RST); + writel(reset, AM3517_IP_SW_RESET); + + /* Free requested GPIO */ + gpio_free(PHY_GPIO); + } return 0; } diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index 78fc5466b6..1f3e378ffc 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -11,6 +11,7 @@ #include <common.h> #include <miiphy.h> +#include <input.h> #include <mmc.h> #include <fsl_esdhc.h> #include <asm/io.h> diff --git a/board/mini-box/picosam9g45/picosam9g45.c b/board/mini-box/picosam9g45/picosam9g45.c index 09ec247663..f3263eba6e 100644 --- a/board/mini-box/picosam9g45/picosam9g45.c +++ b/board/mini-box/picosam9g45/picosam9g45.c @@ -261,9 +261,6 @@ int board_init(void) #ifdef CONFIG_CMD_USB picosam9g45_usb_hw_init(); #endif -#ifdef CONFIG_HAS_DATAFLASH - at91_spi0_hw_init(1 << 0); -#endif #ifdef CONFIG_ATMEL_SPI at91_spi0_hw_init(1 << 4); #endif diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c index bd08a2eed4..c20da29a98 100644 --- a/board/nvidia/jetson-tk1/jetson-tk1.c +++ b/board/nvidia/jetson-tk1/jetson-tk1.c @@ -49,7 +49,7 @@ static int as3722_sd_enable(struct udevice *pmic, unsigned int sd) err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd); if (err) { - error("failed to update SD control register: %d", err); + pr_err("failed to update SD control register: %d", err); return err; } @@ -70,13 +70,13 @@ int tegra_pcie_board_init(void) ret = as3722_sd_enable(dev, 4); if (ret < 0) { - error("failed to enable SD4: %d\n", ret); + pr_err("failed to enable SD4: %d\n", ret); return ret; } ret = as3722_sd_set_voltage(dev, 4, 0x24); if (ret < 0) { - error("failed to set SD4 voltage: %d\n", ret); + pr_err("failed to set SD4 voltage: %d\n", ret); return ret; } diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index e260117802..debd1db721 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -49,35 +49,13 @@ void s_init(void) #define TMU0_MSTP125 BIT(25) /* secure */ #define TMU1_MSTP124 BIT(24) /* non-secure */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ -#define ETHERAVB_MSTP812 BIT(12) #define DVFS_MSTP926 BIT(26) -#define SD0_MSTP314 BIT(14) -#define SD1_MSTP313 BIT(13) -#define SD2_MSTP312 BIT(12) /* either MMC0 */ -#define SD3_MSTP311 BIT(11) /* either MMC1 */ - -#define SD0CKCR 0xE6150074 -#define SD1CKCR 0xE6150078 -#define SD2CKCR 0xE6150268 -#define SD3CKCR 0xE615026C +#define HSUSB_MSTP704 BIT(4) /* HSUSB */ int board_early_init_f(void) { /* TMU0,1 */ /* which use ? */ mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); - /* SCIF2 */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310); - /* EHTERAVB */ - mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812); - /* eMMC */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); - /* SDHI0, 3 */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314 | SD3_MSTP311); - - writel(1, SD0CKCR); - writel(1, SD1CKCR); - writel(1, SD2CKCR); - writel(1, SD3CKCR); #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ @@ -92,18 +70,18 @@ int board_early_init_f(void) /* -/W 32 Power resume control register 2 (3DG) */ #define SYSC_PWRONCR2 0xE618010C +/* HSUSB block registers */ +#define HSUSB_REG_LPSTS 0xE6590102 +#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) +#define HSUSB_REG_UGCTRL2 0xE6590184 +#define HSUSB_REG_UGCTRL2_USB0SEL 0x30 +#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10 + int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - /* Init PFC controller */ -#if defined(CONFIG_R8A7795) - r8a7795_pinmux_init(); -#elif defined(CONFIG_R8A7796) - r8a7796_pinmux_init(); -#endif - #if defined(CONFIG_R8A7795) /* GSX: force power and clock supply */ writel(0x0000001F, SYSC_PWRONCR2); @@ -116,113 +94,13 @@ int board_init(void) /* USB1 pull-up */ setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); -#ifdef CONFIG_RENESAS_RAVB - /* EtherAVB Enable */ - /* GPSR2 */ - gpio_request(GPIO_GFN_AVB_AVTP_CAPTURE_A, NULL); - gpio_request(GPIO_GFN_AVB_AVTP_MATCH_A, NULL); - gpio_request(GPIO_GFN_AVB_LINK, NULL); - gpio_request(GPIO_GFN_AVB_PHY_INT, NULL); - gpio_request(GPIO_GFN_AVB_MAGIC, NULL); - gpio_request(GPIO_GFN_AVB_MDC, NULL); - - /* IPSR0 */ - gpio_request(GPIO_IFN_AVB_MDC, NULL); - gpio_request(GPIO_IFN_AVB_MAGIC, NULL); - gpio_request(GPIO_IFN_AVB_PHY_INT, NULL); - gpio_request(GPIO_IFN_AVB_LINK, NULL); - gpio_request(GPIO_IFN_AVB_AVTP_MATCH_A, NULL); - gpio_request(GPIO_IFN_AVB_AVTP_CAPTURE_A, NULL); - /* IPSR1 */ - gpio_request(GPIO_FN_AVB_AVTP_PPS, NULL); - /* IPSR2 */ - gpio_request(GPIO_FN_AVB_AVTP_MATCH_B, NULL); - /* IPSR3 */ - gpio_request(GPIO_FN_AVB_AVTP_CAPTURE_B, NULL); - -#if defined(CONFIG_R8A7795) - /* USB2_OVC */ - gpio_request(GPIO_GP_6_15, NULL); - gpio_direction_input(GPIO_GP_6_15); - - /* USB2_PWEN */ - gpio_request(GPIO_GP_6_14, NULL); - gpio_direction_output(GPIO_GP_6_14, 1); - gpio_set_value(GPIO_GP_6_14, 1); -#endif - /* AVB_PHY_RST */ - gpio_request(GPIO_GP_2_10, NULL); - gpio_direction_output(GPIO_GP_2_10, 0); - mdelay(20); - gpio_set_value(GPIO_GP_2_10, 1); - udelay(1); -#endif - -#ifdef CONFIG_MMC - /* SDHI0 */ - gpio_request(GPIO_GFN_SD0_DAT0, NULL); - gpio_request(GPIO_GFN_SD0_DAT1, NULL); - gpio_request(GPIO_GFN_SD0_DAT2, NULL); - gpio_request(GPIO_GFN_SD0_DAT3, NULL); - gpio_request(GPIO_GFN_SD0_CLK, NULL); - gpio_request(GPIO_GFN_SD0_CMD, NULL); - gpio_request(GPIO_GFN_SD0_CD, NULL); - gpio_request(GPIO_GFN_SD0_WP, NULL); - - gpio_request(GPIO_GP_5_2, NULL); - gpio_request(GPIO_GP_5_1, NULL); - gpio_direction_output(GPIO_GP_5_2, 1); /* power on */ - gpio_direction_output(GPIO_GP_5_1, 1); /* 1: 3.3V, 0: 1.8V */ - - /* SDHI1/SDHI2 eMMC */ - gpio_request(GPIO_GFN_SD1_DAT0, NULL); - gpio_request(GPIO_GFN_SD1_DAT1, NULL); - gpio_request(GPIO_GFN_SD1_DAT2, NULL); - gpio_request(GPIO_GFN_SD1_DAT3, NULL); - gpio_request(GPIO_GFN_SD2_DAT0, NULL); - gpio_request(GPIO_GFN_SD2_DAT1, NULL); - gpio_request(GPIO_GFN_SD2_DAT2, NULL); - gpio_request(GPIO_GFN_SD2_DAT3, NULL); - gpio_request(GPIO_GFN_SD2_CLK, NULL); -#if defined(CONFIG_R8A7795) - gpio_request(GPIO_GFN_SD2_CMD, NULL); -#elif defined(CONFIG_R8A7796) - gpio_request(GPIO_FN_SD2_CMD, NULL); -#else -#error Only R8A7795 and R87796 is supported -#endif - gpio_request(GPIO_GP_5_3, NULL); - gpio_request(GPIO_GP_5_9, NULL); - gpio_direction_output(GPIO_GP_5_3, 0); /* 1: 3.3V, 0: 1.8V */ - gpio_direction_output(GPIO_GP_5_9, 0); /* 1: 3.3V, 0: 1.8V */ - -#if defined(CONFIG_R8A7795) - /* SDHI3 */ - gpio_request(GPIO_GFN_SD3_DAT0, NULL); /* GP_4_9 */ - gpio_request(GPIO_GFN_SD3_DAT1, NULL); /* GP_4_10 */ - gpio_request(GPIO_GFN_SD3_DAT2, NULL); /* GP_4_11 */ - gpio_request(GPIO_GFN_SD3_DAT3, NULL); /* GP_4_12 */ - gpio_request(GPIO_GFN_SD3_CLK, NULL); /* GP_4_7 */ - gpio_request(GPIO_GFN_SD3_CMD, NULL); /* GP_4_8 */ -#elif defined(CONFIG_R8A7796) - gpio_request(GPIO_FN_SD3_DAT0, NULL); /* GP_4_9 */ - gpio_request(GPIO_FN_SD3_DAT1, NULL); /* GP_4_10 */ - gpio_request(GPIO_FN_SD3_DAT2, NULL); /* GP_4_11 */ - gpio_request(GPIO_FN_SD3_DAT3, NULL); /* GP_4_12 */ - gpio_request(GPIO_FN_SD3_CLK, NULL); /* GP_4_7 */ - gpio_request(GPIO_FN_SD3_CMD, NULL); /* GP_4_8 */ -#else -#error Only R8A7795 and R87796 is supported -#endif - /* IPSR10 */ - gpio_request(GPIO_FN_SD3_CD, NULL); - gpio_request(GPIO_FN_SD3_WP, NULL); - - gpio_request(GPIO_GP_3_15, NULL); - gpio_request(GPIO_GP_3_14, NULL); - gpio_direction_output(GPIO_GP_3_15, 1); /* power on */ - gpio_direction_output(GPIO_GP_3_14, 1); /* 1: 3.3V, 0: 1.8V */ -#endif + /* Configure the HSUSB block */ + mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); + /* Choice USB0SEL */ + clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, + HSUSB_REG_UGCTRL2_USB0SEL_EHCI); + /* low power status */ + setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL); return 0; } diff --git a/board/renesas/ulcb/cpld.c b/board/renesas/ulcb/cpld.c index f9384b09ef..a1fecf18e5 100644 --- a/board/renesas/ulcb/cpld.c +++ b/board/renesas/ulcb/cpld.c @@ -12,10 +12,10 @@ #include <asm/io.h> #include <asm/gpio.h> -#define SCLK GPIO_GP_6_8 -#define SSTBZ GPIO_GP_2_3 -#define MOSI GPIO_GP_6_7 -#define MISO GPIO_GP_6_10 +#define SCLK (192 + 8) /* GPIO6 8 */ +#define SSTBZ (64 + 3) /* GPIO2 3 */ +#define MOSI (192 + 7) /* GPIO6 8 */ +#define MISO (192 + 10) /* GPIO6 10 */ #define CPLD_ADDR_MODE 0x00 /* RW */ #define CPLD_ADDR_MUX 0x02 /* RW */ diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index dc23228f4f..ca1b71975b 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -48,34 +48,13 @@ void s_init(void) #define TMU0_MSTP125 BIT(25) /* secure */ #define TMU1_MSTP124 BIT(24) /* non-secure */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ -#define ETHERAVB_MSTP812 BIT(12) #define DVFS_MSTP926 BIT(26) -#define SD0_MSTP314 BIT(14) -#define SD1_MSTP313 BIT(13) -#define SD2_MSTP312 BIT(12) /* either MMC0 */ - -#define SD0CKCR 0xE6150074 -#define SD1CKCR 0xE6150078 -#define SD2CKCR 0xE6150268 -#define SD3CKCR 0xE615026C +#define HSUSB_MSTP704 BIT(4) /* HSUSB */ int board_early_init_f(void) { /* TMU0,1 */ /* which use ? */ mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); - /* SCIF2 */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310); - /* EHTERAVB */ - mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812); - /* eMMC */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); - /* SDHI0 */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314); - - writel(1, SD0CKCR); - writel(1, SD1CKCR); - writel(1, SD2CKCR); - writel(1, SD3CKCR); #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ @@ -90,91 +69,28 @@ int board_early_init_f(void) /* -/W 32 Power resume control register 2 (3DG) */ #define SYSC_PWRONCR2 0xE618010C +/* HSUSB block registers */ +#define HSUSB_REG_LPSTS 0xE6590102 +#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) +#define HSUSB_REG_UGCTRL2 0xE6590184 +#define HSUSB_REG_UGCTRL2_USB0SEL 0x30 +#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10 + int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - /* Init PFC controller */ -#if defined(CONFIG_R8A7795) - r8a7795_pinmux_init(); -#elif defined(CONFIG_R8A7796) - r8a7796_pinmux_init(); -#endif - /* USB1 pull-up */ setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); -#ifdef CONFIG_RENESAS_RAVB - /* EtherAVB Enable */ - /* GPSR2 */ - gpio_request(GPIO_GFN_AVB_AVTP_CAPTURE_A, NULL); - gpio_request(GPIO_GFN_AVB_AVTP_MATCH_A, NULL); - gpio_request(GPIO_GFN_AVB_LINK, NULL); - gpio_request(GPIO_GFN_AVB_PHY_INT, NULL); - gpio_request(GPIO_GFN_AVB_MAGIC, NULL); - gpio_request(GPIO_GFN_AVB_MDC, NULL); - - /* IPSR0 */ - gpio_request(GPIO_IFN_AVB_MDC, NULL); - gpio_request(GPIO_IFN_AVB_MAGIC, NULL); - gpio_request(GPIO_IFN_AVB_PHY_INT, NULL); - gpio_request(GPIO_IFN_AVB_LINK, NULL); - gpio_request(GPIO_IFN_AVB_AVTP_MATCH_A, NULL); - gpio_request(GPIO_IFN_AVB_AVTP_CAPTURE_A, NULL); - /* IPSR1 */ - gpio_request(GPIO_FN_AVB_AVTP_PPS, NULL); - /* IPSR2 */ - gpio_request(GPIO_FN_AVB_AVTP_MATCH_B, NULL); - /* IPSR3 */ - gpio_request(GPIO_FN_AVB_AVTP_CAPTURE_B, NULL); - - /* AVB_PHY_RST */ - gpio_request(GPIO_GP_2_10, NULL); - gpio_direction_output(GPIO_GP_2_10, 0); - mdelay(20); - gpio_set_value(GPIO_GP_2_10, 1); - udelay(1); -#endif - -#ifdef CONFIG_MMC - /* SDHI0 */ - gpio_request(GPIO_GFN_SD0_DAT0, NULL); - gpio_request(GPIO_GFN_SD0_DAT1, NULL); - gpio_request(GPIO_GFN_SD0_DAT2, NULL); - gpio_request(GPIO_GFN_SD0_DAT3, NULL); - gpio_request(GPIO_GFN_SD0_CLK, NULL); - gpio_request(GPIO_GFN_SD0_CMD, NULL); - gpio_request(GPIO_GFN_SD0_CD, NULL); - gpio_request(GPIO_GFN_SD0_WP, NULL); - - gpio_request(GPIO_GP_5_2, NULL); - gpio_request(GPIO_GP_5_1, NULL); - gpio_direction_output(GPIO_GP_5_2, 1); /* power on */ - gpio_direction_output(GPIO_GP_5_1, 1); /* 1: 3.3V, 0: 1.8V */ - - /* SDHI1/SDHI2 eMMC */ - gpio_request(GPIO_GFN_SD1_DAT0, NULL); - gpio_request(GPIO_GFN_SD1_DAT1, NULL); - gpio_request(GPIO_GFN_SD1_DAT2, NULL); - gpio_request(GPIO_GFN_SD1_DAT3, NULL); - gpio_request(GPIO_GFN_SD2_DAT0, NULL); - gpio_request(GPIO_GFN_SD2_DAT1, NULL); - gpio_request(GPIO_GFN_SD2_DAT2, NULL); - gpio_request(GPIO_GFN_SD2_DAT3, NULL); - gpio_request(GPIO_GFN_SD2_CLK, NULL); -#if defined(CONFIG_R8A7795) - gpio_request(GPIO_GFN_SD2_CMD, NULL); -#elif defined(CONFIG_R8A7796) - gpio_request(GPIO_FN_SD2_CMD, NULL); -#else -#error Only R8A7795 and R87796 is supported -#endif - gpio_request(GPIO_GP_5_3, NULL); - gpio_request(GPIO_GP_5_9, NULL); - gpio_direction_output(GPIO_GP_5_3, 0); /* 1: 3.3V, 0: 1.8V */ - gpio_direction_output(GPIO_GP_5_9, 0); /* 1: 3.3V, 0: 1.8V */ -#endif + /* Configure the HSUSB block */ + mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); + /* Choice USB0SEL */ + clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, + HSUSB_REG_UGCTRL2_USB0SEL_EHCI); + /* low power status */ + setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL); return 0; } diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index d50c59db8d..502dec325f 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -3,13 +3,14 @@ * * SPDX-License-Identifier: GPL-2.0+ */ + #include <common.h> #include <dm.h> -#include <ram.h> #include <dm/pinctrl.h> #include <dm/uclass-internal.h> #include <asm/arch/periph.h> #include <power/regulator.h> +#include <spl.h> DECLARE_GLOBAL_DATA_PTR; @@ -67,3 +68,30 @@ int board_init(void) out: return 0; } + +void spl_board_init(void) +{ + struct udevice *pinctrl; + int ret; + + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); + if (ret) { + debug("%s: Cannot find pinctrl device\n", __func__); + goto err; + } + + /* Enable debug UART */ + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG); + if (ret) { + debug("%s: Failed to set up console UART\n", __func__); + goto err; + } + + preloader_console_init(); + return; +err: + printf("%s: Error %d\n", __func__, ret); + + /* No way to report error here */ + hang(); +} diff --git a/board/ronetix/pm9261/Makefile b/board/ronetix/pm9261/Makefile index 90835d372f..a133b07d0b 100644 --- a/board/ronetix/pm9261/Makefile +++ b/board/ronetix/pm9261/Makefile @@ -12,4 +12,3 @@ obj-y += pm9261.o obj-$(CONFIG_RED_LED) += led.o -obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/ronetix/pm9261/partition.c b/board/ronetix/pm9261/partition.c deleted file mode 100644 index 23ab8cf8a0..0000000000 --- a/board/ronetix/pm9261/partition.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * (C) Copyright 2008 - * Ulf Samuelsson <ulf@atmel.com> - * Ilko Iliev <www.ronetix.at> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <config.h> -#include <asm/hardware.h> -#include <dataflash.h> - -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ -}; - -/*define the area offsets*/ -#ifdef CONFIG_SYS_USE_DATAFLASH -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, - {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, - {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, - {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, -}; -#else -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, ""}, -}; - -#endif diff --git a/board/ronetix/pm9263/Makefile b/board/ronetix/pm9263/Makefile index 53e621dc80..72aa107b6e 100644 --- a/board/ronetix/pm9263/Makefile +++ b/board/ronetix/pm9263/Makefile @@ -12,4 +12,3 @@ obj-y += pm9263.o obj-$(CONFIG_AT91_LED) += led.o -obj-$(CONFIG_HAS_DATAFLASH) += partition.o diff --git a/board/ronetix/pm9263/partition.c b/board/ronetix/pm9263/partition.c deleted file mode 100644 index 9cc4214ca6..0000000000 --- a/board/ronetix/pm9263/partition.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * (C) Copyright 2008 - * Ulf Samuelsson <ulf@atmel.com> - * Ilko Iliev <www.ronetix.at> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <config.h> -#include <asm/hardware.h> -#include <dataflash.h> - -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ -}; - -/*define the area offsets*/ -#ifdef CONFIG_SYS_USE_DATAFLASH -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, - {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, - {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, - {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, -}; -#else -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, ""}, -}; - -#endif diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c index ae2a6e6bfa..0d17f30712 100644 --- a/board/samsung/common/exynos5-dt.c +++ b/board/samsung/common/exynos5-dt.c @@ -161,7 +161,7 @@ int board_usb_init(int index, enum usb_init_type init) samsung_get_base_usb3_phy(); if (!phy) { - error("usb3 phy not supported"); + pr_err("usb3 phy not supported"); return -ENODEV; } diff --git a/board/samsung/common/gadget.c b/board/samsung/common/gadget.c index 6a1e57f164..ef732befc4 100644 --- a/board/samsung/common/gadget.c +++ b/board/samsung/common/gadget.c @@ -17,8 +17,8 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) put_unaligned(CONFIG_G_DNL_UMS_VENDOR_NUM, &dev->idVendor); put_unaligned(CONFIG_G_DNL_UMS_PRODUCT_NUM, &dev->idProduct); } else { - put_unaligned(CONFIG_G_DNL_VENDOR_NUM, &dev->idVendor); - put_unaligned(CONFIG_G_DNL_PRODUCT_NUM, &dev->idProduct); + put_unaligned(CONFIG_USB_GADGET_VENDOR_NUM, &dev->idVendor); + put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct); } return 0; } diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c index 4157349d02..eba25b7b98 100644 --- a/board/samsung/common/misc.c +++ b/board/samsung/common/misc.c @@ -457,7 +457,7 @@ void draw_logo(void) addr = panel_info.logo_addr; if (!addr) { - error("There is no logo data."); + pr_err("There is no logo data."); return; } diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index d0247ac257..debc4c57ff 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -102,7 +102,7 @@ int board_mmc_init(bd_t *bis) ret = s5p_mmc_init(0, 4); if (ret) - error("MMC: Failed to init MMC:0.\n"); + pr_err("MMC: Failed to init MMC:0.\n"); /* * SD card (T_FLASH) detect and init @@ -127,7 +127,7 @@ int board_mmc_init(bd_t *bis) ret_sd = s5p_mmc_init(2, 4); if (ret_sd) - error("MMC: Failed to init SD card (MMC:2).\n"); + pr_err("MMC: Failed to init SD card (MMC:2).\n"); } return ret & ret_sd; diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index e40a2f6e3a..0df96c1a3d 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -429,7 +429,7 @@ int exynos_power_init(void) }; if (regulator_list_autoset(mmc_regulators, NULL, true)) - error("Unable to init all mmc regulators"); + pr_err("Unable to init all mmc regulators"); return 0; } @@ -442,7 +442,7 @@ static int s5pc210_phy_control(int on) ret = regulator_get_by_platname("VDD_UOTG_3.0V", &dev); if (ret) { - error("Regulator get error: %d", ret); + pr_err("Regulator get error: %d", ret); return ret; } @@ -487,25 +487,25 @@ int board_usb_init(int index, enum usb_init_type init) ret = regulator_get_by_platname("VCC_P3V3_2.85V", &dev); if (ret) { - error("Regulator get error: %d", ret); + pr_err("Regulator get error: %d", ret); return ret; } ret = regulator_set_enable(dev, true); if (ret) { - error("Regulator %s enable setting error: %d", dev->name, ret); + pr_err("Regulator %s enable setting error: %d", dev->name, ret); return ret; } ret = regulator_set_value(dev, 750000); if (ret) { - error("Regulator %s value setting error: %d", dev->name, ret); + pr_err("Regulator %s value setting error: %d", dev->name, ret); return ret; } ret = regulator_set_value(dev, 3300000); if (ret) { - error("Regulator %s value setting error: %d", dev->name, ret); + pr_err("Regulator %s value setting error: %d", dev->name, ret); return ret; } #endif diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c index b4f027af28..81bbb5758d 100644 --- a/board/siemens/common/factoryset.c +++ b/board/siemens/common/factoryset.c @@ -145,8 +145,8 @@ int factoryset_read_eeprom(int i2c_addr) unsigned char *cp, *cp1; #if defined(CONFIG_USB_FUNCTION_DFU) - factory_dat.usb_vendor_id = CONFIG_G_DNL_VENDOR_NUM; - factory_dat.usb_product_id = CONFIG_G_DNL_PRODUCT_NUM; + factory_dat.usb_vendor_id = CONFIG_USB_GADGET_VENDOR_NUM; + factory_dat.usb_product_id = CONFIG_USB_GADGET_PRODUCT_NUM; #endif if (i2c_probe(i2c_addr)) goto err; diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c index d4416e6468..7240c9762e 100644 --- a/board/siemens/corvus/board.c +++ b/board/siemens/corvus/board.c @@ -250,9 +250,6 @@ int board_init(void) #ifdef CONFIG_ATMEL_SPI at91_spi0_hw_init(1 << 4); #endif -#ifdef CONFIG_HAS_DATAFLASH - at91_spi0_hw_init(1 << 0); -#endif #ifdef CONFIG_MACB corvus_macb_hw_init(); #endif diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README index 2cfa5bfc86..ef1e3bf426 100644 --- a/board/solidrun/clearfog/README +++ b/board/solidrun/clearfog/README @@ -16,3 +16,23 @@ $ sudo dd if=u-boot-spl.kwb of=/dev/sdX bs=512 seek=1 Please use the correct device node for your setup instead of "/dev/sdX" here! + +Boot from UART: +--------------- + +Connect the on-board micro-USB (CF Pro: CON11, CF Base: CON5) +to your host. + +Set the SW1 DIP switches to UART boot (0: OFF, 1: ON): + + ClearFog Base: 01001 + ClearFog Pro: 11110 + +Run the following command to initiate U-Boot download: + + ./tools/kwboot -b u-boot-spl.kwb /dev/ttyUSBX + +Use the correct UART device node for /dev/ttyUSBX. + +When download finishes start your favorite terminal emulator +on /dev/ttyUSBX. diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index 1e4da4a6b1..ee9e4f7c01 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -308,13 +308,8 @@ int board_ehci_hcd_init(int port) int board_early_init_f(void) { - int ret = 0; setup_iomux_uart(); -#ifdef CONFIG_VIDEO_IPUV3 - ret = setup_display(); -#endif - #ifdef CONFIG_CMD_SATA setup_sata(); #endif @@ -322,15 +317,21 @@ int board_early_init_f(void) #ifdef CONFIG_USB_EHCI_MX6 setup_usb(); #endif - return ret; + return 0; } int board_init(void) { + int ret = 0; + /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - return 0; +#ifdef CONFIG_VIDEO_IPUV3 + ret = setup_display(); +#endif + + return ret; } static bool is_hummingboard(void) diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index ff6eea24a5..26c452e1b3 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -118,6 +118,11 @@ M: Paul Kocialkowski <contact@paulk.fr> S: Maintained F: configs/Ampe_A76_defconfig +BANANAPI M1 PLUS +M: Jagan Teki <jagan@amarulasolutions.com> +S: Maintained +F: configs/bananapi_m1_plus_defconfig + BANANAPI M2 ULTRA BOARD M: Chen-Yu Tsai <wens@csie.org> S: Maintained diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 70e01437c4..6e13ee32c1 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -32,6 +32,7 @@ #include <libfdt.h> #include <nand.h> #include <net.h> +#include <spl.h> #include <sy8106a.h> #include <asm/setup.h> @@ -491,20 +492,6 @@ int board_mmc_init(bd_t *bis) return -1; #endif -#if !defined(CONFIG_SPL_BUILD) && CONFIG_MMC_SUNXI_SLOT_EXTRA == 2 - /* - * On systems with an emmc (mmc2), figure out if we are booting from - * the emmc and if we are make it "mmc dev 0" so that boot.scr, etc. - * are searched there first. Note we only do this for u-boot proper, - * not for the SPL, see spl_boot_device(). - */ - if (readb(SPL_ADDR + 0x28) == SUNXI_BOOTED_FROM_MMC2) { - /* Booting from emmc / mmc2, swap */ - mmc0->block_dev.devnum = 1; - mmc1->block_dev.devnum = 0; - } -#endif - return 0; } #endif @@ -720,13 +707,22 @@ static void setup_environment(const void *fdt) int misc_init_r(void) { __maybe_unused int ret; + uint boot; env_set("fel_booted", NULL); env_set("fel_scriptaddr", NULL); + env_set("mmc_bootdev", NULL); + + boot = sunxi_get_boot_device(); /* determine if we are running in FEL mode */ - if (!is_boot0_magic(SPL_ADDR + 4)) { /* eGON.BT0 */ + if (boot == BOOT_DEVICE_BOARD) { env_set("fel_booted", "1"); parse_spl_header(SPL_ADDR); + /* or if we booted from MMC, and which one */ + } else if (boot == BOOT_DEVICE_MMC1) { + env_set("mmc_bootdev", "0"); + } else if (boot == BOOT_DEVICE_MMC2) { + env_set("mmc_bootdev", "1"); } setup_environment(gd->fdt_blob); @@ -736,7 +732,10 @@ int misc_init_r(void) if (ret) return ret; #endif - sunxi_musb_board_init(); + +#ifdef CONFIG_USB_ETHER + usb_ether_init(); +#endif return 0; } diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c index 8fe26a75e8..e5bec57f4f 100644 --- a/board/technologic/ts4800/ts4800.c +++ b/board/technologic/ts4800/ts4800.c @@ -18,6 +18,7 @@ #include <asm/arch/clock.h> #include <asm/mach-imx/mx5_video.h> #include <mmc.h> +#include <input.h> #include <fsl_esdhc.h> #include <mc13892.h> diff --git a/board/theadorable/MAINTAINERS b/board/theadorable/MAINTAINERS index 5ae6b6487c..1e8df93d37 100644 --- a/board/theadorable/MAINTAINERS +++ b/board/theadorable/MAINTAINERS @@ -4,4 +4,3 @@ S: Maintained F: board/theadorable/ F: include/configs/theadorable.h F: configs/theadorable_debug_defconfig -F: configs/theadorable_defconfig diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its index 405750f351..60daddcc44 100644 --- a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its +++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its @@ -27,8 +27,8 @@ type = "firmware"; arch = "arm64"; compression = "none"; - load = <0x00010000>; - entry = <0x00010000>; + load = <0x00100000>; + entry = <0x00100000>; }; fdt { diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c index 45d56cd99e..2b4988e2d2 100644 --- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c +++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c @@ -3,60 +3,48 @@ * * SPDX-License-Identifier: GPL-2.0+ */ + #include <common.h> #include <dm.h> #include <misc.h> -#include <ram.h> #include <dm/pinctrl.h> #include <dm/uclass-internal.h> #include <asm/setup.h> #include <asm/arch/periph.h> #include <power/regulator.h> +#include <spl.h> #include <u-boot/sha256.h> DECLARE_GLOBAL_DATA_PTR; int board_init(void) { - struct udevice *pinctrl, *regulator; int ret; /* - * The PWM does not have decicated interrupt number in dts and can - * not get periph_id by pinctrl framework, so let's init them here. - * The PWM2 and PWM3 are for pwm regulators. + * We need to call into regulators_enable_boot_on() again, as the call + * during SPL may have not included all regulators. */ - ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl); - if (ret) { - debug("%s: Cannot find pinctrl device\n", __func__); - goto out; - } - - ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2); - if (ret) { - debug("%s PWM2 pinctrl init fail!\n", __func__); - goto out; - } - - /* rk3399 need to init vdd_center to get the correct output voltage */ - ret = regulator_get_by_platname("vdd_center", ®ulator); + ret = regulators_enable_boot_on(false); if (ret) - debug("%s: Cannot get vdd_center regulator\n", __func__); + debug("%s: Cannot enable boot on regulator\n", __func__); - ret = regulator_get_by_platname("vcc5v0_host", ®ulator); - if (ret) { - debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); - goto out; - } + return 0; +} - ret = regulator_set_enable(regulator, true); - if (ret) { - debug("%s vcc5v0-host-en set fail!\n", __func__); - goto out; - } +void spl_board_init(void) +{ + int ret; -out: - return 0; + /* + * Turning the eMMC and SPI back on (if disabled via the Qseven + * BIOS_ENABLE) signal is done through a always-on regulator). + */ + ret = regulators_enable_boot_on(false); + if (ret) + debug("%s: Cannot enable boot on regulator\n", __func__); + + preloader_console_init(); } static void setup_macaddr(void) @@ -91,8 +79,6 @@ static void setup_macaddr(void) mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ eth_env_set_enetaddr("ethaddr", mac_addr); #endif - - return; } static void setup_serial(void) @@ -147,8 +133,6 @@ static void setup_serial(void) env_set("cpuid#", cpuid_str); env_set("serial#", serialno_str); #endif - - return; } int misc_init_r(void) diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c index 266a66b678..6c77d915e5 100644 --- a/board/ti/ks2_evm/board_k2e.c +++ b/board/ti/ks2_evm/board_k2e.c @@ -166,7 +166,7 @@ int get_num_eth_ports(void) } #endif -#if defined(CONFIG_FIT_EMBED) +#if defined(CONFIG_MULTI_DTB_FIT) int board_fit_config_name_match(const char *name) { if (!strcmp(name, "keystone-k2e-evm")) diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index f1c4ddcd30..01328f1955 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -217,7 +217,7 @@ int board_mmc_init(bd_t *bis) } #endif -#if defined(CONFIG_FIT_EMBED) +#if defined(CONFIG_MULTI_DTB_FIT) int board_fit_config_name_match(const char *name) { bool eeprom_read = board_ti_was_eeprom_read(); diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c index c7330996d1..e99e6355b4 100644 --- a/board/ti/ks2_evm/board_k2hk.c +++ b/board/ti/ks2_evm/board_k2hk.c @@ -150,7 +150,7 @@ int board_early_init_f(void) } #endif -#if defined(CONFIG_FIT_EMBED) +#if defined(CONFIG_MULTI_DTB_FIT) int board_fit_config_name_match(const char *name) { if (!strcmp(name, "keystone-k2hk-evm")) diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c index 166367bfb9..c65f33131d 100644 --- a/board/ti/ks2_evm/board_k2l.c +++ b/board/ti/ks2_evm/board_k2l.c @@ -138,7 +138,7 @@ int board_early_init_f(void) } #endif -#if defined(CONFIG_FIT_EMBED) +#if defined(CONFIG_MULTI_DTB_FIT) int board_fit_config_name_match(const char *name) { if (!strcmp(name, "keystone-k2l-evm")) diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 628a61dae0..d68fdc8347 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -30,6 +30,7 @@ #include <dm/platdata.h> #include <fsl_esdhc.h> #include <i2c.h> +#include <input.h> #include <imx_thermal.h> #include <linux/errno.h> #include <malloc.h> @@ -756,10 +757,6 @@ int board_early_init_f(void) #else setup_iomux_dce_uart(); #endif - -#if defined(CONFIG_VIDEO_IPUV3) - setup_display(); -#endif return 0; } @@ -781,6 +778,10 @@ int board_init(void) setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info_loc); setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3); +#if defined(CONFIG_VIDEO_IPUV3) + setup_display(); +#endif + #ifdef CONFIG_TDX_CMD_IMX_MFGR (void) pmic_init(); #endif diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 756e3f39df..2998a09238 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -29,6 +29,7 @@ #include <dm/platdata.h> #include <fsl_esdhc.h> #include <i2c.h> +#include <input.h> #include <imx_thermal.h> #include <linux/errno.h> #include <malloc.h> @@ -630,9 +631,6 @@ int board_early_init_f(void) ARRAY_SIZE(pwr_intb_pads)); setup_iomux_uart(); -#if defined(CONFIG_VIDEO_IPUV3) - setup_display(); -#endif return 0; } @@ -653,6 +651,10 @@ int board_init(void) setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info_loc); +#if defined(CONFIG_VIDEO_IPUV3) + setup_display(); +#endif + #ifdef CONFIG_TDX_CMD_IMX_MFGR (void) pmic_init(); #endif diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index adfcf48562..6d2609ce11 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -30,6 +30,8 @@ #include <phy.h> #include <input.h> #include <i2c.h> +#include <power/pmic.h> +#include <power/pfuze100_pmic.h> DECLARE_GLOBAL_DATA_PTR; @@ -51,8 +53,11 @@ DECLARE_GLOBAL_DATA_PTR; #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2) #define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9) #define ETH_PHY_RESET IMX_GPIO_NR(3, 29) +#define ETH_PHY_AR8035_POWER IMX_GPIO_NR(7, 13) #define REV_DETECTION IMX_GPIO_NR(2, 28) +static bool with_pmic; + int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -107,6 +112,11 @@ static iomux_v3_cfg_t const enet_pads[] = { IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; +static iomux_v3_cfg_t const enet_ar8035_power_pads[] = { + /* AR8035 POWER */ + IOMUX_PADS(PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + static iomux_v3_cfg_t const rev_detection_pad[] = { IOMUX_PADS(PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; @@ -120,6 +130,14 @@ static void setup_iomux_enet(void) { SETUP_IOMUX_PADS(enet_pads); + if (with_pmic) { + SETUP_IOMUX_PADS(enet_ar8035_power_pads); + /* enable AR8035 POWER */ + gpio_direction_output(ETH_PHY_AR8035_POWER, 0); + } + /* wait until 3.3V of PHY and clock become stable */ + mdelay(10); + /* Reset AR8031 PHY */ gpio_direction_output(ETH_PHY_RESET, 0); mdelay(10); @@ -192,6 +210,7 @@ int board_mmc_init(bd_t *bis) static int ar8031_phy_fixup(struct phy_device *phydev) { unsigned short val; + int mask; /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); @@ -199,7 +218,12 @@ static int ar8031_phy_fixup(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); - val &= 0xffe3; + if (with_pmic) + mask = 0xffe7; /* AR8035 */ + else + mask = 0xffe3; /* AR8031 */ + + val &= mask; val |= 0x18; phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); @@ -257,6 +281,40 @@ struct i2c_pads_info mx6dl_i2c2_pad_info = { } }; +struct i2c_pads_info mx6q_i2c3_pad_info = { + .scl = { + .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6Q_PAD_GPIO_5__GPIO1_IO05 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6Q_PAD_GPIO_16__GPIO7_IO11 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(7, 11) + } +}; + +struct i2c_pads_info mx6dl_i2c3_pad_info = { + .scl = { + .i2c_mode = MX6DL_PAD_GPIO_5__I2C3_SCL + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6DL_PAD_GPIO_5__GPIO1_IO05 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6DL_PAD_GPIO_16__I2C3_SDA + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6DL_PAD_GPIO_16__GPIO7_IO11 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(7, 11) + } +}; + static iomux_v3_cfg_t const fwadapt_7wvga_pads[] = { IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK), IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), /* HSync */ @@ -376,9 +434,6 @@ int board_eth_init(bd_t *bis) int board_early_init_f(void) { setup_iomux_uart(); -#if defined(CONFIG_VIDEO_IPUV3) - setup_display(); -#endif #ifdef CONFIG_SATA /* Only mx6q wandboard has SATA */ if (is_cpu_type(MXC_CPU_MX6Q)) @@ -388,6 +443,31 @@ int board_early_init_f(void) return 0; } +#define PMIC_I2C_BUS 2 + +int power_init_board(void) +{ + struct pmic *p; + u32 reg; + + /* configure PFUZE100 PMIC */ + power_pfuze100_init(PMIC_I2C_BUS); + p = pmic_get("PFUZE100"); + if (p && !pmic_probe(p)) { + pmic_reg_read(p, PFUZE100_DEVICEID, ®); + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); + with_pmic = true; + + /* Set VGEN2 to 1.5V and enable */ + pmic_reg_read(p, PFUZE100_VGEN2VOL, ®); + reg &= ~(LDO_VOL_MASK); + reg |= (LDOA_1_50V | (1 << (LDO_EN))); + pmic_reg_write(p, PFUZE100_VGEN2VOL, reg); + } + + return 0; +} + /* * Do not overwrite the console * Use always serial for U-Boot console @@ -417,6 +497,14 @@ static bool is_revc1(void) return false; } +static bool is_revd1(void) +{ + if (with_pmic) + return true; + else + return false; +} + int board_late_init(void) { #ifdef CONFIG_CMD_BMODE @@ -429,7 +517,9 @@ int board_late_init(void) else env_set("board_rev", "MX6DL"); - if (is_revc1()) + if (is_revd1()) + env_set("board_name", "D1"); + else if (is_revc1()) env_set("board_name", "C1"); else env_set("board_name", "B1"); @@ -444,10 +534,15 @@ int board_init(void) #if defined(CONFIG_VIDEO_IPUV3) setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c2_pad_info); - if (is_mx6dq()) + if (is_mx6dq()) { setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c2_pad_info); - else + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c3_pad_info); + } else { setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c2_pad_info); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c3_pad_info); + } + + setup_display(); #endif return 0; @@ -455,7 +550,9 @@ int board_init(void) int checkboard(void) { - if (is_revc1()) + if (is_revd1()) + puts("Board: Wandboard rev D1\n"); + else if (is_revc1()) puts("Board: Wandboard rev C1\n"); else puts("Board: Wandboard rev B1\n"); diff --git a/cmd/Kconfig b/cmd/Kconfig index d6d130edfa..ce81b4c444 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -116,6 +116,9 @@ endmenu source "cmd/fastboot/Kconfig" +config BUILD_BIN2C + bool + comment "Commands" menu "Info commands" @@ -222,6 +225,8 @@ config CMD_BOOTEFI_HELLO for testing that EFI is working at a basic level, and for bringing up EFI support on a new architecture. +source lib/efi_selftest/Kconfig + config CMD_BOOTMENU bool "bootmenu" select MENU @@ -261,7 +266,6 @@ config CMD_IMI config CMD_IMLS bool "imls" - default y help List all images found in flash @@ -526,6 +530,7 @@ menu "Compression commands" config CMD_LZMADEC bool "lzmadec" + default y if CMD_BOOTI select LZMA help Support decompressing an LZMA (Lempel-Ziv-Markov chain algorithm) @@ -533,6 +538,7 @@ config CMD_LZMADEC config CMD_UNZIP bool "unzip" + default y if CMD_BOOTI help Uncompress a zip-compressed memory region. @@ -663,10 +669,17 @@ config CMD_GPT bool "GPT (GUID Partition Table) command" select PARTITION_UUIDS select EFI_PARTITION + imply RANDOM_UUID help Enable the 'gpt' command to ready and write GPT style partition tables. +config RANDOM_UUID + bool "GPT Random UUID generation" + help + Enable the generation of partitions with random UUIDs if none + are provided. + config CMD_GPT_RENAME bool "GPT partition renaming commands" depends on CMD_GPT @@ -1311,6 +1324,16 @@ config CMD_CROS_EC endmenu menu "Filesystem commands" +config CMD_BTRFS + bool "Enable the 'btrsubvol' command" + select FS_BTRFS + help + This enables the 'btrsubvol' command to list subvolumes + of a BTRFS filesystem. There are no special commands for + listing BTRFS directories or loading BTRFS files - this + can be done by the generic 'fs' commands (see CMD_FS_GENERIC) + when BTRFS is enabled (see FS_BTRFS). + config CMD_CBFS bool "Enable the 'cbfs' command" depends on FS_CBFS diff --git a/cmd/Makefile b/cmd/Makefile index 2a5b8ce825..2b0444d5b7 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o obj-$(CONFIG_CMD_BOOTZ) += bootz.o obj-$(CONFIG_CMD_BOOTI) += booti.o +obj-$(CONFIG_CMD_BTRFS) += btrfs.o obj-$(CONFIG_CMD_CACHE) += cache.o obj-$(CONFIG_CMD_CBFS) += cbfs.o obj-$(CONFIG_CMD_CLK) += clk.o diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 3196d86040..478bc116e2 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -22,97 +22,14 @@ DECLARE_GLOBAL_DATA_PTR; static uint8_t efi_obj_list_initalized; -/* - * When booting using the "bootefi" command, we don't know which - * physical device the file came from. So we create a pseudo-device - * called "bootefi" with the device path /bootefi. - * - * In addition to the originating device we also declare the file path - * of "bootefi" based loads to be /bootefi. - */ -static struct efi_device_path_file_path bootefi_image_path[] = { - { - .dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE, - .dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH, - .dp.length = sizeof(bootefi_image_path[0]), - .str = { 'b','o','o','t','e','f','i' }, - }, { - .dp.type = DEVICE_PATH_TYPE_END, - .dp.sub_type = DEVICE_PATH_SUB_TYPE_END, - .dp.length = sizeof(bootefi_image_path[0]), - } -}; - -static struct efi_device_path_file_path bootefi_device_path[] = { - { - .dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE, - .dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH, - .dp.length = sizeof(bootefi_image_path[0]), - .str = { 'b','o','o','t','e','f','i' }, - }, { - .dp.type = DEVICE_PATH_TYPE_END, - .dp.sub_type = DEVICE_PATH_SUB_TYPE_END, - .dp.length = sizeof(bootefi_image_path[0]), - } -}; - -/* The EFI loaded_image interface for the image executed via "bootefi" */ -static struct efi_loaded_image loaded_image_info = { - .device_handle = bootefi_device_path, - .file_path = bootefi_image_path, -}; - -/* The EFI object struct for the image executed via "bootefi" */ -static struct efi_object loaded_image_info_obj = { - .handle = &loaded_image_info, - .protocols = { - { - /* - * When asking for the loaded_image interface, just - * return handle which points to loaded_image_info - */ - .guid = &efi_guid_loaded_image, - .protocol_interface = &loaded_image_info, - }, - { - /* - * When asking for the device path interface, return - * bootefi_device_path - */ - .guid = &efi_guid_device_path, - .protocol_interface = bootefi_device_path, - }, - { - .guid = &efi_guid_console_control, - .protocol_interface = (void *) &efi_console_control - }, - { - .guid = &efi_guid_device_path_to_text_protocol, - .protocol_interface = (void *) &efi_device_path_to_text - }, - }, -}; - -/* The EFI object struct for the device the "bootefi" image was loaded from */ -static struct efi_object bootefi_device_obj = { - .handle = bootefi_device_path, - .protocols = { - { - /* When asking for the device path interface, return - * bootefi_device_path */ - .guid = &efi_guid_device_path, - .protocol_interface = bootefi_device_path - } - }, -}; +static struct efi_device_path *bootefi_image_path; +static struct efi_device_path *bootefi_device_path; /* Initialize and populate EFI object list */ static void efi_init_obj_list(void) { efi_obj_list_initalized = 1; - list_add_tail(&loaded_image_info_obj.link, &efi_obj_list); - list_add_tail(&bootefi_device_obj.link, &efi_obj_list); efi_console_register(); #ifdef CONFIG_PARTITIONS efi_disk_register(); @@ -121,13 +38,7 @@ static void efi_init_obj_list(void) efi_gop_register(); #endif #ifdef CONFIG_NET - void *nethandle = loaded_image_info.device_handle; - efi_net_register(&nethandle); - - if (!memcmp(bootefi_device_path[0].str, "N\0e\0t", 6)) - loaded_image_info.device_handle = nethandle; - else - loaded_image_info.device_handle = bootefi_device_path; + efi_net_register(); #endif #ifdef CONFIG_GENERATE_SMBIOS_TABLE efi_smbios_register(); @@ -210,8 +121,15 @@ static unsigned long efi_run_in_el2(asmlinkage ulong (*entry)( * Load an EFI payload into a newly allocated piece of memory, register all * EFI objects it would want to access and jump to it. */ -static unsigned long do_bootefi_exec(void *efi, void *fdt) +static unsigned long do_bootefi_exec(void *efi, void *fdt, + struct efi_device_path *device_path, + struct efi_device_path *image_path) { + struct efi_loaded_image loaded_image_info = {}; + struct efi_object loaded_image_info_obj = {}; + struct efi_device_path *memdp = NULL; + ulong ret; + ulong (*entry)(void *image_handle, struct efi_system_table *st) asmlinkage; ulong fdt_pages, fdt_size, fdt_start, fdt_end; @@ -219,6 +137,27 @@ static unsigned long do_bootefi_exec(void *efi, void *fdt) bootm_headers_t img = { 0 }; /* + * Special case for efi payload not loaded from disk, such as + * 'bootefi hello' or for example payload loaded directly into + * memory via jtag/etc: + */ + if (!device_path && !image_path) { + printf("WARNING: using memory device/image path, this may confuse some payloads!\n"); + /* actual addresses filled in after efi_load_pe() */ + memdp = efi_dp_from_mem(0, 0, 0); + device_path = image_path = memdp; + } else { + assert(device_path && image_path); + } + + /* Initialize and populate EFI object list */ + if (!efi_obj_list_initalized) + efi_init_obj_list(); + + efi_setup_loaded_image(&loaded_image_info, &loaded_image_info_obj, + device_path, image_path); + + /* * gd lives in a fixed register which may get clobbered while we execute * the payload. So save it here and restore it on every callback entry */ @@ -252,18 +191,29 @@ static unsigned long do_bootefi_exec(void *efi, void *fdt) /* Load the EFI payload */ entry = efi_load_pe(efi, &loaded_image_info); - if (!entry) - return -ENOENT; + if (!entry) { + ret = -ENOENT; + goto exit; + } - /* Initialize and populate EFI object list */ - if (!efi_obj_list_initalized) - efi_init_obj_list(); + if (memdp) { + struct efi_device_path_memory *mdp = (void *)memdp; + mdp->memory_type = loaded_image_info.image_code_type; + mdp->start_address = (uintptr_t)loaded_image_info.image_base; + mdp->end_address = mdp->start_address + + loaded_image_info.image_size; + } + + /* we don't support much: */ + env_set("efi_8be4df61-93ca-11d2-aa0d-00e098032b8c_OsIndicationsSupported", + "{ro,boot}(blob)0000000000000000"); /* Call our payload! */ debug("%s:%d Jumping to 0x%lx\n", __func__, __LINE__, (long)entry); if (setjmp(&loaded_image_info.exit_jmp)) { - return loaded_image_info.exit_status; + ret = loaded_image_info.exit_status; + goto exit; } #ifdef CONFIG_ARM64 @@ -282,9 +232,45 @@ static unsigned long do_bootefi_exec(void *efi, void *fdt) } #endif - return efi_do_enter(&loaded_image_info, &systab, entry); + ret = efi_do_enter(&loaded_image_info, &systab, entry); + +exit: + /* image has returned, loaded-image obj goes *poof*: */ + list_del(&loaded_image_info_obj.link); + + return ret; } +static int do_bootefi_bootmgr_exec(unsigned long fdt_addr) +{ + struct efi_device_path *device_path, *file_path; + void *addr; + efi_status_t r; + + /* Initialize and populate EFI object list */ + if (!efi_obj_list_initalized) + efi_init_obj_list(); + + /* + * gd lives in a fixed register which may get clobbered while we execute + * the payload. So save it here and restore it on every callback entry + */ + efi_save_gd(); + + addr = efi_bootmgr_load(&device_path, &file_path); + if (!addr) + return 1; + + printf("## Starting EFI application at %p ...\n", addr); + r = do_bootefi_exec(addr, (void *)fdt_addr, device_path, file_path); + printf("## Application terminated, r = %lu\n", + r & ~EFI_ERROR_MASK); + + if (r != EFI_SUCCESS) + return 1; + + return 0; +} /* Interpreter command to boot an arbitrary EFI image from memory */ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -297,13 +283,44 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return CMD_RET_USAGE; #ifdef CONFIG_CMD_BOOTEFI_HELLO if (!strcmp(argv[1], "hello")) { - ulong size = __efi_hello_world_end - __efi_hello_world_begin; - - addr = CONFIG_SYS_LOAD_ADDR; - memcpy((char *)addr, __efi_hello_world_begin, size); + ulong size = __efi_helloworld_end - __efi_helloworld_begin; + + saddr = env_get("loadaddr"); + if (saddr) + addr = simple_strtoul(saddr, NULL, 16); + else + addr = CONFIG_SYS_LOAD_ADDR; + memcpy((char *)addr, __efi_helloworld_begin, size); + } else +#endif +#ifdef CONFIG_CMD_BOOTEFI_SELFTEST + if (!strcmp(argv[1], "selftest")) { + struct efi_loaded_image loaded_image_info = {}; + struct efi_object loaded_image_info_obj = {}; + + efi_setup_loaded_image(&loaded_image_info, + &loaded_image_info_obj, + bootefi_device_path, bootefi_image_path); + /* + * gd lives in a fixed register which may get clobbered while we + * execute the payload. So save it here and restore it on every + * callback entry + */ + efi_save_gd(); + /* Initialize and populate EFI object list */ + if (!efi_obj_list_initalized) + efi_init_obj_list(); + return efi_selftest(&loaded_image_info, &systab); } else #endif - { + if (!strcmp(argv[1], "bootmgr")) { + unsigned long fdt_addr = 0; + + if (argc > 2) + fdt_addr = simple_strtoul(argv[2], NULL, 16); + + return do_bootefi_bootmgr_exec(fdt_addr); + } else { saddr = argv[1]; addr = simple_strtoul(saddr, NULL, 16); @@ -315,7 +332,8 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } printf("## Starting EFI application at %08lx ...\n", addr); - r = do_bootefi_exec((void *)addr, (void*)fdt_addr); + r = do_bootefi_exec((void *)addr, (void *)fdt_addr, + bootefi_device_path, bootefi_image_path); printf("## Application terminated, r = %lu\n", r & ~EFI_ERROR_MASK); @@ -332,10 +350,18 @@ static char bootefi_help_text[] = " If specified, the device tree located at <fdt address> gets\n" " exposed as EFI configuration table.\n" #ifdef CONFIG_CMD_BOOTEFI_HELLO - "hello\n" - " - boot a sample Hello World application stored within U-Boot" + "bootefi hello\n" + " - boot a sample Hello World application stored within U-Boot\n" #endif - ; +#ifdef CONFIG_CMD_BOOTEFI_SELFTEST + "bootefi selftest\n" + " - boot an EFI selftest application stored within U-Boot\n" +#endif + "bootmgr [fdt addr]\n" + " - load and boot EFI payload based on BootOrder/BootXXXX variables.\n" + "\n" + " If specified, the device tree located at <fdt address> gets\n" + " exposed as EFI configuration table.\n"; #endif U_BOOT_CMD( @@ -344,58 +370,47 @@ U_BOOT_CMD( bootefi_help_text ); -void efi_set_bootdev(const char *dev, const char *devnr, const char *path) +static int parse_partnum(const char *devnr) { - __maybe_unused struct blk_desc *desc; - char devname[32] = { 0 }; /* dp->str is u16[32] long */ - char *colon, *s; - -#if defined(CONFIG_BLK) || CONFIG_IS_ENABLED(ISO_PARTITION) - desc = blk_get_dev(dev, simple_strtol(devnr, NULL, 10)); -#endif - -#ifdef CONFIG_BLK - if (desc) { - snprintf(devname, sizeof(devname), "%s", desc->bdev->name); - } else -#endif - - { - /* Assemble the condensed device name we use in efi_disk.c */ - snprintf(devname, sizeof(devname), "%s%s", dev, devnr); + const char *str = strchr(devnr, ':'); + if (str) { + str++; + return simple_strtoul(str, NULL, 16); } + return 0; +} - colon = strchr(devname, ':'); +void efi_set_bootdev(const char *dev, const char *devnr, const char *path) +{ + char filename[32] = { 0 }; /* dp->str is u16[32] long */ + char *s; -#if CONFIG_IS_ENABLED(ISO_PARTITION) - /* For ISOs we create partition block devices */ - if (desc && (desc->type != DEV_TYPE_UNKNOWN) && - (desc->part_type == PART_TYPE_ISO)) { - if (!colon) - snprintf(devname, sizeof(devname), "%s:1", devname); + if (strcmp(dev, "Net")) { + struct blk_desc *desc; + int part; - colon = NULL; - } -#endif + desc = blk_get_dev(dev, simple_strtol(devnr, NULL, 10)); + part = parse_partnum(devnr); - if (colon) - *colon = '\0'; + bootefi_device_path = efi_dp_from_part(desc, part); + } else { +#ifdef CONFIG_NET + bootefi_device_path = efi_dp_from_eth(); +#endif + } - /* Patch bootefi_device_path to the target device */ - memset(bootefi_device_path[0].str, 0, sizeof(bootefi_device_path[0].str)); - ascii2unicode(bootefi_device_path[0].str, devname); + if (!path) + return; - /* Patch bootefi_image_path to the target file path */ - memset(bootefi_image_path[0].str, 0, sizeof(bootefi_image_path[0].str)); if (strcmp(dev, "Net")) { /* Add leading / to fs paths, because they're absolute */ - snprintf(devname, sizeof(devname), "/%s", path); + snprintf(filename, sizeof(filename), "/%s", path); } else { - snprintf(devname, sizeof(devname), "%s", path); + snprintf(filename, sizeof(filename), "%s", path); } /* DOS style file path: */ - s = devname; + s = filename; while ((s = strchr(s, '/'))) *s++ = '\\'; - ascii2unicode(bootefi_image_path[0].str, devname); + bootefi_image_path = efi_dp_from_file(NULL, 0, filename); } diff --git a/cmd/btrfs.c b/cmd/btrfs.c new file mode 100644 index 0000000000..3f4f1b782b --- /dev/null +++ b/cmd/btrfs.c @@ -0,0 +1,28 @@ +/* + * 2017 by Marek Behun <marek.behun@nic.cz> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <btrfs.h> +#include <fs.h> + +int do_btrsubvol(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) +{ + if (argc != 3) + return CMD_RET_USAGE; + + if (fs_set_blk_dev(argv[1], argv[2], FS_TYPE_BTRFS)) + return 1; + + btrfs_list_subvols(); + return 0; +} + +U_BOOT_CMD(btrsubvol, 3, 1, do_btrsubvol, + "list subvolumes of a BTRFS filesystem", + "<interface> <dev[:part]>\n" + " - List subvolumes of a BTRFS filesystem." +) diff --git a/cmd/fastboot.c b/cmd/fastboot.c index 488822a2ee..8adcca592d 100644 --- a/cmd/fastboot.c +++ b/cmd/fastboot.c @@ -27,7 +27,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) ret = board_usb_init(controller_index, USB_INIT_DEVICE); if (ret) { - error("USB init failed: %d", ret); + pr_err("USB init failed: %d", ret); return CMD_RET_FAILURE; } diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig index fb0c5da94c..214bbc23fc 100644 --- a/cmd/fastboot/Kconfig +++ b/cmd/fastboot/Kconfig @@ -3,11 +3,16 @@ comment "FASTBOOT" menuconfig FASTBOOT bool "Fastboot support" depends on USB_GADGET + default y if ARCH_SUNXI && USB_MUSB_GADGET if FASTBOOT config USB_FUNCTION_FASTBOOT bool "Enable USB fastboot gadget" + default y + select USB_GADGET_DOWNLOAD + imply ANDROID_BOOT_IMAGE + imply CMD_FASTBOOT help This enables the USB part of the fastboot gadget. @@ -69,6 +74,8 @@ config FASTBOOT_FLASH config FASTBOOT_FLASH_MMC_DEV int "Define FASTBOOT MMC FLASH default device" depends on FASTBOOT_FLASH && MMC + default 0 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA = -1 + default 1 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA != -1 help The fastboot "flash" command requires additional information regarding the non-volatile storage device. Define this to diff --git a/cmd/flash.c b/cmd/flash.c index b150940bf3..a2803e8ee4 100644 --- a/cmd/flash.c +++ b/cmd/flash.c @@ -11,10 +11,6 @@ #include <common.h> #include <command.h> -#ifdef CONFIG_HAS_DATAFLASH -#include <dataflash.h> -#endif - #if defined(CONFIG_CMD_MTDPARTS) #include <jffs2/jffs2.h> @@ -279,10 +275,6 @@ static int do_flinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ulong bank; #endif -#ifdef CONFIG_HAS_DATAFLASH - dataflash_print_info(); -#endif - #ifdef CONFIG_MTD_NOR_FLASH if (argc == 1) { /* print info for all FLASH banks */ for (bank=0; bank <CONFIG_SYS_MAX_FLASH_BANKS; ++bank) { @@ -451,10 +443,7 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) u8 dev_type, dev_num, pnum; #endif #endif /* CONFIG_MTD_NOR_FLASH */ -#ifdef CONFIG_HAS_DATAFLASH - int status; -#endif -#if defined(CONFIG_MTD_NOR_FLASH) || defined(CONFIG_HAS_DATAFLASH) +#if defined(CONFIG_MTD_NOR_FLASH) int p; ulong addr_first, addr_last; #endif @@ -462,7 +451,7 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (argc < 3) return CMD_RET_USAGE; -#if defined(CONFIG_MTD_NOR_FLASH) || defined(CONFIG_HAS_DATAFLASH) +#if defined(CONFIG_MTD_NOR_FLASH) if (strcmp(argv[1], "off") == 0) p = 0; else if (strcmp(argv[1], "on") == 0) @@ -471,24 +460,6 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return CMD_RET_USAGE; #endif -#ifdef CONFIG_HAS_DATAFLASH - if ((strcmp(argv[2], "all") != 0) && (strcmp(argv[2], "bank") != 0)) { - addr_first = simple_strtoul(argv[2], NULL, 16); - addr_last = simple_strtoul(argv[3], NULL, 16); - - if (addr_dataflash(addr_first) && addr_dataflash(addr_last)) { - status = dataflash_real_protect(p,addr_first,addr_last); - if (status < 0){ - puts ("Bad DataFlash sector specification\n"); - return 1; - } - printf("%sProtect %d DataFlash Sectors\n", - p ? "" : "Un-", status); - return 0; - } - } -#endif - #ifdef CONFIG_MTD_NOR_FLASH if (strcmp(argv[2], "all") == 0) { for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) { @@ -190,10 +190,9 @@ static void del_gpt_info(void) static struct disk_part *allocate_disk_part(disk_partition_t *info, int partnum) { struct disk_part *newpart; - newpart = malloc(sizeof(*newpart)); + newpart = calloc(1, sizeof(struct disk_part)); if (!newpart) return ERR_PTR(-ENOMEM); - memset(newpart, '\0', sizeof(newpart)); newpart->gpt_part_info.start = info->start; newpart->gpt_part_info.size = info->size; @@ -403,7 +402,7 @@ static int set_gpt_info(struct blk_desc *dev_desc, if (!val) { #ifdef CONFIG_RANDOM_UUID *str_disk_guid = malloc(UUID_STR_LEN + 1); - if (str_disk_guid == NULL) + if (*str_disk_guid == NULL) return -ENOMEM; gen_rand_uuid_str(*str_disk_guid, UUID_STR_FORMAT_STD); #else @@ -634,6 +633,21 @@ static int do_disk_guid(struct blk_desc *dev_desc, char * const namestr) } #ifdef CONFIG_CMD_GPT_RENAME +/* + * There are 3 malloc() calls in set_gpt_info() and there is no info about which + * failed. + */ +static void set_gpt_cleanup(char **str_disk_guid, + disk_partition_t **partitions) +{ +#ifdef CONFIG_RANDOM_UUID + if (str_disk_guid) + free(str_disk_guid); +#endif + if (partitions) + free(partitions); +} + static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, char *name1, char *name2) { @@ -652,19 +666,27 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, ret = get_disk_guid(dev_desc, disk_guid); if (ret < 0) return ret; + /* + * Allocates disk_partitions, requiring matching call to del_gpt_info() + * if successful. + */ numparts = get_gpt_info(dev_desc); if (numparts <= 0) return numparts ? numparts : -ENODEV; partlistlen = calc_parts_list_len(numparts); partitions_list = malloc(partlistlen); - if (partitions_list == NULL) + if (!partitions_list) { + del_gpt_info(); return -ENOMEM; + } memset(partitions_list, '\0', partlistlen); ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list); - if (ret < 0) + if (ret < 0) { + free(partitions_list); return ret; + } /* * Uncomment the following line to print a string that 'gpt write' * or 'gpt verify' will accept as input. @@ -672,15 +694,23 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, debug("OLD partitions_list is %s with %u chars\n", partitions_list, (unsigned)strlen(partitions_list)); + /* set_gpt_info allocates new_partitions and str_disk_guid */ ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid, &new_partitions, &part_count); - if (ret < 0) - return ret; + if (ret < 0) { + del_gpt_info(); + free(partitions_list); + if (ret == -ENOMEM) + set_gpt_cleanup(&str_disk_guid, &new_partitions); + else + goto out; + } if (!strcmp(subcomm, "swap")) { if ((strlen(name1) > PART_NAME_LEN) || (strlen(name2) > PART_NAME_LEN)) { printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN); - return -EINVAL; + ret = -EINVAL; + goto out; } list_for_each(pos, &disk_partitions) { curr = list_entry(pos, struct disk_part, list); @@ -694,21 +724,24 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, } if ((ctr1 + ctr2 < 2) || (ctr1 != ctr2)) { printf("Cannot swap partition names except in pairs.\n"); - return -EINVAL; + ret = -EINVAL; + goto out; } } else { /* rename */ if (strlen(name2) > PART_NAME_LEN) { printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN); - return -EINVAL; + ret = -EINVAL; + goto out; } partnum = (int)simple_strtol(name1, NULL, 10); if ((partnum < 0) || (partnum > numparts)) { printf("Illegal partition number %s\n", name1); - return -EINVAL; + ret = -EINVAL; + goto out; } ret = part_get_info(dev_desc, partnum, new_partitions); if (ret < 0) - return ret; + goto out; /* U-Boot partition numbering starts at 1 */ list_for_each(pos, &disk_partitions) { @@ -723,33 +756,50 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm, ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list); if (ret < 0) - return ret; + goto out; debug("NEW partitions_list is %s with %u chars\n", partitions_list, (unsigned)strlen(partitions_list)); ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid, &new_partitions, &part_count); - if (ret < 0) - return ret; + /* + * Even though valid pointers are here passed into set_gpt_info(), + * it mallocs again, and there's no way to tell which failed. + */ + if (ret < 0) { + del_gpt_info(); + free(partitions_list); + if (ret == -ENOMEM) + set_gpt_cleanup(&str_disk_guid, &new_partitions); + else + goto out; + } debug("Writing new partition table\n"); ret = gpt_restore(dev_desc, disk_guid, new_partitions, numparts); if (ret < 0) { printf("Writing new partition table failed\n"); - return ret; + goto out; } debug("Reading back new partition table\n"); + /* + * Empty the existing disk_partitions list, as otherwise the memory in + * the original list is unreachable. + */ + del_gpt_info(); numparts = get_gpt_info(dev_desc); - if (numparts <= 0) - return numparts ? numparts : -ENODEV; + if (numparts <= 0) { + ret = numparts ? numparts : -ENODEV; + goto out; + } printf("new partition table with %d partitions is:\n", numparts); print_gpt_info(); - del_gpt_info(); - free(partitions_list); - free(str_disk_guid); + out: free(new_partitions); + free(str_disk_guid); + free(partitions_list); return ret; } #endif @@ -17,9 +17,6 @@ #include <cli.h> #include <command.h> #include <console.h> -#ifdef CONFIG_HAS_DATAFLASH -#include <dataflash.h> -#endif #include <hash.h> #include <inttypes.h> #include <mapmem.h> @@ -52,10 +49,8 @@ static ulong base_address = 0; #define DISP_LINE_LEN 16 static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - ulong addr, length; -#if defined(CONFIG_HAS_DATAFLASH) - ulong nbytes, linebytes; -#endif + ulong addr, length, bytes; + const void *buf; int size; int rc = 0; @@ -88,40 +83,13 @@ static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) length = simple_strtoul(argv[2], NULL, 16); } -#if defined(CONFIG_HAS_DATAFLASH) - /* Print the lines. - * - * We buffer all read data, so we can make sure data is read only - * once, and all accesses are with the specified bus width. - */ - nbytes = length * size; - do { - char linebuf[DISP_LINE_LEN]; - void* p; - linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes; - - rc = read_dataflash(addr, (linebytes/size)*size, linebuf); - p = (rc == DATAFLASH_OK) ? linebuf : (void*)addr; - print_buffer(addr, p, size, linebytes/size, DISP_LINE_LEN/size); - - nbytes -= linebytes; - addr += linebytes; - if (ctrlc()) { - rc = 1; - break; - } - } while (nbytes > 0); -#else - { - ulong bytes = size * length; - const void *buf = map_sysmem(addr, bytes); + bytes = size * length; + buf = map_sysmem(addr, bytes); - /* Print the lines. */ - print_buffer(addr, buf, size, length, DISP_LINE_LEN / size); - addr += bytes; - unmap_sysmem(buf); - } -#endif + /* Print the lines. */ + print_buffer(addr, buf, size, length, DISP_LINE_LEN / size); + addr += bytes; + unmap_sysmem(buf); dp_last_addr = addr; dp_last_length = length; @@ -286,13 +254,6 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) count = simple_strtoul(argv[3], NULL, 16); -#ifdef CONFIG_HAS_DATAFLASH - if (addr_dataflash(addr1) | addr_dataflash(addr2)){ - puts ("Comparison with DataFlash space not supported.\n\r"); - return 0; - } -#endif - bytes = size * count; base = buf1 = map_sysmem(addr1, bytes); buf2 = map_sysmem(addr2, bytes); @@ -370,11 +331,7 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_MTD_NOR_FLASH /* check if we are copying to Flash */ - if ( (addr2info(dest) != NULL) -#ifdef CONFIG_HAS_DATAFLASH - && (!addr_dataflash(dest)) -#endif - ) { + if (addr2info(dest) != NULL) { int rc; puts ("Copy to Flash... "); @@ -389,44 +346,6 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } #endif -#ifdef CONFIG_HAS_DATAFLASH - /* Check if we are copying from RAM or Flash to DataFlash */ - if (addr_dataflash(dest) && !addr_dataflash(addr)){ - int rc; - - puts ("Copy to DataFlash... "); - - rc = write_dataflash (dest, addr, count*size); - - if (rc != 1) { - dataflash_perror (rc); - return (1); - } - puts ("done\n"); - return 0; - } - - /* Check if we are copying from DataFlash to RAM */ - if (addr_dataflash(addr) && !addr_dataflash(dest) -#ifdef CONFIG_MTD_NOR_FLASH - && (addr2info(dest) == NULL) -#endif - ){ - int rc; - rc = read_dataflash(addr, count * size, (char *) dest); - if (rc != 1) { - dataflash_perror (rc); - return (1); - } - return 0; - } - - if (addr_dataflash(addr) && addr_dataflash(dest)){ - puts ("Unsupported combination of source/destination.\n\r"); - return 1; - } -#endif - memcpy((void *)dest, (void *)addr, count * size); return 0; @@ -1072,13 +991,6 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) addr += base_address; } -#ifdef CONFIG_HAS_DATAFLASH - if (addr_dataflash(addr)){ - puts ("Can't modify DataFlash in place. Use cp instead.\n\r"); - return 0; - } -#endif - /* Print the address, followed by value. Then accept input for * the next value. A non-converted value exits. */ diff --git a/cmd/nvedit.c b/cmd/nvedit.c index 4033d90c8e..4e79d03856 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -42,7 +42,6 @@ DECLARE_GLOBAL_DATA_PTR; #if !defined(CONFIG_ENV_IS_IN_EEPROM) && \ !defined(CONFIG_ENV_IS_IN_FLASH) && \ - !defined(CONFIG_ENV_IS_IN_DATAFLASH) && \ !defined(CONFIG_ENV_IS_IN_MMC) && \ !defined(CONFIG_ENV_IS_IN_FAT) && \ !defined(CONFIG_ENV_IS_IN_EXT4) && \ @@ -54,7 +53,7 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CONFIG_ENV_IS_IN_REMOTE) && \ !defined(CONFIG_ENV_IS_IN_UBI) && \ !defined(CONFIG_ENV_IS_NOWHERE) -# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|MMC|FAT|EXT4|\ +# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|MMC|FAT|EXT4|\ NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE #endif @@ -393,15 +392,18 @@ int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) sprintf(message, "Please enter '%s': ", argv[1]); } else { /* env_ask envname message1 ... messagen [size] */ - for (i = 2, pos = 0; i < argc; i++) { + for (i = 2, pos = 0; i < argc && pos+1 < sizeof(message); i++) { if (pos) message[pos++] = ' '; - strcpy(message + pos, argv[i]); + strncpy(message + pos, argv[i], sizeof(message) - pos); pos += strlen(argv[i]); } - message[pos++] = ' '; - message[pos] = '\0'; + if (pos < sizeof(message) - 1) { + message[pos++] = ' '; + message[pos] = '\0'; + } else + message[CONFIG_SYS_CBSIZE - 1] = '\0'; } if (size >= CONFIG_SYS_CBSIZE) @@ -927,7 +929,7 @@ NXTARG: ; H_MATCH_KEY | H_MATCH_IDENT, &ptr, size, argc, argv); if (len < 0) { - error("Cannot export environment: errno = %d\n", errno); + pr_err("Cannot export environment: errno = %d\n", errno); return 1; } sprintf(buf, "%zX", (size_t)len); @@ -947,7 +949,7 @@ NXTARG: ; H_MATCH_KEY | H_MATCH_IDENT, &res, ENV_SIZE, argc, argv); if (len < 0) { - error("Cannot export environment: errno = %d\n", errno); + pr_err("Cannot export environment: errno = %d\n", errno); return 1; } @@ -1082,7 +1084,7 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag, if (himport_r(&env_htab, ptr, size, sep, del ? 0 : H_NOCLEAR, crlf_is_lf, 0, NULL) == 0) { - error("Environment import failed: errno = %d\n", errno); + pr_err("Environment import failed: errno = %d\n", errno); return 1; } gd->flags |= GD_FLG_ENV_READY; @@ -616,7 +616,7 @@ static int label_localboot(struct pxe_label *label) static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) { char *bootm_argv[] = { "bootm", NULL, NULL, NULL, NULL }; - char initrd_str[22]; + char initrd_str[28]; char mac_str[29] = ""; char ip_str[68] = ""; int bootm_argc = 2; @@ -648,9 +648,9 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) } bootm_argv[2] = initrd_str; - strcpy(bootm_argv[2], env_get("ramdisk_addr_r")); + strncpy(bootm_argv[2], env_get("ramdisk_addr_r"), 18); strcat(bootm_argv[2], ":"); - strcat(bootm_argv[2], env_get("filesize")); + strncat(bootm_argv[2], env_get("filesize"), 9); } if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) { @@ -686,16 +686,17 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) strlen(ip_str), strlen(mac_str), sizeof(bootargs)); return 1; + } else { + if (label->append) + strncpy(bootargs, label->append, + sizeof(bootargs)); + strcat(bootargs, ip_str); + strcat(bootargs, mac_str); + + cli_simple_process_macros(bootargs, finalbootargs); + env_set("bootargs", finalbootargs); + printf("append: %s\n", finalbootargs); } - - if (label->append) - strcpy(bootargs, label->append); - strcat(bootargs, ip_str); - strcat(bootargs, mac_str); - - cli_simple_process_macros(bootargs, finalbootargs); - env_set("bootargs", finalbootargs); - printf("append: %s\n", finalbootargs); } bootm_argv[1] = env_get("kernel_addr_r"); diff --git a/cmd/regulator.c b/cmd/regulator.c index 2ef5bc9a82..b605255180 100644 --- a/cmd/regulator.c +++ b/cmd/regulator.c @@ -71,7 +71,7 @@ static int curr_dev_and_platdata(struct udevice **devp, *uc_pdata = dev_get_uclass_platdata(*devp); if (!*uc_pdata) { - error("Regulator: %s - missing platform data!", currdev->name); + pr_err("Regulator: %s - missing platform data!", currdev->name); return CMD_RET_FAILURE; } @@ -121,9 +121,11 @@ static int spl_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) (void *)images.ft_addr); env_set_addr("fdtargsaddr", images.ft_addr); env_set_hex("fdtargslen", fdt_totalsize(images.ft_addr)); +#ifdef CONFIG_CMD_SPL_WRITE_SIZE if (fdt_totalsize(images.ft_addr) > CONFIG_CMD_SPL_WRITE_SIZE) puts("WARN: FDT size > CMD_SPL_WRITE_SIZE\n"); +#endif break; #endif case SPL_EXPORT_ATAGS: diff --git a/cmd/thordown.c b/cmd/thordown.c index 436b7f5631..1bb5fc2ec2 100644 --- a/cmd/thordown.c +++ b/cmd/thordown.c @@ -33,7 +33,7 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int controller_index = simple_strtoul(usb_controller, NULL, 0); ret = board_usb_init(controller_index, USB_INIT_DEVICE); if (ret) { - error("USB init failed: %d", ret); + pr_err("USB init failed: %d", ret); ret = CMD_RET_FAILURE; goto exit; } @@ -42,14 +42,14 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ret = thor_init(); if (ret) { - error("THOR DOWNLOAD failed: %d", ret); + pr_err("THOR DOWNLOAD failed: %d", ret); ret = CMD_RET_FAILURE; goto exit; } ret = thor_handle(); if (ret) { - error("THOR failed: %d", ret); + pr_err("THOR failed: %d", ret); ret = CMD_RET_FAILURE; goto exit; } diff --git a/cmd/time.c b/cmd/time.c index de57e3b9dd..2cd8b1a577 100644 --- a/cmd/time.c +++ b/cmd/time.c @@ -28,7 +28,7 @@ static int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { ulong cycles = 0; int retval = 0; - int repeatable; + int repeatable = 0; if (argc == 1) return CMD_RET_USAGE; diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c index 3306405948..37ad2ff33d 100644 --- a/cmd/tpm_test.c +++ b/cmd/tpm_test.c @@ -303,12 +303,12 @@ static int test_readonly(void) index_0 += 1; if (tpm_nv_write_value(INDEX0, (uint8_t *)&index_0, sizeof(index_0) != TPM_SUCCESS)) { - error("\tcould not write index 0\n"); + pr_err("\tcould not write index 0\n"); } tpm_nv_write_value_lock(INDEX0); if (tpm_nv_write_value(INDEX0, (uint8_t *)&index_0, sizeof(index_0)) == TPM_SUCCESS) - error("\tindex 0 is not locked\n"); + pr_err("\tindex 0 is not locked\n"); printf("\tdone\n"); return 0; @@ -471,7 +471,7 @@ static int test_write_limit(void) case TPM_MAXNVWRITES: assert(i >= TPM_MAX_NV_WRITES_NOOWNER); default: - error("\tunexpected error code %d (0x%x)\n", + pr_err("\tunexpected error code %d (0x%x)\n", result, result); } } diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c index b1d8b2858e..ae4d73c125 100644 --- a/cmd/usb_gadget_sdp.c +++ b/cmd/usb_gadget_sdp.c @@ -28,13 +28,13 @@ static int do_sdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) ret = sdp_init(controller_index); if (ret) { - error("SDP init failed: %d", ret); + pr_err("SDP init failed: %d", ret); goto exit; } /* This command typically does not return but jumps to an image */ sdp_handle(controller_index); - error("SDP ended"); + pr_err("SDP ended"); exit: g_dnl_unregister(); diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c index 3353f95c74..cfeecb7068 100644 --- a/cmd/usb_mass_storage.c +++ b/cmd/usb_mass_storage.c @@ -162,21 +162,21 @@ static int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag, controller_index = (unsigned int)(simple_strtoul( usb_controller, NULL, 0)); if (board_usb_init(controller_index, USB_INIT_DEVICE)) { - error("Couldn't init USB controller."); + pr_err("Couldn't init USB controller."); rc = CMD_RET_FAILURE; goto cleanup_ums_init; } rc = fsg_init(ums, ums_count); if (rc) { - error("fsg_init failed"); + pr_err("fsg_init failed"); rc = CMD_RET_FAILURE; goto cleanup_board; } rc = g_dnl_register("usb_dnl_ums"); if (rc) { - error("g_dnl_register failed"); + pr_err("g_dnl_register failed"); rc = CMD_RET_FAILURE; goto cleanup_board; } diff --git a/common/Kconfig b/common/Kconfig index 540cc9999b..f96a25f582 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -241,6 +241,27 @@ config IDENT_STRING help This options adds the board specific name to u-boot version. +config LOGLEVEL + int "loglevel" + default 4 + range 0 8 + help + All Messages with a loglevel smaller than the console loglevel will + be compiled in. The loglevels are defined as follows: + + 0 (KERN_EMERG) system is unusable + 1 (KERN_ALERT) action must be taken immediately + 2 (KERN_CRIT) critical conditions + 3 (KERN_ERR) error conditions + 4 (KERN_WARNING) warning conditions + 5 (KERN_NOTICE) normal but significant condition + 6 (KERN_INFO) informational + 7 (KERN_DEBUG) debug-level messages + +config SPL_LOGLEVEL + int + default LOGLEVEL + config SILENT_CONSOLE bool "Support a silent console" help @@ -382,22 +403,6 @@ config SYS_STDIO_DEREGISTER endmenu -config DTB_RESELECT - bool "Support swapping dtbs at a later point in boot" - depends on FIT_EMBED - help - It is possible during initial boot you may need to use a generic - dtb until you can fully determine the board your running on. This - config allows boards to implement a function at a later point - during boot to switch to the "correct" dtb. - -config FIT_EMBED - bool "Support a FIT image embedded in the U-boot image" - help - This option provides hooks to allow U-boot to parse an - appended FIT image and enable board specific code to then select - the correct DTB to be used. - config DEFAULT_FDT_FILE string "Default fdt file" help diff --git a/common/Makefile b/common/Makefile index 801ea3191f..cec506fe3e 100644 --- a/common/Makefile +++ b/common/Makefile @@ -103,7 +103,7 @@ obj-y += image.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o -obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o +obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o obj-$(CONFIG_IO_TRACE) += iotrace.o obj-y += memsize.o diff --git a/common/board_r.c b/common/board_r.c index 94697e7bc1..a3b9bfb8ee 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -18,9 +18,6 @@ #endif #include <command.h> #include <console.h> -#ifdef CONFIG_HAS_DATAFLASH -#include <dataflash.h> -#endif #include <dm.h> #include <environment.h> #include <fdtdec.h> @@ -447,15 +444,6 @@ static int initr_mmc(void) } #endif -#ifdef CONFIG_HAS_DATAFLASH -static int initr_dataflash(void) -{ - AT91F_DataflashInit(); - dataflash_print_info(); - return 0; -} -#endif - /* * Tell if it's OK to load the environment early in boot. * @@ -803,9 +791,6 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_MMC initr_mmc, #endif -#ifdef CONFIG_HAS_DATAFLASH - initr_dataflash, -#endif initr_env, #ifdef CONFIG_SYS_BOOTPARAMS_LEN initr_malloc_bootparams, diff --git a/common/boot_fit.c b/common/boot_fit.c index 0a723150b5..add65c4bae 100644 --- a/common/boot_fit.c +++ b/common/boot_fit.c @@ -13,7 +13,7 @@ #include <image.h> #include <libfdt.h> -int fdt_offset(void *fit) +static int fdt_offset(const void *fit) { int images, node, fdt_len, fdt_node, fdt_offset; const char *fdt_name; @@ -55,7 +55,7 @@ int fdt_offset(void *fit) return fdt_offset; } -void *locate_dtb_in_fit(void *fit) +void *locate_dtb_in_fit(const void *fit) { struct image_header *header; int size; @@ -73,7 +73,7 @@ void *locate_dtb_in_fit(void *fit) ret = fdt_offset(fit); - if (ret <= 0) + if (ret < 0) return NULL; else return (void *)fit+size+ret; diff --git a/common/bootm.c b/common/bootm.c index 32b3ea8e2d..9493a306cd 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -810,9 +810,6 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc, bootstage_mark(BOOTSTAGE_ID_CHECK_MAGIC); - /* copy from dataflash if needed */ - img_addr = genimg_get_image(img_addr); - /* check image type, for FIT images get FIT kernel node */ *os_data = *os_len = 0; buf = map_sysmem(img_addr, 0); diff --git a/common/common_fit.c b/common/common_fit.c index 5f5f3f9a44..85b33d8c3b 100644 --- a/common/common_fit.c +++ b/common/common_fit.c @@ -32,6 +32,9 @@ int fit_find_config_node(const void *fdt) { const char *name; int conf, node, len; + const char *dflt_conf_name; + const char *dflt_conf_desc = NULL; + int dflt_conf_node = -ENOENT; conf = fdt_path_offset(fdt, FIT_CONFS_PATH); if (conf < 0) { @@ -39,6 +42,9 @@ int fit_find_config_node(const void *fdt) conf); return -EINVAL; } + + dflt_conf_name = fdt_getprop(fdt, conf, "default", &len); + for (node = fdt_first_subnode(fdt, conf); node >= 0; node = fdt_next_subnode(fdt, node)) { @@ -50,6 +56,15 @@ int fit_find_config_node(const void *fdt) #endif return -EINVAL; } + + if (dflt_conf_name) { + const char *node_name = fdt_get_name(fdt, node, NULL); + if (strcmp(dflt_conf_name, node_name) == 0) { + dflt_conf_node = node; + dflt_conf_desc = name; + } + } + if (board_fit_config_name_match(name)) continue; @@ -58,5 +73,10 @@ int fit_find_config_node(const void *fdt) return node; } + if (dflt_conf_node != -ENOENT) { + debug("Selecting default config '%s'", dflt_conf_desc); + return dflt_conf_node; + } + return -ENOENT; } diff --git a/common/dfu.c b/common/dfu.c index 546a1ab9b4..07dff317a6 100644 --- a/common/dfu.c +++ b/common/dfu.c @@ -26,13 +26,13 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget) ret = board_usb_init(usbctrl_index, USB_INIT_DEVICE); if (ret) { - error("board usb init failed\n"); + pr_err("board usb init failed\n"); return CMD_RET_FAILURE; } g_dnl_clear_detach(); ret = g_dnl_register(usb_dnl_gadget); if (ret) { - error("g_dnl_register failed"); + pr_err("g_dnl_register failed"); return CMD_RET_FAILURE; } @@ -75,7 +75,7 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget) ret = dfu_flush(dfu_get_defer_flush(), NULL, 0, 0); dfu_set_defer_flush(NULL); if (ret) { - error("Deferred dfu_flush() failed!"); + pr_err("Deferred dfu_flush() failed!"); goto exit; } } diff --git a/common/fb_mmc.c b/common/fb_mmc.c index 26d60b88d0..cf5b77ca28 100644 --- a/common/fb_mmc.c +++ b/common/fb_mmc.c @@ -84,7 +84,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info, blkcnt = lldiv(blkcnt, info->blksz); if (blkcnt > info->size) { - error("too large for partition: '%s'\n", part_name); + pr_err("too large for partition: '%s'\n", part_name); fastboot_fail("too large for partition"); return; } @@ -93,7 +93,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info, blks = blk_dwrite(dev_desc, info->start, blkcnt, buffer); if (blks != blkcnt) { - error("failed writing to device %d\n", dev_desc->devnum); + pr_err("failed writing to device %d\n", dev_desc->devnum); fastboot_fail("failed writing to device"); return; } @@ -125,7 +125,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc, sector_size = info->blksz; hdr_sectors = DIV_ROUND_UP(sizeof(struct andr_img_hdr), sector_size); if (hdr_sectors == 0) { - error("invalid number of boot sectors: 0"); + pr_err("invalid number of boot sectors: 0"); fastboot_fail("invalid number of boot sectors: 0"); return 0; } @@ -133,7 +133,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc, /* Read the boot image header */ res = blk_dread(dev_desc, info->start, hdr_sectors, (void *)hdr); if (res != hdr_sectors) { - error("cannot read header from boot partition"); + pr_err("cannot read header from boot partition"); fastboot_fail("cannot read header from boot partition"); return 0; } @@ -141,7 +141,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc, /* Check boot header magic string */ res = android_image_check_header(hdr); if (res != 0) { - error("bad boot image magic"); + pr_err("bad boot image magic"); fastboot_fail("boot partition not initialized"); return 0; } @@ -179,7 +179,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, /* Get boot partition info */ res = part_get_info_by_name(dev_desc, BOOT_PARTITION_NAME, &info); if (res < 0) { - error("cannot find boot partition"); + pr_err("cannot find boot partition"); fastboot_fail("cannot find boot partition"); return -1; } @@ -191,14 +191,14 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, /* Read boot image header */ hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr); if (hdr_sectors == 0) { - error("unable to read boot image header"); + pr_err("unable to read boot image header"); fastboot_fail("unable to read boot image header"); return -1; } /* Check if boot image has second stage in it (we don't support it) */ if (hdr->second_size > 0) { - error("moving second stage is not supported yet"); + pr_err("moving second stage is not supported yet"); fastboot_fail("moving second stage is not supported yet"); return -1; } @@ -216,7 +216,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, res = blk_dread(dev_desc, ramdisk_sector_start, ramdisk_sectors, ramdisk_buffer); if (res != ramdisk_sectors) { - error("cannot read ramdisk from boot partition"); + pr_err("cannot read ramdisk from boot partition"); fastboot_fail("cannot read ramdisk from boot partition"); return -1; } @@ -225,7 +225,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, hdr->kernel_size = download_bytes; res = blk_dwrite(dev_desc, info.start, hdr_sectors, (void *)hdr); if (res == 0) { - error("cannot writeback boot image header"); + pr_err("cannot writeback boot image header"); fastboot_fail("cannot write back boot image header"); return -1; } @@ -237,7 +237,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, res = blk_dwrite(dev_desc, kernel_sector_start, kernel_sectors, download_buffer); if (res == 0) { - error("cannot write new kernel"); + pr_err("cannot write new kernel"); fastboot_fail("cannot write new kernel"); return -1; } @@ -249,7 +249,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, res = blk_dwrite(dev_desc, ramdisk_sector_start, ramdisk_sectors, ramdisk_buffer); if (res == 0) { - error("cannot write back original ramdisk"); + pr_err("cannot write back original ramdisk"); fastboot_fail("cannot write back original ramdisk"); return -1; } @@ -268,7 +268,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer, dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { - error("invalid mmc device\n"); + pr_err("invalid mmc device\n"); fastboot_fail("invalid mmc device"); return; } @@ -322,7 +322,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer, #endif if (part_get_info_by_name_or_alias(dev_desc, cmd, &info) < 0) { - error("cannot find partition: '%s'\n", cmd); + pr_err("cannot find partition: '%s'\n", cmd); fastboot_fail("cannot find partition"); return; } @@ -360,21 +360,21 @@ void fb_mmc_erase(const char *cmd) struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV); if (mmc == NULL) { - error("invalid mmc device"); + pr_err("invalid mmc device"); fastboot_fail("invalid mmc device"); return; } dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { - error("invalid mmc device"); + pr_err("invalid mmc device"); fastboot_fail("invalid mmc device"); return; } ret = part_get_info_by_name_or_alias(dev_desc, cmd, &info); if (ret < 0) { - error("cannot find partition: '%s'", cmd); + pr_err("cannot find partition: '%s'", cmd); fastboot_fail("cannot find partition"); return; } @@ -393,7 +393,7 @@ void fb_mmc_erase(const char *cmd) blks = blk_derase(dev_desc, blks_start, blks_size); if (blks != blks_size) { - error("failed erasing from device %d", dev_desc->devnum); + pr_err("failed erasing from device %d", dev_desc->devnum); fastboot_fail("failed erasing from device"); return; } diff --git a/common/fb_nand.c b/common/fb_nand.c index 3d027d4375..aa28046cbd 100644 --- a/common/fb_nand.c +++ b/common/fb_nand.c @@ -40,20 +40,20 @@ static int fb_nand_lookup(const char *partname, ret = mtdparts_init(); if (ret) { - error("Cannot initialize MTD partitions\n"); + pr_err("Cannot initialize MTD partitions\n"); fastboot_fail("cannot init mtdparts"); return ret; } ret = find_dev_and_part(partname, &dev, &pnum, part); if (ret) { - error("cannot find partition: '%s'", partname); + pr_err("cannot find partition: '%s'", partname); fastboot_fail("cannot find partition"); return ret; } if (dev->id->type != MTD_DEV_TYPE_NAND) { - error("partition '%s' is not stored on a NAND device", + pr_err("partition '%s' is not stored on a NAND device", partname); fastboot_fail("not a NAND device"); return -EINVAL; @@ -154,7 +154,7 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer, ret = fb_nand_lookup(cmd, &mtd, &part); if (ret) { - error("invalid NAND device"); + pr_err("invalid NAND device"); fastboot_fail("invalid NAND device"); return; } @@ -209,7 +209,7 @@ void fb_nand_erase(const char *cmd) ret = fb_nand_lookup(cmd, &mtd, &part); if (ret) { - error("invalid NAND device"); + pr_err("invalid NAND device"); fastboot_fail("invalid NAND device"); return; } @@ -220,7 +220,7 @@ void fb_nand_erase(const char *cmd) ret = _fb_nand_erase(mtd, part); if (ret) { - error("failed erasing from device %s", mtd->name); + pr_err("failed erasing from device %s", mtd->name); fastboot_fail("failed erasing from device"); return; } diff --git a/common/image-fdt.c b/common/image-fdt.c index a2ef409836..1e946467e3 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -294,9 +294,6 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch, debug("## Checking for 'FDT'/'FDT Image' at %08lx\n", fdt_addr); - /* copy from dataflash if needed */ - fdt_addr = genimg_get_image(fdt_addr); - /* * Check if there is an FDT image at the * address provided in the second bootm argument diff --git a/common/image.c b/common/image.c index 332b5f2843..06fdca129c 100644 --- a/common/image.c +++ b/common/image.c @@ -15,10 +15,6 @@ #include <status_led.h> #endif -#ifdef CONFIG_HAS_DATAFLASH -#include <dataflash.h> -#endif - #ifdef CONFIG_LOGBUFFER #include <logbuff.h> #endif @@ -389,9 +385,6 @@ void image_print_contents(const void *ptr) * flag. Verification done covers data and header integrity and os/type/arch * fields checking. * - * If dataflash support is enabled routine checks for dataflash addresses - * and handles required dataflash reads. - * * returns: * pointer to a ramdisk image header, if image was found and valid * otherwise, return NULL @@ -890,81 +883,6 @@ int genimg_get_format(const void *img_addr) } /** - * genimg_get_image - get image from special storage (if necessary) - * @img_addr: image start address - * - * genimg_get_image() checks if provided image start address is located - * in a dataflash storage. If so, image is moved to a system RAM memory. - * - * returns: - * image start address after possible relocation from special storage - */ -ulong genimg_get_image(ulong img_addr) -{ - ulong ram_addr = img_addr; - -#ifdef CONFIG_HAS_DATAFLASH - ulong h_size, d_size; - - if (addr_dataflash(img_addr)) { - void *buf; - - /* ger RAM address */ - ram_addr = CONFIG_SYS_LOAD_ADDR; - - /* get header size */ - h_size = image_get_header_size(); -#if IMAGE_ENABLE_FIT - if (sizeof(struct fdt_header) > h_size) - h_size = sizeof(struct fdt_header); -#endif - - /* read in header */ - debug(" Reading image header from dataflash address " - "%08lx to RAM address %08lx\n", img_addr, ram_addr); - - buf = map_sysmem(ram_addr, 0); - read_dataflash(img_addr, h_size, buf); - - /* get data size */ - switch (genimg_get_format(buf)) { -#if defined(CONFIG_IMAGE_FORMAT_LEGACY) - case IMAGE_FORMAT_LEGACY: - d_size = image_get_data_size(buf); - debug(" Legacy format image found at 0x%08lx, " - "size 0x%08lx\n", - ram_addr, d_size); - break; -#endif -#if IMAGE_ENABLE_FIT - case IMAGE_FORMAT_FIT: - d_size = fit_get_size(buf) - h_size; - debug(" FIT/FDT format image found at 0x%08lx, " - "size 0x%08lx\n", - ram_addr, d_size); - break; -#endif - default: - printf(" No valid image found at 0x%08lx\n", - img_addr); - return ram_addr; - } - - /* read in image data */ - debug(" Reading image remaining data from dataflash address " - "%08lx to RAM address %08lx\n", img_addr + h_size, - ram_addr + h_size); - - read_dataflash(img_addr + h_size, d_size, - (char *)(buf + h_size)); - - } -#endif /* CONFIG_HAS_DATAFLASH */ - - return ram_addr; -} - -/** * fit_has_config - check if there is a valid FIT configuration * @images: pointer to the bootm command headers structure * @@ -1096,9 +1014,6 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images, } #endif - /* copy from dataflash if needed */ - rd_addr = genimg_get_image(rd_addr); - /* * Check if there is an initrd image at the * address provided in the second bootm argument @@ -1330,10 +1245,8 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images, /* * Obtain the os FIT header from the images struct - * copy from dataflash if needed */ tmp_img_addr = map_to_sysmem(images->fit_hdr_os); - tmp_img_addr = genimg_get_image(tmp_img_addr); buf = map_sysmem(tmp_img_addr, 0); /* * Check image type. For FIT images get FIT node @@ -1442,10 +1355,8 @@ int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images, /* * Obtain the os FIT header from the images struct - * copy from dataflash if needed */ tmp_img_addr = map_to_sysmem(images->fit_hdr_os); - tmp_img_addr = genimg_get_image(tmp_img_addr); buf = map_sysmem(tmp_img_addr, 0); /* * Check image type. For FIT images get FIT node diff --git a/common/spl/Kconfig b/common/spl/Kconfig index b05ec21ed6..0bd8370337 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -94,6 +94,7 @@ config SPL_STACK_R config SPL_STACK_R_ADDR depends on SPL_STACK_R hex "SDRAM location for SPL stack" + default 0x82000000 if ARCH_OMAP2PLUS help Specify the address in SDRAM for the SPL stack. This will be set up before board_init_r() is called. diff --git a/common/spl/spl.c b/common/spl/spl.c index 4afbe97fc1..aaddddd995 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -258,6 +258,12 @@ static int spl_common_init(bool setup_malloc) return 0; } +void spl_set_bd(void) +{ + if (!gd->bd) + gd->bd = &bdata; +} + int spl_early_init(void) { int ret; @@ -365,7 +371,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2) struct spl_image_info spl_image; debug(">>spl:board_init_r()\n"); - gd->bd = &bdata; + + spl_set_bd(); + #ifdef CONFIG_SPL_OS_BOOT dram_init_banksize(); #endif diff --git a/common/spl/spl_dfu.c b/common/spl/spl_dfu.c index 2c974735b1..05bb21035d 100644 --- a/common/spl/spl_dfu.c +++ b/common/spl/spl_dfu.c @@ -42,13 +42,13 @@ int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr) set_default_env(0); str_env = env_get(dfu_alt_info); if (!str_env) { - error("\"dfu_alt_info\" env variable not defined!\n"); + pr_err("\"dfu_alt_info\" env variable not defined!\n"); return -EINVAL; } ret = env_set("dfu_alt_info", str_env); if (ret) { - error("unable to set env variable \"dfu_alt_info\"!\n"); + pr_err("unable to set env variable \"dfu_alt_info\"!\n"); return -EINVAL; } diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index b2cccc6c6e..b57e0b04e4 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -52,8 +52,9 @@ static ulong h_spl_load_read(struct spl_load_info *load, ulong sector, return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf); } -static int mmc_load_image_raw_sector(struct spl_image_info *spl_image, - struct mmc *mmc, unsigned long sector) +static __maybe_unused +int mmc_load_image_raw_sector(struct spl_image_info *spl_image, + struct mmc *mmc, unsigned long sector) { unsigned long count; struct image_header *header; diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c index 350bcdb056..333d518f4d 100644 --- a/common/spl/spl_sdp.c +++ b/common/spl/spl_sdp.c @@ -24,13 +24,13 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image, ret = sdp_init(controller_index); if (ret) { - error("SDP init failed: %d", ret); + pr_err("SDP init failed: %d", ret); return -ENODEV; } /* This command typically does not return but jumps to an image */ sdp_handle(controller_index); - error("SDP ended"); + pr_err("SDP ended"); return -EINVAL; } diff --git a/common/update.c b/common/update.c index 974f4655e7..33bffaa89e 100644 --- a/common/update.c +++ b/common/update.c @@ -242,7 +242,7 @@ int update_tftp(ulong addr, char *interface, char *devstring) } else if (interface && devstring) { update_tftp_dfu = true; } else { - error("Interface: %s and devstring: %s not supported!\n", + pr_err("Interface: %s and devstring: %s not supported!\n", interface, devstring); return -EINVAL; } diff --git a/common/usb.c b/common/usb.c index 0904259757..8d27bc7060 100644 --- a/common/usb.c +++ b/common/usb.c @@ -437,12 +437,13 @@ static int usb_parse_config(struct usb_device *dev, } break; case USB_DT_ENDPOINT: - if (head->bLength != USB_DT_ENDPOINT_SIZE) { + if (head->bLength != USB_DT_ENDPOINT_SIZE && + head->bLength != USB_DT_ENDPOINT_AUDIO_SIZE) { printf("ERROR: Invalid USB EP length (%d)\n", head->bLength); break; } - if (index + USB_DT_ENDPOINT_SIZE > + if (index + head->bLength > dev->config.desc.wTotalLength) { puts("USB EP descriptor overflowed buffer!\n"); break; @@ -969,23 +970,24 @@ static int usb_setup_descriptor(struct usb_device *dev, bool do_read) dev->epmaxpacketin[0] = dev->descriptor.bMaxPacketSize0; dev->epmaxpacketout[0] = dev->descriptor.bMaxPacketSize0; - if (do_read) { + if (do_read && dev->speed == USB_SPEED_FULL) { int err; /* - * Validate we've received only at least 8 bytes, not that we've - * received the entire descriptor. The reasoning is: - * - The code only uses fields in the first 8 bytes, so that's all we - * need to have fetched at this stage. - * - The smallest maxpacket size is 8 bytes. Before we know the actual - * maxpacket the device uses, the USB controller may only accept a - * single packet. Consequently we are only guaranteed to receive 1 - * packet (at least 8 bytes) even in a non-error case. + * Validate we've received only at least 8 bytes, not that + * we've received the entire descriptor. The reasoning is: + * - The code only uses fields in the first 8 bytes, so + * that's all we need to have fetched at this stage. + * - The smallest maxpacket size is 8 bytes. Before we know + * the actual maxpacket the device uses, the USB controller + * may only accept a single packet. Consequently we are only + * guaranteed to receive 1 packet (at least 8 bytes) even in + * a non-error case. * - * At least the DWC2 controller needs to be programmed with the number - * of packets in addition to the number of bytes. A request for 64 - * bytes of data with the maxpacket guessed as 64 (above) yields a - * request for 1 packet. + * At least the DWC2 controller needs to be programmed with + * the number of packets in addition to the number of bytes. + * A request for 64 bytes of data with the maxpacket guessed + * as 64 (above) yields a request for 1 packet. */ err = get_descriptor_len(dev, 64, 8); if (err) @@ -1008,7 +1010,7 @@ static int usb_setup_descriptor(struct usb_device *dev, bool do_read) dev->maxpacketsize = PACKET_SIZE_64; break; default: - printf("usb_new_device: invalid max packet size\n"); + printf("%s: invalid max packet size\n", __func__); return -EIO; } @@ -1050,6 +1052,17 @@ static int usb_prepare_device(struct usb_device *dev, int addr, bool do_read, mdelay(10); /* Let the SET_ADDRESS settle */ + /* + * If we haven't read device descriptor before, read it here + * after device is assigned an address. This is only applicable + * to xHCI so far. + */ + if (!do_read) { + err = usb_setup_descriptor(dev, true); + if (err) + return err; + } + return 0; } diff --git a/common/usb_hub.c b/common/usb_hub.c index 86a3477664..325d16dfc8 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -489,6 +489,17 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) return 0; } + if (portchange & USB_PORT_STAT_C_RESET) { + debug("port %d reset change\n", i + 1); + usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET); + } + + if ((portchange & USB_SS_PORT_STAT_C_BH_RESET) && + usb_hub_is_superspeed(dev)) { + debug("port %d BH reset change\n", i + 1); + usb_clear_port_feature(dev, i + 1, USB_SS_PORT_FEAT_C_BH_RESET); + } + /* A new USB device is ready at this point */ debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1); @@ -543,11 +554,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) hub->overcurrent_count[i]); } - if (portchange & USB_PORT_STAT_C_RESET) { - debug("port %d reset change\n", i + 1); - usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET); - } - /* * We're done with this device, so let's remove this device from * scanning list diff --git a/common/usb_storage.c b/common/usb_storage.c index df0b057308..a91b1c0d2f 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -98,19 +98,9 @@ struct us_data { struct scsi_cmd *srb; /* current srb */ trans_reset transport_reset; /* reset routine */ trans_cmnd transport; /* transport routine */ + unsigned short max_xfer_blk; /* maximum transfer blocks */ }; -#ifdef CONFIG_USB_EHCI_HCD -/* - * The U-Boot EHCI driver can handle any transfer length as long as there is - * enough free heap space left, but the SCSI READ(10) and WRITE(10) commands are - * limited to 65535 blocks. - */ -#define USB_MAX_XFER_BLK 65535 -#else -#define USB_MAX_XFER_BLK 20 -#endif - #ifndef CONFIG_BLK static struct us_data usb_stor[USB_MAX_STOR_DEV]; #endif @@ -949,6 +939,38 @@ do_retry: return USB_STOR_TRANSPORT_FAILED; } +static void usb_stor_set_max_xfer_blk(struct usb_device *udev, + struct us_data *us) +{ + unsigned short blk; + size_t __maybe_unused size; + int __maybe_unused ret; + +#ifndef CONFIG_DM_USB +#ifdef CONFIG_USB_EHCI_HCD + /* + * The U-Boot EHCI driver can handle any transfer length as long as + * there is enough free heap space left, but the SCSI READ(10) and + * WRITE(10) commands are limited to 65535 blocks. + */ + blk = USHRT_MAX; +#else + blk = 20; +#endif +#else + ret = usb_get_max_xfer_size(udev, (size_t *)&size); + if (ret < 0) { + /* unimplemented, let's use default 20 */ + blk = 20; + } else { + if (size > USHRT_MAX * 512) + size = USHRT_MAX * 512; + blk = size / 512; + } +#endif + + us->max_xfer_blk = blk; +} static int usb_inquiry(struct scsi_cmd *srb, struct us_data *ss) { @@ -1150,12 +1172,12 @@ static unsigned long usb_stor_read(struct blk_desc *block_dev, lbaint_t blknr, /* XXX need some comment here */ retry = 2; srb->pdata = (unsigned char *)buf_addr; - if (blks > USB_MAX_XFER_BLK) - smallblks = USB_MAX_XFER_BLK; + if (blks > ss->max_xfer_blk) + smallblks = ss->max_xfer_blk; else smallblks = (unsigned short) blks; retry_it: - if (smallblks == USB_MAX_XFER_BLK) + if (smallblks == ss->max_xfer_blk) usb_show_progress(); srb->datalen = block_dev->blksz * smallblks; srb->pdata = (unsigned char *)buf_addr; @@ -1178,7 +1200,7 @@ retry_it: start, smallblks, buf_addr); usb_disable_asynch(0); /* asynch transfer allowed */ - if (blkcnt >= USB_MAX_XFER_BLK) + if (blkcnt >= ss->max_xfer_blk) debug("\n"); return blkcnt; } @@ -1236,12 +1258,12 @@ static unsigned long usb_stor_write(struct blk_desc *block_dev, lbaint_t blknr, */ retry = 2; srb->pdata = (unsigned char *)buf_addr; - if (blks > USB_MAX_XFER_BLK) - smallblks = USB_MAX_XFER_BLK; + if (blks > ss->max_xfer_blk) + smallblks = ss->max_xfer_blk; else smallblks = (unsigned short) blks; retry_it: - if (smallblks == USB_MAX_XFER_BLK) + if (smallblks == ss->max_xfer_blk) usb_show_progress(); srb->datalen = block_dev->blksz * smallblks; srb->pdata = (unsigned char *)buf_addr; @@ -1263,7 +1285,7 @@ retry_it: PRIxPTR "\n", start, smallblks, buf_addr); usb_disable_asynch(0); /* asynch transfer allowed */ - if (blkcnt >= USB_MAX_XFER_BLK) + if (blkcnt >= ss->max_xfer_blk) debug("\n"); return blkcnt; @@ -1384,6 +1406,10 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum, ss->irqmaxp = usb_maxpacket(dev, ss->irqpipe); dev->irq_handle = usb_stor_irq; } + + /* Set the maximum transfer size per host controller setting */ + usb_stor_set_max_xfer_blk(dev, ss); + dev->privptr = (void *)ss; return 1; } diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig index 89f8068be6..fbc42ae58e 100644 --- a/configs/10m50_defconfig +++ b/configs/10m50_defconfig @@ -8,7 +8,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index dea6a91047..97f3a22524 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -8,7 +8,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index aded95fcd5..30e846cf48 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -12,7 +12,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 618883c4a2..0a0057ea94 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index d8d1040a90..f6af9446cc 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -13,7 +13,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index fbacce07cf..3c2a6f8286 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -17,8 +17,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -31,8 +29,3 @@ CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index 58aa988b23..cd1fa64ecb 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -14,8 +14,6 @@ CONFIG_AHCI=y CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -33,8 +31,3 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 6d7c588613..4a90ab695a 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -13,8 +13,6 @@ CONFIG_AHCI=y CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -32,8 +30,3 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index 70a5e77f09..08b301a483 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -10,7 +10,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig new file mode 100644 index 0000000000..2ff2723065 --- /dev/null +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -0,0 +1,26 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=384 +CONFIG_MMC0_CD_PIN="PH1" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_I2C1_ENABLE=y +CONFIG_VIDEO_VGA=y +CONFIG_SATAPWR="PB8" +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_ETH_DESIGNWARE=y +CONFIG_SUN7I_GMAC=y +CONFIG_AXP_ALDO3_VOLT=2800 +CONFIG_AXP_ALDO4_VOLT=2800 +CONFIG_SCSI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index 8d5df33906..1a0ad5a6d4 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -13,7 +13,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 6f57c3aee9..ee9415517f 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -14,7 +14,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig index fafbeb2821..c11991de7e 100644 --- a/configs/A33-OLinuXino_defconfig +++ b/configs/A33-OLinuXino_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig index af2d593ae7..d21288c774 100644 --- a/configs/Ainol_AW1_defconfig +++ b/configs/Ainol_AW1_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ainol-aw1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index 03f51393bb..f105b5ea8a 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -16,7 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index badfd94a88..06538e50d9 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t003" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 48a8344e32..daea06e5f7 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -7,7 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index 01af4aab86..3df45006e3 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig index 6e37669e67..db5cdf9f71 100644 --- a/configs/B4420QDS_SPIFLASH_defconfig +++ b/configs/B4420QDS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig index beeaa82103..6ce5b694c6 100644 --- a/configs/B4420QDS_defconfig +++ b/configs/B4420QDS_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index be0011e036..c098151832 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig index f756d002be..8354ae1b89 100644 --- a/configs/B4860QDS_SECURE_BOOT_defconfig +++ b/configs/B4860QDS_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig index e9a4a07e95..615e01acff 100644 --- a/configs/B4860QDS_SPIFLASH_defconfig +++ b/configs/B4860QDS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig index e89b13274d..573fc2e000 100644 --- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig index 5a22a8bc95..8e7d868b12 100644 --- a/configs/B4860QDS_defconfig +++ b/configs/B4860QDS_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig index 25a8123db9..2e99fc5538 100644 --- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig @@ -12,7 +12,6 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig index 2dc7322257..35d1b49337 100644 --- a/configs/BSC9131RDB_NAND_defconfig +++ b/configs/BSC9131RDB_NAND_defconfig @@ -11,7 +11,6 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig index 6637e76368..e4777825f7 100644 --- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH,SYS_CLK_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig index d06fbd11db..b4cbdc548e 100644 --- a/configs/BSC9131RDB_SPIFLASH_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig index d86d7b1511..c323a10860 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NAND_SECBOOT,SYS_CLK_100_DDR_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig index 4f46b25011..58ea357139 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig index d23952f2f4..2831320757 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NAND_SECBOOT,SYS_CLK_100_DDR_133" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig index 4f4431e88c..dac1b31044 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig index 69b9a0671d..d4cd2c0648 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100_DDR_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig index 3996e4d5db..c8855f8c6b 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100_DDR_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig index 14885dc460..660f2244a4 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100_DDR_133" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig index 7cd0fdd7d2..d03f90a375 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100_DDR_133" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig index 4bbea52f8b..9ff1b2004b 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SDCARD,SYS_CLK_100_DDR_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig index e1ec87420f..6e669d7630 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SDCARD,SYS_CLK_100_DDR_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig index 7a7e56d71f..0074274184 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SDCARD,SYS_CLK_100_DDR_133" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig index 665486b218..b2efa93da2 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SDCARD,SYS_CLK_100_DDR_133" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig index 3c684a0352..909da87087 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH,SYS_CLK_100_DDR_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig index 713006a146..365ad8921a 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH,SYS_CLK_100_DDR_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig index dd801ab8e9..8bc8ca0abc 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH,SYS_CLK_100_DDR_133" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig index 855102fbf3..f91e40b510 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH,SYS_CLK_100_DDR_133" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 7899d20932..4c2c05c4da 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -11,7 +11,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_AXP_DLDO4_VOLT=2500 diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 83ca4e4bef..a5456127e2 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -10,7 +10,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index bd1cc99bd5..5c8e759498 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -12,7 +12,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index 6b3e0934d4..8c4615c456 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index 89d6fc3d44..29bcc9cf19 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index cd366a7096..a6f51cd321 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig index cf47a125dd..53d019f905 100644 --- a/configs/C29XPCIE_SPIFLASH_defconfig +++ b/configs/C29XPCIE_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig index 7f5cea0f9d..c7422f6e23 100644 --- a/configs/C29XPCIE_defconfig +++ b/configs/C29XPCIE_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index 83228bd10f..d057bee172 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip" CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_FASTBOOT_FLASH=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_SPL_DOS_PARTITION is not set @@ -22,9 +21,4 @@ CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 3a748fc27e..fa572eac57 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCK_SIZE=0x40000,SYS_NAND_PAGE_SIZE=4096,SY CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_FASTBOOT_FLASH=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADB is not set @@ -27,9 +26,4 @@ CONFIG_AXP_ALDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index 348abb5349..01a2ccd197 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -7,7 +7,6 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 7ece4f9bc2..3da1e8349f 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 21e87e6381..a7a3f48154 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -17,7 +17,6 @@ CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 78eaaf4379..ef95ac6a5e 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -9,7 +9,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Cubieboard4_defconfig b/configs/Cubieboard4_defconfig index 6f9fd2b5a0..cac415f3bd 100644 --- a/configs/Cubieboard4_defconfig +++ b/configs/Cubieboard4_defconfig @@ -12,7 +12,6 @@ CONFIG_USB3_VBUS_PIN="PH15" CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cubieboard4" CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 1e6b811be9..c670ab851a 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -9,7 +9,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index f93ff0d6c4..f9f73fdb23 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -15,8 +15,6 @@ CONFIG_AHCI=y CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -32,8 +30,3 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index 34444ec0bd..12120c2ced 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -4,6 +4,7 @@ CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=15355 CONFIG_DRAM_ODT_EN=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_USB0_ID_DET="PH11" @@ -15,7 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-cubietruck-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Cyrus_P5020_defconfig b/configs/Cyrus_P5020_defconfig index 82da854386..6242c70c2b 100644 --- a/configs/Cyrus_P5020_defconfig +++ b/configs/Cyrus_P5020_defconfig @@ -10,7 +10,6 @@ CONFIG_BOOTDELAY=10 CONFIG_CONSOLE_MUX=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y @@ -34,5 +33,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_OF_LIBFDT=y diff --git a/configs/Cyrus_P5040_defconfig b/configs/Cyrus_P5040_defconfig index 0fc9a07548..0af8a90cc2 100644 --- a/configs/Cyrus_P5040_defconfig +++ b/configs/Cyrus_P5040_defconfig @@ -10,7 +10,6 @@ CONFIG_BOOTDELAY=10 CONFIG_CONSOLE_MUX=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y @@ -34,5 +33,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_OF_LIBFDT=y diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig index f83e33ad50..b981128303 100644 --- a/configs/Empire_electronix_d709_defconfig +++ b/configs/Empire_electronix_d709_defconfig @@ -17,7 +17,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index 5a7bc09ce3..5dd2d70a5e 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -16,7 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index 45fd4f47a6..a5058c8a1a 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -9,7 +9,6 @@ CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 0808ada041..059361d4a8 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -16,7 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index 7b746f0589..8f7ee1d55f 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -9,7 +9,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index 64dc81332c..84007ad374 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -11,7 +11,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index bd754cb5b3..72c828b75c 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -4,8 +4,11 @@ CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 CONFIG_DRAM_ZQ=14779 CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero" -# CONFIG_CMD_IMLS is not set +CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set # CONFIG_NETDEVICES is not set CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index d4911eaab1..08749b8f75 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -11,7 +11,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index 1dbb25d00f..a54f9de3a6 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -9,7 +9,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index 06edc5e3a1..717814607c 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -7,7 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 5756f82383..f849470736 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5208EVBE=y CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index aaf7f96cdb..74ea619008 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index df97e20b74..13055c52f5 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M52277EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 144ca01e1f..111bb23fd3 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5235EVB=y CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 0afaf7db00..72d81ff199 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5235EVB=y CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index b7eedcdacf..ffdc81806e 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5249EVB=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTOBOOT is not set +CONFIG_CMD_IMLS=y CONFIG_LOOPW=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index 09640de1ec..9ae903bb47 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_TARGET_M5253DEMO=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_PING=y diff --git a/configs/M5253EVBE_defconfig b/configs/M5253EVBE_defconfig index 79941a1253..88e16205ea 100644 --- a/configs/M5253EVBE_defconfig +++ b/configs/M5253EVBE_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_TARGET_M5253EVBE=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index 478ccd7244..fd273cb8af 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5272C3=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index e19fe6f6bb..34405c28a0 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5275EVB=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index c3908107bb..c26e2ff07c 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5282EVB=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 72814301d1..ebd21e1587 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -6,6 +6,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index ab69366174..f6c22888d1 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index 6346c89661..2cad692003 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 6dd1d71183..0ec9e824df 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index ee4dacd38c..b26c94e060 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip= # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="-> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index efac720b7a..cf015333cd 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="-> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index 09419c23ab..bd36aaabe3 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="-> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 5da77034a6..2b9e539e71 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="-> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index 4e8a113975..aa21072703 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip= # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="-> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index ee4dacd38c..b26c94e060 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip= # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="-> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index 82f2dbe096..d184bca011 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -6,6 +6,7 @@ CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)" CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index 41cfe6821f..715b2c32a2 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)" +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index 4136482bf5..2027481a2b 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index 46261961aa..ce7af8a3c8 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -6,6 +6,7 @@ CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index 691f57c364..b0eff24d96 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 35f2dc08d0..279f716847 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index 723692aa83..fd36f22ab7 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig index 8361ae96c7..ed8fb2d592 100644 --- a/configs/M5475AFE_defconfig +++ b/configs/M5475AFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig index ce2fafaa22..fbf074f05f 100644 --- a/configs/M5475BFE_defconfig +++ b/configs/M5475BFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig index b13cf2659d..0191d28b52 100644 --- a/configs/M5475CFE_defconfig +++ b/configs/M5475CFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig index de269c7afb..91358fa340 100644 --- a/configs/M5475DFE_defconfig +++ b/configs/M5475DFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig index eb86f49d57..c769bef11d 100644 --- a/configs/M5475EFE_defconfig +++ b/configs/M5475EFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig index 757385ff30..0b4fcae172 100644 --- a/configs/M5475FFE_defconfig +++ b/configs/M5475FFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig index b9a4c3c361..902e831ddc 100644 --- a/configs/M5475GFE_defconfig +++ b/configs/M5475GFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig index f4e7879337..d0c817f970 100644 --- a/configs/M5485AFE_defconfig +++ b/configs/M5485AFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig index 6774f47f6d..490a8e7917 100644 --- a/configs/M5485BFE_defconfig +++ b/configs/M5485BFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig index 164aeb35e8..273db18de9 100644 --- a/configs/M5485CFE_defconfig +++ b/configs/M5485CFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig index 63f2aafee3..45c54d8479 100644 --- a/configs/M5485DFE_defconfig +++ b/configs/M5485DFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig index 989415a63c..85546ecd0a 100644 --- a/configs/M5485EFE_defconfig +++ b/configs/M5485EFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig index 9d8a37ae6d..0e24d61d19 100644 --- a/configs/M5485FFE_defconfig +++ b/configs/M5485FFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig index 6100c0af75..4054f2c0c5 100644 --- a/configs/M5485GFE_defconfig +++ b/configs/M5485GFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig index 9ccf266154..e659cf073d 100644 --- a/configs/M5485HFE_defconfig +++ b/configs/M5485HFE_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO" CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 19fe2bd6bb..ece240917e 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -48,7 +48,6 @@ CONFIG_AUTOBOOT_DELAY_STR="root" # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADB is not set diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index 790b1613a7..14a786a6f4 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -6,7 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig index bb124af505..908d1f42a8 100644 --- a/configs/MPC8308RDB_defconfig +++ b/configs/MPC8308RDB_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=5 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig index 6d34907ac6..ea9c85633a 100644 --- a/configs/MPC8313ERDB_33_defconfig +++ b/configs/MPC8313ERDB_33_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig index 8a78efdcb6..7eb5afbb78 100644 --- a/configs/MPC8313ERDB_66_defconfig +++ b/configs/MPC8313ERDB_66_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig index a8ed835e2a..016021af26 100644 --- a/configs/MPC8313ERDB_NAND_33_defconfig +++ b/configs/MPC8313ERDB_NAND_33_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" CONFIG_BOOTDELAY=6 CONFIG_SPL=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig index 88f81b4cf3..42f7b84729 100644 --- a/configs/MPC8313ERDB_NAND_66_defconfig +++ b/configs/MPC8313ERDB_NAND_66_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" CONFIG_BOOTDELAY=6 CONFIG_SPL=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig index 951910443c..7026be6dbf 100644 --- a/configs/MPC8315ERDB_defconfig +++ b/configs/MPC8315ERDB_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig index 3c2fd2e469..328c38e571 100644 --- a/configs/MPC8323ERDB_defconfig +++ b/configs/MPC8323ERDB_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y diff --git a/configs/MPC832XEMDS_ATM_defconfig b/configs/MPC832XEMDS_ATM_defconfig index e3deec87a3..3fd70be3d7 100644 --- a/configs/MPC832XEMDS_ATM_defconfig +++ b/configs/MPC832XEMDS_ATM_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC832XEMDS_HOST_33_defconfig b/configs/MPC832XEMDS_HOST_33_defconfig index db36b078a9..fcb9d038f6 100644 --- a/configs/MPC832XEMDS_HOST_33_defconfig +++ b/configs/MPC832XEMDS_HOST_33_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PCI_33M,PQ_MDS_PIB=1" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/MPC832XEMDS_HOST_66_defconfig b/configs/MPC832XEMDS_HOST_66_defconfig index cf0fc32d47..ebcb548a79 100644 --- a/configs/MPC832XEMDS_HOST_66_defconfig +++ b/configs/MPC832XEMDS_HOST_66_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PCI_66M,PQ_MDS_PIB=1" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/MPC832XEMDS_SLAVE_defconfig b/configs/MPC832XEMDS_SLAVE_defconfig index df5af99900..feed53555b 100644 --- a/configs/MPC832XEMDS_SLAVE_defconfig +++ b/configs/MPC832XEMDS_SLAVE_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/MPC832XEMDS_defconfig b/configs/MPC832XEMDS_defconfig index 539e5a31f1..26984f434b 100644 --- a/configs/MPC832XEMDS_defconfig +++ b/configs/MPC832XEMDS_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig index 88edf5fcf0..49542ca59c 100644 --- a/configs/MPC8349EMDS_defconfig +++ b/configs/MPC8349EMDS_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig index 3b90e15ae0..319141de1b 100644 --- a/configs/MPC8349ITXGP_defconfig +++ b/configs/MPC8349ITXGP_defconfig @@ -9,6 +9,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitxgp:eth0:off console=ttyS0,115200" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="MPC8349E-mITX-GP> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_SDRAM=y diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig index e61dc0aff2..0893c4ac02 100644 --- a/configs/MPC8349ITX_LOWBOOT_defconfig +++ b/configs/MPC8349ITX_LOWBOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="MPC8349E-mITX> " +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig index 63d8dcad4b..8a8f05544f 100644 --- a/configs/MPC8349ITX_defconfig +++ b/configs/MPC8349ITX_defconfig @@ -9,6 +9,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="MPC8349E-mITX> " +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig index 41e6406520..36c2fae710 100644 --- a/configs/MPC837XEMDS_HOST_defconfig +++ b/configs/MPC837XEMDS_HOST_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig index 784051630d..b172b928b8 100644 --- a/configs/MPC837XEMDS_defconfig +++ b/configs/MPC837XEMDS_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 48dcf7af88..14b7a5a8ba 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig index 8c4bab2e5a..70ffda7b44 100644 --- a/configs/MPC8536DS_36BIT_defconfig +++ b/configs/MPC8536DS_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig index 5ee64ccb34..328d3c6f78 100644 --- a/configs/MPC8536DS_SDCARD_defconfig +++ b/configs/MPC8536DS_SDCARD_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig index cd25980b9f..02ccb1a8ab 100644 --- a/configs/MPC8536DS_SPIFLASH_defconfig +++ b/configs/MPC8536DS_SPIFLASH_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig index e40208d89a..d0c48495fb 100644 --- a/configs/MPC8536DS_defconfig +++ b/configs/MPC8536DS_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig index cb3d9d5733..96ea70a2af 100644 --- a/configs/MPC8541CDS_defconfig +++ b/configs/MPC8541CDS_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_MII=y diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig index b256b4225c..4f09a4afe4 100644 --- a/configs/MPC8541CDS_legacy_defconfig +++ b/configs/MPC8541CDS_legacy_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="LEGACY" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_MII=y diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig index 544632987a..0dc1e0b815 100644 --- a/configs/MPC8544DS_defconfig +++ b/configs/MPC8544DS_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index a138e52ce1..8810000590 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_DHCP=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index f49ddbc27f..28eb215f60 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_DHCP=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 9c1421cdb7..545d4a262a 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_MII=y diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig index 7acb94c808..3a2e377a85 100644 --- a/configs/MPC8555CDS_defconfig +++ b/configs/MPC8555CDS_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_MII=y diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig index ced68d8372..108ba37f1c 100644 --- a/configs/MPC8555CDS_legacy_defconfig +++ b/configs/MPC8555CDS_legacy_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="LEGACY" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_MII=y diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig index 63cc392aab..b70feef2f4 100644 --- a/configs/MPC8568MDS_defconfig +++ b/configs/MPC8568MDS_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_DHCP=y diff --git a/configs/MPC8569MDS_ATM_defconfig b/configs/MPC8569MDS_ATM_defconfig index e5d904432c..76822511fe 100644 --- a/configs/MPC8569MDS_ATM_defconfig +++ b/configs/MPC8569MDS_ATM_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8569MDS_defconfig b/configs/MPC8569MDS_defconfig index b8f87f9554..7cd305f3d0 100644 --- a/configs/MPC8569MDS_defconfig +++ b/configs/MPC8569MDS_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig index 1c4ab115c6..a7d1b0c732 100644 --- a/configs/MPC8572DS_36BIT_defconfig +++ b/configs/MPC8572DS_36BIT_defconfig @@ -11,6 +11,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig index 8881713c1c..ce88d8328e 100644 --- a/configs/MPC8572DS_defconfig +++ b/configs/MPC8572DS_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig index fde837c011..3ffed30ae2 100644 --- a/configs/MPC8610HPCD_defconfig +++ b/configs/MPC8610HPCD_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y @@ -22,5 +23,4 @@ CONFIG_SCSI=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig index 7318e723a8..b8b3e5165c 100644 --- a/configs/MPC8641HPCN_36BIT_defconfig +++ b/configs/MPC8641HPCN_36BIT_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y @@ -21,5 +22,4 @@ CONFIG_PHYLIB=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig index def36e4171..650141bc46 100644 --- a/configs/MPC8641HPCN_defconfig +++ b/configs/MPC8641HPCN_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y @@ -21,5 +22,4 @@ CONFIG_PHYLIB=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_OF_LIBFDT=y diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index 6f23d877ab..8220db85ef 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -11,7 +11,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-primo73" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index ccdea4a60b..d323311951 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -13,7 +13,6 @@ CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-primo81" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 702592eb81..8bce411663 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -5,7 +5,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index d908e33e66..837a79b5dd 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -8,7 +8,6 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index 206109a3fd..24a4aff478 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -9,7 +9,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index 3c337393cf..6467969ec3 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -7,7 +7,6 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index b50061170a..ac7bb9f104 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index e7a940d6e5..84c83dab2e 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -10,7 +10,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index d3575666bf..1516107d2e 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -7,7 +7,6 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig index 7bea3e200f..819b6a17ac 100644 --- a/configs/Merrii_A80_Optimus_defconfig +++ b/configs/Merrii_A80_Optimus_defconfig @@ -12,7 +12,6 @@ CONFIG_USB3_VBUS_PIN="PH5" CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/MigoR_defconfig b/configs/MigoR_defconfig index e4aef5a336..9c254dfc51 100644 --- a/configs/MigoR_defconfig +++ b/configs/MigoR_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index 67ae102137..6b34650740 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -7,7 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index d05375d0db..78aa0c732d 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_FASTBOOT_FLASH=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set @@ -22,8 +21,3 @@ CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_ELDO2_VOLT=1800 CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index 6d5d19ce53..d39cc66d85 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -13,7 +13,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index cd7750f6a7..17f825f241 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -15,7 +15,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig index 97c5e85f64..aa1f78a515 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index e0626b2964..ead503f3d4 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -23,6 +23,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig index fa07a21ac0..f628fd359d 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 6d8492963e..710c2d6e76 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 4df6cbac29..68a5865b2f 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig index be3545c30a..7e52c08222 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 073323bff5..e7dee2571f 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig index 7aa6433a4c..d0273256fd 100644 --- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 44da2304f8..a8056caf80 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -22,6 +22,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig index f026bdad18..cd82c14912 100644 --- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index efab49ff22..d0b6646f6a 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 4fc641dde1..8e98aa574f 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig index ecf525226f..bfd6960b90 100644 --- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 60ba1ac203..3691a2b31b 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig index f57c4f46fe..29d2d3620f 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index c2741fd159..7299d5b735 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -23,6 +23,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig index c7920adf8e..3824c12df7 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 619e54f0fc..4b82ae71a4 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 6a4154540d..9f8f01804d 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig index 121504d467..3df7461da4 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index e5b1e3bbd6..744f84c8f4 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig index 7612cc2db5..33ea6cbd87 100644 --- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index eb72affff8..55bbbee846 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -22,6 +22,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig index f1e3a14928..179a0b5152 100644 --- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index b67873ef5b..6a7c9e26f9 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index a60c65490b..b8e3ccd6d0 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig index 2b22ab523a..b674798dba 100644 --- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 15a98be54e..15aeec9407 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig index fc852bdf83..734cca375a 100644 --- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_NAND is not set diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig index a0e5bb3593..f8aaa2e0df 100644 --- a/configs/P1020MBG-PC_36BIT_defconfig +++ b/configs/P1020MBG-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_NAND is not set diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig index e9de40830e..47b73cfed9 100644 --- a/configs/P1020MBG-PC_SDCARD_defconfig +++ b/configs/P1020MBG-PC_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_NAND is not set diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig index 7344dffb57..b874acdd28 100644 --- a/configs/P1020MBG-PC_defconfig +++ b/configs/P1020MBG-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_NAND is not set diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index cff7f598d9..dff899efcf 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 65b1a27d11..5c146092fd 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 05e4dca025..6a5c1f9a90 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 4cd265b065..058150756e 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 2dfb76272c..7f05cea704 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index aea0ab49ff..eb9d9a8491 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 4722fd65fe..256b714352 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index cc7ba55b57..e39ad20bc0 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index ee0fdb0946..96ad965213 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 16cdf8e6b1..925363185c 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 031afa4bd6..4912860b84 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index d2d8d91cb0..0062ca0e0d 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig index e2fc46ac72..782bce4a24 100644 --- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_NAND is not set diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig index ab3b97631f..5e97cc4647 100644 --- a/configs/P1020UTM-PC_36BIT_defconfig +++ b/configs/P1020UTM-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_NAND is not set diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig index 6d23d4122e..564686f09d 100644 --- a/configs/P1020UTM-PC_SDCARD_defconfig +++ b/configs/P1020UTM-PC_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_NAND is not set diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig index bbc0631a1c..c5027da3c5 100644 --- a/configs/P1020UTM-PC_defconfig +++ b/configs/P1020UTM-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_NAND is not set diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig index e7e0ae003e..fb8398fa67 100644 --- a/configs/P1021RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig index 72973f726d..1012cb56af 100644 --- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig index 7a0bfb0762..92699c04b3 100644 --- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig index 3528db51b5..0b6c851051 100644 --- a/configs/P1021RDB-PC_36BIT_defconfig +++ b/configs/P1021RDB-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig index 0e80cf3468..f91c23c88a 100644 --- a/configs/P1021RDB-PC_NAND_defconfig +++ b/configs/P1021RDB-PC_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig index f8899b232b..53caa4286b 100644 --- a/configs/P1021RDB-PC_SDCARD_defconfig +++ b/configs/P1021RDB-PC_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig index e7408c23ba..45a7c203e8 100644 --- a/configs/P1021RDB-PC_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig index 1648ad694f..8faa1d4907 100644 --- a/configs/P1021RDB-PC_defconfig +++ b/configs/P1021RDB-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig index 7cd4ebb8f9..8639cdb64f 100644 --- a/configs/P1022DS_36BIT_NAND_defconfig +++ b/configs/P1022DS_36BIT_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig index 5e510b9dc9..e42b3ca834 100644 --- a/configs/P1022DS_36BIT_SDCARD_defconfig +++ b/configs/P1022DS_36BIT_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig index ec39ffbf2f..8b631805bb 100644 --- a/configs/P1022DS_36BIT_SPIFLASH_defconfig +++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig index d2922f3fde..569d92168a 100644 --- a/configs/P1022DS_36BIT_defconfig +++ b/configs/P1022DS_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig index 27cf431fa7..b133911fec 100644 --- a/configs/P1022DS_NAND_defconfig +++ b/configs/P1022DS_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig index 198968e0e7..73aca67ac3 100644 --- a/configs/P1022DS_SDCARD_defconfig +++ b/configs/P1022DS_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig index 619b7ca573..49f1413361 100644 --- a/configs/P1022DS_SPIFLASH_defconfig +++ b/configs/P1022DS_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig index 4b1b4c3389..d6f8a191c1 100644 --- a/configs/P1022DS_defconfig +++ b/configs/P1022DS_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig index 58bc67f3b1..bfe84a98fb 100644 --- a/configs/P1023RDB_defconfig +++ b/configs/P1023RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTDELAY=-1 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y # CONFIG_CMD_EEPROM is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig index 00ede85381..a310192796 100644 --- a/configs/P1024RDB_36BIT_defconfig +++ b/configs/P1024RDB_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig index a6eb7b85a9..474ca1d687 100644 --- a/configs/P1024RDB_NAND_defconfig +++ b/configs/P1024RDB_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig index 0c7c326252..0bf2c361e3 100644 --- a/configs/P1024RDB_SDCARD_defconfig +++ b/configs/P1024RDB_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig index 229604a60f..4f64c7e726 100644 --- a/configs/P1024RDB_SPIFLASH_defconfig +++ b/configs/P1024RDB_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig index a2179470d6..aaa722849b 100644 --- a/configs/P1024RDB_defconfig +++ b/configs/P1024RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig index 1dabd6a5e4..de6a9045bc 100644 --- a/configs/P1025RDB_36BIT_defconfig +++ b/configs/P1025RDB_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig index 31f300e6f0..2ddcef93be 100644 --- a/configs/P1025RDB_NAND_defconfig +++ b/configs/P1025RDB_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig index 93801f0dcd..8049e0ad62 100644 --- a/configs/P1025RDB_SDCARD_defconfig +++ b/configs/P1025RDB_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig index 63dc30508e..3e1c62dc40 100644 --- a/configs/P1025RDB_SPIFLASH_defconfig +++ b/configs/P1025RDB_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig index c35c988855..91ab8b8a08 100644 --- a/configs/P1025RDB_defconfig +++ b/configs/P1025RDB_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 3e33eae34f..aff79ecf21 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 5ba0ff9b4f..ceea0839ec 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 482b092528..f739dfc730 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 1e074bcf49..37c9c04edd 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 74555f9d9d..1ba4dfded4 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_TPL_NAND_SUPPORT=y CONFIG_TPL_SERIAL_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 4646895edb..4481c681c1 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 4f8a4aac8d..12ee717f77 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index b32dc629c7..9af24cf4be 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 64484b5ef9..43c26bd6be 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index a6e6066deb..40f4e9fa36 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig index 386c1b8c6e..a63df614e2 100644 --- a/configs/P2041RDB_SECURE_BOOT_defconfig +++ b/configs/P2041RDB_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index f1afc7767f..da963b3bc4 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig index 20333cd174..d5e958caec 100644 --- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 5f5b89865f..e693adcc4b 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig index 0139522f8e..f4f22ce8ca 100644 --- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index eaad8aa11a..60d74f169e 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index fda997c9a4..09b17b5ce6 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig index 5bf425f728..7befcb04b9 100644 --- a/configs/P3041DS_SECURE_BOOT_defconfig +++ b/configs/P3041DS_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 1de4fe1425..31ffc1c6c5 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig index eaad4abe0c..8a66ba786b 100644 --- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 823dfe392f..2f28f24001 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index e5b0273a40..b176f0551f 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig index 97f05b5394..125712a39b 100644 --- a/configs/P4080DS_SECURE_BOOT_defconfig +++ b/configs/P4080DS_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 780a36fe60..55b9524540 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig index 117e2f6ee6..fa4e6be1ff 100644 --- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index be70a3601c..b89ba5bf9d 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig index 40924af48a..37b9223164 100644 --- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig index b5f9ec4e35..9e40e1b713 100644 --- a/configs/P5020DS_NAND_defconfig +++ b/configs/P5020DS_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig index d7dfd16b57..4e0fabd839 100644 --- a/configs/P5020DS_SDCARD_defconfig +++ b/configs/P5020DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig index 20bad18876..52aafe9b18 100644 --- a/configs/P5020DS_SECURE_BOOT_defconfig +++ b/configs/P5020DS_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig index 97511d839a..b52c41f678 100644 --- a/configs/P5020DS_SPIFLASH_defconfig +++ b/configs/P5020DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig index ba75e95f7f..ab04c2417e 100644 --- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig index a9e9cfe35f..04d97daf48 100644 --- a/configs/P5020DS_defconfig +++ b/configs/P5020DS_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig index 3b7934c0e6..eac9a75918 100644 --- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index eef6e5542a..d73fe8b624 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index be18f60f23..75cdd18da3 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig index 814a9a2ee7..9ccb18bb4d 100644 --- a/configs/P5040DS_SECURE_BOOT_defconfig +++ b/configs/P5040DS_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index d42bd4c8f2..cf35c25553 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 4cfca6f61d..7c94ecb322 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 0cb8c13fde..141fb48452 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -11,7 +11,6 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index af00e54347..7818e3cf79 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -15,8 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -27,8 +25,3 @@ CONFIG_DFU_RAM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig b/configs/Sinovoip_BPI_M2_Plus_defconfig index 43ae6cade3..3338b64e03 100644 --- a/configs/Sinovoip_BPI_M2_Plus_defconfig +++ b/configs/Sinovoip_BPI_M2_Plus_defconfig @@ -9,7 +9,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index feec46e9b9..f745d6f84a 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -7,7 +7,6 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index 04d81693eb..60aea1eb3d 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -13,11 +13,10 @@ CONFIG_USB0_ID_DET="PH11" CONFIG_USB1_VBUS_PIN="PD24" CONFIG_AXP_GPIO=y CONFIG_SATAPWR="PD25" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-sinovoip-bpi-m3" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig index 2284bd31a3..3cf3e42f1b 100644 --- a/configs/Sunchip_CX-A99_defconfig +++ b/configs/Sunchip_CX-A99_defconfig @@ -12,7 +12,6 @@ CONFIG_USB3_VBUS_PIN="PL8" CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cx-a99" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index 7d2ae4d011..e63c9d348a 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig index de61b58985..4c724dc034 100644 --- a/configs/T1023RDB_SDCARD_defconfig +++ b/configs/T1023RDB_SDCARD_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index 0c81e91e84..6fdebcfee2 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index 82dba0b3ee..97fcb7cd2e 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig index ce0df6651b..7be10787f8 100644 --- a/configs/T1023RDB_defconfig +++ b/configs/T1023RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index 8ec02060da..999605ba6f 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -14,6 +14,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig index bd71f90935..e39f3dc023 100644 --- a/configs/T1024QDS_DDR4_defconfig +++ b/configs/T1024QDS_DDR4_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index 16d35b2f68..b0fc859bb1 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index d1fc51eb3c..1f8318b98f 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index 20b1e3d7b5..c90d764fa9 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -14,6 +14,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index c2470800ce..ed858badea 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index aee3c9238b..8bc97450a2 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 979dbce6bf..21c7af3fa2 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 468a1bf5d0..8d27b30a47 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index 0daabfcd19..a960e0ec8f 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 5b6bacb333..6027bcf7cd 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 5ba4fac8a3..67f54b7407 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index f5229c6143..45f17693c4 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig index e9ad05af19..5cca1d3093 100644 --- a/configs/T1040D4RDB_SDCARD_defconfig +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig index 91bc7a0587..e36d88d4e3 100644 --- a/configs/T1040D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index 6d9ed8af19..540b924cfc 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig index e67757c75a..690fb2fa2a 100644 --- a/configs/T1040D4RDB_defconfig +++ b/configs/T1040D4RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig index 4506cd5acd..7d66bd7a38 100644 --- a/configs/T1040QDS_DDR4_defconfig +++ b/configs/T1040QDS_DDR4_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index 9910f24ff4..7bf27de587 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -14,6 +14,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index 39e3018d6e..25733bb416 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index ca65c190a1..b7be2d6d53 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index 7ff52d2992..816b794344 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index f6cf68fa94..f483841c7a 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index 8c0f1d11b7..f471f33832 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig index 3f19a7ed33..99c46ac570 100644 --- a/configs/T1040RDB_defconfig +++ b/configs/T1040RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index dd4d748ce8..b9ab9a1d83 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 9593d27cee..9d2ee980ff 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig index 1692b47fa5..90a87007c3 100644 --- a/configs/T1042D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig @@ -14,6 +14,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 316e14fe4b..5c6afcf9f9 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index d69c5910c0..9861b1eeeb 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index 3a8e7e7b9d..a37d0dfcee 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index 9489972cfa..f8684e5c7c 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index 5b678ed185..0ea2653ca3 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index fd6bc4e9f7..7158fa22f8 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig index 9ab594c173..33fa70af67 100644 --- a/configs/T1042RDB_PI_defconfig +++ b/configs/T1042RDB_PI_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index b43bfdd7d3..c561a43c8e 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig index b103c43f3e..1436dc3c06 100644 --- a/configs/T1042RDB_defconfig +++ b/configs/T1042RDB_defconfig @@ -10,6 +10,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 671eacc050..8e93a150e6 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index faa43d3dbc..ba5658a0ec 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 5b341aa5d2..75f4ee1e65 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index c8a8095a31..1f856dbb95 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 51fc4f32c9..2479450395 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 985e98ae4b..c150c0f571 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 72bfa02914..3221afbeb9 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 2aee843342..a0ac48387b 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig index ec6f975ab1..76a0e3ae6e 100644 --- a/configs/T2080RDB_SECURE_BOOT_defconfig +++ b/configs/T2080RDB_SECURE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 1186cc0b81..f4432b5848 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig index 7475af761a..073f4474b5 100644 --- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 58d16c67fb..127437a1d7 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index 6a261afe85..1eb481702e 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index 2edd417439..add57d9350 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index dee4b901a6..ece9c320a5 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig index 89147b7a6c..8b1f6e406f 100644 --- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig index 70c395944c..e3dea0e25c 100644 --- a/configs/T2081QDS_defconfig +++ b/configs/T2081QDS_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index 9b49c3d6ab..ba1dfbc385 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig index e4b0912d87..5422278393 100644 --- a/configs/T4160QDS_SDCARD_defconfig +++ b/configs/T4160QDS_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig index 1d13bcfce3..8462ff5a9a 100644 --- a/configs/T4160QDS_SECURE_BOOT_defconfig +++ b/configs/T4160QDS_SECURE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig index a9df2ad322..c069cf5051 100644 --- a/configs/T4160QDS_defconfig +++ b/configs/T4160QDS_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig index 11424912ad..cb5359ad9e 100644 --- a/configs/T4160RDB_defconfig +++ b/configs/T4160RDB_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index 8552b81ee3..cd03973fdf 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig index 6f0fcf261b..95ca2a8609 100644 --- a/configs/T4240QDS_SDCARD_defconfig +++ b/configs/T4240QDS_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig index 367ca86384..ff27ff5b80 100644 --- a/configs/T4240QDS_SECURE_BOOT_defconfig +++ b/configs/T4240QDS_SECURE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig index 43320b5f4e..29c54899cb 100644 --- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig index d4d2cafff2..4dc8ccd63e 100644 --- a/configs/T4240QDS_defconfig +++ b/configs/T4240QDS_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 18364a661a..4ac62752f3 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index e90208043f..efd6f78e64 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig index fe7819e5a0..6351a7793d 100644 --- a/configs/TQM834x_defconfig +++ b/configs/TQM834x_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig index db60380fff..061760c7d4 100644 --- a/configs/TWR-P1025_defconfig +++ b/configs/TWR-P1025_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_EXTRA_OPTIONS="TWR_P1025" CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig index 968186ffda..c8f22620a0 100644 --- a/configs/UCP1020_SPIFLASH_defconfig +++ b/configs/UCP1020_SPIFLASH_defconfig @@ -11,6 +11,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b" +CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig index 5feae26e66..0092e99283 100644 --- a/configs/UCP1020_defconfig +++ b/configs/UCP1020_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_PROMPT="B$ " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b" +CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index dcfd570f58..9db69faede 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -21,7 +21,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index 3f04c3982e..f6da496d37 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -14,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wexler-tab7200" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index cfc051fb3d..2e96ba2a52 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -13,7 +13,6 @@ CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index e1746fbe02..69ab0d36dc 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-wobo-i5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig index 2d57784b2d..dcdb51a396 100644 --- a/configs/Yones_Toptech_BD1078_defconfig +++ b/configs/Yones_Toptech_BD1078_defconfig @@ -20,7 +20,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig index 99481c951d..bfbb384070 100644 --- a/configs/Yones_Toptech_BS1078_V2_defconfig +++ b/configs/Yones_Toptech_BS1078_V2_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-yones-toptech-bs1078-v2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index b5e5154feb..63a0048702 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -5,7 +5,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig index c1053958c4..a3a40bf1e9 100644 --- a/configs/adp-ae3xx_defconfig +++ b/configs/adp-ae3xx_defconfig @@ -4,6 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ae3xx" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="NDS32 # " +CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SF_TEST=y diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index ced042e49f..5cf2d26552 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -4,6 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ag101p" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="NDS32 # " +CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index b191564e96..bf51e5388c 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index eb8338f0f1..35a9a1b7e8 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -18,7 +17,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y @@ -26,7 +24,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set @@ -59,9 +56,11 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0403 +CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0403 -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 +CONFIG_USB_ETHER=y +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index b8526fc15e..55e0ebd69c 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -3,14 +3,12 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y # CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MUSB_NEW_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_AUTOBOOT_KEYED=y @@ -18,8 +16,6 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -38,10 +34,11 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" CONFIG_LZO=y CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 0a239bb733..fe5b9e7622 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y # CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_SIGNATURE=y @@ -13,7 +12,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MUSB_NEW_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_AUTOBOOT_KEYED=y @@ -21,8 +19,6 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -48,8 +44,8 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y CONFIG_LZO=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 00c1af4344..3e68dbdc45 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y @@ -10,13 +9,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 # CONFIG_CMD_FLASH is not set @@ -50,10 +46,10 @@ CONFIG_USB_MUSB_GADGET=y CONFIG_USB_MUSB_TI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y CONFIG_RSA=y CONFIG_LZO=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig index 9f08edff4c..6842bdb3fe 100644 --- a/configs/am335x_evm_nor_defconfig +++ b/configs/am335x_evm_nor_defconfig @@ -3,19 +3,15 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y CONFIG_NOR=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 CONFIG_CMD_NAND=y @@ -37,10 +33,10 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y CONFIG_LZO=y CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig index c5e7425a77..ee1b1934b5 100644 --- a/configs/am335x_evm_norboot_defconfig +++ b/configs/am335x_evm_norboot_defconfig @@ -12,8 +12,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MTDPARTS=y CONFIG_ENV_IS_IN_FLASH=y @@ -31,10 +29,11 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" CONFIG_LZO=y CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 501fb2b90f..1170e50e7f 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -5,7 +5,6 @@ CONFIG_AM33XX=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT" CONFIG_SPI_BOOT=y @@ -13,11 +12,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MUSB_NEW_SUPPORT=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MTDPARTS=y @@ -35,10 +31,10 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y CONFIG_LZO=y CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig index 7c351382d9..5fa3a11f70 100644 --- a/configs/am335x_evm_usbspl_defconfig +++ b/configs/am335x_evm_usbspl_defconfig @@ -3,14 +3,12 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y # CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DISTRO_DEFAULTS=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MUSB_NEW_SUPPORT=y CONFIG_SPL_NET_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -18,8 +16,6 @@ CONFIG_SPL_USB_GADGET_SUPPORT=y CONFIG_SPL_USBETH_SUPPORT=y # CONFIG_SPL_YMODEM_SUPPORT is not set CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 # CONFIG_CMD_FLASH is not set @@ -41,10 +37,10 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y CONFIG_LZO=y CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index acdd56b435..6b7f446c56 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -5,7 +5,6 @@ CONFIG_AM33XX=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0x40300350 # CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y @@ -16,12 +15,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_SPL_MTD_SUPPORT=y # CONFIG_SPL_YMODEM_SUPPORT is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set @@ -54,9 +51,10 @@ CONFIG_USB_MUSB_GADGET=y CONFIG_USB_MUSB_TI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y CONFIG_RSA=y CONFIG_LZO=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig new file mode 100644 index 0000000000..4f5c27f79d --- /dev/null +++ b/configs/am335x_hs_evm_uart_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_ARCH_OMAP2PLUS=y +CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_AM33XX=y +CONFIG_TI_SECURE_DEVICE=y +CONFIG_ISW_ENTRY_ADDR=0x40301950 +# CONFIG_SPL_MMC_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set +# CONFIG_SPL_NAND_SUPPORT is not set +# CONFIG_SPL_FAT_SUPPORT is not set +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT_IMAGE_POST_PROCESS=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_VERSION_VARIABLE=y +CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL=y +# CONFIG_SPL_ENV_SUPPORT is not set +# CONFIG_SPL_EXT_SUPPORT is not set +CONFIG_SPL_MTD_SUPPORT=y +# CONFIG_SPL_YMODEM_SUPPORT is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_NAND=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_MTDPARTS=y +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2" +# CONFIG_BLK is not set +CONFIG_DFU_MMC=y +CONFIG_DFU_NAND=y +CONFIG_DFU_RAM=y +CONFIG_DM_I2C=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_OMAP_HS=y +CONFIG_NAND=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_SYS_NS16550=y +CONFIG_OMAP3_SPI=y +CONFIG_TIMER=y +CONFIG_OMAP_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_TI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_RSA=y +CONFIG_LZO=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 1b03c334b4..a4d22fb58a 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -11,14 +11,12 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y @@ -27,7 +25,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index c63e388ff5..0906b668b4 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -9,13 +9,11 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_SERIES=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -27,7 +25,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 1bcf683e35..59b465d4ae 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -9,14 +9,12 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_SHC_ICT=y CONFIG_SERIES=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -27,7 +25,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 9528a8cd5c..7447895e31 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -9,14 +9,12 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_SHC_NETBOOT=y CONFIG_SERIES=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y @@ -28,7 +26,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig index 8519282ecf..94382faaab 100644 --- a/configs/am335x_shc_prompt_defconfig +++ b/configs/am335x_shc_prompt_defconfig @@ -9,13 +9,11 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_SERIES=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -25,7 +23,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index b00d6f6b22..8c90175393 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -9,14 +9,12 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_SHC_SDBOOT=y CONFIG_SERIES=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -27,7 +25,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig index b00d6f6b22..8c90175393 100644 --- a/configs/am335x_shc_sdboot_prompt_defconfig +++ b/configs/am335x_shc_sdboot_prompt_defconfig @@ -9,14 +9,12 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_SHC_SDBOOT=y CONFIG_SERIES=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -27,7 +25,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 3fa5d5e5cc..c63d922dad 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -9,14 +9,12 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y @@ -27,7 +25,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig index 516ac2de3f..252bbcb855 100644 --- a/configs/am3517_crane_defconfig +++ b/configs/am3517_crane_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AM3517_CRANE # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_I2C=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 920c61c391..92577283f4 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -4,17 +4,19 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AM3517_EVM=y CONFIG_EMIF4=y +CONFIG_DEFAULT_DEVICE_TREE="am3517-evm" CONFIG_BOOTDELAY=10 CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_SPL_MTD_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AM3517_EVM # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_EEPROM is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -27,13 +29,12 @@ CONFIG_CMD_CACHE=y # CONFIG_CMD_TIME is not set CONFIG_CMD_UBI=y CONFIG_SPL_PARTITION_UUIDS=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_HOST=y -CONFIG_USB_STORAGE=y # CONFIG_FAT_WRITE is not set CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 15c25d39f1..da823f9c31 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -3,18 +3,15 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_AM43XX=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_SPL_LOAD_FIT=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00100000 CONFIG_CMD_SPL_WRITE_SIZE=0x40000 @@ -52,7 +49,7 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0403 +CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0403 -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig index 6c17088868..6715b52f68 100644 --- a/configs/am43xx_evm_ethboot_defconfig +++ b/configs/am43xx_evm_ethboot_defconfig @@ -13,7 +13,6 @@ CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL" CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00100000 CONFIG_CMD_SPL_WRITE_SIZE=0x40000 @@ -61,8 +60,8 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0403 +CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0403 -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 CONFIG_OF_LIBFDT=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index fde41c5c7e..d6a5263079 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -10,7 +10,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_DFU=y @@ -52,9 +51,9 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0403 +CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0403 -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 0bed335722..17d22a00f8 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -3,21 +3,18 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_AM43XX=y CONFIG_ISW_ENTRY_ADDR=0x40300350 -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_SPL_LOAD_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00100000 CONFIG_CMD_SPL_WRITE_SIZE=0x40000 @@ -75,7 +72,7 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0403 +CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0403 -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index a4d23e10b6..a293e140ce 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -8,7 +8,6 @@ CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_ISW_ENTRY_ADDR=0x403018e0 -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y @@ -18,7 +17,6 @@ CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_ETH_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_NET_SUPPORT=y @@ -28,7 +26,6 @@ CONFIG_SPL_USB_SUPPORT=y CONFIG_SPL_USB_GADGET_SUPPORT=y CONFIG_SPL_USBETH_SUPPORT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set @@ -63,7 +60,7 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0403 +CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0403 -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 0e4679abed..6e4d04c13b 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -7,7 +7,6 @@ CONFIG_TARGET_AM57XX_EVM=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_SPL_LOAD_FIT=y @@ -19,19 +18,16 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -72,7 +68,6 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig index f96348699b..20ee2d485d 100644 --- a/configs/am57xx_evm_nodt_defconfig +++ b/configs/am57xx_evm_nodt_defconfig @@ -15,15 +15,12 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set @@ -62,9 +59,8 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index e7638b88c2..e36491086f 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -11,7 +11,6 @@ CONFIG_TARGET_AM57XX_EVM=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_FIT_IMAGE_POST_PROCESS=y @@ -25,18 +24,15 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 CONFIG_FASTBOOT_USB_DEV=1 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_ISO_PARTITION=y @@ -75,7 +71,6 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index 48ef25b521..3332a31883 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="amcore $ " # CONFIG_CMD_BOOTD is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_XIMG is not set CONFIG_LOOPW=y # CONFIG_CMD_FPGA is not set diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 62dd14752c..cea9f2f408 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_PROMPT="ap121 # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 143064dfc3..7e8db3cb08 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="ap143 # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/ap325rxa_defconfig b/configs/ap325rxa_defconfig index 85d1201f00..28443e2aa3 100644 --- a/configs/ap325rxa_defconfig +++ b/configs/ap325rxa_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/ap_sh4a_4a_defconfig b/configs/ap_sh4a_4a_defconfig index 40e58eebd0..ef14121273 100644 --- a/configs/ap_sh4a_4a_defconfig +++ b/configs/ap_sh4a_4a_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index e6e3a9bfe9..a75a168e15 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -12,7 +12,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="Apalis TK1 # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -47,9 +46,9 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0xffff CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0xffff CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index b2284acc34..7c96cfa8ed 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -25,7 +25,6 @@ CONFIG_SYS_PROMPT="Apalis iMX6 # " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y @@ -54,13 +53,12 @@ CONFIG_NETDEVICES=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4000 CONFIG_USB_HOST_ETHER=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig index 239605dadf..e3ad1771ce 100644 --- a/configs/apalis_imx6_nospl_com_defconfig +++ b/configs/apalis_imx6_nospl_com_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_PROMPT="Apalis iMX6 # " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y @@ -43,13 +42,12 @@ CONFIG_NETDEVICES=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4020 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4020 CONFIG_USB_HOST_ETHER=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig index 1bc05d7266..f961cdec2d 100644 --- a/configs/apalis_imx6_nospl_it_defconfig +++ b/configs/apalis_imx6_nospl_it_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_PROMPT="Apalis iMX6 # " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y @@ -43,13 +42,12 @@ CONFIG_NETDEVICES=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4020 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4020 CONFIG_USB_HOST_ETHER=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index e15e11ad92..39329350ed 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -10,7 +10,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Apalis T30 # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -40,9 +39,9 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4000 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig index 6533d851fb..e9a17730db 100644 --- a/configs/apf27_defconfig +++ b/configs/apf27_defconfig @@ -11,7 +11,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="BIOS> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig index 9a35238e21..a90997c09e 100644 --- a/configs/apx4devkit_defconfig +++ b/configs/apx4devkit_defconfig @@ -11,7 +11,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index 8f76e2b31b..dc6f94edfe 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -11,7 +11,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index 829c00f942..aac06fce6d 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -11,7 +11,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index 253202c621..6b316274a1 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -11,7 +11,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index 766505e787..d9a5169905 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_SAVEENV is not set diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 64a526aeb2..f25fe7bf7d 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -11,7 +11,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_SPL=y CONFIG_SYS_PROMPT="ARNDALE # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/aspenite_defconfig b/configs/aspenite_defconfig index 0ac39eabd2..736c037299 100644 --- a/configs/aspenite_defconfig +++ b/configs/aspenite_defconfig @@ -4,7 +4,6 @@ CONFIG_IDENT_STRING="\nMarvell-Aspenite DB" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index f76df63d17..cababcf990 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -6,6 +6,7 @@ CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderver # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="URMEL > " +CONFIG_CMD_IMLS=y CONFIG_CMD_FPGA_LOADMK=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91rm9200ek_defconfig b/configs/at91rm9200ek_defconfig index d5d5eb0019..6e8145f4dd 100644 --- a/configs/at91rm9200ek_defconfig +++ b/configs/at91rm9200ek_defconfig @@ -9,6 +9,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91rm9200ek_ram_defconfig b/configs/at91rm9200ek_ram_defconfig index e56111a749..fceac0a9f5 100644 --- a/configs/at91rm9200ek_ram_defconfig +++ b/configs/at91rm9200ek_ram_defconfig @@ -10,6 +10,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index e3d46dca6a..9aa3ae9f14 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index b1903c2345..908f208107 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 8cd8398685..de8a0b047b 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index a11bc91be1..bac48f931f 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 9cbf767107..066de06f3a 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index b374cc5780..b32db05b4e 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index 20c07848ca..bc2f24226a 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index 20c07848ca..bc2f24226a 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 3c3fda6207..2bc927d9ff 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index edfa0ef02f..03d6571e67 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index 579082d242..b14d516597 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 7aeccaff4a..b81ce4646e 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 2dfaa9ba2a..e599d3d654 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 6ae7065cba..66deba42b3 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index bf0b6b1724..0b873c822e 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index cf03371c72..cb4a123a47 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 8d40bd0b36..6af3e31818 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index f68ed71910..fddf1e2a84 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index e8d0278828..3b5d84e0a4 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 6740ec5b30..3b74d0d93b 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -32,7 +31,6 @@ CONFIG_ENV_IS_IN_FAT=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 63bb7990e3..45ed49a9c5 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -32,7 +31,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index cc567c4dbf..5eeac0df99 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 663987bc29..1f0a6d9534 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 94481ca2ae..85c6ff076e 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_MMC=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index a06186c065..d230670d3c 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -32,7 +31,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index 0f59c7c29e..55c7d03267 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -32,7 +31,6 @@ CONFIG_ENV_IS_IN_FAT=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index d690358cd9..135f320b50 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -32,7 +31,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 9d61dd8de0..514fa9bdfb 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -15,7 +15,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_MMC=y @@ -33,7 +32,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y @@ -60,4 +58,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 9fa4801480..8c32bebcdb 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -15,7 +15,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_MMC=y @@ -33,7 +32,6 @@ CONFIG_ENV_IS_IN_FAT=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y @@ -60,4 +58,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index b28bec7f0b..fd7e7c11c1 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -15,7 +15,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_MMC=y @@ -33,7 +32,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y @@ -60,4 +58,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 838d8a0ad7..457e15df8c 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -15,7 +15,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_MMC=y @@ -33,7 +32,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y CONFIG_DM_MMC=y @@ -60,4 +58,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 1478997f49..2ebb4d4a41 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 7892cc358a..667d5cc0de 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 9451db37a9..8239827f2d 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 81654b2304..b013ba2975 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -23,7 +23,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index fd18c2c078..174b80aeed 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -8,7 +8,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="AXS# " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index ccfb53fa0b..9530061568 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -8,7 +8,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="AXS# " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index 083ead5a2e..7e01af0f64 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig new file mode 100644 index 0000000000..79ff0aaed2 --- /dev/null +++ b/configs/bananapi_m1_plus_defconfig @@ -0,0 +1,23 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=432 +CONFIG_MACPWR="PH23" +CONFIG_VIDEO_COMPOSITE=y +CONFIG_GMAC_TX_DELAY=3 +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_NETCONSOLE=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_RGMII=y +CONFIG_SUN7I_GMAC=y +CONFIG_SCSI=y +CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 4a08c1e770..461567fe1e 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -7,7 +7,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 9d8f17079e..c96c1b8501 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -18,7 +18,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/bcm11130_defconfig b/configs/bcm11130_defconfig index cf3a7cd74d..275092c4b8 100644 --- a/configs/bcm11130_defconfig +++ b/configs/bcm11130_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -27,9 +26,9 @@ CONFIG_MMC_SDHCI_KONA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation" +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation" -CONFIG_G_DNL_VENDOR_NUM=0x18d1 -CONFIG_G_DNL_PRODUCT_NUM=0x0d02 diff --git a/configs/bcm11130_nand_defconfig b/configs/bcm11130_nand_defconfig index 2ce917981e..38022ff289 100644 --- a/configs/bcm11130_nand_defconfig +++ b/configs/bcm11130_nand_defconfig @@ -6,7 +6,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -27,9 +26,9 @@ CONFIG_NAND=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation" +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation" -CONFIG_G_DNL_VENDOR_NUM=0x18d1 -CONFIG_G_DNL_PRODUCT_NUM=0x0d02 diff --git a/configs/bcm23550_w1d_defconfig b/configs/bcm23550_w1d_defconfig index 70918654f5..e28a7bf711 100644 --- a/configs/bcm23550_w1d_defconfig +++ b/configs/bcm23550_w1d_defconfig @@ -7,14 +7,11 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x80000000 CONFIG_FASTBOOT_BUF_SIZE=0x1D000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -34,11 +31,10 @@ CONFIG_MMC_SDHCI_KONA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation" +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02 CONFIG_USB_GADGET_BCM_UDC_OTG_PHY=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation" -CONFIG_G_DNL_VENDOR_NUM=0x18d1 -CONFIG_G_DNL_PRODUCT_NUM=0x0d02 CONFIG_OF_LIBFDT=y diff --git a/configs/bcm28155_ap_defconfig b/configs/bcm28155_ap_defconfig index db1ad40132..5fab433004 100644 --- a/configs/bcm28155_ap_defconfig +++ b/configs/bcm28155_ap_defconfig @@ -8,14 +8,11 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x80000000 CONFIG_FASTBOOT_BUF_SIZE=0x7FF00000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -35,11 +32,10 @@ CONFIG_MMC_SDHCI_KONA=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation" +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02 CONFIG_USB_GADGET_BCM_UDC_OTG_PHY=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation" -CONFIG_G_DNL_VENDOR_NUM=0x18d1 -CONFIG_G_DNL_PRODUCT_NUM=0x0d02 CONFIG_OF_LIBFDT=y diff --git a/configs/bcm28155_w1d_defconfig b/configs/bcm28155_w1d_defconfig index 3684fae370..0593fb0273 100644 --- a/configs/bcm28155_w1d_defconfig +++ b/configs/bcm28155_w1d_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -29,9 +28,9 @@ CONFIG_BCM_SF2_ETH_GMAC=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Broadcom Corporation" +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0d02 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation" -CONFIG_G_DNL_VENDOR_NUM=0x18d1 -CONFIG_G_DNL_PRODUCT_NUM=0x0d02 diff --git a/configs/bcm911360_entphn-ns_defconfig b/configs/bcm911360_entphn-ns_defconfig index 61336d38f0..b26fceff12 100644 --- a/configs/bcm911360_entphn-ns_defconfig +++ b/configs/bcm911360_entphn-ns_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm911360_entphn_defconfig b/configs/bcm911360_entphn_defconfig index cbef3d8365..ad280911d5 100644 --- a/configs/bcm911360_entphn_defconfig +++ b/configs/bcm911360_entphn_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm911360k_defconfig b/configs/bcm911360k_defconfig index b124206361..b76be353a0 100644 --- a/configs/bcm911360k_defconfig +++ b/configs/bcm911360k_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm958300k-ns_defconfig b/configs/bcm958300k-ns_defconfig index f271fa06e5..b22124a4a3 100644 --- a/configs/bcm958300k-ns_defconfig +++ b/configs/bcm958300k-ns_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm958300k_defconfig b/configs/bcm958300k_defconfig index b124206361..b76be353a0 100644 --- a/configs/bcm958300k_defconfig +++ b/configs/bcm958300k_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm958305k_defconfig b/configs/bcm958305k_defconfig index b124206361..b76be353a0 100644 --- a/configs/bcm958305k_defconfig +++ b/configs/bcm958305k_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/bcm958622hr_defconfig b/configs/bcm958622hr_defconfig index ffda22ed49..db61e22270 100644 --- a/configs/bcm958622hr_defconfig +++ b/configs/bcm958622hr_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set diff --git a/configs/bcm958712k_defconfig b/configs/bcm958712k_defconfig index 96e4bce972..83ba9f7a6b 100644 --- a/configs/bcm958712k_defconfig +++ b/configs/bcm958712k_defconfig @@ -5,6 +5,5 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="u-boot> " -# CONFIG_CMD_IMLS is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 7fb88e452b..ac72547e01 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -45,10 +44,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig index 24e8bbde17..72616ae5e5 100644 --- a/configs/bg0900_defconfig +++ b/configs/bg0900_defconfig @@ -14,7 +14,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_NAND=y diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig index 44f4eac6f6..764caf219c 100644 --- a/configs/birdland_bav335a_defconfig +++ b/configs/birdland_bav335a_defconfig @@ -24,11 +24,8 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y @@ -66,10 +63,9 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_FAT_WRITE=y CONFIG_LZO=y CONFIG_OF_LIBFDT=y diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig index 1dffd1a195..e786d0651d 100644 --- a/configs/birdland_bav335b_defconfig +++ b/configs/birdland_bav335b_defconfig @@ -24,11 +24,8 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y @@ -66,10 +63,9 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_FAT_WRITE=y CONFIG_LZO=y CONFIG_OF_LIBFDT=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 5d8b72e288..714029e3e4 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 8d451dc862..d0779285e5 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -5,7 +5,6 @@ CONFIG_TARGET_BLANCHE=y CONFIG_VERSION_VARIABLE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MMC=y CONFIG_CMD_SDRAM=y diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index 150a9ea393..b8c87caaf8 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -11,7 +11,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FPGA is not set diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index dc75e7347e..5cc43880a3 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -12,7 +12,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FPGA is not set diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index ff753d1be8..c30e0b0903 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -12,7 +12,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FPGA is not set diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index aa9887ef75..b9506ccb7b 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -13,7 +13,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_PROMPT="boston # " # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FPGA is not set diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index a8fa471836..40e59a4f3b 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -26,7 +26,6 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index f814f2b42c..241adef220 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -26,7 +26,6 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 580b90da4d..798dabdef8 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -29,7 +29,6 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 101cd90c93..e61188223a 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -27,7 +27,6 @@ CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_GO is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig index 32496e4d77..efd065d39f 100644 --- a/configs/caddy2_defconfig +++ b/configs/caddy2_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="CADDY2" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_TSI148=y diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig index 2a1b0f9917..fe86f4c090 100644 --- a/configs/cairo_defconfig +++ b/configs/cairo_defconfig @@ -12,7 +12,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Cairo # " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 CONFIG_CMD_ASKENV=y diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig index 89c9e9c9fb..a02926cb89 100644 --- a/configs/calimain_defconfig +++ b/configs/calimain_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Calimain > " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR="\x0b" +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_GPIO=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 32a1730b00..ed653a71a9 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 91b5647e64..1fb1a2c489 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -48,10 +47,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index fc336103cf..b083f6c424 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -24,11 +24,8 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -57,11 +54,10 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Congatec" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Congatec" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y # CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index a2017acba5..2e067b7b50 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -8,7 +8,6 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index ea729b0155..ee5f80bc60 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -9,17 +9,14 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index f40c0b9afa..c74a006bc9 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -15,7 +15,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -75,11 +74,10 @@ CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index cdeabaa12a..9576c30d88 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -76,11 +75,10 @@ CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index d7052a645c..db22ae5cc6 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -32,7 +32,6 @@ CONFIG_SPL_RTC_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_SF=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index f22a03e1cb..61d184fca3 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -15,7 +15,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index c1e36fa860..197c242e90 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -75,11 +74,10 @@ CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 8df2c4c5c1..225c38cc7d 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -15,7 +15,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 2eb30bda6f..5bac4aa121 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -11,7 +11,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig index 0767e43785..8f0a7f68ce 100644 --- a/configs/cl-som-am57x_defconfig +++ b/configs/cl-som-am57x_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig new file mode 100644 index 0000000000..d37c82cafa --- /dev/null +++ b/configs/cl-som-imx7_defconfig @@ -0,0 +1,53 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_CL_SOM_IMX7=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_SPI_BOOT=y +CONFIG_BOOTDELAY=3 +CONFIG_SPL=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="CL-SOM-iMX7 # " +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_OF_LIBFDT=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 580eaf3e57..fa9f04a9d8 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141 CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -35,8 +34,8 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_MV=y CONFIG_SPI_FLASH=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 540d662dd1..dd539bce0f 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -22,7 +22,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CM-FX6 # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index d0a9f69794..2b302f4f73 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -21,7 +21,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CM-T335 # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig index 4df40d6dfd..8eab8244c8 100644 --- a/configs/cm_t3517_defconfig +++ b/configs/cm_t3517_defconfig @@ -10,7 +10,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CM-T3517 # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y CONFIG_EEPROM_LAYOUT_HELP_STRING="v1, v2, v3" diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig index 382fc1ab3e..916851e7ae 100644 --- a/configs/cm_t35_defconfig +++ b/configs/cm_t35_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CM-T3x # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y CONFIG_EEPROM_LAYOUT_HELP_STRING="v1, v2, v3" diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 27d9063a49..ccf85cad4b 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -23,7 +23,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CM-T43 # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig index db34b2268a..69b1cbfdfe 100644 --- a/configs/cm_t54_defconfig +++ b/configs/cm_t54_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_SATA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CM-T54 # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_EEPROM_LAYOUT=y diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 21d0126a5d..9033a72931 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_COBRA5272=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="COBRA > " +CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 7d1e709d4c..eab8e4fd42 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -25,7 +25,6 @@ CONFIG_SYS_PROMPT="Colibri iMX6 # " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y @@ -52,13 +51,12 @@ CONFIG_PHY_MICREL=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4000 CONFIG_USB_HOST_ETHER=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig index 6877993088..2bba9f0eba 100644 --- a/configs/colibri_imx6_nospl_defconfig +++ b/configs/colibri_imx6_nospl_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_PROMPT="Colibri iMX6 # " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y @@ -41,13 +40,12 @@ CONFIG_PHY_MICREL=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4000 CONFIG_USB_HOST_ETHER=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index d0b6c68146..00e7975652 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_PROMPT="Colibri iMX7 # " # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMTEST=y @@ -56,10 +55,10 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4000 CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index a2c5474f54..9720b5fd35 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -5,7 +5,6 @@ CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="$ " # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 0b5604c851..57a2ecc583 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Colibri T20 # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -47,11 +46,11 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4000 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_DM_VIDEO=y diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 65fa90fa29..1d065e5b79 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -10,7 +10,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_ARCH_MISC_INIT=y CONFIG_SYS_PROMPT="Colibri T30 # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -34,11 +33,11 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4000 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 1ffe861809..aabbffd1c5 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_COLIBRI_VF=y CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND" CONFIG_BOOTDELAY=1 +CONFIG_LOGLEVEL=3 CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y @@ -13,7 +14,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Colibri VFxx # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y @@ -53,11 +53,11 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Toradex" -CONFIG_G_DNL_VENDOR_NUM=0x1b67 -CONFIG_G_DNL_PRODUCT_NUM=0x4000 CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_SYS_CONSOLE_FG_COL=0x00 CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/colorfly_e708_q1_defconfig b/configs/colorfly_e708_q1_defconfig index 9e62d3b870..29f2f58948 100644 --- a/configs/colorfly_e708_q1_defconfig +++ b/configs/colorfly_e708_q1_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-colorfly-e708-q1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 52e9d6c797..b64018ae71 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -15,7 +15,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 3a1aea9eb8..ecbd77b5f2 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -15,7 +15,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 1326f7e2b4..4f0e3f3d55 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -15,7 +15,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index 9575c538ca..971cfc66e8 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -19,7 +19,6 @@ CONFIG_BOOTARGS="root=/dev/sda2 ro quiet" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index b12be650d8..aeeb9f6cfb 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -19,7 +19,6 @@ CONFIG_BOOTARGS="root=/dev/sda2 ro quiet" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig index 400941637c..8e43588927 100644 --- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig index 7e7b2b3c3c..c9165d6f0e 100644 --- a/configs/controlcenterd_36BIT_SDCARD_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig index 614cdb6201..d94feb5c7e 100644 --- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_CMD_BOOTM is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig index da657f142f..07024dc113 100644 --- a/configs/controlcenterd_TRAILBLAZER_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_CMD_BOOTM is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 836e00b2b5..f65e525934 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_GO is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y @@ -46,8 +45,8 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_SCSI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig index 9f3bc3f874..afd46b89c2 100644 --- a/configs/coreboot-x86_defconfig +++ b/configs/coreboot-x86_defconfig @@ -8,7 +8,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_PART=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 705e001457..1034f50202 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -22,7 +22,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -39,7 +38,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_NAND=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_DFU_NAND=y # CONFIG_MMC is not set CONFIG_PHYLIB=y @@ -49,9 +47,9 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 # CONFIG_EFI_LOADER is not set diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index 2d8ebaeb21..49e89f0b67 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -7,7 +7,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index a46dd66696..8668f20941 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -13,7 +13,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 5f3be0ea13..496c5c02d4 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -10,7 +10,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="d2v2> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index 27370e7c0c..824c383bdf 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -1,17 +1,16 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DA850EVM=y -CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_MAC_ADDR_IN_EEPROM=y +CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50" CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -19,24 +18,28 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_BOOTZ is not set -# CONFIG_CMD_IMLS is not set +CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CRC32_VERIFY=y # CONFIG_CMD_EEPROM is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set -# CONFIG_CMD_I2C is not set # CONFIG_CMD_PART is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_TIME is not set # CONFIG_CMD_EXT4 is not set # CONFIG_CMD_FS_GENERIC is not set CONFIG_CMD_DIAG=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_COMPAT=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y # CONFIG_FAT_WRITE is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index bfa5ea1c4b..3089b932f0 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -7,9 +7,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -18,23 +18,29 @@ CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y # CONFIG_CMD_EEPROM is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set -# CONFIG_CMD_I2C is not set # CONFIG_CMD_PART is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_TIME is not set # CONFIG_CMD_EXT4 is not set # CONFIG_CMD_FS_GENERIC is not set +CONFIG_CMD_MTDPARTS=y CONFIG_CMD_DIAG=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_COMPAT=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y # CONFIG_FAT_WRITE is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 24ab89224d..b00eea76d9 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_TARGET_DA850EVM=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -13,11 +15,11 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_BOOTZ is not set +CONFIG_CMD_IMLS=y CONFIG_CRC32_VERIFY=y # CONFIG_CMD_EEPROM is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set -# CONFIG_CMD_I2C is not set # CONFIG_CMD_MMC is not set # CONFIG_CMD_PART is not set # CONFIG_CMD_SPI is not set @@ -28,11 +30,16 @@ CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FAT is not set # CONFIG_CMD_FS_GENERIC is not set CONFIG_CMD_DIAG=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FLASH=y +CONFIG_DM=y +CONFIG_DM_I2C=y +CONFIG_DM_I2C_COMPAT=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y -CONFIG_OF_LIBFDT=y +CONFIG_DM_SPI=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index ba3d478b1e..aedc04b19e 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -39,10 +38,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 0dc4b2af07..0dbbe77aed 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 3074994ec6..abd793c2c1 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y @@ -47,8 +46,8 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=200000000 diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 9d1771d292..beac266189 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -45,8 +44,8 @@ CONFIG_MMC_SDHCI_MV=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_SCSI=y CONFIG_DEBUG_UART_BASE=0xd0012000 diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 9458f8c438..23eaa123a2 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y @@ -44,8 +43,8 @@ CONFIG_NAND_PXA3XX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/dbau1000_defconfig b/configs/dbau1000_defconfig index 503cd595e9..aeef00ba33 100644 --- a/configs/dbau1000_defconfig +++ b/configs/dbau1000_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_PROMPT="DbAu1xx0 # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_RUN is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_SAVEENV is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/dbau1100_defconfig b/configs/dbau1100_defconfig index 23225a0e80..048d1f4966 100644 --- a/configs/dbau1100_defconfig +++ b/configs/dbau1100_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_PROMPT="DbAu1xx0 # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_RUN is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_SAVEENV is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/dbau1500_defconfig b/configs/dbau1500_defconfig index 6d91d5ed40..b1db972a86 100644 --- a/configs/dbau1500_defconfig +++ b/configs/dbau1500_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_PROMPT="DbAu1xx0 # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_RUN is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_SAVEENV is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/dbau1550_defconfig b/configs/dbau1550_defconfig index 6a0c8e8c8a..4e6600d52c 100644 --- a/configs/dbau1550_defconfig +++ b/configs/dbau1550_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_PROMPT="DbAu1xx0 # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_RUN is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_SAVEENV is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/dbau1550_el_defconfig b/configs/dbau1550_el_defconfig index e2e5eef38b..fe1214b3d0 100644 --- a/configs/dbau1550_el_defconfig +++ b/configs/dbau1550_el_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_PROMPT="DbAu1xx0 # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_RUN is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_SAVEENV is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index b46de7d6b9..86f604d096 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -13,6 +13,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 8f3888a6b8..e9eedf17a5 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x680000 CONFIG_CMD_SPL_WRITE_SIZE=0x400 diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 4db9ce73c2..f69fee099f 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -18,7 +18,6 @@ CONFIG_BOOTARGS="root=/dev/sda1 ro quiet" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig new file mode 100644 index 0000000000..5d9eda8c7d --- /dev/null +++ b/configs/dh_imx6_defconfig @@ -0,0 +1,50 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_MX6_DDRCAL=y +CONFIG_TARGET_DHCOMIMX6=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_BOOTDELAY=3 +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_SATA=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_NETDEVICES=y +CONFIG_FEC_MXC=y +CONFIG_USB=y +CONFIG_USB_STORAGE=y +CONFIG_OF_LIBFDT=y diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig index be16346cc6..0da88fbc9a 100644 --- a/configs/difrnce_dit4350_defconfig +++ b/configs/difrnce_dit4350_defconfig @@ -16,7 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index 2342f34e78..beb6baf0ad 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -12,7 +12,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -38,10 +37,10 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Advantech" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Advantech" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index 08d96add3b..597ff0db6e 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -11,7 +11,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -37,10 +36,10 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Advantech" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Advantech" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index d2c085d502..d9813acc89 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 38c05ca9a8..1a3c7cc471 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -5,7 +5,6 @@ CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="DockStar> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_USB=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 53903bf730..716a57b373 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -7,7 +7,6 @@ CONFIG_TARGET_DRA7XX_EVM=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_SPL_LOAD_FIT=y @@ -19,18 +18,15 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -42,9 +38,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y -CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_DWC_AHCI=y @@ -64,10 +58,8 @@ CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_SPL_PHY=y -CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_PMIC_LP873X=y -CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y @@ -90,7 +82,6 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 06d8834119..f7418c7942 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -11,7 +11,6 @@ CONFIG_TARGET_DRA7XX_EVM=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_FIT_IMAGE_POST_PROCESS=y @@ -25,17 +24,14 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_ISO_PARTITION=y @@ -45,9 +41,7 @@ CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm dra76-evm" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SPL_DM=y -CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y -CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_DWC_AHCI=y CONFIG_DFU_MMC=y @@ -66,10 +60,8 @@ CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_SPL_PHY=y -CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_PMIC_LP873X=y -CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y @@ -92,7 +84,6 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 diff --git a/configs/draco_defconfig b/configs/draco_defconfig index f5a2c1b526..b827ea68c7 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -29,7 +29,6 @@ CONFIG_SYS_PROMPT="U-Boot# " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -66,7 +65,8 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 +CONFIG_USB_ETHER=y diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 2224b3850a..a85aa74207 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -9,10 +9,8 @@ CONFIG_BOOTARGS="console=ttyMSM0,115200n8" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="dragonboard410c => " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y -CONFIG_CMD_UNZIP=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 5bcdfd0277..1130faa392 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -5,7 +5,6 @@ CONFIG_IDENT_STRING="\nMarvell-DreamPlug" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_SF=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 5f0ef7db7b..987a924b7e 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_DS109=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 96bdbeb0ea..eb3fe759e8 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -15,7 +15,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y @@ -38,8 +37,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig index 645bbbc8d0..6c5908ddbf 100644 --- a/configs/dserve_dsrv9703c_defconfig +++ b/configs/dserve_dsrv9703c_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-dserve-dsrv9703c" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig index 6feb4861a7..feec2cfb1a 100644 --- a/configs/duovero_defconfig +++ b/configs/duovero_defconfig @@ -10,7 +10,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y # CONFIG_SPL_I2C_SUPPORT is not set CONFIG_SYS_PROMPT="duovero # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig index 41248189e3..a7ec4da21b 100644 --- a/configs/e2220-1170_defconfig +++ b/configs/e2220-1170_defconfig @@ -7,7 +7,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (E2220-1170) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -33,10 +32,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig index 7c9f78d8d6..9d1f191ca1 100644 --- a/configs/ea20_defconfig +++ b/configs/ea20_defconfig @@ -13,7 +13,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ea20 > " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index 979dd0e171..dd382c8d63 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -7,6 +7,7 @@ CONFIG_BOOTDELAY=5 # CONFIG_CONSOLE_MUX is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="\nEB+CPU5282> " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index bb5f2d1aaa..84feb1a4c6 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418" CONFIG_BOOTDELAY=5 # CONFIG_CONSOLE_MUX is not set # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig index 2bf48e0199..dced115a43 100644 --- a/configs/eco5pk_defconfig +++ b/configs/eco5pk_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL=y # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ECO5-PK # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/ecovec_defconfig b/configs/ecovec_defconfig index 9b045819b8..5d65e9dc30 100644 --- a/configs/ecovec_defconfig +++ b/configs/ecovec_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/edb9315a_defconfig b/configs/edb9315a_defconfig index de952b7e9a..2d1173d854 100644 --- a/configs/edb9315a_defconfig +++ b/configs/edb9315a_defconfig @@ -9,6 +9,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="EDB9315A> " CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_USB=y diff --git a/configs/edison_defconfig b/configs/edison_defconfig index d58700c204..dabbee66bd 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -5,7 +5,6 @@ CONFIG_TARGET_EDISON=y CONFIG_SMP=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_ENV_CALLBACK=y @@ -32,10 +31,10 @@ CONFIG_DFU_RAM=y CONFIG_DM_PCI_COMPAT=y CONFIG_USB_DWC3_GADGET=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Intel" +CONFIG_USB_GADGET_VENDOR_NUM=0x8087 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0a99 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Intel" -CONFIG_G_DNL_VENDOR_NUM=0x8087 -CONFIG_G_DNL_PRODUCT_NUM=0x0a99 # CONFIG_USB_HOST_ETHER is not set CONFIG_FAT_WRITE=y CONFIG_SHA1=y diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 8e6b9d2421..14540ca371 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="EDMiniV2> " +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig index 0e20e72140..ed4faee030 100644 --- a/configs/efi-x86_defconfig +++ b/configs/efi-x86_defconfig @@ -9,7 +9,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTM is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y CONFIG_CMD_SF=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index 66f0d63a35..e86cc8dcde 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -9,6 +9,5 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="ESPRESSO7420 # " # CONFIG_AUTOBOOT is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set diff --git a/configs/espt_defconfig b/configs/espt_defconfig index 081d4b7ec1..520bc9fa53 100644 --- a/configs/espt_defconfig +++ b/configs/espt_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 148d4218c0..f068ce873e 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -29,7 +29,6 @@ CONFIG_SYS_PROMPT="U-Boot# " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -66,7 +65,8 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 +CONFIG_USB_ETHER=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index e5fb0d2215..3be8add711 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -11,6 +11,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-( CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_UNZIP=y # CONFIG_CMD_FPGA is not set diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 48007b8955..75c62a9a00 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -9,7 +9,6 @@ CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw" CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_PRE_CON_BUF_ADDR=0x1e720000 # CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_I2C=y CONFIG_REGMAP=y CONFIG_CLK=y diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 4323b77768..0e8594cbdd 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -8,7 +8,6 @@ CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_ARCH_EARLY_INIT_R=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y CONFIG_REGMAP=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 5a53951314..783683aa45 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_SPL_STACK_R=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -44,11 +43,10 @@ CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x310a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x310a CONFIG_SPL_TINY_MEMSET=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index 5a658a1495..b226f66478 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set @@ -44,9 +43,8 @@ CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_ERRNO_STR=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 5294ba9f5f..e944f979ba 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -66,11 +65,10 @@ CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 7bec001786..3b8b1047a3 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -10,7 +10,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y @@ -22,12 +21,17 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3328=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_BASE=0xFF130000 @@ -45,10 +49,9 @@ CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x330a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x330a CONFIG_USE_TINY_PRINTF=y CONFIG_ERRNO_STR=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 7a0bd4aec9..42df743cbe 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index 7036f433ee..239676b2a3 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -5,14 +5,11 @@ CONFIG_TARGET_EVB_RV1108=y CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_DEBUG_UART=y # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x62000000 CONFIG_FASTBOOT_BUF_SIZE=0x08000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=1 -# CONFIG_CMD_IMLS is not set +CONFIG_RANDOM_UUID=y CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -49,9 +46,8 @@ CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x110a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x110a CONFIG_ERRNO_STR=y diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index 96a07defce..008776e640 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -15,7 +15,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -69,11 +68,10 @@ CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 82da6016e6..bd7e1a0c65 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -73,13 +72,11 @@ CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 94b9209cd7..262048843f 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_ATF_SUPPORT=y CONFIG_SPL_ATF_TEXT_BASE=0x00010000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig index ba3cd06434..29da42cb37 100644 --- a/configs/flea3_defconfig +++ b/configs/flea3_defconfig @@ -7,6 +7,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="flea3 U-Boot > " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_SPI=y diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index 99ef75b3b0..f987a3f17f 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -17,7 +17,6 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 514e3c5220..c1849e38bb 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -13,7 +13,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig index b6d0a003ce..43a6c12708 100644 --- a/configs/ge_b450v3_defconfig +++ b/configs/ge_b450v3_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6q-b450v3.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig index 2ebfec036b..4e22e9579a 100644 --- a/configs/ge_b650v3_defconfig +++ b/configs/ge_b650v3_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6q-b650v3.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig index 1793a064a0..cb5899dc3a 100644 --- a/configs/ge_b850v3_defconfig +++ b/configs/ge_b850v3_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6q-b850v3.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index 19255fb209..3baad0a5b7 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -6,7 +6,6 @@ CONFIG_TARGET_GEEKBOX=y CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" CONFIG_DEBUG_UART=y # CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_CMD_IMLS is not set CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 73b36d7381..f6bf782a71 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="GoFlexHome> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index d887ee3bd3..bc3299033a 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig index a2ebfe58c9..1ba595d583 100644 --- a/configs/gplugd_defconfig +++ b/configs/gplugd_defconfig @@ -4,7 +4,6 @@ CONFIG_IDENT_STRING="\nMarvell-gplugD" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_USB=y diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig index a651fe509b..35543c7262 100644 --- a/configs/gt90h_v4_defconfig +++ b/configs/gt90h_v4_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index f5dc29e89a..c5afd4bf23 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -10,7 +10,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 086417f71c..3fdd5f9af6 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 74aa2ef566..e075da7629 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -30,7 +30,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL_NAND_OFS=0x1100000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_FLASH is not set @@ -63,11 +62,13 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Gateworks" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Gateworks" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 7bbdd500a7..66af861468 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -30,7 +30,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL_NAND_OFS=0x1100000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_FLASH is not set @@ -67,11 +66,13 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Gateworks" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Gateworks" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index aaedf93eea..5b3c90797c 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -31,7 +31,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL_NAND_OFS=0x1100000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_FLASH is not set @@ -66,11 +65,13 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Gateworks" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Gateworks" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/h2200_defconfig b/configs/h2200_defconfig index 5d2189e589..07c0bff408 100644 --- a/configs/h2200_defconfig +++ b/configs/h2200_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_PROMPT="> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_SAVEENV is not set @@ -29,3 +28,6 @@ CONFIG_CMD_PING=y # CONFIG_CMD_MISC is not set # CONFIG_MMC is not set CONFIG_PXA_SERIAL=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_ETHER=y diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig index cd599add77..e71dd1f452 100644 --- a/configs/h8_homlet_v2_defconfig +++ b/configs/h8_homlet_v2_defconfig @@ -11,7 +11,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-allwinner-h8homlet-v2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 4d7882ce0d..1a4df1e8d2 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -7,7 +7,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index 552bdcffad..20a7b71737 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -10,7 +10,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n" CONFIG_AUTOBOOT_KEYED_CTRLC=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 8a7a1be081..66aa49c894 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -8,8 +8,6 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_CMD_IMLS is not set -CONFIG_CMD_UNZIP=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig index 99d71e7db3..32a219c04b 100644 --- a/configs/hrcon_defconfig +++ b/configs/hrcon_defconfig @@ -14,6 +14,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_FPGAD=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig index 123c41a8f4..f584b1ca54 100644 --- a/configs/hrcon_dh_defconfig +++ b/configs/hrcon_dh_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_FPGAD=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index 85a2b9d773..a04cfee5f0 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -8,7 +8,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="hsdk# " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 73e82bc4cd..81883aa197 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -15,7 +15,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index 416d7712c7..031937e66f 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index 0c3d226b8c..c593c2caf2 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index 5c1dc322ee..05c255647b 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index 6beabdad33..b1dbbeb7af 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -14,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig index 907b6cd4df..2287431bb3 100644 --- a/configs/iNet_D978_rev2_defconfig +++ b/configs/iNet_D978_rev2_defconfig @@ -17,7 +17,6 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 0676fb545f..6685c63aba 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ib62x0 => " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index f0c663ddd0..32db9d7d53 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -14,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 14e04d5faa..728107087d 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -5,7 +5,6 @@ CONFIG_IDENT_STRING=" Iomega iConnect" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="iconnect => " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_USB=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index 947cda2adb..ac2a945fed 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -13,6 +13,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n" CONFIG_AUTOBOOT_DELAY_STR="ids" +CONFIG_CMD_IMLS=y CONFIG_CMD_ENV_FLAGS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig index 6e3dcb08ca..3cff057807 100644 --- a/configs/igep0032_defconfig +++ b/configs/igep0032_defconfig @@ -13,7 +13,6 @@ CONFIG_SPL=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_ONENAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index c504e75ad8..0445b977bb 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -13,7 +13,6 @@ CONFIG_SPL=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_ONENAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig index 02969da909..b1f48f38a3 100644 --- a/configs/imgtec_xilfpga_defconfig +++ b/configs/imgtec_xilfpga_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="MIPSfpga # " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_SAVEENV is not set CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set diff --git a/configs/imx31_phycore_defconfig b/configs/imx31_phycore_defconfig index 652fe8662c..7b17b663a4 100644 --- a/configs/imx31_phycore_defconfig +++ b/configs/imx31_phycore_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_IMX31_PHYCORE=y CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="uboot> " +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/imx31_phycore_eet_defconfig b/configs/imx31_phycore_eet_defconfig index 83ec6254b6..b67dcd3d0a 100644 --- a/configs/imx31_phycore_eet_defconfig +++ b/configs/imx31_phycore_eet_defconfig @@ -4,6 +4,7 @@ CONFIG_VIDEO=y CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_SPI=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 64757ad30e..8018198f09 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="i.MX6 Logic # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 1bc9a06fc1..28e4ce9b7b 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -21,7 +21,6 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y @@ -37,7 +36,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_LIST="imx6q-icore imx6dl-icore" CONFIG_ENV_IS_IN_MMC=y -# CONFIG_BLK is not set CONFIG_SYS_I2C_MXC=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index e82debec12..c341b17daf 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index d26a463ff6..fbe96512c6 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y @@ -34,7 +33,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_LIST="imx6q-icore-rqs imx6dl-icore-rqs" CONFIG_ENV_IS_IN_MMC=y -# CONFIG_BLK is not set CONFIG_SYS_I2C_MXC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index d3291278c4..7c79873006 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index d6edfbee7d..d6038c11c5 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index be1f23d569..67fa9a0389 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 760bb2e5aa..c673d93089 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 67026b8cd5..e481151bf3 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index a8905ae8c3..1dc9b55860 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig index a596e090d7..54e3d0eae4 100644 --- a/configs/inet86dz_defconfig +++ b/configs/inet86dz_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-inet86dz" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig index 6376f5f7b2..5d6f858616 100644 --- a/configs/inet97fv2_defconfig +++ b/configs/inet97fv2_defconfig @@ -14,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet97fv2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig index 1b5dc9bbb9..c765e686d3 100644 --- a/configs/inet98v_rev2_defconfig +++ b/configs/inet98v_rev2_defconfig @@ -16,7 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig index 3265a440c3..3a9b4bf830 100644 --- a/configs/inet9f_rev03_defconfig +++ b/configs/inet9f_rev03_defconfig @@ -14,7 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig index 1d0fe8f1b8..599db54253 100644 --- a/configs/inet_q972_defconfig +++ b/configs/inet_q972_defconfig @@ -15,7 +15,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-inet-q972" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 2bdf0e4bc7..bac0d95b76 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -10,7 +10,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index ce946e524f..c9672e8392 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index 43115f538d..3fa4d11f6d 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index 067a3c5e45..33bd086803 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index b0e26237c2..ddf6814970 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Integrator-AP # " +CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index 8f315fb357..a630bcdc0c 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev= # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index 47b44f19fb..ebcd3ec346 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev= # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index f39f021d89..17811348b3 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev= # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index c9c4d98d1f..74cbce2107 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev= # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Integrator-CP # " +CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_MMC is not set diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig index e9c82baf76..a462d82008 100644 --- a/configs/ipam390_defconfig +++ b/configs/ipam390_defconfig @@ -15,7 +15,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00180000 CONFIG_CMD_SPL_WRITE_SIZE=0x400 diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index 6882144707..680c70f0eb 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 1e3e4bed6a..c1efed0a2d 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -49,10 +48,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index fed6addab6..7c5b0bcc8c 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -11,15 +11,12 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_DTB_RESELECT=y -CONFIG_FIT_EMBED=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set @@ -30,6 +27,8 @@ CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index 43f9bd4abd..97b8c06578 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 2b29bf4491..90a647afb3 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -11,15 +11,12 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_DTB_RESELECT=y -CONFIG_FIT_EMBED=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set @@ -30,6 +27,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_OF_LIST="keystone-k2g-generic keystone-k2g-evm keystone-k2g-ice" +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y CONFIG_DM=y # CONFIG_BLK is not set CONFIG_DM_MMC=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 52c1c63141..f49afd18bd 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 80546ecfc9..9db05315ca 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -11,15 +11,12 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_DTB_RESELECT=y -CONFIG_FIT_EMBED=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set @@ -30,6 +27,8 @@ CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index f9f2f2712f..5b0a68ed37 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 732c9d2f7f..2593a0c8e9 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -11,15 +11,12 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_DTB_RESELECT=y -CONFIG_FIT_EMBED=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set @@ -30,6 +27,8 @@ CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig index d9c2efcf7c..0ddf64c544 100644 --- a/configs/kc1_defconfig +++ b/configs/kc1_defconfig @@ -12,14 +12,11 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="kc1 # " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_FASTBOOT_BUF_SIZE=0x2000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -42,8 +39,7 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_OF_LIBFDT=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index dd67dcd492..c39d94949d 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 223479cbf8..a956e42abe 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index f9d04d0ce9..4a1c874456 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index 2c0d7a0951..e1f6a2486d 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -12,7 +12,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 5165496f54..68d7aa6694 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 31c571890b..71ed2ea6aa 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 358e0cd5a5..44bb2dbda7 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig index d7150537b0..66dbf62311 100644 --- a/configs/kmlion1_defconfig +++ b/configs/kmlion1_defconfig @@ -12,7 +12,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 42becd939f..1348973a46 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index c16bef6cf1..5b405085d8 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig index c6924d536e..8d06ed4d50 100644 --- a/configs/kmsugp1_defconfig +++ b/configs/kmsugp1_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index e95aafcf0c..aa63f8354d 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig index aad7b4d893..d93e839bde 100644 --- a/configs/kmsuv31_defconfig +++ b/configs/kmsuv31_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 5547920717..124cbe52aa 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index 06d207ca12..d4dd65f432 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig index 9b63a940e6..46e2345e6c 100644 --- a/configs/kmvect1_defconfig +++ b/configs/kmvect1_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 119533f49e..5def33bac3 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index a42f5e0efb..7af01e26d5 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -13,7 +13,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_SPL_STACK_R=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -44,11 +43,10 @@ CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x310a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x310a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index 50a88e5159..f4b8ccdf2f 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTARGS="root=/dev/null console=ttySC4,115200" CONFIG_VERSION_VARIABLE=y CONFIG_SYS_PROMPT="KZM-A9-GT# " CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 37b9abfe92..5072045e89 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 589e8cf880..209250a73d 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -10,7 +10,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n" CONFIG_AUTOBOOT_STOP_STR="l" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index c7ee7b3f97..959180c7c8 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -23,7 +23,6 @@ CONFIG_BOOTSTAGE=y CONFIG_SPL_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_BOOTSTAGE_FDT=y -CONFIG_ENV_IS_IN_MMC=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_ARCH_EARLY_INIT_R=y CONFIG_SPL=y @@ -38,7 +37,6 @@ CONFIG_SPL_ATF_TEXT_BASE=0x10000 CONFIG_TPL=y CONFIG_TPL_BOOTROM_SUPPORT=y CONFIG_TPL_DRIVERS_MISC_SUPPORT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index d30cf67ec0..c34d3059c1 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -14,7 +14,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 777a451854..b6930be338 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -13,7 +13,6 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 04d36581c8..46aa7bfe70 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1021AIOT=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 0b8014683f..2592bfe085 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -6,6 +6,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 +CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 91b7ace4f4..b25fab7ccf 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index a1f6ac43fe..7d46f3adbe 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -13,6 +13,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index d177edf39d..30dccea6fa 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -26,6 +26,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index b45e05db62..530e0f58d6 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -14,6 +14,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 55601cbaf0..dec80a1688 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -12,6 +12,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 5538d2509c..acfb0454de 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -13,6 +13,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 77a430dbd6..23a1217e0c 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -14,7 +14,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index c9f7223562..467506023a 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index f0da0ba8fa..879639c54f 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -24,7 +24,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 20f209280d..f2bcd52bad 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -15,6 +15,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 777e61bf8d..1230d8711d 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index d1dda1cd66..8062f56cd4 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -15,6 +15,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index e415840042..e06cad800b 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -16,7 +16,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index e0483e0159..3f412af981 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 6732381e4d..29fe411429 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index b1267b684d..5b7cf447c8 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -26,7 +26,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 9265fb39e0..c1c837e05a 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -9,6 +9,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 265550bf9a..89447e1e20 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -10,6 +10,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 28791cfc52..d0880a2297 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 015340ee85..766e3a949e 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -9,6 +9,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 892aef1a2f..c4dfd1b6cc 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -11,7 +11,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index a21589dc37..cf0f8700e0 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index f432ebe35d..27a933f1f0 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -23,7 +23,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 80ab13be84..d6871c845f 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 9c7e16dbf1..5113b12f7b 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 5c8599ed0c..aeee86bf70 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index e5310febdb..ab2f082f6a 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -16,12 +16,14 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_SPL=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index bdd7ea710e..c02af9ade8 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -24,6 +24,7 @@ CONFIG_SPL_CRYPTO_SUPPORT=y CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index f6ea06bfb0..eac931b9b6 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043ARDB=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_FSL_LS_PPA=y +CONFIG_SPL_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,10 +18,12 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_SPL=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 5b2ca9273b..54c61046dc 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index abcf6857de..20e15e88b0 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -9,6 +9,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 17a53ef6b0..6efa766cf7 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -10,6 +10,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 2b7ffce267..722114bfa5 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 011e7108e0..8772399526 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -10,7 +10,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index c150807f2b..5b3cd24e85 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index a91b4b9ca1..a54a8ebd67 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 8c2213d486..c339f2d5c3 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 1deabfab58..dd6febb533 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -11,7 +11,6 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 821fad8152..03700ac8b1 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -10,7 +10,6 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 600e999ece..4dd1b01e22 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -16,7 +16,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_CRYPTO_SUPPORT=y CONFIG_SPL_HASH_SUPPORT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 1d7ed3b23a..7f82d4a1dc 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 4b0d604fa0..6a542ed5f8 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -1,24 +1,24 @@ CONFIG_ARM=y CONFIG_TARGET_LS1088AQDS=y -# CONFIG_SYS_MALLOC_F is not set -CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" -CONFIG_FIT=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT" +# CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y -CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_NETDEVICES=y CONFIG_E1000=y @@ -27,7 +27,6 @@ CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_FSL_LS_PPA=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 2d5a134261..52b10af96a 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -1,24 +1,24 @@ CONFIG_ARM=y CONFIG_TARGET_LS1088ARDB=y -# CONFIG_SYS_MALLOC_F is not set -CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" -CONFIG_FIT=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT" +# CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y -CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_NETDEVICES=y CONFIG_E1000=y @@ -27,7 +27,6 @@ CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_FSL_LS_PPA=y diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig index 35016ce61c..516c8b9de5 100644 --- a/configs/ls2080a_emu_defconfig +++ b/configs/ls2080a_emu_defconfig @@ -11,7 +11,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig index 23f3d42ee8..94ecdbae2e 100644 --- a/configs/ls2080a_simu_defconfig +++ b/configs/ls2080a_simu_defconfig @@ -11,7 +11,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set CONFIG_CMD_GREPENV=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index c80a83708b..2937ba9fa4 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index ef1d9dcd3b..58eea7f372 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 4a462ce77e..a8e4fdd509 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index c44ac48c48..0fd3fee3b6 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 4545152516..0f248a7833 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index 5b8e1aaafb..1848d3a0c1 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -11,7 +11,6 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 05c799dfaf..eeb0d49ecc 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080ARDB=y +CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" @@ -8,21 +9,18 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_QSPI_BOOT=y -CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTDELAY=10 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y -CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -CONFIG_FSL_CAAM=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_NETDEVICES=y @@ -41,8 +39,6 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_STORAGE=y -CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_SECURE_BOOT=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 39c1d526c6..115a793453 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -11,7 +11,6 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 6d140d7471..4df0a21298 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -11,7 +11,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_SF=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 8da130a179..5f2ac4fc99 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -11,7 +11,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_SF=y diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig index 94c205ec00..ee9c782115 100644 --- a/configs/m28evk_defconfig +++ b/configs/m28evk_defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig index 3e001919fa..3c5b0c8501 100644 --- a/configs/m53evk_defconfig +++ b/configs/m53evk_defconfig @@ -19,7 +19,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig index cbe76b624f..7fbeae8f66 100644 --- a/configs/ma5d4evk_defconfig +++ b/configs/ma5d4evk_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200" @@ -19,7 +18,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y @@ -47,11 +45,12 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="AriesEmbedded" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_ATMEL_USBA=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="AriesEmbedded" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y # CONFIG_EFI_LOADER is not set diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index ab61a3c90a..57c06115a9 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -6,6 +6,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " # CONFIG_AUTOBOOT is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 733ddaf79d..95087d1d18 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -7,6 +7,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " # CONFIG_AUTOBOOT is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 39e875a899..96e374f1ad 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -5,6 +5,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " # CONFIG_AUTOBOOT is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 99cf08381a..18a9a759fc 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -6,6 +6,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " # CONFIG_AUTOBOOT is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 47b190f232..18c827e51b 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -8,7 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 131d5e1d8e..febcee0260 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -14,7 +14,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_SF=y @@ -32,8 +31,8 @@ CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index dd5511f910..0ecc926777 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 61169c39d5..eacd8dc518 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -13,7 +13,6 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index 972cb637f5..2bfff28f12 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="mcx # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index a870375905..e4fe8517fc 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 1cd23e7a0e..0367b0cf09 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -10,7 +10,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_SF=y diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index 7eca4d47ff..306b225a15 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -10,7 +10,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index 910d09e969..3da35cbdf6 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 953801e6d0..faca66b2d1 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x2c060000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot-mONStR> " +CONFIG_CMD_IMLS=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GPIO=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 7b237abfca..fc2564cd7d 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -20,7 +20,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index b0437e13a7..7478f9b14e 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -69,11 +68,10 @@ CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 00f6945867..2d39179add 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -9,7 +9,6 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 9b358a435e..1c2a993d4a 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index d8069168c3..d02dc11bf3 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -5,7 +5,6 @@ CONFIG_USB2_VBUS_PIN="PH12" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index 286900dcbe..1e56d47fed 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -5,7 +5,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig index b933626611..2c20186b78 100644 --- a/configs/mpc8308_p1m_defconfig +++ b/configs/mpc8308_p1m_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=5 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/mpr2_defconfig b/configs/mpr2_defconfig index 8dd63ab5d7..2d6fb7d39b 100644 --- a/configs/mpr2_defconfig +++ b/configs/mpr2_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/ms7720se_defconfig b/configs/ms7720se_defconfig index 24c0598269..068eb5d274 100644 --- a/configs/ms7720se_defconfig +++ b/configs/ms7720se_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/ms7722se_defconfig b/configs/ms7722se_defconfig index cb6f3bb756..61e6274932 100644 --- a/configs/ms7722se_defconfig +++ b/configs/ms7722se_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/ms7750se_defconfig b/configs/ms7750se_defconfig index 4f51c40975..8dcf2a2b6d 100644 --- a/configs/ms7750se_defconfig +++ b/configs/ms7750se_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTARGS="console=ttySC0,38400" # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index 316e4f0b84..55d39a01b4 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL=y # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="mt_ventoux => " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADMK=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index c0f0131547..0fd4514c37 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -11,7 +11,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 22dc914fc2..9fa4d9f98c 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_I2C=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index d25ebb1b8b..95db6c610e 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -11,7 +11,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_I2C=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index ca62ae827b..9afe651872 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index 3d6d7e156b..628c11d851 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -10,7 +10,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index fb157e7c0a..47774b736f 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index e75a82c199..1ea58eee95 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -5,7 +5,6 @@ CONFIG_BOOTDELAY=1 CONFIG_DEFAULT_FDT_FILE="imx25-pdk.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -15,7 +14,8 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_FS_FAT=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index c53cc59f14..b18d9f9df4 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index 999cb3482b..3d91202385 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -15,7 +15,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 324d5666d6..9b00372c27 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 3dfb540987..07ae3e68d5 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -14,7 +14,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx31ads_defconfig b/configs/mx31ads_defconfig index 098a763550..eb7c8d42ec 100644 --- a/configs/mx31ads_defconfig +++ b/configs/mx31ads_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_MX31ADS=y CONFIG_BOOTDELAY=3 +CONFIG_CMD_IMLS=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig index 2b70da564e..5282aa4edc 100644 --- a/configs/mx31pdk_defconfig +++ b/configs/mx31pdk_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_BOOTDELAY=1 CONFIG_SPL=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_NAND=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig index 3b9d10f411..4ef54ddcfc 100644 --- a/configs/mx35pdk_defconfig +++ b/configs/mx35pdk_defconfig @@ -5,6 +5,7 @@ CONFIG_BOOTDELAY=1 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index f30d9200d7..386eec4aa9 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -10,7 +10,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_FUSE=y CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig index 20da6e2f3c..51941b9d2f 100644 --- a/configs/mx53ard_defconfig +++ b/configs/mx53ard_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_DEFAULT_FDT_FILE="imx53-ard.dtb" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 659d5e8249..6c414874d5 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -8,7 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg" CONFIG_BOOTDELAY=1 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig index 91fe1e8922..0134b43de1 100644 --- a/configs/mx53evk_defconfig +++ b/configs/mx53evk_defconfig @@ -4,7 +4,6 @@ CONFIG_TARGET_MX53EVK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index b431c89eef..a3efa52ef2 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -8,10 +8,8 @@ CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MMC=y CONFIG_CMD_SATA=y CONFIG_CMD_USB=y diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig index ec2ba01d66..537fa99702 100644 --- a/configs/mx53smd_defconfig +++ b/configs/mx53smd_defconfig @@ -5,7 +5,6 @@ CONFIG_TARGET_MX53SMD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 5490e3546b..4d334c3275 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -18,7 +18,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y @@ -34,6 +33,5 @@ CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index 7219219b29..6051e7d036 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig index c51445437e..4160388b6f 100644 --- a/configs/mx6dlarm2_lpddr2_defconfig +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index c31d7f1dbb..f227602eff 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig index 5894d62620..8eb3c35de9 100644 --- a/configs/mx6qarm2_lpddr2_defconfig +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 57aba7e6d0..1c68839755 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -10,11 +10,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -49,10 +46,11 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Boundary" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Boundary" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 8283189315..cbe77ab9ec 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -48,11 +47,11 @@ CONFIG_PHYLIB=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y # CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index ad5d448539..9449693014 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -23,7 +23,6 @@ CONFIG_SPL_USB_GADGET_SUPPORT=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 # CONFIG_CMD_FLASH is not set @@ -52,11 +51,11 @@ CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y # CONFIG_VIDEO_SW_CURSOR is not set diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 1c2894226c..16e2ccafde 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -8,11 +8,11 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index f8dcb753de..020d19f271 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -9,7 +9,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 4d4f273f50..689fe794ed 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -17,10 +17,10 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index 9ddd9d7445..a7daafcc5c 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 5a1ebe3136..b8948d8563 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -9,7 +9,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index 5ae12d45bd..ca8453b057 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 2ca6b8f8ad..24583c4072 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -9,7 +9,6 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 77d545f204..c431b24702 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index c55b96c074..be801f3f05 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index db255f8d72..693f9ab311 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index ec33429edf..115c926091 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index ec35804ea2..d6511ffc09 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 795c4f2b71..1917f4bbab 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -15,7 +15,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -64,11 +63,11 @@ CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_ERRNO_STR=y diff --git a/configs/mx7dsabresd_secure_defconfig b/configs/mx7dsabresd_secure_defconfig index bd68831db7..416ddcfe73 100644 --- a/configs/mx7dsabresd_secure_defconfig +++ b/configs/mx7dsabresd_secure_defconfig @@ -16,7 +16,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -66,11 +65,11 @@ CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_ERRNO_STR=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index d630113db1..0470fbd4ed 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_MX7ULP_EVK=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 347cc0022f..9b782f2436 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -5,7 +5,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index b1fbc4d512..5d4915de74 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -7,7 +7,6 @@ CONFIG_DRAM_ODT_EN=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index abe93f6706..7a37582f11 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -9,7 +9,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index c7db07a10a..b8e089176f 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -6,7 +6,6 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index 0a3dbae32c..11eb3ab13b 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index cc49aaf207..ed30708f90 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 736f352fdd..09bb8f1e93 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nas220> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index e47c553bbe..3e3150042d 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -10,7 +10,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="2big2> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index 9eb2f3cf09..7665c78d3f 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -14,7 +14,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index c3e689bbb5..edd279ad6f 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -10,7 +10,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 92aaa66358..2454c4f380 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -10,7 +10,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 3ef8c8d3d1..6f67c5db63 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -10,7 +10,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 2df688c8e8..cdcc09641e 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -10,7 +10,6 @@ CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 50e6b70bc9..6a6ea29ec4 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -10,11 +10,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -46,10 +43,11 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Boundary" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Boundary" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 61e5ea4e21..ea8831665b 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -10,11 +10,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -46,10 +43,11 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Boundary" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Boundary" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 9dbb7181ee..ceea2a4ea7 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -10,11 +10,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -47,10 +44,11 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Boundary" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Boundary" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 5478390fd8..75d4ef1ea9 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -10,11 +10,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -47,10 +44,11 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Boundary" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Boundary" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 0188168642..960f488648 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -10,11 +10,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -46,10 +43,11 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Boundary" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Boundary" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 51f1f91be8..eb7f40a5b4 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -10,11 +10,8 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -46,10 +43,11 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Boundary" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Boundary" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index 44f8759adb..8b4d1d673d 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_PROMPT="Nokia RX-51 # " CONFIG_AUTOBOOT_KEYED=y CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_SAVEENV is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 2921525f9f..81e2e14192 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -22,7 +22,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set @@ -48,6 +47,8 @@ CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 6a841698f8..3f592506bf 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nsa310s => " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 83eb12b2c1..12fe5f77c6 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyARC0,115200n8" CONFIG_SYS_PROMPT="nsim# " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 91e4e39d71..6c0dba7c6d 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyARC0,115200n8" CONFIG_SYS_PROMPT="nsim# " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index c630ab7007..bb31adb381 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyARC0,115200n8" CONFIG_SYS_PROMPT="nsim# " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 9d31f83733..a2cc238433 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -9,7 +9,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyARC0,115200n8" CONFIG_SYS_PROMPT="nsim# " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 29d918d974..64687fb4f4 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -14,7 +14,6 @@ CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000 CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -65,11 +64,11 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_DM_VIDEO=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 52e0a67dc0..f7f8016644 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index a5e47c84f2..5481188e64 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -10,7 +10,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_PROMPT="ODROID-XU3 # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y @@ -43,10 +42,10 @@ CONFIG_USB_DWC3_GADGET=y CONFIG_USB_DWC3_PHY_SAMSUNG=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Samsung" +CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Samsung" -CONFIG_G_DNL_VENDOR_NUM=0x04e8 -CONFIG_G_DNL_PRODUCT_NUM=0x6601 CONFIG_USB_HOST_ETHER=y CONFIG_VIDEO_BRIDGE=y CONFIG_ERRNO_STR=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 0dc1a250c5..bca423e445 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Odroid # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y @@ -56,11 +55,11 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Samsung" +CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Samsung" -CONFIG_G_DNL_VENDOR_NUM=0x04e8 -CONFIG_G_DNL_PRODUCT_NUM=0x6601 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_ERRNO_STR=y diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index cf888f3491..9e7e1545d0 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -9,10 +9,7 @@ CONFIG_SPL=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 CONFIG_CMD_ASKENV=y @@ -48,10 +45,10 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="TI" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="TI" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 962ffa0729..8c5b2d7c94 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MPUCLK=720 CONFIG_TARGET_OMAP3_EVM=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -13,12 +12,10 @@ CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_SPL_MTD_SUPPORT=y CONFIG_SYS_PROMPT="OMAP3_EVM # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -52,10 +49,11 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x5678 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0x5678 +CONFIG_USB_ETHER=y CONFIG_FAT_WRITE=y CONFIG_BCH=y CONFIG_OF_LIBFDT=y diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig index 5e35efa417..af60ca84c2 100644 --- a/configs/omap3_ha_defconfig +++ b/configs/omap3_ha_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL=y # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_I2C=y diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index b8f25883d8..bb7875f5a6 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -3,22 +3,18 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_OMAP3_LOGIC=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 # CONFIG_CMD_EEPROM is not set @@ -46,8 +42,8 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="TI" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="TI" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 +CONFIG_USB_ETHER=y CONFIG_BCH=y diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig index 5d1cbe993a..4f6f32e210 100644 --- a/configs/omap3_overo_defconfig +++ b/configs/omap3_overo_defconfig @@ -2,19 +2,16 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_OMAP3_OVERO=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_STACK_R=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Overo # " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 CONFIG_CMD_ASKENV=y diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig index ae534a2c3e..2765f02d36 100644 --- a/configs/omap3_pandora_defconfig +++ b/configs/omap3_pandora_defconfig @@ -8,7 +8,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SYS_PROMPT="Pandora # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig index e0aa04b8bb..e50de33d84 100644 --- a/configs/omap3_zoom1_defconfig +++ b/configs/omap3_zoom1_defconfig @@ -7,7 +7,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index b2d6c0aec7..d208d0ca8e 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL=y # CONFIG_SPL_EXT_SUPPORT is not set # CONFIG_SPL_I2C_SUPPORT is not set CONFIG_SPL_OS_BOOT=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 13c4dd5b38..c92b842e8d 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y # CONFIG_SPL_I2C_SUPPORT is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 6e860ef5e3..acf8962201 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y @@ -49,10 +48,10 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0403 +CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0403 -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_FAT_WRITE=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index c95134bcf9..973c16fc09 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CRC32_VERIFY=y # CONFIG_CMD_EEPROM is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index b2a0e04d36..e7c49f2c8f 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -5,8 +5,8 @@ CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" CONFIG_BOOTDELAY=3 +CONFIG_LOGLEVEL=3 # CONFIG_DISPLAY_BOARDINFO is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 8b1d35edd1..c9233e062d 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -5,8 +5,8 @@ CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" CONFIG_BOOTDELAY=3 +CONFIG_LOGLEVEL=3 # CONFIG_DISPLAY_BOARDINFO is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 4cc0205629..5baada9216 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -5,8 +5,8 @@ CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" CONFIG_BOOTDELAY=3 +CONFIG_LOGLEVEL=3 # CONFIG_DISPLAY_BOARDINFO is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index a880c62eb6..6b1aa7bac2 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_CONFIG=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y @@ -79,10 +78,10 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Armadeus Systems" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Armadeus Systems" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER is not set diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index 7c9cc454c3..efa631f8a5 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index 04910bd907..875809e92b 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -7,7 +7,6 @@ CONFIG_DRAM_ODT_EN=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-lite" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 2e5eeee715..36feab204c 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -7,7 +7,6 @@ CONFIG_DRAM_ODT_EN=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 61b2d98705..5918e729d1 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -8,7 +8,6 @@ CONFIG_MACPWR="PD6" CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index df834a2c81..b0d69946d5 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index 2fd2611769..c4646090ba 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index 89bb059a86..a852b4c3e8 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index b9b420764d..70e189859e 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -12,7 +12,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 103936d772..3d87374002 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -6,7 +6,6 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index a3e278f72a..f9c3d4acf9 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -5,7 +5,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 4d8d9262cb..1a16ed1ad6 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_SPL_SPI_SUNXI=y diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 57c63b962a..a23a611696 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -8,7 +8,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 298e7a4943..2cb5539371 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ORIGEN # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y @@ -41,8 +40,8 @@ CONFIG_MMC_SDHCI_S5P=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Samsung" +CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Samsung" -CONFIG_G_DNL_VENDOR_NUM=0x04e8 -CONFIG_G_DNL_PRODUCT_NUM=0x6601 diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index 9ee8e18ed5..bc37f89f48 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index eea44fe1aa..518483c5d9 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -15,7 +15,6 @@ CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index e499b82d34..176d217383 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -34,10 +33,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 3330d23e40..af90e04188 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -41,10 +40,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 9259c1316e..13689396e3 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P2571) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -34,10 +33,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index c55fd6542a..83f2ccc53d 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -7,7 +7,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 193d1782de..b684e33b1b 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -7,7 +7,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index 53825eba33..c7dc889a16 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -13,8 +13,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set @@ -23,8 +21,3 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -CONFIG_G_DNL_VENDOR_NUM=0x1f3a -CONFIG_G_DNL_PRODUCT_NUM=0x1010 diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index e05184c999..5db1a0f392 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -7,7 +7,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/pb1000_defconfig b/configs/pb1000_defconfig index 46a2b3ebfb..619e9a9c23 100644 --- a/configs/pb1000_defconfig +++ b/configs/pb1000_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_PROMPT="Pb1x00 # " # CONFIG_CMD_BDI is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_RUN is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_SAVEENV is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index 1683f88b69..876241e159 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -26,7 +26,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y @@ -60,5 +59,6 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_ETHER=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index d082bb4af2..71702d77f3 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -26,7 +26,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y @@ -60,5 +59,6 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_ETHER=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 94b7c22976..bd0048559c 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index c219ee4844..5ed92b9ea8 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -22,7 +22,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 60339e7312..6900f3d77f 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -10,7 +10,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y CONFIG_SPL=y CONFIG_SYS_PROMPT="Peach-Pi # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 745840ece2..b073d820a3 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -10,7 +10,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y CONFIG_SPL=y CONFIG_SYS_PROMPT="Peach-Pit # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig index 569f12c4b0..0c8a6071a8 100644 --- a/configs/pengwyn_defconfig +++ b/configs/pengwyn_defconfig @@ -27,7 +27,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 CONFIG_CMD_ASKENV=y diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig index 7ca5fcc353..0e7c35e015 100644 --- a/configs/pepper_defconfig +++ b/configs/pepper_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="pepper# " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index bcd83edebb..37ab8e2440 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -22,7 +22,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 93ee353d0d..bebc877ab8 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -72,11 +71,10 @@ CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index c314f9614b..1075793796 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -7,7 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=5 CONFIG_SYS_PROMPT="dask # " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_SAVEENV is not set CONFIG_LOOPW=y CONFIG_CMD_MEMINFO=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index abafc65f57..09b36ccb09 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -8,7 +8,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -32,9 +31,9 @@ CONFIG_PHY_MICREL=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 114c397d2e..c325e7f851 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -7,7 +7,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -28,9 +27,9 @@ CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT=y diff --git a/configs/picosam9g45_defconfig b/configs/picosam9g45_defconfig index 80dbbb65ba..ae099c733b 100644 --- a/configs/picosam9g45_defconfig +++ b/configs/picosam9g45_defconfig @@ -23,7 +23,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index d0a957b9b7..01ed23844b 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -5,7 +5,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index d9f65c21de..b6d6b58df1 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="picon > " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index 5cf8d9ebe6..38e228c16b 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="titanium > " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 1c3c8d4e53..a832e52711 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -9,7 +9,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index 8b2f405e26..7dbd45a110 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -14,7 +14,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="pm9261> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 21f57cb802..fc46de3775 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -13,7 +13,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="u-boot-pm9263> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_NAND=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index e86b09cf05..4e5181b762 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -10,7 +10,6 @@ CONFIG_BOOTARGS="fbcon=rotate:3 console=tty0 console=ttyS0,115200 root=/dev/mtdb CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_NAND=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 561cc768b5..82f68d9e0e 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -5,7 +5,6 @@ CONFIG_IDENT_STRING="\nPogo E02" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="PogoE02> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_USB=y diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig index da120ede94..416c91ab03 100644 --- a/configs/polaroid_mid2407pxe03_defconfig +++ b/configs/polaroid_mid2407pxe03_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2407pxe03" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig index 7b31abcdc3..57648c9419 100644 --- a/configs/polaroid_mid2809pxe04_defconfig +++ b/configs/polaroid_mid2809pxe04_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index 303743d94d..8f6ac2de19 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -5,8 +5,6 @@ CONFIG_DEFAULT_DEVICE_TREE="hi3798cv200-poplar" CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="poplar# " -# CONFIG_CMD_IMLS is not set -CONFIG_CMD_UNZIP=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_ISO_PARTITION is not set diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 5e99f9c089..7453aca436 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -15,7 +15,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -69,11 +68,10 @@ CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 882ff2a9c1..ac36dca972 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig index 351f16b151..7731d35a78 100644 --- a/configs/portl2_defconfig +++ b/configs/portl2_defconfig @@ -9,7 +9,6 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig index 16ac1a6ad5..94de25c188 100644 --- a/configs/pov_protab2_ips9_defconfig +++ b/configs/pov_protab2_ips9_defconfig @@ -15,7 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 2ab2516c01..d8b24f1905 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 @@ -20,8 +21,9 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_POWER_SUPPORT=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -63,8 +65,10 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3399=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_REGULATOR_PWM=y +CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 38370ee8d8..9ad958af1f 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -32,7 +32,6 @@ CONFIG_SYS_PROMPT="U-Boot# " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -70,10 +69,12 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 +CONFIG_USB_ETHER=y +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_SYS_CONSOLE_BG_COL=0xff CONFIG_SYS_CONSOLE_FG_COL=0x00 diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig index 321c3a648b..f07eaa6d8b 100644 --- a/configs/q8_a13_tablet_defconfig +++ b/configs/q8_a13_tablet_defconfig @@ -16,7 +16,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig index bd95f9bc99..7ee1ea3dac 100644 --- a/configs/q8_a23_tablet_800x480_defconfig +++ b/configs/q8_a23_tablet_800x480_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig index 51509d3acb..c4819b95c1 100644 --- a/configs/q8_a33_tablet_1024x600_defconfig +++ b/configs/q8_a33_tablet_1024x600_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig index 1349269b4d..e3e6b943b9 100644 --- a/configs/q8_a33_tablet_800x480_defconfig +++ b/configs/q8_a33_tablet_800x480_defconfig @@ -16,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index e653bd4c9c..f1db0d0fc9 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -12,7 +12,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_PCI=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 67e9a45fbc..fae4a9ca54 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -31,7 +31,7 @@ CONFIG_SPL_RTC_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set -# CONFIG_CMD_IMLS is not set +CONFIG_CMD_BOOTEFI_SELFTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_SF=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 7ce97ff091..ffdb4c34c1 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -13,7 +13,7 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set +CONFIG_CMD_BOOTEFI_SELFTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_PART=y diff --git a/configs/qemu-x86_efi_payload32_defconfig b/configs/qemu-x86_efi_payload32_defconfig index 11a4a9e832..0563164cde 100644 --- a/configs/qemu-x86_efi_payload32_defconfig +++ b/configs/qemu-x86_efi_payload32_defconfig @@ -10,7 +10,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_PART=y diff --git a/configs/qemu-x86_efi_payload64_defconfig b/configs/qemu-x86_efi_payload64_defconfig index d123de2011..8a4ac9de7c 100644 --- a/configs/qemu-x86_efi_payload64_defconfig +++ b/configs/qemu-x86_efi_payload64_defconfig @@ -11,7 +11,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_PART=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig new file mode 100644 index 0000000000..f353eea691 --- /dev/null +++ b/configs/qemu_arm_defconfig @@ -0,0 +1,27 @@ +CONFIG_ARM=y +CONFIG_ARM_SMCCC=y +CONFIG_ARCH_QEMU=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_OF_BOARD=y +CONFIG_AHCI_PCI=y +CONFIG_BLK=y +# CONFIG_MMC is not set +CONFIG_DM_ETH=y +CONFIG_E1000=y +CONFIG_NVME=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_PCIE_ECAM_GENERIC=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_PCI=y diff --git a/configs/qemu_mips64_defconfig b/configs/qemu_mips64_defconfig index 4966d69d2d..9150df8899 100644 --- a/configs/qemu_mips64_defconfig +++ b/configs/qemu_mips64_defconfig @@ -4,6 +4,7 @@ CONFIG_CPU_MIPS64_R1=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="qemu-mips64 # " +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/qemu_mips64el_defconfig b/configs/qemu_mips64el_defconfig index b99ee21fb5..c5ada7b1d3 100644 --- a/configs/qemu_mips64el_defconfig +++ b/configs/qemu_mips64el_defconfig @@ -5,6 +5,7 @@ CONFIG_CPU_MIPS64_R1=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="qemu-mips64el # " +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/qemu_mips_defconfig b/configs/qemu_mips_defconfig index 9af92ad0df..caa15738eb 100644 --- a/configs/qemu_mips_defconfig +++ b/configs/qemu_mips_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_QEMU_MIPS=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="qemu-mips # " +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/qemu_mipsel_defconfig b/configs/qemu_mipsel_defconfig index a68315ac70..c2af8b8985 100644 --- a/configs/qemu_mipsel_defconfig +++ b/configs/qemu_mipsel_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="qemu-mipsel # " +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/r0p7734_defconfig b/configs/r0p7734_defconfig index 77e7f0c7fc..e0b19bbb7f 100644 --- a/configs/r0p7734_defconfig +++ b/configs/r0p7734_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 96d3b529e9..a0bbe74907 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_R2DPLUS=y CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttySC0,115200" +CONFIG_CMD_IMLS=y CONFIG_CMD_IDE=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 137614cfa3..595f405d68 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -7,7 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/r7780mp_defconfig b/configs/r7780mp_defconfig index 8918aff9e0..46d59ae806 100644 --- a/configs/r7780mp_defconfig +++ b/configs/r7780mp_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOTARGS="console=ttySC0,115200" # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/r8a7795_salvator-x_defconfig b/configs/r8a7795_salvator-x_defconfig index 62b16b7a1c..e32aceba54 100644 --- a/configs/r8a7795_salvator-x_defconfig +++ b/configs/r8a7795_salvator-x_defconfig @@ -12,27 +12,40 @@ CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_SDRAM=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_CLK=y CONFIG_CLK_RENESAS=y +CONFIG_DM_GPIO=y +CONFIG_RCAR_GPIO=y CONFIG_DM_MMC=y -CONFIG_SH_SDHI=y +CONFIG_MMC_UNIPHIER=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_RENESAS_RAVB=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_PFC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a7795_ulcb_defconfig b/configs/r8a7795_ulcb_defconfig index a3dba70305..50d36891cc 100644 --- a/configs/r8a7795_ulcb_defconfig +++ b/configs/r8a7795_ulcb_defconfig @@ -12,23 +12,37 @@ CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_CLK=y CONFIG_CLK_RENESAS=y +CONFIG_DM_GPIO=y +CONFIG_RCAR_GPIO=y CONFIG_DM_MMC=y -CONFIG_SH_SDHI=y +CONFIG_MMC_UNIPHIER=y CONFIG_DM_ETH=y CONFIG_RENESAS_RAVB=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_PFC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a7796_salvator-x_defconfig b/configs/r8a7796_salvator-x_defconfig index aa231b65e0..8f22645efb 100644 --- a/configs/r8a7796_salvator-x_defconfig +++ b/configs/r8a7796_salvator-x_defconfig @@ -13,27 +13,40 @@ CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_SDRAM=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_CLK=y CONFIG_CLK_RENESAS=y +CONFIG_DM_GPIO=y +CONFIG_RCAR_GPIO=y CONFIG_DM_MMC=y -CONFIG_SH_SDHI=y +CONFIG_MMC_UNIPHIER=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_RENESAS_RAVB=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_PFC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a7796_ulcb_defconfig b/configs/r8a7796_ulcb_defconfig index f222a6833c..c8edfabc91 100644 --- a/configs/r8a7796_ulcb_defconfig +++ b/configs/r8a7796_ulcb_defconfig @@ -13,23 +13,37 @@ CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_CLK=y CONFIG_CLK_RENESAS=y +CONFIG_DM_GPIO=y +CONFIG_RCAR_GPIO=y CONFIG_DM_MMC=y -CONFIG_SH_SDHI=y +CONFIG_MMC_UNIPHIER=y CONFIG_DM_ETH=y CONFIG_RENESAS_RAVB=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_PFC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 5acfe22b0a..3c0b595859 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -29,7 +29,6 @@ CONFIG_SYS_PROMPT="U-Boot# " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -66,7 +65,9 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 +CONFIG_USB_ETHER=y +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 785dca922a..846c00afb3 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -8,7 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg, CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index b41644ef5f..c76a0b9592 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -14,7 +14,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -67,11 +66,10 @@ CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index aaf27751d4..557ed880f2 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -13,7 +13,7 @@ CONFIG_DEBUG_UART=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -# CONFIG_CMD_IMLS is not set +CONFIG_RANDOM_UUID=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index 2345697701..c45ffb65af 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -7,7 +7,6 @@ CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -26,7 +25,6 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_DM_VIDEO=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index bb56a9e4e1..f7aed35797 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -28,7 +27,6 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_DM_VIDEO=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 6edacd69a2..9416e3b8fe 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -28,7 +27,6 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_DM_VIDEO=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index 2e81966c14..3bfa745c2e 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -7,7 +7,6 @@ CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -26,7 +25,6 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_DM_VIDEO=y diff --git a/configs/rsk7203_defconfig b/configs/rsk7203_defconfig index 1aa4676583..7768e46716 100644 --- a/configs/rsk7203_defconfig +++ b/configs/rsk7203_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/rsk7264_defconfig b/configs/rsk7264_defconfig index 9a1db162fa..38ae45f01a 100644 --- a/configs/rsk7264_defconfig +++ b/configs/rsk7264_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_RSK7264=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttySC3,115200" +CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_NOR_FLASH=y CONFIG_SCIF_CONSOLE=y diff --git a/configs/rsk7269_defconfig b/configs/rsk7269_defconfig index 4a78cb6a21..a23f4aa64d 100644 --- a/configs/rsk7269_defconfig +++ b/configs/rsk7269_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_RSK7269=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttySC7,115200" +CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_NOR_FLASH=y CONFIG_SCIF_CONSOLE=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 6ec8ff3571..c1b9577e0b 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -33,7 +33,6 @@ CONFIG_SYS_PROMPT="U-Boot# " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -71,10 +70,11 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 +CONFIG_USB_ETHER=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_SYS_CONSOLE_BG_COL=0xff CONFIG_SYS_CONSOLE_FG_COL=0x00 diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 7d8792cb05..2749f2d893 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -8,7 +8,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Goni # " # CONFIG_AUTOBOOT is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y @@ -35,9 +34,9 @@ CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Samsung" +CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Samsung" -CONFIG_G_DNL_VENDOR_NUM=0x04e8 -CONFIG_G_DNL_PRODUCT_NUM=0x6601 CONFIG_FAT_WRITE=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index 16352ad7a0..09c5a50fc6 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -10,7 +10,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Universal # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y @@ -46,8 +45,8 @@ CONFIG_DM_PMIC_MAX8998=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Samsung" +CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Samsung" -CONFIG_G_DNL_VENDOR_NUM=0x04e8 -CONFIG_G_DNL_PRODUCT_NUM=0x6601 diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index a482f8f695..cfc56cba37 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -15,7 +15,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 18d51131e6..b9675a983d 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -22,7 +22,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_I2C=y diff --git a/configs/sama5d2_ptc_nandflash_defconfig b/configs/sama5d2_ptc_nandflash_defconfig index 3f1eb90648..cfbdbb0025 100644 --- a/configs/sama5d2_ptc_nandflash_defconfig +++ b/configs/sama5d2_ptc_nandflash_defconfig @@ -13,7 +13,6 @@ CONFIG_BOOTARGS="console=ttyS0,57600 earlyprintk mtdparts=atmel_nand:6M(bootstra # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -29,4 +28,6 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Atmel SAMA5D2_PTC" CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_USB_ETHER=y diff --git a/configs/sama5d2_ptc_spiflash_defconfig b/configs/sama5d2_ptc_spiflash_defconfig index ad62f47063..25ee07740e 100644 --- a/configs/sama5d2_ptc_spiflash_defconfig +++ b/configs/sama5d2_ptc_spiflash_defconfig @@ -14,7 +14,6 @@ CONFIG_BOOTARGS="console=ttyS0,57600 earlyprintk mtdparts=atmel_nand:6M(bootstra # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -30,4 +29,6 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Atmel SAMA5D2_PTC" CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_USB_ETHER=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 215961a65c..2248d672b1 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -24,7 +24,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_I2C=y @@ -82,3 +81,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 869d405838..4c5d0295e6 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -21,7 +21,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_I2C=y @@ -79,3 +78,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index b6c60cbcae..685caa33d0 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -31,7 +30,6 @@ CONFIG_ENV_IS_IN_FAT=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_AT91_H32MX=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y @@ -55,4 +53,5 @@ CONFIG_DM_SPI=y CONFIG_ATMEL_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 01b57efe03..0f42c98c9c 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -31,7 +30,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_AT91_H32MX=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y @@ -55,5 +53,6 @@ CONFIG_DM_SPI=y CONFIG_ATMEL_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y CONFIG_FAT_WRITE=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index e29e3a8098..52ad137ed7 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -31,7 +30,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y -CONFIG_AT91_UTMI=y CONFIG_AT91_H32MX=y CONFIG_DM_GPIO=y CONFIG_AT91_GPIO=y @@ -55,5 +53,6 @@ CONFIG_DM_SPI=y CONFIG_ATMEL_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y CONFIG_FAT_WRITE=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index b30968d9cc..8da4f4e850 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -23,7 +23,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 65af64f797..98152afbbc 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -20,7 +20,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index f45449fd93..cf57936cad 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -81,4 +82,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 6217600f01..c34ff17f8b 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -76,5 +77,6 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y CONFIG_FAT_WRITE=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 2fe08e4e59..e48813d7fc 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -21,7 +21,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -77,5 +76,6 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y CONFIG_FAT_WRITE=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index dabbf605c5..b7faf70c55 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -23,7 +23,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -78,3 +77,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 85157878cd..7255d473b0 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -20,7 +20,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -75,3 +74,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 4061720b3a..c93705ba2d 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -21,7 +21,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -77,3 +76,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index aaa5855b22..97c59bd9d7 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -25,7 +25,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -78,4 +77,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 901d17bfa3..e491608298 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -22,7 +22,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -75,4 +74,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 535031024b..8d7da40870 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -21,7 +21,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -74,4 +73,5 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y -CONFIG_LCD=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 310b8acc29..08eec8ecc6 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -20,7 +20,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_ENV_CALLBACK=y @@ -60,6 +59,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_TPM=y CONFIG_CMD_TPM_TEST=y +CONFIG_CMD_BTRFS=y CONFIG_CMD_CBFS=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_EXT4_WRITE=y @@ -175,7 +175,6 @@ CONFIG_DM_USB=y CONFIG_USB_EMUL=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_DM_VIDEO=y CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 50ea35e64b..1aa28c7e9f 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -18,7 +18,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_LOOPW=y @@ -160,7 +159,6 @@ CONFIG_DM_USB=y CONFIG_USB_EMUL=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_DM_VIDEO=y CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig index 693c14bc60..b2f55d9ba7 100644 --- a/configs/sandbox_noblk_defconfig +++ b/configs/sandbox_noblk_defconfig @@ -18,7 +18,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_ENV_CALLBACK=y @@ -168,7 +167,6 @@ CONFIG_DM_USB=y CONFIG_USB_EMUL=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_DM_VIDEO=y CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index db9129456b..dd0322015e 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -27,7 +27,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_ENV_CALLBACK=y @@ -178,7 +177,6 @@ CONFIG_DM_USB=y CONFIG_USB_EMUL=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_DM_VIDEO=y CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig index f6ce09c366..0615cf385b 100644 --- a/configs/sansa_fuze_plus_defconfig +++ b/configs/sansa_fuze_plus_defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -32,4 +31,6 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_OF_LIBFDT=y diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig index 2f0991895c..b40d15365c 100644 --- a/configs/sbc8349_PCI_33_defconfig +++ b/configs/sbc8349_PCI_33_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PCI_33M" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig index 880f6da08e..854dc19219 100644 --- a/configs/sbc8349_PCI_66_defconfig +++ b/configs/sbc8349_PCI_66_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PCI_66M" CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig index 7795518543..0b6865aa0f 100644 --- a/configs/sbc8349_defconfig +++ b/configs/sbc8349_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig index 21d172d04c..66a101ad2e 100644 --- a/configs/sbc8548_PCI_33_PCIE_defconfig +++ b/configs/sbc8548_PCI_33_PCIE_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig index ac4a37b34b..4efb0729b5 100644 --- a/configs/sbc8548_PCI_33_defconfig +++ b/configs/sbc8548_PCI_33_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig index 826d888f0a..3105001228 100644 --- a/configs/sbc8548_PCI_66_PCIE_defconfig +++ b/configs/sbc8548_PCI_66_PCIE_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig index 77ec0c81ba..78eccd87a7 100644 --- a/configs/sbc8548_PCI_66_defconfig +++ b/configs/sbc8548_PCI_66_defconfig @@ -9,6 +9,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig index c31ee2ea97..a2cedfc777 100644 --- a/configs/sbc8548_defconfig +++ b/configs/sbc8548_defconfig @@ -8,6 +8,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y diff --git a/configs/sbc8641d_defconfig b/configs/sbc8641d_defconfig index 6bb2ed6290..4bebdb3054 100644 --- a/configs/sbc8641d_defconfig +++ b/configs/sbc8641d_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig index b189e30052..faebc04bd2 100644 --- a/configs/sc_sps_1_defconfig +++ b/configs/sc_sps_1_defconfig @@ -13,7 +13,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index ea4546bce4..c8cc3b6001 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -6,7 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -36,7 +35,6 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_DM_VIDEO=y diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig index beee76ee4a..4810a70167 100644 --- a/configs/secomx6quq7_defconfig +++ b/configs/secomx6quq7_defconfig @@ -9,7 +9,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SECO MX6Q uQ7 U-Boot > " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 37a85ccf44..985b830b18 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -16,7 +16,6 @@ CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig index a8286587c3..3152859071 100644 --- a/configs/sh7752evb_defconfig +++ b/configs/sh7752evb_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig index dd3522d757..259d6a7e3d 100644 --- a/configs/sh7753evb_defconfig +++ b/configs/sh7753evb_defconfig @@ -8,7 +8,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig index 231c0a1b5a..b2e7362e2f 100644 --- a/configs/sh7757lcr_defconfig +++ b/configs/sh7757lcr_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig index 5aa008b958..693a873ddd 100644 --- a/configs/sh7763rdp_defconfig +++ b/configs/sh7763rdp_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/sh7785lcr_32bit_defconfig b/configs/sh7785lcr_32bit_defconfig index a92f981ee6..bc7234b950 100644 --- a/configs/sh7785lcr_32bit_defconfig +++ b/configs/sh7785lcr_32bit_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/sh7785lcr_defconfig b/configs/sh7785lcr_defconfig index a6dbe896c4..8c8c288140 100644 --- a/configs/sh7785lcr_defconfig +++ b/configs/sh7785lcr_defconfig @@ -8,7 +8,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index a7991afae2..f019b6878d 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -7,7 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MMC=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 4a9d05fe09..ce56075a70 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y diff --git a/configs/shmin_defconfig b/configs/shmin_defconfig index 0c5fe39ed7..36f1413eb6 100644 --- a/configs/shmin_defconfig +++ b/configs/shmin_defconfig @@ -9,7 +9,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_RUN is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/silk_defconfig b/configs/silk_defconfig index d72e48f799..8af1e19d13 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index accdd5da88..765d0fae22 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -23,7 +23,6 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -46,10 +45,10 @@ CONFIG_PHYLIB=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 2207afaa12..57870e5a9f 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -13,7 +13,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_SPL=y CONFIG_SYS_PROMPT="SMDK5250 # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 3cc2413656..75b8c00e28 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -11,7 +11,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y CONFIG_SPL=y CONFIG_SYS_PROMPT="SMDK5420 # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 45b854a6ca..eef4aee919 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -8,7 +8,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SMDKC100 # " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_ONENAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index ae374985eb..31a5e99a40 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -7,7 +7,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SMDKV310 # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPT=y diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 871290157e..8f9ff1f229 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -11,7 +11,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Snapper> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 93faa77baf..6bb86287ec 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -10,7 +10,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 ip=any" CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index f24153b56f..a8a592f0d1 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -13,14 +13,11 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="sniper # " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_FASTBOOT_BUF_SIZE=0x2000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -43,8 +40,7 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" -CONFIG_G_DNL_VENDOR_NUM=0x0451 -CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_OF_LIBFDT=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 921f89e1c0..66255ad492 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -13,7 +13,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y CONFIG_SPL=y CONFIG_SYS_PROMPT="snow # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 4c73d73cdc..d2e1ead76b 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb" CONFIG_SPL=y CONFIG_SPL_FPGA_SUPPORT=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index cf4fa20f2c..8e4df341db 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y @@ -64,9 +63,9 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="altera" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="altera" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 1cc6e161d9..97262d5616 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y @@ -64,9 +63,9 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="altera" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="altera" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index b4fd29d207..18724df353 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y @@ -39,8 +38,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y -CONFIG_ENV_IS_IN_MMC=y CONFIG_EFI_PARTITION=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_SPL_DM=y CONFIG_DFU_MMC=y CONFIG_FPGA_SOCFPGA=y @@ -61,9 +60,9 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="terasic" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="terasic" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 16cff90369..3f20159702 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y @@ -56,9 +55,9 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="terasic" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="terasic" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index a093145855..8a33aee897 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -19,7 +19,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 3de4274634..fa55ca2075 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 0b4ad4118f..aa8f56479b 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y @@ -58,9 +57,9 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="denx" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="denx" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index b22bf6f608..65afa77482 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y @@ -64,9 +63,9 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="terasic" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="terasic" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 335c9e8384..81a66af3a8 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y @@ -64,9 +63,9 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="ebv" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="ebv" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index eb9fc49b3a..09de96bb76 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 3bcedb6d1a..3f9bf749f5 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -81,9 +80,9 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="samtec" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="samtec" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 6c28e0e735..6bbfc7155f 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -11,6 +11,7 @@ CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index 4489ddf5fb..538dd2ae7d 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -18,7 +18,6 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_PART=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index 7f1b0bb107..f41e5df317 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -11,7 +11,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig index a929b86cd1..22a4685330 100644 --- a/configs/spear300_defconfig +++ b/configs/spear300_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig index 4694ca9f5f..53dfc12a30 100644 --- a/configs/spear300_nand_defconfig +++ b/configs/spear300_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig index 8563ce2b48..adbf4081fd 100644 --- a/configs/spear300_usbtty_defconfig +++ b/configs/spear300_usbtty_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig index bc58c24318..e4e31df39e 100644 --- a/configs/spear300_usbtty_nand_defconfig +++ b/configs/spear300_usbtty_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig index 1b6062ebab..9517ac04d5 100644 --- a/configs/spear310_defconfig +++ b/configs/spear310_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig index 28d40d5f27..e601b04ef2 100644 --- a/configs/spear310_nand_defconfig +++ b/configs/spear310_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig index 0a17d42c0a..5c1b142504 100644 --- a/configs/spear310_pnor_defconfig +++ b/configs/spear310_pnor_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig index 0285ae910c..7b438ecabb 100644 --- a/configs/spear310_usbtty_defconfig +++ b/configs/spear310_usbtty_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig index 8bea8253d6..b7aac144a1 100644 --- a/configs/spear310_usbtty_nand_defconfig +++ b/configs/spear310_usbtty_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig index 0dc3951e27..611517d98f 100644 --- a/configs/spear310_usbtty_pnor_defconfig +++ b/configs/spear310_usbtty_pnor_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig index 87b009e23d..66fb6b726f 100644 --- a/configs/spear320_defconfig +++ b/configs/spear320_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig index 2384e525ac..cfe510b362 100644 --- a/configs/spear320_nand_defconfig +++ b/configs/spear320_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig index 94ac19dce4..a08cd7e85a 100644 --- a/configs/spear320_pnor_defconfig +++ b/configs/spear320_pnor_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig index b391ca6982..34b36227d8 100644 --- a/configs/spear320_usbtty_defconfig +++ b/configs/spear320_usbtty_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig index f75776bfa6..eb8ab9d42b 100644 --- a/configs/spear320_usbtty_nand_defconfig +++ b/configs/spear320_usbtty_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig index 9499cb2059..7f09cfb724 100644 --- a/configs/spear320_usbtty_pnor_defconfig +++ b/configs/spear320_usbtty_pnor_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig index 64617c19e9..dc581794a5 100644 --- a/configs/spear600_defconfig +++ b/configs/spear600_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig index 042eef5a72..6e6e62b404 100644 --- a/configs/spear600_nand_defconfig +++ b/configs/spear600_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig index e1689f9f9c..80e93e3f34 100644 --- a/configs/spear600_usbtty_defconfig +++ b/configs/spear600_usbtty_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig index 8e3733fa5d..a2cf8666b6 100644 --- a/configs/spear600_usbtty_nand_defconfig +++ b/configs/spear600_usbtty_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 2ab678abd7..b5db3833cd 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -13,7 +13,6 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y CONFIG_SPL=y CONFIG_SYS_PROMPT="spring # " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 8fd1ff26a2..2ed77a270a 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -6,18 +6,14 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait mem=992M@0x40000000 vmalloc=256m" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="stih410-b2260 => " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y -CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FASTBOOT_BUF_ADDR=0x40000000 CONFIG_FASTBOOT_BUF_SIZE=0x3DF00000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y @@ -51,9 +47,8 @@ CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="STMicroelectronics" -CONFIG_G_DNL_VENDOR_NUM=0x483 -CONFIG_G_DNL_PRODUCT_NUM=0x7270 +CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics" +CONFIG_USB_GADGET_VENDOR_NUM=0x483 +CONFIG_USB_GADGET_PRODUCT_NUM=0x7270 CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SPL_OF_LIBFDT=y diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index f0ddeb27cf..9339e3670b 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -11,6 +11,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIMER=y CONFIG_ENV_IS_IN_FLASH=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 2809464de0..378cf83d1f 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_PROMPT="U-Boot > " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_SF=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index eed921d24b..e43187ee55 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -14,14 +14,22 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y +CONFIG_DM_MMC=y +CONFIG_STM32_SDMMC2=y # CONFIG_PINCTRL_FULL is not set # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_REGEX=y diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index 61e702e001..983c26aeee 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -14,14 +14,22 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y +CONFIG_DM_MMC=y +CONFIG_STM32_SDMMC2=y # CONFIG_PINCTRL_FULL is not set # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_REGEX=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 2630865db9..3639aaa9e3 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -7,7 +7,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="stmark2 $ " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 9c18914626..b6e71e7186 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig index 9c92fa5d08..f4ee434de7 100644 --- a/configs/strider_con_defconfig +++ b/configs/strider_con_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGAD=y CONFIG_CMD_I2C=y diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig index 030f3f579c..aec099b7af 100644 --- a/configs/strider_con_dp_defconfig +++ b/configs/strider_con_dp_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGAD=y CONFIG_CMD_I2C=y diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig index 22bd3fa149..6ccc99fb96 100644 --- a/configs/strider_cpu_defconfig +++ b/configs/strider_cpu_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGAD=y CONFIG_CMD_I2C=y diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig index 6530134939..11831a4414 100644 --- a/configs/strider_cpu_dp_defconfig +++ b/configs/strider_cpu_dp_defconfig @@ -15,6 +15,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGAD=y CONFIG_CMD_I2C=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index 22f75c4b94..2d7d3bf70d 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -11,7 +11,6 @@ CONFIG_SYS_PROMPT="STV0991> " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_SF=y diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig index 32254ef8b4..aaa56b51b4 100644 --- a/configs/sun8i_a23_evb_defconfig +++ b/configs/sun8i_a23_evb_defconfig @@ -9,7 +9,6 @@ CONFIG_USB1_VBUS_PIN="PH7" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-evb" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index 9dbf5d0a58..eb4a74cecd 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -12,7 +12,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig index 4184998370..60576c4f62 100644 --- a/configs/suvd3_defconfig +++ b/configs/suvd3_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig index 31153acb30..3d4e2a1e8c 100644 --- a/configs/tao3530_defconfig +++ b/configs/tao3530_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="TAO-3530 # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_I2C=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 71a382a3e1..9e9f6fb7e5 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -26,7 +26,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set @@ -53,8 +52,8 @@ CONFIG_PHYLIB=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 CONFIG_USE_TINY_PRINTF=y diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 2f505d9678..f55c940453 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_SYS_PROMPT="[tb100]:~# " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 20814ccea3..791af7c841 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -12,7 +12,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Matrix U-Boot> " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -45,10 +44,10 @@ CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="TBS" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="TBS" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_CFB_CONSOLE_ANSI=y CONFIG_OF_LIBFDT=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 6ce7cb4727..f785757a5d 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -9,7 +9,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/tec_defconfig b/configs/tec_defconfig index ff3bee1d26..2f0e14f4c2 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -8,7 +8,6 @@ CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (TEC) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index 1888f08928..740ed06456 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -19,7 +19,6 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -27,7 +26,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index 4c9492cf1f..0c85620586 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -18,7 +18,6 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -26,7 +25,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index 348d917b3b..7847ff48cb 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -17,7 +17,6 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y @@ -25,7 +24,6 @@ CONFIG_CMD_PART=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index a39497984b..a091ddec31 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -20,7 +20,6 @@ CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -51,8 +50,8 @@ CONFIG_DM_GPIO=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig deleted file mode 100644 index 0639f81328..0000000000 --- a/configs/theadorable_defconfig +++ /dev/null @@ -1,54 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MVEBU=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_TARGET_THEADORABLE=y -CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_VIDEO=y -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" -CONFIG_DEBUG_UART=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_FIT=y -CONFIG_BOOTDELAY=3 -# CONFIG_CONSOLE_MUX is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL=y -CONFIG_SPL_I2C_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NET is not set -# CONFIG_CMD_NFS is not set -CONFIG_CMD_BMP=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -# CONFIG_SPL_PARTITION_UUIDS is not set -CONFIG_SPL_OF_TRANSLATE=y -CONFIG_FPGA_ALTERA=y -CONFIG_DM_GPIO=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_SYS_NS16550=y -CONFIG_VIDEO_MVEBU=y -# CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_REGEX=y -CONFIG_LIB_RAND=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index c30e924fb5..9a3c146005 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -29,7 +29,6 @@ CONFIG_SYS_PROMPT="U-Boot# " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -66,7 +65,8 @@ CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Siemens AG" +CONFIG_USB_GADGET_VENDOR_NUM=0x0908 +CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2 CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Siemens AG" -CONFIG_G_DNL_VENDOR_NUM=0x0908 -CONFIG_G_DNL_PRODUCT_NUM=0x02d2 +CONFIG_USB_ETHER=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 19a7b922d0..6ef83bf830 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -10,7 +10,6 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e024000000 debug ma # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ThunderX_88XX> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_EDITENV is not set diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig index 92a7062c6d..3d39820745 100644 --- a/configs/ti814x_evm_defconfig +++ b/configs/ti814x_evm_defconfig @@ -20,7 +20,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 4341d8d01f..fa97ad6f4c 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FAT_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm" CONFIG_DISTRO_DEFAULTS=y @@ -20,10 +19,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y -CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 00e2d81954..1315be3ee8 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C_SUPPORT=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -72,11 +71,10 @@ CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x320a CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Rockchip" -CONFIG_G_DNL_VENDOR_NUM=0x2207 -CONFIG_G_DNL_PRODUCT_NUM=0x320a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index a2197b59bc..044a323da9 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -7,7 +7,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Titanium > " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 1080554cba..fc06dc93c5 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -11,7 +11,6 @@ CONFIG_BOOTDELAY=0 CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="zynq-uboot> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -46,8 +45,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 1450fbc61a..6a5348ed50 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -11,7 +11,6 @@ CONFIG_BOOTDELAY=0 CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="zynq-uboot> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -47,8 +46,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index d3fc7ad63f..d8f6fcf782 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -11,7 +11,6 @@ CONFIG_BOOTDELAY=0 CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="zynq-uboot> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -46,8 +45,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index e973ef23ef..45e2b4b0c0 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -11,7 +11,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index e915e8f38c..936a8ac346 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 955873b318..4f3335151b 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -11,7 +11,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index 9e491327a5..e134c256de 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index b3029f465d..2173155739 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 5c42851c3f..42c004b550 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 231fc0d861..3912ec2730 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -11,7 +11,6 @@ CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig index 0d7a765034..4cf6693f5c 100644 --- a/configs/tqma6s_wru4_mmc_defconfig +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -15,7 +15,6 @@ CONFIG_AUTOBOOT_PROMPT="Enter password in %d seconds to stop autoboot\n" CONFIG_AUTOBOOT_ENCRYPTION=y CONFIG_AUTOBOOT_STOP_STR_SHA256="36a9e7f1c95b82ffb99743e0c5c4ce95d83c9a430aac59f84ef3cbfab6145068" CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index bcc73d4fa2..aaa25a9bc7 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Trats2 # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y @@ -50,8 +49,8 @@ CONFIG_DM_PMIC_MAX77686=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Samsung" +CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Samsung" -CONFIG_G_DNL_VENDOR_NUM=0x04e8 -CONFIG_G_DNL_PRODUCT_NUM=0x6601 diff --git a/configs/trats_defconfig b/configs/trats_defconfig index 3f0c59baad..e0285aa8f6 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Trats # " CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y @@ -49,8 +48,8 @@ CONFIG_PMIC_MAX8997=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Samsung" +CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Samsung" -CONFIG_G_DNL_VENDOR_NUM=0x04e8 -CONFIG_G_DNL_PRODUCT_NUM=0x6601 diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig index 1a0748913a..0d7334446c 100644 --- a/configs/tricorder_defconfig +++ b/configs/tricorder_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="OMAP3 Tricorder # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig index dba3b1d743..7ce7114523 100644 --- a/configs/tricorder_flash_defconfig +++ b/configs/tricorder_flash_defconfig @@ -8,7 +8,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 207c75cfdb..c2da302d21 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y diff --git a/configs/ts4600_defconfig b/configs/ts4600_defconfig index a22d611a3e..aab0737823 100644 --- a/configs/ts4600_defconfig +++ b/configs/ts4600_defconfig @@ -10,7 +10,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_EXT4=y diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig index 55cadac590..17497ca52f 100644 --- a/configs/ts4800_defconfig +++ b/configs/ts4800_defconfig @@ -5,7 +5,6 @@ CONFIG_TARGET_TS4800=y CONFIG_BOOTDELAY=1 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index e88c517f30..e13af620d0 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index a3834acb96..b9b5cbc2c5 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -15,7 +15,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -26,6 +25,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CMD_BTRFS=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SPL_OF_TRANSLATE=y @@ -33,8 +33,8 @@ CONFIG_MISC=y CONFIG_ATSHA204A=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y +CONFIG_MVNETA=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 90de4adca8..422a943c01 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -9,6 +9,7 @@ CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/twister_defconfig b/configs/twister_defconfig index 53edadb648..9933d64063 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="twister => " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00800000 CONFIG_CMD_SPL_WRITE_SIZE=0x400 diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index b241d3df2d..f064928b79 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_SATA=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index 02897eb2b4..2f75361d5d 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -15,7 +15,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 16fbe8adc5..cd0efe371b 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CONFIG=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y # CONFIG_CMD_XIMG is not set # CONFIG_CMD_ENV_EXISTS is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 3c25484939..7f2347a2f5 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y -CONFIG_ARCH_UNIPHIER_V7_MULTI=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set @@ -14,6 +13,7 @@ CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CONFIG=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y # CONFIG_CMD_XIMG is not set # CONFIG_CMD_ENV_EXISTS is not set # CONFIG_CMD_FPGA is not set @@ -47,4 +47,5 @@ CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y CONFIG_USB_STORAGE=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index f4f2ca0629..31dd9b31cf 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_CONFIG=y +CONFIG_CMD_IMLS=y # CONFIG_CMD_XIMG is not set # CONFIG_CMD_ENV_EXISTS is not set # CONFIG_CMD_FPGA is not set @@ -44,4 +45,6 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_UNIPHIER=y CONFIG_USB_STORAGE=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index d49c68b2b5..2a9eeae063 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -12,7 +12,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 98e216f3c1..cc276b7915 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_MX5=y CONFIG_TARGET_USBARMORY=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_I2C=y diff --git a/configs/vct_platinum_defconfig b/configs/vct_platinum_defconfig index 0e4fcbaa26..38b3e81ebc 100644 --- a/configs/vct_platinum_defconfig +++ b/configs/vct_platinum_defconfig @@ -4,6 +4,7 @@ CONFIG_VCT_PLATINUM=y CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y diff --git a/configs/vct_platinum_onenand_defconfig b/configs/vct_platinum_onenand_defconfig index 4a92b03621..6b57ac51cc 100644 --- a/configs/vct_platinum_onenand_defconfig +++ b/configs/vct_platinum_onenand_defconfig @@ -5,7 +5,6 @@ CONFIG_VCT_ONENAND=y CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/vct_platinum_onenand_small_defconfig b/configs/vct_platinum_onenand_small_defconfig index 7125d070b1..49f83427ba 100644 --- a/configs/vct_platinum_onenand_small_defconfig +++ b/configs/vct_platinum_onenand_small_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_PROMPT="$ " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_CRC32 is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set diff --git a/configs/vct_platinum_small_defconfig b/configs/vct_platinum_small_defconfig index eafece0723..103eccbae6 100644 --- a/configs/vct_platinum_small_defconfig +++ b/configs/vct_platinum_small_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_PROMPT="$ " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_CRC32 is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/vct_platinumavc_defconfig b/configs/vct_platinumavc_defconfig index ebbf6c1a02..0610ecd957 100644 --- a/configs/vct_platinumavc_defconfig +++ b/configs/vct_platinumavc_defconfig @@ -4,6 +4,7 @@ CONFIG_VCT_PLATINUMAVC=y CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="VCT# " +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/vct_platinumavc_onenand_defconfig b/configs/vct_platinumavc_onenand_defconfig index 7f194e8f2e..c2661371cf 100644 --- a/configs/vct_platinumavc_onenand_defconfig +++ b/configs/vct_platinumavc_onenand_defconfig @@ -5,7 +5,6 @@ CONFIG_VCT_ONENAND=y CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/vct_platinumavc_onenand_small_defconfig b/configs/vct_platinumavc_onenand_small_defconfig index f5d2759545..6e3f0a7a3c 100644 --- a/configs/vct_platinumavc_onenand_small_defconfig +++ b/configs/vct_platinumavc_onenand_small_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_PROMPT="$ " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_CRC32 is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set diff --git a/configs/vct_platinumavc_small_defconfig b/configs/vct_platinumavc_small_defconfig index f7823ef050..457baed88c 100644 --- a/configs/vct_platinumavc_small_defconfig +++ b/configs/vct_platinumavc_small_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_PROMPT="$ " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_CRC32 is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/vct_premium_defconfig b/configs/vct_premium_defconfig index f89a0a5ee5..d962fd1206 100644 --- a/configs/vct_premium_defconfig +++ b/configs/vct_premium_defconfig @@ -4,6 +4,7 @@ CONFIG_VCT_PREMIUM=y CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " +CONFIG_CMD_IMLS=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y diff --git a/configs/vct_premium_onenand_defconfig b/configs/vct_premium_onenand_defconfig index 4d909741ba..a55cb5b385 100644 --- a/configs/vct_premium_onenand_defconfig +++ b/configs/vct_premium_onenand_defconfig @@ -5,7 +5,6 @@ CONFIG_VCT_ONENAND=y CONFIG_BOOTDELAY=5 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_PROMPT="$ " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/vct_premium_onenand_small_defconfig b/configs/vct_premium_onenand_small_defconfig index 27e74742c8..68958bcd04 100644 --- a/configs/vct_premium_onenand_small_defconfig +++ b/configs/vct_premium_onenand_small_defconfig @@ -9,7 +9,6 @@ CONFIG_SYS_PROMPT="$ " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_CRC32 is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_LOADB is not set diff --git a/configs/vct_premium_small_defconfig b/configs/vct_premium_small_defconfig index 0420cd15a6..f006456dd9 100644 --- a/configs/vct_premium_small_defconfig +++ b/configs/vct_premium_small_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_PROMPT="$ " # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_ELF is not set +CONFIG_CMD_IMLS=y # CONFIG_CMD_CRC32 is not set # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig index af4064929c..b93af8986c 100644 --- a/configs/ve8313_defconfig +++ b/configs/ve8313_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_NAND=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index f90936e744..3adb4c1c09 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -8,7 +8,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set @@ -38,10 +37,10 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" +CONFIG_USB_GADGET_VENDOR_NUM=0x0955 +CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="NVIDIA" -CONFIG_G_DNL_VENDOR_NUM=0x0955 -CONFIG_G_DNL_PRODUCT_NUM=0x701a CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 42353f034e..d57543c1b9 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -6,7 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -34,7 +33,6 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y -CONFIG_SYS_USB_EVENT_POLL=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_DM_VIDEO=y diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig index 134147d57e..a767d99ab0 100644 --- a/configs/vexpress_aemv8a_dram_defconfig +++ b/configs/vexpress_aemv8a_dram_defconfig @@ -10,12 +10,10 @@ CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c090000 debug user_debug=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " # CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 291de6fab5..9c3ee73c0a 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -10,12 +10,10 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlyprintk # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " # CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 51684b1e83..62602dba0d 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -10,12 +10,10 @@ CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c090000 debug user_debug=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " # CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_LOADS is not set diff --git a/configs/vexpress_ca15_tc2_defconfig b/configs/vexpress_ca15_tc2_defconfig index bcf31317ae..a0032ade55 100644 --- a/configs/vexpress_ca15_tc2_defconfig +++ b/configs/vexpress_ca15_tc2_defconfig @@ -6,7 +6,6 @@ CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/vexpress_ca5x2_defconfig b/configs/vexpress_ca5x2_defconfig index 1afd32dd2e..efa8c31ea6 100644 --- a/configs/vexpress_ca5x2_defconfig +++ b/configs/vexpress_ca5x2_defconfig @@ -5,7 +5,6 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 60af905cf4..4e7b961997 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -5,7 +5,6 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set # CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index 948ea73edb..79bb71d747 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -3,10 +3,10 @@ CONFIG_ARCH_VF610=y CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg" CONFIG_BOOTDELAY=3 +CONFIG_LOGLEVEL=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 10cdf0646c..da6fff41d6 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -3,10 +3,10 @@ CONFIG_ARCH_VF610=y CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg" CONFIG_BOOTDELAY=3 +CONFIG_LOGLEVEL=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index 18eb173677..6174fcb604 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -11,7 +11,6 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="vinco => " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPT=y @@ -31,6 +30,8 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="L+G VInCo" CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_USB_ETHER=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 72e782780d..7a76e6d519 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -8,7 +8,6 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig index b40ddae695..426240fdd5 100644 --- a/configs/vme8349_defconfig +++ b/configs/vme8349_defconfig @@ -5,6 +5,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_TSI148=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 7db7b0b6f9..7091586e00 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -1,21 +1,22 @@ CONFIG_ARM=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set +# CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y +CONFIG_TPL_TEXT_BASE=0xff704004 CONFIG_TARGET_VYASA_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" CONFIG_DEBUG_UART=y -CONFIG_ENV_IS_IN_MMC=y CONFIG_SILENT_CONSOLE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y -CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y -CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -27,6 +28,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_SPL_PARTITION_UUIDS=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -47,8 +49,8 @@ CONFIG_PINCTRL_ROCKCHIP_RK3288=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_RK8XX=y -CONFIG_REGULATOR_RK8XX=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y @@ -57,7 +59,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_SYSRESET=y -CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 9765f13a69..e12f870333 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -15,11 +15,11 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +# CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 99fe800317..99f9b06165 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -10,7 +10,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y @@ -33,9 +32,12 @@ CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" CONFIG_OF_LIBFDT=y diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig index 8beda72cd8..45797b699c 100644 --- a/configs/warp7_secure_defconfig +++ b/configs/warp7_secure_defconfig @@ -11,7 +11,6 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y @@ -31,9 +30,12 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" CONFIG_OF_LIBFDT=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 8e58790269..5e7eef0828 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -7,7 +7,6 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -30,9 +29,9 @@ CONFIG_DFU_MMC=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="FSL" -CONFIG_G_DNL_VENDOR_NUM=0x0525 -CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 CONFIG_OF_LIBFDT=y diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index 5139e40002..2c20f607b9 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -5,6 +5,7 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="woodburn U-Boot > " +CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index 7518cea968..b5670ad01c 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="woodburn U-Boot > " +CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index a0a6e20cc5..1fccaacd82 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/x600_defconfig b/configs/x600_defconfig index bcb20facd4..3f81b18d4d 100644 --- a/configs/x600_defconfig +++ b/configs/x600_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_PROMPT="X600> " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_LOOPW=y CONFIG_CMD_FPGA_LOADMK=y CONFIG_CMD_GPIO=y diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig index de80da69c6..4d6b25eaa5 100644 --- a/configs/xfi3_defconfig +++ b/configs/xfi3_defconfig @@ -16,7 +16,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y CONFIG_HUSH_PARSER=y -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y @@ -31,4 +30,6 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y CONFIG_OF_LIBFDT=y diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index c3ba5bf632..95665ecd2a 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -18,17 +18,13 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 # CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set -CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y # CONFIG_CMD_FPGA is not set CONFIG_CMD_GPIO=y @@ -84,9 +80,8 @@ CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 # CONFIG_REGEX is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 588b15430b..15f4cb7c6b 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -19,14 +19,10 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -76,8 +72,7 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03FD -CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 0a3ac9dbea..37b0185e4c 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -20,13 +20,9 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_FLASH=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -74,8 +70,7 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03FD -CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index e7139f8879..07be751882 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -15,9 +15,7 @@ CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index 8769d416c2..4d0d394532 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -15,9 +15,7 @@ CONFIG_SPL=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig index ee0beda47a..d8c79e03b3 100644 --- a/configs/xilinx_zynqmp_zcu102_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig @@ -19,15 +19,11 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -79,8 +75,7 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03FD -CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index e47e4bf6e5..9dd8cc94a0 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -19,15 +19,11 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " CONFIG_FASTBOOT=y -CONFIG_USB_FUNCTION_FASTBOOT=y -CONFIG_CMD_FASTBOOT=y CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -79,8 +75,7 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03FD -CONFIG_G_DNL_PRODUCT_NUM=0x0300 +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig index d714c674f7..a2324c3e79 100644 --- a/configs/xpedite517x_defconfig +++ b/configs/xpedite517x_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig index b04063ae32..7518ef2e39 100644 --- a/configs/xpedite520x_defconfig +++ b/configs/xpedite520x_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig index 657fdcc7fd..ead06a75f8 100644 --- a/configs/xpedite537x_defconfig +++ b/configs/xpedite537x_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_I2C=y diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig index 1e132177fc..80bc914eae 100644 --- a/configs/xpedite550x_defconfig +++ b/configs/xpedite550x_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig index 1b70ea70ae..92c5aa97be 100644 --- a/configs/xpress_defconfig +++ b/configs/xpress_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index 5aa1de6039..7d72b96b88 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index f479c1a1e3..4f77e23ef5 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_PROMPT="U-Boot> " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press <SPACE> to stop\n" CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_IMLS=y CONFIG_CMD_ASKENV=y CONFIG_CRC32_VERIFY=y CONFIG_CMD_SAVES=y diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig index d48406ea8f..515a3135f9 100644 --- a/configs/zipitz2_defconfig +++ b/configs/zipitz2_defconfig @@ -6,7 +6,6 @@ CONFIG_BOOTARGS="console=tty0 console=ttyS2,115200 fbcon=rotate:3" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="$ " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig index 95b13096a4..f323db3d8c 100644 --- a/configs/zmx25_defconfig +++ b/configs/zmx25_defconfig @@ -9,6 +9,7 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="boot in %d s\n" CONFIG_AUTOBOOT_DELAY_STR="delaygs" CONFIG_AUTOBOOT_STOP_STR="stopgs" +CONFIG_CMD_IMLS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index ae248f51bc..ad0ecc65b0 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -53,8 +52,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03FD -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index 0afdd1147a..d4344d96dc 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -7,7 +7,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -42,8 +41,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig index 3684b8531f..af959275fe 100644 --- a/configs/zynq_z_turn_defconfig +++ b/configs/zynq_z_turn_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -52,8 +51,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03FD -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 21852e55b6..5fd1ff093e 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_DFU=y @@ -60,8 +59,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index dfafc9a9f6..8964f57e1d 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_DFU=y @@ -56,8 +55,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index e6845cbaca..dbca4a62ef 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index 428670cbca..b1511d81f7 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index 4d9320611e..71b379add3 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " +CONFIG_CMD_IMLS=y CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y CONFIG_CMD_FPGA_LOADMK=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 5c029109e2..4ffb2f9718 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADFS=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index bb512aff09..17a8809dd2 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -10,7 +10,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -53,8 +52,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index fd31b4dc14..9157d0cb80 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Zynq> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_DFU=y @@ -58,8 +57,8 @@ CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_G_DNL_MANUFACTURER="Xilinx" -CONFIG_G_DNL_VENDOR_NUM=0x03fd -CONFIG_G_DNL_PRODUCT_NUM=0x0300 diff --git a/disk/part.c b/disk/part.c index aa9183d696..66b8101f98 100644 --- a/disk/part.c +++ b/disk/part.c @@ -21,6 +21,9 @@ #define PRINTF(fmt,args...) #endif +/* Check all partition types */ +#define PART_TYPE_ALL -1 + DECLARE_GLOBAL_DATA_PTR; #ifdef HAVE_BLOCK_DEVICE @@ -626,8 +629,8 @@ cleanup: return ret; } -int part_get_info_by_name(struct blk_desc *dev_desc, const char *name, - disk_partition_t *info) +int part_get_info_by_name_type(struct blk_desc *dev_desc, const char *name, + disk_partition_t *info, int part_type) { struct part_driver *first_drv = ll_entry_start(struct part_driver, part_driver); @@ -638,6 +641,8 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name, int ret; int i; for (i = 1; i < part_drv->max_entries; i++) { + if (part_type >= 0 && part_type != part_drv->part_type) + break; ret = part_drv->get_info(dev_desc, i, info); if (ret != 0) { /* no more entries in table */ @@ -652,6 +657,12 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name, return -1; } +int part_get_info_by_name(struct blk_desc *dev_desc, const char *name, + disk_partition_t *info) +{ + return part_get_info_by_name_type(dev_desc, name, info, PART_TYPE_ALL); +} + void part_set_generic_name(const struct blk_desc *dev_desc, int part_num, char *name) { diff --git a/disk/part_dos.c b/disk/part_dos.c index 7ede15ec26..6dd2c2d147 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -44,7 +44,7 @@ static inline int is_extended(int part_type) static inline int is_bootable(dos_partition_t *p) { - return p->boot_ind == 0x80; + return (p->sys_ind == 0xef) || (p->boot_ind == 0x80); } static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector, @@ -89,6 +89,21 @@ static int test_block_type(unsigned char *buffer) static int part_test_dos(struct blk_desc *dev_desc) { +#ifndef CONFIG_SPL_BUILD + ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz); + + if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1) + return -1; + + if (test_block_type((unsigned char *)mbr) != DOS_MBR) + return -1; + + if (dev_desc->sig_type == SIG_TYPE_NONE && + mbr->unique_mbr_signature != 0) { + dev_desc->sig_type = SIG_TYPE_MBR; + dev_desc->mbr_sig = mbr->unique_mbr_signature; + } +#else ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz); if (blk_dread(dev_desc, 0, 1, (ulong *)buffer) != 1) @@ -96,6 +111,7 @@ static int part_test_dos(struct blk_desc *dev_desc) if (test_block_type(buffer) != DOS_MBR) return -1; +#endif return 0; } diff --git a/disk/part_efi.c b/disk/part_efi.c index 2973d52f6a..782f8be502 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -360,7 +360,7 @@ static int set_protective_mbr(struct blk_desc *dev_desc) /* Read MBR to backup boot code if it exists */ if (blk_dread(dev_desc, 0, 1, p_mbr) != 1) { - error("** Can't read from device %d **\n", dev_desc->devnum); + pr_err("** Can't read from device %d **\n", dev_desc->devnum); return -1; } @@ -716,7 +716,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, for (i = 0; i < parts; i++) { if (i == gpt_head->num_partition_entries) { - error("More partitions than allowed!\n"); + pr_err("More partitions than allowed!\n"); return -1; } @@ -729,7 +729,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, if (strncmp(efi_str, (char *)partitions[i].name, sizeof(partitions->name))) { - error("Partition name: %s does not match %s!\n", + pr_err("Partition name: %s does not match %s!\n", efi_str, (char *)partitions[i].name); return -1; } @@ -746,7 +746,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, if ((i == parts - 1) && (partitions[i].size == 0)) continue; - error("Partition %s size: %llu does not match %llu!\n", + pr_err("Partition %s size: %llu does not match %llu!\n", efi_str, (unsigned long long)gpt_part_size, (unsigned long long)partitions[i].size); return -1; @@ -767,7 +767,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc, (unsigned long long)partitions[i].start); if (le64_to_cpu(gpt_e[i].starting_lba) != partitions[i].start) { - error("Partition %s start: %llu does not match %llu!\n", + pr_err("Partition %s start: %llu does not match %llu!\n", efi_str, le64_to_cpu(gpt_e[i].starting_lba), (unsigned long long)partitions[i].start); return -1; @@ -923,11 +923,20 @@ static int is_pmbr_valid(legacy_mbr * mbr) static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba, gpt_header *pgpt_head, gpt_entry **pgpt_pte) { + /* Confirm valid arguments prior to allocation. */ if (!dev_desc || !pgpt_head) { printf("%s: Invalid Argument(s)\n", __func__); return 0; } + ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz); + + /* Read MBR Header from device */ + if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1) { + printf("*** ERROR: Can't read MBR header ***\n"); + return 0; + } + /* Read GPT Header from device */ if (blk_dread(dev_desc, (lbaint_t)lba, 1, pgpt_head) != 1) { printf("*** ERROR: Can't read GPT header ***\n"); @@ -937,6 +946,18 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba, if (validate_gpt_header(pgpt_head, (lbaint_t)lba, dev_desc->lba)) return 0; + if (dev_desc->sig_type == SIG_TYPE_NONE) { + efi_guid_t empty = {}; + if (memcmp(&pgpt_head->disk_guid, &empty, sizeof(empty))) { + dev_desc->sig_type = SIG_TYPE_GUID; + memcpy(&dev_desc->guid_sig, &pgpt_head->disk_guid, + sizeof(empty)); + } else if (mbr->unique_mbr_signature != 0) { + dev_desc->sig_type = SIG_TYPE_MBR; + dev_desc->mbr_sig = mbr->unique_mbr_signature; + } + } + /* Read and allocate Partition Table Entries */ *pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head); if (*pgpt_pte == NULL) { diff --git a/disk/part_iso.c b/disk/part_iso.c index 8aef251f4e..4036b00b25 100644 --- a/disk/part_iso.c +++ b/disk/part_iso.c @@ -202,7 +202,7 @@ found: static int part_get_info_iso(struct blk_desc *dev_desc, int part_num, disk_partition_t *info) { - return part_get_info_iso_verb(dev_desc, part_num, info, 1); + return part_get_info_iso_verb(dev_desc, part_num, info, 0); } static void part_print_iso(struct blk_desc *dev_desc) @@ -228,7 +228,7 @@ static int part_test_iso(struct blk_desc *dev_desc) { disk_partition_t info; - return part_get_info_iso_verb(dev_desc, 1, &info, 1); + return part_get_info_iso_verb(dev_desc, 1, &info, 0); } U_BOOT_PART_TYPE(iso) = { diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot index b8afa15762..2c3ee7810a 100644 --- a/doc/README.android-fastboot +++ b/doc/README.android-fastboot @@ -34,11 +34,11 @@ The fastboot gadget relies on the USB download gadget, so the following options must be configured: CONFIG_USB_GADGET_DOWNLOAD -CONFIG_G_DNL_VENDOR_NUM -CONFIG_G_DNL_PRODUCT_NUM -CONFIG_G_DNL_MANUFACTURER +CONFIG_USB_GADGET_VENDOR_NUM +CONFIG_USB_GADGET_PRODUCT_NUM +CONFIG_USB_GADGET_MANUFACTURER -NOTE: The CONFIG_G_DNL_VENDOR_NUM must be one of the numbers supported by +NOTE: The CONFIG_USB_GADGET_VENDOR_NUM must be one of the numbers supported by the fastboot client. The list of vendor IDs supported can be found in the fastboot client source code (fastboot.c) mentioned above. diff --git a/doc/README.imx6 b/doc/README.imx6 index 0e00968731..2e8f1d8a8a 100644 --- a/doc/README.imx6 +++ b/doc/README.imx6 @@ -110,34 +110,8 @@ issue the command: sudo ../imx_usb_loader/imx_usb -v u-boot.imx -Getting U-Boot when SPL support is active, it requires -two downloads. imx_usb_loader downloads the SPL into -OCRAM and starts it. SPL will check for a valid u-boot.img, and -because it is not found, it will wait for it using the y-modem -protocol via the console. - -A first install is then possible by combining imx_usb_loader with -another tool such as kermit. - -sudo ../imx_usb_loader/imx_usb -v SPL -kermit kermit_uboot - -and kermit_uboot contains something like this (set line should be adjusted): - -set line /dev/ttyUSB1 -set speed 115200 -SET CARRIER-WATCH OFF -set flow-control none -set handshake none -set prefixing all -set file type bin -set protocol ymodem -send u-boot.img -c - -The last "c" command tells kermit (from ckermit package in most distros) -to switch from command line mode to communication mode, and when the -script is finished, the U-Boot prompt is shown in the same shell. +In order to load SPL and u-boot.img via imx_usb_loader tool, +please refer to doc/README.sdp. 3. Using Secure Boot on i.MX6 machines with SPL support ------------------------------------------------------- @@ -186,4 +160,4 @@ cat SPL csf-SPL.bin > SPL-signed cat u-boot-ivt.img csf-u-boot.bin > u-boot-signed.img These two signed binaries can be used on an i.MX6 in closed -configuration when the according SRK Table Hash has been flashed.
\ No newline at end of file +configuration when the according SRK Table Hash has been flashed. diff --git a/doc/README.multi-dtb-fit b/doc/README.multi-dtb-fit new file mode 100644 index 0000000000..6cc4965bea --- /dev/null +++ b/doc/README.multi-dtb-fit @@ -0,0 +1,65 @@ +MULTI DTB FIT and SPL_MULTI_DTB_FIT + +The purpose of this feature is to enable U-Boot or the SPL to select its DTB +from a FIT appended at the end of the binary. +It comes in two flavors: U-Boot (CONFIG_MULTI_DTB_FIT) and SPL +(CONFIG_SPL_MULTI_DTB_FIT). + +U-Boot flavor: +Usually the DTB is selected by the SPL and passed down to U-Boot. But some +platforms don't use the SPL. In this case MULTI_DTB_FIT can used to provide +U-Boot with a choice of DTBs. +The relevant DTBs are packed into a FIT (list provided by CONFIG__OF_LIST). The +FIT is automatically generated at the end of the compilation and appended to +u-boot.bin so that U-Boot can locate it and select the correct DTB from inside +the FIT. +The selection is done using board_fit_config_name_match() (same as what the SPL +uses to select the DTB for U-Boot). The selection happens during fdtdec_setup() +which is called during before relocation by board_init_f(). + +SPL flavor: +the SPL uses only a small subset of the DTB and it usually depends more +on the SOC than on the board. So it's usually fine to include a DTB in the +SPL that doesn't exactly match the board. There are howerver some cases +where it's not possible. In the later case, in order to support multiple +boards (or board revisions) with the same SPL binary, SPL_MULTI_DTB_FIT +can be used. +The relevant DTBs are packed into a FIT. This FIT is automatically generated +at the end of the compilation, compressed and appended to u-boot-spl.bin, so +that SPL can locate it and select the correct DTB from inside the FIT. +CONFIG_SPL__OF_LIST is used to list the relevant DTBs. +The compression stage is optional but reduces the impact on the size of the +SPL. LZO and GZIP compressions are supported. By default, the area where the +FIT is uncompressed is dynamicaly allocated but this behaviour can be changed +for platforms that don't provide a HEAP big enough to contain the uncompressed +FIT. +The SPL uses board_fit_config_name_match() to find the correct DTB within the +FIT (same as what the SPL uses to select the DTB for U-Boot). +Uncompression and selection stages happen in fdtdec_setup() which is called +during the early initialization stage of the SPL (spl_early_init() or +spl_init()) + +Impacts and performances (SPL flavor): +The impact of this option is relatively small. Here are some numbers measured +for a TI DRA72 platform: + + +----------+------------+-----------+------------+ + | size | size delta | SPL boot | boot time | + | (bytes) | (bytes) | time (s) | delta (s) | ++---------------------------+----------+------------+-----------+------------+ +| 1 DTB | | | | | ++---------------------------+----------+------------+-----------+------------+ +| reference | 125305 | 0 | 1.389 | 0 | +| LZO (dynamic allocation) | 125391 | 86 | 1.381 | -0.008 | ++---------------------------+----------+------------+-----------+------------+ +| 4 DTBs (DRA7, DRA71, | | | | | +| DRA72, DRA72 revC) | | | | | ++---------------------------+----------+------------+-----------+------------+ +| LZO (dynamic allocation) | 125991 | 686 | 1.39 | 0.001 | +| LZO (user defined area) | 125927 | 622 | 1.403 | 0.014 | +| GZIP (user defined area) | 133880 | 8575 | 1.421 | 0.032 | +| No compression (in place) | 137472 | 12167 | 1.412 | 0.023 | ++---------------------------+----------+------------+-----------+------------+ + +Note: SPL boot time is the time elapsed between the 'reset' command is entered +and the time when the first U-Boot (not SPL) version string is displayed. diff --git a/doc/README.qemu-arm b/doc/README.qemu-arm new file mode 100644 index 0000000000..2895e3b97f --- /dev/null +++ b/doc/README.qemu-arm @@ -0,0 +1,54 @@ +# +# Copyright (C) 2017, Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +U-Boot on QEMU's 'virt' machine on ARM +====================================== + +QEMU for ARM supports a special 'virt' machine designed for emulation and +virtualization purposes. This document describes how to run U-Boot under it. + +The 'virt' platform provides the following as the basic functionality: + + - A freely configurable amount of CPU cores + - U-Boot loaded and executing in the emulated flash at address 0x0 + - A generated device tree blob placed at the start of RAM + - A freely configurable amount of RAM, described by the DTB + - A PL011 serial port, discoverable via the DTB + - An ARMv7 architected timer + - PSCI for rebooting the system + - A generic ECAM-based PCI host controller, discoverable via the DTB + +Additionally, a number of optional peripherals can be added to the PCI bus. + +Building U-Boot +--------------- +Set the CROSS_COMPILE and ARCH=arm environment variables as usual, and run: + + make qemu_arm_defconfig + make + +Running U-Boot +-------------- +The minimal QEMU command line to get U-Boot up and running is: + + qemu-system-arm -machine virt,highmem=off -bios u-boot.bin + +The 'highmem=off' parameter to the 'virt' machine is required for PCI to work +in U-Boot. + +Additional peripherals that have been tested to work in both U-Boot and Linux +can be enabled with the following command line parameters: + +- To add a Serial ATA disk via an Intel ICH9 AHCI controller, pass e.g.: + -drive if=none,file=disk.img,id=mydisk -device ich9-ahci,id=ahci -device ide-drive,drive=mydisk,bus=ahci.0 +- To add an Intel E1000 network adapter, pass e.g.: + -netdev user,id=net0 -device e1000,netdev=net0 +- To add an EHCI-compliant USB host controller, pass e.g.: + -device usb-ehci,id=ehci +- To add a NVMe disk, pass e.g.: + -drive if=none,file=disk.img,id=mydisk -device nvme,drive=mydisk,serial=foo + +These have been tested in QEMU 2.9.0 but should work in at least 2.5.0 as well. diff --git a/doc/README.rmobile b/doc/README.rmobile index 4fbbcb3ef7..c65cbabc70 100644 --- a/doc/README.rmobile +++ b/doc/README.rmobile @@ -2,8 +2,8 @@ Summary ======= This README is about U-Boot support for Renesas's ARM Cortex-A9 based RMOBILE[1] -and R-Car[2]family of SoCs. Renesas's RMOBILE/R-Car SoC family contains an ARM -Cortex-A9. +and Cortex-A9/A53/A57 based R-Car[2] family of SoCs. Renesas's RMOBILE/R-Car SoC +family contains an ARM Cortex-A9/A53/A57. Currently the following boards are supported: @@ -11,16 +11,21 @@ Currently the following boards are supported: * Atmark-Techno Armadillo-800-EVA [4] * Renesas Electronics Lager * Renesas Electronics Koelsch +* Renesas Electronics Salvator-X M3 +* Renesas Electronics Salvator-XS H3 ES2.0+ +* Renesas Electronics ULCB M3 / H3 ES2.0+ Toolchain ========= -ARM Cortex-A9 support ARM v7 instruction set (-march=armv7a). -But currently we compile with -march=armv5 to allow more compilers to work. -(For U-Boot code this has no performance impact.) -Because there was no compiler which is supporting armv7a not much before. -Currently, ELDK[5], Linaro[6], CodeSourcey[7] and Emdebian[8] supports -march=armv7a -and you can get. +Either ARMv7 toolchain for 32bit Cortex-A9 systems or ARMv8 (aarch64) +toolchain for 64bit Cortex-A53/A57 systems. Currently we compile the +32bit systems with -march=armv5 to allow more compilers to work. (For +U-Boot code this has no performance impact.) + +Currently, ELDK[5], Linaro[6], CodeSourcery[7] and Emdebian[8] supports +ARMv7. Modern distributions also contain ARMv7 and ARMv8 crosstoolchains +in their package feeds. Build ===== @@ -48,6 +53,26 @@ Build make koelsch_config make +* Salvator-X M3 + + make r8a7796_salvator-x_defconfig + make + +* Salvator-XS H3 ES2.0 + + make r8a7795_salvator-x_defconfig + make + +* ULCB M3 + + make r8a7796_ulcb_defconfig + make + +* ULCB H3 ES2.0 + + make r8a7795_ulcb_defconfig + make + Links ===== diff --git a/doc/README.rockchip b/doc/README.rockchip index 12fec38139..4b7be0b715 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -150,6 +150,24 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, th debug uart must be disabled +Booting from an SD card on RK3288 with TPL +========================================== + +Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add +new SPL features like Falcon mode or etc. + +So introduce TPL so-that adding new features to SPL is possible because now TPL should +run minimal with code like DDR, clock etc and rest of new features in SPL. + +As of now TPL is added on Vyasa-RK3288 board. + +To write an image that boots from an SD card (assumed to be /dev/mmcblk0): + + ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out && + cat ./spl/u-boot-spl-dtb.bin >> out && + sudo dd if=out of=/dev/mmcblk0 seek=64 && + sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256 + Booting from an SD card on RK3188 ================================= diff --git a/doc/README.sdp b/doc/README.sdp index 9b438c0746..178ea688a7 100644 --- a/doc/README.sdp +++ b/doc/README.sdp @@ -14,7 +14,7 @@ SoC's recovery mechanism is using. The SDP protocol over USB is a USB HID class protocol. USB HID class protocols allow to access a USB device without OS specific drivers. The U-Boot implementation has primarly been tested using the open source -imx_loader utility (https://github.com/toradex/imx_loader). +imx_loader utility (https://github.com/boundarydevices/imx_usb_loader). The host side utilities are typically capable to interpret the i.MX specific image header (see doc/README.imximage). There are extensions diff --git a/doc/device-tree-bindings/chosen.txt b/doc/device-tree-bindings/chosen.txt index 5625d210e8..c96b8f7109 100644 --- a/doc/device-tree-bindings/chosen.txt +++ b/doc/device-tree-bindings/chosen.txt @@ -56,10 +56,20 @@ Each list element of the property should specify a device to be probed in the order they are listed: references (i.e. implicit paths), a full path or an alias is expected for each entry. +A special specifier "same-as-spl" can be used at any position in the +boot-order to direct U-Boot to insert the device the SPL was booted +from there. Whether this is indeed inserted or silently ignored (if +it is not supported on any given SoC/board or if the boot-device is +not available to continue booting from) is implementation-defined. +Note that if "same-as-spl" expands to an actual node for a given +board, the corresponding node may appear multiple times in the +boot-order (as there currently exists no mechanism to suppress +duplicates from the list). + Example ------- / { chosen { - u-boot,spl-boot-order = &sdmmc, "/sdhci@fe330000"; + u-boot,spl-boot-order = "same-as-spl", &sdmmc, "/sdhci@fe330000"; }; }; diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt index 2cf4b9de8b..918711eb4d 100644 --- a/doc/device-tree-bindings/regulator/regulator.txt +++ b/doc/device-tree-bindings/regulator/regulator.txt @@ -10,10 +10,10 @@ pmic: drivers/power/pmic/max77686.c regulator: drivers/power/regulator/max77686.c For the node name e.g.: "prefix[:alpha:]num { ... }": -- the driver prefix should be: "prefix" or "PREFIX" - case insensitive +- the driver prefix should be: "prefix" - case sensitive - the node name's "num" is set as "dev->driver_data" on bind -Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "LDO1", "LDOREG@1"... +Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "ldoreg@1, ... Optional properties: - regulator-name: a string, required by the regulator uclass diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig index e5335f7234..8094420548 100644 --- a/drivers/adc/Kconfig +++ b/drivers/adc/Kconfig @@ -28,3 +28,12 @@ config ADC_SANDBOX - 4 analog input channels - 16-bit resolution - single and multi-channel conversion mode + +config SARADC_ROCKCHIP + bool "Enable Rockchip SARADC driver" + help + This enables driver for Rockchip SARADC. + It provides: + - 2~6 analog input channels + - 1O or 12 bits resolution + - Up to 1MSPS of sample rate diff --git a/drivers/adc/Makefile b/drivers/adc/Makefile index cebf26de07..4b5aa693ec 100644 --- a/drivers/adc/Makefile +++ b/drivers/adc/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_ADC) += adc-uclass.o obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o obj-$(CONFIG_ADC_SANDBOX) += sandbox.o +obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c index a5ef722d21..a4c20f4d35 100644 --- a/drivers/adc/adc-uclass.c +++ b/drivers/adc/adc-uclass.c @@ -64,7 +64,7 @@ static int adc_supply_enable(struct udevice *dev) } if (ret) - error("%s: can't enable %s-supply!", dev->name, supply_type); + pr_err("%s: can't enable %s-supply!", dev->name, supply_type); return ret; } @@ -389,12 +389,12 @@ static int adc_pre_probe(struct udevice *dev) /* Set ADC VDD platdata: polarity, uV, regulator (phandle). */ ret = adc_vdd_platdata_set(dev); if (ret) - error("%s: Can't update Vdd. Error: %d", dev->name, ret); + pr_err("%s: Can't update Vdd. Error: %d", dev->name, ret); /* Set ADC VSS platdata: polarity, uV, regulator (phandle). */ ret = adc_vss_platdata_set(dev); if (ret) - error("%s: Can't update Vss. Error: %d", dev->name, ret); + pr_err("%s: Can't update Vss. Error: %d", dev->name, ret); return 0; } diff --git a/drivers/adc/exynos-adc.c b/drivers/adc/exynos-adc.c index 324d72f3a9..3bb065d215 100644 --- a/drivers/adc/exynos-adc.c +++ b/drivers/adc/exynos-adc.c @@ -22,7 +22,7 @@ int exynos_adc_channel_data(struct udevice *dev, int channel, struct exynos_adc_v2 *regs = priv->regs; if (channel != priv->active_channel) { - error("Requested channel is not active!"); + pr_err("Requested channel is not active!"); return -EINVAL; } @@ -80,7 +80,7 @@ int exynos_adc_probe(struct udevice *dev) /* Check HW version */ if (readl(®s->version) != ADC_V2_VERSION) { - error("This driver supports only ADC v2!"); + pr_err("This driver supports only ADC v2!"); return -ENXIO; } @@ -109,7 +109,7 @@ int exynos_adc_ofdata_to_platdata(struct udevice *dev) priv->regs = (struct exynos_adc_v2 *)devfdt_get_addr(dev); if (priv->regs == (struct exynos_adc_v2 *)FDT_ADDR_T_NONE) { - error("Dev: %s - can't get address!", dev->name); + pr_err("Dev: %s - can't get address!", dev->name); return -ENODATA; } diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c new file mode 100644 index 0000000000..a2856db497 --- /dev/null +++ b/drivers/adc/rockchip-saradc.c @@ -0,0 +1,183 @@ +/* + * (C) Copyright 2017, Fuzhou Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Rockchip SARADC driver for U-Boot + */ + +#include <common.h> +#include <adc.h> +#include <clk.h> +#include <dm.h> +#include <errno.h> +#include <asm/io.h> + +#define SARADC_CTRL_CHN_MASK GENMASK(2, 0) +#define SARADC_CTRL_POWER_CTRL BIT(3) +#define SARADC_CTRL_IRQ_ENABLE BIT(5) +#define SARADC_CTRL_IRQ_STATUS BIT(6) + +#define SARADC_TIMEOUT (100 * 1000) + +struct rockchip_saradc_regs { + unsigned int data; + unsigned int stas; + unsigned int ctrl; + unsigned int dly_pu_soc; +}; + +struct rockchip_saradc_data { + int num_bits; + int num_channels; + unsigned long clk_rate; +}; + +struct rockchip_saradc_priv { + struct rockchip_saradc_regs *regs; + int active_channel; + const struct rockchip_saradc_data *data; +}; + +int rockchip_saradc_channel_data(struct udevice *dev, int channel, + unsigned int *data) +{ + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev); + + if (channel != priv->active_channel) { + pr_err("Requested channel is not active!"); + return -EINVAL; + } + + if ((readl(&priv->regs->ctrl) & SARADC_CTRL_IRQ_STATUS) != + SARADC_CTRL_IRQ_STATUS) + return -EBUSY; + + /* Read value */ + *data = readl(&priv->regs->data); + *data &= uc_pdata->data_mask; + + /* Power down adc */ + writel(0, &priv->regs->ctrl); + + return 0; +} + +int rockchip_saradc_start_channel(struct udevice *dev, int channel) +{ + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + + if (channel < 0 || channel >= priv->data->num_channels) { + pr_err("Requested channel is invalid!"); + return -EINVAL; + } + + /* 8 clock periods as delay between power up and start cmd */ + writel(8, &priv->regs->dly_pu_soc); + + /* Select the channel to be used and trigger conversion */ + writel(SARADC_CTRL_POWER_CTRL | (channel & SARADC_CTRL_CHN_MASK) | + SARADC_CTRL_IRQ_ENABLE, &priv->regs->ctrl); + + priv->active_channel = channel; + + return 0; +} + +int rockchip_saradc_stop(struct udevice *dev) +{ + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + + /* Power down adc */ + writel(0, &priv->regs->ctrl); + + priv->active_channel = -1; + + return 0; +} + +int rockchip_saradc_probe(struct udevice *dev) +{ + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + struct clk clk; + int ret; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret) + return ret; + + ret = clk_set_rate(&clk, priv->data->clk_rate); + if (IS_ERR_VALUE(ret)) + return ret; + + priv->active_channel = -1; + + return 0; +} + +int rockchip_saradc_ofdata_to_platdata(struct udevice *dev) +{ + struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev); + struct rockchip_saradc_priv *priv = dev_get_priv(dev); + struct rockchip_saradc_data *data; + + data = (struct rockchip_saradc_data *)dev_get_driver_data(dev); + priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev); + if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) { + pr_err("Dev: %s - can't get address!", dev->name); + return -ENODATA; + } + + priv->data = data; + uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;; + uc_pdata->data_format = ADC_DATA_FORMAT_BIN; + uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5; + uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1; + + return 0; +} + +static const struct adc_ops rockchip_saradc_ops = { + .start_channel = rockchip_saradc_start_channel, + .channel_data = rockchip_saradc_channel_data, + .stop = rockchip_saradc_stop, +}; + +static const struct rockchip_saradc_data saradc_data = { + .num_bits = 10, + .num_channels = 3, + .clk_rate = 1000000, +}; + +static const struct rockchip_saradc_data rk3066_tsadc_data = { + .num_bits = 12, + .num_channels = 2, + .clk_rate = 50000, +}; + +static const struct rockchip_saradc_data rk3399_saradc_data = { + .num_bits = 10, + .num_channels = 6, + .clk_rate = 1000000, +}; + +static const struct udevice_id rockchip_saradc_ids[] = { + { .compatible = "rockchip,saradc", + .data = (ulong)&saradc_data }, + { .compatible = "rockchip,rk3066-tsadc", + .data = (ulong)&rk3066_tsadc_data }, + { .compatible = "rockchip,rk3399-saradc", + .data = (ulong)&rk3399_saradc_data }, + { } +}; + +U_BOOT_DRIVER(rockchip_saradc) = { + .name = "rockchip_saradc", + .id = UCLASS_ADC, + .of_match = rockchip_saradc_ids, + .ops = &rockchip_saradc_ops, + .probe = rockchip_saradc_probe, + .ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv), +}; diff --git a/drivers/adc/sandbox.c b/drivers/adc/sandbox.c index 371892237a..80e8e3701a 100644 --- a/drivers/adc/sandbox.c +++ b/drivers/adc/sandbox.c @@ -61,7 +61,7 @@ int sandbox_adc_channel_data(struct udevice *dev, int channel, /* For single-channel conversion mode, check if channel was selected */ if ((priv->conversion_mode == SANDBOX_ADC_MODE_SINGLE_CHANNEL) && !(priv->active_channel_mask & (1 << channel))) { - error("Request for an inactive channel!"); + pr_err("Request for an inactive channel!"); return -EINVAL; } @@ -82,12 +82,12 @@ int sandbox_adc_channels_data(struct udevice *dev, unsigned int channel_mask, /* Return error for single-channel conversion mode */ if (priv->conversion_mode == SANDBOX_ADC_MODE_SINGLE_CHANNEL) { - error("ADC in single-channel mode!"); + pr_err("ADC in single-channel mode!"); return -EPERM; } /* Check channel selection */ if (!(priv->active_channel_mask & channel_mask)) { - error("Request for an inactive channel!"); + pr_err("Request for an inactive channel!"); return -EINVAL; } /* The conversion must be started before reading the data */ diff --git a/drivers/ata/dwc_ahci.c b/drivers/ata/dwc_ahci.c index f6147989b1..b16304baed 100644 --- a/drivers/ata/dwc_ahci.c +++ b/drivers/ata/dwc_ahci.c @@ -58,19 +58,19 @@ static int dwc_ahci_probe(struct udevice *dev) ret = generic_phy_get_by_name(dev, "sata-phy", &phy); if (ret) { - error("can't get the phy from DT\n"); + pr_err("can't get the phy from DT\n"); return ret; } ret = generic_phy_init(&phy); if (ret) { - error("unable to initialize the sata phy\n"); + pr_err("unable to initialize the sata phy\n"); return ret; } ret = generic_phy_power_on(&phy); if (ret) { - error("unable to power on the sata phy\n"); + pr_err("unable to power on the sata phy\n"); return ret; } diff --git a/drivers/bios_emulator/include/x86emu/x86emui.h b/drivers/bios_emulator/include/x86emu/x86emui.h index a74957d992..3537255539 100644 --- a/drivers/bios_emulator/include/x86emu/x86emui.h +++ b/drivers/bios_emulator/include/x86emu/x86emui.h @@ -72,9 +72,6 @@ #include <string.h> #endif -#define printk printf - - /*--------------------------- Inline Functions ----------------------------*/ #ifdef __cplusplus diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c index 78f1b759d8..5c05e3d78d 100644 --- a/drivers/clk/clk_boston.c +++ b/drivers/clk/clk_boston.c @@ -67,13 +67,13 @@ static int clk_boston_ofdata_to_platdata(struct udevice *dev) err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "regmap", &syscon); if (err) { - error("unable to find syscon device\n"); + pr_err("unable to find syscon device\n"); return err; } state->regmap = syscon_get_regmap(syscon); if (!state->regmap) { - error("unable to find regmap\n"); + pr_err("unable to find regmap\n"); return -ENODEV; } diff --git a/drivers/clk/clk_stm32f7.c b/drivers/clk/clk_stm32f7.c index 255a583c95..96a06b8f8c 100644 --- a/drivers/clk/clk_stm32f7.c +++ b/drivers/clk/clk_stm32f7.c @@ -224,7 +224,7 @@ static unsigned long stm32_clk_get_rate(struct clk *clk) return sysclk >>= shift; break; default: - error("clock index %ld out of range\n", clk->id); + pr_err("clock index %ld out of range\n", clk->id); return -EINVAL; break; } @@ -310,10 +310,11 @@ static const struct udevice_id stm32_clk_ids[] = { }; U_BOOT_DRIVER(stm32f7_clk) = { - .name = "stm32f7_clk", - .id = UCLASS_CLK, - .of_match = stm32_clk_ids, - .ops = &stm32_clk_ops, - .probe = stm32_clk_probe, - .flags = DM_FLAG_PRE_RELOC, + .name = "stm32f7_clk", + .id = UCLASS_CLK, + .of_match = stm32_clk_ids, + .ops = &stm32_clk_ops, + .probe = stm32_clk_probe, + .priv_auto_alloc_size = sizeof(struct stm32_clk), + .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/clk_stm32h7.c index fd0e3ab100..f84a4d2b2f 100644 --- a/drivers/clk/clk_stm32h7.c +++ b/drivers/clk/clk_stm32h7.c @@ -109,7 +109,7 @@ DECLARE_GLOBAL_DATA_PTR; #define QSPISRC_PER_CK 3 #define PWR_CR3 0x0c -#define PWR_CR3_SDEN BIT(2) +#define PWR_CR3_SCUEN BIT(2) #define PWR_D3CR 0x18 #define PWR_D3CR_VOS_MASK GENMASK(15, 14) #define PWR_D3CR_VOS_SHIFT 14 @@ -195,13 +195,6 @@ struct clk_cfg { const char *name; }; -#define CLK(_gate_offset, _bit_idx, _name) \ -{ \ - .gate_offset = _gate_offset,\ - .gate_bit_idx = _bit_idx,\ - .name = _name,\ -} - /* * the way all these entries are sorted in this array could seem * unlogical, but we are dependant of kernel DT_bindings, @@ -210,114 +203,114 @@ struct clk_cfg { */ static const struct clk_cfg clk_map[] = { - CLK(RCC_AHB3ENR, 31, "d1sram1"), /* peripheral clocks */ - CLK(RCC_AHB3ENR, 30, "itcm"), - CLK(RCC_AHB3ENR, 29, "dtcm2"), - CLK(RCC_AHB3ENR, 28, "dtcm1"), - CLK(RCC_AHB3ENR, 8, "flitf"), - CLK(RCC_AHB3ENR, 5, "jpgdec"), - CLK(RCC_AHB3ENR, 4, "dma2d"), - CLK(RCC_AHB3ENR, 0, "mdma"), - CLK(RCC_AHB1ENR, 28, "usb2ulpi"), - CLK(RCC_AHB1ENR, 17, "eth1rx"), - CLK(RCC_AHB1ENR, 16, "eth1tx"), - CLK(RCC_AHB1ENR, 15, "eth1mac"), - CLK(RCC_AHB1ENR, 14, "art"), - CLK(RCC_AHB1ENR, 26, "usb1ulpi"), - CLK(RCC_AHB1ENR, 1, "dma2"), - CLK(RCC_AHB1ENR, 0, "dma1"), - CLK(RCC_AHB2ENR, 31, "d2sram3"), - CLK(RCC_AHB2ENR, 30, "d2sram2"), - CLK(RCC_AHB2ENR, 29, "d2sram1"), - CLK(RCC_AHB2ENR, 5, "hash"), - CLK(RCC_AHB2ENR, 4, "crypt"), - CLK(RCC_AHB2ENR, 0, "camitf"), - CLK(RCC_AHB4ENR, 28, "bkpram"), - CLK(RCC_AHB4ENR, 25, "hsem"), - CLK(RCC_AHB4ENR, 21, "bdma"), - CLK(RCC_AHB4ENR, 19, "crc"), - CLK(RCC_AHB4ENR, 10, "gpiok"), - CLK(RCC_AHB4ENR, 9, "gpioj"), - CLK(RCC_AHB4ENR, 8, "gpioi"), - CLK(RCC_AHB4ENR, 7, "gpioh"), - CLK(RCC_AHB4ENR, 6, "gpiog"), - CLK(RCC_AHB4ENR, 5, "gpiof"), - CLK(RCC_AHB4ENR, 4, "gpioe"), - CLK(RCC_AHB4ENR, 3, "gpiod"), - CLK(RCC_AHB4ENR, 2, "gpioc"), - CLK(RCC_AHB4ENR, 1, "gpiob"), - CLK(RCC_AHB4ENR, 0, "gpioa"), - CLK(RCC_APB3ENR, 6, "wwdg1"), - CLK(RCC_APB1LENR, 29, "dac12"), - CLK(RCC_APB1LENR, 11, "wwdg2"), - CLK(RCC_APB1LENR, 8, "tim14"), - CLK(RCC_APB1LENR, 7, "tim13"), - CLK(RCC_APB1LENR, 6, "tim12"), - CLK(RCC_APB1LENR, 5, "tim7"), - CLK(RCC_APB1LENR, 4, "tim6"), - CLK(RCC_APB1LENR, 3, "tim5"), - CLK(RCC_APB1LENR, 2, "tim4"), - CLK(RCC_APB1LENR, 1, "tim3"), - CLK(RCC_APB1LENR, 0, "tim2"), - CLK(RCC_APB1HENR, 5, "mdios"), - CLK(RCC_APB1HENR, 4, "opamp"), - CLK(RCC_APB1HENR, 1, "crs"), - CLK(RCC_APB2ENR, 18, "tim17"), - CLK(RCC_APB2ENR, 17, "tim16"), - CLK(RCC_APB2ENR, 16, "tim15"), - CLK(RCC_APB2ENR, 1, "tim8"), - CLK(RCC_APB2ENR, 0, "tim1"), - CLK(RCC_APB4ENR, 26, "tmpsens"), - CLK(RCC_APB4ENR, 16, "rtcapb"), - CLK(RCC_APB4ENR, 15, "vref"), - CLK(RCC_APB4ENR, 14, "comp12"), - CLK(RCC_APB4ENR, 1, "syscfg"), - CLK(RCC_AHB3ENR, 16, "sdmmc1"), /* kernel clocks */ - CLK(RCC_AHB3ENR, 14, "quadspi"), - CLK(RCC_AHB3ENR, 12, "fmc"), - CLK(RCC_AHB1ENR, 27, "usb2otg"), - CLK(RCC_AHB1ENR, 25, "usb1otg"), - CLK(RCC_AHB1ENR, 5, "adc12"), - CLK(RCC_AHB2ENR, 9, "sdmmc2"), - CLK(RCC_AHB2ENR, 6, "rng"), - CLK(RCC_AHB4ENR, 24, "adc3"), - CLK(RCC_APB3ENR, 4, "dsi"), - CLK(RCC_APB3ENR, 3, "ltdc"), - CLK(RCC_APB1LENR, 31, "usart8"), - CLK(RCC_APB1LENR, 30, "usart7"), - CLK(RCC_APB1LENR, 27, "hdmicec"), - CLK(RCC_APB1LENR, 23, "i2c3"), - CLK(RCC_APB1LENR, 22, "i2c2"), - CLK(RCC_APB1LENR, 21, "i2c1"), - CLK(RCC_APB1LENR, 20, "uart5"), - CLK(RCC_APB1LENR, 19, "uart4"), - CLK(RCC_APB1LENR, 18, "usart3"), - CLK(RCC_APB1LENR, 17, "usart2"), - CLK(RCC_APB1LENR, 16, "spdifrx"), - CLK(RCC_APB1LENR, 15, "spi3"), - CLK(RCC_APB1LENR, 14, "spi2"), - CLK(RCC_APB1LENR, 9, "lptim1"), - CLK(RCC_APB1HENR, 8, "fdcan"), - CLK(RCC_APB1HENR, 2, "swp"), - CLK(RCC_APB2ENR, 29, "hrtim"), - CLK(RCC_APB2ENR, 28, "dfsdm1"), - CLK(RCC_APB2ENR, 24, "sai3"), - CLK(RCC_APB2ENR, 23, "sai2"), - CLK(RCC_APB2ENR, 22, "sai1"), - CLK(RCC_APB2ENR, 20, "spi5"), - CLK(RCC_APB2ENR, 13, "spi4"), - CLK(RCC_APB2ENR, 12, "spi1"), - CLK(RCC_APB2ENR, 5, "usart6"), - CLK(RCC_APB2ENR, 4, "usart1"), - CLK(RCC_APB4ENR, 21, "sai4a"), - CLK(RCC_APB4ENR, 21, "sai4b"), - CLK(RCC_APB4ENR, 12, "lptim5"), - CLK(RCC_APB4ENR, 11, "lptim4"), - CLK(RCC_APB4ENR, 10, "lptim3"), - CLK(RCC_APB4ENR, 9, "lptim2"), - CLK(RCC_APB4ENR, 7, "i2c4"), - CLK(RCC_APB4ENR, 5, "spi6"), - CLK(RCC_APB4ENR, 3, "lpuart1"), + {RCC_AHB3ENR, 31, "d1sram1"}, /* peripheral clocks */ + {RCC_AHB3ENR, 30, "itcm"}, + {RCC_AHB3ENR, 29, "dtcm2"}, + {RCC_AHB3ENR, 28, "dtcm1"}, + {RCC_AHB3ENR, 8, "flitf"}, + {RCC_AHB3ENR, 5, "jpgdec"}, + {RCC_AHB3ENR, 4, "dma2d"}, + {RCC_AHB3ENR, 0, "mdma"}, + {RCC_AHB1ENR, 28, "usb2ulpi"}, + {RCC_AHB1ENR, 17, "eth1rx"}, + {RCC_AHB1ENR, 16, "eth1tx"}, + {RCC_AHB1ENR, 15, "eth1mac"}, + {RCC_AHB1ENR, 14, "art"}, + {RCC_AHB1ENR, 26, "usb1ulpi"}, + {RCC_AHB1ENR, 1, "dma2"}, + {RCC_AHB1ENR, 0, "dma1"}, + {RCC_AHB2ENR, 31, "d2sram3"}, + {RCC_AHB2ENR, 30, "d2sram2"}, + {RCC_AHB2ENR, 29, "d2sram1"}, + {RCC_AHB2ENR, 5, "hash"}, + {RCC_AHB2ENR, 4, "crypt"}, + {RCC_AHB2ENR, 0, "camitf"}, + {RCC_AHB4ENR, 28, "bkpram"}, + {RCC_AHB4ENR, 25, "hsem"}, + {RCC_AHB4ENR, 21, "bdma"}, + {RCC_AHB4ENR, 19, "crc"}, + {RCC_AHB4ENR, 10, "gpiok"}, + {RCC_AHB4ENR, 9, "gpioj"}, + {RCC_AHB4ENR, 8, "gpioi"}, + {RCC_AHB4ENR, 7, "gpioh"}, + {RCC_AHB4ENR, 6, "gpiog"}, + {RCC_AHB4ENR, 5, "gpiof"}, + {RCC_AHB4ENR, 4, "gpioe"}, + {RCC_AHB4ENR, 3, "gpiod"}, + {RCC_AHB4ENR, 2, "gpioc"}, + {RCC_AHB4ENR, 1, "gpiob"}, + {RCC_AHB4ENR, 0, "gpioa"}, + {RCC_APB3ENR, 6, "wwdg1"}, + {RCC_APB1LENR, 29, "dac12"}, + {RCC_APB1LENR, 11, "wwdg2"}, + {RCC_APB1LENR, 8, "tim14"}, + {RCC_APB1LENR, 7, "tim13"}, + {RCC_APB1LENR, 6, "tim12"}, + {RCC_APB1LENR, 5, "tim7"}, + {RCC_APB1LENR, 4, "tim6"}, + {RCC_APB1LENR, 3, "tim5"}, + {RCC_APB1LENR, 2, "tim4"}, + {RCC_APB1LENR, 1, "tim3"}, + {RCC_APB1LENR, 0, "tim2"}, + {RCC_APB1HENR, 5, "mdios"}, + {RCC_APB1HENR, 4, "opamp"}, + {RCC_APB1HENR, 1, "crs"}, + {RCC_APB2ENR, 18, "tim17"}, + {RCC_APB2ENR, 17, "tim16"}, + {RCC_APB2ENR, 16, "tim15"}, + {RCC_APB2ENR, 1, "tim8"}, + {RCC_APB2ENR, 0, "tim1"}, + {RCC_APB4ENR, 26, "tmpsens"}, + {RCC_APB4ENR, 16, "rtcapb"}, + {RCC_APB4ENR, 15, "vref"}, + {RCC_APB4ENR, 14, "comp12"}, + {RCC_APB4ENR, 1, "syscfg"}, + {RCC_AHB3ENR, 16, "sdmmc1"}, /* kernel clocks */ + {RCC_AHB3ENR, 14, "quadspi"}, + {RCC_AHB3ENR, 12, "fmc"}, + {RCC_AHB1ENR, 27, "usb2otg"}, + {RCC_AHB1ENR, 25, "usb1otg"}, + {RCC_AHB1ENR, 5, "adc12"}, + {RCC_AHB2ENR, 9, "sdmmc2"}, + {RCC_AHB2ENR, 6, "rng"}, + {RCC_AHB4ENR, 24, "adc3"}, + {RCC_APB3ENR, 4, "dsi"}, + {RCC_APB3ENR, 3, "ltdc"}, + {RCC_APB1LENR, 31, "usart8"}, + {RCC_APB1LENR, 30, "usart7"}, + {RCC_APB1LENR, 27, "hdmicec"}, + {RCC_APB1LENR, 23, "i2c3"}, + {RCC_APB1LENR, 22, "i2c2"}, + {RCC_APB1LENR, 21, "i2c1"}, + {RCC_APB1LENR, 20, "uart5"}, + {RCC_APB1LENR, 19, "uart4"}, + {RCC_APB1LENR, 18, "usart3"}, + {RCC_APB1LENR, 17, "usart2"}, + {RCC_APB1LENR, 16, "spdifrx"}, + {RCC_APB1LENR, 15, "spi3"}, + {RCC_APB1LENR, 14, "spi2"}, + {RCC_APB1LENR, 9, "lptim1"}, + {RCC_APB1HENR, 8, "fdcan"}, + {RCC_APB1HENR, 2, "swp"}, + {RCC_APB2ENR, 29, "hrtim"}, + {RCC_APB2ENR, 28, "dfsdm1"}, + {RCC_APB2ENR, 24, "sai3"}, + {RCC_APB2ENR, 23, "sai2"}, + {RCC_APB2ENR, 22, "sai1"}, + {RCC_APB2ENR, 20, "spi5"}, + {RCC_APB2ENR, 13, "spi4"}, + {RCC_APB2ENR, 12, "spi1"}, + {RCC_APB2ENR, 5, "usart6"}, + {RCC_APB2ENR, 4, "usart1"}, + {RCC_APB4ENR, 21, "sai4a"}, + {RCC_APB4ENR, 21, "sai4b"}, + {RCC_APB4ENR, 12, "lptim5"}, + {RCC_APB4ENR, 11, "lptim4"}, + {RCC_APB4ENR, 10, "lptim3"}, + {RCC_APB4ENR, 9, "lptim2"}, + {RCC_APB4ENR, 7, "i2c4"}, + {RCC_APB4ENR, 5, "spi6"}, + {RCC_APB4ENR, 3, "lpuart1"}, }; struct stm32_clk { @@ -368,11 +361,11 @@ int configure_clocks(struct udevice *dev) writel(0x0, ®s->d2ccip1r); writel(0x0, ®s->d2ccip2r); - /* Set voltage scaling at scale 1 */ + /* Set voltage scaling at scale 1 (1,15 - 1,26 Volts) */ clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK, VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT); - /* disable step down converter */ - clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SDEN); + /* Lock supply configuration update */ + clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN); while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY)) ; @@ -472,13 +465,13 @@ static ulong stm32_get_rate(struct stm32_rcc_regs *regs, enum pllsrc pllsrc) clk.id = 0; ret = uclass_get_device_by_name(UCLASS_CLK, name, &fixed_clock_dev); if (ret) { - error("Can't find clk %s (%d)", name, ret); + pr_err("Can't find clk %s (%d)", name, ret); return 0; } ret = clk_request(fixed_clock_dev, &clk); if (ret) { - error("Can't request %s clk (%d)", name, ret); + pr_err("Can't request %s clk (%d)", name, ret); return 0; } @@ -518,7 +511,7 @@ static u32 stm32_get_PLL1_rate(struct stm32_rcc_regs *regs, break; case RCC_PLLCKSELR_PLLSRC_NO_CLK: /* shouldn't happen */ - error("wrong value for RCC_PLLCKSELR register\n"); + pr_err("wrong value for RCC_PLLCKSELR register\n"); pllsrc = 0; break; } @@ -695,7 +688,7 @@ static ulong stm32_clk_get_rate(struct clk *clk) break; default: - error("unexpected gate_offset value (0x%x)\n", gate_offset); + pr_err("unexpected gate_offset value (0x%x)\n", gate_offset); return -EINVAL; break; } @@ -739,13 +732,13 @@ static int stm32_clk_probe(struct udevice *dev) "st,syscfg", &syscon); if (err) { - error("unable to find syscon device\n"); + pr_err("unable to find syscon device\n"); return err; } priv->pwr_regmap = syscon_get_regmap(syscon); if (!priv->pwr_regmap) { - error("unable to find regmap\n"); + pr_err("unable to find regmap\n"); return -ENODEV; } diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index 4e74856940..c821bddc25 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -27,6 +27,11 @@ #define CPG_PLL2CR 0x002c #define CPG_PLL4CR 0x01f4 +#define CPG_RPC_PREDIV_MASK 0x3 +#define CPG_RPC_PREDIV_OFFSET 3 +#define CPG_RPC_POSTDIV_MASK 0x7 +#define CPG_RPC_POSTDIV_OFFSET 0 + /* * Module Standby and Software Reset register offets. * @@ -119,6 +124,8 @@ enum clk_types { DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult) #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) +#define DEF_GEN3_RPC(_name, _id, _parent, _offset) \ + DEF_BASE(_name, _id, CLK_TYPE_GEN3_RPC, _parent, .offset = _offset) /* * Definitions of Module Clocks @@ -145,6 +152,7 @@ enum rcar_gen3_clk_types { CLK_TYPE_GEN3_PLL3, CLK_TYPE_GEN3_PLL4, CLK_TYPE_GEN3_SD, + CLK_TYPE_GEN3_RPC, CLK_TYPE_GEN3_R, }; @@ -176,6 +184,7 @@ enum clk_ids { CLK_S2, CLK_S3, CLK_SDSRC, + CLK_RPCSRC, CLK_SSPSRC, CLK_RINT, @@ -203,6 +212,7 @@ static const struct cpg_core_clk r8a7795_core_clks[] = { DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1), DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1), DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1), + DEF_FIXED(".rpcsrc", CLK_RPCSRC, CLK_PLL1, 2, 1), /* Core Clock Outputs */ DEF_FIXED("ztr", R8A7795_CLK_ZTR, CLK_PLL1_DIV2, 6, 1), @@ -231,6 +241,8 @@ static const struct cpg_core_clk r8a7795_core_clks[] = { DEF_GEN3_SD("sd2", R8A7795_CLK_SD2, CLK_SDSRC, 0x268), DEF_GEN3_SD("sd3", R8A7795_CLK_SD3, CLK_SDSRC, 0x26c), + DEF_GEN3_RPC("rpc", R8A7795_CLK_RPC, CLK_RPCSRC, 0x238), + DEF_FIXED("cl", R8A7795_CLK_CL, CLK_PLL1_DIV2, 48, 1), DEF_FIXED("cp", R8A7795_CLK_CP, CLK_EXTAL, 2, 1), @@ -358,6 +370,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] = { DEF_MOD("can-fd", 914, R8A7795_CLK_S3D2), DEF_MOD("can-if1", 915, R8A7795_CLK_S3D4), DEF_MOD("can-if0", 916, R8A7795_CLK_S3D4), + DEF_MOD("rpc", 917, R8A7795_CLK_RPC), DEF_MOD("i2c6", 918, R8A7795_CLK_S0D6), DEF_MOD("i2c5", 919, R8A7795_CLK_S0D6), DEF_MOD("i2c-dvfs", 926, R8A7795_CLK_CP), @@ -414,6 +427,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] = { DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1), DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1), DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1), + DEF_FIXED(".rpcsrc", CLK_RPCSRC, CLK_PLL1, 2, 1), /* Core Clock Outputs */ DEF_FIXED("ztr", R8A7796_CLK_ZTR, CLK_PLL1_DIV2, 6, 1), @@ -442,6 +456,8 @@ static const struct cpg_core_clk r8a7796_core_clks[] = { DEF_GEN3_SD("sd2", R8A7796_CLK_SD2, CLK_SDSRC, 0x268), DEF_GEN3_SD("sd3", R8A7796_CLK_SD3, CLK_SDSRC, 0x26c), + DEF_GEN3_RPC("rpc", R8A7796_CLK_RPC, CLK_RPCSRC, 0x238), + DEF_FIXED("cl", R8A7796_CLK_CL, CLK_PLL1_DIV2, 48, 1), DEF_FIXED("cp", R8A7796_CLK_CP, CLK_EXTAL, 2, 1), @@ -541,6 +557,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] = { DEF_MOD("can-fd", 914, R8A7796_CLK_S3D2), DEF_MOD("can-if1", 915, R8A7796_CLK_S3D4), DEF_MOD("can-if0", 916, R8A7796_CLK_S3D4), + DEF_MOD("rpc", 917, R8A7795_CLK_RPC), DEF_MOD("i2c6", 918, R8A7796_CLK_S0D6), DEF_MOD("i2c5", 919, R8A7796_CLK_S0D6), DEF_MOD("i2c-dvfs", 926, R8A7796_CLK_CP), @@ -752,6 +769,36 @@ static int gen3_clk_get_parent(struct clk *clk, struct clk *parent) return 0; } +static int gen3_clk_setup_sdif_div(struct clk *clk) +{ + struct gen3_clk_priv *priv = dev_get_priv(clk->dev); + const struct cpg_core_clk *core; + struct clk parent; + int ret; + + ret = gen3_clk_get_parent(clk, &parent); + if (ret) { + printf("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret); + return ret; + } + + if (gen3_clk_is_mod(&parent)) + return 0; + + ret = gen3_clk_get_core(&parent, &core); + if (ret) + return ret; + + if (core->type != CLK_TYPE_GEN3_SD) + return 0; + + debug("%s[%i] SDIF offset=%x\n", __func__, __LINE__, core->offset); + + writel(1, priv->base + core->offset); + + return 0; +} + static int gen3_clk_endisable(struct clk *clk, bool enable) { struct gen3_clk_priv *priv = dev_get_priv(clk->dev); @@ -759,6 +806,7 @@ static int gen3_clk_endisable(struct clk *clk, bool enable) const unsigned int reg = clkid / 100; const unsigned int bit = clkid % 100; const u32 bitmask = BIT(bit); + int ret; if (!gen3_clk_is_mod(clk)) return -EINVAL; @@ -767,6 +815,9 @@ static int gen3_clk_endisable(struct clk *clk, bool enable) clkid, reg, bit, enable ? "ON" : "OFF"); if (enable) { + ret = gen3_clk_setup_sdif_div(clk); + if (ret) + return ret; clrbits_le32(priv->base + SMSTPCR(reg), bitmask); return wait_for_bit("MSTP", priv->base + MSTPSR(reg), bitmask, 0, 100, 0); @@ -793,7 +844,7 @@ static ulong gen3_clk_get_rate(struct clk *clk) const struct cpg_core_clk *core; const struct rcar_gen3_cpg_pll_config *pll_config = priv->cpg_pll_config; - u32 value, mult, rate = 0; + u32 value, mult, prediv, postdiv, rate = 0; int i, ret; debug("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id); @@ -903,6 +954,31 @@ static ulong gen3_clk_get_rate(struct clk *clk) } return -EINVAL; + + case CLK_TYPE_GEN3_RPC: + rate = gen3_clk_get_rate(&parent); + + value = readl(priv->base + core->offset); + + prediv = (value >> CPG_RPC_PREDIV_OFFSET) & + CPG_RPC_PREDIV_MASK; + if (prediv == 2) + rate /= 5; + else if (prediv == 3) + rate /= 6; + else + return -EINVAL; + + postdiv = (value >> CPG_RPC_POSTDIV_OFFSET) & + CPG_RPC_POSTDIV_MASK; + rate /= postdiv + 1; + + debug("%s[%i] RPC clk: parent=%i prediv=%i postdiv=%i => rate=%u\n", + __func__, __LINE__, + core->parent, prediv, postdiv, rate); + + return -EINVAL; + } printf("%s[%i] unknown fail\n", __func__, __LINE__); diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c index d7f6a3c313..e87267d239 100644 --- a/drivers/clk/rockchip/clk_rk322x.c +++ b/drivers/clk/rockchip/clk_rk322x.c @@ -117,16 +117,16 @@ static void rkclk_init(struct rk322x_cru *cru) pclk_div << CORE_PERI_DIV_SHIFT); /* - * select apll as pd_bus bus clock source and + * select gpll as pd_bus bus clock source and * set up dependent divisors for PCLK/HCLK and ACLK clocks. */ aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1; assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f); - pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1; + pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1; assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7); - hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1; + hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1; assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3); rk_clrsetreg(&cru->cru_clksel_con[0], @@ -389,7 +389,7 @@ static int rk322x_clk_bind(struct udevice *dev) /* The reset driver does not have a device node, so bind it here */ ret = device_bind_driver(gd->dm_root, "rk322x_sysreset", "reset", &dev); if (ret) - debug("Warning: No RK3036 reset driver: ret=%d\n", ret); + debug("Warning: No RK322x reset driver: ret=%d\n", ret); return 0; } diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 478195b10b..a133810bf6 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <bitfield.h> #include <clk-uclass.h> #include <dm.h> #include <dt-structs.h> @@ -111,6 +112,15 @@ enum { PERI_ACLK_DIV_SHIFT = 0, PERI_ACLK_DIV_MASK = 0x1f << PERI_ACLK_DIV_SHIFT, + /* + * CLKSEL24 + * saradc_div_con: + * clk_saradc=24MHz/(saradc_div_con+1) + */ + CLK_SARADC_DIV_CON_SHIFT = 8, + CLK_SARADC_DIV_CON_MASK = GENMASK(15, 8), + CLK_SARADC_DIV_CON_WIDTH = 8, + SOCSTS_DPLL_LOCK = 1 << 5, SOCSTS_APLL_LOCK = 1 << 6, SOCSTS_CPLL_LOCK = 1 << 7, @@ -634,6 +644,31 @@ static ulong rockchip_spi_set_clk(struct rk3288_cru *cru, uint gclk_rate, return rockchip_spi_get_clk(cru, gclk_rate, periph); } +static ulong rockchip_saradc_get_clk(struct rk3288_cru *cru) +{ + u32 div, val; + + val = readl(&cru->cru_clksel_con[24]); + div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT, + CLK_SARADC_DIV_CON_WIDTH); + + return DIV_TO_RATE(OSC_HZ, div); +} + +static ulong rockchip_saradc_set_clk(struct rk3288_cru *cru, uint hz) +{ + int src_clk_div; + + src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; + assert(src_clk_div < 128); + + rk_clrsetreg(&cru->cru_clksel_con[24], + CLK_SARADC_DIV_CON_MASK, + src_clk_div << CLK_SARADC_DIV_CON_SHIFT); + + return rockchip_saradc_get_clk(cru); +} + static ulong rk3288_clk_get_rate(struct clk *clk) { struct rk3288_clk_priv *priv = dev_get_priv(clk->dev); @@ -666,6 +701,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk) return gclk_rate; case PCLK_PWM: return PD_BUS_PCLK_HZ; + case SCLK_SARADC: + new_rate = rockchip_saradc_get_clk(priv->cru); + break; default: return -ENOENT; } @@ -756,6 +794,9 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate) new_rate = rate; break; #endif + case SCLK_SARADC: + new_rate = rockchip_saradc_set_clk(priv->cru, rate); + break; default: return -ENOENT; } diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c index c3a6650de0..540d9104c3 100644 --- a/drivers/clk/rockchip/clk_rk3328.c +++ b/drivers/clk/rockchip/clk_rk3328.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <bitfield.h> #include <clk-uclass.h> #include <dm.h> #include <errno.h> @@ -114,7 +115,8 @@ enum { /* CLKSEL_CON23 */ CLK_SARADC_DIV_CON_SHIFT = 0, - CLK_SARADC_DIV_CON_MASK = 0x3ff << CLK_SARADC_DIV_CON_SHIFT, + CLK_SARADC_DIV_CON_MASK = GENMASK(9, 0), + CLK_SARADC_DIV_CON_WIDTH = 10, /* CLKSEL_CON24 */ CLK_PWM_PLL_SEL_CPLL = 0, @@ -478,6 +480,31 @@ static ulong rk3328_pwm_set_clk(struct rk3328_cru *cru, uint hz) return DIV_TO_RATE(GPLL_HZ, div); } +static ulong rk3328_saradc_get_clk(struct rk3328_cru *cru) +{ + u32 div, val; + + val = readl(&cru->clksel_con[23]); + div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT, + CLK_SARADC_DIV_CON_WIDTH); + + return DIV_TO_RATE(OSC_HZ, div); +} + +static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz) +{ + int src_clk_div; + + src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; + assert(src_clk_div < 128); + + rk_clrsetreg(&cru->clksel_con[23], + CLK_SARADC_DIV_CON_MASK, + src_clk_div << CLK_SARADC_DIV_CON_SHIFT); + + return rk3328_saradc_get_clk(cru); +} + static ulong rk3328_clk_get_rate(struct clk *clk) { struct rk3328_clk_priv *priv = dev_get_priv(clk->dev); @@ -501,6 +528,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk) case SCLK_PWM: rate = rk3328_pwm_get_clk(priv->cru); break; + case SCLK_SARADC: + rate = rk3328_saradc_get_clk(priv->cru); + break; default: return -ENOENT; } @@ -531,6 +561,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate) case SCLK_PWM: ret = rk3328_pwm_set_clk(priv->cru, rate); break; + case SCLK_SARADC: + ret = rk3328_saradc_set_clk(priv->cru, rate); + break; default: return -ENOENT; } diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index e2747816b9..3661769748 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -12,6 +12,7 @@ #include <errno.h> #include <mapmem.h> #include <syscon.h> +#include <bitfield.h> #include <asm/arch/clock.h> #include <asm/arch/cru_rk3368.h> #include <asm/arch/hardware.h> @@ -301,7 +302,7 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate) dpll_cfg = &dpll_1600; break; default: - error("Unsupported SDRAM frequency!,%ld\n", set_rate); + pr_err("Unsupported SDRAM frequency!,%ld\n", set_rate); } rkclk_set_pll(cru, DPLL, dpll_cfg); @@ -359,7 +360,7 @@ static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id) break; default: - error("%s: SPI clk-id %ld not supported\n", __func__, clk_id); + pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id); return -EINVAL; } @@ -384,7 +385,7 @@ static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz) break; default: - error("%s: SPI clk-id %ld not supported\n", __func__, clk_id); + pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id); return -EINVAL; } @@ -397,6 +398,31 @@ static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz) return rk3368_spi_get_clk(cru, clk_id); } +static ulong rk3368_saradc_get_clk(struct rk3368_cru *cru) +{ + u32 div, val; + + val = readl(&cru->clksel_con[25]); + div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT, + CLK_SARADC_DIV_CON_WIDTH); + + return DIV_TO_RATE(OSC_HZ, div); +} + +static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz) +{ + int src_clk_div; + + src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; + assert(src_clk_div < 128); + + rk_clrsetreg(&cru->clksel_con[25], + CLK_SARADC_DIV_CON_MASK, + src_clk_div << CLK_SARADC_DIV_CON_SHIFT); + + return rk3368_saradc_get_clk(cru); +} + static ulong rk3368_clk_get_rate(struct clk *clk) { struct rk3368_clk_priv *priv = dev_get_priv(clk->dev); @@ -419,6 +445,9 @@ static ulong rk3368_clk_get_rate(struct clk *clk) rate = rk3368_mmc_get_clk(priv->cru, clk->id); break; #endif + case SCLK_SARADC: + rate = rk3368_saradc_get_clk(priv->cru); + break; default: return -ENOENT; } @@ -453,6 +482,9 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate) ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate); break; #endif + case SCLK_SARADC: + ret = rk3368_saradc_set_clk(priv->cru, rate); + break; default: return -ENOENT; } @@ -498,7 +530,7 @@ static int rk3368_clk_bind(struct udevice *dev) /* The reset driver does not have a device node, so bind it here */ ret = device_bind_driver(gd->dm_root, "rk3368_sysreset", "reset", &dev); if (ret) - error("bind RK3368 reset driver failed: ret=%d\n", ret); + pr_err("bind RK3368 reset driver failed: ret=%d\n", ret); return ret; } diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 9d963be552..f45bba44f1 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -12,6 +12,7 @@ #include <errno.h> #include <mapmem.h> #include <syscon.h> +#include <bitfield.h> #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/cru_rk3399.h> @@ -181,7 +182,8 @@ enum { /* CLKSEL_CON26 */ CLK_SARADC_DIV_CON_SHIFT = 8, - CLK_SARADC_DIV_CON_MASK = 0xff << CLK_SARADC_DIV_CON_SHIFT, + CLK_SARADC_DIV_CON_MASK = GENMASK(15, 8), + CLK_SARADC_DIV_CON_WIDTH = 8, /* CLKSEL_CON27 */ CLK_TSADC_SEL_X24M = 0x0, @@ -661,7 +663,7 @@ static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id) break; default: - error("%s: SPI clk-id %ld not supported\n", __func__, clk_id); + pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id); return -EINVAL; } @@ -685,7 +687,7 @@ static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) break; default: - error("%s: SPI clk-id %ld not supported\n", __func__, clk_id); + pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id); return -EINVAL; } @@ -854,12 +856,38 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru, {.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1}; break; default: - error("Unsupported SDRAM frequency!,%ld\n", set_rate); + pr_err("Unsupported SDRAM frequency!,%ld\n", set_rate); } rkclk_set_pll(&cru->dpll_con[0], &dpll_cfg); return set_rate; } + +static ulong rk3399_saradc_get_clk(struct rk3399_cru *cru) +{ + u32 div, val; + + val = readl(&cru->clksel_con[26]); + div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT, + CLK_SARADC_DIV_CON_WIDTH); + + return DIV_TO_RATE(OSC_HZ, div); +} + +static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz) +{ + int src_clk_div; + + src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; + assert(src_clk_div < 128); + + rk_clrsetreg(&cru->clksel_con[26], + CLK_SARADC_DIV_CON_MASK, + src_clk_div << CLK_SARADC_DIV_CON_SHIFT); + + return rk3399_saradc_get_clk(cru); +} + static ulong rk3399_clk_get_rate(struct clk *clk) { struct rk3399_clk_priv *priv = dev_get_priv(clk->dev); @@ -895,6 +923,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk) break; case PCLK_EFUSE1024NS: break; + case SCLK_SARADC: + rate = rk3399_saradc_get_clk(priv->cru); + break; default: return -ENOENT; } @@ -943,6 +974,9 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) break; case PCLK_EFUSE1024NS: break; + case SCLK_SARADC: + ret = rk3399_saradc_set_clk(priv->cru, rate); + break; default: return -ENOENT; } diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c index cf966bbdc3..55741c3a1e 100644 --- a/drivers/clk/rockchip/clk_rv1108.c +++ b/drivers/clk/rockchip/clk_rv1108.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <bitfield.h> #include <clk-uclass.h> #include <dm.h> #include <errno.h> @@ -36,7 +37,7 @@ enum { #hz "Hz cannot be hit with PLL "\ "divisors on line " __stringify(__LINE__)); -/* use interge mode*/ +/* use integer mode */ static inline int rv1108_pll_id(enum rk_clk_id clk_id) { int id = 0; @@ -130,6 +131,31 @@ static int rv1108_sfc_set_clk(struct rv1108_cru *cru, uint rate) return DIV_TO_RATE(pll_rate, div); } +static ulong rv1108_saradc_get_clk(struct rv1108_cru *cru) +{ + u32 div, val; + + val = readl(&cru->clksel_con[22]); + div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT, + CLK_SARADC_DIV_CON_WIDTH); + + return DIV_TO_RATE(OSC_HZ, div); +} + +static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz) +{ + int src_clk_div; + + src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; + assert(src_clk_div < 128); + + rk_clrsetreg(&cru->clksel_con[22], + CLK_SARADC_DIV_CON_MASK, + src_clk_div << CLK_SARADC_DIV_CON_SHIFT); + + return rv1108_saradc_get_clk(cru); +} + static ulong rv1108_clk_get_rate(struct clk *clk) { struct rv1108_clk_priv *priv = dev_get_priv(clk->dev); @@ -137,6 +163,8 @@ static ulong rv1108_clk_get_rate(struct clk *clk) switch (clk->id) { case 0 ... 63: return rkclk_pll_get_rate(priv->cru, clk->id); + case SCLK_SARADC: + return rv1108_saradc_get_clk(priv->cru); default: return -ENOENT; } @@ -154,6 +182,9 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate) case SCLK_SFC: new_rate = rv1108_sfc_set_clk(priv->cru, rate); break; + case SCLK_SARADC: + new_rate = rv1108_saradc_set_clk(priv->cru, rate); + break; default: return -ENOENT; } @@ -196,7 +227,7 @@ static int rv1108_clk_bind(struct udevice *dev) /* The reset driver does not have a device node, so bind it here */ ret = device_bind_driver(gd->dm_root, "rv1108_sysreset", "reset", &dev); if (ret) - error("No Rv1108 reset driver: ret=%d\n", ret); + pr_err("No Rv1108 reset driver: ret=%d\n", ret); return 0; } diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c index 722cd6b060..9a7d03aa59 100644 --- a/drivers/clk/uniphier/clk-uniphier-core.c +++ b/drivers/clk/uniphier/clk-uniphier-core.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2016 Socionext Inc. + * Copyright (C) 2016-2017 Socionext Inc. * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ @@ -21,104 +21,224 @@ * @data: SoC specific data */ struct uniphier_clk_priv { + struct udevice *dev; void __iomem *base; const struct uniphier_clk_data *data; }; -static int uniphier_clk_enable(struct clk *clk) +static void uniphier_clk_gate_enable(struct uniphier_clk_priv *priv, + const struct uniphier_clk_gate_data *gate) { - struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); - unsigned long id = clk->id; - const struct uniphier_clk_gate_data *p; + u32 val; - for (p = priv->data->gate; p->id != UNIPHIER_CLK_ID_END; p++) { - u32 val; + val = readl(priv->base + gate->reg); + val |= BIT(gate->bit); + writel(val, priv->base + gate->reg); +} - if (p->id != id) - continue; +static void uniphier_clk_mux_set_parent(struct uniphier_clk_priv *priv, + const struct uniphier_clk_mux_data *mux, + u8 id) +{ + u32 val; + int i; - val = readl(priv->base + p->reg); - val |= BIT(p->bit); - writel(val, priv->base + p->reg); + for (i = 0; i < mux->num_parents; i++) { + if (mux->parent_ids[i] != id) + continue; - return 0; + val = readl(priv->base + mux->reg); + val &= ~mux->masks[i]; + val |= mux->vals[i]; + writel(val, priv->base + mux->reg); + return; } - dev_err(priv->dev, "clk_id=%lu was not handled\n", id); - return -EINVAL; + WARN_ON(1); } -static const struct uniphier_clk_mux_data * -uniphier_clk_get_mux_data(struct uniphier_clk_priv *priv, unsigned long id) +static u8 uniphier_clk_mux_get_parent(struct uniphier_clk_priv *priv, + const struct uniphier_clk_mux_data *mux) { - const struct uniphier_clk_mux_data *p; + u32 val; + int i; - for (p = priv->data->mux; p->id != UNIPHIER_CLK_ID_END; p++) { - if (p->id == id) - return p; - } + val = readl(priv->base + mux->reg); + + for (i = 0; i < mux->num_parents; i++) + if ((mux->masks[i] & val) == mux->vals[i]) + return mux->parent_ids[i]; + + dev_err(priv->dev, "invalid mux setting\n"); + + return UNIPHIER_CLK_ID_INVALID; +} + +static const struct uniphier_clk_data *uniphier_clk_get_data( + struct uniphier_clk_priv *priv, u8 id) +{ + const struct uniphier_clk_data *data; + + for (data = priv->data; data->type != UNIPHIER_CLK_TYPE_END; data++) + if (data->id == id) + return data; + + dev_err(priv->dev, "id=%u not found\n", id); return NULL; } -static ulong uniphier_clk_get_rate(struct clk *clk) +static const struct uniphier_clk_data *uniphier_clk_get_parent_data( + struct uniphier_clk_priv *priv, + const struct uniphier_clk_data *data) { - struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); - const struct uniphier_clk_mux_data *mux; - u32 val; - int i; + const struct uniphier_clk_data *parent_data; + u8 parent_id = UNIPHIER_CLK_ID_INVALID; + + switch (data->type) { + case UNIPHIER_CLK_TYPE_GATE: + parent_id = data->data.gate.parent_id; + break; + case UNIPHIER_CLK_TYPE_MUX: + parent_id = uniphier_clk_mux_get_parent(priv, &data->data.mux); + break; + default: + break; + } - mux = uniphier_clk_get_mux_data(priv, clk->id); - if (!mux) - return 0; + if (parent_id == UNIPHIER_CLK_ID_INVALID) + return NULL; - if (!mux->nr_muxs) /* fixed-rate */ - return mux->rates[0]; + parent_data = uniphier_clk_get_data(priv, parent_id); - val = readl(priv->base + mux->reg); + WARN_ON(!parent_data); - for (i = 0; i < mux->nr_muxs; i++) - if ((mux->masks[i] & val) == mux->vals[i]) - return mux->rates[i]; + return parent_data; +} + +static void __uniphier_clk_enable(struct uniphier_clk_priv *priv, + const struct uniphier_clk_data *data) +{ + const struct uniphier_clk_data *parent_data; + + if (data->type == UNIPHIER_CLK_TYPE_GATE) + uniphier_clk_gate_enable(priv, &data->data.gate); - return -EINVAL; + parent_data = uniphier_clk_get_parent_data(priv, data); + if (!parent_data) + return; + + return __uniphier_clk_enable(priv, parent_data); } -static ulong uniphier_clk_set_rate(struct clk *clk, ulong rate) +static int uniphier_clk_enable(struct clk *clk) { struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); - const struct uniphier_clk_mux_data *mux; - u32 val; - int i, best_rate_id = -1; - ulong best_rate = 0; + const struct uniphier_clk_data *data; + + data = uniphier_clk_get_data(priv, clk->id); + if (!data) + return -ENODEV; - mux = uniphier_clk_get_mux_data(priv, clk->id); - if (!mux) + __uniphier_clk_enable(priv, data); + + return 0; +} + +static unsigned long __uniphier_clk_get_rate( + struct uniphier_clk_priv *priv, + const struct uniphier_clk_data *data) +{ + const struct uniphier_clk_data *parent_data; + + if (data->type == UNIPHIER_CLK_TYPE_FIXED_RATE) + return data->data.rate.fixed_rate; + + parent_data = uniphier_clk_get_parent_data(priv, data); + if (!parent_data) return 0; - if (!mux->nr_muxs) /* fixed-rate */ - return mux->rates[0]; + return __uniphier_clk_get_rate(priv, parent_data); +} + +static unsigned long uniphier_clk_get_rate(struct clk *clk) +{ + struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); + const struct uniphier_clk_data *data; + + data = uniphier_clk_get_data(priv, clk->id); + if (!data) + return -ENODEV; + + return __uniphier_clk_get_rate(priv, data); +} + +static unsigned long __uniphier_clk_set_rate( + struct uniphier_clk_priv *priv, + const struct uniphier_clk_data *data, + unsigned long rate, bool set) +{ + const struct uniphier_clk_data *best_parent_data = NULL; + const struct uniphier_clk_data *parent_data; + unsigned long best_rate = 0; + unsigned long parent_rate; + u8 parent_id; + int i; + + if (data->type == UNIPHIER_CLK_TYPE_FIXED_RATE) + return data->data.rate.fixed_rate; + + if (data->type == UNIPHIER_CLK_TYPE_GATE) { + parent_data = uniphier_clk_get_parent_data(priv, data); + if (!parent_data) + return 0; - /* first, decide the best match rate */ - for (i = 0; i < mux->nr_muxs; i++) { - if (mux->rates[i] > best_rate && mux->rates[i] <= rate) { - best_rate = mux->rates[i]; - best_rate_id = i; + return __uniphier_clk_set_rate(priv, parent_data, rate, set); + } + + if (WARN_ON(data->type != UNIPHIER_CLK_TYPE_MUX)) + return -EINVAL; + + for (i = 0; i < data->data.mux.num_parents; i++) { + parent_id = data->data.mux.parent_ids[i]; + parent_data = uniphier_clk_get_data(priv, parent_id); + if (WARN_ON(!parent_data)) + return -EINVAL; + + parent_rate = __uniphier_clk_set_rate(priv, parent_data, rate, + false); + + if (parent_rate <= rate && best_rate < parent_rate) { + best_rate = parent_rate; + best_parent_data = parent_data; } } - if (best_rate_id < 0) + dev_dbg(priv->dev, "id=%u, best_rate=%lu\n", data->id, best_rate); + + if (!best_parent_data) return -EINVAL; - val = readl(priv->base + mux->reg); - val &= ~mux->masks[best_rate_id]; - val |= mux->vals[best_rate_id]; - writel(val, priv->base + mux->reg); + if (!set) + return best_rate; - debug("%s: requested rate = %lu, set rate = %lu\n", __func__, - rate, best_rate); + uniphier_clk_mux_set_parent(priv, &data->data.mux, + best_parent_data->id); - return best_rate; + return best_rate = __uniphier_clk_set_rate(priv, best_parent_data, + rate, true); +} + +static unsigned long uniphier_clk_set_rate(struct clk *clk, ulong rate) +{ + struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); + const struct uniphier_clk_data *data; + + data = uniphier_clk_get_data(priv, clk->id); + if (!data) + return -ENODEV; + + return __uniphier_clk_set_rate(priv, data, rate, true); } static const struct clk_ops uniphier_clk_ops = { @@ -140,6 +260,7 @@ static int uniphier_clk_probe(struct udevice *dev) if (!priv->base) return -ENOMEM; + priv->dev = dev; priv->data = (void *)dev_get_driver_data(dev); return 0; @@ -149,60 +270,68 @@ static const struct udevice_id uniphier_clk_match[] = { /* System clock */ { .compatible = "socionext,uniphier-ld4-clock", - .data = (ulong)&uniphier_pxs2_sys_clk_data, + .data = (ulong)uniphier_pxs2_sys_clk_data, }, { .compatible = "socionext,uniphier-pro4-clock", - .data = (ulong)&uniphier_pxs2_sys_clk_data, + .data = (ulong)uniphier_pxs2_sys_clk_data, }, { .compatible = "socionext,uniphier-sld8-clock", - .data = (ulong)&uniphier_pxs2_sys_clk_data, + .data = (ulong)uniphier_pxs2_sys_clk_data, }, { .compatible = "socionext,uniphier-pro5-clock", - .data = (ulong)&uniphier_pxs2_sys_clk_data, + .data = (ulong)uniphier_pxs2_sys_clk_data, }, { .compatible = "socionext,uniphier-pxs2-clock", - .data = (ulong)&uniphier_pxs2_sys_clk_data, + .data = (ulong)uniphier_pxs2_sys_clk_data, }, { .compatible = "socionext,uniphier-ld11-clock", - .data = (ulong)&uniphier_ld20_sys_clk_data, + .data = (ulong)uniphier_ld20_sys_clk_data, }, { .compatible = "socionext,uniphier-ld20-clock", - .data = (ulong)&uniphier_ld20_sys_clk_data, + .data = (ulong)uniphier_ld20_sys_clk_data, + }, + { + .compatible = "socionext,uniphier-pxs3-clock", + .data = (ulong)uniphier_pxs3_sys_clk_data, }, /* Media I/O clock */ { .compatible = "socionext,uniphier-ld4-mio-clock", - .data = (ulong)&uniphier_mio_clk_data, + .data = (ulong)uniphier_mio_clk_data, }, { .compatible = "socionext,uniphier-pro4-mio-clock", - .data = (ulong)&uniphier_mio_clk_data, + .data = (ulong)uniphier_mio_clk_data, }, { .compatible = "socionext,uniphier-sld8-mio-clock", - .data = (ulong)&uniphier_mio_clk_data, + .data = (ulong)uniphier_mio_clk_data, }, { .compatible = "socionext,uniphier-pro5-sd-clock", - .data = (ulong)&uniphier_mio_clk_data, + .data = (ulong)uniphier_mio_clk_data, }, { .compatible = "socionext,uniphier-pxs2-sd-clock", - .data = (ulong)&uniphier_mio_clk_data, + .data = (ulong)uniphier_mio_clk_data, }, { .compatible = "socionext,uniphier-ld11-mio-clock", - .data = (ulong)&uniphier_mio_clk_data, + .data = (ulong)uniphier_mio_clk_data, }, { .compatible = "socionext,uniphier-ld20-sd-clock", - .data = (ulong)&uniphier_mio_clk_data, + .data = (ulong)uniphier_mio_clk_data, + }, + { + .compatible = "socionext,uniphier-pxs3-sd-clock", + .data = (ulong)uniphier_mio_clk_data, }, { /* sentinel */ } }; diff --git a/drivers/clk/uniphier/clk-uniphier-mio.c b/drivers/clk/uniphier/clk-uniphier-mio.c index 9c13dcd555..5c73848402 100644 --- a/drivers/clk/uniphier/clk-uniphier-mio.c +++ b/drivers/clk/uniphier/clk-uniphier-mio.c @@ -7,59 +7,71 @@ #include "clk-uniphier.h" -#define UNIPHIER_MIO_CLK_SD_GATE(id, ch) \ - UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 8) +#define UNIPHIER_MIO_CLK_SD_FIXED \ + UNIPHIER_CLK_RATE(128, 44444444), \ + UNIPHIER_CLK_RATE(129, 33333333), \ + UNIPHIER_CLK_RATE(130, 50000000), \ + UNIPHIER_CLK_RATE(131, 66666667), \ + UNIPHIER_CLK_RATE(132, 100000000), \ + UNIPHIER_CLK_RATE(133, 40000000), \ + UNIPHIER_CLK_RATE(134, 25000000), \ + UNIPHIER_CLK_RATE(135, 22222222) + +#define UNIPHIER_MIO_CLK_SD(_id, ch) \ + { \ + .type = UNIPHIER_CLK_TYPE_MUX, \ + .id = (_id) + 32, \ + .data.mux = { \ + .parent_ids = { \ + 128, \ + 129, \ + 130, \ + 131, \ + 132, \ + 133, \ + 134, \ + 135, \ + }, \ + .num_parents = 8, \ + .reg = 0x30 + 0x200 * (ch), \ + .masks = { \ + 0x00031000, \ + 0x00031000, \ + 0x00031000, \ + 0x00031000, \ + 0x00001300, \ + 0x00001300, \ + 0x00001300, \ + 0x00001300, \ + }, \ + .vals = { \ + 0x00000000, \ + 0x00010000, \ + 0x00020000, \ + 0x00030000, \ + 0x00001000, \ + 0x00001100, \ + 0x00001200, \ + 0x00001300, \ + }, \ + }, \ + }, \ + UNIPHIER_CLK_GATE((_id), (_id) + 32, 0x20 + 0x200 * (ch), 8) #define UNIPHIER_MIO_CLK_USB2(id, ch) \ - UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 28) + UNIPHIER_CLK_GATE_SIMPLE((id), 0x20 + 0x200 * (ch), 28) #define UNIPHIER_MIO_CLK_USB2_PHY(id, ch) \ - UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 29) + UNIPHIER_CLK_GATE_SIMPLE((id), 0x20 + 0x200 * (ch), 29) #define UNIPHIER_MIO_CLK_DMAC(id) \ - UNIPHIER_CLK_GATE((id), 0x20, 25) - -#define UNIPHIER_MIO_CLK_SD_MUX(_id, ch) \ - { \ - .id = (_id), \ - .nr_muxs = 8, \ - .reg = 0x30 + 0x200 * (ch), \ - .masks = { \ - 0x00031000, \ - 0x00031000, \ - 0x00031000, \ - 0x00031000, \ - 0x00001300, \ - 0x00001300, \ - 0x00001300, \ - 0x00001300, \ - }, \ - .vals = { \ - 0x00000000, \ - 0x00010000, \ - 0x00020000, \ - 0x00030000, \ - 0x00001000, \ - 0x00001100, \ - 0x00001200, \ - 0x00001300, \ - }, \ - .rates = { \ - 44444444, \ - 33333333, \ - 50000000, \ - 66666666, \ - 100000000, \ - 40000000, \ - 25000000, \ - 22222222, \ - }, \ - } + UNIPHIER_CLK_GATE_SIMPLE((id), 0x20, 25) -static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { - UNIPHIER_MIO_CLK_SD_GATE(0, 0), - UNIPHIER_MIO_CLK_SD_GATE(1, 1), - UNIPHIER_MIO_CLK_SD_GATE(2, 2), /* for PH1-Pro4 only */ +const struct uniphier_clk_data uniphier_mio_clk_data[] = { + UNIPHIER_MIO_CLK_SD_FIXED, + UNIPHIER_MIO_CLK_SD(0, 0), + UNIPHIER_MIO_CLK_SD(1, 1), + UNIPHIER_MIO_CLK_SD(2, 2), UNIPHIER_MIO_CLK_DMAC(7), UNIPHIER_MIO_CLK_USB2(8, 0), UNIPHIER_MIO_CLK_USB2(9, 1), @@ -67,17 +79,5 @@ static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { UNIPHIER_MIO_CLK_USB2_PHY(12, 0), UNIPHIER_MIO_CLK_USB2_PHY(13, 1), UNIPHIER_MIO_CLK_USB2_PHY(14, 2), - UNIPHIER_CLK_END -}; - -static const struct uniphier_clk_mux_data uniphier_mio_clk_mux[] = { - UNIPHIER_MIO_CLK_SD_MUX(0, 0), - UNIPHIER_MIO_CLK_SD_MUX(1, 1), - UNIPHIER_MIO_CLK_SD_MUX(2, 2), /* for PH1-Pro4 only */ - UNIPHIER_CLK_END -}; - -const struct uniphier_clk_data uniphier_mio_clk_data = { - .gate = uniphier_mio_clk_gate, - .mux = uniphier_mio_clk_mux, + { /* sentinel */ } }; diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 709fa5081a..c852c78659 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -7,28 +7,52 @@ #include "clk-uniphier.h" -const struct uniphier_clk_gate_data uniphier_pxs2_sys_clk_gate[] = { - UNIPHIER_CLK_GATE(8, 0x2104, 10), /* stdmac */ - UNIPHIER_CLK_GATE(12, 0x2104, 6), /* gio (Pro4, Pro5) */ - UNIPHIER_CLK_GATE(14, 0x2104, 16), /* usb30 (Pro4, Pro5, PXs2) */ - UNIPHIER_CLK_GATE(15, 0x2104, 17), /* usb31 (Pro4, Pro5, PXs2) */ - UNIPHIER_CLK_GATE(16, 0x2104, 19), /* usb30-phy (PXs2) */ - UNIPHIER_CLK_GATE(20, 0x2104, 20), /* usb31-phy (PXs2) */ - UNIPHIER_CLK_END -}; +/* Denali driver requires clk_x rate (clk: 50MHz, clk_x & ecc_clk: 200MHz) */ +#define UNIPHIER_LD4_SYS_CLK_NAND(_id) \ + UNIPHIER_CLK_RATE(128, 200000000), \ + UNIPHIER_CLK_GATE((_id), 128, 0x2104, 2) + +#define UNIPHIER_LD11_SYS_CLK_NAND(_id) \ + UNIPHIER_CLK_RATE(128, 200000000), \ + UNIPHIER_CLK_GATE((_id), 128, 0x210c, 0) -const struct uniphier_clk_data uniphier_pxs2_sys_clk_data = { - .gate = uniphier_pxs2_sys_clk_gate, +const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { +#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_SLD8) ||\ + defined(CONFIG_ARCH_UNIPHIER_PRO4) || defined(CONFIG_ARCH_UNIPHIER_PRO5) ||\ + defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) + UNIPHIER_LD4_SYS_CLK_NAND(2), + UNIPHIER_CLK_GATE_SIMPLE(8, 0x2104, 10), /* stdmac */ + UNIPHIER_CLK_GATE_SIMPLE(12, 0x2104, 6), /* gio (Pro4, Pro5) */ + UNIPHIER_CLK_GATE_SIMPLE(14, 0x2104, 16), /* usb30 (Pro4, Pro5, PXs2) */ + UNIPHIER_CLK_GATE_SIMPLE(15, 0x2104, 17), /* usb31 (Pro4, Pro5, PXs2) */ + UNIPHIER_CLK_GATE_SIMPLE(16, 0x2104, 19), /* usb30-phy (PXs2) */ + UNIPHIER_CLK_GATE_SIMPLE(20, 0x2104, 20), /* usb31-phy (PXs2) */ + { /* sentinel */ } +#endif }; -const struct uniphier_clk_gate_data uniphier_ld20_sys_clk_gate[] = { - UNIPHIER_CLK_GATE(8, 0x210c, 8), /* stdmac */ - UNIPHIER_CLK_GATE(14, 0x210c, 14), /* usb30 (LD20) */ - UNIPHIER_CLK_GATE(16, 0x210c, 12), /* usb30-phy0 (LD20) */ - UNIPHIER_CLK_GATE(17, 0x210c, 13), /* usb30-phy1 (LD20) */ - UNIPHIER_CLK_END +const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { +#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) + UNIPHIER_LD11_SYS_CLK_NAND(2), + UNIPHIER_CLK_GATE_SIMPLE(8, 0x210c, 8), /* stdmac */ + UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 14), /* usb30 (LD20) */ + UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 12), /* usb30-phy0 (LD20) */ + UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 13), /* usb30-phy1 (LD20) */ + { /* sentinel */ } +#endif }; -const struct uniphier_clk_data uniphier_ld20_sys_clk_data = { - .gate = uniphier_ld20_sys_clk_gate, +const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { +#if defined(CONFIG_ARCH_UNIPHIER_PXS3) + UNIPHIER_LD11_SYS_CLK_NAND(2), + UNIPHIER_CLK_GATE_SIMPLE(12, 0x210c, 4), /* usb30 (gio0) */ + UNIPHIER_CLK_GATE_SIMPLE(13, 0x210c, 5), /* usb31-0 (gio1) */ + UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 6), /* usb31-1 (gio1-1) */ + UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 16), /* usb30-phy0 */ + UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 18), /* usb30-phy1 */ + UNIPHIER_CLK_GATE_SIMPLE(18, 0x210c, 20), /* usb30-phy2 */ + UNIPHIER_CLK_GATE_SIMPLE(20, 0x210c, 17), /* usb31-phy0 */ + UNIPHIER_CLK_GATE_SIMPLE(21, 0x210c, 19), /* usb31-phy1 */ + { /* sentinel */ } +#endif }; diff --git a/drivers/clk/uniphier/clk-uniphier.h b/drivers/clk/uniphier/clk-uniphier.h index 770a3225e1..77ebae1809 100644 --- a/drivers/clk/uniphier/clk-uniphier.h +++ b/drivers/clk/uniphier/clk-uniphier.h @@ -9,49 +9,71 @@ #define __CLK_UNIPHIER_H__ #include <linux/kernel.h> +#include <linux/types.h> -#define UNIPHIER_CLK_MAX_NR_MUXS 8 +#define UNIPHIER_CLK_MUX_MAX_PARENTS 8 + +#define UNIPHIER_CLK_TYPE_END 0 +#define UNIPHIER_CLK_TYPE_FIXED_RATE 2 +#define UNIPHIER_CLK_TYPE_GATE 3 +#define UNIPHIER_CLK_TYPE_MUX 4 + +#define UNIPHIER_CLK_ID_INVALID (U8_MAX) + +struct uniphier_clk_fixed_rate_data { + unsigned long fixed_rate; +}; struct uniphier_clk_gate_data { - unsigned int id; - unsigned int reg; - unsigned int bit; + u8 parent_id; + u16 reg; + u8 bit; }; struct uniphier_clk_mux_data { - unsigned int id; - unsigned int nr_muxs; - unsigned int reg; - unsigned int masks[UNIPHIER_CLK_MAX_NR_MUXS]; - unsigned int vals[UNIPHIER_CLK_MAX_NR_MUXS]; - unsigned long rates[UNIPHIER_CLK_MAX_NR_MUXS]; + u8 parent_ids[UNIPHIER_CLK_MUX_MAX_PARENTS]; + u8 num_parents; + u16 reg; + u32 masks[UNIPHIER_CLK_MUX_MAX_PARENTS]; + u32 vals[UNIPHIER_CLK_MUX_MAX_PARENTS]; }; struct uniphier_clk_data { - const struct uniphier_clk_gate_data *gate; - const struct uniphier_clk_mux_data *mux; + u8 type; + u8 id; + union { + struct uniphier_clk_fixed_rate_data rate; + struct uniphier_clk_gate_data gate; + struct uniphier_clk_mux_data mux; + } data; }; -#define UNIPHIER_CLK_ID_END (unsigned int)(-1) - -#define UNIPHIER_CLK_END \ - { .id = UNIPHIER_CLK_ID_END } - -#define UNIPHIER_CLK_GATE(_id, _reg, _bit) \ - { \ - .id = (_id), \ - .reg = (_reg), \ - .bit = (_bit), \ +#define UNIPHIER_CLK_RATE(_id, _rate) \ + { \ + .type = UNIPHIER_CLK_TYPE_FIXED_RATE, \ + .id = (_id), \ + .data.rate = { \ + .fixed_rate = (_rate), \ + }, \ } -#define UNIPHIER_CLK_FIXED_RATE(_id, _rate) \ - { \ - .id = (_id), \ - .rates = {(_reg),}, \ +#define UNIPHIER_CLK_GATE(_id, _parent, _reg, _bit) \ + { \ + .type = UNIPHIER_CLK_TYPE_GATE, \ + .id = (_id), \ + .data.gate = { \ + .parent_id = (_parent), \ + .reg = (_reg), \ + .bit = (_bit), \ + }, \ } -extern const struct uniphier_clk_data uniphier_pxs2_sys_clk_data; -extern const struct uniphier_clk_data uniphier_ld20_sys_clk_data; -extern const struct uniphier_clk_data uniphier_mio_clk_data; +#define UNIPHIER_CLK_GATE_SIMPLE(_id, _reg, _bit) \ + UNIPHIER_CLK_GATE(_id, UNIPHIER_CLK_ID_INVALID, _reg, _bit) + +extern const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[]; +extern const struct uniphier_clk_data uniphier_ld20_sys_clk_data[]; +extern const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[]; +extern const struct uniphier_clk_data uniphier_mio_clk_data[]; #endif /* __CLK_UNIPHIER_H__ */ diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 7afef1f9a3..e8ba20ca82 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -45,6 +45,12 @@ config DM_WARN This will cause dm_warn() to be compiled out - it will do nothing when called. +config DM_DEBUG + bool "Enable debug messages in driver model core" + depends on DM + help + Say Y here if you want to compile in debug messages in DM core. + config DM_DEVICE_REMOVE bool "Support device removal" depends on DM diff --git a/drivers/core/Makefile b/drivers/core/Makefile index 3d68c70b57..a5039c5bd3 100644 --- a/drivers/core/Makefile +++ b/drivers/core/Makefile @@ -16,3 +16,5 @@ ifndef CONFIG_DM_DEV_READ_INLINE obj-$(CONFIG_OF_CONTROL) += read.o endif obj-$(CONFIG_OF_CONTROL) += of_extra.o ofnode.o read_extra.o + +ccflags-$(CONFIG_DM_DEBUG) += -DDEBUG diff --git a/drivers/core/device.c b/drivers/core/device.c index 5463d1ffa5..9a46a7bbe5 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -161,7 +161,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv, } if (parent) - dm_dbg("Bound device %s to %s\n", dev->name, parent->name); + pr_debug("Bound device %s to %s\n", dev->name, parent->name); if (devp) *devp = dev; @@ -254,6 +254,7 @@ static void *alloc_priv(int size, uint flags) void *priv; if (flags & DM_FLAG_ALLOC_PRIV_DMA) { + size = ROUND(size, ARCH_DMA_MINALIGN); priv = memalign(ARCH_DMA_MINALIGN, size); if (priv) { memset(priv, '\0', size); diff --git a/drivers/core/lists.c b/drivers/core/lists.c index 6067914e81..6fa5d1090a 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -139,12 +139,13 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp) if (devp) *devp = NULL; name = ofnode_get_name(node); - dm_dbg("bind node %s\n", name); + pr_debug("bind node %s\n", name); compat_list = ofnode_get_property(node, "compatible", &compat_length); if (!compat_list) { if (compat_length == -FDT_ERR_NOTFOUND) { - dm_dbg("Device '%s' has no compatible string\n", name); + pr_debug("Device '%s' has no compatible string\n", + name); return 0; } @@ -159,8 +160,8 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp) */ for (i = 0; i < compat_length; i += strlen(compat) + 1) { compat = compat_list + i; - dm_dbg(" - attempt to match compatible string '%s'\n", - compat); + pr_debug(" - attempt to match compatible string '%s'\n", + compat); for (entry = driver; entry != driver + n_ents; entry++) { ret = driver_check_compatible(entry->of_match, &id, @@ -171,11 +172,11 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp) if (entry == driver + n_ents) continue; - dm_dbg(" - found match at '%s'\n", entry->name); + pr_debug(" - found match at '%s'\n", entry->name); ret = device_bind_with_driver_data(parent, entry, name, id->data, node, &dev); if (ret == -ENODEV) { - dm_dbg("Driver '%s' refuses to bind\n", entry->name); + pr_debug("Driver '%s' refuses to bind\n", entry->name); continue; } if (ret) { @@ -191,7 +192,7 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp) } if (!found && !result && ret != -ENODEV) - dm_dbg("No match for node '%s'\n", name); + pr_debug("No match for node '%s'\n", name); return result; } diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index c6ca13fabf..0030ab962e 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -468,8 +468,10 @@ fdt_addr_t ofnode_get_addr_size(ofnode node, const char *property, int na, ns; int psize; const struct device_node *np = ofnode_to_np(node); - const __be32 *prop = of_get_property(np, "reg", &psize); + const __be32 *prop = of_get_property(np, property, &psize); + if (!prop) + return FDT_ADDR_T_NONE; na = of_n_addr_cells(np); ns = of_n_addr_cells(np); *sizep = of_read_number(prop + na, ns); diff --git a/drivers/core/read.c b/drivers/core/read.c index 065589a6ab..eacf1716fd 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -81,6 +81,17 @@ int dev_read_stringlist_search(struct udevice *dev, const char *property, return ofnode_stringlist_search(dev_ofnode(dev), property, string); } +int dev_read_string_index(struct udevice *dev, const char *propname, int index, + const char **outp) +{ + return ofnode_read_string_index(dev_ofnode(dev), propname, index, outp); +} + +int dev_read_string_count(struct udevice *dev, const char *propname) +{ + return ofnode_read_string_count(dev_ofnode(dev), propname); +} + int dev_read_phandle_with_args(struct udevice *dev, const char *list_name, const char *cells_name, int cell_count, int index, diff --git a/drivers/core/root.c b/drivers/core/root.c index 757d109e57..976e2c4fdd 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -227,7 +227,7 @@ static int dm_scan_fdt_live(struct udevice *parent, !of_find_property(np, "u-boot,dm-pre-reloc", NULL)) continue; if (!of_device_is_available(np)) { - dm_dbg(" - ignoring disabled device\n"); + pr_debug(" - ignoring disabled device\n"); continue; } err = lists_bind_fdt(parent, np_to_ofnode(np), NULL); @@ -270,7 +270,7 @@ static int dm_scan_fdt_node(struct udevice *parent, const void *blob, !dm_fdt_pre_reloc(blob, offset)) continue; if (!fdtdec_get_is_enabled(blob, offset)) { - dm_dbg(" - ignoring disabled device\n"); + pr_debug(" - ignoring disabled device\n"); continue; } err = lists_bind_fdt(parent, offset_to_ofnode(offset), NULL); diff --git a/drivers/core/util.c b/drivers/core/util.c index 2e232d57a1..aaaed4ec02 100644 --- a/drivers/core/util.c +++ b/drivers/core/util.c @@ -20,17 +20,6 @@ void dm_warn(const char *fmt, ...) } #endif -#ifdef DEBUG -void dm_dbg(const char *fmt, ...) -{ - va_list args; - - va_start(args, fmt); - vprintf(fmt, args); - va_end(args); -} -#endif - int list_count_items(struct list_head *head) { struct list_head *node; diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index ff732ac309..2c22b625b8 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -64,14 +64,14 @@ int dfu_init_env_entities(char *interface, char *devstr) #endif str_env = env_get("dfu_alt_info"); if (!str_env) { - error("\"dfu_alt_info\" env variable not defined!\n"); + pr_err("\"dfu_alt_info\" env variable not defined!\n"); return -EINVAL; } env_bkp = strdup(str_env); ret = dfu_config_entities(env_bkp, interface, devstr); if (ret) { - error("DFU entities configuration failed!\n"); + pr_err("DFU entities configuration failed!\n"); return ret; } @@ -132,7 +132,7 @@ static char *dfu_get_hash_algo(void) return s; } - error("DFU hash method: %s not supported!\n", s); + pr_err("DFU hash method: %s not supported!\n", s); return NULL; } @@ -273,7 +273,7 @@ int dfu_write(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num) /* we should be in buffer now (if not then size too large) */ if ((dfu->i_buf + size) > dfu->i_buf_end) { - error("Buffer overflow! (0x%p + 0x%x > 0x%p)\n", dfu->i_buf, + pr_err("Buffer overflow! (0x%p + 0x%x > 0x%p)\n", dfu->i_buf, size, dfu->i_buf_end); dfu_transaction_cleanup(dfu); return -1; @@ -451,7 +451,7 @@ int dfu_config_entities(char *env, char *interface, char *devstr) if (s) { ret = hash_lookup_algo(s, &dfu_hash_algo); if (ret) - error("Hash algorithm %s not supported\n", s); + pr_err("Hash algorithm %s not supported\n", s); } dfu = calloc(sizeof(*dfu), dfu_alt_num); @@ -576,7 +576,7 @@ int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size) dp, left, write); ret = dfu_write(dfu, dp, write, i); if (ret) { - error("DFU write failed\n"); + pr_err("DFU write failed\n"); return ret; } @@ -586,7 +586,7 @@ int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size) ret = dfu_flush(dfu, NULL, 0, i); if (ret) - error("DFU flush failed!"); + pr_err("DFU flush failed!"); return ret; } diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index 39e10b1a5a..47948d369d 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -29,7 +29,7 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, mmc = find_mmc_device(dfu->data.mmc.dev_num); if (!mmc) { - error("Device MMC %d - not found!", dfu->data.mmc.dev_num); + pr_err("Device MMC %d - not found!", dfu->data.mmc.dev_num); return -ENODEV; } @@ -69,11 +69,11 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, buf); break; default: - error("Operation not supported\n"); + pr_err("Operation not supported\n"); } if (n != blk_count) { - error("MMC operation failed"); + pr_err("MMC operation failed"); if (dfu->data.mmc.hw_partition >= 0) blk_select_hwpart_devnum(IF_TYPE_MMC, dfu->data.mmc.dev_num, @@ -312,7 +312,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) { *parg = strsep(&s, " "); if (*parg == NULL) { - error("Invalid number of arguments.\n"); + pr_err("Invalid number of arguments.\n"); return -ENODEV; } } @@ -327,13 +327,13 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) mmc = find_mmc_device(dfu->data.mmc.dev_num); if (mmc == NULL) { - error("Couldn't find MMC device no. %d.\n", + pr_err("Couldn't find MMC device no. %d.\n", dfu->data.mmc.dev_num); return -ENODEV; } if (mmc_init(mmc)) { - error("Couldn't init MMC device.\n"); + pr_err("Couldn't init MMC device.\n"); return -ENODEV; } @@ -360,7 +360,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) int mmcpart = third_arg; if (part_get_info(blk_dev, mmcpart, &partinfo) != 0) { - error("Couldn't find part #%d on mmc device #%d\n", + pr_err("Couldn't find part #%d on mmc device #%d\n", mmcpart, mmcdev); return -ENODEV; } @@ -374,7 +374,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) } else if (!strcmp(entity_type, "ext4")) { dfu->layout = DFU_FS_EXT4; } else { - error("Memory layout (%s) not supported!\n", entity_type); + pr_err("Memory layout (%s) not supported!\n", entity_type); return -ENODEV; } @@ -397,7 +397,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) dfu_file_buf = memalign(CONFIG_SYS_CACHELINE_SIZE, CONFIG_SYS_DFU_MAX_FILE_SIZE); if (!dfu_file_buf) { - error("Could not memalign 0x%x bytes", + pr_err("Could not memalign 0x%x bytes", CONFIG_SYS_DFU_MAX_FILE_SIZE); return -ENOMEM; } diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c index 6e3f5316f5..2b5e05a913 100644 --- a/drivers/dfu/dfu_ram.c +++ b/drivers/dfu/dfu_ram.c @@ -18,12 +18,12 @@ static int dfu_transfer_medium_ram(enum dfu_op op, struct dfu_entity *dfu, u64 offset, void *buf, long *len) { if (dfu->layout != DFU_RAM_ADDR) { - error("unsupported layout: %s\n", dfu_get_layout(dfu->layout)); + pr_err("unsupported layout: %s\n", dfu_get_layout(dfu->layout)); return -EINVAL; } if (offset > dfu->data.ram.size) { - error("request exceeds allowed area\n"); + pr_err("request exceeds allowed area\n"); return -EINVAL; } @@ -62,14 +62,14 @@ int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s) for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) { *parg = strsep(&s, " "); if (*parg == NULL) { - error("Invalid number of arguments.\n"); + pr_err("Invalid number of arguments.\n"); return -ENODEV; } } dfu->dev_type = DFU_DEV_RAM; if (strcmp(argv[0], "ram")) { - error("unsupported device: %s\n", argv[0]); + pr_err("unsupported device: %s\n", argv[0]); return -ENODEV; } diff --git a/drivers/dfu/dfu_tftp.c b/drivers/dfu/dfu_tftp.c index cd71708231..62bf797dac 100644 --- a/drivers/dfu/dfu_tftp.c +++ b/drivers/dfu/dfu_tftp.c @@ -43,7 +43,7 @@ int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len, alt_setting_num = dfu_get_alt(sb); free(sb); if (alt_setting_num < 0) { - error("Alt setting [%d] to write not found!", + pr_err("Alt setting [%d] to write not found!", alt_setting_num); ret = -ENODEV; goto done; @@ -51,7 +51,7 @@ int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len, dfu = dfu_get_entity(alt_setting_num); if (!dfu) { - error("DFU entity for alt: %d not found!", alt_setting_num); + pr_err("DFU entity for alt: %d not found!", alt_setting_num); ret = -ENODEV; goto done; } diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c index ea21fd9c6f..3d0ce22fbc 100644 --- a/drivers/dma/dma-uclass.c +++ b/drivers/dma/dma-uclass.c @@ -33,7 +33,7 @@ int dma_get_device(u32 transfer_type, struct udevice **devp) } if (!dev) { - error("No DMA device found that supports %x type\n", + pr_err("No DMA device found that supports %x type\n", transfer_type); return -EPROTONOSUPPORT; } diff --git a/drivers/dma/lpc32xx_dma.c b/drivers/dma/lpc32xx_dma.c index 955adfeccd..63a8a2f340 100644 --- a/drivers/dma/lpc32xx_dma.c +++ b/drivers/dma/lpc32xx_dma.c @@ -96,7 +96,7 @@ int lpc32xx_dma_start_xfer(unsigned int channel, { if (unlikely(((BIT_MASK(channel) & alloc_ch) == 0) || (channel >= DMA_NO_OF_CHANNELS))) { - error("Request for xfer on unallocated channel %d", channel); + pr_err("Request for xfer on unallocated channel %d", channel); return -1; } writel(BIT_MASK(channel), &dma->int_tc_clear); @@ -117,7 +117,7 @@ int lpc32xx_dma_wait_status(unsigned int channel) /* Check if given channel is valid */ if (unlikely(channel >= DMA_NO_OF_CHANNELS)) { - error("Request for status on unallocated channel %d", channel); + pr_err("Request for status on unallocated channel %d", channel); return -1; } @@ -129,7 +129,7 @@ int lpc32xx_dma_wait_status(unsigned int channel) break; if (get_timer(start) > CONFIG_SYS_HZ) { - error("DMA status timeout channel %d\n", channel); + pr_err("DMA status timeout channel %d\n", channel); return -ETIMEDOUT; } udelay(1); @@ -138,7 +138,7 @@ int lpc32xx_dma_wait_status(unsigned int channel) if (unlikely(readl(&dma->raw_err_stat) & BIT_MASK(channel))) { setbits_le32(&dma->int_err_clear, BIT_MASK(channel)); setbits_le32(&dma->raw_err_stat, BIT_MASK(channel)); - error("DMA error on channel %d\n", channel); + pr_err("DMA error on channel %d\n", channel); return -1; } setbits_le32(&dma->int_tc_clear, BIT_MASK(channel)); diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c index 39e9793013..635eb7876d 100644 --- a/drivers/dma/ti-edma3.c +++ b/drivers/dma/ti-edma3.c @@ -491,7 +491,7 @@ static int ti_edma3_transfer(struct udevice *dev, int direction, void *dst, __edma3_transfer(priv->base, 1, dst, src, len); break; default: - error("Transfer type not implemented in DMA driver\n"); + pr_err("Transfer type not implemented in DMA driver\n"); break; } diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ffeda9425a..6240c39539 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -135,6 +135,12 @@ config PCF8575_GPIO Support for PCF8575 I2C 16-bit GPIO expander. Most of these chips are from NXP and TI. +config RCAR_GPIO + bool "Renesas RCar GPIO driver" + depends on DM_GPIO && ARCH_RMOBILE + help + This driver supports the GPIO banks on Renesas RCar SoCs. + config ROCKCHIP_GPIO bool "Rockchip GPIO driver" depends on DM_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 1396467ab6..81f55a576b 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o obj-$(CONFIG_PCA953X) += pca953x.o obj-$(CONFIG_PCA9698) += pca9698.o obj-$(CONFIG_ROCKCHIP_GPIO) += rk_gpio.o +obj-$(CONFIG_RCAR_GPIO) += gpio-rcar.o obj-$(CONFIG_S5P) += s5p_gpio.o obj-$(CONFIG_SANDBOX_GPIO) += sandbox.o obj-$(CONFIG_SPEAR_GPIO) += spear_gpio.o diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c index 4db08a344a..1012f2d8eb 100644 --- a/drivers/gpio/adi_gpio2.c +++ b/drivers/gpio/adi_gpio2.c @@ -138,7 +138,7 @@ int peripheral_request(unsigned short per, const char *label) return 0; if (!(per & P_DEFINED)) - return -ENODEV; + return -EINVAL; BUG_ON(ident >= MAX_RESOURCES); diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c index f3689467f0..30bc4296e3 100644 --- a/drivers/gpio/atmel_pio4.c +++ b/drivers/gpio/atmel_pio4.c @@ -50,11 +50,11 @@ static int atmel_pio4_config_io_func(u32 port, u32 pin, u32 reg, mask; if (pin >= ATMEL_PIO_NPINS_PER_BANK) - return -ENODEV; + return -EINVAL; port_base = atmel_pio4_port_base(port); if (!port_base) - return -ENODEV; + return -EINVAL; mask = 1 << pin; reg = func; @@ -128,11 +128,11 @@ int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value) u32 reg, mask; if (pin >= ATMEL_PIO_NPINS_PER_BANK) - return -ENODEV; + return -EINVAL; port_base = atmel_pio4_port_base(port); if (!port_base) - return -ENODEV; + return -EINVAL; mask = 0x01 << pin; reg = ATMEL_PIO_CFGR_FUNC_GPIO | ATMEL_PIO_DIR_MASK; @@ -154,11 +154,11 @@ int atmel_pio4_get_pio_input(u32 port, u32 pin) u32 reg, mask; if (pin >= ATMEL_PIO_NPINS_PER_BANK) - return -ENODEV; + return -EINVAL; port_base = atmel_pio4_port_base(port); if (!port_base) - return -ENODEV; + return -EINVAL; mask = 0x01 << pin; reg = ATMEL_PIO_CFGR_FUNC_GPIO; diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c new file mode 100644 index 0000000000..8504dceb84 --- /dev/null +++ b/drivers/gpio/gpio-rcar.c @@ -0,0 +1,169 @@ +/* + * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <errno.h> +#include <asm/gpio.h> +#include <asm/io.h> + +#define GPIO_IOINTSEL 0x00 /* General IO/Interrupt Switching Register */ +#define GPIO_INOUTSEL 0x04 /* General Input/Output Switching Register */ +#define GPIO_OUTDT 0x08 /* General Output Register */ +#define GPIO_INDT 0x0c /* General Input Register */ +#define GPIO_INTDT 0x10 /* Interrupt Display Register */ +#define GPIO_INTCLR 0x14 /* Interrupt Clear Register */ +#define GPIO_INTMSK 0x18 /* Interrupt Mask Register */ +#define GPIO_MSKCLR 0x1c /* Interrupt Mask Clear Register */ +#define GPIO_POSNEG 0x20 /* Positive/Negative Logic Select Register */ +#define GPIO_EDGLEVEL 0x24 /* Edge/level Select Register */ +#define GPIO_FILONOFF 0x28 /* Chattering Prevention On/Off Register */ +#define GPIO_BOTHEDGE 0x4c /* One Edge/Both Edge Select Register */ + +#define RCAR_MAX_GPIO_PER_BANK 32 + +DECLARE_GLOBAL_DATA_PTR; + +struct rcar_gpio_priv { + void __iomem *regs; +}; + +static int rcar_gpio_get_value(struct udevice *dev, unsigned offset) +{ + struct rcar_gpio_priv *priv = dev_get_priv(dev); + const u32 bit = BIT(offset); + + /* + * Testing on r8a7790 shows that INDT does not show correct pin state + * when configured as output, so use OUTDT in case of output pins. + */ + if (readl(priv->regs + GPIO_INOUTSEL) & bit) + return !!(readl(priv->regs + GPIO_OUTDT) & bit); + else + return !!(readl(priv->regs + GPIO_INDT) & bit); +} + +static int rcar_gpio_set_value(struct udevice *dev, unsigned offset, + int value) +{ + struct rcar_gpio_priv *priv = dev_get_priv(dev); + + if (value) + setbits_le32(priv->regs + GPIO_OUTDT, BIT(offset)); + else + clrbits_le32(priv->regs + GPIO_OUTDT, BIT(offset)); + + return 0; +} + +static void rcar_gpio_set_direction(void __iomem *regs, unsigned offset, + bool output) +{ + /* + * follow steps in the GPIO documentation for + * "Setting General Output Mode" and + * "Setting General Input Mode" + */ + + /* Configure postive logic in POSNEG */ + clrbits_le32(regs + GPIO_POSNEG, BIT(offset)); + + /* Select "General Input/Output Mode" in IOINTSEL */ + clrbits_le32(regs + GPIO_IOINTSEL, BIT(offset)); + + /* Select Input Mode or Output Mode in INOUTSEL */ + if (output) + setbits_le32(regs + GPIO_INOUTSEL, BIT(offset)); + else + clrbits_le32(regs + GPIO_INOUTSEL, BIT(offset)); +} + +static int rcar_gpio_direction_input(struct udevice *dev, unsigned offset) +{ + struct rcar_gpio_priv *priv = dev_get_priv(dev); + + rcar_gpio_set_direction(priv->regs, offset, false); + + return 0; +} + +static int rcar_gpio_direction_output(struct udevice *dev, unsigned offset, + int value) +{ + struct rcar_gpio_priv *priv = dev_get_priv(dev); + + /* write GPIO value to output before selecting output mode of pin */ + rcar_gpio_set_value(dev, offset, value); + rcar_gpio_set_direction(priv->regs, offset, true); + + return 0; +} + +static int rcar_gpio_get_function(struct udevice *dev, unsigned offset) +{ + struct rcar_gpio_priv *priv = dev_get_priv(dev); + + if (readl(priv->regs + GPIO_INOUTSEL) & BIT(offset)) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + +static const struct dm_gpio_ops rcar_gpio_ops = { + .direction_input = rcar_gpio_direction_input, + .direction_output = rcar_gpio_direction_output, + .get_value = rcar_gpio_get_value, + .set_value = rcar_gpio_set_value, + .get_function = rcar_gpio_get_function, +}; + +static int rcar_gpio_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct rcar_gpio_priv *priv = dev_get_priv(dev); + struct fdtdec_phandle_args args; + struct clk clk; + int node = dev_of_offset(dev); + int ret; + + priv->regs = (void __iomem *)devfdt_get_addr(dev); + uc_priv->bank_name = dev->name; + + ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges", + NULL, 3, 0, &args); + uc_priv->gpio_count = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) { + dev_err(dev, "Failed to get GPIO bank clock\n"); + return ret; + } + + ret = clk_enable(&clk); + clk_free(&clk); + if (ret) { + dev_err(dev, "Failed to enable GPIO bank clock\n"); + return ret; + } + + return 0; +} + +static const struct udevice_id rcar_gpio_ids[] = { + { .compatible = "renesas,gpio-r8a7795" }, + { .compatible = "renesas,gpio-r8a7796" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(rcar_gpio) = { + .name = "rcar-gpio", + .id = UCLASS_GPIO, + .of_match = rcar_gpio_ids, + .ops = &rcar_gpio_ops, + .priv_auto_alloc_size = sizeof(struct rcar_gpio_priv), + .probe = rcar_gpio_probe, +}; diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index c11e95355b..107c3fcb10 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2016 Socionext Inc. + * Copyright (C) 2016-2017 Socionext Inc. * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ @@ -11,73 +11,123 @@ #include <linux/io.h> #include <linux/sizes.h> #include <linux/errno.h> +#include <asm/global_data.h> #include <asm/gpio.h> -#define UNIPHIER_GPIO_PORTS_PER_BANK 8 +#define UNIPHIER_GPIO_LINES_PER_BANK 8 -#define UNIPHIER_GPIO_REG_DATA 0 /* data */ -#define UNIPHIER_GPIO_REG_DIR 4 /* direction (1:in, 0:out) */ +#define UNIPHIER_GPIO_PORT_DATA 0x0 /* data */ +#define UNIPHIER_GPIO_PORT_DIR 0x4 /* direction (1:in, 0:out) */ +#define UNIPHIER_GPIO_IRQ_EN 0x90 /* irq enable */ struct uniphier_gpio_priv { - void __iomem *base; - char bank_name[16]; + void __iomem *regs; }; -static void uniphier_gpio_offset_write(struct udevice *dev, unsigned offset, - unsigned reg, int value) +static unsigned int uniphier_gpio_bank_to_reg(unsigned int bank) +{ + unsigned int reg; + + reg = (bank + 1) * 8; + + /* + * Unfortunately, the GPIO port registers are not contiguous because + * offset 0x90-0x9f is used for IRQ. Add 0x10 when crossing the region. + */ + if (reg >= UNIPHIER_GPIO_IRQ_EN) + reg += 0x10; + + return reg; +} + +static void uniphier_gpio_get_bank_and_mask(unsigned int offset, + unsigned int *bank, u32 *mask) +{ + *bank = offset / UNIPHIER_GPIO_LINES_PER_BANK; + *mask = BIT(offset % UNIPHIER_GPIO_LINES_PER_BANK); +} + +static void uniphier_gpio_reg_update(struct uniphier_gpio_priv *priv, + unsigned int reg, u32 mask, u32 val) { - struct uniphier_gpio_priv *priv = dev_get_priv(dev); u32 tmp; - tmp = readl(priv->base + reg); - if (value) - tmp |= BIT(offset); - else - tmp &= ~BIT(offset); - writel(tmp, priv->base + reg); + tmp = readl(priv->regs + reg); + tmp &= ~mask; + tmp |= mask & val; + writel(tmp, priv->regs + reg); } -static int uniphier_gpio_offset_read(struct udevice *dev, unsigned offset, - unsigned reg) +static void uniphier_gpio_bank_write(struct udevice *dev, unsigned int bank, + unsigned int reg, u32 mask, u32 val) { struct uniphier_gpio_priv *priv = dev_get_priv(dev); - return !!(readl(priv->base + reg) & BIT(offset)); + if (!mask) + return; + + uniphier_gpio_reg_update(priv, uniphier_gpio_bank_to_reg(bank) + reg, + mask, val); } -static int uniphier_gpio_direction_input(struct udevice *dev, unsigned offset) +static void uniphier_gpio_offset_write(struct udevice *dev, unsigned int offset, + unsigned int reg, int val) { - uniphier_gpio_offset_write(dev, offset, UNIPHIER_GPIO_REG_DIR, 1); + unsigned int bank; + u32 mask; - return 0; + uniphier_gpio_get_bank_and_mask(offset, &bank, &mask); + + uniphier_gpio_bank_write(dev, bank, reg, mask, val ? mask : 0); } -static int uniphier_gpio_direction_output(struct udevice *dev, unsigned offset, - int value) +static int uniphier_gpio_offset_read(struct udevice *dev, + unsigned int offset, unsigned int reg) { - uniphier_gpio_offset_write(dev, offset, UNIPHIER_GPIO_REG_DATA, value); - uniphier_gpio_offset_write(dev, offset, UNIPHIER_GPIO_REG_DIR, 0); + struct uniphier_gpio_priv *priv = dev_get_priv(dev); + unsigned int bank, reg_offset; + u32 mask; - return 0; + uniphier_gpio_get_bank_and_mask(offset, &bank, &mask); + reg_offset = uniphier_gpio_bank_to_reg(bank) + reg; + + return !!(readl(priv->regs + reg_offset) & mask); } -static int uniphier_gpio_get_value(struct udevice *dev, unsigned offset) +static int uniphier_gpio_get_function(struct udevice *dev, unsigned int offset) { - return uniphier_gpio_offset_read(dev, offset, UNIPHIER_GPIO_REG_DATA); + return uniphier_gpio_offset_read(dev, offset, UNIPHIER_GPIO_PORT_DIR) ? + GPIOF_INPUT : GPIOF_OUTPUT; } -static int uniphier_gpio_set_value(struct udevice *dev, unsigned offset, - int value) +static int uniphier_gpio_direction_input(struct udevice *dev, + unsigned int offset) { - uniphier_gpio_offset_write(dev, offset, UNIPHIER_GPIO_REG_DATA, value); + uniphier_gpio_offset_write(dev, offset, UNIPHIER_GPIO_PORT_DIR, 1); return 0; } -static int uniphier_gpio_get_function(struct udevice *dev, unsigned offset) +static int uniphier_gpio_direction_output(struct udevice *dev, + unsigned int offset, int value) { - return uniphier_gpio_offset_read(dev, offset, UNIPHIER_GPIO_REG_DIR) ? - GPIOF_INPUT : GPIOF_OUTPUT; + uniphier_gpio_offset_write(dev, offset, UNIPHIER_GPIO_PORT_DATA, value); + uniphier_gpio_offset_write(dev, offset, UNIPHIER_GPIO_PORT_DIR, 0); + + return 0; +} + +static int uniphier_gpio_get_value(struct udevice *dev, unsigned int offset) +{ + return uniphier_gpio_offset_read(dev, offset, UNIPHIER_GPIO_PORT_DATA); +} + +static int uniphier_gpio_set_value(struct udevice *dev, + unsigned int offset, int value) +{ + uniphier_gpio_offset_write(dev, offset, UNIPHIER_GPIO_PORT_DATA, value); + + return 0; } static const struct dm_gpio_ops uniphier_gpio_ops = { @@ -93,40 +143,28 @@ static int uniphier_gpio_probe(struct udevice *dev) struct uniphier_gpio_priv *priv = dev_get_priv(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); fdt_addr_t addr; - unsigned int tmp; addr = devfdt_get_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL; - priv->base = devm_ioremap(dev, addr, SZ_8); - if (!priv->base) + priv->regs = devm_ioremap(dev, addr, SZ_512); + if (!priv->regs) return -ENOMEM; - uc_priv->gpio_count = UNIPHIER_GPIO_PORTS_PER_BANK; - - tmp = (addr & 0xfff); - - /* Unfortunately, there is a register hole at offset 0x90-0x9f. */ - if (tmp > 0x90) - tmp -= 0x10; - - snprintf(priv->bank_name, sizeof(priv->bank_name) - 1, - "port%d-", (tmp - 8) / 8); - - uc_priv->bank_name = priv->bank_name; + uc_priv->gpio_count = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), + "ngpios", 0); return 0; } -/* .data = the number of GPIO banks */ static const struct udevice_id uniphier_gpio_match[] = { { .compatible = "socionext,uniphier-gpio" }, { /* sentinel */ } }; U_BOOT_DRIVER(uniphier_gpio) = { - .name = "uniphier_gpio", + .name = "uniphier-gpio", .id = UCLASS_GPIO, .of_match = uniphier_gpio_match, .probe = uniphier_gpio_probe, diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c index 5abc88ba54..7825714e80 100644 --- a/drivers/gpio/imx_rgpio2p.c +++ b/drivers/gpio/imx_rgpio2p.c @@ -168,13 +168,18 @@ static int imx_rgpio2p_bind(struct udevice *dev) addr = devfdt_get_addr_index(dev, 1); if (addr == FDT_ADDR_T_NONE) - return -ENODEV; + return -EINVAL; /* * TODO: * When every board is converted to driver model and DT is supported, * this can be done by auto-alloc feature, but not using calloc * to alloc memory for platdata. + * + * For example imx_rgpio2p_plat uses platform data rather than device + * tree. + * + * NOTE: DO NOT COPY this code if you are using device tree. */ plat = calloc(1, sizeof(*plat)); if (!plat) diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 0eb6c600f1..c480eba940 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -304,13 +304,18 @@ static int mxc_gpio_bind(struct udevice *dev) addr = devfdt_get_addr(dev); if (addr == FDT_ADDR_T_NONE) - return -ENODEV; + return -EINVAL; /* * TODO: * When every board is converted to driver model and DT is supported, * this can be done by auto-alloc feature, but not using calloc * to alloc memory for platdata. + * + * For example mxc_plat below uses platform data rather than device + * tree. + * + * NOTE: DO NOT COPY this code if you are using device tree. */ plat = calloc(1, sizeof(*plat)); if (!plat) diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c index b423e34ca4..7243100219 100644 --- a/drivers/gpio/omap_gpio.c +++ b/drivers/gpio/omap_gpio.c @@ -299,7 +299,7 @@ static int omap_gpio_probe(struct udevice *dev) static int omap_gpio_bind(struct udevice *dev) { - struct omap_gpio_platdata *plat = dev->platdata; + struct omap_gpio_platdata *plat = dev_get_platdata(dev); fdt_addr_t base_addr; if (plat) @@ -307,13 +307,17 @@ static int omap_gpio_bind(struct udevice *dev) base_addr = devfdt_get_addr(dev); if (base_addr == FDT_ADDR_T_NONE) - return -ENODEV; + return -EINVAL; /* * TODO: * When every board is converted to driver model and DT is * supported, this can be done by auto-alloc feature, but * not using calloc to alloc memory for platdata. + * + * For example am33xx_gpio uses platform data rather than device tree. + * + * NOTE: DO NOT COPY this code if you are using device tree. */ plat = calloc(1, sizeof(*plat)); if (!plat) diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c index 4962f25230..791d1d1516 100644 --- a/drivers/gpio/pca953x_gpio.c +++ b/drivers/gpio/pca953x_gpio.c @@ -249,22 +249,11 @@ static int pca953x_probe(struct udevice *dev) { struct pca953x_info *info = dev_get_platdata(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); char name[32], *str; int addr; ulong driver_data; int ret; - if (!info) { - dev_err(dev, "platdata not ready\n"); - return -ENOMEM; - } - - if (!chip) { - dev_err(dev, "i2c not ready\n"); - return -ENODEV; - } - addr = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg", 0); if (addr == 0) return -ENODEV; diff --git a/drivers/gpio/tegra186_gpio.c b/drivers/gpio/tegra186_gpio.c index c5a7e13cce..deb59e8b32 100644 --- a/drivers/gpio/tegra186_gpio.c +++ b/drivers/gpio/tegra186_gpio.c @@ -181,7 +181,7 @@ static int tegra186_gpio_bind(struct udevice *parent) regs = (uint32_t *)devfdt_get_addr_name(parent, "gpio"); if (regs == (uint32_t *)FDT_ADDR_T_NONE) - return -ENODEV; + return -EINVAL; for (port = 0; port < ctlr_data->port_count; port++) { struct tegra186_gpio_platdata *plat; diff --git a/drivers/gpio/vybrid_gpio.c b/drivers/gpio/vybrid_gpio.c index 89918e48dd..030e8d08a4 100644 --- a/drivers/gpio/vybrid_gpio.c +++ b/drivers/gpio/vybrid_gpio.c @@ -105,32 +105,18 @@ static int vybrid_gpio_probe(struct udevice *dev) return 0; } -static int vybrid_gpio_bind(struct udevice *dev) +static int vybrid_gpio_odata_to_platdata(struct udevice *dev) { - struct vybrid_gpio_platdata *plat = dev->platdata; + struct vybrid_gpio_platdata *plat = dev_get_platdata(dev); fdt_addr_t base_addr; - if (plat) - return 0; - base_addr = devfdt_get_addr(dev); if (base_addr == FDT_ADDR_T_NONE) - return -ENODEV; - - /* - * TODO: - * When every board is converted to driver model and DT is - * supported, this can be done by auto-alloc feature, but - * not using calloc to alloc memory for platdata. - */ - plat = calloc(1, sizeof(*plat)); - if (!plat) - return -ENOMEM; + return -EINVAL; plat->base = base_addr; plat->chip = dev->req_seq; plat->port_name = fdt_get_name(gd->fdt_blob, dev_of_offset(dev), NULL); - dev->platdata = plat; return 0; } @@ -144,8 +130,9 @@ U_BOOT_DRIVER(gpio_vybrid) = { .name = "gpio_vybrid", .id = UCLASS_GPIO, .ops = &gpio_vybrid_ops, + .of_match = vybrid_gpio_ids, + .ofdata_to_platdata = vybrid_gpio_odata_to_platdata, .probe = vybrid_gpio_probe, .priv_auto_alloc_size = sizeof(struct vybrid_gpios), - .of_match = vybrid_gpio_ids, - .bind = vybrid_gpio_bind, + .platdata_auto_alloc_size = sizeof(struct vybrid_gpio_platdata), }; diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c index aeeb304a87..4e8fa21473 100644 --- a/drivers/i2c/i2c-gpio.c +++ b/drivers/i2c/i2c-gpio.c @@ -322,7 +322,7 @@ static int i2c_gpio_ofdata_to_platdata(struct udevice *dev) return 0; error: - error("Can't get %s gpios! Error: %d", dev->name, ret); + pr_err("Can't get %s gpios! Error: %d", dev->name, ret); return ret; } diff --git a/drivers/i2c/i2c-uniphier-f.c b/drivers/i2c/i2c-uniphier-f.c index e51537b80e..eb6c9f3d20 100644 --- a/drivers/i2c/i2c-uniphier-f.c +++ b/drivers/i2c/i2c-uniphier-f.c @@ -6,13 +6,12 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> -#include <dm.h> -#include <linux/types.h> +#include <linux/errno.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/sizes.h> -#include <linux/errno.h> +#include <linux/types.h> +#include <dm.h> #include <i2c.h> #include <fdtdec.h> @@ -64,35 +63,27 @@ struct uniphier_fi2c_regs { #define FIOCLK 50000000 -struct uniphier_fi2c_dev { +struct uniphier_fi2c_priv { + struct udevice *dev; struct uniphier_fi2c_regs __iomem *regs; /* register base */ unsigned long fioclk; /* internal operation clock */ unsigned long timeout; /* time out (us) */ }; -static int reset_bus(struct uniphier_fi2c_regs __iomem *regs) +static void uniphier_fi2c_reset(struct uniphier_fi2c_priv *priv) { - u32 val; - int ret; - - /* bus forcible reset */ - writel(I2C_RST_RST, ®s->rst); - ret = readl_poll_timeout(®s->rst, val, !(val & I2C_RST_RST), 1); - if (ret < 0) - debug("error: fail to reset I2C controller\n"); - - return ret; + writel(I2C_RST_RST, &priv->regs->rst); } -static int check_device_busy(struct uniphier_fi2c_regs __iomem *regs) +static int uniphier_fi2c_check_bus_busy(struct uniphier_fi2c_priv *priv) { u32 val; int ret; - ret = readl_poll_timeout(®s->sr, val, !(val & I2C_SR_DB), 100); + ret = readl_poll_timeout(&priv->regs->sr, val, !(val & I2C_SR_DB), 100); if (ret < 0) { - debug("error: device busy too long. reset...\n"); - ret = reset_bus(regs); + dev_dbg(priv->dev, "error: device busy too long. reset...\n"); + uniphier_fi2c_reset(priv); } return ret; @@ -101,8 +92,7 @@ static int check_device_busy(struct uniphier_fi2c_regs __iomem *regs) static int uniphier_fi2c_probe(struct udevice *dev) { fdt_addr_t addr; - struct uniphier_fi2c_dev *priv = dev_get_priv(dev); - int ret; + struct uniphier_fi2c_priv *priv = dev_get_priv(dev); addr = devfdt_get_addr(dev); if (addr == FDT_ADDR_T_NONE) @@ -114,85 +104,85 @@ static int uniphier_fi2c_probe(struct udevice *dev) priv->fioclk = FIOCLK; + priv->dev = dev; + /* bus forcible reset */ - ret = reset_bus(priv->regs); - if (ret < 0) - return ret; + uniphier_fi2c_reset(priv); writel(I2C_BRST_FOEN | I2C_BRST_RSCLO, &priv->regs->brst); return 0; } -static int wait_for_irq(struct uniphier_fi2c_dev *dev, u32 flags, +static int wait_for_irq(struct uniphier_fi2c_priv *priv, u32 flags, bool *stop) { u32 irq; int ret; - ret = readl_poll_timeout(&dev->regs->intr, irq, irq & flags, - dev->timeout); + ret = readl_poll_timeout(&priv->regs->intr, irq, irq & flags, + priv->timeout); if (ret < 0) { - debug("error: time out\n"); + dev_dbg(priv->dev, "error: time out\n"); return ret; } if (irq & I2C_INT_AL) { - debug("error: arbitration lost\n"); + dev_dbg(priv->dev, "error: arbitration lost\n"); *stop = false; return ret; } if (irq & I2C_INT_NA) { - debug("error: no answer\n"); + dev_dbg(priv->dev, "error: no answer\n"); return ret; } return 0; } -static int issue_stop(struct uniphier_fi2c_dev *dev, int old_ret) +static int issue_stop(struct uniphier_fi2c_priv *priv, int old_ret) { int ret; - debug("stop condition\n"); - writel(I2C_CR_MST | I2C_CR_STO, &dev->regs->cr); + dev_dbg(priv->dev, "stop condition\n"); + writel(I2C_CR_MST | I2C_CR_STO, &priv->regs->cr); - ret = check_device_busy(dev->regs); + ret = uniphier_fi2c_check_bus_busy(priv); if (ret < 0) - debug("error: device busy after operation\n"); + dev_dbg(priv->dev, "error: device busy after operation\n"); return old_ret ? old_ret : ret; } -static int uniphier_fi2c_transmit(struct uniphier_fi2c_dev *dev, uint addr, +static int uniphier_fi2c_transmit(struct uniphier_fi2c_priv *priv, uint addr, uint len, const u8 *buf, bool *stop) { int ret; const u32 irq_flags = I2C_INT_TE | I2C_INT_NA | I2C_INT_AL; - struct uniphier_fi2c_regs __iomem *regs = dev->regs; + struct uniphier_fi2c_regs __iomem *regs = priv->regs; - debug("%s: addr = %x, len = %d\n", __func__, addr, len); + dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); writel(I2C_DTTX_CMD | addr << 1, ®s->dttx); writel(irq_flags, ®s->ie); writel(irq_flags, ®s->ic); - debug("start condition\n"); + dev_dbg(priv->dev, "start condition\n"); writel(I2C_CR_MST | I2C_CR_STA, ®s->cr); - ret = wait_for_irq(dev, irq_flags, stop); + ret = wait_for_irq(priv, irq_flags, stop); if (ret < 0) goto error; while (len--) { - debug("sending %x\n", *buf); + dev_dbg(priv->dev, "sending %x\n", *buf); writel(*buf++, ®s->dttx); writel(irq_flags, ®s->ic); - ret = wait_for_irq(dev, irq_flags, stop); + ret = wait_for_irq(priv, irq_flags, stop); if (ret < 0) goto error; } @@ -201,26 +191,26 @@ error: writel(irq_flags, ®s->ic); if (*stop) - ret = issue_stop(dev, ret); + ret = issue_stop(priv, ret); return ret; } -static int uniphier_fi2c_receive(struct uniphier_fi2c_dev *dev, uint addr, +static int uniphier_fi2c_receive(struct uniphier_fi2c_priv *priv, uint addr, uint len, u8 *buf, bool *stop) { int ret = 0; const u32 irq_flags = I2C_INT_RB | I2C_INT_NA | I2C_INT_AL; - struct uniphier_fi2c_regs __iomem *regs = dev->regs; + struct uniphier_fi2c_regs __iomem *regs = priv->regs; - debug("%s: addr = %x, len = %d\n", __func__, addr, len); + dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); /* * In case 'len == 0', only the slave address should be sent * for probing, which is covered by the transmit function. */ if (len == 0) - return uniphier_fi2c_transmit(dev, addr, len, buf, stop); + return uniphier_fi2c_transmit(priv, addr, len, buf, stop); writel(I2C_DTTX_CMD | I2C_DTTX_RD | addr << 1, ®s->dttx); @@ -228,17 +218,17 @@ static int uniphier_fi2c_receive(struct uniphier_fi2c_dev *dev, uint addr, writel(irq_flags, ®s->ie); writel(irq_flags, ®s->ic); - debug("start condition\n"); + dev_dbg(priv->dev, "start condition\n"); writel(I2C_CR_MST | I2C_CR_STA | (len == 1 ? I2C_CR_NACK : 0), ®s->cr); while (len--) { - ret = wait_for_irq(dev, irq_flags, stop); + ret = wait_for_irq(priv, irq_flags, stop); if (ret < 0) goto error; *buf++ = readl(®s->dtrx); - debug("received %x\n", *(buf - 1)); + dev_dbg(priv->dev, "received %x\n", *(buf - 1)); if (len == 1) writel(I2C_CR_MST | I2C_CR_NACK, ®s->cr); @@ -250,7 +240,7 @@ error: writel(irq_flags, ®s->ic); if (*stop) - ret = issue_stop(dev, ret); + ret = issue_stop(priv, ret); return ret; } @@ -259,10 +249,10 @@ static int uniphier_fi2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) { int ret; - struct uniphier_fi2c_dev *dev = dev_get_priv(bus); + struct uniphier_fi2c_priv *priv = dev_get_priv(bus); bool stop; - ret = check_device_busy(dev->regs); + ret = uniphier_fi2c_check_bus_busy(priv); if (ret < 0) return ret; @@ -271,10 +261,10 @@ static int uniphier_fi2c_xfer(struct udevice *bus, struct i2c_msg *msg, stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true; if (msg->flags & I2C_M_RD) - ret = uniphier_fi2c_receive(dev, msg->addr, msg->len, + ret = uniphier_fi2c_receive(priv, msg->addr, msg->len, msg->buf, &stop); else - ret = uniphier_fi2c_transmit(dev, msg->addr, msg->len, + ret = uniphier_fi2c_transmit(priv, msg->addr, msg->len, msg->buf, &stop); if (ret < 0) @@ -288,21 +278,21 @@ static int uniphier_fi2c_set_bus_speed(struct udevice *bus, unsigned int speed) { int ret; unsigned int clk_count; - struct uniphier_fi2c_dev *dev = dev_get_priv(bus); - struct uniphier_fi2c_regs __iomem *regs = dev->regs; + struct uniphier_fi2c_priv *priv = dev_get_priv(bus); + struct uniphier_fi2c_regs __iomem *regs = priv->regs; /* max supported frequency is 400 kHz */ if (speed > 400000) return -EINVAL; - ret = check_device_busy(dev->regs); + ret = uniphier_fi2c_check_bus_busy(priv); if (ret < 0) return ret; /* make sure the bus is idle when changing the frequency */ writel(I2C_BRST_RSCLO, ®s->brst); - clk_count = dev->fioclk / speed; + clk_count = priv->fioclk / speed; writel(clk_count, ®s->cyc); writel(clk_count / 2, ®s->lctl); @@ -316,7 +306,7 @@ static int uniphier_fi2c_set_bus_speed(struct udevice *bus, unsigned int speed) * 1000000 * 9 / speed usec. * This time out value is long enough. */ - dev->timeout = 100000000L / speed; + priv->timeout = 100000000L / speed; return 0; } @@ -336,6 +326,6 @@ U_BOOT_DRIVER(uniphier_fi2c) = { .id = UCLASS_I2C, .of_match = uniphier_fi2c_of_match, .probe = uniphier_fi2c_probe, - .priv_auto_alloc_size = sizeof(struct uniphier_fi2c_dev), + .priv_auto_alloc_size = sizeof(struct uniphier_fi2c_priv), .ops = &uniphier_fi2c_ops, }; diff --git a/drivers/i2c/i2c-uniphier.c b/drivers/i2c/i2c-uniphier.c index 3412e2a189..0f2734eb02 100644 --- a/drivers/i2c/i2c-uniphier.c +++ b/drivers/i2c/i2c-uniphier.c @@ -6,14 +6,14 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> -#include <dm.h> -#include <linux/types.h> +#include <linux/delay.h> +#include <linux/errno.h> #include <linux/io.h> #include <linux/sizes.h> -#include <linux/errno.h> -#include <i2c.h> +#include <linux/types.h> +#include <dm.h> #include <fdtdec.h> +#include <i2c.h> struct uniphier_i2c_regs { u32 dtrm; /* data transmission */ @@ -38,7 +38,8 @@ struct uniphier_i2c_regs { #define IOBUS_FREQ 100000000 -struct uniphier_i2c_dev { +struct uniphier_i2c_priv { + struct udevice *dev; struct uniphier_i2c_regs __iomem *regs; /* register base */ unsigned long input_clk; /* master clock (Hz) */ unsigned long wait_us; /* wait for every byte transfer (us) */ @@ -47,7 +48,7 @@ struct uniphier_i2c_dev { static int uniphier_i2c_probe(struct udevice *dev) { fdt_addr_t addr; - struct uniphier_i2c_dev *priv = dev_get_priv(dev); + struct uniphier_i2c_priv *priv = dev_get_priv(dev); addr = devfdt_get_addr(dev); if (addr == FDT_ADDR_T_NONE) @@ -59,15 +60,17 @@ static int uniphier_i2c_probe(struct udevice *dev) priv->input_clk = IOBUS_FREQ; + priv->dev = dev; + /* deassert reset */ writel(0x3, &priv->regs->brst); return 0; } -static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm) +static int send_and_recv_byte(struct uniphier_i2c_priv *priv, u32 dtrm) { - writel(dtrm, &dev->regs->dtrm); + writel(dtrm, &priv->regs->dtrm); /* * This controller only provides interruption to inform the completion @@ -75,72 +78,72 @@ static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm) * Unfortunately, U-Boot does not have a good support of interrupt. * Wait for a while. */ - udelay(dev->wait_us); + udelay(priv->wait_us); - return readl(&dev->regs->drec); + return readl(&priv->regs->drec); } -static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool *stop) +static int send_byte(struct uniphier_i2c_priv *priv, u32 dtrm, bool *stop) { int ret = 0; u32 drec; - drec = send_and_recv_byte(dev, dtrm); + drec = send_and_recv_byte(priv, dtrm); if (drec & I2C_DREC_LAB) { - debug("uniphier_i2c: bus arbitration failed\n"); + dev_dbg(priv->dev, "uniphier_i2c: bus arbitration failed\n"); *stop = false; ret = -EREMOTEIO; } if (drec & I2C_DREC_LRB) { - debug("uniphier_i2c: slave did not return ACK\n"); + dev_dbg(priv->dev, "uniphier_i2c: slave did not return ACK\n"); ret = -EREMOTEIO; } return ret; } -static int uniphier_i2c_transmit(struct uniphier_i2c_dev *dev, uint addr, +static int uniphier_i2c_transmit(struct uniphier_i2c_priv *priv, uint addr, uint len, const u8 *buf, bool *stop) { int ret; - debug("%s: addr = %x, len = %d\n", __func__, addr, len); + dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); - ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop); + ret = send_byte(priv, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop); if (ret < 0) goto fail; while (len--) { - ret = send_byte(dev, I2C_DTRM_NACK | *buf++, stop); + ret = send_byte(priv, I2C_DTRM_NACK | *buf++, stop); if (ret < 0) goto fail; } fail: if (*stop) - writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm); + writel(I2C_DTRM_STO | I2C_DTRM_NACK, &priv->regs->dtrm); return ret; } -static int uniphier_i2c_receive(struct uniphier_i2c_dev *dev, uint addr, +static int uniphier_i2c_receive(struct uniphier_i2c_priv *priv, uint addr, uint len, u8 *buf, bool *stop) { int ret; - debug("%s: addr = %x, len = %d\n", __func__, addr, len); + dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); - ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | + ret = send_byte(priv, I2C_DTRM_STA | I2C_DTRM_NACK | I2C_DTRM_RD | addr << 1, stop); if (ret < 0) goto fail; while (len--) - *buf++ = send_and_recv_byte(dev, len ? 0 : I2C_DTRM_NACK); + *buf++ = send_and_recv_byte(priv, len ? 0 : I2C_DTRM_NACK); fail: if (*stop) - writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm); + writel(I2C_DTRM_STO | I2C_DTRM_NACK, &priv->regs->dtrm); return ret; } @@ -149,7 +152,7 @@ static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) { int ret = 0; - struct uniphier_i2c_dev *dev = dev_get_priv(bus); + struct uniphier_i2c_priv *priv = dev_get_priv(bus); bool stop; for (; nmsgs > 0; nmsgs--, msg++) { @@ -157,10 +160,10 @@ static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true; if (msg->flags & I2C_M_RD) - ret = uniphier_i2c_receive(dev, msg->addr, msg->len, + ret = uniphier_i2c_receive(priv, msg->addr, msg->len, msg->buf, &stop); else - ret = uniphier_i2c_transmit(dev, msg->addr, msg->len, + ret = uniphier_i2c_transmit(priv, msg->addr, msg->len, msg->buf, &stop); if (ret < 0) @@ -172,7 +175,7 @@ static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) { - struct uniphier_i2c_dev *priv = dev_get_priv(bus); + struct uniphier_i2c_priv *priv = dev_get_priv(bus); /* max supported frequency is 400 kHz */ if (speed > 400000) @@ -211,6 +214,6 @@ U_BOOT_DRIVER(uniphier_i2c) = { .id = UCLASS_I2C, .of_match = uniphier_i2c_of_match, .probe = uniphier_i2c_probe, - .priv_auto_alloc_size = sizeof(struct uniphier_i2c_dev), + .priv_auto_alloc_size = sizeof(struct uniphier_i2c_priv), .ops = &uniphier_i2c_ops, }; diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c index aa97196e23..e7ec17fe9e 100644 --- a/drivers/i2c/imx_lpi2c.c +++ b/drivers/i2c/imx_lpi2c.c @@ -412,7 +412,7 @@ static int imx_lpi2c_probe(struct udevice *bus) addr = devfdt_get_addr(bus); if (addr == FDT_ADDR_T_NONE) - return -ENODEV; + return -EINVAL; i2c_bus->base = addr; i2c_bus->index = bus->seq; diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c index 01ca1ff48d..2b70ff82bd 100644 --- a/drivers/i2c/muxes/pca954x.c +++ b/drivers/i2c/muxes/pca954x.c @@ -27,6 +27,7 @@ struct chip_desc { pca954x_ismux = 0, pca954x_isswi, } muxtype; + u32 width; }; struct pca954x_priv { @@ -39,14 +40,17 @@ static const struct chip_desc chips[] = { [PCA9544] = { .enable = 0x4, .muxtype = pca954x_ismux, + .width = 4, }, [PCA9547] = { .enable = 0x8, .muxtype = pca954x_ismux, + .width = 8, }, [PCA9548] = { .enable = 0x8, .muxtype = pca954x_isswi, + .width = 8, }, }; @@ -89,13 +93,14 @@ static const struct udevice_id pca954x_ids[] = { static int pca954x_ofdata_to_platdata(struct udevice *dev) { struct pca954x_priv *priv = dev_get_priv(dev); + const struct chip_desc *chip = &chips[dev_get_driver_data(dev)]; priv->addr = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "reg", 0); if (!priv->addr) { debug("MUX not found\n"); return -ENODEV; } - priv->width = dev_get_driver_data(dev); + priv->width = chip->width; if (!priv->width) { debug("No I2C MUX width specified\n"); diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index b7bb76c0ed..abf1da2ae3 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -176,7 +176,7 @@ static int bus_i2c_set_bus_speed(struct mxc_i2c_bus *i2c_bus, int speed) int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; if (!base) - return -ENODEV; + return -EINVAL; /* Store divider value */ writeb(idx, base + (IFDR << reg_shift)); @@ -239,7 +239,7 @@ static int tx_byte(struct mxc_i2c_bus *i2c_bus, u8 byte) if (ret < 0) return ret; if (ret & I2SR_RX_NO_AK) - return -ENODEV; + return -EREMOTEIO; return 0; } @@ -418,14 +418,14 @@ static int i2c_init_transfer(struct mxc_i2c_bus *i2c_bus, u8 chip, VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; if (!i2c_bus->base) - return -ENODEV; + return -EINVAL; for (retry = 0; retry < 3; retry++) { ret = i2c_init_transfer_(i2c_bus, chip, addr, alen); if (ret >= 0) return 0; i2c_imx_stop(i2c_bus); - if (ret == -ENODEV) + if (ret == -EREMOTEIO) return ret; printf("%s: failed for chip 0x%x retry=%d\n", __func__, chip, @@ -754,7 +754,7 @@ static int mxc_i2c_probe(struct udevice *bus) addr = devfdt_get_addr(bus); if (addr == FDT_ADDR_T_NONE) - return -ENODEV; + return -EINVAL; i2c_bus->base = addr; i2c_bus->index = bus->seq; @@ -783,7 +783,7 @@ static int mxc_i2c_probe(struct udevice *bus) !dm_gpio_is_valid(&i2c_bus->scl_gpio) | ret | ret2) { dev_err(dev, "i2c bus %d at %lu, fail to request scl/sda gpio\n", bus->seq, i2c_bus->base); - return -ENODEV; + return -EINVAL; } } diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index c98c6276dd..5d33815146 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -755,7 +755,7 @@ static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed) ret = __omap24_i2c_setspeed(i2c_base, speed, &adap->waitdelay); if (ret) { - error("%s: set i2c speed failed\n", __func__); + pr_err("%s: set i2c speed failed\n", __func__); return ret; } diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c index 840b3f6046..332280c220 100644 --- a/drivers/i2c/rk_i2c.c +++ b/drivers/i2c/rk_i2c.c @@ -396,6 +396,7 @@ static const struct udevice_id rockchip_i2c_ids[] = { { .compatible = "rockchip,rk3066-i2c" }, { .compatible = "rockchip,rk3188-i2c" }, { .compatible = "rockchip,rk3288-i2c" }, + { .compatible = "rockchip,rk3328-i2c" }, { .compatible = "rockchip,rk3399-i2c" }, { } }; diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c index bf5fefab7b..196f2365ea 100644 --- a/drivers/i2c/stm32f7_i2c.c +++ b/drivers/i2c/stm32f7_i2c.c @@ -549,7 +549,7 @@ static int stm32_i2c_compute_solutions(struct stm32_i2c_setup *setup, } if (list_empty(solutions)) { - error("%s: no Prescaler solution\n", __func__); + pr_err("%s: no Prescaler solution\n", __func__); ret = -EPERM; } @@ -627,7 +627,7 @@ static int stm32_i2c_choose_solution(struct stm32_i2c_setup *setup, } if (!s) { - error("%s: no solution at all\n", __func__); + pr_err("%s: no solution at all\n", __func__); ret = -EPERM; } @@ -643,14 +643,14 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv *i2c_priv, int ret; if (setup->speed >= STM32_I2C_SPEED_END) { - error("%s: speed out of bound {%d/%d}\n", __func__, + pr_err("%s: speed out of bound {%d/%d}\n", __func__, setup->speed, STM32_I2C_SPEED_END - 1); return -EINVAL; } if ((setup->rise_time > i2c_specs[setup->speed].rise_max) || (setup->fall_time > i2c_specs[setup->speed].fall_max)) { - error("%s :timings out of bound Rise{%d>%d}/Fall{%d>%d}\n", + pr_err("%s :timings out of bound Rise{%d>%d}/Fall{%d>%d}\n", __func__, setup->rise_time, i2c_specs[setup->speed].rise_max, setup->fall_time, i2c_specs[setup->speed].fall_max); @@ -658,13 +658,13 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv *i2c_priv, } if (setup->dnf > STM32_I2C_DNF_MAX) { - error("%s: DNF out of bound %d/%d\n", __func__, + pr_err("%s: DNF out of bound %d/%d\n", __func__, setup->dnf, STM32_I2C_DNF_MAX); return -EINVAL; } if (setup->speed_freq > i2c_specs[setup->speed].rate) { - error("%s: Freq {%d/%d}\n", __func__, + pr_err("%s: Freq {%d/%d}\n", __func__, setup->speed_freq, i2c_specs[setup->speed].rate); return -EINVAL; } @@ -711,7 +711,7 @@ static int stm32_i2c_setup_timing(struct stm32_i2c_priv *i2c_priv, setup->clock_src = clk_get_rate(&i2c_priv->clk); if (!setup->clock_src) { - error("%s: clock rate is 0\n", __func__); + pr_err("%s: clock rate is 0\n", __func__); return -EINVAL; } @@ -734,7 +734,7 @@ static int stm32_i2c_setup_timing(struct stm32_i2c_priv *i2c_priv, } while (ret); if (ret) { - error("%s: impossible to compute I2C timings.\n", __func__); + pr_err("%s: impossible to compute I2C timings.\n", __func__); return ret; } diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c index 931c6de508..b46a09a4e0 100644 --- a/drivers/i2c/tegra186_bpmp_i2c.c +++ b/drivers/i2c/tegra186_bpmp_i2c.c @@ -94,7 +94,7 @@ static int tegra186_bpmp_i2c_probe(struct udevice *dev) "nvidia,bpmp-bus-id", U32_MAX); if (priv->bpmp_bus_id == U32_MAX) { debug("%s: could not parse nvidia,bpmp-bus-id\n", __func__); - return -ENODEV; + return -EINVAL; } return 0; diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index 3255e8ed37..7d23e51b69 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -372,12 +372,12 @@ static int tegra_i2c_probe(struct udevice *dev) ret = reset_get_by_name(dev, "i2c", &i2c_bus->reset_ctl); if (ret) { - error("reset_get_by_name() failed: %d\n", ret); + pr_err("reset_get_by_name() failed: %d\n", ret); return ret; } ret = clk_get_by_name(dev, "div-clk", &i2c_bus->clk); if (ret) { - error("clk_get_by_name() failed: %d\n", ret); + pr_err("clk_get_by_name() failed: %d\n", ret); return ret; } diff --git a/drivers/misc/tegra186_bpmp.c b/drivers/misc/tegra186_bpmp.c index d61bacfc44..1fdf8efff3 100644 --- a/drivers/misc/tegra186_bpmp.c +++ b/drivers/misc/tegra186_bpmp.c @@ -44,7 +44,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg, ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame); if (ret) { - error("tegra_ivc_write_get_next_frame() failed: %d\n", ret); + pr_err("tegra_ivc_write_get_next_frame() failed: %d\n", ret); return ret; } @@ -55,7 +55,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg, ret = tegra_ivc_write_advance(&priv->ivc); if (ret) { - error("tegra_ivc_write_advance() failed: %d\n", ret); + pr_err("tegra_ivc_write_advance() failed: %d\n", ret); return ret; } @@ -63,7 +63,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg, for (;;) { ret = tegra_ivc_channel_notified(&priv->ivc); if (ret) { - error("tegra_ivc_channel_notified() failed: %d\n", ret); + pr_err("tegra_ivc_channel_notified() failed: %d\n", ret); return ret; } @@ -73,7 +73,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg, /* Timeout 20ms; roughly 10x current max observed duration */ if ((timer_get_us() - start_time) > 20 * 1000) { - error("tegra_ivc_read_get_next_frame() timed out (%d)\n", + pr_err("tegra_ivc_read_get_next_frame() timed out (%d)\n", ret); return -ETIMEDOUT; } @@ -86,12 +86,12 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg, ret = tegra_ivc_read_advance(&priv->ivc); if (ret) { - error("tegra_ivc_write_advance() failed: %d\n", ret); + pr_err("tegra_ivc_write_advance() failed: %d\n", ret); return ret; } if (err) { - error("BPMP responded with error %d\n", err); + pr_err("BPMP responded with error %d\n", err); /* err isn't a U-Boot error code, so don't that */ return -EIO; } @@ -144,14 +144,14 @@ static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index) ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev), "shmem", NULL, 0, index, &args); if (ret < 0) { - error("fdtdec_parse_phandle_with_args() failed: %d\n", ret); + pr_err("fdtdec_parse_phandle_with_args() failed: %d\n", ret); return ret; } reg = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, args.node, "reg", 0, NULL, true); if (reg == FDT_ADDR_T_NONE) { - error("fdtdec_get_addr_size_auto_noparent() failed\n"); + pr_err("fdtdec_get_addr_size_auto_noparent() failed\n"); return -ENODEV; } @@ -166,7 +166,7 @@ static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc) ret = mbox_send(&priv->mbox, NULL); if (ret) - error("mbox_send() failed: %d\n", ret); + pr_err("mbox_send() failed: %d\n", ret); } static int tegra186_bpmp_probe(struct udevice *dev) @@ -179,18 +179,18 @@ static int tegra186_bpmp_probe(struct udevice *dev) ret = mbox_get_by_index(dev, 0, &priv->mbox); if (ret) { - error("mbox_get_by_index() failed: %d\n", ret); + pr_err("mbox_get_by_index() failed: %d\n", ret); return ret; } tx_base = tegra186_bpmp_get_shmem(dev, 0); if (IS_ERR_VALUE(tx_base)) { - error("tegra186_bpmp_get_shmem failed for tx_base\n"); + pr_err("tegra186_bpmp_get_shmem failed for tx_base\n"); return tx_base; } rx_base = tegra186_bpmp_get_shmem(dev, 1); if (IS_ERR_VALUE(rx_base)) { - error("tegra186_bpmp_get_shmem failed for rx_base\n"); + pr_err("tegra186_bpmp_get_shmem failed for rx_base\n"); return rx_base; } debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base); @@ -198,7 +198,7 @@ static int tegra186_bpmp_probe(struct udevice *dev) ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT, BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify); if (ret) { - error("tegra_ivc_init() failed: %d\n", ret); + pr_err("tegra_ivc_init() failed: %d\n", ret); return ret; } @@ -211,7 +211,7 @@ static int tegra186_bpmp_probe(struct udevice *dev) /* Timeout 100ms */ if ((timer_get_us() - start_time) > 100 * 1000) { - error("Initial IVC reset timed out (%d)\n", ret); + pr_err("Initial IVC reset timed out (%d)\n", ret); ret = -ETIMEDOUT; goto err_free_mbox; } diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 6de927b8c6..940508364a 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -136,6 +136,7 @@ config MMC_PCI config MMC_OMAP_HS bool "TI OMAP High Speed Multimedia Card Interface support" select DM_REGULATOR_PBIAS if DM_MMC && DM_REGULATOR + select DM_REGULATOR_PBIAS if DM_MMC && DM_REGULATOR help This selects the TI OMAP High Speed Multimedia card Interface. If you have an omap2plus board with a Multimedia Card slot, @@ -162,12 +163,13 @@ config SH_SDHI Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform config MMC_UNIPHIER - bool "UniPhier SD/MMC Host Controller support" - depends on ARCH_UNIPHIER + bool "UniPhier/RCar SD/MMC Host Controller support" + depends on ARCH_UNIPHIER || ARCH_RMOBILE depends on BLK && DM_MMC depends on OF_CONTROL help - This selects support for the SD/MMC Host Controller on UniPhier SoCs. + This selects support for the Matsushita SD/MMC Host Controller on + SocioNext UniPhier and Renesas RCar SoCs. config MMC_SANDBOX bool "Sandbox MMC support" @@ -382,6 +384,14 @@ config GENERIC_ATMEL_MCI the SD Memory Card Specification V2.0, the SDIO V2.0 specification and CE-ATA V1.1. +config STM32_SDMMC2 + bool "STMicroelectronics STM32H7 SD/MMC Host Controller support" + depends on DM_MMC && BLK && OF_CONTROL + help + This selects support for the SD/MMC controller on STM32H7 SoCs. + If you have a board based on such a SoC and with a SD/MMC slot, + say Y or M here. + endif config TEGRA124_MMC_DISABLE_EXT_LOOPBACK diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index a6becb2309..d505f37f01 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -43,6 +43,7 @@ obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_SH_SDHI) += sh_sdhi.o +obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o # SDHCI obj-$(CONFIG_MMC_SDHCI) += sdhci.o diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 40f7892ac8..5edd383c68 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -155,7 +155,7 @@ static int exynos_dwmci_get_config(const void *blob, int node, priv = malloc(sizeof(struct dwmci_exynos_priv_data)); if (!priv) { - error("dwmci_exynos_priv_data malloc fail!\n"); + pr_err("dwmci_exynos_priv_data malloc fail!\n"); return -ENOMEM; } diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c index d795198534..44a8ef825f 100644 --- a/drivers/mmc/hi6220_dw_mmc.c +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -44,7 +44,7 @@ int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width) host = calloc(1, sizeof(struct dwmci_host)); if (!host) { - error("dwmci_host calloc failed!\n"); + pr_err("dwmci_host calloc failed!\n"); return -ENOMEM; } diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c index f83c1d7241..72d1c646a2 100644 --- a/drivers/mmc/sdhci-cadence.c +++ b/drivers/mmc/sdhci-cadence.c @@ -23,6 +23,18 @@ #define SDHCI_CDNS_HRS04_WDATA_SHIFT 8 #define SDHCI_CDNS_HRS04_ADDR_SHIFT 0 +#define SDHCI_CDNS_HRS06 0x18 /* eMMC control */ +#define SDHCI_CDNS_HRS06_TUNE_UP BIT(15) +#define SDHCI_CDNS_HRS06_TUNE_SHIFT 8 +#define SDHCI_CDNS_HRS06_TUNE_MASK 0x3f +#define SDHCI_CDNS_HRS06_MODE_MASK 0x7 +#define SDHCI_CDNS_HRS06_MODE_SD 0x0 +#define SDHCI_CDNS_HRS06_MODE_MMC_SDR 0x2 +#define SDHCI_CDNS_HRS06_MODE_MMC_DDR 0x3 +#define SDHCI_CDNS_HRS06_MODE_MMC_HS200 0x4 +#define SDHCI_CDNS_HRS06_MODE_MMC_HS400 0x5 +#define SDHCI_CDNS_HRS06_MODE_MMC_HS400ES 0x6 + /* SRS - Slot Register Set (SDHCI-compatible) */ #define SDHCI_CDNS_SRS_BASE 0x200 @@ -111,6 +123,44 @@ static int sdhci_cdns_phy_init(struct sdhci_cdns_plat *plat, return 0; } +static void sdhci_cdns_set_control_reg(struct sdhci_host *host) +{ + struct mmc *mmc = host->mmc; + struct sdhci_cdns_plat *plat = dev_get_platdata(mmc->dev); + unsigned int clock = mmc->clock; + u32 mode, tmp; + + /* + * REVISIT: + * The mode should be decided by MMC_TIMING_* like Linux, but + * U-Boot does not support timing. Use the clock frequency instead. + */ + if (clock <= 26000000) + mode = SDHCI_CDNS_HRS06_MODE_SD; /* use this for Legacy */ + else if (clock <= 52000000) { + if (mmc->ddr_mode) + mode = SDHCI_CDNS_HRS06_MODE_MMC_DDR; + else + mode = SDHCI_CDNS_HRS06_MODE_MMC_SDR; + } else { + /* + * REVISIT: + * The IP supports HS200/HS400, revisit once U-Boot support it + */ + printf("unsupported frequency %d\n", clock); + return; + } + + tmp = readl(plat->hrs_addr + SDHCI_CDNS_HRS06); + tmp &= ~SDHCI_CDNS_HRS06_MODE_MASK; + tmp |= mode; + writel(tmp, plat->hrs_addr + SDHCI_CDNS_HRS06); +} + +static const struct sdhci_ops sdhci_cdns_ops = { + .set_control_reg = sdhci_cdns_set_control_reg, +}; + static int sdhci_cdns_bind(struct udevice *dev) { struct sdhci_cdns_plat *plat = dev_get_platdata(dev); @@ -137,6 +187,7 @@ static int sdhci_cdns_probe(struct udevice *dev) host->name = dev->name; host->ioaddr = plat->hrs_addr + SDHCI_CDNS_SRS_BASE; + host->ops = &sdhci_cdns_ops; host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD; ret = sdhci_cdns_phy_init(plat, gd->fdt_blob, dev_of_offset(dev)); diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c index d8b5888b7c..a98c1eba0f 100644 --- a/drivers/mmc/sti_sdhci.c +++ b/drivers/mmc/sti_sdhci.c @@ -43,7 +43,7 @@ static int sti_mmc_core_config(struct udevice *dev) if (plat->instance) { ret = reset_deassert(&plat->reset); if (ret < 0) { - error("MMC1 deassert failed: %d", ret); + pr_err("MMC1 deassert failed: %d", ret); return ret; } } diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c new file mode 100644 index 0000000000..5e43397f8e --- /dev/null +++ b/drivers/mmc/stm32_sdmmc2.c @@ -0,0 +1,608 @@ +/* + * Copyright (C) STMicroelectronics SA 2017 + * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <fdtdec.h> +#include <libfdt.h> +#include <mmc.h> +#include <reset.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/iopoll.h> + +struct stm32_sdmmc2_plat { + struct mmc_config cfg; + struct mmc mmc; +}; + +struct stm32_sdmmc2_priv { + fdt_addr_t base; + struct clk clk; + struct reset_ctl reset_ctl; + struct gpio_desc cd_gpio; + u32 clk_reg_msk; + u32 pwr_reg_msk; +}; + +struct stm32_sdmmc2_ctx { + u32 cache_start; + u32 cache_end; + u32 data_length; + bool dpsm_abort; +}; + +/* SDMMC REGISTERS OFFSET */ +#define SDMMC_POWER 0x00 /* SDMMC power control */ +#define SDMMC_CLKCR 0x04 /* SDMMC clock control */ +#define SDMMC_ARG 0x08 /* SDMMC argument */ +#define SDMMC_CMD 0x0C /* SDMMC command */ +#define SDMMC_RESP1 0x14 /* SDMMC response 1 */ +#define SDMMC_RESP2 0x18 /* SDMMC response 2 */ +#define SDMMC_RESP3 0x1C /* SDMMC response 3 */ +#define SDMMC_RESP4 0x20 /* SDMMC response 4 */ +#define SDMMC_DTIMER 0x24 /* SDMMC data timer */ +#define SDMMC_DLEN 0x28 /* SDMMC data length */ +#define SDMMC_DCTRL 0x2C /* SDMMC data control */ +#define SDMMC_DCOUNT 0x30 /* SDMMC data counter */ +#define SDMMC_STA 0x34 /* SDMMC status */ +#define SDMMC_ICR 0x38 /* SDMMC interrupt clear */ +#define SDMMC_MASK 0x3C /* SDMMC mask */ +#define SDMMC_IDMACTRL 0x50 /* SDMMC DMA control */ +#define SDMMC_IDMABASE0 0x58 /* SDMMC DMA buffer 0 base address */ + +/* SDMMC_POWER register */ +#define SDMMC_POWER_PWRCTRL GENMASK(1, 0) +#define SDMMC_POWER_VSWITCH BIT(2) +#define SDMMC_POWER_VSWITCHEN BIT(3) +#define SDMMC_POWER_DIRPOL BIT(4) + +/* SDMMC_CLKCR register */ +#define SDMMC_CLKCR_CLKDIV GENMASK(9, 0) +#define SDMMC_CLKCR_CLKDIV_MAX SDMMC_CLKCR_CLKDIV +#define SDMMC_CLKCR_PWRSAV BIT(12) +#define SDMMC_CLKCR_WIDBUS_4 BIT(14) +#define SDMMC_CLKCR_WIDBUS_8 BIT(15) +#define SDMMC_CLKCR_NEGEDGE BIT(16) +#define SDMMC_CLKCR_HWFC_EN BIT(17) +#define SDMMC_CLKCR_DDR BIT(18) +#define SDMMC_CLKCR_BUSSPEED BIT(19) +#define SDMMC_CLKCR_SELCLKRX GENMASK(21, 20) + +/* SDMMC_CMD register */ +#define SDMMC_CMD_CMDINDEX GENMASK(5, 0) +#define SDMMC_CMD_CMDTRANS BIT(6) +#define SDMMC_CMD_CMDSTOP BIT(7) +#define SDMMC_CMD_WAITRESP GENMASK(9, 8) +#define SDMMC_CMD_WAITRESP_0 BIT(8) +#define SDMMC_CMD_WAITRESP_1 BIT(9) +#define SDMMC_CMD_WAITINT BIT(10) +#define SDMMC_CMD_WAITPEND BIT(11) +#define SDMMC_CMD_CPSMEN BIT(12) +#define SDMMC_CMD_DTHOLD BIT(13) +#define SDMMC_CMD_BOOTMODE BIT(14) +#define SDMMC_CMD_BOOTEN BIT(15) +#define SDMMC_CMD_CMDSUSPEND BIT(16) + +/* SDMMC_DCTRL register */ +#define SDMMC_DCTRL_DTEN BIT(0) +#define SDMMC_DCTRL_DTDIR BIT(1) +#define SDMMC_DCTRL_DTMODE GENMASK(3, 2) +#define SDMMC_DCTRL_DBLOCKSIZE GENMASK(7, 4) +#define SDMMC_DCTRL_DBLOCKSIZE_SHIFT 4 +#define SDMMC_DCTRL_RWSTART BIT(8) +#define SDMMC_DCTRL_RWSTOP BIT(9) +#define SDMMC_DCTRL_RWMOD BIT(10) +#define SDMMC_DCTRL_SDMMCEN BIT(11) +#define SDMMC_DCTRL_BOOTACKEN BIT(12) +#define SDMMC_DCTRL_FIFORST BIT(13) + +/* SDMMC_STA register */ +#define SDMMC_STA_CCRCFAIL BIT(0) +#define SDMMC_STA_DCRCFAIL BIT(1) +#define SDMMC_STA_CTIMEOUT BIT(2) +#define SDMMC_STA_DTIMEOUT BIT(3) +#define SDMMC_STA_TXUNDERR BIT(4) +#define SDMMC_STA_RXOVERR BIT(5) +#define SDMMC_STA_CMDREND BIT(6) +#define SDMMC_STA_CMDSENT BIT(7) +#define SDMMC_STA_DATAEND BIT(8) +#define SDMMC_STA_DHOLD BIT(9) +#define SDMMC_STA_DBCKEND BIT(10) +#define SDMMC_STA_DABORT BIT(11) +#define SDMMC_STA_DPSMACT BIT(12) +#define SDMMC_STA_CPSMACT BIT(13) +#define SDMMC_STA_TXFIFOHE BIT(14) +#define SDMMC_STA_RXFIFOHF BIT(15) +#define SDMMC_STA_TXFIFOF BIT(16) +#define SDMMC_STA_RXFIFOF BIT(17) +#define SDMMC_STA_TXFIFOE BIT(18) +#define SDMMC_STA_RXFIFOE BIT(19) +#define SDMMC_STA_BUSYD0 BIT(20) +#define SDMMC_STA_BUSYD0END BIT(21) +#define SDMMC_STA_SDMMCIT BIT(22) +#define SDMMC_STA_ACKFAIL BIT(23) +#define SDMMC_STA_ACKTIMEOUT BIT(24) +#define SDMMC_STA_VSWEND BIT(25) +#define SDMMC_STA_CKSTOP BIT(26) +#define SDMMC_STA_IDMATE BIT(27) +#define SDMMC_STA_IDMABTC BIT(28) + +/* SDMMC_ICR register */ +#define SDMMC_ICR_CCRCFAILC BIT(0) +#define SDMMC_ICR_DCRCFAILC BIT(1) +#define SDMMC_ICR_CTIMEOUTC BIT(2) +#define SDMMC_ICR_DTIMEOUTC BIT(3) +#define SDMMC_ICR_TXUNDERRC BIT(4) +#define SDMMC_ICR_RXOVERRC BIT(5) +#define SDMMC_ICR_CMDRENDC BIT(6) +#define SDMMC_ICR_CMDSENTC BIT(7) +#define SDMMC_ICR_DATAENDC BIT(8) +#define SDMMC_ICR_DHOLDC BIT(9) +#define SDMMC_ICR_DBCKENDC BIT(10) +#define SDMMC_ICR_DABORTC BIT(11) +#define SDMMC_ICR_BUSYD0ENDC BIT(21) +#define SDMMC_ICR_SDMMCITC BIT(22) +#define SDMMC_ICR_ACKFAILC BIT(23) +#define SDMMC_ICR_ACKTIMEOUTC BIT(24) +#define SDMMC_ICR_VSWENDC BIT(25) +#define SDMMC_ICR_CKSTOPC BIT(26) +#define SDMMC_ICR_IDMATEC BIT(27) +#define SDMMC_ICR_IDMABTCC BIT(28) +#define SDMMC_ICR_STATIC_FLAGS ((GENMASK(28, 21)) | (GENMASK(11, 0))) + +/* SDMMC_MASK register */ +#define SDMMC_MASK_CCRCFAILIE BIT(0) +#define SDMMC_MASK_DCRCFAILIE BIT(1) +#define SDMMC_MASK_CTIMEOUTIE BIT(2) +#define SDMMC_MASK_DTIMEOUTIE BIT(3) +#define SDMMC_MASK_TXUNDERRIE BIT(4) +#define SDMMC_MASK_RXOVERRIE BIT(5) +#define SDMMC_MASK_CMDRENDIE BIT(6) +#define SDMMC_MASK_CMDSENTIE BIT(7) +#define SDMMC_MASK_DATAENDIE BIT(8) +#define SDMMC_MASK_DHOLDIE BIT(9) +#define SDMMC_MASK_DBCKENDIE BIT(10) +#define SDMMC_MASK_DABORTIE BIT(11) +#define SDMMC_MASK_TXFIFOHEIE BIT(14) +#define SDMMC_MASK_RXFIFOHFIE BIT(15) +#define SDMMC_MASK_RXFIFOFIE BIT(17) +#define SDMMC_MASK_TXFIFOEIE BIT(18) +#define SDMMC_MASK_BUSYD0ENDIE BIT(21) +#define SDMMC_MASK_SDMMCITIE BIT(22) +#define SDMMC_MASK_ACKFAILIE BIT(23) +#define SDMMC_MASK_ACKTIMEOUTIE BIT(24) +#define SDMMC_MASK_VSWENDIE BIT(25) +#define SDMMC_MASK_CKSTOPIE BIT(26) +#define SDMMC_MASK_IDMABTCIE BIT(28) + +/* SDMMC_IDMACTRL register */ +#define SDMMC_IDMACTRL_IDMAEN BIT(0) + +#define SDMMC_CMD_TIMEOUT 0xFFFFFFFF + +DECLARE_GLOBAL_DATA_PTR; + +static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv, + struct mmc_data *data, + struct stm32_sdmmc2_ctx *ctx) +{ + u32 data_ctrl, idmabase0; + + /* Configure the SDMMC DPSM (Data Path State Machine) */ + data_ctrl = (__ilog2(data->blocksize) << + SDMMC_DCTRL_DBLOCKSIZE_SHIFT) & + SDMMC_DCTRL_DBLOCKSIZE; + + if (data->flags & MMC_DATA_READ) { + data_ctrl |= SDMMC_DCTRL_DTDIR; + idmabase0 = (u32)data->dest; + } else { + idmabase0 = (u32)data->src; + } + + /* Set the SDMMC Data TimeOut value */ + writel(SDMMC_CMD_TIMEOUT, priv->base + SDMMC_DTIMER); + + /* Set the SDMMC DataLength value */ + writel(ctx->data_length, priv->base + SDMMC_DLEN); + + /* Write to SDMMC DCTRL */ + writel(data_ctrl, priv->base + SDMMC_DCTRL); + + /* Cache align */ + ctx->cache_start = rounddown(idmabase0, ARCH_DMA_MINALIGN); + ctx->cache_end = roundup(idmabase0 + ctx->data_length, + ARCH_DMA_MINALIGN); + + /* + * Flush data cache before DMA start (clean and invalidate) + * Clean also needed for read + * Avoid issue on buffer not cached-aligned + */ + flush_dcache_range(ctx->cache_start, ctx->cache_end); + + /* Enable internal DMA */ + writel(idmabase0, priv->base + SDMMC_IDMABASE0); + writel(SDMMC_IDMACTRL_IDMAEN, priv->base + SDMMC_IDMACTRL); +} + +static void stm32_sdmmc2_start_cmd(struct stm32_sdmmc2_priv *priv, + struct mmc_cmd *cmd, u32 cmd_param) +{ + if (readl(priv->base + SDMMC_ARG) & SDMMC_CMD_CPSMEN) + writel(0, priv->base + SDMMC_ARG); + + cmd_param |= cmd->cmdidx | SDMMC_CMD_CPSMEN; + if (cmd->resp_type & MMC_RSP_PRESENT) { + if (cmd->resp_type & MMC_RSP_136) + cmd_param |= SDMMC_CMD_WAITRESP; + else if (cmd->resp_type & MMC_RSP_CRC) + cmd_param |= SDMMC_CMD_WAITRESP_0; + else + cmd_param |= SDMMC_CMD_WAITRESP_1; + } + + /* Clear flags */ + writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR); + + /* Set SDMMC argument value */ + writel(cmd->cmdarg, priv->base + SDMMC_ARG); + + /* Set SDMMC command parameters */ + writel(cmd_param, priv->base + SDMMC_CMD); +} + +static int stm32_sdmmc2_end_cmd(struct stm32_sdmmc2_priv *priv, + struct mmc_cmd *cmd, + struct stm32_sdmmc2_ctx *ctx) +{ + u32 mask = SDMMC_STA_CTIMEOUT; + u32 status; + int ret; + + if (cmd->resp_type & MMC_RSP_PRESENT) { + mask |= SDMMC_STA_CMDREND; + if (cmd->resp_type & MMC_RSP_CRC) + mask |= SDMMC_STA_CCRCFAIL; + } else { + mask |= SDMMC_STA_CMDSENT; + } + + /* Polling status register */ + ret = readl_poll_timeout(priv->base + SDMMC_STA, status, status & mask, + 10000); + + if (ret < 0) { + debug("%s: timeout reading SDMMC_STA register\n", __func__); + ctx->dpsm_abort = true; + return ret; + } + + /* Check status */ + if (status & SDMMC_STA_CTIMEOUT) { + debug("%s: error SDMMC_STA_CTIMEOUT (0x%x) for cmd %d\n", + __func__, status, cmd->cmdidx); + ctx->dpsm_abort = true; + return -ETIMEDOUT; + } + + if (status & SDMMC_STA_CCRCFAIL && cmd->resp_type & MMC_RSP_CRC) { + debug("%s: error SDMMC_STA_CCRCFAIL (0x%x) for cmd %d\n", + __func__, status, cmd->cmdidx); + ctx->dpsm_abort = true; + return -EILSEQ; + } + + if (status & SDMMC_STA_CMDREND && cmd->resp_type & MMC_RSP_PRESENT) { + cmd->response[0] = readl(priv->base + SDMMC_RESP1); + if (cmd->resp_type & MMC_RSP_136) { + cmd->response[1] = readl(priv->base + SDMMC_RESP2); + cmd->response[2] = readl(priv->base + SDMMC_RESP3); + cmd->response[3] = readl(priv->base + SDMMC_RESP4); + } + } + + return 0; +} + +static int stm32_sdmmc2_end_data(struct stm32_sdmmc2_priv *priv, + struct mmc_cmd *cmd, + struct mmc_data *data, + struct stm32_sdmmc2_ctx *ctx) +{ + u32 mask = SDMMC_STA_DCRCFAIL | SDMMC_STA_DTIMEOUT | + SDMMC_STA_IDMATE | SDMMC_STA_DATAEND; + u32 status; + + if (data->flags & MMC_DATA_READ) + mask |= SDMMC_STA_RXOVERR; + else + mask |= SDMMC_STA_TXUNDERR; + + status = readl(priv->base + SDMMC_STA); + while (!(status & mask)) + status = readl(priv->base + SDMMC_STA); + + /* + * Need invalidate the dcache again to avoid any + * cache-refill during the DMA operations (pre-fetching) + */ + if (data->flags & MMC_DATA_READ) + invalidate_dcache_range(ctx->cache_start, ctx->cache_end); + + if (status & SDMMC_STA_DCRCFAIL) { + debug("%s: error SDMMC_STA_DCRCFAIL (0x%x) for cmd %d\n", + __func__, status, cmd->cmdidx); + if (readl(priv->base + SDMMC_DCOUNT)) + ctx->dpsm_abort = true; + return -EILSEQ; + } + + if (status & SDMMC_STA_DTIMEOUT) { + debug("%s: error SDMMC_STA_DTIMEOUT (0x%x) for cmd %d\n", + __func__, status, cmd->cmdidx); + ctx->dpsm_abort = true; + return -ETIMEDOUT; + } + + if (status & SDMMC_STA_TXUNDERR) { + debug("%s: error SDMMC_STA_TXUNDERR (0x%x) for cmd %d\n", + __func__, status, cmd->cmdidx); + ctx->dpsm_abort = true; + return -EIO; + } + + if (status & SDMMC_STA_RXOVERR) { + debug("%s: error SDMMC_STA_RXOVERR (0x%x) for cmd %d\n", + __func__, status, cmd->cmdidx); + ctx->dpsm_abort = true; + return -EIO; + } + + if (status & SDMMC_STA_IDMATE) { + debug("%s: error SDMMC_STA_IDMATE (0x%x) for cmd %d\n", + __func__, status, cmd->cmdidx); + ctx->dpsm_abort = true; + return -EIO; + } + + return 0; +} + +static int stm32_sdmmc2_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + struct stm32_sdmmc2_priv *priv = dev_get_priv(dev); + struct stm32_sdmmc2_ctx ctx; + u32 cmdat = data ? SDMMC_CMD_CMDTRANS : 0; + int ret, retry = 3; + +retry_cmd: + ctx.data_length = 0; + ctx.dpsm_abort = false; + + if (data) { + ctx.data_length = data->blocks * data->blocksize; + stm32_sdmmc2_start_data(priv, data, &ctx); + } + + stm32_sdmmc2_start_cmd(priv, cmd, cmdat); + + debug("%s: send cmd %d data: 0x%x @ 0x%x\n", + __func__, cmd->cmdidx, + data ? ctx.data_length : 0, (unsigned int)data); + + ret = stm32_sdmmc2_end_cmd(priv, cmd, &ctx); + + if (data && !ret) + ret = stm32_sdmmc2_end_data(priv, cmd, data, &ctx); + + /* Clear flags */ + writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR); + if (data) + writel(0x0, priv->base + SDMMC_IDMACTRL); + + /* + * To stop Data Path State Machine, a stop_transmission command + * shall be send on cmd or data errors. + */ + if (ctx.dpsm_abort && (cmd->cmdidx != MMC_CMD_STOP_TRANSMISSION)) { + struct mmc_cmd stop_cmd; + + stop_cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; + stop_cmd.cmdarg = 0; + stop_cmd.resp_type = MMC_RSP_R1b; + + debug("%s: send STOP command to abort dpsm treatments\n", + __func__); + + stm32_sdmmc2_start_cmd(priv, &stop_cmd, SDMMC_CMD_CMDSTOP); + stm32_sdmmc2_end_cmd(priv, &stop_cmd, &ctx); + + writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR); + } + + if ((ret != -ETIMEDOUT) && (ret != 0) && retry) { + printf("%s: cmd %d failed, retrying ...\n", + __func__, cmd->cmdidx); + retry--; + goto retry_cmd; + } + + debug("%s: end for CMD %d, ret = %d\n", __func__, cmd->cmdidx, ret); + + return ret; +} + +static void stm32_sdmmc2_pwron(struct stm32_sdmmc2_priv *priv) +{ + /* Reset */ + reset_assert(&priv->reset_ctl); + udelay(2); + reset_deassert(&priv->reset_ctl); + + udelay(1000); + + /* Set Power State to ON */ + writel(SDMMC_POWER_PWRCTRL | priv->pwr_reg_msk, priv->base + SDMMC_POWER); + + /* + * 1ms: required power up waiting time before starting the + * SD initialization sequence + */ + udelay(1000); +} + +#define IS_RISING_EDGE(reg) (reg & SDMMC_CLKCR_NEGEDGE ? 0 : 1) +static int stm32_sdmmc2_set_ios(struct udevice *dev) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); + struct stm32_sdmmc2_priv *priv = dev_get_priv(dev); + struct stm32_sdmmc2_plat *plat = dev_get_platdata(dev); + struct mmc_config *cfg = &plat->cfg; + u32 desired = mmc->clock; + u32 sys_clock = clk_get_rate(&priv->clk); + u32 clk = 0; + + debug("%s: bus_with = %d, clock = %d\n", __func__, + mmc->bus_width, mmc->clock); + + if ((mmc->bus_width == 1) && (desired == cfg->f_min)) + stm32_sdmmc2_pwron(priv); + + /* + * clk_div = 0 => command and data generated on SDMMCCLK falling edge + * clk_div > 0 and NEGEDGE = 0 => command and data generated on + * SDMMCCLK rising edge + * clk_div > 0 and NEGEDGE = 1 => command and data generated on + * SDMMCCLK falling edge + */ + if (desired && ((sys_clock > desired) || + IS_RISING_EDGE(priv->clk_reg_msk))) { + clk = DIV_ROUND_UP(sys_clock, 2 * desired); + if (clk > SDMMC_CLKCR_CLKDIV_MAX) + clk = SDMMC_CLKCR_CLKDIV_MAX; + } + + if (mmc->bus_width == 4) + clk |= SDMMC_CLKCR_WIDBUS_4; + if (mmc->bus_width == 8) + clk |= SDMMC_CLKCR_WIDBUS_8; + + writel(clk | priv->clk_reg_msk, priv->base + SDMMC_CLKCR); + + return 0; +} + +static int stm32_sdmmc2_getcd(struct udevice *dev) +{ + struct stm32_sdmmc2_priv *priv = dev_get_priv(dev); + + debug("stm32_sdmmc2_getcd called\n"); + + if (dm_gpio_is_valid(&priv->cd_gpio)) + return dm_gpio_get_value(&priv->cd_gpio); + + return 1; +} + +static const struct dm_mmc_ops stm32_sdmmc2_ops = { + .send_cmd = stm32_sdmmc2_send_cmd, + .set_ios = stm32_sdmmc2_set_ios, + .get_cd = stm32_sdmmc2_getcd, +}; + +static int stm32_sdmmc2_probe(struct udevice *dev) +{ + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct stm32_sdmmc2_plat *plat = dev_get_platdata(dev); + struct stm32_sdmmc2_priv *priv = dev_get_priv(dev); + struct mmc_config *cfg = &plat->cfg; + int ret; + + priv->base = dev_read_addr(dev); + if (priv->base == FDT_ADDR_T_NONE) + return -EINVAL; + + if (dev_read_bool(dev, "st,negedge")) + priv->clk_reg_msk |= SDMMC_CLKCR_NEGEDGE; + if (dev_read_bool(dev, "st,dirpol")) + priv->pwr_reg_msk |= SDMMC_POWER_DIRPOL; + + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret) + return ret; + + ret = clk_enable(&priv->clk); + if (ret) + goto clk_free; + + ret = reset_get_by_index(dev, 0, &priv->reset_ctl); + if (ret) + goto clk_disable; + + gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, + GPIOD_IS_IN); + + cfg->f_min = 400000; + cfg->f_max = dev_read_u32_default(dev, "max-frequency", 52000000); + cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; + cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; + cfg->name = "STM32 SDMMC2"; + + cfg->host_caps = 0; + if (cfg->f_max > 25000000) + cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + + switch (dev_read_u32_default(dev, "bus-width", 1)) { + case 8: + cfg->host_caps |= MMC_MODE_8BIT; + case 4: + cfg->host_caps |= MMC_MODE_4BIT; + break; + case 1: + break; + default: + pr_err("invalid \"bus-width\" property, force to 1\n"); + } + + upriv->mmc = &plat->mmc; + + return 0; + +clk_disable: + clk_disable(&priv->clk); +clk_free: + clk_free(&priv->clk); + + return ret; +} + +int stm32_sdmmc_bind(struct udevice *dev) +{ + struct stm32_sdmmc2_plat *plat = dev_get_platdata(dev); + + return mmc_bind(dev, &plat->mmc, &plat->cfg); +} + +static const struct udevice_id stm32_sdmmc2_ids[] = { + { .compatible = "st,stm32-sdmmc2" }, + { } +}; + +U_BOOT_DRIVER(stm32_sdmmc2) = { + .name = "stm32_sdmmc2", + .id = UCLASS_MMC, + .of_match = stm32_sdmmc2_ids, + .ops = &stm32_sdmmc2_ops, + .probe = stm32_sdmmc2_probe, + .bind = stm32_sdmmc_bind, + .priv_auto_alloc_size = sizeof(struct stm32_sdmmc2_priv), + .platdata_auto_alloc_size = sizeof(struct stm32_sdmmc2_plat), +}; diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index 721b75fdda..0d1203cb76 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -14,6 +14,7 @@ #include <linux/dma-direction.h> #include <linux/io.h> #include <linux/sizes.h> +#include <power/regulator.h> #include <asm/unaligned.h> DECLARE_GLOBAL_DATA_PTR; @@ -132,8 +133,43 @@ struct uniphier_sd_priv { #define UNIPHIER_SD_CAP_NONREMOVABLE BIT(0) /* Nonremovable e.g. eMMC */ #define UNIPHIER_SD_CAP_DMA_INTERNAL BIT(1) /* have internal DMA engine */ #define UNIPHIER_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */ +#define UNIPHIER_SD_CAP_64BIT BIT(3) /* Controller is 64bit */ }; +static u64 uniphier_sd_readq(struct uniphier_sd_priv *priv, unsigned int reg) +{ + if (priv->caps & UNIPHIER_SD_CAP_64BIT) + return readq(priv->regbase + (reg << 1)); + else + return readq(priv->regbase + reg); +} + +static void uniphier_sd_writeq(struct uniphier_sd_priv *priv, + u64 val, unsigned int reg) +{ + if (priv->caps & UNIPHIER_SD_CAP_64BIT) + writeq(val, priv->regbase + (reg << 1)); + else + writeq(val, priv->regbase + reg); +} + +static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, unsigned int reg) +{ + if (priv->caps & UNIPHIER_SD_CAP_64BIT) + return readl(priv->regbase + (reg << 1)); + else + return readl(priv->regbase + reg); +} + +static void uniphier_sd_writel(struct uniphier_sd_priv *priv, + u32 val, unsigned int reg) +{ + if (priv->caps & UNIPHIER_SD_CAP_64BIT) + writel(val, priv->regbase + (reg << 1)); + else + writel(val, priv->regbase + reg); +} + static dma_addr_t __dma_map_single(void *ptr, size_t size, enum dma_data_direction dir) { @@ -157,7 +193,7 @@ static void __dma_unmap_single(dma_addr_t addr, size_t size, static int uniphier_sd_check_error(struct udevice *dev) { struct uniphier_sd_priv *priv = dev_get_priv(dev); - u32 info2 = readl(priv->regbase + UNIPHIER_SD_INFO2); + u32 info2 = uniphier_sd_readl(priv, UNIPHIER_SD_INFO2); if (info2 & UNIPHIER_SD_INFO2_ERR_RTO) { /* @@ -195,7 +231,7 @@ static int uniphier_sd_wait_for_irq(struct udevice *dev, unsigned int reg, long wait = 1000000; int ret; - while (!(readl(priv->regbase + reg) & flag)) { + while (!(uniphier_sd_readl(priv, reg) & flag)) { if (wait-- < 0) { dev_err(dev, "timeout\n"); return -ETIMEDOUT; @@ -211,7 +247,7 @@ static int uniphier_sd_wait_for_irq(struct udevice *dev, unsigned int reg, return 0; } -static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf, +static int uniphier_sd_pio_read_one_block(struct udevice *dev, char *pbuf, uint blocksize) { struct uniphier_sd_priv *priv = dev_get_priv(dev); @@ -227,22 +263,44 @@ static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf, * Clear the status flag _before_ read the buffer out because * UNIPHIER_SD_INFO2_BRE is edge-triggered, not level-triggered. */ - writel(0, priv->regbase + UNIPHIER_SD_INFO2); - - if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) { - for (i = 0; i < blocksize / 4; i++) - *(*pbuf)++ = readl(priv->regbase + UNIPHIER_SD_BUF); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2); + + if (priv->caps & UNIPHIER_SD_CAP_64BIT) { + u64 *buf = (u64 *)pbuf; + if (likely(IS_ALIGNED((uintptr_t)buf, 8))) { + for (i = 0; i < blocksize / 8; i++) { + *buf++ = uniphier_sd_readq(priv, + UNIPHIER_SD_BUF); + } + } else { + for (i = 0; i < blocksize / 8; i++) { + u64 data; + data = uniphier_sd_readq(priv, + UNIPHIER_SD_BUF); + put_unaligned(data, buf++); + } + } } else { - for (i = 0; i < blocksize / 4; i++) - put_unaligned(readl(priv->regbase + UNIPHIER_SD_BUF), - (*pbuf)++); + u32 *buf = (u32 *)pbuf; + if (likely(IS_ALIGNED((uintptr_t)buf, 4))) { + for (i = 0; i < blocksize / 4; i++) { + *buf++ = uniphier_sd_readl(priv, + UNIPHIER_SD_BUF); + } + } else { + for (i = 0; i < blocksize / 4; i++) { + u32 data; + data = uniphier_sd_readl(priv, UNIPHIER_SD_BUF); + put_unaligned(data, buf++); + } + } } return 0; } static int uniphier_sd_pio_write_one_block(struct udevice *dev, - const u32 **pbuf, uint blocksize) + const char *pbuf, uint blocksize) { struct uniphier_sd_priv *priv = dev_get_priv(dev); int i, ret; @@ -253,15 +311,36 @@ static int uniphier_sd_pio_write_one_block(struct udevice *dev, if (ret) return ret; - writel(0, priv->regbase + UNIPHIER_SD_INFO2); - - if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) { - for (i = 0; i < blocksize / 4; i++) - writel(*(*pbuf)++, priv->regbase + UNIPHIER_SD_BUF); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2); + + if (priv->caps & UNIPHIER_SD_CAP_64BIT) { + const u64 *buf = (const u64 *)pbuf; + if (likely(IS_ALIGNED((uintptr_t)buf, 8))) { + for (i = 0; i < blocksize / 8; i++) { + uniphier_sd_writeq(priv, *buf++, + UNIPHIER_SD_BUF); + } + } else { + for (i = 0; i < blocksize / 8; i++) { + u64 data = get_unaligned(buf++); + uniphier_sd_writeq(priv, data, + UNIPHIER_SD_BUF); + } + } } else { - for (i = 0; i < blocksize / 4; i++) - writel(get_unaligned((*pbuf)++), - priv->regbase + UNIPHIER_SD_BUF); + const u32 *buf = (const u32 *)pbuf; + if (likely(IS_ALIGNED((uintptr_t)buf, 4))) { + for (i = 0; i < blocksize / 4; i++) { + uniphier_sd_writel(priv, *buf++, + UNIPHIER_SD_BUF); + } + } else { + for (i = 0; i < blocksize / 4; i++) { + u32 data = get_unaligned(buf++); + uniphier_sd_writel(priv, data, + UNIPHIER_SD_BUF); + } + } } return 0; @@ -269,19 +348,24 @@ static int uniphier_sd_pio_write_one_block(struct udevice *dev, static int uniphier_sd_pio_xfer(struct udevice *dev, struct mmc_data *data) { - u32 *dest = (u32 *)data->dest; - const u32 *src = (const u32 *)data->src; + const char *src = data->src; + char *dest = data->dest; int i, ret; for (i = 0; i < data->blocks; i++) { if (data->flags & MMC_DATA_READ) - ret = uniphier_sd_pio_read_one_block(dev, &dest, + ret = uniphier_sd_pio_read_one_block(dev, dest, data->blocksize); else - ret = uniphier_sd_pio_write_one_block(dev, &src, + ret = uniphier_sd_pio_write_one_block(dev, src, data->blocksize); if (ret) return ret; + + if (data->flags & MMC_DATA_READ) + dest += data->blocksize; + else + src += data->blocksize; } return 0; @@ -292,22 +376,22 @@ static void uniphier_sd_dma_start(struct uniphier_sd_priv *priv, { u32 tmp; - writel(0, priv->regbase + UNIPHIER_SD_DMA_INFO1); - writel(0, priv->regbase + UNIPHIER_SD_DMA_INFO2); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_DMA_INFO1); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_DMA_INFO2); /* enable DMA */ - tmp = readl(priv->regbase + UNIPHIER_SD_EXTMODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_EXTMODE); tmp |= UNIPHIER_SD_EXTMODE_DMA_EN; - writel(tmp, priv->regbase + UNIPHIER_SD_EXTMODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_EXTMODE); - writel(dma_addr & U32_MAX, priv->regbase + UNIPHIER_SD_DMA_ADDR_L); + uniphier_sd_writel(priv, dma_addr & U32_MAX, UNIPHIER_SD_DMA_ADDR_L); /* suppress the warning "right shift count >= width of type" */ dma_addr >>= min_t(int, 32, 8 * sizeof(dma_addr)); - writel(dma_addr & U32_MAX, priv->regbase + UNIPHIER_SD_DMA_ADDR_H); + uniphier_sd_writel(priv, dma_addr & U32_MAX, UNIPHIER_SD_DMA_ADDR_H); - writel(UNIPHIER_SD_DMA_CTL_START, priv->regbase + UNIPHIER_SD_DMA_CTL); + uniphier_sd_writel(priv, UNIPHIER_SD_DMA_CTL_START, UNIPHIER_SD_DMA_CTL); } static int uniphier_sd_dma_wait_for_irq(struct udevice *dev, u32 flag, @@ -316,7 +400,7 @@ static int uniphier_sd_dma_wait_for_irq(struct udevice *dev, u32 flag, struct uniphier_sd_priv *priv = dev_get_priv(dev); long wait = 1000000 + 10 * blocks; - while (!(readl(priv->regbase + UNIPHIER_SD_DMA_INFO1) & flag)) { + while (!(uniphier_sd_readl(priv, UNIPHIER_SD_DMA_INFO1) & flag)) { if (wait-- < 0) { dev_err(dev, "timeout during DMA\n"); return -ETIMEDOUT; @@ -325,7 +409,7 @@ static int uniphier_sd_dma_wait_for_irq(struct udevice *dev, u32 flag, udelay(10); } - if (readl(priv->regbase + UNIPHIER_SD_DMA_INFO2)) { + if (uniphier_sd_readl(priv, UNIPHIER_SD_DMA_INFO2)) { dev_err(dev, "error during DMA\n"); return -EIO; } @@ -343,7 +427,7 @@ static int uniphier_sd_dma_xfer(struct udevice *dev, struct mmc_data *data) u32 poll_flag, tmp; int ret; - tmp = readl(priv->regbase + UNIPHIER_SD_DMA_MODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_DMA_MODE); if (data->flags & MMC_DATA_READ) { buf = data->dest; @@ -357,7 +441,7 @@ static int uniphier_sd_dma_xfer(struct udevice *dev, struct mmc_data *data) tmp &= ~UNIPHIER_SD_DMA_MODE_DIR_RD; } - writel(tmp, priv->regbase + UNIPHIER_SD_DMA_MODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_DMA_MODE); dma_addr = __dma_map_single(buf, len, dir); @@ -396,27 +480,27 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, int ret; u32 tmp; - if (readl(priv->regbase + UNIPHIER_SD_INFO2) & UNIPHIER_SD_INFO2_CBSY) { + if (uniphier_sd_readl(priv, UNIPHIER_SD_INFO2) & UNIPHIER_SD_INFO2_CBSY) { dev_err(dev, "command busy\n"); return -EBUSY; } /* clear all status flags */ - writel(0, priv->regbase + UNIPHIER_SD_INFO1); - writel(0, priv->regbase + UNIPHIER_SD_INFO2); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO1); + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2); /* disable DMA once */ - tmp = readl(priv->regbase + UNIPHIER_SD_EXTMODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_EXTMODE); tmp &= ~UNIPHIER_SD_EXTMODE_DMA_EN; - writel(tmp, priv->regbase + UNIPHIER_SD_EXTMODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_EXTMODE); - writel(cmd->cmdarg, priv->regbase + UNIPHIER_SD_ARG); + uniphier_sd_writel(priv, cmd->cmdarg, UNIPHIER_SD_ARG); tmp = cmd->cmdidx; if (data) { - writel(data->blocksize, priv->regbase + UNIPHIER_SD_SIZE); - writel(data->blocks, priv->regbase + UNIPHIER_SD_SECCNT); + uniphier_sd_writel(priv, data->blocksize, UNIPHIER_SD_SIZE); + uniphier_sd_writel(priv, data->blocks, UNIPHIER_SD_SECCNT); /* Do not send CMD12 automatically */ tmp |= UNIPHIER_SD_CMD_NOSTOP | UNIPHIER_SD_CMD_DATA; @@ -457,7 +541,7 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, dev_dbg(dev, "sending CMD%d (SD_CMD=%08x, SD_ARG=%08x)\n", cmd->cmdidx, tmp, cmd->cmdarg); - writel(tmp, priv->regbase + UNIPHIER_SD_CMD); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_CMD); ret = uniphier_sd_wait_for_irq(dev, UNIPHIER_SD_INFO1, UNIPHIER_SD_INFO1_RSP); @@ -465,10 +549,10 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, return ret; if (cmd->resp_type & MMC_RSP_136) { - u32 rsp_127_104 = readl(priv->regbase + UNIPHIER_SD_RSP76); - u32 rsp_103_72 = readl(priv->regbase + UNIPHIER_SD_RSP54); - u32 rsp_71_40 = readl(priv->regbase + UNIPHIER_SD_RSP32); - u32 rsp_39_8 = readl(priv->regbase + UNIPHIER_SD_RSP10); + u32 rsp_127_104 = uniphier_sd_readl(priv, UNIPHIER_SD_RSP76); + u32 rsp_103_72 = uniphier_sd_readl(priv, UNIPHIER_SD_RSP54); + u32 rsp_71_40 = uniphier_sd_readl(priv, UNIPHIER_SD_RSP32); + u32 rsp_39_8 = uniphier_sd_readl(priv, UNIPHIER_SD_RSP10); cmd->response[0] = ((rsp_127_104 & 0x00ffffff) << 8) | ((rsp_103_72 & 0xff000000) >> 24); @@ -479,7 +563,7 @@ static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, cmd->response[3] = (rsp_39_8 & 0xffffff) << 8; } else { /* bit 39-8 */ - cmd->response[0] = readl(priv->regbase + UNIPHIER_SD_RSP10); + cmd->response[0] = uniphier_sd_readl(priv, UNIPHIER_SD_RSP10); } if (data) { @@ -518,10 +602,10 @@ static int uniphier_sd_set_bus_width(struct uniphier_sd_priv *priv, return -EINVAL; } - tmp = readl(priv->regbase + UNIPHIER_SD_OPTION); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_OPTION); tmp &= ~UNIPHIER_SD_OPTION_WIDTH_MASK; tmp |= val; - writel(tmp, priv->regbase + UNIPHIER_SD_OPTION); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_OPTION); return 0; } @@ -531,12 +615,12 @@ static void uniphier_sd_set_ddr_mode(struct uniphier_sd_priv *priv, { u32 tmp; - tmp = readl(priv->regbase + UNIPHIER_SD_IF_MODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_IF_MODE); if (mmc->ddr_mode) tmp |= UNIPHIER_SD_IF_MODE_DDR; else tmp &= ~UNIPHIER_SD_IF_MODE_DDR; - writel(tmp, priv->regbase + UNIPHIER_SD_IF_MODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_IF_MODE); } static void uniphier_sd_set_clk_rate(struct uniphier_sd_priv *priv, @@ -573,21 +657,21 @@ static void uniphier_sd_set_clk_rate(struct uniphier_sd_priv *priv, else val = UNIPHIER_SD_CLKCTL_DIV1024; - tmp = readl(priv->regbase + UNIPHIER_SD_CLKCTL); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_CLKCTL); if (tmp & UNIPHIER_SD_CLKCTL_SCLKEN && (tmp & UNIPHIER_SD_CLKCTL_DIV_MASK) == val) return; /* stop the clock before changing its rate to avoid a glitch signal */ tmp &= ~UNIPHIER_SD_CLKCTL_SCLKEN; - writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_CLKCTL); tmp &= ~UNIPHIER_SD_CLKCTL_DIV_MASK; tmp |= val | UNIPHIER_SD_CLKCTL_OFFEN; - writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_CLKCTL); tmp |= UNIPHIER_SD_CLKCTL_SCLKEN; - writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_CLKCTL); udelay(1000); } @@ -617,7 +701,7 @@ static int uniphier_sd_get_cd(struct udevice *dev) if (priv->caps & UNIPHIER_SD_CAP_NONREMOVABLE) return 1; - return !!(readl(priv->regbase + UNIPHIER_SD_INFO1) & + return !!(uniphier_sd_readl(priv, UNIPHIER_SD_INFO1) & UNIPHIER_SD_INFO1_CD); } @@ -632,28 +716,28 @@ static void uniphier_sd_host_init(struct uniphier_sd_priv *priv) u32 tmp; /* soft reset of the host */ - tmp = readl(priv->regbase + UNIPHIER_SD_SOFT_RST); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_SOFT_RST); tmp &= ~UNIPHIER_SD_SOFT_RST_RSTX; - writel(tmp, priv->regbase + UNIPHIER_SD_SOFT_RST); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_SOFT_RST); tmp |= UNIPHIER_SD_SOFT_RST_RSTX; - writel(tmp, priv->regbase + UNIPHIER_SD_SOFT_RST); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_SOFT_RST); /* FIXME: implement eMMC hw_reset */ - writel(UNIPHIER_SD_STOP_SEC, priv->regbase + UNIPHIER_SD_STOP); + uniphier_sd_writel(priv, UNIPHIER_SD_STOP_SEC, UNIPHIER_SD_STOP); /* * Connected to 32bit AXI. * This register dropped backward compatibility at version 0x10. * Write an appropriate value depending on the IP version. */ - writel(priv->version >= 0x10 ? 0x00000101 : 0x00000000, - priv->regbase + UNIPHIER_SD_HOST_MODE); + uniphier_sd_writel(priv, priv->version >= 0x10 ? 0x00000101 : 0x00000000, + UNIPHIER_SD_HOST_MODE); if (priv->caps & UNIPHIER_SD_CAP_DMA_INTERNAL) { - tmp = readl(priv->regbase + UNIPHIER_SD_DMA_MODE); + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_DMA_MODE); tmp |= UNIPHIER_SD_DMA_MODE_ADDR_INC; - writel(tmp, priv->regbase + UNIPHIER_SD_DMA_MODE); + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_DMA_MODE); } } @@ -669,9 +753,13 @@ static int uniphier_sd_probe(struct udevice *dev) struct uniphier_sd_plat *plat = dev_get_platdata(dev); struct uniphier_sd_priv *priv = dev_get_priv(dev); struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + const u32 quirks = dev_get_driver_data(dev); fdt_addr_t base; struct clk clk; int ret; +#ifdef CONFIG_DM_REGULATOR + struct udevice *vqmmc_dev; +#endif base = devfdt_get_addr(dev); if (base == FDT_ADDR_T_NONE) @@ -681,6 +769,15 @@ static int uniphier_sd_probe(struct udevice *dev) if (!priv->regbase) return -ENOMEM; +#ifdef CONFIG_DM_REGULATOR + ret = device_get_supply_regulator(dev, "vqmmc-supply", &vqmmc_dev); + if (!ret) { + /* Set the regulator to 3.3V until we support 1.8V modes */ + regulator_set_value(vqmmc_dev, 3300000); + regulator_set_enable(vqmmc_dev, true); + } +#endif + ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) { dev_err(dev, "failed to get host clock\n"); @@ -720,18 +817,22 @@ static int uniphier_sd_probe(struct udevice *dev) return -EINVAL; } + if (quirks) { + priv->caps = quirks; + } else { + priv->version = uniphier_sd_readl(priv, UNIPHIER_SD_VERSION) & + UNIPHIER_SD_VERSION_IP; + dev_dbg(dev, "version %x\n", priv->version); + if (priv->version >= 0x10) { + priv->caps |= UNIPHIER_SD_CAP_DMA_INTERNAL; + priv->caps |= UNIPHIER_SD_CAP_DIV1024; + } + } + if (fdt_get_property(gd->fdt_blob, dev_of_offset(dev), "non-removable", NULL)) priv->caps |= UNIPHIER_SD_CAP_NONREMOVABLE; - priv->version = readl(priv->regbase + UNIPHIER_SD_VERSION) & - UNIPHIER_SD_VERSION_IP; - dev_dbg(dev, "version %x\n", priv->version); - if (priv->version >= 0x10) { - priv->caps |= UNIPHIER_SD_CAP_DMA_INTERNAL; - priv->caps |= UNIPHIER_SD_CAP_DIV1024; - } - uniphier_sd_host_init(priv); plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34; @@ -746,7 +847,9 @@ static int uniphier_sd_probe(struct udevice *dev) } static const struct udevice_id uniphier_sd_match[] = { - { .compatible = "socionext,uniphier-sdhc" }, + { .compatible = "renesas,sdhi-r8a7795", .data = UNIPHIER_SD_CAP_64BIT }, + { .compatible = "renesas,sdhi-r8a7796", .data = UNIPHIER_SD_CAP_64BIT }, + { .compatible = "socionext,uniphier-sdhc", .data = 0 }, { /* sentinel */ } }; diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c index 2b7cb7f6b6..490a01f9bd 100644 --- a/drivers/mmc/xenon_sdhci.c +++ b/drivers/mmc/xenon_sdhci.c @@ -159,7 +159,7 @@ static int xenon_mmc_phy_init(struct sdhci_host *host) } if (time <= 0) { - error("Failed to enable MMC internal clock in time\n"); + pr_err("Failed to enable MMC internal clock in time\n"); return -ETIMEDOUT; } @@ -187,7 +187,7 @@ static int xenon_mmc_phy_init(struct sdhci_host *host) } if (time <= 0) { - error("Failed to init MMC PHY in time\n"); + pr_err("Failed to init MMC PHY in time\n"); return -ETIMEDOUT; } diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index bd680a784f..20c0d0af44 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -12,10 +12,8 @@ obj-$(CONFIG_MTD) += mtd-uclass.o obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o -obj-$(CONFIG_HAS_DATAFLASH) += at45.o obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o -obj-$(CONFIG_HAS_DATAFLASH) += dataflash.o obj-$(CONFIG_FTSMC020) += ftsmc020.o obj-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o diff --git a/drivers/mtd/at45.c b/drivers/mtd/at45.c deleted file mode 100644 index 2f49be38b8..0000000000 --- a/drivers/mtd/at45.c +++ /dev/null @@ -1,545 +0,0 @@ -/* Driver for ATMEL DataFlash support - * Author : Hamid Ikdoumi (Atmel) - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> -#include <common.h> -#include <dataflash.h> - -/* - * spi.c API - */ -extern unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc); -extern void AT91F_SpiEnable(int cs); - -#define AT91C_TIMEOUT_WRDY 200000 - -/*----------------------------------------------------------------------*/ -/* \fn AT91F_DataFlashSendCommand */ -/* \brief Generic function to send a command to the dataflash */ -/*----------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash, - unsigned char OpCode, - unsigned int CmdSize, - unsigned int DataflashAddress) -{ - unsigned int adr; - - if ((pDataFlash->pDataFlashDesc->state) != IDLE) - return DATAFLASH_BUSY; - - /* process the address to obtain page address and byte address */ - adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << - pDataFlash->pDevice->page_offset) + - (DataflashAddress % (pDataFlash->pDevice->pages_size)); - - /* fill the command buffer */ - pDataFlash->pDataFlashDesc->command[0] = OpCode; - if (pDataFlash->pDevice->pages_number >= 16384) { - pDataFlash->pDataFlashDesc->command[1] = - (unsigned char)((adr & 0x0F000000) >> 24); - pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)((adr & 0x00FF0000) >> 16); - pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)((adr & 0x0000FF00) >> 8); - pDataFlash->pDataFlashDesc->command[4] = - (unsigned char)(adr & 0x000000FF); - } else { - pDataFlash->pDataFlashDesc->command[1] = - (unsigned char)((adr & 0x00FF0000) >> 16); - pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)((adr & 0x0000FF00) >> 8); - pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)(adr & 0x000000FF); - pDataFlash->pDataFlashDesc->command[4] = 0; - } - pDataFlash->pDataFlashDesc->command[5] = 0; - pDataFlash->pDataFlashDesc->command[6] = 0; - pDataFlash->pDataFlashDesc->command[7] = 0; - - /* Initialize the SpiData structure for the spi write fuction */ - pDataFlash->pDataFlashDesc->tx_cmd_pt = - pDataFlash->pDataFlashDesc->command; - pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize; - pDataFlash->pDataFlashDesc->rx_cmd_pt = - pDataFlash->pDataFlashDesc->command; - pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize; - - /* send the command and read the data */ - return AT91F_SpiWrite(pDataFlash->pDataFlashDesc); -} - -/*----------------------------------------------------------------------*/ -/* \fn AT91F_DataFlashGetStatus */ -/* \brief Read the status register of the dataflash */ -/*----------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc) -{ - AT91S_DataFlashStatus status; - - /* if a transfert is in progress ==> return 0 */ - if ((pDesc->state) != IDLE) - return DATAFLASH_BUSY; - - /* first send the read status command (D7H) */ - pDesc->command[0] = DB_STATUS; - pDesc->command[1] = 0; - - pDesc->DataFlash_state = GET_STATUS; - pDesc->tx_data_size = 0; /* Transmit the command */ - /* and receive response */ - pDesc->tx_cmd_pt = pDesc->command; - pDesc->rx_cmd_pt = pDesc->command; - pDesc->rx_cmd_size = 2; - pDesc->tx_cmd_size = 2; - status = AT91F_SpiWrite(pDesc); - - pDesc->DataFlash_state = *((unsigned char *)(pDesc->rx_cmd_pt) + 1); - - return status; -} - -/*----------------------------------------------------------------------*/ -/* \fn AT91F_DataFlashWaitReady */ -/* \brief wait for dataflash ready (bit7 of the status register == 1) */ -/*----------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc - pDataFlashDesc, - unsigned int timeout) -{ - pDataFlashDesc->DataFlash_state = IDLE; - - do { - AT91F_DataFlashGetStatus(pDataFlashDesc); - timeout--; - } while (((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && - (timeout > 0)); - - if ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) - return DATAFLASH_ERROR; - - return DATAFLASH_OK; -} - -/*--------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataFlashContinuousRead */ -/* Object : Continuous stream Read */ -/* Input Parameters : DataFlash Service */ -/* : <src> = dataflash address */ -/* : <*dataBuffer> = data buffer pointer */ -/* : <sizeToRead> = data buffer size */ -/* Return value : State of the dataflash */ -/*--------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashContinuousRead( - AT91PS_DataFlash pDataFlash, - int src, - unsigned char *dataBuffer, - int sizeToRead) -{ - AT91S_DataFlashStatus status; - /* Test the size to read in the device */ - if ((src + sizeToRead) > - (pDataFlash->pDevice->pages_size * - (pDataFlash->pDevice->pages_number))) - return DATAFLASH_MEMORY_OVERFLOW; - - pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; - pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead; - pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer; - pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead; - - status = AT91F_DataFlashSendCommand( - pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); - /* Send the command to the dataflash */ - return (status); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataFlashPagePgmBuf */ -/* Object : Main memory page program thru buffer 1 or buffer 2 */ -/* Input Parameters : DataFlash Service */ -/* : <*src> = Source buffer */ -/* : <dest> = dataflash destination address */ -/* : <SizeToWrite> = data buffer size */ -/* Return value : State of the dataflash */ -/*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int SizeToWrite) -{ - int cmdsize; - pDataFlash->pDataFlashDesc->tx_data_pt = src; - pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite; - pDataFlash->pDataFlashDesc->rx_data_pt = src; - pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite; - - cmdsize = 4; - /* Send the command to the dataflash */ - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - return (AT91F_DataFlashSendCommand( - pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest)); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_MainMemoryToBufferTransfert */ -/* Object : Read a page in the SRAM Buffer 1 or 2 */ -/* Input Parameters : DataFlash Service */ -/* : Page concerned */ -/* : */ -/* Return value : State of the dataflash */ -/*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( - AT91PS_DataFlash - pDataFlash, - unsigned char - BufferCommand, - unsigned int page) -{ - int cmdsize; - /* Test if the buffer command is legal */ - if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && - (BufferCommand != DB_PAGE_2_BUF2_TRF)) { - return DATAFLASH_BAD_COMMAND; - } - - /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; - cmdsize = 4; - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - return (AT91F_DataFlashSendCommand( - pDataFlash, BufferCommand, cmdsize, - page * pDataFlash->pDevice->pages_size)); -} - -/*-------------------------------------------------------------------------- */ -/* Function Name : AT91F_DataFlashWriteBuffer */ -/* Object : Write data to the internal sram buffer 1 or 2 */ -/* Input Parameters : DataFlash Service */ -/* : <BufferCommand> = command to write buffer1 or 2 */ -/* : <*dataBuffer> = data buffer to write */ -/* : <bufferAddress> = address in the internal buffer */ -/* : <SizeToWrite> = data buffer size */ -/* Return value : State of the dataflash */ -/*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer( - AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned char *dataBuffer, - unsigned int bufferAddress, - int SizeToWrite) -{ - int cmdsize; - /* Test if the buffer command is legal */ - if ((BufferCommand != DB_BUF1_WRITE) && - (BufferCommand != DB_BUF2_WRITE)) { - return DATAFLASH_BAD_COMMAND; - } - - /* buffer address must be lower than page size */ - if (bufferAddress > pDataFlash->pDevice->pages_size) - return DATAFLASH_BAD_ADDRESS; - - if ((pDataFlash->pDataFlashDesc->state) != IDLE) - return DATAFLASH_BUSY; - - /* Send first Write Command */ - pDataFlash->pDataFlashDesc->command[0] = BufferCommand; - pDataFlash->pDataFlashDesc->command[1] = 0; - if (pDataFlash->pDevice->pages_number >= 16384) { - pDataFlash->pDataFlashDesc->command[2] = 0; - pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)(((unsigned int)(bufferAddress & - pDataFlash->pDevice-> - byte_mask)) >> 8); - pDataFlash->pDataFlashDesc->command[4] = - (unsigned char)((unsigned int)bufferAddress & 0x00FF); - cmdsize = 5; - } else { - pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)(((unsigned int)(bufferAddress & - pDataFlash->pDevice-> - byte_mask)) >> 8); - pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)((unsigned int)bufferAddress & 0x00FF); - pDataFlash->pDataFlashDesc->command[4] = 0; - cmdsize = 4; - } - - pDataFlash->pDataFlashDesc->tx_cmd_pt = - pDataFlash->pDataFlashDesc->command; - pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize; - pDataFlash->pDataFlashDesc->rx_cmd_pt = - pDataFlash->pDataFlashDesc->command; - pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize; - - pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; - pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer; - pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite; - pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite; - - return AT91F_SpiWrite(pDataFlash->pDataFlashDesc); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_PageErase */ -/* Object : Erase a page */ -/* Input Parameters : DataFlash Service */ -/* : Page concerned */ -/* : */ -/* Return value : State of the dataflash */ -/*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_PageErase( - AT91PS_DataFlash pDataFlash, - unsigned int page) -{ - int cmdsize; - /* Test if the buffer command is legal */ - /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; - - cmdsize = 4; - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, - DB_PAGE_ERASE, cmdsize, - page * pDataFlash->pDevice->pages_size)); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_BlockErase */ -/* Object : Erase a Block */ -/* Input Parameters : DataFlash Service */ -/* : Page concerned */ -/* : */ -/* Return value : State of the dataflash */ -/*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_BlockErase( - AT91PS_DataFlash pDataFlash, - unsigned int block) -{ - int cmdsize; - /* Test if the buffer command is legal */ - /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; - cmdsize = 4; - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, DB_BLOCK_ERASE, cmdsize, - block * 8 * - pDataFlash->pDevice->pages_size)); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_WriteBufferToMain */ -/* Object : Write buffer to the main memory */ -/* Input Parameters : DataFlash Service */ -/* : <BufferCommand> = command to send to buffer1 or buffer2 */ -/* : <dest> = main memory address */ -/* Return value : State of the dataflash */ -/*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int dest) -{ - int cmdsize; - /* Test if the buffer command is correct */ - if ((BufferCommand != DB_BUF1_PAGE_PGM) && - (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) && - (BufferCommand != DB_BUF2_PAGE_PGM) && - (BufferCommand != DB_BUF2_PAGE_ERASE_PGM)) - return DATAFLASH_BAD_COMMAND; - - /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; - - cmdsize = 4; - if (pDataFlash->pDevice->pages_number >= 16384) - cmdsize = 5; - /* Send the command to the dataflash */ - return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, - cmdsize, dest)); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_PartialPageWrite */ -/* Object : Erase partielly a page */ -/* Input Parameters : <page> = page number */ -/* : <AdrInpage> = adr to begin the fading */ -/* : <length> = Number of bytes to erase */ -/*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int size) -{ - unsigned int page; - unsigned int AdrInPage; - - page = dest / (pDataFlash->pDevice->pages_size); - AdrInPage = dest % (pDataFlash->pDevice->pages_size); - - /* Read the contents of the page in the Sram Buffer */ - AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page); - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); - /*Update the SRAM buffer */ - AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, - AdrInPage, size); - - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); - - /* Erase page if a 128 Mbits device */ - if (pDataFlash->pDevice->pages_number >= 16384) { - AT91F_PageErase(pDataFlash, page); - /* Rewrite the modified Sram Buffer in the main memory */ - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); - } - - /* Rewrite the modified Sram Buffer in the main memory */ - return (AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, - (page * - pDataFlash->pDevice->pages_size))); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataFlashWrite */ -/* Object : */ -/* Input Parameters : <*src> = Source buffer */ -/* : <dest> = dataflash adress */ -/* : <size> = data buffer size */ -/*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, - unsigned char *src, - int dest, int size) -{ - unsigned int length; - unsigned int page; - unsigned int status; - - AT91F_SpiEnable(pDataFlash->pDevice->cs); - - if ((dest + size) > (pDataFlash->pDevice->pages_size * - (pDataFlash->pDevice->pages_number))) - return DATAFLASH_MEMORY_OVERFLOW; - - /* If destination does not fit a page start address */ - if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0) { - length = - pDataFlash->pDevice->pages_size - - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size))); - - if (size < length) - length = size; - - if (!AT91F_PartialPageWrite(pDataFlash, src, dest, length)) - return DATAFLASH_ERROR; - - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); - - /* Update size, source and destination pointers */ - size -= length; - dest += length; - src += length; - } - - while ((size - pDataFlash->pDevice->pages_size) >= 0) { - /* program dataflash page */ - page = (unsigned int)dest / (pDataFlash->pDevice->pages_size); - - status = AT91F_DataFlashWriteBuffer(pDataFlash, - DB_BUF1_WRITE, src, 0, - pDataFlash->pDevice-> - pages_size); - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); - - status = AT91F_PageErase(pDataFlash, page); - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); - if (!status) - return DATAFLASH_ERROR; - - status = AT91F_WriteBufferToMain(pDataFlash, - DB_BUF1_PAGE_PGM, dest); - if (!status) - return DATAFLASH_ERROR; - - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); - - /* Update size, source and destination pointers */ - size -= pDataFlash->pDevice->pages_size; - dest += pDataFlash->pDevice->pages_size; - src += pDataFlash->pDevice->pages_size; - } - - /* If still some bytes to read */ - if (size > 0) { - /* program dataflash page */ - if (!AT91F_PartialPageWrite(pDataFlash, src, dest, size)) - return DATAFLASH_ERROR; - - AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); - } - return DATAFLASH_OK; -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataFlashRead */ -/* Object : Read a block in dataflash */ -/* Input Parameters : */ -/* Return value : */ -/*---------------------------------------------------------------------------*/ -int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash, - unsigned long addr, unsigned long size, char *buffer) -{ - unsigned long SizeToRead; - - AT91F_SpiEnable(pDataFlash->pDevice->cs); - - if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) - return -1; - - while (size) { - SizeToRead = (size < 0x8000) ? size : 0x8000; - - if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY) != - DATAFLASH_OK) - return -1; - - if (AT91F_DataFlashContinuousRead(pDataFlash, addr, - (uchar *) buffer, - SizeToRead) != DATAFLASH_OK) - return -1; - - size -= SizeToRead; - addr += SizeToRead; - buffer += SizeToRead; - } - - return DATAFLASH_OK; -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataflashProbe */ -/* Object : */ -/* Input Parameters : */ -/* Return value : Dataflash status register */ -/*---------------------------------------------------------------------------*/ -int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc) -{ - AT91F_SpiEnable(cs); - AT91F_DataFlashGetStatus(pDesc); - return ((pDesc->command[1] == 0xFF) ? 0 : pDesc->command[1] & 0x3C); -} diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index f3bb72788a..8a5babea7b 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -111,11 +111,9 @@ static void cfi_flash_init_dm(void) } } -static phys_addr_t cfi_flash_base[CFI_MAX_FLASH_BANKS]; - phys_addr_t cfi_flash_bank_addr(int i) { - return cfi_flash_base[i]; + return flash_info[i].base; } #else __weak phys_addr_t cfi_flash_bank_addr(int i) @@ -546,7 +544,16 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect) #ifdef CONFIG_FLASH_CFI_LEGACY case CFI_CMDSET_AMD_LEGACY: #endif - retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); + if (info->sr_supported) { + flash_write_cmd (info, sect, info->addr_unlock1, + FLASH_CMD_READ_STATUS); + retval = !flash_isset (info, sect, 0, + FLASH_STATUS_DONE); + } else { + retval = flash_toggle (info, sect, 0, + AMD_STATUS_TOGGLE); + } + break; default: retval = 0; @@ -1687,6 +1694,7 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) { ushort bankId = 0; uchar manuId; + uchar lsbits; flash_write_cmd(info, 0, 0, AMD_CMD_RESET); flash_unlock_seq(info, 0); @@ -1702,6 +1710,9 @@ static void cmdset_amd_read_jedec_ids(flash_info_t *info) } info->manufacturer_id = manuId; + lsbits = flash_read_uchar(info, FLASH_OFFSET_LOWER_SW_BITS); + info->sr_supported = lsbits & BIT(0); + switch (info->chipwidth){ case FLASH_CFI_8BIT: info->device_id = flash_read_uchar (info, @@ -2458,10 +2469,12 @@ static int cfi_flash_probe(struct udevice *dev) while (idx < len) { addr = fdt_translate_address((void *)blob, node, cell + idx); - cfi_flash_base[cfi_flash_num_flash_banks++] = addr; + flash_info[cfi_flash_num_flash_banks].dev = dev; + flash_info[cfi_flash_num_flash_banks].base = addr; + cfi_flash_num_flash_banks++; idx += addrc + sizec; } - gd->bd->bi_flashstart = cfi_flash_base[0]; + gd->bd->bi_flashstart = flash_info[0].base; return 0; } diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c deleted file mode 100644 index e961f518b0..0000000000 --- a/drivers/mtd/dataflash.c +++ /dev/null @@ -1,448 +0,0 @@ -/* - * LowLevel function for ATMEL DataFlash support - * Author : Hamid Ikdoumi (Atmel) - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <config.h> -#include <asm/hardware.h> -#include <dataflash.h> - -static AT91S_DataFlash DataFlashInst; - -extern void AT91F_SpiInit (void); -extern int AT91F_DataflashProbe (int i, AT91PS_DataflashDesc pDesc); -extern int AT91F_DataFlashRead (AT91PS_DataFlash pDataFlash, - unsigned long addr, - unsigned long size, char *buffer); -extern int AT91F_DataFlashWrite( AT91PS_DataFlash pDataFlash, - unsigned char *src, - int dest, - int size ); - -int AT91F_DataflashInit (void) -{ - int i, j; - int dfcode; - int part; - int found[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - unsigned char protected; - - AT91F_SpiInit (); - - for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { - found[i] = 0; - dataflash_info[i].Desc.state = IDLE; - dataflash_info[i].id = 0; - dataflash_info[i].Device.pages_number = 0; - dfcode = AT91F_DataflashProbe (cs[i].cs, - &dataflash_info[i].Desc); - - switch (dfcode) { - case AT45DB021: - dataflash_info[i].Device.pages_number = 1024; - dataflash_info[i].Device.pages_size = 264; - dataflash_info[i].Device.page_offset = 9; - dataflash_info[i].Device.byte_mask = 0x300; - dataflash_info[i].Device.cs = cs[i].cs; - dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i].addr; - dataflash_info[i].id = dfcode; - found[i] += dfcode; - break; - - case AT45DB081: - dataflash_info[i].Device.pages_number = 4096; - dataflash_info[i].Device.pages_size = 264; - dataflash_info[i].Device.page_offset = 9; - dataflash_info[i].Device.byte_mask = 0x300; - dataflash_info[i].Device.cs = cs[i].cs; - dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i].addr; - dataflash_info[i].id = dfcode; - found[i] += dfcode; - break; - - case AT45DB161: - dataflash_info[i].Device.pages_number = 4096; - dataflash_info[i].Device.pages_size = 528; - dataflash_info[i].Device.page_offset = 10; - dataflash_info[i].Device.byte_mask = 0x300; - dataflash_info[i].Device.cs = cs[i].cs; - dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i].addr; - dataflash_info[i].id = dfcode; - found[i] += dfcode; - break; - - case AT45DB321: - dataflash_info[i].Device.pages_number = 8192; - dataflash_info[i].Device.pages_size = 528; - dataflash_info[i].Device.page_offset = 10; - dataflash_info[i].Device.byte_mask = 0x300; - dataflash_info[i].Device.cs = cs[i].cs; - dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i].addr; - dataflash_info[i].id = dfcode; - found[i] += dfcode; - break; - - case AT45DB642: - dataflash_info[i].Device.pages_number = 8192; - dataflash_info[i].Device.pages_size = 1056; - dataflash_info[i].Device.page_offset = 11; - dataflash_info[i].Device.byte_mask = 0x700; - dataflash_info[i].Device.cs = cs[i].cs; - dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i].addr; - dataflash_info[i].id = dfcode; - found[i] += dfcode; - break; - - case AT45DB128: - dataflash_info[i].Device.pages_number = 16384; - dataflash_info[i].Device.pages_size = 1056; - dataflash_info[i].Device.page_offset = 11; - dataflash_info[i].Device.byte_mask = 0x700; - dataflash_info[i].Device.cs = cs[i].cs; - dataflash_info[i].Desc.DataFlash_state = IDLE; - dataflash_info[i].logical_address = cs[i].addr; - dataflash_info[i].id = dfcode; - found[i] += dfcode; - break; - - default: - dfcode = 0; - break; - } - /* set the last area end to the dataflash size*/ - dataflash_info[i].end_address = - (dataflash_info[i].Device.pages_number * - dataflash_info[i].Device.pages_size) - 1; - - part = 0; - /* set the area addresses */ - for(j = 0; j < NB_DATAFLASH_AREA; j++) { - if(found[i]!=0) { - dataflash_info[i].Device.area_list[j].start = - area_list[part].start + - dataflash_info[i].logical_address; - if(area_list[part].end == 0xffffffff) { - dataflash_info[i].Device.area_list[j].end = - dataflash_info[i].end_address + - dataflash_info[i].logical_address; - } else { - dataflash_info[i].Device.area_list[j].end = - area_list[part].end + - dataflash_info[i].logical_address; - } - protected = area_list[part].protected; - /* Set the environment according to the label...*/ - if(protected == FLAG_PROTECT_INVALID) { - dataflash_info[i].Device.area_list[j].protected = - FLAG_PROTECT_INVALID; - } else { - dataflash_info[i].Device.area_list[j].protected = - protected; - } - strcpy((char*)(dataflash_info[i].Device.area_list[j].label), - (const char *)area_list[part].label); - } - part++; - } - } - return found[0]; -} - -void AT91F_Dataflashenv_set(void) -{ - int i, j; - int part; - unsigned char env; - unsigned char s[32]; /* Will fit a long int in hex */ - unsigned long start; - - for (i = 0, part= 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { - for(j = 0; j < NB_DATAFLASH_AREA; j++) { - env = area_list[part].setenv; - /* Set the environment according to the label...*/ - if((env & FLAG_SETENV) == FLAG_SETENV) { - start = dataflash_info[i].Device.area_list[j].start; - sprintf((char *)s, "%lX", start); - env_set((char *)area_list[part].label, - (char *)s); - } - part++; - } - } -} - -void dataflash_print_info (void) -{ - int i, j; - - for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { - if (dataflash_info[i].id != 0) { - printf("DataFlash:"); - switch (dataflash_info[i].id) { - case AT45DB021: - printf("AT45DB021\n"); - break; - case AT45DB161: - printf("AT45DB161\n"); - break; - - case AT45DB321: - printf("AT45DB321\n"); - break; - - case AT45DB642: - printf("AT45DB642\n"); - break; - case AT45DB128: - printf("AT45DB128\n"); - break; - } - - printf("Nb pages: %6d\n" - "Page Size: %6d\n" - "Size=%8d bytes\n" - "Logical address: 0x%08X\n", - (unsigned int) dataflash_info[i].Device.pages_number, - (unsigned int) dataflash_info[i].Device.pages_size, - (unsigned int) dataflash_info[i].Device.pages_number * - dataflash_info[i].Device.pages_size, - (unsigned int) dataflash_info[i].logical_address); - for (j = 0; j < NB_DATAFLASH_AREA; j++) { - switch(dataflash_info[i].Device.area_list[j].protected) { - case FLAG_PROTECT_SET: - case FLAG_PROTECT_CLEAR: - printf("Area %i:\t%08lX to %08lX %s", j, - dataflash_info[i].Device.area_list[j].start, - dataflash_info[i].Device.area_list[j].end, - (dataflash_info[i].Device.area_list[j].protected==FLAG_PROTECT_SET) ? "(RO)" : " "); - printf(" %s\n", dataflash_info[i].Device.area_list[j].label); - break; - case FLAG_PROTECT_INVALID: - break; - } - } - } - } -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : AT91F_DataflashSelect */ -/* Object : Select the correct device */ -/*---------------------------------------------------------------------------*/ -AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash, - unsigned long *addr) -{ - char addr_valid = 0; - int i; - - for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) - if ( dataflash_info[i].id - && ((((int) *addr) & 0xFF000000) == - dataflash_info[i].logical_address)) { - addr_valid = 1; - break; - } - if (!addr_valid) { - pFlash = (AT91PS_DataFlash) 0; - return pFlash; - } - pFlash->pDataFlashDesc = &(dataflash_info[i].Desc); - pFlash->pDevice = &(dataflash_info[i].Device); - *addr -= dataflash_info[i].logical_address; - return (pFlash); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : addr_dataflash */ -/* Object : Test if address is valid */ -/*---------------------------------------------------------------------------*/ -int addr_dataflash (unsigned long addr) -{ - int addr_valid = 0; - int i; - - for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { - if ((((int) addr) & 0xFF000000) == - dataflash_info[i].logical_address) { - addr_valid = 1; - break; - } - } - - return addr_valid; -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : size_dataflash */ -/* Object : Test if address is valid regarding the size */ -/*---------------------------------------------------------------------------*/ -int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, - unsigned long size) -{ - /* is outside the dataflash */ - if (((int)addr & 0x0FFFFFFF) > (pdataFlash->pDevice->pages_size * - pdataFlash->pDevice->pages_number)) return 0; - /* is too large for the dataflash */ - if (size > ((pdataFlash->pDevice->pages_size * - pdataFlash->pDevice->pages_number) - - ((int)addr & 0x0FFFFFFF))) return 0; - - return 1; -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : prot_dataflash */ -/* Object : Test if destination area is protected */ -/*---------------------------------------------------------------------------*/ -int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr) -{ - int area; - - /* find area */ - for (area = 0; area < NB_DATAFLASH_AREA; area++) { - if ((addr >= pdataFlash->pDevice->area_list[area].start) && - (addr < pdataFlash->pDevice->area_list[area].end)) - break; - } - if (area == NB_DATAFLASH_AREA) - return -1; - - /*test protection value*/ - if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_SET) - return 0; - if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_INVALID) - return 0; - - return 1; -} - -/*--------------------------------------------------------------------------*/ -/* Function Name : dataflash_real_protect */ -/* Object : protect/unprotect area */ -/*--------------------------------------------------------------------------*/ -int dataflash_real_protect (int flag, unsigned long start_addr, - unsigned long end_addr) -{ - int i,j, area1, area2, addr_valid = 0; - - /* find dataflash */ - for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { - if ((((int) start_addr) & 0xF0000000) == - dataflash_info[i].logical_address) { - addr_valid = 1; - break; - } - } - if (!addr_valid) { - return -1; - } - /* find start area */ - for (area1 = 0; area1 < NB_DATAFLASH_AREA; area1++) { - if (start_addr == dataflash_info[i].Device.area_list[area1].start) - break; - } - if (area1 == NB_DATAFLASH_AREA) return -1; - /* find end area */ - for (area2 = 0; area2 < NB_DATAFLASH_AREA; area2++) { - if (end_addr == dataflash_info[i].Device.area_list[area2].end) - break; - } - if (area2 == NB_DATAFLASH_AREA) - return -1; - - /*set protection value*/ - for(j = area1; j < area2 + 1 ; j++) - if(dataflash_info[i].Device.area_list[j].protected - != FLAG_PROTECT_INVALID) { - if (flag == 0) { - dataflash_info[i].Device.area_list[j].protected - = FLAG_PROTECT_CLEAR; - } else { - dataflash_info[i].Device.area_list[j].protected - = FLAG_PROTECT_SET; - } - } - - return (area2 - area1 + 1); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : read_dataflash */ -/* Object : dataflash memory read */ -/*---------------------------------------------------------------------------*/ -int read_dataflash (unsigned long addr, unsigned long size, char *result) -{ - unsigned long AddrToRead = addr; - AT91PS_DataFlash pFlash = &DataFlashInst; - - pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead); - - if (pFlash == 0) - return ERR_UNKNOWN_FLASH_TYPE; - - if (size_dataflash(pFlash,addr,size) == 0) - return ERR_INVAL; - - return (AT91F_DataFlashRead (pFlash, AddrToRead, size, result)); -} - -/*---------------------------------------------------------------------------*/ -/* Function Name : write_dataflash */ -/* Object : write a block in dataflash */ -/*---------------------------------------------------------------------------*/ -int write_dataflash (unsigned long addr_dest, unsigned long addr_src, - unsigned long size) -{ - unsigned long AddrToWrite = addr_dest; - AT91PS_DataFlash pFlash = &DataFlashInst; - - pFlash = AT91F_DataflashSelect (pFlash, &AddrToWrite); - - if (pFlash == 0) - return ERR_UNKNOWN_FLASH_TYPE; - - if (size_dataflash(pFlash,addr_dest,size) == 0) - return ERR_INVAL; - - if (prot_dataflash(pFlash,addr_dest) == 0) - return ERR_PROTECTED; - - if (AddrToWrite == -1) - return -1; - - return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src, - AddrToWrite, size); -} - -void dataflash_perror (int err) -{ - switch (err) { - case ERR_OK: - break; - case ERR_TIMOUT: - printf("Timeout writing to DataFlash\n"); - break; - case ERR_PROTECTED: - printf("Can't write to protected/invalid DataFlash sectors\n"); - break; - case ERR_INVAL: - printf("Outside available DataFlash\n"); - break; - case ERR_UNKNOWN_FLASH_TYPE: - printf("Unknown Type of DataFlash\n"); - break; - case ERR_PROG_ERROR: - printf("General DataFlash Programming Error\n"); - break; - default: - printf("%s[%d] FIXME: rc=%d\n", __FILE__, __LINE__, err); - break; - } -} diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 08db48843d..f796f0dad1 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -435,6 +435,7 @@ struct nand_buf { struct denali_nand_info { struct nand_chip nand; + unsigned long clk_x_rate; /* bus interface clock rate */ int flash_bank; /* currently selected chip */ int status; int platform; diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c index 4afd679a04..805c066b40 100644 --- a/drivers/mtd/nand/denali_dt.c +++ b/drivers/mtd/nand/denali_dt.c @@ -6,6 +6,7 @@ */ #include <common.h> +#include <clk.h> #include <dm.h> #include <linux/io.h> #include <linux/ioport.h> @@ -52,6 +53,7 @@ static int denali_dt_probe(struct udevice *dev) { struct denali_nand_info *denali = dev_get_priv(dev); const struct denali_dt_data *data; + struct clk clk; struct resource res; int ret; @@ -73,6 +75,16 @@ static int denali_dt_probe(struct udevice *dev) denali->flash_mem = devm_ioremap(dev, res.start, resource_size(&res)); + ret = clk_get_by_index(dev, 0, &clk); + if (ret) + return ret; + + ret = clk_enable(&clk); + if (ret) + return ret; + + denali->clk_x_rate = clk_get_rate(&clk); + return denali_init(denali); } diff --git a/drivers/mtd/nand/lpc32xx_nand_mlc.c b/drivers/mtd/nand/lpc32xx_nand_mlc.c index 3af7e6dfac..e1b36706ca 100644 --- a/drivers/mtd/nand/lpc32xx_nand_mlc.c +++ b/drivers/mtd/nand/lpc32xx_nand_mlc.c @@ -583,21 +583,21 @@ void board_nand_init(void) /* identify chip */ ret = nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_CHIPS, NULL); if (ret) { - error("nand_scan_ident returned %i", ret); + pr_err("nand_scan_ident returned %i", ret); return; } /* finish scanning the chip */ ret = nand_scan_tail(mtd); if (ret) { - error("nand_scan_tail returned %i", ret); + pr_err("nand_scan_tail returned %i", ret); return; } /* chip is good, register it */ ret = nand_register(0, mtd); if (ret) - error("nand_register returned %i", ret); + pr_err("nand_register returned %i", ret); } #else /* defined(CONFIG_SPL_BUILD) */ diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index b025001337..5bb4ea859b 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -651,6 +651,8 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, case NAND_CMD_ERASE2: case NAND_CMD_SEQIN: case NAND_CMD_STATUS: + case NAND_CMD_READID: + case NAND_CMD_SET_FEATURES: return; case NAND_CMD_RESET: @@ -748,6 +750,8 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, case NAND_CMD_SEQIN: case NAND_CMD_RNDIN: case NAND_CMD_STATUS: + case NAND_CMD_READID: + case NAND_CMD_SET_FEATURES: return; case NAND_CMD_RESET: diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 0042a7ba11..6ab3c8a25a 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -1559,7 +1559,7 @@ static int pxa3xx_nand_probe_dt(struct pxa3xx_nand_info *info) pdata->num_cs = fdtdec_get_int(blob, node, "num-cs", 1); if (pdata->num_cs != 1) { - error("pxa3xx driver supports single CS only\n"); + pr_err("pxa3xx driver supports single CS only\n"); break; } diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5ceea44c60..d67927cd3b 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -159,6 +159,14 @@ config FTMAC100 help This MAC is present in Andestech SoCs. +config MVNETA + bool "Marvell Armada 385 network interface support" + depends on ARMADA_XP || ARMADA_38X + select PHYLIB + help + This driver supports the network interface units in the + Marvell ARMADA XP and 38X SoCs + config MVPP2 bool "Marvell Armada 375/7K/8K network interface support" depends on ARMADA_375 || ARMADA_8K diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c index 9ff72fa1ed..a2b594ed73 100644 --- a/drivers/net/bcm-sf2-eth-gmac.c +++ b/drivers/net/bcm-sf2-eth-gmac.c @@ -610,7 +610,7 @@ int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg) /* Busy wait timeout is 1ms */ if (gmac_mii_busywait(1000)) { - error("%s: Prepare MII read: MII/MDIO busy\n", __func__); + pr_err("%s: Prepare MII read: MII/MDIO busy\n", __func__); return -1; } @@ -622,7 +622,7 @@ int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg) writel(tmp, GMAC_MII_DATA_ADDR); if (gmac_mii_busywait(1000)) { - error("%s: MII read failure: MII/MDIO busy\n", __func__); + pr_err("%s: MII read failure: MII/MDIO busy\n", __func__); return -1; } @@ -638,7 +638,7 @@ int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg, /* Busy wait timeout is 1ms */ if (gmac_mii_busywait(1000)) { - error("%s: Prepare MII write: MII/MDIO busy\n", __func__); + pr_err("%s: Prepare MII write: MII/MDIO busy\n", __func__); return -1; } @@ -651,7 +651,7 @@ int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg, writel(tmp, GMAC_MII_DATA_ADDR); if (gmac_mii_busywait(1000)) { - error("%s: MII write failure: MII/MDIO busy\n", __func__); + pr_err("%s: MII write failure: MII/MDIO busy\n", __func__); return -1; } @@ -742,7 +742,7 @@ int gmac_set_speed(int speed, int duplex) } else if (speed == 10) { speed_cfg = 0; } else { - error("%s: Invalid GMAC speed(%d)!\n", __func__, speed); + pr_err("%s: Invalid GMAC speed(%d)!\n", __func__, speed); return -1; } @@ -820,7 +820,7 @@ int gmac_mac_init(struct eth_device *dev) writel(0, GMAC0_INT_STATUS_ADDR); if (dma_init(dma) < 0) { - error("%s: GMAC dma_init failed\n", __func__); + pr_err("%s: GMAC dma_init failed\n", __func__); goto err_exit; } @@ -855,7 +855,7 @@ int gmac_mac_init(struct eth_device *dev) writel(tmp, GMAC_MII_CTRL_ADDR); if (gmac_mii_busywait(1000)) { - error("%s: Configure MDIO: MII/MDIO busy\n", __func__); + pr_err("%s: Configure MDIO: MII/MDIO busy\n", __func__); goto err_exit; } diff --git a/drivers/net/bcm-sf2-eth.c b/drivers/net/bcm-sf2-eth.c index e2747365a2..9056f71b9a 100644 --- a/drivers/net/bcm-sf2-eth.c +++ b/drivers/net/bcm-sf2-eth.c @@ -40,7 +40,7 @@ static int bcm_sf2_eth_init(struct eth_device *dev) rc = eth->mac_init(dev); if (rc) { - error("%s: Couldn't cofigure MAC!\n", __func__); + pr_err("%s: Couldn't cofigure MAC!\n", __func__); return rc; } @@ -90,7 +90,7 @@ static int bcm_sf2_eth_send(struct eth_device *dev, void *packet, int length) debug("."); i++; if (i > 20) { - error("%s: Tx timeout: retried 20 times\n", __func__); + pr_err("%s: Tx timeout: retried 20 times\n", __func__); rc = -1; break; } @@ -117,7 +117,7 @@ static int bcm_sf2_eth_receive(struct eth_device *dev) debug("\nNO More Rx\n"); break; } else if ((rcvlen == 0) || (rcvlen > RX_BUF_SIZE)) { - error("%s: Wrong Ethernet packet size (%d B), skip!\n", + pr_err("%s: Wrong Ethernet packet size (%d B), skip!\n", __func__, rcvlen); break; } else { @@ -166,9 +166,9 @@ static int bcm_sf2_eth_open(struct eth_device *dev, bd_t *bt) */ for (i = 0; i < eth->port_num; i++) { if (phy_startup(eth->port[i])) { - error("%s: PHY %d startup failed!\n", __func__, i); + pr_err("%s: PHY %d startup failed!\n", __func__, i); if (i == CONFIG_BCM_SF2_ETH_DEFAULT_PORT) { - error("%s: No default port %d!\n", __func__, i); + pr_err("%s: No default port %d!\n", __func__, i); return -1; } } @@ -205,13 +205,13 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num) dev = (struct eth_device *)malloc(sizeof(struct eth_device)); if (dev == NULL) { - error("%s: Not enough memory!\n", __func__); + pr_err("%s: Not enough memory!\n", __func__); return -1; } eth = (struct eth_info *)malloc(sizeof(struct eth_info)); if (eth == NULL) { - error("%s: Not enough memory!\n", __func__); + pr_err("%s: Not enough memory!\n", __func__); return -1; } @@ -234,7 +234,7 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num) if (gmac_add(dev)) { free(eth); free(dev); - error("%s: Adding GMAC failed!\n", __func__); + pr_err("%s: Adding GMAC failed!\n", __func__); return -1; } #else @@ -263,7 +263,7 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num) rc = bcm_sf2_eth_init(dev); if (rc != 0) { - error("%s: configuration failed!\n", __func__); + pr_err("%s: configuration failed!\n", __func__); return -1; } diff --git a/drivers/net/cpsw-common.c b/drivers/net/cpsw-common.c index 8970ee00af..0dc83ab820 100644 --- a/drivers/net/cpsw-common.c +++ b/drivers/net/cpsw-common.c @@ -29,14 +29,14 @@ static int davinci_emac_3517_get_macid(struct udevice *dev, u16 offset, syscon = fdtdec_lookup_phandle(fdt, node, "syscon"); if (syscon < 0) { - error("Syscon offset not found\n"); + pr_err("Syscon offset not found\n"); return -ENOENT; } addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii), sizeof(u32), MAP_NOCACHE); if (addr == FDT_ADDR_T_NONE) { - error("Not able to get syscon address to get mac efuse address\n"); + pr_err("Not able to get syscon address to get mac efuse address\n"); return -ENOENT; } @@ -69,14 +69,14 @@ static int cpsw_am33xx_cm_get_macid(struct udevice *dev, u16 offset, int slave, syscon = fdtdec_lookup_phandle(fdt, node, "syscon"); if (syscon < 0) { - error("Syscon offset not found\n"); + pr_err("Syscon offset not found\n"); return -ENOENT; } addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii), sizeof(u32), MAP_NOCACHE); if (addr == FDT_ADDR_T_NONE) { - error("Not able to get syscon address to get mac efuse address\n"); + pr_err("Not able to get syscon address to get mac efuse address\n"); return -ENOENT; } diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index d7db0fc432..b72258f83b 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -1368,7 +1368,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev) mdio_base = cpsw_get_addr_by_node(fdt, subnode); if (mdio_base == FDT_ADDR_T_NONE) { - error("Not able to get MDIO address space\n"); + pr_err("Not able to get MDIO address space\n"); return -ENOENT; } priv->data.mdio_base = mdio_base; @@ -1407,7 +1407,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev) subnode); if (priv->data.gmii_sel == FDT_ADDR_T_NONE) { - error("Not able to get gmii_sel reg address\n"); + pr_err("Not able to get gmii_sel reg address\n"); return -ENOENT; } @@ -1418,7 +1418,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev) phy_sel_compat = fdt_getprop(fdt, subnode, "compatible", NULL); if (!phy_sel_compat) { - error("Not able to get gmii_sel compatible\n"); + pr_err("Not able to get gmii_sel compatible\n"); return -ENOENT; } } @@ -1434,7 +1434,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev) ret = ti_cm_get_macid(dev, active_slave, pdata->enetaddr); if (ret < 0) { - error("cpsw read efuse mac failed\n"); + pr_err("cpsw read efuse mac failed\n"); return ret; } diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 5c4315ffea..00076cffbe 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -377,7 +377,7 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, ret = eqos_mdio_wait_idle(eqos); if (ret) { - error("MDIO not idle at entry"); + pr_err("MDIO not idle at entry"); return ret; } @@ -397,7 +397,7 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, ret = eqos_mdio_wait_idle(eqos); if (ret) { - error("MDIO read didn't complete"); + pr_err("MDIO read didn't complete"); return ret; } @@ -421,7 +421,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad, ret = eqos_mdio_wait_idle(eqos); if (ret) { - error("MDIO not idle at entry"); + pr_err("MDIO not idle at entry"); return ret; } @@ -443,7 +443,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad, ret = eqos_mdio_wait_idle(eqos); if (ret) { - error("MDIO read didn't complete"); + pr_err("MDIO read didn't complete"); return ret; } @@ -459,37 +459,37 @@ static int eqos_start_clks_tegra186(struct udevice *dev) ret = clk_enable(&eqos->clk_slave_bus); if (ret < 0) { - error("clk_enable(clk_slave_bus) failed: %d", ret); + pr_err("clk_enable(clk_slave_bus) failed: %d", ret); goto err; } ret = clk_enable(&eqos->clk_master_bus); if (ret < 0) { - error("clk_enable(clk_master_bus) failed: %d", ret); + pr_err("clk_enable(clk_master_bus) failed: %d", ret); goto err_disable_clk_slave_bus; } ret = clk_enable(&eqos->clk_rx); if (ret < 0) { - error("clk_enable(clk_rx) failed: %d", ret); + pr_err("clk_enable(clk_rx) failed: %d", ret); goto err_disable_clk_master_bus; } ret = clk_enable(&eqos->clk_ptp_ref); if (ret < 0) { - error("clk_enable(clk_ptp_ref) failed: %d", ret); + pr_err("clk_enable(clk_ptp_ref) failed: %d", ret); goto err_disable_clk_rx; } ret = clk_set_rate(&eqos->clk_ptp_ref, 125 * 1000 * 1000); if (ret < 0) { - error("clk_set_rate(clk_ptp_ref) failed: %d", ret); + pr_err("clk_set_rate(clk_ptp_ref) failed: %d", ret); goto err_disable_clk_ptp_ref; } ret = clk_enable(&eqos->clk_tx); if (ret < 0) { - error("clk_enable(clk_tx) failed: %d", ret); + pr_err("clk_enable(clk_tx) failed: %d", ret); goto err_disable_clk_ptp_ref; } @@ -533,7 +533,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev) ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1); if (ret < 0) { - error("dm_gpio_set_value(phy_reset, assert) failed: %d", ret); + pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d", ret); return ret; } @@ -541,13 +541,13 @@ static int eqos_start_resets_tegra186(struct udevice *dev) ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0); if (ret < 0) { - error("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret); + pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret); return ret; } ret = reset_assert(&eqos->reset_ctl); if (ret < 0) { - error("reset_assert() failed: %d", ret); + pr_err("reset_assert() failed: %d", ret); return ret; } @@ -555,7 +555,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev) ret = reset_deassert(&eqos->reset_ctl); if (ret < 0) { - error("reset_deassert() failed: %d", ret); + pr_err("reset_deassert() failed: %d", ret); return ret; } @@ -591,14 +591,14 @@ static int eqos_calibrate_pads_tegra186(struct udevice *dev) ret = wait_for_bit(__func__, &eqos->tegra186_regs->auto_cal_status, EQOS_AUTO_CAL_STATUS_ACTIVE, true, 10, false); if (ret) { - error("calibrate didn't start"); + pr_err("calibrate didn't start"); goto failed; } ret = wait_for_bit(__func__, &eqos->tegra186_regs->auto_cal_status, EQOS_AUTO_CAL_STATUS_ACTIVE, false, 10, false); if (ret) { - error("calibrate didn't finish"); + pr_err("calibrate didn't finish"); goto failed; } @@ -713,13 +713,13 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev) rate = 2.5 * 1000 * 1000; break; default: - error("invalid speed %d", eqos->phy->speed); + pr_err("invalid speed %d", eqos->phy->speed); return -EINVAL; } ret = clk_set_rate(&eqos->clk_tx, rate); if (ret < 0) { - error("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret); + pr_err("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret); return ret; } @@ -739,7 +739,7 @@ static int eqos_adjust_link(struct udevice *dev) else ret = eqos_set_half_duplex(dev); if (ret < 0) { - error("eqos_set_*_duplex() failed: %d", ret); + pr_err("eqos_set_*_duplex() failed: %d", ret); return ret; } @@ -757,24 +757,24 @@ static int eqos_adjust_link(struct udevice *dev) ret = eqos_set_mii_speed_10(dev); break; default: - error("invalid speed %d", eqos->phy->speed); + pr_err("invalid speed %d", eqos->phy->speed); return -EINVAL; } if (ret < 0) { - error("eqos_set_*mii_speed*() failed: %d", ret); + pr_err("eqos_set_*mii_speed*() failed: %d", ret); return ret; } if (en_calibration) { ret = eqos_calibrate_pads_tegra186(dev); if (ret < 0) { - error("eqos_calibrate_pads_tegra186() failed: %d", ret); + pr_err("eqos_calibrate_pads_tegra186() failed: %d", ret); return ret; } } else { ret = eqos_disable_calibration_tegra186(dev); if (ret < 0) { - error("eqos_disable_calibration_tegra186() failed: %d", + pr_err("eqos_disable_calibration_tegra186() failed: %d", ret); return ret; } @@ -782,7 +782,7 @@ static int eqos_adjust_link(struct udevice *dev) ret = eqos_set_tx_clk_speed_tegra186(dev); if (ret < 0) { - error("eqos_set_tx_clk_speed_tegra186() failed: %d", ret); + pr_err("eqos_set_tx_clk_speed_tegra186() failed: %d", ret); return ret; } @@ -848,13 +848,13 @@ static int eqos_start(struct udevice *dev) ret = eqos_start_clks_tegra186(dev); if (ret < 0) { - error("eqos_start_clks_tegra186() failed: %d", ret); + pr_err("eqos_start_clks_tegra186() failed: %d", ret); goto err; } ret = eqos_start_resets_tegra186(dev); if (ret < 0) { - error("eqos_start_resets_tegra186() failed: %d", ret); + pr_err("eqos_start_resets_tegra186() failed: %d", ret); goto err_stop_clks; } @@ -865,13 +865,13 @@ static int eqos_start(struct udevice *dev) ret = wait_for_bit(__func__, &eqos->dma_regs->mode, EQOS_DMA_MODE_SWR, false, 10, false); if (ret) { - error("EQOS_DMA_MODE_SWR stuck"); + pr_err("EQOS_DMA_MODE_SWR stuck"); goto err_stop_resets; } ret = eqos_calibrate_pads_tegra186(dev); if (ret < 0) { - error("eqos_calibrate_pads_tegra186() failed: %d", ret); + pr_err("eqos_calibrate_pads_tegra186() failed: %d", ret); goto err_stop_resets; } @@ -881,28 +881,28 @@ static int eqos_start(struct udevice *dev) eqos->phy = phy_connect(eqos->mii, 0, dev, 0); if (!eqos->phy) { - error("phy_connect() failed"); + pr_err("phy_connect() failed"); goto err_stop_resets; } ret = phy_config(eqos->phy); if (ret < 0) { - error("phy_config() failed: %d", ret); + pr_err("phy_config() failed: %d", ret); goto err_shutdown_phy; } ret = phy_startup(eqos->phy); if (ret < 0) { - error("phy_startup() failed: %d", ret); + pr_err("phy_startup() failed: %d", ret); goto err_shutdown_phy; } if (!eqos->phy->link) { - error("No link"); + pr_err("No link"); goto err_shutdown_phy; } ret = eqos_adjust_link(dev); if (ret < 0) { - error("eqos_adjust_link() failed: %d", ret); + pr_err("eqos_adjust_link() failed: %d", ret); goto err_shutdown_phy; } @@ -1119,7 +1119,7 @@ err_stop_resets: err_stop_clks: eqos_stop_clks_tegra186(dev); err: - error("FAILED: %d", ret); + pr_err("FAILED: %d", ret); return ret; } @@ -1361,7 +1361,7 @@ static int eqos_probe_resources_tegra186(struct udevice *dev) ret = reset_get_by_name(dev, "eqos", &eqos->reset_ctl); if (ret) { - error("reset_get_by_name(rst) failed: %d", ret); + pr_err("reset_get_by_name(rst) failed: %d", ret); return ret; } @@ -1369,38 +1369,38 @@ static int eqos_probe_resources_tegra186(struct udevice *dev) &eqos->phy_reset_gpio, GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); if (ret) { - error("gpio_request_by_name(phy reset) failed: %d", ret); + pr_err("gpio_request_by_name(phy reset) failed: %d", ret); goto err_free_reset_eqos; } ret = clk_get_by_name(dev, "slave_bus", &eqos->clk_slave_bus); if (ret) { - error("clk_get_by_name(slave_bus) failed: %d", ret); + pr_err("clk_get_by_name(slave_bus) failed: %d", ret); goto err_free_gpio_phy_reset; } ret = clk_get_by_name(dev, "master_bus", &eqos->clk_master_bus); if (ret) { - error("clk_get_by_name(master_bus) failed: %d", ret); + pr_err("clk_get_by_name(master_bus) failed: %d", ret); goto err_free_clk_slave_bus; } ret = clk_get_by_name(dev, "rx", &eqos->clk_rx); if (ret) { - error("clk_get_by_name(rx) failed: %d", ret); + pr_err("clk_get_by_name(rx) failed: %d", ret); goto err_free_clk_master_bus; } ret = clk_get_by_name(dev, "ptp_ref", &eqos->clk_ptp_ref); if (ret) { - error("clk_get_by_name(ptp_ref) failed: %d", ret); + pr_err("clk_get_by_name(ptp_ref) failed: %d", ret); goto err_free_clk_rx; return ret; } ret = clk_get_by_name(dev, "tx", &eqos->clk_tx); if (ret) { - error("clk_get_by_name(tx) failed: %d", ret); + pr_err("clk_get_by_name(tx) failed: %d", ret); goto err_free_clk_ptp_ref; } @@ -1454,7 +1454,7 @@ static int eqos_probe(struct udevice *dev) eqos->regs = devfdt_get_addr(dev); if (eqos->regs == FDT_ADDR_T_NONE) { - error("devfdt_get_addr() failed"); + pr_err("devfdt_get_addr() failed"); return -ENODEV; } eqos->mac_regs = (void *)(eqos->regs + EQOS_MAC_REGS_BASE); @@ -1464,19 +1464,19 @@ static int eqos_probe(struct udevice *dev) ret = eqos_probe_resources_core(dev); if (ret < 0) { - error("eqos_probe_resources_core() failed: %d", ret); + pr_err("eqos_probe_resources_core() failed: %d", ret); return ret; } ret = eqos_probe_resources_tegra186(dev); if (ret < 0) { - error("eqos_probe_resources_tegra186() failed: %d", ret); + pr_err("eqos_probe_resources_tegra186() failed: %d", ret); goto err_remove_resources_core; } eqos->mii = mdio_alloc(); if (!eqos->mii) { - error("mdio_alloc() failed"); + pr_err("mdio_alloc() failed"); goto err_remove_resources_tegra; } eqos->mii->read = eqos_mdio_read; @@ -1486,7 +1486,7 @@ static int eqos_probe(struct udevice *dev) ret = mdio_register(eqos->mii); if (ret < 0) { - error("mdio_register() failed: %d", ret); + pr_err("mdio_register() failed: %d", ret); goto err_free_mdio; } diff --git a/drivers/net/ep93xx_eth.c b/drivers/net/ep93xx_eth.c index a94191b9e6..bc45706243 100644 --- a/drivers/net/ep93xx_eth.c +++ b/drivers/net/ep93xx_eth.c @@ -324,7 +324,7 @@ static int ep93xx_eth_rcv_packet(struct eth_device *dev) debug("reporting %d bytes...\n", len); } else { /* Do we have an erroneous packet? */ - error("packet rx error, status %08X %08X", + pr_err("packet rx error, status %08X %08X", priv->rx_sq.current->word1, priv->rx_sq.current->word2); dump_rx_descriptor_queue(dev); @@ -401,7 +401,7 @@ static int ep93xx_eth_send_packet(struct eth_device *dev, ; /* noop */ if (!TX_STATUS_TXWE(priv->tx_sq.current)) { - error("packet tx error, status %08X", + pr_err("packet tx error, status %08X", priv->tx_sq.current->word1); dump_tx_descriptor_queue(dev); dump_tx_status_queue(dev); @@ -452,7 +452,7 @@ int ep93xx_eth_initialize(u8 dev_num, int base_addr) priv = malloc(sizeof(*priv)); if (!priv) { - error("malloc() failed"); + pr_err("malloc() failed"); goto eth_init_failed_0; } memset(priv, 0, sizeof(*priv)); @@ -462,34 +462,34 @@ int ep93xx_eth_initialize(u8 dev_num, int base_addr) priv->tx_dq.base = calloc(NUMTXDESC, sizeof(struct tx_descriptor)); if (priv->tx_dq.base == NULL) { - error("calloc() failed"); + pr_err("calloc() failed"); goto eth_init_failed_1; } priv->tx_sq.base = calloc(NUMTXDESC, sizeof(struct tx_status)); if (priv->tx_sq.base == NULL) { - error("calloc() failed"); + pr_err("calloc() failed"); goto eth_init_failed_2; } priv->rx_dq.base = calloc(NUMRXDESC, sizeof(struct rx_descriptor)); if (priv->rx_dq.base == NULL) { - error("calloc() failed"); + pr_err("calloc() failed"); goto eth_init_failed_3; } priv->rx_sq.base = calloc(NUMRXDESC, sizeof(struct rx_status)); if (priv->rx_sq.base == NULL) { - error("calloc() failed"); + pr_err("calloc() failed"); goto eth_init_failed_4; } dev = malloc(sizeof *dev); if (dev == NULL) { - error("malloc() failed"); + pr_err("malloc() failed"); goto eth_init_failed_5; } memset(dev, 0, sizeof *dev); diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index 72ef42cca8..21ccab47ae 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -757,7 +757,7 @@ static int ks2_eth_start(struct udevice *dev) qm_init(); if (ksnav_init(priv->netcp_pktdma, &priv->net_rx_buffs)) { - error("ksnav_init failed\n"); + pr_err("ksnav_init failed\n"); goto err_knav_init; } @@ -773,7 +773,7 @@ static int ks2_eth_start(struct udevice *dev) phy_startup(priv->phydev); if (priv->phydev->link == 0) { - error("phy startup failed\n"); + pr_err("phy startup failed\n"); goto err_phy_start; } } @@ -923,7 +923,7 @@ static int ks2_eth_probe(struct udevice *dev) */ mdio_bus = mdio_alloc(); if (!mdio_bus) { - error("MDIO alloc failed\n"); + pr_err("MDIO alloc failed\n"); return -ENOMEM; } priv->mdio_bus = mdio_bus; @@ -935,7 +935,7 @@ static int ks2_eth_probe(struct udevice *dev) ret = mdio_register(mdio_bus); if (ret) { - error("MDIO bus register failed\n"); + pr_err("MDIO bus register failed\n"); return ret; } } else { @@ -1011,7 +1011,7 @@ static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0) slave_name, offset_to_ofnode(slave), &sl_dev); if (ret) { - error("ks2_net - not able to bind slave interfaces\n"); + pr_err("ks2_net - not able to bind slave interfaces\n"); return ret; } } @@ -1031,7 +1031,7 @@ static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0) ret = device_bind_driver_to_node(dev, "eth_ks2_sl", slave_name, offset_to_ofnode(slave), &sl_dev); if (ret) { - error("ks2_net - not able to bind slave interfaces\n"); + pr_err("ks2_net - not able to bind slave interfaces\n"); return ret; } } @@ -1074,7 +1074,7 @@ static int ks2_eth_parse_slave_interface(int netcp, int slave, mdio = fdt_parent_offset(fdt, phy); if (mdio < 0) { - error("mdio dt not found\n"); + pr_err("mdio dt not found\n"); return -ENODEV; } priv->mdio_base = (void *)fdtdec_get_addr(fdt, mdio, "reg"); diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 8db127ba06..dc7a52534e 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -18,6 +18,7 @@ #include <linux/mii.h> #include <wait_bit.h> #include <asm/io.h> +#include <asm/gpio.h> /* Registers */ #define RAVB_REG_CCC 0x000 @@ -122,6 +123,7 @@ struct ravb_priv { struct mii_dev *bus; void __iomem *iobase; struct clk clk; + struct gpio_desc reset_gpio; }; static inline void ravb_flush_dcache(u32 addr, u32 len) @@ -302,6 +304,13 @@ static int ravb_phy_config(struct udevice *dev) struct phy_device *phydev; int mask = 0xffffffff, reg; + if (dm_gpio_is_valid(ð->reset_gpio)) { + dm_gpio_set_value(ð->reset_gpio, 1); + mdelay(20); + dm_gpio_set_value(ð->reset_gpio, 0); + mdelay(1); + } + phydev = phy_find_by_mask(eth->bus, mask, pdata->phy_interface); if (!phydev) return -ENODEV; @@ -483,6 +492,9 @@ static int ravb_probe(struct udevice *dev) if (ret < 0) goto err_mdio_alloc; + gpio_request_by_name_nodev(dev_ofnode(dev), "reset-gpios", 0, + ð->reset_gpio, GPIOD_IS_OUT); + mdiodev = mdio_alloc(); if (!mdiodev) { ret = -ENOMEM; @@ -516,6 +528,7 @@ static int ravb_remove(struct udevice *dev) free(eth->phydev); mdio_unregister(eth->bus); mdio_free(eth->bus); + dm_gpio_free(dev, ð->reset_gpio); unmap_physmem(eth->iobase, MAP_NOCACHE); return 0; diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 8af2470268..58f128d8a6 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -33,6 +33,14 @@ config PCI_PNP help Enable PCI memory and I/O space resource allocation and assignment. +config PCIE_ECAM_GENERIC + bool "Generic ECAM-based PCI host controller support" + default n + depends on DM_PCI + help + Say Y here if you want to enable support for generic ECAM-based + PCIe host controllers, such as the one emulated by QEMU. + config PCIE_DW_MVEBU bool "Enable Armada-8K PCIe driver (DesignWare core)" depends on DM_PCI diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index ad44e83996..5eb12efbf5 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_PCI) += pci.o pci_auto_old.o endif obj-$(CONFIG_PCI) += pci_auto_common.o pci_common.o +obj-$(CONFIG_PCIE_ECAM_GENERIC) += pcie_ecam_generic.o obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 86df141d60..5a24eb6428 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -518,6 +518,64 @@ int pci_auto_config_devices(struct udevice *bus) return sub_bus; } +int pci_generic_mmap_write_config( + struct udevice *bus, + int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), + pci_dev_t bdf, + uint offset, + ulong value, + enum pci_size_t size) +{ + void *address; + + if (addr_f(bus, bdf, offset, &address) < 0) + return 0; + + switch (size) { + case PCI_SIZE_8: + writeb(value, address); + return 0; + case PCI_SIZE_16: + writew(value, address); + return 0; + case PCI_SIZE_32: + writel(value, address); + return 0; + default: + return -EINVAL; + } +} + +int pci_generic_mmap_read_config( + struct udevice *bus, + int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), + pci_dev_t bdf, + uint offset, + ulong *valuep, + enum pci_size_t size) +{ + void *address; + + if (addr_f(bus, bdf, offset, &address) < 0) { + *valuep = pci_get_ff(size); + return 0; + } + + switch (size) { + case PCI_SIZE_8: + *valuep = readb(address); + return 0; + case PCI_SIZE_16: + *valuep = readw(address); + return 0; + case PCI_SIZE_32: + *valuep = readl(address); + return 0; + default: + return -EINVAL; + } +} + int dm_pci_hose_probe_bus(struct udevice *bus) { int sub_bus; diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index 7d920d423d..b5bd25ec56 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -369,7 +369,7 @@ static int tegra_pcie_port_parse_dt(ofnode node, struct tegra_pcie_port *port) addr = ofnode_get_property(node, "assigned-addresses", &len); if (!addr) { - error("property \"assigned-addresses\" not found"); + pr_err("property \"assigned-addresses\" not found"); return -FDT_ERR_NOTFOUND; } @@ -460,7 +460,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes) err = ofnode_read_u32_default(node, "nvidia,num-lanes", -1); if (err < 0) { - error("failed to parse \"nvidia,num-lanes\" property"); + pr_err("failed to parse \"nvidia,num-lanes\" property"); return err; } @@ -468,7 +468,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes) err = ofnode_read_pci_addr(node, 0, "reg", &addr); if (err < 0) { - error("failed to parse \"reg\" property"); + pr_err("failed to parse \"reg\" property"); return err; } @@ -491,25 +491,25 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id, err = dev_read_resource(dev, 0, &pcie->pads); if (err < 0) { - error("resource \"pads\" not found"); + pr_err("resource \"pads\" not found"); return err; } err = dev_read_resource(dev, 1, &pcie->afi); if (err < 0) { - error("resource \"afi\" not found"); + pr_err("resource \"afi\" not found"); return err; } err = dev_read_resource(dev, 2, &pcie->cs); if (err < 0) { - error("resource \"cs\" not found"); + pr_err("resource \"cs\" not found"); return err; } err = tegra_pcie_board_init(); if (err < 0) { - error("tegra_pcie_board_init() failed: err=%d", err); + pr_err("tegra_pcie_board_init() failed: err=%d", err); return err; } @@ -518,7 +518,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id, if (pcie->phy) { err = tegra_xusb_phy_prepare(pcie->phy); if (err < 0) { - error("failed to prepare PHY: %d", err); + pr_err("failed to prepare PHY: %d", err); return err; } } @@ -530,7 +530,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id, err = tegra_pcie_parse_port_info(subnode, &index, &num_lanes); if (err < 0) { - error("failed to obtain root port info"); + pr_err("failed to obtain root port info"); continue; } @@ -560,7 +560,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id, err = tegra_pcie_get_xbar_config(dev_ofnode(dev), lanes, id, &pcie->xbar); if (err < 0) { - error("invalid lane configuration"); + pr_err("invalid lane configuration"); return err; } @@ -574,31 +574,31 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie) ret = power_domain_on(&pcie->pwrdom); if (ret) { - error("power_domain_on() failed: %d\n", ret); + pr_err("power_domain_on() failed: %d\n", ret); return ret; } ret = clk_enable(&pcie->clk_afi); if (ret) { - error("clk_enable(afi) failed: %d\n", ret); + pr_err("clk_enable(afi) failed: %d\n", ret); return ret; } ret = clk_enable(&pcie->clk_pex); if (ret) { - error("clk_enable(pex) failed: %d\n", ret); + pr_err("clk_enable(pex) failed: %d\n", ret); return ret; } ret = reset_deassert(&pcie->reset_afi); if (ret) { - error("reset_deassert(afi) failed: %d\n", ret); + pr_err("reset_deassert(afi) failed: %d\n", ret); return ret; } ret = reset_deassert(&pcie->reset_pex); if (ret) { - error("reset_deassert(pex) failed: %d\n", ret); + pr_err("reset_deassert(pex) failed: %d\n", ret); return ret; } @@ -618,14 +618,14 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie) err = tegra_powergate_power_off(TEGRA_POWERGATE_PCIE); if (err < 0) { - error("failed to power off PCIe partition: %d", err); + pr_err("failed to power off PCIe partition: %d", err); return err; } err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_PCIE, PERIPH_ID_PCIE); if (err < 0) { - error("failed to power up PCIe partition: %d", err); + pr_err("failed to power up PCIe partition: %d", err); return err; } @@ -645,7 +645,7 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie) err = tegra_plle_enable(); if (err < 0) { - error("failed to enable PLLE: %d\n", err); + pr_err("failed to enable PLLE: %d\n", err); return err; } @@ -705,7 +705,7 @@ static int tegra_pcie_phy_enable(struct tegra_pcie *pcie) /* wait for the PLL to lock */ err = tegra_pcie_pll_wait(pcie, 500); if (err < 0) { - error("PLL failed to lock: %d", err); + pr_err("PLL failed to lock: %d", err); return err; } @@ -769,7 +769,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie) err = tegra_pcie_phy_enable(pcie); if (err < 0) { - error("failed to power on PHY: %d\n", err); + pr_err("failed to power on PHY: %d\n", err); return err; } #endif @@ -778,7 +778,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie) #ifdef CONFIG_TEGRA186 err = reset_deassert(&pcie->reset_pcie_x); if (err) { - error("reset_deassert(pcie_x) failed: %d\n", err); + pr_err("reset_deassert(pcie_x) failed: %d\n", err); return err; } #else @@ -1143,25 +1143,25 @@ static int pci_tegra_probe(struct udevice *dev) err = tegra_pcie_power_on(pcie); if (err < 0) { - error("failed to power on"); + pr_err("failed to power on"); return err; } err = tegra_pcie_enable_controller(pcie); if (err < 0) { - error("failed to enable controller"); + pr_err("failed to enable controller"); return err; } err = tegra_pcie_setup_translations(dev); if (err < 0) { - error("failed to decode ranges"); + pr_err("failed to decode ranges"); return err; } err = tegra_pcie_enable(pcie); if (err < 0) { - error("failed to enable PCIe"); + pr_err("failed to enable PCIe"); return err; } diff --git a/drivers/pci/pcie_ecam_generic.c b/drivers/pci/pcie_ecam_generic.c new file mode 100644 index 0000000000..c7540ff80e --- /dev/null +++ b/drivers/pci/pcie_ecam_generic.c @@ -0,0 +1,143 @@ +/* + * Generic PCIE host provided by e.g. QEMU + * + * Heavily based on drivers/pci/pcie_xilinx.c + * + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <pci.h> + +#include <asm/io.h> + +/** + * struct generic_ecam_pcie - generic_ecam PCIe controller state + * @cfg_base: The base address of memory mapped configuration space + */ +struct generic_ecam_pcie { + void *cfg_base; +}; + +/** + * pci_generic_ecam_conf_address() - Calculate the address of a config access + * @bus: Pointer to the PCI bus + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @paddress: Pointer to the pointer to write the calculates address to + * + * Calculates the address that should be accessed to perform a PCIe + * configuration space access for a given device identified by the PCIe + * controller device @pcie and the bus, device & function numbers in @bdf. If + * access to the device is not valid then the function will return an error + * code. Otherwise the address to access will be written to the pointer pointed + * to by @paddress. + */ +static int pci_generic_ecam_conf_address(struct udevice *bus, pci_dev_t bdf, + uint offset, void **paddress) +{ + struct generic_ecam_pcie *pcie = dev_get_priv(bus); + void *addr; + + addr = pcie->cfg_base; + addr += PCI_BUS(bdf) << 20; + addr += PCI_DEV(bdf) << 15; + addr += PCI_FUNC(bdf) << 12; + addr += offset; + *paddress = addr; + + return 0; +} + +/** + * pci_generic_ecam_read_config() - Read from configuration space + * @bus: Pointer to the PCI bus + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @valuep: A pointer at which to store the read value + * @size: Indicates the size of access to perform + * + * Read a value of size @size from offset @offset within the configuration + * space of the device identified by the bus, device & function numbers in @bdf + * on the PCI bus @bus. + */ +static int pci_generic_ecam_read_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong *valuep, + enum pci_size_t size) +{ + return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address, + bdf, offset, valuep, size); +} + +/** + * pci_generic_ecam_write_config() - Write to configuration space + * @bus: Pointer to the PCI bus + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @value: The value to write + * @size: Indicates the size of access to perform + * + * Write the value @value of size @size from offset @offset within the + * configuration space of the device identified by the bus, device & function + * numbers in @bdf on the PCI bus @bus. + */ +static int pci_generic_ecam_write_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong value, + enum pci_size_t size) +{ + return pci_generic_mmap_write_config(bus, pci_generic_ecam_conf_address, + bdf, offset, value, size); +} + +/** + * pci_generic_ecam_ofdata_to_platdata() - Translate from DT to device state + * @dev: A pointer to the device being operated on + * + * Translate relevant data from the device tree pertaining to device @dev into + * state that the driver will later make use of. This state is stored in the + * device's private data structure. + * + * Return: 0 on success, else -EINVAL + */ +static int pci_generic_ecam_ofdata_to_platdata(struct udevice *dev) +{ + struct generic_ecam_pcie *pcie = dev_get_priv(dev); + struct fdt_resource reg_res; + DECLARE_GLOBAL_DATA_PTR; + int err; + + err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg", + 0, ®_res); + if (err < 0) { + pr_err("\"reg\" resource not found\n"); + return err; + } + + pcie->cfg_base = map_physmem(reg_res.start, + fdt_resource_size(®_res), + MAP_NOCACHE); + + return 0; +} + +static const struct dm_pci_ops pci_generic_ecam_ops = { + .read_config = pci_generic_ecam_read_config, + .write_config = pci_generic_ecam_write_config, +}; + +static const struct udevice_id pci_generic_ecam_ids[] = { + { .compatible = "pci-host-ecam-generic" }, + { } +}; + +U_BOOT_DRIVER(pci_generic_ecam) = { + .name = "pci_generic_ecam", + .id = UCLASS_PCI, + .of_match = pci_generic_ecam_ids, + .ops = &pci_generic_ecam_ops, + .ofdata_to_platdata = pci_generic_ecam_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct generic_ecam_pcie), +}; diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index eab0a2b602..2900c8d9d1 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -431,7 +431,7 @@ static int imx_pcie_write_config(struct pci_controller *hose, pci_dev_t d, /* * Initial bus setup */ -static int imx6_pcie_assert_core_reset(void) +static int imx6_pcie_assert_core_reset(bool prepare_for_boot) { struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; @@ -459,7 +459,7 @@ static int imx6_pcie_assert_core_reset(void) * If both LTSSM_ENABLE and REF_SSP_ENABLE are active we have a strong * indication that the bootloader activated the link. */ - if (is_mx6dq()) { + if (is_mx6dq() && prepare_for_boot) { u32 val, gpr1, gpr12; gpr1 = readl(&iomuxc_regs->gpr[1]); @@ -605,7 +605,7 @@ static int imx_pcie_link_up(void) uint32_t tmp; int count = 0; - imx6_pcie_assert_core_reset(); + imx6_pcie_assert_core_reset(false); imx6_pcie_init_phy(); imx6_pcie_deassert_core_reset(); @@ -687,7 +687,7 @@ void imx_pcie_init(void) void imx_pcie_remove(void) { - imx6_pcie_assert_core_reset(); + imx6_pcie_assert_core_reset(true); } /* Probe function. */ diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 610f85c4e8..0cb7f6d564 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -241,14 +241,19 @@ static int ls_pcie_addr_valid(struct ls_pcie *pcie, pci_dev_t bdf) return 0; } -void *ls_pcie_conf_address(struct ls_pcie *pcie, pci_dev_t bdf, - int offset) +int ls_pcie_conf_address(struct udevice *bus, pci_dev_t bdf, + uint offset, void **paddress) { - struct udevice *bus = pcie->bus; + struct ls_pcie *pcie = dev_get_priv(bus); u32 busdev; - if (PCI_BUS(bdf) == bus->seq) - return pcie->dbi + offset; + if (ls_pcie_addr_valid(pcie, bdf)) + return -EINVAL; + + if (PCI_BUS(bdf) == bus->seq) { + *paddress = pcie->dbi + offset; + return 0; + } busdev = PCIE_ATU_BUS(PCI_BUS(bdf)) | PCIE_ATU_DEV(PCI_DEV(bdf)) | @@ -256,67 +261,28 @@ void *ls_pcie_conf_address(struct ls_pcie *pcie, pci_dev_t bdf, if (PCI_BUS(bdf) == bus->seq + 1) { ls_pcie_cfg0_set_busdev(pcie, busdev); - return pcie->cfg0 + offset; + *paddress = pcie->cfg0 + offset; } else { ls_pcie_cfg1_set_busdev(pcie, busdev); - return pcie->cfg1 + offset; + *paddress = pcie->cfg1 + offset; } + return 0; } static int ls_pcie_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) { - struct ls_pcie *pcie = dev_get_priv(bus); - void *address; - - if (ls_pcie_addr_valid(pcie, bdf)) { - *valuep = pci_get_ff(size); - return 0; - } - - address = ls_pcie_conf_address(pcie, bdf, offset); - - switch (size) { - case PCI_SIZE_8: - *valuep = readb(address); - return 0; - case PCI_SIZE_16: - *valuep = readw(address); - return 0; - case PCI_SIZE_32: - *valuep = readl(address); - return 0; - default: - return -EINVAL; - } + return pci_generic_mmap_read_config(bus, ls_pcie_conf_address, + bdf, offset, valuep, size); } static int ls_pcie_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) { - struct ls_pcie *pcie = dev_get_priv(bus); - void *address; - - if (ls_pcie_addr_valid(pcie, bdf)) - return 0; - - address = ls_pcie_conf_address(pcie, bdf, offset); - - switch (size) { - case PCI_SIZE_8: - writeb(value, address); - return 0; - case PCI_SIZE_16: - writew(value, address); - return 0; - case PCI_SIZE_32: - writel(value, address); - return 0; - default: - return -EINVAL; - } + return pci_generic_mmap_write_config(bus, ls_pcie_conf_address, + bdf, offset, value, size); } /* Clear multi-function bit */ diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c index 4ba32df516..57112f5333 100644 --- a/drivers/pci/pcie_xilinx.c +++ b/drivers/pci/pcie_xilinx.c @@ -41,7 +41,7 @@ static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie) /** * pcie_xilinx_config_address() - Calculate the address of a config access - * @pcie: Pointer to the PCI controller state + * @udev: Pointer to the PCI bus * @bdf: Identifies the PCIe device to access * @offset: The offset into the device's configuration space * @paddress: Pointer to the pointer to write the calculates address to @@ -55,9 +55,10 @@ static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie) * * Return: 0 on success, else -ENODEV */ -static int pcie_xilinx_config_address(struct xilinx_pcie *pcie, pci_dev_t bdf, +static int pcie_xilinx_config_address(struct udevice *udev, pci_dev_t bdf, uint offset, void **paddress) { + struct xilinx_pcie *pcie = dev_get_priv(udev); unsigned int bus = PCI_BUS(bdf); unsigned int dev = PCI_DEV(bdf); unsigned int func = PCI_FUNC(bdf); @@ -101,29 +102,8 @@ static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) { - struct xilinx_pcie *pcie = dev_get_priv(bus); - void *address; - int err; - - err = pcie_xilinx_config_address(pcie, bdf, offset, &address); - if (err < 0) { - *valuep = pci_get_ff(size); - return 0; - } - - switch (size) { - case PCI_SIZE_8: - *valuep = __raw_readb(address); - return 0; - case PCI_SIZE_16: - *valuep = __raw_readw(address); - return 0; - case PCI_SIZE_32: - *valuep = __raw_readl(address); - return 0; - default: - return -EINVAL; - } + return pci_generic_mmap_read_config(bus, pcie_xilinx_config_address, + bdf, offset, valuep, size); } /** @@ -144,27 +124,8 @@ static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) { - struct xilinx_pcie *pcie = dev_get_priv(bus); - void *address; - int err; - - err = pcie_xilinx_config_address(pcie, bdf, offset, &address); - if (err < 0) - return 0; - - switch (size) { - case PCI_SIZE_8: - __raw_writeb(value, address); - return 0; - case PCI_SIZE_16: - __raw_writew(value, address); - return 0; - case PCI_SIZE_32: - __raw_writel(value, address); - return 0; - default: - return -EINVAL; - } + return pci_generic_mmap_write_config(bus, pcie_xilinx_config_address, + bdf, offset, value, size); } /** @@ -187,7 +148,7 @@ static int pcie_xilinx_ofdata_to_platdata(struct udevice *dev) err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg", 0, ®_res); if (err < 0) { - error("\"reg\" resource not found\n"); + pr_err("\"reg\" resource not found\n"); return err; } diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c index 3ac405a9be..37187885fa 100644 --- a/drivers/phy/marvell/comphy_cp110.c +++ b/drivers/phy/marvell/comphy_cp110.c @@ -509,7 +509,7 @@ static int comphy_pcie_power_up(u32 lane, u32 pcie_width, bool clk_src, debug("Read from reg = %p - value = 0x%x\n", hpipe_addr + HPIPE_LANE_STATUS1_REG, data); - error("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n"); + pr_err("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n"); ret = 0; } } @@ -633,7 +633,7 @@ static int comphy_usb3_power_up(u32 lane, void __iomem *hpipe_base, if (data != 0) { debug("Read from reg = %p - value = 0x%x\n", hpipe_addr + HPIPE_LANE_STATUS1_REG, data); - error("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n"); + pr_err("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n"); ret = 0; } @@ -666,14 +666,14 @@ static int comphy_sata_power_up(u32 lane, void __iomem *hpipe_base, gd->fdt_blob, sata_node, "marvell,armada-8k-ahci"); if (sata_node == 0) { - error("SATA node not found in FDT\n"); + pr_err("SATA node not found in FDT\n"); return 0; } sata_base = (void __iomem *)fdtdec_get_addr_size_auto_noparent( gd->fdt_blob, sata_node, "reg", 0, NULL, true); if (sata_base == NULL) { - error("SATA address not found in FDT\n"); + pr_err("SATA address not found in FDT\n"); return 0; } @@ -976,7 +976,7 @@ static int comphy_sata_power_up(u32 lane, void __iomem *hpipe_base, if (data != 0) { debug("Read from reg = %p - value = 0x%x\n", hpipe_addr + HPIPE_LANE_STATUS1_REG, data); - error("SD_EXTERNAL_STATUS0_PLL_TX is %d, SD_EXTERNAL_STATUS0_PLL_RX is %d\n", + pr_err("SD_EXTERNAL_STATUS0_PLL_TX is %d, SD_EXTERNAL_STATUS0_PLL_RX is %d\n", (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK), (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK)); ret = 0; @@ -1099,7 +1099,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 sgmii_speed, if (data != 0) { debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data); - error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n", + pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n", (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK), (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK)); ret = 0; @@ -1117,7 +1117,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 sgmii_speed, data = polling_with_timeout(addr, data, mask, 100); if (data != 0) { debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data); - error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n"); + pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n"); ret = 0; } @@ -1398,7 +1398,7 @@ static int comphy_sfi_power_up(u32 lane, void __iomem *hpipe_base, data = polling_with_timeout(addr, data, mask, 15000); if (data != 0) { debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data); - error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n", + pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n", (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK), (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK)); ret = 0; @@ -1418,7 +1418,7 @@ static int comphy_sfi_power_up(u32 lane, void __iomem *hpipe_base, if (data != 0) { debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data); - error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n"); + pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n"); ret = 0; } @@ -1577,7 +1577,7 @@ static int comphy_rxauii_power_up(u32 lane, void __iomem *hpipe_base, if (data != 0) { debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data); - error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n", + pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n", (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK), (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK)); ret = 0; @@ -1596,7 +1596,7 @@ static int comphy_rxauii_power_up(u32 lane, void __iomem *hpipe_base, if (data != 0) { debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data); - error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n"); + pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n"); ret = 0; } @@ -1742,7 +1742,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr, mask = data; data = polling_with_timeout(addr, data, mask, 100); if (data != 0) { - error("Impedance calibration is not done\n"); + pr_err("Impedance calibration is not done\n"); debug("Read from reg = %p - value = 0x%x\n", addr, data); ret = 0; } @@ -1751,7 +1751,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr, mask = data; data = polling_with_timeout(addr, data, mask, 100); if (data != 0) { - error("PLL calibration is not done\n"); + pr_err("PLL calibration is not done\n"); debug("Read from reg = %p - value = 0x%x\n", addr, data); ret = 0; } @@ -1761,7 +1761,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr, mask = data; data = polling_with_timeout(addr, data, mask, 100); if (data != 0) { - error("PLL is not ready\n"); + pr_err("PLL is not ready\n"); debug("Read from reg = %p - value = 0x%x\n", addr, data); ret = 0; } @@ -1818,7 +1818,7 @@ static void comphy_utmi_phy_init(u32 utmi_phy_count, cp110_utmi_data[i].usb_cfg_addr, cp110_utmi_data[i].utmi_cfg_addr, cp110_utmi_data[i].utmi_phy_port)) { - error("Failed to initialize UTMI PHY %d\n", i); + pr_err("Failed to initialize UTMI PHY %d\n", i); continue; } printf("UTMI PHY %d initialized to ", i); @@ -1864,7 +1864,7 @@ void comphy_dedicated_phys_init(void) (void __iomem *)fdtdec_get_addr_size_auto_noparent( gd->fdt_blob, node, "reg", 0, NULL, true); if (cp110_utmi_data[i].utmi_base_addr == NULL) { - error("UTMI PHY base address is invalid\n"); + pr_err("UTMI PHY base address is invalid\n"); i++; continue; } @@ -1874,7 +1874,7 @@ void comphy_dedicated_phys_init(void) (void __iomem *)fdtdec_get_addr_size_auto_noparent( gd->fdt_blob, node, "reg", 1, NULL, true); if (cp110_utmi_data[i].usb_cfg_addr == NULL) { - error("UTMI PHY base address is invalid\n"); + pr_err("UTMI PHY base address is invalid\n"); i++; continue; } @@ -1884,7 +1884,7 @@ void comphy_dedicated_phys_init(void) (void __iomem *)fdtdec_get_addr_size_auto_noparent( gd->fdt_blob, node, "reg", 2, NULL, true); if (cp110_utmi_data[i].utmi_cfg_addr == NULL) { - error("UTMI PHY base address is invalid\n"); + pr_err("UTMI PHY base address is invalid\n"); i++; continue; } @@ -1896,7 +1896,7 @@ void comphy_dedicated_phys_init(void) cp110_utmi_data[i].utmi_phy_port = fdtdec_get_int( gd->fdt_blob, node, "utmi-port", UTMI_PHY_INVALID); if (cp110_utmi_data[i].utmi_phy_port == UTMI_PHY_INVALID) { - error("UTMI PHY port type is invalid\n"); + pr_err("UTMI PHY port type is invalid\n"); i++; continue; } @@ -2049,7 +2049,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg, * PHY_TYPE_UNCONNECTED state. */ ptr_comphy_map->type = PHY_TYPE_UNCONNECTED; - error("PLL is not locked - Failed to initialize lane %d\n", + pr_err("PLL is not locked - Failed to initialize lane %d\n", lane); } } diff --git a/drivers/phy/sti_usb_phy.c b/drivers/phy/sti_usb_phy.c index 0e0b1c02d2..88fcfbb3e5 100644 --- a/drivers/phy/sti_usb_phy.c +++ b/drivers/phy/sti_usb_phy.c @@ -47,13 +47,13 @@ static int sti_usb_phy_deassert(struct sti_usb_phy *phy) ret = reset_deassert(&phy->global_ctl); if (ret < 0) { - error("PHY global deassert failed: %d", ret); + pr_err("PHY global deassert failed: %d", ret); return ret; } ret = reset_deassert(&phy->port_ctl); if (ret < 0) - error("PHY port deassert failed: %d", ret); + pr_err("PHY port deassert failed: %d", ret); return ret; } @@ -85,13 +85,13 @@ static int sti_usb_phy_exit(struct phy *usb_phy) ret = reset_assert(&phy->port_ctl); if (ret < 0) { - error("PHY port assert failed: %d", ret); + pr_err("PHY port assert failed: %d", ret); return ret; } ret = reset_assert(&phy->global_ctl); if (ret < 0) - error("PHY global assert failed: %d", ret); + pr_err("PHY global assert failed: %d", ret); return ret; } @@ -114,20 +114,20 @@ int sti_usb_phy_probe(struct udevice *dev) &syscfg_phandle); if (ret < 0) { - error("Can't get syscfg phandle: %d\n", ret); + pr_err("Can't get syscfg phandle: %d\n", ret); return ret; } ret = uclass_get_device_by_ofnode(UCLASS_SYSCON, syscfg_phandle.node, &syscon); if (ret) { - error("unable to find syscon device (%d)\n", ret); + pr_err("unable to find syscon device (%d)\n", ret); return ret; } priv->regmap = syscon_get_regmap(syscon); if (!priv->regmap) { - error("unable to find regmap\n"); + pr_err("unable to find regmap\n"); return -ENODEV; } @@ -137,12 +137,12 @@ int sti_usb_phy_probe(struct udevice *dev) ARRAY_SIZE(cells)); if (count < 0) { - error("Bad PHY st,syscfg property %d\n", count); + pr_err("Bad PHY st,syscfg property %d\n", count); return -EINVAL; } if (count > PHYPARAM_NB) { - error("Unsupported PHY param count %d\n", count); + pr_err("Unsupported PHY param count %d\n", count); return -EINVAL; } @@ -152,14 +152,14 @@ int sti_usb_phy_probe(struct udevice *dev) /* get global reset control */ ret = reset_get_by_name(dev, "global", &priv->global_ctl); if (ret) { - error("can't get global reset for %s (%d)", dev->name, ret); + pr_err("can't get global reset for %s (%d)", dev->name, ret); return ret; } /* get port reset control */ ret = reset_get_by_name(dev, "port", &priv->port_ctl); if (ret) { - error("can't get port reset for %s (%d)", dev->name, ret); + pr_err("can't get port reset for %s (%d)", dev->name, ret); return ret; } diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c index 680e32f3ea..babf2ffe39 100644 --- a/drivers/phy/ti-pipe3-phy.c +++ b/drivers/phy/ti-pipe3-phy.c @@ -261,7 +261,7 @@ static int pipe3_exit(struct phy *phy) } while (--timeout); if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) { - error("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n", + pr_err("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n", __func__, val); return -EBUSY; } @@ -284,14 +284,14 @@ static void *get_reg(struct udevice *dev, const char *name) err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, name, &syscon); if (err) { - error("unable to find syscon device for %s (%d)\n", + pr_err("unable to find syscon device for %s (%d)\n", name, err); return NULL; } regmap = syscon_get_regmap(syscon); if (IS_ERR(regmap)) { - error("unable to find regmap for %s (%ld)\n", + pr_err("unable to find regmap for %s (%ld)\n", name, PTR_ERR(regmap)); return NULL; } @@ -299,7 +299,7 @@ static void *get_reg(struct udevice *dev, const char *name) cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), name, &len); if (len < 2*sizeof(fdt32_t)) { - error("offset not available for %s\n", name); + pr_err("offset not available for %s\n", name); return NULL; } @@ -318,13 +318,13 @@ static int pipe3_phy_probe(struct udevice *dev) addr = devfdt_get_addr_size_index(dev, 2, &sz); if (addr == FDT_ADDR_T_NONE) { - error("missing pll ctrl address\n"); + pr_err("missing pll ctrl address\n"); return -EINVAL; } pipe3->pll_ctrl_base = map_physmem(addr, sz, MAP_NOCACHE); if (!pipe3->pll_ctrl_base) { - error("unable to remap pll ctrl\n"); + pr_err("unable to remap pll ctrl\n"); return -EINVAL; } diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index bcbe4a18c1..afca56dff1 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -292,6 +292,7 @@ endif source "drivers/pinctrl/meson/Kconfig" source "drivers/pinctrl/nxp/Kconfig" +source "drivers/pinctrl/renesas/Kconfig" source "drivers/pinctrl/uniphier/Kconfig" source "drivers/pinctrl/exynos/Kconfig" source "drivers/pinctrl/mvebu/Kconfig" diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 64da7c608b..8c04028dfb 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o obj-y += nxp/ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_ATH79) += ath79/ +obj-$(CONFIG_ARCH_RMOBILE) += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index 27165b0007..2bf853eba1 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -578,7 +578,7 @@ int armada_37xx_pinctrl_probe(struct udevice *dev) info->base = (void __iomem *)devfdt_get_addr(dev); if (!info->base) { - error("unable to find regmap\n"); + pr_err("unable to find regmap\n"); return -ENODEV; } diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c index 40341b4eeb..735e412f60 100644 --- a/drivers/pinctrl/pinctrl-sti.c +++ b/drivers/pinctrl/pinctrl-sti.c @@ -142,7 +142,7 @@ void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc) break; default: - error("%s invalid direction value: 0x%x\n", + pr_err("%s invalid direction value: 0x%x\n", __func__, pin_desc->dir); BUG(); break; @@ -237,14 +237,14 @@ static int sti_pinctrl_set_state(struct udevice *dev, struct udevice *config) prop_name, "#gpio-cells", 0, 0, &args); if (ret < 0) { - error("Can't get the gpio bank phandle: %d\n", ret); + pr_err("Can't get the gpio bank phandle: %d\n", ret); return ret; } bank_name = fdt_getprop(blob, args.node, "st,bank-name", &count); if (count < 0) { - error("Can't find bank-name property %d\n", count); + pr_err("Can't find bank-name property %d\n", count); return -EINVAL; } @@ -254,12 +254,12 @@ static int sti_pinctrl_set_state(struct udevice *dev, struct udevice *config) prop_name, cells, ARRAY_SIZE(cells)); if (count < 0) { - error("Bad pin configuration array %d\n", count); + pr_err("Bad pin configuration array %d\n", count); return -EINVAL; } if (count > MAX_STI_PINCONF_ENTRIES) { - error("Unsupported pinconf array count %d\n", count); + pr_err("Unsupported pinconf array count %d\n", count); return -EINVAL; } @@ -284,13 +284,13 @@ static int sti_pinctrl_probe(struct udevice *dev) err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "st,syscfg", &syscon); if (err) { - error("unable to find syscon device\n"); + pr_err("unable to find syscon device\n"); return err; } plat->regmap = syscon_get_regmap(syscon); if (!plat->regmap) { - error("unable to find regmap\n"); + pr_err("unable to find regmap\n"); return -ENODEV; } diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index bf2a86c636..51fdfb3851 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -160,7 +160,7 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev, config_node = fdt_node_offset_by_phandle(fdt, phandle); if (config_node < 0) { - error("prop pinctrl-0 index %d invalid phandle\n", i); + pr_err("prop pinctrl-0 index %d invalid phandle\n", i); return -EINVAL; } diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig new file mode 100644 index 0000000000..016ed38529 --- /dev/null +++ b/drivers/pinctrl/renesas/Kconfig @@ -0,0 +1,31 @@ +if ARCH_RMOBILE + +config PINCTRL_PFC + bool "Renesas pin control drivers" + depends on DM && ARCH_RMOBILE + help + Enable support for clock present on Renesas RCar SoCs. + +config PINCTRL_PFC_R8A7795 + bool "Renesas RCar Gen3 R8A7795 pin control driver" + def_bool y if R8A7795 + depends on PINCTRL_PFC + help + Support pin multiplexing control on Renesas RCar Gen3 R8A7795 SoCs. + + The driver is controlled by a device tree node which contains both + the GPIO definitions and pin control functions for each available + multiplex function. + +config PINCTRL_PFC_R8A7796 + bool "Renesas RCar Gen3 R8A7796 pin control driver" + def_bool y if R8A7796 + depends on PINCTRL_PFC + help + Support pin multiplexing control on Renesas RCar Gen3 R8A7796 SoCs. + + The driver is controlled by a device tree node which contains both + the GPIO definitions and pin control functions for each available + multiplex function. + +endif diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile new file mode 100644 index 0000000000..ebf80acd71 --- /dev/null +++ b/drivers/pinctrl/renesas/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_PINCTRL_PFC) += pfc.o +obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o +obj-$(CONFIG_PINCTRL_PFC_R8A7796) += pfc-r8a7796.o diff --git a/drivers/pinctrl/renesas/pfc-r8a7795.c b/drivers/pinctrl/renesas/pfc-r8a7795.c new file mode 100644 index 0000000000..43eef69025 --- /dev/null +++ b/drivers/pinctrl/renesas/pfc-r8a7795.c @@ -0,0 +1,4898 @@ +/* + * R8A7795 ES2.0+ processor support - PFC hardware block. + * + * Copyright (C) 2015-2016 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <dm/pinctrl.h> +#include <linux/kernel.h> + +#include "sh_pfc.h" + +#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \ + SH_PFC_PIN_CFG_PULL_UP | \ + SH_PFC_PIN_CFG_PULL_DOWN) + +#define CPU_ALL_PORT(fn, sfx) \ + PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_28(1, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) +/* + * F_() : just information + * FM() : macro for FN_xxx / xxx_MARK + */ + +/* GPSR0 */ +#define GPSR0_15 F_(D15, IP7_11_8) +#define GPSR0_14 F_(D14, IP7_7_4) +#define GPSR0_13 F_(D13, IP7_3_0) +#define GPSR0_12 F_(D12, IP6_31_28) +#define GPSR0_11 F_(D11, IP6_27_24) +#define GPSR0_10 F_(D10, IP6_23_20) +#define GPSR0_9 F_(D9, IP6_19_16) +#define GPSR0_8 F_(D8, IP6_15_12) +#define GPSR0_7 F_(D7, IP6_11_8) +#define GPSR0_6 F_(D6, IP6_7_4) +#define GPSR0_5 F_(D5, IP6_3_0) +#define GPSR0_4 F_(D4, IP5_31_28) +#define GPSR0_3 F_(D3, IP5_27_24) +#define GPSR0_2 F_(D2, IP5_23_20) +#define GPSR0_1 F_(D1, IP5_19_16) +#define GPSR0_0 F_(D0, IP5_15_12) + +/* GPSR1 */ +#define GPSR1_27 F_(EX_WAIT0_A, IP5_11_8) +#define GPSR1_26 F_(WE1_N, IP5_7_4) +#define GPSR1_25 F_(WE0_N, IP5_3_0) +#define GPSR1_24 F_(RD_WR_N, IP4_31_28) +#define GPSR1_23 F_(RD_N, IP4_27_24) +#define GPSR1_22 F_(BS_N, IP4_23_20) +#define GPSR1_21 F_(CS1_N, IP4_19_16) +#define GPSR1_20 F_(CS0_N, IP4_15_12) +#define GPSR1_19 F_(A19, IP4_11_8) +#define GPSR1_18 F_(A18, IP4_7_4) +#define GPSR1_17 F_(A17, IP4_3_0) +#define GPSR1_16 F_(A16, IP3_31_28) +#define GPSR1_15 F_(A15, IP3_27_24) +#define GPSR1_14 F_(A14, IP3_23_20) +#define GPSR1_13 F_(A13, IP3_19_16) +#define GPSR1_12 F_(A12, IP3_15_12) +#define GPSR1_11 F_(A11, IP3_11_8) +#define GPSR1_10 F_(A10, IP3_7_4) +#define GPSR1_9 F_(A9, IP3_3_0) +#define GPSR1_8 F_(A8, IP2_31_28) +#define GPSR1_7 F_(A7, IP2_27_24) +#define GPSR1_6 F_(A6, IP2_23_20) +#define GPSR1_5 F_(A5, IP2_19_16) +#define GPSR1_4 F_(A4, IP2_15_12) +#define GPSR1_3 F_(A3, IP2_11_8) +#define GPSR1_2 F_(A2, IP2_7_4) +#define GPSR1_1 F_(A1, IP2_3_0) +#define GPSR1_0 F_(A0, IP1_31_28) + +/* GPSR2 */ +#define GPSR2_14 F_(AVB_AVTP_CAPTURE_A, IP0_23_20) +#define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16) +#define GPSR2_12 F_(AVB_LINK, IP0_15_12) +#define GPSR2_11 F_(AVB_PHY_INT, IP0_11_8) +#define GPSR2_10 F_(AVB_MAGIC, IP0_7_4) +#define GPSR2_9 F_(AVB_MDC, IP0_3_0) +#define GPSR2_8 F_(PWM2_A, IP1_27_24) +#define GPSR2_7 F_(PWM1_A, IP1_23_20) +#define GPSR2_6 F_(PWM0, IP1_19_16) +#define GPSR2_5 F_(IRQ5, IP1_15_12) +#define GPSR2_4 F_(IRQ4, IP1_11_8) +#define GPSR2_3 F_(IRQ3, IP1_7_4) +#define GPSR2_2 F_(IRQ2, IP1_3_0) +#define GPSR2_1 F_(IRQ1, IP0_31_28) +#define GPSR2_0 F_(IRQ0, IP0_27_24) + +/* GPSR3 */ +#define GPSR3_15 F_(SD1_WP, IP11_23_20) +#define GPSR3_14 F_(SD1_CD, IP11_19_16) +#define GPSR3_13 F_(SD0_WP, IP11_15_12) +#define GPSR3_12 F_(SD0_CD, IP11_11_8) +#define GPSR3_11 F_(SD1_DAT3, IP8_31_28) +#define GPSR3_10 F_(SD1_DAT2, IP8_27_24) +#define GPSR3_9 F_(SD1_DAT1, IP8_23_20) +#define GPSR3_8 F_(SD1_DAT0, IP8_19_16) +#define GPSR3_7 F_(SD1_CMD, IP8_15_12) +#define GPSR3_6 F_(SD1_CLK, IP8_11_8) +#define GPSR3_5 F_(SD0_DAT3, IP8_7_4) +#define GPSR3_4 F_(SD0_DAT2, IP8_3_0) +#define GPSR3_3 F_(SD0_DAT1, IP7_31_28) +#define GPSR3_2 F_(SD0_DAT0, IP7_27_24) +#define GPSR3_1 F_(SD0_CMD, IP7_23_20) +#define GPSR3_0 F_(SD0_CLK, IP7_19_16) + +/* GPSR4 */ +#define GPSR4_17 F_(SD3_DS, IP11_7_4) +#define GPSR4_16 F_(SD3_DAT7, IP11_3_0) +#define GPSR4_15 F_(SD3_DAT6, IP10_31_28) +#define GPSR4_14 F_(SD3_DAT5, IP10_27_24) +#define GPSR4_13 F_(SD3_DAT4, IP10_23_20) +#define GPSR4_12 F_(SD3_DAT3, IP10_19_16) +#define GPSR4_11 F_(SD3_DAT2, IP10_15_12) +#define GPSR4_10 F_(SD3_DAT1, IP10_11_8) +#define GPSR4_9 F_(SD3_DAT0, IP10_7_4) +#define GPSR4_8 F_(SD3_CMD, IP10_3_0) +#define GPSR4_7 F_(SD3_CLK, IP9_31_28) +#define GPSR4_6 F_(SD2_DS, IP9_27_24) +#define GPSR4_5 F_(SD2_DAT3, IP9_23_20) +#define GPSR4_4 F_(SD2_DAT2, IP9_19_16) +#define GPSR4_3 F_(SD2_DAT1, IP9_15_12) +#define GPSR4_2 F_(SD2_DAT0, IP9_11_8) +#define GPSR4_1 F_(SD2_CMD, IP9_7_4) +#define GPSR4_0 F_(SD2_CLK, IP9_3_0) + +/* GPSR5 */ +#define GPSR5_25 F_(MLB_DAT, IP14_19_16) +#define GPSR5_24 F_(MLB_SIG, IP14_15_12) +#define GPSR5_23 F_(MLB_CLK, IP14_11_8) +#define GPSR5_22 FM(MSIOF0_RXD) +#define GPSR5_21 F_(MSIOF0_SS2, IP14_7_4) +#define GPSR5_20 FM(MSIOF0_TXD) +#define GPSR5_19 F_(MSIOF0_SS1, IP14_3_0) +#define GPSR5_18 F_(MSIOF0_SYNC, IP13_31_28) +#define GPSR5_17 FM(MSIOF0_SCK) +#define GPSR5_16 F_(HRTS0_N, IP13_27_24) +#define GPSR5_15 F_(HCTS0_N, IP13_23_20) +#define GPSR5_14 F_(HTX0, IP13_19_16) +#define GPSR5_13 F_(HRX0, IP13_15_12) +#define GPSR5_12 F_(HSCK0, IP13_11_8) +#define GPSR5_11 F_(RX2_A, IP13_7_4) +#define GPSR5_10 F_(TX2_A, IP13_3_0) +#define GPSR5_9 F_(SCK2, IP12_31_28) +#define GPSR5_8 F_(RTS1_N_TANS, IP12_27_24) +#define GPSR5_7 F_(CTS1_N, IP12_23_20) +#define GPSR5_6 F_(TX1_A, IP12_19_16) +#define GPSR5_5 F_(RX1_A, IP12_15_12) +#define GPSR5_4 F_(RTS0_N_TANS, IP12_11_8) +#define GPSR5_3 F_(CTS0_N, IP12_7_4) +#define GPSR5_2 F_(TX0, IP12_3_0) +#define GPSR5_1 F_(RX0, IP11_31_28) +#define GPSR5_0 F_(SCK0, IP11_27_24) + +/* GPSR6 */ +#define GPSR6_31 F_(USB2_CH3_OVC, IP18_7_4) +#define GPSR6_30 F_(USB2_CH3_PWEN, IP18_3_0) +#define GPSR6_29 F_(USB30_OVC, IP17_31_28) +#define GPSR6_28 F_(USB30_PWEN, IP17_27_24) +#define GPSR6_27 F_(USB1_OVC, IP17_23_20) +#define GPSR6_26 F_(USB1_PWEN, IP17_19_16) +#define GPSR6_25 F_(USB0_OVC, IP17_15_12) +#define GPSR6_24 F_(USB0_PWEN, IP17_11_8) +#define GPSR6_23 F_(AUDIO_CLKB_B, IP17_7_4) +#define GPSR6_22 F_(AUDIO_CLKA_A, IP17_3_0) +#define GPSR6_21 F_(SSI_SDATA9_A, IP16_31_28) +#define GPSR6_20 F_(SSI_SDATA8, IP16_27_24) +#define GPSR6_19 F_(SSI_SDATA7, IP16_23_20) +#define GPSR6_18 F_(SSI_WS78, IP16_19_16) +#define GPSR6_17 F_(SSI_SCK78, IP16_15_12) +#define GPSR6_16 F_(SSI_SDATA6, IP16_11_8) +#define GPSR6_15 F_(SSI_WS6, IP16_7_4) +#define GPSR6_14 F_(SSI_SCK6, IP16_3_0) +#define GPSR6_13 FM(SSI_SDATA5) +#define GPSR6_12 FM(SSI_WS5) +#define GPSR6_11 FM(SSI_SCK5) +#define GPSR6_10 F_(SSI_SDATA4, IP15_31_28) +#define GPSR6_9 F_(SSI_WS4, IP15_27_24) +#define GPSR6_8 F_(SSI_SCK4, IP15_23_20) +#define GPSR6_7 F_(SSI_SDATA3, IP15_19_16) +#define GPSR6_6 F_(SSI_WS349, IP15_15_12) +#define GPSR6_5 F_(SSI_SCK349, IP15_11_8) +#define GPSR6_4 F_(SSI_SDATA2_A, IP15_7_4) +#define GPSR6_3 F_(SSI_SDATA1_A, IP15_3_0) +#define GPSR6_2 F_(SSI_SDATA0, IP14_31_28) +#define GPSR6_1 F_(SSI_WS01239, IP14_27_24) +#define GPSR6_0 F_(SSI_SCK01239, IP14_23_20) + +/* GPSR7 */ +#define GPSR7_3 FM(HDMI1_CEC) +#define GPSR7_2 FM(HDMI0_CEC) +#define GPSR7_1 FM(AVS2) +#define GPSR7_0 FM(AVS1) + + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP0_3_0 FM(AVB_MDC) F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_7_4 FM(AVB_MAGIC) F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_11_8 FM(AVB_PHY_INT) F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) FM(FSCLKST2_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_23_20 FM(AVB_AVTP_CAPTURE_A) F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_TANS_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_31_28 FM(IRQ1) FM(QPOLA) F_(0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_3_0 FM(IRQ2) FM(QCPV_QDE) F_(0, 0) FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(VI4_DATA2_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SYNC_E) F_(0, 0) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) FM(A25) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) FM(A24) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_15_12 FM(IRQ5) FM(QSTB_QHE) FM(A23) FM(DU_EXVSYNC_DU_VSYNC) FM(VI4_DATA5_B) FM(FSCLKST2_N_B) F_(0, 0) FM(MSIOF3_TXD_E) F_(0, 0) FM(PWM6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_19_16 FM(PWM0) FM(AVB_AVTP_PPS)FM(A22) F_(0, 0) FM(VI4_DATA6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IECLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_23_20 FM(PWM1_A) F_(0, 0) FM(A21) FM(HRX3_D) FM(VI4_DATA7_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IERX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_27_24 FM(PWM2_A) F_(0, 0) FM(A20) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_31_28 FM(A0) FM(LCDOUT16) FM(MSIOF3_SYNC_B) F_(0, 0) FM(VI4_DATA8) F_(0, 0) FM(DU_DB0) F_(0, 0) F_(0, 0) FM(PWM3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1) F_(0, 0) F_(0, 0) FM(PWM4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(SDA6_A) FM(AVB_AVTP_MATCH_B) FM(PWM1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_TANS_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0) FM(SCL6_A) FM(AVB_AVTP_CAPTURE_B) FM(PWM2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_15_12 FM(A12) FM(LCDOUT12) FM(MSIOF3_SCK_C) F_(0, 0) FM(HRX4_A) FM(VI5_DATA8) FM(DU_DG4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_19_16 FM(A13) FM(LCDOUT13) FM(MSIOF3_SYNC_C) F_(0, 0) FM(HTX4_A) FM(VI5_DATA9) FM(DU_DG5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_23_20 FM(A14) FM(LCDOUT14) FM(MSIOF3_RXD_C) F_(0, 0) FM(HCTS4_N) FM(VI5_DATA10) FM(DU_DG6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(DU_DG7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_31_28 FM(A16) FM(LCDOUT8) F_(0, 0) F_(0, 0) FM(VI4_FIELD) F_(0, 0) FM(DU_DG0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_11_8 FM(A19) FM(LCDOUT11) F_(0, 0) F_(0, 0) FM(VI4_CLKENB) F_(0, 0) FM(DU_DG3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_19_16 FM(CS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLK) F_(0, 0) FM(EX_WAIT0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_23_20 FM(BS_N) FM(QSTVA_QVS) FM(MSIOF3_SCK_D) FM(SCK3) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN1_TX) FM(CANFD1_TX) FM(IETX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN0_TX_A) FM(CANFD0_TX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_31_28 FM(RD_WR_N) F_(0, 0) FM(MSIOF3_RXD_D) FM(TX3_A) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN0_RX_A) FM(CANFD0_RX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_3_0 FM(WE0_N) F_(0, 0) FM(MSIOF3_TXD_D) FM(CTS3_N) FM(HCTS3_N) F_(0, 0) F_(0, 0) FM(SCL6_B) FM(CAN_CLK) F_(0, 0) FM(IECLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_7_4 FM(WE1_N) F_(0, 0) FM(MSIOF3_SS1_D) FM(RTS3_N_TANS) FM(HRTS3_N) F_(0, 0) F_(0, 0) FM(SDA6_B) FM(CAN1_RX) FM(CANFD1_RX) FM(IERX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_11_8 FM(EX_WAIT0_A) FM(QCLK) F_(0, 0) F_(0, 0) FM(VI4_CLK) F_(0, 0) FM(DU_DOTCLKOUT0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_19_16 FM(D1) FM(MSIOF2_SS2_B)FM(MSIOF3_SYNC_A) F_(0, 0) FM(VI4_DATA17) FM(VI5_DATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_23_20 FM(D2) F_(0, 0) FM(MSIOF3_RXD_A) F_(0, 0) FM(VI4_DATA18) FM(VI5_DATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_7_4 FM(D6) FM(MSIOF2_RXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA22) FM(VI5_DATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_11_8 FM(D7) FM(MSIOF2_TXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA23) FM(VI5_DATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_15_12 FM(D8) FM(LCDOUT0) FM(MSIOF2_SCK_D) FM(SCK4_C) FM(VI4_DATA0_A) F_(0, 0) FM(DU_DR0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_19_16 FM(D9) FM(LCDOUT1) FM(MSIOF2_SYNC_D) F_(0, 0) FM(VI4_DATA1_A) F_(0, 0) FM(DU_DR1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_23_20 FM(D10) FM(LCDOUT2) FM(MSIOF2_RXD_D) FM(HRX3_B) FM(VI4_DATA2_A) FM(CTS4_N_C) FM(DU_DR2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_TANS_C)FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_3_0 FM(D13) FM(LCDOUT5) FM(MSIOF2_SS2_D) FM(TX4_C) FM(VI4_DATA5_A) F_(0, 0) FM(DU_DR5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_7_4 FM(D14) FM(LCDOUT6) FM(MSIOF3_SS1_A) FM(HRX3_C) FM(VI4_DATA6_A) F_(0, 0) FM(DU_DR6) FM(SCL6_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_11_8 FM(D15) FM(LCDOUT7) FM(MSIOF3_SS2_A) FM(HTX3_C) FM(VI4_DATA7_A) F_(0, 0) FM(DU_DR7) FM(SDA6_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_19_16 FM(SD0_CLK) F_(0, 0) FM(MSIOF1_SCK_E) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP7_23_20 FM(SD0_CMD) F_(0, 0) FM(MSIOF1_SYNC_E) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_27_24 FM(SD0_DAT0) F_(0, 0) FM(MSIOF1_RXD_E) F_(0, 0) F_(0, 0) FM(TS_SCK0_B) FM(STP_ISCLK_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_31_28 FM(SD0_DAT1) F_(0, 0) FM(MSIOF1_TXD_E) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_B)FM(STP_ISSYNC_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_3_0 FM(SD0_DAT2) F_(0, 0) FM(MSIOF1_SS1_E) F_(0, 0) F_(0, 0) FM(TS_SDAT0_B) FM(STP_ISD_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_7_4 FM(SD0_DAT3) F_(0, 0) FM(MSIOF1_SS2_E) F_(0, 0) F_(0, 0) FM(TS_SDEN0_B) FM(STP_ISEN_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_15_12 FM(SD1_CMD) F_(0, 0) FM(MSIOF1_SYNC_G) FM(NFCE_N_B) F_(0, 0) FM(SIM0_D_A) FM(STP_IVCXO27_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_19_16 FM(SD1_DAT0) FM(SD2_DAT4) FM(MSIOF1_RXD_G) FM(NFWP_N_B) F_(0, 0) FM(TS_SCK1_B) FM(STP_ISCLK_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_23_20 FM(SD1_DAT1) FM(SD2_DAT5) FM(MSIOF1_TXD_G) FM(NFDATA14_B) F_(0, 0) FM(TS_SPSYNC1_B)FM(STP_ISSYNC_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_27_24 FM(SD1_DAT2) FM(SD2_DAT6) FM(MSIOF1_SS1_G) FM(NFDATA15_B) F_(0, 0) FM(TS_SDAT1_B) FM(STP_ISD_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_31_28 FM(SD1_DAT3) FM(SD2_DAT7) FM(MSIOF1_SS2_G) FM(NFRB_N_B) F_(0, 0) FM(TS_SDEN1_B) FM(STP_ISEN_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_3_0 FM(SD2_CLK) F_(0, 0) FM(NFDATA8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_7_4 FM(SD2_CMD) F_(0, 0) FM(NFDATA9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_11_8 FM(SD2_DAT0) F_(0, 0) FM(NFDATA10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_15_12 FM(SD2_DAT1) F_(0, 0) FM(NFDATA11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_19_16 FM(SD2_DAT2) F_(0, 0) FM(NFDATA12) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_23_20 FM(SD2_DAT3) F_(0, 0) FM(NFDATA13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_27_24 FM(SD2_DS) F_(0, 0) FM(NFALE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(SATA_DEVSLP_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_3_0 FM(SD3_CMD) F_(0, 0) FM(NFRE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_11_8 FM(SD3_DAT1) F_(0, 0) FM(NFDATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_15_12 FM(SD3_DAT2) F_(0, 0) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_19_16 FM(SD3_DAT3) F_(0, 0) FM(NFDATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_23_20 FM(SD3_DAT4) FM(SD2_CD_A) FM(NFDATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_31_28 FM(SD3_DAT6) FM(SD3_CD) FM(NFDATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_3_0 FM(SD3_DAT7) FM(SD3_WP) FM(NFDATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_7_4 FM(SD3_DS) F_(0, 0) FM(NFCLE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_11_8 FM(SD0_CD) F_(0, 0) FM(NFDATA14_A) F_(0, 0) FM(SCL2_B) FM(SIM0_RST_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP11_15_12 FM(SD0_WP) F_(0, 0) FM(NFDATA15_A) F_(0, 0) FM(SDA2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_19_16 FM(SD1_CD) F_(0, 0) FM(NFRB_N_A) F_(0, 0) F_(0, 0) FM(SIM0_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_23_20 FM(SD1_WP) F_(0, 0) FM(NFCE_N_A) F_(0, 0) F_(0, 0) FM(SIM0_D_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_27_24 FM(SCK0) FM(HSCK1_B) FM(MSIOF1_SS2_B) FM(AUDIO_CLKC_B) FM(SDA2_A) FM(SIM0_RST_B) FM(STP_OPWM_0_C) FM(RIF0_CLK_B) F_(0, 0) FM(ADICHS2) FM(SCK5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_C) FM(RIF0_D0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_3_0 FM(TX0) FM(HTX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_C)FM(STP_ISSYNC_0_C) FM(RIF0_D1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_7_4 FM(CTS0_N) FM(HCTS1_N_B) FM(MSIOF1_SYNC_B) F_(0, 0) F_(0, 0) FM(TS_SPSYNC1_C)FM(STP_ISSYNC_1_C) FM(RIF1_SYNC_B) FM(AUDIO_CLKOUT_C) FM(ADICS_SAMP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_11_8 FM(RTS0_N_TANS) FM(HRTS1_N_B) FM(MSIOF1_SS1_B) FM(AUDIO_CLKA_B) FM(SCL2_A) F_(0, 0) FM(STP_IVCXO27_1_C) FM(RIF0_SYNC_B) F_(0, 0) FM(ADICHS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_15_12 FM(RX1_A) FM(HRX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDAT0_C) FM(STP_ISD_0_C) FM(RIF1_CLK_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0_C) FM(RIF1_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_23_20 FM(CTS1_N) FM(HCTS1_N_A) FM(MSIOF1_RXD_B) F_(0, 0) F_(0, 0) FM(TS_SDEN1_C) FM(STP_ISEN_1_C) FM(RIF1_D0_B) F_(0, 0) FM(ADIDATA) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_27_24 FM(RTS1_N_TANS) FM(HRTS1_N_A) FM(MSIOF1_TXD_B) F_(0, 0) F_(0, 0) FM(TS_SDAT1_C) FM(STP_ISD_1_C) FM(RIF1_D1_B) F_(0, 0) FM(ADICHS0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_31_28 FM(SCK2) FM(SCIF_CLK_B) FM(MSIOF1_SCK_B) F_(0, 0) F_(0, 0) FM(TS_SCK1_C) FM(STP_ISCLK_1_C) FM(RIF1_CLK_B) F_(0, 0) FM(ADICLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_3_0 FM(TX2_A) F_(0, 0) F_(0, 0) FM(SD2_CD_B) FM(SCL1_A) F_(0, 0) FM(FMCLK_A) FM(RIF1_D1_C) F_(0, 0) FM(FSO_CFE_0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_7_4 FM(RX2_A) F_(0, 0) F_(0, 0) FM(SD2_WP_B) FM(SDA1_A) F_(0, 0) FM(FMIN_A) FM(RIF1_SYNC_C) F_(0, 0) FM(FSO_CFE_1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_11_8 FM(HSCK0) F_(0, 0) FM(MSIOF1_SCK_D) FM(AUDIO_CLKB_A) FM(SSI_SDATA1_B)FM(TS_SCK0_D) FM(STP_ISCLK_0_D) FM(RIF0_CLK_C) F_(0, 0) F_(0, 0) FM(RX5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_15_12 FM(HRX0) F_(0, 0) FM(MSIOF1_RXD_D) F_(0, 0) FM(SSI_SDATA2_B)FM(TS_SDEN0_D) FM(STP_ISEN_0_D) FM(RIF0_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_19_16 FM(HTX0) F_(0, 0) FM(MSIOF1_TXD_D) F_(0, 0) FM(SSI_SDATA9_B)FM(TS_SDAT0_D) FM(STP_ISD_0_D) FM(RIF0_D1_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_23_20 FM(HCTS0_N) FM(RX2_B) FM(MSIOF1_SYNC_D) F_(0, 0) FM(SSI_SCK9_A) FM(TS_SPSYNC0_D)FM(STP_ISSYNC_0_D) FM(RIF0_SYNC_C) FM(AUDIO_CLKOUT1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_27_24 FM(HRTS0_N) FM(TX2_B) FM(MSIOF1_SS1_D) F_(0, 0) FM(SSI_WS9_A) F_(0, 0) FM(STP_IVCXO27_0_D) FM(BPFCLK_A) FM(AUDIO_CLKOUT2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_31_28 FM(MSIOF0_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT_A) F_(0, 0) FM(TX5_B) F_(0, 0) F_(0, 0) FM(BPFCLK_D) F_(0, 0) F_(0, 0) +#define IP14_3_0 FM(MSIOF0_SS1) FM(RX5_A) FM(NFWP_N_A) FM(AUDIO_CLKA_C) FM(SSI_SCK2_A) F_(0, 0) FM(STP_IVCXO27_0_C) F_(0, 0) FM(AUDIO_CLKOUT3_A) F_(0, 0) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_7_4 FM(MSIOF0_SS2) FM(TX5_A) FM(MSIOF1_SS2_D) FM(AUDIO_CLKC_A) FM(SSI_WS2_A) F_(0, 0) FM(STP_OPWM_0_D) F_(0, 0) FM(AUDIO_CLKOUT_D) F_(0, 0) FM(SPEEDIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_11_8 FM(MLB_CLK) F_(0, 0) FM(MSIOF1_SCK_F) F_(0, 0) FM(SCL1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_15_12 FM(MLB_SIG) FM(RX1_B) FM(MSIOF1_SYNC_F) F_(0, 0) FM(SDA1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_19_16 FM(MLB_DAT) FM(TX1_B) FM(MSIOF1_RXD_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_23_20 FM(SSI_SCK01239) F_(0, 0) FM(MSIOF1_TXD_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_27_24 FM(SSI_WS01239) F_(0, 0) FM(MSIOF1_SS1_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP14_31_28 FM(SSI_SDATA0) F_(0, 0) FM(MSIOF1_SS2_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_3_0 FM(SSI_SDATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_7_4 FM(SSI_SDATA2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(SSI_SCK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_11_8 FM(SSI_SCK349) F_(0, 0) FM(MSIOF1_SS1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_15_12 FM(SSI_WS349) FM(HCTS2_N_A) FM(MSIOF1_SS2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_19_16 FM(SSI_SDATA3) FM(HRTS2_N_A) FM(MSIOF1_TXD_A) F_(0, 0) F_(0, 0) FM(TS_SCK0_A) FM(STP_ISCLK_0_A) FM(RIF0_D1_A) FM(RIF2_D0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_23_20 FM(SSI_SCK4) FM(HRX2_A) FM(MSIOF1_SCK_A) F_(0, 0) F_(0, 0) FM(TS_SDAT0_A) FM(STP_ISD_0_A) FM(RIF0_CLK_A) FM(RIF2_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_27_24 FM(SSI_WS4) FM(HTX2_A) FM(MSIOF1_SYNC_A) F_(0, 0) F_(0, 0) FM(TS_SDEN0_A) FM(STP_ISEN_0_A) FM(RIF0_SYNC_A) FM(RIF2_SYNC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_31_28 FM(SSI_SDATA4) FM(HSCK2_A) FM(MSIOF1_RXD_A) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_A)FM(STP_ISSYNC_0_A) FM(RIF0_D0_A) FM(RIF2_D1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_3_0 FM(SSI_SCK6) FM(USB2_PWEN) F_(0, 0) FM(SIM0_RST_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_7_4 FM(SSI_WS6) FM(USB2_OVC) F_(0, 0) FM(SIM0_D_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_11_8 FM(SSI_SDATA6) F_(0, 0) F_(0, 0) FM(SIM0_CLK_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(SATA_DEVSLP_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_15_12 FM(SSI_SCK78) FM(HRX2_B) FM(MSIOF1_SCK_C) F_(0, 0) F_(0, 0) FM(TS_SCK1_A) FM(STP_ISCLK_1_A) FM(RIF1_CLK_A) FM(RIF3_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_19_16 FM(SSI_WS78) FM(HTX2_B) FM(MSIOF1_SYNC_C) F_(0, 0) F_(0, 0) FM(TS_SDAT1_A) FM(STP_ISD_1_A) FM(RIF1_SYNC_A) FM(RIF3_SYNC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_23_20 FM(SSI_SDATA7) FM(HCTS2_N_B) FM(MSIOF1_RXD_C) F_(0, 0) F_(0, 0) FM(TS_SDEN1_A) FM(STP_ISEN_1_A) FM(RIF1_D0_A) FM(RIF3_D0_A) F_(0, 0) FM(TCLK2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_27_24 FM(SSI_SDATA8) FM(HRTS2_N_B) FM(MSIOF1_TXD_C) F_(0, 0) F_(0, 0) FM(TS_SPSYNC1_A)FM(STP_ISSYNC_1_A) FM(RIF1_D1_A) FM(RIF3_D1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_31_28 FM(SSI_SDATA9_A) FM(HSCK2_B) FM(MSIOF1_SS1_C) FM(HSCK1_A) FM(SSI_WS1_B) FM(SCK1) FM(STP_IVCXO27_1_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP17_3_0 FM(AUDIO_CLKA_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(CC5_OSCOUT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP17_7_4 FM(AUDIO_CLKB_B) FM(SCIF_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_1_D) FM(REMOCON_A) F_(0, 0) F_(0, 0) FM(TCLK1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP17_11_8 FM(USB0_PWEN) F_(0, 0) F_(0, 0) FM(SIM0_RST_C) F_(0, 0) FM(TS_SCK1_D) FM(STP_ISCLK_1_D) FM(BPFCLK_B) FM(RIF3_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(HSCK2_C) F_(0, 0) F_(0, 0) +#define IP17_15_12 FM(USB0_OVC) F_(0, 0) F_(0, 0) FM(SIM0_D_C) F_(0, 0) FM(TS_SDAT1_D) FM(STP_ISD_1_D) F_(0, 0) FM(RIF3_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(HRX2_C) F_(0, 0) F_(0, 0) +#define IP17_19_16 FM(USB1_PWEN) F_(0, 0) F_(0, 0) FM(SIM0_CLK_C) FM(SSI_SCK1_A) FM(TS_SCK0_E) FM(STP_ISCLK_0_E) FM(FMCLK_B) FM(RIF2_CLK_B) F_(0, 0) FM(SPEEDIN_A) F_(0, 0) F_(0, 0) FM(HTX2_C) F_(0, 0) F_(0, 0) +#define IP17_23_20 FM(USB1_OVC) F_(0, 0) FM(MSIOF1_SS2_C) F_(0, 0) FM(SSI_WS1_A) FM(TS_SDAT0_E) FM(STP_ISD_0_E) FM(FMIN_B) FM(RIF2_SYNC_B) F_(0, 0) FM(REMOCON_B) F_(0, 0) F_(0, 0) FM(HCTS2_N_C) F_(0, 0) F_(0, 0) +#define IP17_27_24 FM(USB30_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT_B) FM(SSI_SCK2_B) FM(TS_SDEN1_D) FM(STP_ISEN_1_D) FM(STP_OPWM_0_E)FM(RIF3_D0_B) F_(0, 0) FM(TCLK2_B) FM(TPU0TO0) FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0) +#define IP17_31_28 FM(USB30_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT1_B) FM(SSI_WS2_B) FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D) FM(STP_IVCXO27_0_E)FM(RIF3_D1_B) F_(0, 0) FM(FSO_TOE_N) FM(TPU0TO1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP18_3_0 FM(USB2_CH3_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B) FM(TS_SDEN0_E) FM(STP_ISEN_0_E) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) F_(0, 0) FM(TPU0TO2) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) F_(0, 0) +#define IP18_7_4 FM(USB2_CH3_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B) FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) F_(0, 0) FM(TPU0TO3) FM(FMIN_C) FM(FMIN_D) F_(0, 0) F_(0, 0) + +#define PINMUX_GPSR \ +\ + GPSR6_31 \ + GPSR6_30 \ + GPSR6_29 \ + GPSR6_28 \ + GPSR1_27 GPSR6_27 \ + GPSR1_26 GPSR6_26 \ + GPSR1_25 GPSR5_25 GPSR6_25 \ + GPSR1_24 GPSR5_24 GPSR6_24 \ + GPSR1_23 GPSR5_23 GPSR6_23 \ + GPSR1_22 GPSR5_22 GPSR6_22 \ + GPSR1_21 GPSR5_21 GPSR6_21 \ + GPSR1_20 GPSR5_20 GPSR6_20 \ + GPSR1_19 GPSR5_19 GPSR6_19 \ + GPSR1_18 GPSR5_18 GPSR6_18 \ + GPSR1_17 GPSR4_17 GPSR5_17 GPSR6_17 \ + GPSR1_16 GPSR4_16 GPSR5_16 GPSR6_16 \ +GPSR0_15 GPSR1_15 GPSR3_15 GPSR4_15 GPSR5_15 GPSR6_15 \ +GPSR0_14 GPSR1_14 GPSR2_14 GPSR3_14 GPSR4_14 GPSR5_14 GPSR6_14 \ +GPSR0_13 GPSR1_13 GPSR2_13 GPSR3_13 GPSR4_13 GPSR5_13 GPSR6_13 \ +GPSR0_12 GPSR1_12 GPSR2_12 GPSR3_12 GPSR4_12 GPSR5_12 GPSR6_12 \ +GPSR0_11 GPSR1_11 GPSR2_11 GPSR3_11 GPSR4_11 GPSR5_11 GPSR6_11 \ +GPSR0_10 GPSR1_10 GPSR2_10 GPSR3_10 GPSR4_10 GPSR5_10 GPSR6_10 \ +GPSR0_9 GPSR1_9 GPSR2_9 GPSR3_9 GPSR4_9 GPSR5_9 GPSR6_9 \ +GPSR0_8 GPSR1_8 GPSR2_8 GPSR3_8 GPSR4_8 GPSR5_8 GPSR6_8 \ +GPSR0_7 GPSR1_7 GPSR2_7 GPSR3_7 GPSR4_7 GPSR5_7 GPSR6_7 \ +GPSR0_6 GPSR1_6 GPSR2_6 GPSR3_6 GPSR4_6 GPSR5_6 GPSR6_6 \ +GPSR0_5 GPSR1_5 GPSR2_5 GPSR3_5 GPSR4_5 GPSR5_5 GPSR6_5 \ +GPSR0_4 GPSR1_4 GPSR2_4 GPSR3_4 GPSR4_4 GPSR5_4 GPSR6_4 \ +GPSR0_3 GPSR1_3 GPSR2_3 GPSR3_3 GPSR4_3 GPSR5_3 GPSR6_3 GPSR7_3 \ +GPSR0_2 GPSR1_2 GPSR2_2 GPSR3_2 GPSR4_2 GPSR5_2 GPSR6_2 GPSR7_2 \ +GPSR0_1 GPSR1_1 GPSR2_1 GPSR3_1 GPSR4_1 GPSR5_1 GPSR6_1 GPSR7_1 \ +GPSR0_0 GPSR1_0 GPSR2_0 GPSR3_0 GPSR4_0 GPSR5_0 GPSR6_0 GPSR7_0 + +#define PINMUX_IPSR \ +\ +FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \ +FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \ +FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ +FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ +FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \ +FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \ +FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ +FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ +\ +FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \ +FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \ +FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \ +FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \ +FM(IP4_19_16) IP4_19_16 FM(IP5_19_16) IP5_19_16 FM(IP6_19_16) IP6_19_16 FM(IP7_19_16) IP7_19_16 \ +FM(IP4_23_20) IP4_23_20 FM(IP5_23_20) IP5_23_20 FM(IP6_23_20) IP6_23_20 FM(IP7_23_20) IP7_23_20 \ +FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ +FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ +\ +FM(IP8_3_0) IP8_3_0 FM(IP9_3_0) IP9_3_0 FM(IP10_3_0) IP10_3_0 FM(IP11_3_0) IP11_3_0 \ +FM(IP8_7_4) IP8_7_4 FM(IP9_7_4) IP9_7_4 FM(IP10_7_4) IP10_7_4 FM(IP11_7_4) IP11_7_4 \ +FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \ +FM(IP8_15_12) IP8_15_12 FM(IP9_15_12) IP9_15_12 FM(IP10_15_12) IP10_15_12 FM(IP11_15_12) IP11_15_12 \ +FM(IP8_19_16) IP8_19_16 FM(IP9_19_16) IP9_19_16 FM(IP10_19_16) IP10_19_16 FM(IP11_19_16) IP11_19_16 \ +FM(IP8_23_20) IP8_23_20 FM(IP9_23_20) IP9_23_20 FM(IP10_23_20) IP10_23_20 FM(IP11_23_20) IP11_23_20 \ +FM(IP8_27_24) IP8_27_24 FM(IP9_27_24) IP9_27_24 FM(IP10_27_24) IP10_27_24 FM(IP11_27_24) IP11_27_24 \ +FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \ +\ +FM(IP12_3_0) IP12_3_0 FM(IP13_3_0) IP13_3_0 FM(IP14_3_0) IP14_3_0 FM(IP15_3_0) IP15_3_0 \ +FM(IP12_7_4) IP12_7_4 FM(IP13_7_4) IP13_7_4 FM(IP14_7_4) IP14_7_4 FM(IP15_7_4) IP15_7_4 \ +FM(IP12_11_8) IP12_11_8 FM(IP13_11_8) IP13_11_8 FM(IP14_11_8) IP14_11_8 FM(IP15_11_8) IP15_11_8 \ +FM(IP12_15_12) IP12_15_12 FM(IP13_15_12) IP13_15_12 FM(IP14_15_12) IP14_15_12 FM(IP15_15_12) IP15_15_12 \ +FM(IP12_19_16) IP12_19_16 FM(IP13_19_16) IP13_19_16 FM(IP14_19_16) IP14_19_16 FM(IP15_19_16) IP15_19_16 \ +FM(IP12_23_20) IP12_23_20 FM(IP13_23_20) IP13_23_20 FM(IP14_23_20) IP14_23_20 FM(IP15_23_20) IP15_23_20 \ +FM(IP12_27_24) IP12_27_24 FM(IP13_27_24) IP13_27_24 FM(IP14_27_24) IP14_27_24 FM(IP15_27_24) IP15_27_24 \ +FM(IP12_31_28) IP12_31_28 FM(IP13_31_28) IP13_31_28 FM(IP14_31_28) IP14_31_28 FM(IP15_31_28) IP15_31_28 \ +\ +FM(IP16_3_0) IP16_3_0 FM(IP17_3_0) IP17_3_0 FM(IP18_3_0) IP18_3_0 \ +FM(IP16_7_4) IP16_7_4 FM(IP17_7_4) IP17_7_4 FM(IP18_7_4) IP18_7_4 \ +FM(IP16_11_8) IP16_11_8 FM(IP17_11_8) IP17_11_8 \ +FM(IP16_15_12) IP16_15_12 FM(IP17_15_12) IP17_15_12 \ +FM(IP16_19_16) IP16_19_16 FM(IP17_19_16) IP17_19_16 \ +FM(IP16_23_20) IP16_23_20 FM(IP17_23_20) IP17_23_20 \ +FM(IP16_27_24) IP16_27_24 FM(IP17_27_24) IP17_27_24 \ +FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28 + +/* MOD_SEL0 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ +#define MOD_SEL0_31_30_29 FM(SEL_MSIOF3_0) FM(SEL_MSIOF3_1) FM(SEL_MSIOF3_2) FM(SEL_MSIOF3_3) FM(SEL_MSIOF3_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL0_28_27 FM(SEL_MSIOF2_0) FM(SEL_MSIOF2_1) FM(SEL_MSIOF2_2) FM(SEL_MSIOF2_3) +#define MOD_SEL0_26_25_24 FM(SEL_MSIOF1_0) FM(SEL_MSIOF1_1) FM(SEL_MSIOF1_2) FM(SEL_MSIOF1_3) FM(SEL_MSIOF1_4) FM(SEL_MSIOF1_5) FM(SEL_MSIOF1_6) F_(0, 0) +#define MOD_SEL0_23 FM(SEL_LBSC_0) FM(SEL_LBSC_1) +#define MOD_SEL0_22 FM(SEL_IEBUS_0) FM(SEL_IEBUS_1) +#define MOD_SEL0_21 FM(SEL_I2C2_0) FM(SEL_I2C2_1) +#define MOD_SEL0_20 FM(SEL_I2C1_0) FM(SEL_I2C1_1) +#define MOD_SEL0_19 FM(SEL_HSCIF4_0) FM(SEL_HSCIF4_1) +#define MOD_SEL0_18_17 FM(SEL_HSCIF3_0) FM(SEL_HSCIF3_1) FM(SEL_HSCIF3_2) FM(SEL_HSCIF3_3) +#define MOD_SEL0_16 FM(SEL_HSCIF1_0) FM(SEL_HSCIF1_1) +#define MOD_SEL0_14_13 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) FM(SEL_HSCIF2_2) F_(0, 0) +#define MOD_SEL0_12 FM(SEL_ETHERAVB_0) FM(SEL_ETHERAVB_1) +#define MOD_SEL0_11 FM(SEL_DRIF3_0) FM(SEL_DRIF3_1) +#define MOD_SEL0_10 FM(SEL_DRIF2_0) FM(SEL_DRIF2_1) +#define MOD_SEL0_9_8 FM(SEL_DRIF1_0) FM(SEL_DRIF1_1) FM(SEL_DRIF1_2) F_(0, 0) +#define MOD_SEL0_7_6 FM(SEL_DRIF0_0) FM(SEL_DRIF0_1) FM(SEL_DRIF0_2) F_(0, 0) +#define MOD_SEL0_5 FM(SEL_CANFD0_0) FM(SEL_CANFD0_1) +#define MOD_SEL0_4_3 FM(SEL_ADG_A_0) FM(SEL_ADG_A_1) FM(SEL_ADG_A_2) FM(SEL_ADG_A_3) + +/* MOD_SEL1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ +#define MOD_SEL1_31_30 FM(SEL_TSIF1_0) FM(SEL_TSIF1_1) FM(SEL_TSIF1_2) FM(SEL_TSIF1_3) +#define MOD_SEL1_29_28_27 FM(SEL_TSIF0_0) FM(SEL_TSIF0_1) FM(SEL_TSIF0_2) FM(SEL_TSIF0_3) FM(SEL_TSIF0_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL1_26 FM(SEL_TIMER_TMU1_0) FM(SEL_TIMER_TMU1_1) +#define MOD_SEL1_25_24 FM(SEL_SSP1_1_0) FM(SEL_SSP1_1_1) FM(SEL_SSP1_1_2) FM(SEL_SSP1_1_3) +#define MOD_SEL1_23_22_21 FM(SEL_SSP1_0_0) FM(SEL_SSP1_0_1) FM(SEL_SSP1_0_2) FM(SEL_SSP1_0_3) FM(SEL_SSP1_0_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL1_20 FM(SEL_SSI_0) FM(SEL_SSI_1) +#define MOD_SEL1_19 FM(SEL_SPEED_PULSE_0) FM(SEL_SPEED_PULSE_1) +#define MOD_SEL1_18_17 FM(SEL_SIMCARD_0) FM(SEL_SIMCARD_1) FM(SEL_SIMCARD_2) FM(SEL_SIMCARD_3) +#define MOD_SEL1_16 FM(SEL_SDHI2_0) FM(SEL_SDHI2_1) +#define MOD_SEL1_15_14 FM(SEL_SCIF4_0) FM(SEL_SCIF4_1) FM(SEL_SCIF4_2) F_(0, 0) +#define MOD_SEL1_13 FM(SEL_SCIF3_0) FM(SEL_SCIF3_1) +#define MOD_SEL1_12 FM(SEL_SCIF2_0) FM(SEL_SCIF2_1) +#define MOD_SEL1_11 FM(SEL_SCIF1_0) FM(SEL_SCIF1_1) +#define MOD_SEL1_10 FM(SEL_SCIF_0) FM(SEL_SCIF_1) +#define MOD_SEL1_9 FM(SEL_REMOCON_0) FM(SEL_REMOCON_1) +#define MOD_SEL1_6 FM(SEL_RCAN0_0) FM(SEL_RCAN0_1) +#define MOD_SEL1_5 FM(SEL_PWM6_0) FM(SEL_PWM6_1) +#define MOD_SEL1_4 FM(SEL_PWM5_0) FM(SEL_PWM5_1) +#define MOD_SEL1_3 FM(SEL_PWM4_0) FM(SEL_PWM4_1) +#define MOD_SEL1_2 FM(SEL_PWM3_0) FM(SEL_PWM3_1) +#define MOD_SEL1_1 FM(SEL_PWM2_0) FM(SEL_PWM2_1) +#define MOD_SEL1_0 FM(SEL_PWM1_0) FM(SEL_PWM1_1) + +/* MOD_SEL2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ +#define MOD_SEL2_31 FM(I2C_SEL_5_0) FM(I2C_SEL_5_1) +#define MOD_SEL2_30 FM(I2C_SEL_3_0) FM(I2C_SEL_3_1) +#define MOD_SEL2_29 FM(I2C_SEL_0_0) FM(I2C_SEL_0_1) +#define MOD_SEL2_28_27 FM(SEL_FM_0) FM(SEL_FM_1) FM(SEL_FM_2) FM(SEL_FM_3) +#define MOD_SEL2_26 FM(SEL_SCIF5_0) FM(SEL_SCIF5_1) +#define MOD_SEL2_25_24_23 FM(SEL_I2C6_0) FM(SEL_I2C6_1) FM(SEL_I2C6_2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL2_21 FM(SEL_SSI2_0) FM(SEL_SSI2_1) +#define MOD_SEL2_20 FM(SEL_SSI9_0) FM(SEL_SSI9_1) +#define MOD_SEL2_19 FM(SEL_TIMER_TMU2_0) FM(SEL_TIMER_TMU2_1) +#define MOD_SEL2_18 FM(SEL_ADG_B_0) FM(SEL_ADG_B_1) +#define MOD_SEL2_17 FM(SEL_ADG_C_0) FM(SEL_ADG_C_1) +#define MOD_SEL2_0 FM(SEL_VIN4_0) FM(SEL_VIN4_1) + +#define PINMUX_MOD_SELS \ +\ +MOD_SEL0_31_30_29 MOD_SEL1_31_30 MOD_SEL2_31 \ + MOD_SEL2_30 \ + MOD_SEL1_29_28_27 MOD_SEL2_29 \ +MOD_SEL0_28_27 MOD_SEL2_28_27 \ +MOD_SEL0_26_25_24 MOD_SEL1_26 MOD_SEL2_26 \ + MOD_SEL1_25_24 MOD_SEL2_25_24_23 \ +MOD_SEL0_23 MOD_SEL1_23_22_21 \ +MOD_SEL0_22 \ +MOD_SEL0_21 MOD_SEL2_21 \ +MOD_SEL0_20 MOD_SEL1_20 MOD_SEL2_20 \ +MOD_SEL0_19 MOD_SEL1_19 MOD_SEL2_19 \ +MOD_SEL0_18_17 MOD_SEL1_18_17 MOD_SEL2_18 \ + MOD_SEL2_17 \ +MOD_SEL0_16 MOD_SEL1_16 \ + MOD_SEL1_15_14 \ +MOD_SEL0_14_13 \ + MOD_SEL1_13 \ +MOD_SEL0_12 MOD_SEL1_12 \ +MOD_SEL0_11 MOD_SEL1_11 \ +MOD_SEL0_10 MOD_SEL1_10 \ +MOD_SEL0_9_8 MOD_SEL1_9 \ +MOD_SEL0_7_6 \ + MOD_SEL1_6 \ +MOD_SEL0_5 MOD_SEL1_5 \ +MOD_SEL0_4_3 MOD_SEL1_4 \ + MOD_SEL1_3 \ + MOD_SEL1_2 \ + MOD_SEL1_1 \ + MOD_SEL1_0 MOD_SEL2_0 + +/* + * These pins are not able to be muxed but have other properties + * that can be set, such as drive-strength or pull-up/pull-down enable. + */ +#define PINMUX_STATIC \ + FM(QSPI0_SPCLK) FM(QSPI0_SSL) FM(QSPI0_MOSI_IO0) FM(QSPI0_MISO_IO1) \ + FM(QSPI0_IO2) FM(QSPI0_IO3) \ + FM(QSPI1_SPCLK) FM(QSPI1_SSL) FM(QSPI1_MOSI_IO0) FM(QSPI1_MISO_IO1) \ + FM(QSPI1_IO2) FM(QSPI1_IO3) \ + FM(RPC_INT) FM(RPC_WP) FM(RPC_RESET) \ + FM(AVB_TX_CTL) FM(AVB_TXC) FM(AVB_TD0) FM(AVB_TD1) FM(AVB_TD2) FM(AVB_TD3) \ + FM(AVB_RX_CTL) FM(AVB_RXC) FM(AVB_RD0) FM(AVB_RD1) FM(AVB_RD2) FM(AVB_RD3) \ + FM(AVB_TXCREFCLK) FM(AVB_MDIO) \ + FM(CLKOUT) FM(PRESETOUT) \ + FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) FM(DU_DOTCLKIN3) \ + FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF) FM(TDI) FM(TCK) FM(TRST) FM(EXTALR) + +enum { + PINMUX_RESERVED = 0, + + PINMUX_DATA_BEGIN, + GP_ALL(DATA), + PINMUX_DATA_END, + +#define F_(x, y) +#define FM(x) FN_##x, + PINMUX_FUNCTION_BEGIN, + GP_ALL(FN), + PINMUX_GPSR + PINMUX_IPSR + PINMUX_MOD_SELS + PINMUX_FUNCTION_END, +#undef F_ +#undef FM + +#define F_(x, y) +#define FM(x) x##_MARK, + PINMUX_MARK_BEGIN, + PINMUX_GPSR + PINMUX_IPSR + PINMUX_MOD_SELS + PINMUX_STATIC + PINMUX_MARK_END, +#undef F_ +#undef FM +}; + +static const u16 pinmux_data[] = { + PINMUX_DATA_GP_ALL(), + + PINMUX_SINGLE(AVS1), + PINMUX_SINGLE(AVS2), + PINMUX_SINGLE(HDMI0_CEC), + PINMUX_SINGLE(HDMI1_CEC), + PINMUX_SINGLE(I2C_SEL_0_1), + PINMUX_SINGLE(I2C_SEL_3_1), + PINMUX_SINGLE(I2C_SEL_5_1), + PINMUX_SINGLE(MSIOF0_RXD), + PINMUX_SINGLE(MSIOF0_SCK), + PINMUX_SINGLE(MSIOF0_TXD), + PINMUX_SINGLE(SSI_SCK5), + PINMUX_SINGLE(SSI_SDATA5), + PINMUX_SINGLE(SSI_WS5), + + /* IPSR0 */ + PINMUX_IPSR_GPSR(IP0_3_0, AVB_MDC), + PINMUX_IPSR_MSEL(IP0_3_0, MSIOF2_SS2_C, SEL_MSIOF2_2), + + PINMUX_IPSR_GPSR(IP0_7_4, AVB_MAGIC), + PINMUX_IPSR_MSEL(IP0_7_4, MSIOF2_SS1_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_7_4, SCK4_A, SEL_SCIF4_0), + + PINMUX_IPSR_GPSR(IP0_11_8, AVB_PHY_INT), + PINMUX_IPSR_MSEL(IP0_11_8, MSIOF2_SYNC_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_11_8, RX4_A, SEL_SCIF4_0), + + PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK), + PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0), + + PINMUX_IPSR_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, SEL_ETHERAVB_0), + PINMUX_IPSR_MSEL(IP0_19_16, MSIOF2_RXD_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_19_16, CTS4_N_A, SEL_SCIF4_0), + PINMUX_IPSR_GPSR(IP0_19_16, FSCLKST2_N_A), + + PINMUX_IPSR_MSEL(IP0_23_20, AVB_AVTP_CAPTURE_A, SEL_ETHERAVB_0), + PINMUX_IPSR_MSEL(IP0_23_20, MSIOF2_TXD_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_23_20, RTS4_N_TANS_A, SEL_SCIF4_0), + + PINMUX_IPSR_GPSR(IP0_27_24, IRQ0), + PINMUX_IPSR_GPSR(IP0_27_24, QPOLB), + PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE), + PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1), + PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1), + PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS2_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP0_31_28, IRQ1), + PINMUX_IPSR_GPSR(IP0_31_28, QPOLA), + PINMUX_IPSR_GPSR(IP0_31_28, DU_DISP), + PINMUX_IPSR_MSEL(IP0_31_28, VI4_DATA1_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP0_31_28, CAN0_RX_B, SEL_RCAN0_1), + PINMUX_IPSR_MSEL(IP0_31_28, CANFD0_RX_B, SEL_CANFD0_1), + PINMUX_IPSR_MSEL(IP0_31_28, MSIOF3_SS1_E, SEL_MSIOF3_4), + + /* IPSR1 */ + PINMUX_IPSR_GPSR(IP1_3_0, IRQ2), + PINMUX_IPSR_GPSR(IP1_3_0, QCPV_QDE), + PINMUX_IPSR_GPSR(IP1_3_0, DU_EXODDF_DU_ODDF_DISP_CDE), + PINMUX_IPSR_MSEL(IP1_3_0, VI4_DATA2_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_3_0, PWM3_B, SEL_PWM3_1), + PINMUX_IPSR_MSEL(IP1_3_0, MSIOF3_SYNC_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP1_7_4, IRQ3), + PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE), + PINMUX_IPSR_GPSR(IP1_7_4, A25), + PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1), + PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1), + PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP1_11_8, IRQ4), + PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS), + PINMUX_IPSR_GPSR(IP1_11_8, A24), + PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC), + PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1), + PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP1_15_12, IRQ5), + PINMUX_IPSR_GPSR(IP1_15_12, QSTB_QHE), + PINMUX_IPSR_GPSR(IP1_15_12, A23), + PINMUX_IPSR_GPSR(IP1_15_12, DU_EXVSYNC_DU_VSYNC), + PINMUX_IPSR_MSEL(IP1_15_12, VI4_DATA5_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_15_12, PWM6_B, SEL_PWM6_1), + PINMUX_IPSR_GPSR(IP1_15_12, FSCLKST2_N_B), + PINMUX_IPSR_MSEL(IP1_15_12, MSIOF3_TXD_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP1_19_16, PWM0), + PINMUX_IPSR_GPSR(IP1_19_16, AVB_AVTP_PPS), + PINMUX_IPSR_GPSR(IP1_19_16, A22), + PINMUX_IPSR_MSEL(IP1_19_16, VI4_DATA6_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_19_16, IECLK_B, SEL_IEBUS_1), + + PINMUX_IPSR_MSEL(IP1_23_20, PWM1_A, SEL_PWM1_0), + PINMUX_IPSR_GPSR(IP1_23_20, A21), + PINMUX_IPSR_MSEL(IP1_23_20, HRX3_D, SEL_HSCIF3_3), + PINMUX_IPSR_MSEL(IP1_23_20, VI4_DATA7_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_23_20, IERX_B, SEL_IEBUS_1), + + PINMUX_IPSR_MSEL(IP1_27_24, PWM2_A, SEL_PWM2_0), + PINMUX_IPSR_GPSR(IP1_27_24, A20), + PINMUX_IPSR_MSEL(IP1_27_24, HTX3_D, SEL_HSCIF3_3), + PINMUX_IPSR_MSEL(IP1_27_24, IETX_B, SEL_IEBUS_1), + + PINMUX_IPSR_GPSR(IP1_31_28, A0), + PINMUX_IPSR_GPSR(IP1_31_28, LCDOUT16), + PINMUX_IPSR_MSEL(IP1_31_28, MSIOF3_SYNC_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP1_31_28, VI4_DATA8), + PINMUX_IPSR_GPSR(IP1_31_28, DU_DB0), + PINMUX_IPSR_MSEL(IP1_31_28, PWM3_A, SEL_PWM3_0), + + /* IPSR2 */ + PINMUX_IPSR_GPSR(IP2_3_0, A1), + PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17), + PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9), + PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1), + PINMUX_IPSR_MSEL(IP2_3_0, PWM4_A, SEL_PWM4_0), + + PINMUX_IPSR_GPSR(IP2_7_4, A2), + PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18), + PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10), + PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2), + PINMUX_IPSR_MSEL(IP2_7_4, PWM5_A, SEL_PWM5_0), + + PINMUX_IPSR_GPSR(IP2_11_8, A3), + PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), + PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), + PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), + PINMUX_IPSR_MSEL(IP2_11_8, PWM6_A, SEL_PWM6_0), + + PINMUX_IPSR_GPSR(IP2_15_12, A4), + PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20), + PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12), + PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12), + PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4), + + PINMUX_IPSR_GPSR(IP2_19_16, A5), + PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21), + PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1), + PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13), + PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA13), + PINMUX_IPSR_GPSR(IP2_19_16, DU_DB5), + + PINMUX_IPSR_GPSR(IP2_23_20, A6), + PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22), + PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14), + PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA14), + PINMUX_IPSR_GPSR(IP2_23_20, DU_DB6), + + PINMUX_IPSR_GPSR(IP2_27_24, A7), + PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23), + PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15), + PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA15), + PINMUX_IPSR_GPSR(IP2_27_24, DU_DB7), + + PINMUX_IPSR_GPSR(IP2_31_28, A8), + PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), + PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), + PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), + PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), + PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), + + /* IPSR3 */ + PINMUX_IPSR_GPSR(IP3_3_0, A9), + PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N), + + PINMUX_IPSR_GPSR(IP3_7_4, A10), + PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_TANS_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N), + + PINMUX_IPSR_GPSR(IP3_11_8, A11), + PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1), + PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1), + PINMUX_IPSR_GPSR(IP3_11_8, HSCK4), + PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD), + PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0), + PINMUX_IPSR_MSEL(IP3_11_8, AVB_AVTP_CAPTURE_B, SEL_ETHERAVB_1), + PINMUX_IPSR_MSEL(IP3_11_8, PWM2_B, SEL_PWM2_1), + + PINMUX_IPSR_GPSR(IP3_15_12, A12), + PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT12), + PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SCK_C, SEL_MSIOF3_2), + PINMUX_IPSR_MSEL(IP3_15_12, HRX4_A, SEL_HSCIF4_0), + PINMUX_IPSR_GPSR(IP3_15_12, VI5_DATA8), + PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4), + + PINMUX_IPSR_GPSR(IP3_19_16, A13), + PINMUX_IPSR_GPSR(IP3_19_16, LCDOUT13), + PINMUX_IPSR_MSEL(IP3_19_16, MSIOF3_SYNC_C, SEL_MSIOF3_2), + PINMUX_IPSR_MSEL(IP3_19_16, HTX4_A, SEL_HSCIF4_0), + PINMUX_IPSR_GPSR(IP3_19_16, VI5_DATA9), + PINMUX_IPSR_GPSR(IP3_19_16, DU_DG5), + + PINMUX_IPSR_GPSR(IP3_23_20, A14), + PINMUX_IPSR_GPSR(IP3_23_20, LCDOUT14), + PINMUX_IPSR_MSEL(IP3_23_20, MSIOF3_RXD_C, SEL_MSIOF3_2), + PINMUX_IPSR_GPSR(IP3_23_20, HCTS4_N), + PINMUX_IPSR_GPSR(IP3_23_20, VI5_DATA10), + PINMUX_IPSR_GPSR(IP3_23_20, DU_DG6), + + PINMUX_IPSR_GPSR(IP3_27_24, A15), + PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15), + PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2), + PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N), + PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11), + PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7), + + PINMUX_IPSR_GPSR(IP3_31_28, A16), + PINMUX_IPSR_GPSR(IP3_31_28, LCDOUT8), + PINMUX_IPSR_GPSR(IP3_31_28, VI4_FIELD), + PINMUX_IPSR_GPSR(IP3_31_28, DU_DG0), + + /* IPSR4 */ + PINMUX_IPSR_GPSR(IP4_3_0, A17), + PINMUX_IPSR_GPSR(IP4_3_0, LCDOUT9), + PINMUX_IPSR_GPSR(IP4_3_0, VI4_VSYNC_N), + PINMUX_IPSR_GPSR(IP4_3_0, DU_DG1), + + PINMUX_IPSR_GPSR(IP4_7_4, A18), + PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10), + PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N), + PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2), + + PINMUX_IPSR_GPSR(IP4_11_8, A19), + PINMUX_IPSR_GPSR(IP4_11_8, LCDOUT11), + PINMUX_IPSR_GPSR(IP4_11_8, VI4_CLKENB), + PINMUX_IPSR_GPSR(IP4_11_8, DU_DG3), + + PINMUX_IPSR_GPSR(IP4_15_12, CS0_N), + PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB), + + PINMUX_IPSR_GPSR(IP4_19_16, CS1_N), + PINMUX_IPSR_GPSR(IP4_19_16, VI5_CLK), + PINMUX_IPSR_MSEL(IP4_19_16, EX_WAIT0_B, SEL_LBSC_1), + + PINMUX_IPSR_GPSR(IP4_23_20, BS_N), + PINMUX_IPSR_GPSR(IP4_23_20, QSTVA_QVS), + PINMUX_IPSR_MSEL(IP4_23_20, MSIOF3_SCK_D, SEL_MSIOF3_3), + PINMUX_IPSR_GPSR(IP4_23_20, SCK3), + PINMUX_IPSR_GPSR(IP4_23_20, HSCK3), + PINMUX_IPSR_GPSR(IP4_23_20, CAN1_TX), + PINMUX_IPSR_GPSR(IP4_23_20, CANFD1_TX), + PINMUX_IPSR_MSEL(IP4_23_20, IETX_A, SEL_IEBUS_0), + + PINMUX_IPSR_GPSR(IP4_27_24, RD_N), + PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3), + PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0), + PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0), + PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0), + PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0), + + PINMUX_IPSR_GPSR(IP4_31_28, RD_WR_N), + PINMUX_IPSR_MSEL(IP4_31_28, MSIOF3_RXD_D, SEL_MSIOF3_3), + PINMUX_IPSR_MSEL(IP4_31_28, TX3_A, SEL_SCIF3_0), + PINMUX_IPSR_MSEL(IP4_31_28, HTX3_A, SEL_HSCIF3_0), + PINMUX_IPSR_MSEL(IP4_31_28, CAN0_RX_A, SEL_RCAN0_0), + PINMUX_IPSR_MSEL(IP4_31_28, CANFD0_RX_A, SEL_CANFD0_0), + + /* IPSR5 */ + PINMUX_IPSR_GPSR(IP5_3_0, WE0_N), + PINMUX_IPSR_MSEL(IP5_3_0, MSIOF3_TXD_D, SEL_MSIOF3_3), + PINMUX_IPSR_GPSR(IP5_3_0, CTS3_N), + PINMUX_IPSR_GPSR(IP5_3_0, HCTS3_N), + PINMUX_IPSR_MSEL(IP5_3_0, SCL6_B, SEL_I2C6_1), + PINMUX_IPSR_GPSR(IP5_3_0, CAN_CLK), + PINMUX_IPSR_MSEL(IP5_3_0, IECLK_A, SEL_IEBUS_0), + + PINMUX_IPSR_GPSR(IP5_7_4, WE1_N), + PINMUX_IPSR_MSEL(IP5_7_4, MSIOF3_SS1_D, SEL_MSIOF3_3), + PINMUX_IPSR_GPSR(IP5_7_4, RTS3_N_TANS), + PINMUX_IPSR_GPSR(IP5_7_4, HRTS3_N), + PINMUX_IPSR_MSEL(IP5_7_4, SDA6_B, SEL_I2C6_1), + PINMUX_IPSR_GPSR(IP5_7_4, CAN1_RX), + PINMUX_IPSR_GPSR(IP5_7_4, CANFD1_RX), + PINMUX_IPSR_MSEL(IP5_7_4, IERX_A, SEL_IEBUS_0), + + PINMUX_IPSR_MSEL(IP5_11_8, EX_WAIT0_A, SEL_LBSC_0), + PINMUX_IPSR_GPSR(IP5_11_8, QCLK), + PINMUX_IPSR_GPSR(IP5_11_8, VI4_CLK), + PINMUX_IPSR_GPSR(IP5_11_8, DU_DOTCLKOUT0), + + PINMUX_IPSR_GPSR(IP5_15_12, D0), + PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), + PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), + PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), + + PINMUX_IPSR_GPSR(IP5_19_16, D1), + PINMUX_IPSR_MSEL(IP5_19_16, MSIOF2_SS2_B, SEL_MSIOF2_1), + PINMUX_IPSR_MSEL(IP5_19_16, MSIOF3_SYNC_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_19_16, VI4_DATA17), + PINMUX_IPSR_GPSR(IP5_19_16, VI5_DATA1), + + PINMUX_IPSR_GPSR(IP5_23_20, D2), + PINMUX_IPSR_MSEL(IP5_23_20, MSIOF3_RXD_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_23_20, VI4_DATA18), + PINMUX_IPSR_GPSR(IP5_23_20, VI5_DATA2), + + PINMUX_IPSR_GPSR(IP5_27_24, D3), + PINMUX_IPSR_MSEL(IP5_27_24, MSIOF3_TXD_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_27_24, VI4_DATA19), + PINMUX_IPSR_GPSR(IP5_27_24, VI5_DATA3), + + PINMUX_IPSR_GPSR(IP5_31_28, D4), + PINMUX_IPSR_MSEL(IP5_31_28, MSIOF2_SCK_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA20), + PINMUX_IPSR_GPSR(IP5_31_28, VI5_DATA4), + + /* IPSR6 */ + PINMUX_IPSR_GPSR(IP6_3_0, D5), + PINMUX_IPSR_MSEL(IP6_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA21), + PINMUX_IPSR_GPSR(IP6_3_0, VI5_DATA5), + + PINMUX_IPSR_GPSR(IP6_7_4, D6), + PINMUX_IPSR_MSEL(IP6_7_4, MSIOF2_RXD_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP6_7_4, VI4_DATA22), + PINMUX_IPSR_GPSR(IP6_7_4, VI5_DATA6), + + PINMUX_IPSR_GPSR(IP6_11_8, D7), + PINMUX_IPSR_MSEL(IP6_11_8, MSIOF2_TXD_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP6_11_8, VI4_DATA23), + PINMUX_IPSR_GPSR(IP6_11_8, VI5_DATA7), + + PINMUX_IPSR_GPSR(IP6_15_12, D8), + PINMUX_IPSR_GPSR(IP6_15_12, LCDOUT0), + PINMUX_IPSR_MSEL(IP6_15_12, MSIOF2_SCK_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_15_12, SCK4_C, SEL_SCIF4_2), + PINMUX_IPSR_MSEL(IP6_15_12, VI4_DATA0_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP6_15_12, DU_DR0), + + PINMUX_IPSR_GPSR(IP6_19_16, D9), + PINMUX_IPSR_GPSR(IP6_19_16, LCDOUT1), + PINMUX_IPSR_MSEL(IP6_19_16, MSIOF2_SYNC_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_19_16, VI4_DATA1_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP6_19_16, DU_DR1), + + PINMUX_IPSR_GPSR(IP6_23_20, D10), + PINMUX_IPSR_GPSR(IP6_23_20, LCDOUT2), + PINMUX_IPSR_MSEL(IP6_23_20, MSIOF2_RXD_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_23_20, HRX3_B, SEL_HSCIF3_1), + PINMUX_IPSR_MSEL(IP6_23_20, VI4_DATA2_A, SEL_VIN4_0), + PINMUX_IPSR_MSEL(IP6_23_20, CTS4_N_C, SEL_SCIF4_2), + PINMUX_IPSR_GPSR(IP6_23_20, DU_DR2), + + PINMUX_IPSR_GPSR(IP6_27_24, D11), + PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3), + PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1), + PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0), + PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_TANS_C, SEL_SCIF4_2), + PINMUX_IPSR_GPSR(IP6_27_24, DU_DR3), + + PINMUX_IPSR_GPSR(IP6_31_28, D12), + PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4), + PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2), + PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP6_31_28, DU_DR4), + + /* IPSR7 */ + PINMUX_IPSR_GPSR(IP7_3_0, D13), + PINMUX_IPSR_GPSR(IP7_3_0, LCDOUT5), + PINMUX_IPSR_MSEL(IP7_3_0, MSIOF2_SS2_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP7_3_0, TX4_C, SEL_SCIF4_2), + PINMUX_IPSR_MSEL(IP7_3_0, VI4_DATA5_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP7_3_0, DU_DR5), + + PINMUX_IPSR_GPSR(IP7_7_4, D14), + PINMUX_IPSR_GPSR(IP7_7_4, LCDOUT6), + PINMUX_IPSR_MSEL(IP7_7_4, MSIOF3_SS1_A, SEL_MSIOF3_0), + PINMUX_IPSR_MSEL(IP7_7_4, HRX3_C, SEL_HSCIF3_2), + PINMUX_IPSR_MSEL(IP7_7_4, VI4_DATA6_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP7_7_4, DU_DR6), + PINMUX_IPSR_MSEL(IP7_7_4, SCL6_C, SEL_I2C6_2), + + PINMUX_IPSR_GPSR(IP7_11_8, D15), + PINMUX_IPSR_GPSR(IP7_11_8, LCDOUT7), + PINMUX_IPSR_MSEL(IP7_11_8, MSIOF3_SS2_A, SEL_MSIOF3_0), + PINMUX_IPSR_MSEL(IP7_11_8, HTX3_C, SEL_HSCIF3_2), + PINMUX_IPSR_MSEL(IP7_11_8, VI4_DATA7_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP7_11_8, DU_DR7), + PINMUX_IPSR_MSEL(IP7_11_8, SDA6_C, SEL_I2C6_2), + + PINMUX_IPSR_GPSR(IP7_19_16, SD0_CLK), + PINMUX_IPSR_MSEL(IP7_19_16, MSIOF1_SCK_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP7_19_16, STP_OPWM_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP7_23_20, SD0_CMD), + PINMUX_IPSR_MSEL(IP7_23_20, MSIOF1_SYNC_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP7_23_20, STP_IVCXO27_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP7_27_24, SD0_DAT0), + PINMUX_IPSR_MSEL(IP7_27_24, MSIOF1_RXD_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP7_27_24, TS_SCK0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP7_27_24, STP_ISCLK_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP7_31_28, SD0_DAT1), + PINMUX_IPSR_MSEL(IP7_31_28, MSIOF1_TXD_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP7_31_28, TS_SPSYNC0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP7_31_28, STP_ISSYNC_0_B, SEL_SSP1_0_1), + + /* IPSR8 */ + PINMUX_IPSR_GPSR(IP8_3_0, SD0_DAT2), + PINMUX_IPSR_MSEL(IP8_3_0, MSIOF1_SS1_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP8_3_0, TS_SDAT0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP8_3_0, STP_ISD_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP8_7_4, SD0_DAT3), + PINMUX_IPSR_MSEL(IP8_7_4, MSIOF1_SS2_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP8_7_4, TS_SDEN0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP8_7_4, STP_ISEN_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK), + PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6), + PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0), + + PINMUX_IPSR_GPSR(IP8_15_12, SD1_CMD), + PINMUX_IPSR_MSEL(IP8_15_12, MSIOF1_SYNC_G, SEL_MSIOF1_6), + PINMUX_IPSR_GPSR(IP8_15_12, NFCE_N_B), + PINMUX_IPSR_MSEL(IP8_15_12, SIM0_D_A, SEL_SIMCARD_0), + PINMUX_IPSR_MSEL(IP8_15_12, STP_IVCXO27_1_B, SEL_SSP1_1_1), + + PINMUX_IPSR_GPSR(IP8_19_16, SD1_DAT0), + PINMUX_IPSR_GPSR(IP8_19_16, SD2_DAT4), + PINMUX_IPSR_MSEL(IP8_19_16, MSIOF1_RXD_G, SEL_MSIOF1_6), + PINMUX_IPSR_GPSR(IP8_19_16, NFWP_N_B), + PINMUX_IPSR_MSEL(IP8_19_16, TS_SCK1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP8_19_16, STP_ISCLK_1_B, SEL_SSP1_1_1), + + PINMUX_IPSR_GPSR(IP8_23_20, SD1_DAT1), + PINMUX_IPSR_GPSR(IP8_23_20, SD2_DAT5), + PINMUX_IPSR_MSEL(IP8_23_20, MSIOF1_TXD_G, SEL_MSIOF1_6), + PINMUX_IPSR_GPSR(IP8_23_20, NFDATA14_B), + PINMUX_IPSR_MSEL(IP8_23_20, TS_SPSYNC1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP8_23_20, STP_ISSYNC_1_B, SEL_SSP1_1_1), + + PINMUX_IPSR_GPSR(IP8_27_24, SD1_DAT2), + PINMUX_IPSR_GPSR(IP8_27_24, SD2_DAT6), + PINMUX_IPSR_MSEL(IP8_27_24, MSIOF1_SS1_G, SEL_MSIOF1_6), + PINMUX_IPSR_GPSR(IP8_27_24, NFDATA15_B), + PINMUX_IPSR_MSEL(IP8_27_24, TS_SDAT1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP8_27_24, STP_ISD_1_B, SEL_SSP1_1_1), + + PINMUX_IPSR_GPSR(IP8_31_28, SD1_DAT3), + PINMUX_IPSR_GPSR(IP8_31_28, SD2_DAT7), + PINMUX_IPSR_MSEL(IP8_31_28, MSIOF1_SS2_G, SEL_MSIOF1_6), + PINMUX_IPSR_GPSR(IP8_31_28, NFRB_N_B), + PINMUX_IPSR_MSEL(IP8_31_28, TS_SDEN1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP8_31_28, STP_ISEN_1_B, SEL_SSP1_1_1), + + /* IPSR9 */ + PINMUX_IPSR_GPSR(IP9_3_0, SD2_CLK), + PINMUX_IPSR_GPSR(IP9_3_0, NFDATA8), + + PINMUX_IPSR_GPSR(IP9_7_4, SD2_CMD), + PINMUX_IPSR_GPSR(IP9_7_4, NFDATA9), + + PINMUX_IPSR_GPSR(IP9_11_8, SD2_DAT0), + PINMUX_IPSR_GPSR(IP9_11_8, NFDATA10), + + PINMUX_IPSR_GPSR(IP9_15_12, SD2_DAT1), + PINMUX_IPSR_GPSR(IP9_15_12, NFDATA11), + + PINMUX_IPSR_GPSR(IP9_19_16, SD2_DAT2), + PINMUX_IPSR_GPSR(IP9_19_16, NFDATA12), + + PINMUX_IPSR_GPSR(IP9_23_20, SD2_DAT3), + PINMUX_IPSR_GPSR(IP9_23_20, NFDATA13), + + PINMUX_IPSR_GPSR(IP9_27_24, SD2_DS), + PINMUX_IPSR_GPSR(IP9_27_24, NFALE), + PINMUX_IPSR_GPSR(IP9_27_24, SATA_DEVSLP_B), + + PINMUX_IPSR_GPSR(IP9_31_28, SD3_CLK), + PINMUX_IPSR_GPSR(IP9_31_28, NFWE_N), + + /* IPSR10 */ + PINMUX_IPSR_GPSR(IP10_3_0, SD3_CMD), + PINMUX_IPSR_GPSR(IP10_3_0, NFRE_N), + + PINMUX_IPSR_GPSR(IP10_7_4, SD3_DAT0), + PINMUX_IPSR_GPSR(IP10_7_4, NFDATA0), + + PINMUX_IPSR_GPSR(IP10_11_8, SD3_DAT1), + PINMUX_IPSR_GPSR(IP10_11_8, NFDATA1), + + PINMUX_IPSR_GPSR(IP10_15_12, SD3_DAT2), + PINMUX_IPSR_GPSR(IP10_15_12, NFDATA2), + + PINMUX_IPSR_GPSR(IP10_19_16, SD3_DAT3), + PINMUX_IPSR_GPSR(IP10_19_16, NFDATA3), + + PINMUX_IPSR_GPSR(IP10_23_20, SD3_DAT4), + PINMUX_IPSR_MSEL(IP10_23_20, SD2_CD_A, SEL_SDHI2_0), + PINMUX_IPSR_GPSR(IP10_23_20, NFDATA4), + + PINMUX_IPSR_GPSR(IP10_27_24, SD3_DAT5), + PINMUX_IPSR_MSEL(IP10_27_24, SD2_WP_A, SEL_SDHI2_0), + PINMUX_IPSR_GPSR(IP10_27_24, NFDATA5), + + PINMUX_IPSR_GPSR(IP10_31_28, SD3_DAT6), + PINMUX_IPSR_GPSR(IP10_31_28, SD3_CD), + PINMUX_IPSR_GPSR(IP10_31_28, NFDATA6), + + /* IPSR11 */ + PINMUX_IPSR_GPSR(IP11_3_0, SD3_DAT7), + PINMUX_IPSR_GPSR(IP11_3_0, SD3_WP), + PINMUX_IPSR_GPSR(IP11_3_0, NFDATA7), + + PINMUX_IPSR_GPSR(IP11_7_4, SD3_DS), + PINMUX_IPSR_GPSR(IP11_7_4, NFCLE), + + PINMUX_IPSR_GPSR(IP11_11_8, SD0_CD), + PINMUX_IPSR_MSEL(IP11_11_8, SCL2_B, SEL_I2C2_1), + PINMUX_IPSR_MSEL(IP11_11_8, SIM0_RST_A, SEL_SIMCARD_0), + + PINMUX_IPSR_GPSR(IP11_15_12, SD0_WP), + PINMUX_IPSR_MSEL(IP11_15_12, SDA2_B, SEL_I2C2_1), + + PINMUX_IPSR_GPSR(IP11_19_16, SD1_CD), + PINMUX_IPSR_MSEL(IP11_19_16, SIM0_CLK_B, SEL_SIMCARD_1), + + PINMUX_IPSR_GPSR(IP11_23_20, SD1_WP), + PINMUX_IPSR_MSEL(IP11_23_20, SIM0_D_B, SEL_SIMCARD_1), + + PINMUX_IPSR_GPSR(IP11_27_24, SCK0), + PINMUX_IPSR_MSEL(IP11_27_24, HSCK1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP11_27_24, MSIOF1_SS2_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP11_27_24, AUDIO_CLKC_B, SEL_ADG_C_1), + PINMUX_IPSR_MSEL(IP11_27_24, SDA2_A, SEL_I2C2_0), + PINMUX_IPSR_MSEL(IP11_27_24, SIM0_RST_B, SEL_SIMCARD_1), + PINMUX_IPSR_MSEL(IP11_27_24, STP_OPWM_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP11_27_24, RIF0_CLK_B, SEL_DRIF0_1), + PINMUX_IPSR_GPSR(IP11_27_24, ADICHS2), + PINMUX_IPSR_MSEL(IP11_27_24, SCK5_B, SEL_SCIF5_1), + + PINMUX_IPSR_GPSR(IP11_31_28, RX0), + PINMUX_IPSR_MSEL(IP11_31_28, HRX1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP11_31_28, TS_SCK0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP11_31_28, STP_ISCLK_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP11_31_28, RIF0_D0_B, SEL_DRIF0_1), + + /* IPSR12 */ + PINMUX_IPSR_GPSR(IP12_3_0, TX0), + PINMUX_IPSR_MSEL(IP12_3_0, HTX1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP12_3_0, TS_SPSYNC0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP12_3_0, STP_ISSYNC_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP12_3_0, RIF0_D1_B, SEL_DRIF0_1), + + PINMUX_IPSR_GPSR(IP12_7_4, CTS0_N), + PINMUX_IPSR_MSEL(IP12_7_4, HCTS1_N_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP12_7_4, MSIOF1_SYNC_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_7_4, TS_SPSYNC1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP12_7_4, STP_ISSYNC_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_7_4, RIF1_SYNC_B, SEL_DRIF1_1), + PINMUX_IPSR_GPSR(IP12_7_4, AUDIO_CLKOUT_C), + PINMUX_IPSR_GPSR(IP12_7_4, ADICS_SAMP), + + PINMUX_IPSR_GPSR(IP12_11_8, RTS0_N_TANS), + PINMUX_IPSR_MSEL(IP12_11_8, HRTS1_N_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP12_11_8, MSIOF1_SS1_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_11_8, AUDIO_CLKA_B, SEL_ADG_A_1), + PINMUX_IPSR_MSEL(IP12_11_8, SCL2_A, SEL_I2C2_0), + PINMUX_IPSR_MSEL(IP12_11_8, STP_IVCXO27_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_11_8, RIF0_SYNC_B, SEL_DRIF0_1), + PINMUX_IPSR_GPSR(IP12_11_8, ADICHS1), + + PINMUX_IPSR_MSEL(IP12_15_12, RX1_A, SEL_SCIF1_0), + PINMUX_IPSR_MSEL(IP12_15_12, HRX1_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP12_15_12, TS_SDAT0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP12_15_12, STP_ISD_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP12_15_12, RIF1_CLK_C, SEL_DRIF1_2), + + PINMUX_IPSR_MSEL(IP12_19_16, TX1_A, SEL_SCIF1_0), + PINMUX_IPSR_MSEL(IP12_19_16, HTX1_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP12_19_16, TS_SDEN0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP12_19_16, STP_ISEN_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP12_19_16, RIF1_D0_C, SEL_DRIF1_2), + + PINMUX_IPSR_GPSR(IP12_23_20, CTS1_N), + PINMUX_IPSR_MSEL(IP12_23_20, HCTS1_N_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP12_23_20, MSIOF1_RXD_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_23_20, TS_SDEN1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP12_23_20, STP_ISEN_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_23_20, RIF1_D0_B, SEL_DRIF1_1), + PINMUX_IPSR_GPSR(IP12_23_20, ADIDATA), + + PINMUX_IPSR_GPSR(IP12_27_24, RTS1_N_TANS), + PINMUX_IPSR_MSEL(IP12_27_24, HRTS1_N_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP12_27_24, MSIOF1_TXD_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_27_24, TS_SDAT1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP12_27_24, STP_ISD_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_27_24, RIF1_D1_B, SEL_DRIF1_1), + PINMUX_IPSR_GPSR(IP12_27_24, ADICHS0), + + PINMUX_IPSR_GPSR(IP12_31_28, SCK2), + PINMUX_IPSR_MSEL(IP12_31_28, SCIF_CLK_B, SEL_SCIF_1), + PINMUX_IPSR_MSEL(IP12_31_28, MSIOF1_SCK_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_31_28, TS_SCK1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP12_31_28, STP_ISCLK_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_31_28, RIF1_CLK_B, SEL_DRIF1_1), + PINMUX_IPSR_GPSR(IP12_31_28, ADICLK), + + /* IPSR13 */ + PINMUX_IPSR_MSEL(IP13_3_0, TX2_A, SEL_SCIF2_0), + PINMUX_IPSR_MSEL(IP13_3_0, SD2_CD_B, SEL_SDHI2_1), + PINMUX_IPSR_MSEL(IP13_3_0, SCL1_A, SEL_I2C1_0), + PINMUX_IPSR_MSEL(IP13_3_0, FMCLK_A, SEL_FM_0), + PINMUX_IPSR_MSEL(IP13_3_0, RIF1_D1_C, SEL_DRIF1_2), + PINMUX_IPSR_GPSR(IP13_3_0, FSO_CFE_0_N), + + PINMUX_IPSR_MSEL(IP13_7_4, RX2_A, SEL_SCIF2_0), + PINMUX_IPSR_MSEL(IP13_7_4, SD2_WP_B, SEL_SDHI2_1), + PINMUX_IPSR_MSEL(IP13_7_4, SDA1_A, SEL_I2C1_0), + PINMUX_IPSR_MSEL(IP13_7_4, FMIN_A, SEL_FM_0), + PINMUX_IPSR_MSEL(IP13_7_4, RIF1_SYNC_C, SEL_DRIF1_2), + PINMUX_IPSR_GPSR(IP13_7_4, FSO_CFE_1_N), + + PINMUX_IPSR_GPSR(IP13_11_8, HSCK0), + PINMUX_IPSR_MSEL(IP13_11_8, MSIOF1_SCK_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_11_8, AUDIO_CLKB_A, SEL_ADG_B_0), + PINMUX_IPSR_MSEL(IP13_11_8, SSI_SDATA1_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP13_11_8, TS_SCK0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP13_11_8, STP_ISCLK_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_11_8, RIF0_CLK_C, SEL_DRIF0_2), + PINMUX_IPSR_MSEL(IP13_11_8, RX5_B, SEL_SCIF5_1), + + PINMUX_IPSR_GPSR(IP13_15_12, HRX0), + PINMUX_IPSR_MSEL(IP13_15_12, MSIOF1_RXD_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_15_12, SSI_SDATA2_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP13_15_12, TS_SDEN0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP13_15_12, STP_ISEN_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_15_12, RIF0_D0_C, SEL_DRIF0_2), + + PINMUX_IPSR_GPSR(IP13_19_16, HTX0), + PINMUX_IPSR_MSEL(IP13_19_16, MSIOF1_TXD_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_19_16, SSI_SDATA9_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP13_19_16, TS_SDAT0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP13_19_16, STP_ISD_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_19_16, RIF0_D1_C, SEL_DRIF0_2), + + PINMUX_IPSR_GPSR(IP13_23_20, HCTS0_N), + PINMUX_IPSR_MSEL(IP13_23_20, RX2_B, SEL_SCIF2_1), + PINMUX_IPSR_MSEL(IP13_23_20, MSIOF1_SYNC_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_23_20, SSI_SCK9_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP13_23_20, TS_SPSYNC0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP13_23_20, STP_ISSYNC_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_23_20, RIF0_SYNC_C, SEL_DRIF0_2), + PINMUX_IPSR_GPSR(IP13_23_20, AUDIO_CLKOUT1_A), + + PINMUX_IPSR_GPSR(IP13_27_24, HRTS0_N), + PINMUX_IPSR_MSEL(IP13_27_24, TX2_B, SEL_SCIF2_1), + PINMUX_IPSR_MSEL(IP13_27_24, MSIOF1_SS1_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_27_24, SSI_WS9_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP13_27_24, STP_IVCXO27_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_27_24, BPFCLK_A, SEL_FM_0), + PINMUX_IPSR_GPSR(IP13_27_24, AUDIO_CLKOUT2_A), + + PINMUX_IPSR_GPSR(IP13_31_28, MSIOF0_SYNC), + PINMUX_IPSR_GPSR(IP13_31_28, AUDIO_CLKOUT_A), + PINMUX_IPSR_MSEL(IP13_31_28, TX5_B, SEL_SCIF5_1), + PINMUX_IPSR_MSEL(IP13_31_28, BPFCLK_D, SEL_FM_3), + + /* IPSR14 */ + PINMUX_IPSR_GPSR(IP14_3_0, MSIOF0_SS1), + PINMUX_IPSR_MSEL(IP14_3_0, RX5_A, SEL_SCIF5_0), + PINMUX_IPSR_GPSR(IP14_3_0, NFWP_N_A), + PINMUX_IPSR_MSEL(IP14_3_0, AUDIO_CLKA_C, SEL_ADG_A_2), + PINMUX_IPSR_MSEL(IP14_3_0, SSI_SCK2_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP14_3_0, STP_IVCXO27_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_GPSR(IP14_3_0, AUDIO_CLKOUT3_A), + PINMUX_IPSR_MSEL(IP14_3_0, TCLK1_B, SEL_TIMER_TMU1_1), + + PINMUX_IPSR_GPSR(IP14_7_4, MSIOF0_SS2), + PINMUX_IPSR_MSEL(IP14_7_4, TX5_A, SEL_SCIF5_0), + PINMUX_IPSR_MSEL(IP14_7_4, MSIOF1_SS2_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP14_7_4, AUDIO_CLKC_A, SEL_ADG_C_0), + PINMUX_IPSR_MSEL(IP14_7_4, SSI_WS2_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP14_7_4, STP_OPWM_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_GPSR(IP14_7_4, AUDIO_CLKOUT_D), + PINMUX_IPSR_MSEL(IP14_7_4, SPEEDIN_B, SEL_SPEED_PULSE_1), + + PINMUX_IPSR_GPSR(IP14_11_8, MLB_CLK), + PINMUX_IPSR_MSEL(IP14_11_8, MSIOF1_SCK_F, SEL_MSIOF1_5), + PINMUX_IPSR_MSEL(IP14_11_8, SCL1_B, SEL_I2C1_1), + + PINMUX_IPSR_GPSR(IP14_15_12, MLB_SIG), + PINMUX_IPSR_MSEL(IP14_15_12, RX1_B, SEL_SCIF1_1), + PINMUX_IPSR_MSEL(IP14_15_12, MSIOF1_SYNC_F, SEL_MSIOF1_5), + PINMUX_IPSR_MSEL(IP14_15_12, SDA1_B, SEL_I2C1_1), + + PINMUX_IPSR_GPSR(IP14_19_16, MLB_DAT), + PINMUX_IPSR_MSEL(IP14_19_16, TX1_B, SEL_SCIF1_1), + PINMUX_IPSR_MSEL(IP14_19_16, MSIOF1_RXD_F, SEL_MSIOF1_5), + + PINMUX_IPSR_GPSR(IP14_23_20, SSI_SCK01239), + PINMUX_IPSR_MSEL(IP14_23_20, MSIOF1_TXD_F, SEL_MSIOF1_5), + + PINMUX_IPSR_GPSR(IP14_27_24, SSI_WS01239), + PINMUX_IPSR_MSEL(IP14_27_24, MSIOF1_SS1_F, SEL_MSIOF1_5), + + PINMUX_IPSR_GPSR(IP14_31_28, SSI_SDATA0), + PINMUX_IPSR_MSEL(IP14_31_28, MSIOF1_SS2_F, SEL_MSIOF1_5), + + /* IPSR15 */ + PINMUX_IPSR_MSEL(IP15_3_0, SSI_SDATA1_A, SEL_SSI_0), + + PINMUX_IPSR_MSEL(IP15_7_4, SSI_SDATA2_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP15_7_4, SSI_SCK1_B, SEL_SSI_1), + + PINMUX_IPSR_GPSR(IP15_11_8, SSI_SCK349), + PINMUX_IPSR_MSEL(IP15_11_8, MSIOF1_SS1_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_11_8, STP_OPWM_0_A, SEL_SSP1_0_0), + + PINMUX_IPSR_GPSR(IP15_15_12, SSI_WS349), + PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_15_12, MSIOF1_SS2_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_15_12, STP_IVCXO27_0_A, SEL_SSP1_0_0), + + PINMUX_IPSR_GPSR(IP15_19_16, SSI_SDATA3), + PINMUX_IPSR_MSEL(IP15_19_16, HRTS2_N_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_19_16, MSIOF1_TXD_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_19_16, TS_SCK0_A, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_19_16, STP_ISCLK_0_A, SEL_SSP1_0_0), + PINMUX_IPSR_MSEL(IP15_19_16, RIF0_D1_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP15_19_16, RIF2_D0_A, SEL_DRIF2_0), + + PINMUX_IPSR_GPSR(IP15_23_20, SSI_SCK4), + PINMUX_IPSR_MSEL(IP15_23_20, HRX2_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_23_20, MSIOF1_SCK_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_23_20, TS_SDAT0_A, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_23_20, STP_ISD_0_A, SEL_SSP1_0_0), + PINMUX_IPSR_MSEL(IP15_23_20, RIF0_CLK_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP15_23_20, RIF2_CLK_A, SEL_DRIF2_0), + + PINMUX_IPSR_GPSR(IP15_27_24, SSI_WS4), + PINMUX_IPSR_MSEL(IP15_27_24, HTX2_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_27_24, MSIOF1_SYNC_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_27_24, TS_SDEN0_A, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_27_24, STP_ISEN_0_A, SEL_SSP1_0_0), + PINMUX_IPSR_MSEL(IP15_27_24, RIF0_SYNC_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP15_27_24, RIF2_SYNC_A, SEL_DRIF2_0), + + PINMUX_IPSR_GPSR(IP15_31_28, SSI_SDATA4), + PINMUX_IPSR_MSEL(IP15_31_28, HSCK2_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_31_28, MSIOF1_RXD_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_31_28, TS_SPSYNC0_A, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_31_28, STP_ISSYNC_0_A, SEL_SSP1_0_0), + PINMUX_IPSR_MSEL(IP15_31_28, RIF0_D0_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP15_31_28, RIF2_D1_A, SEL_DRIF2_0), + + /* IPSR16 */ + PINMUX_IPSR_GPSR(IP16_3_0, SSI_SCK6), + PINMUX_IPSR_GPSR(IP16_3_0, USB2_PWEN), + PINMUX_IPSR_MSEL(IP16_3_0, SIM0_RST_D, SEL_SIMCARD_3), + + PINMUX_IPSR_GPSR(IP16_7_4, SSI_WS6), + PINMUX_IPSR_GPSR(IP16_7_4, USB2_OVC), + PINMUX_IPSR_MSEL(IP16_7_4, SIM0_D_D, SEL_SIMCARD_3), + + PINMUX_IPSR_GPSR(IP16_11_8, SSI_SDATA6), + PINMUX_IPSR_MSEL(IP16_11_8, SIM0_CLK_D, SEL_SIMCARD_3), + PINMUX_IPSR_GPSR(IP16_11_8, SATA_DEVSLP_A), + + PINMUX_IPSR_GPSR(IP16_15_12, SSI_SCK78), + PINMUX_IPSR_MSEL(IP16_15_12, HRX2_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_15_12, MSIOF1_SCK_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_15_12, TS_SCK1_A, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP16_15_12, STP_ISCLK_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_15_12, RIF1_CLK_A, SEL_DRIF1_0), + PINMUX_IPSR_MSEL(IP16_15_12, RIF3_CLK_A, SEL_DRIF3_0), + + PINMUX_IPSR_GPSR(IP16_19_16, SSI_WS78), + PINMUX_IPSR_MSEL(IP16_19_16, HTX2_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_19_16, MSIOF1_SYNC_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_19_16, TS_SDAT1_A, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP16_19_16, STP_ISD_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_19_16, RIF1_SYNC_A, SEL_DRIF1_0), + PINMUX_IPSR_MSEL(IP16_19_16, RIF3_SYNC_A, SEL_DRIF3_0), + + PINMUX_IPSR_GPSR(IP16_23_20, SSI_SDATA7), + PINMUX_IPSR_MSEL(IP16_23_20, HCTS2_N_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_23_20, MSIOF1_RXD_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_23_20, TS_SDEN1_A, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP16_23_20, STP_ISEN_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_23_20, RIF1_D0_A, SEL_DRIF1_0), + PINMUX_IPSR_MSEL(IP16_23_20, RIF3_D0_A, SEL_DRIF3_0), + PINMUX_IPSR_MSEL(IP16_23_20, TCLK2_A, SEL_TIMER_TMU2_0), + + PINMUX_IPSR_GPSR(IP16_27_24, SSI_SDATA8), + PINMUX_IPSR_MSEL(IP16_27_24, HRTS2_N_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_27_24, MSIOF1_TXD_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_27_24, TS_SPSYNC1_A, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP16_27_24, STP_ISSYNC_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_27_24, RIF1_D1_A, SEL_DRIF1_0), + PINMUX_IPSR_MSEL(IP16_27_24, RIF3_D1_A, SEL_DRIF3_0), + + PINMUX_IPSR_MSEL(IP16_31_28, SSI_SDATA9_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP16_31_28, HSCK2_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_31_28, MSIOF1_SS1_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_31_28, HSCK1_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP16_31_28, SSI_WS1_B, SEL_SSI_1), + PINMUX_IPSR_GPSR(IP16_31_28, SCK1), + PINMUX_IPSR_MSEL(IP16_31_28, STP_IVCXO27_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_31_28, SCK5_A, SEL_SCIF5_0), + + /* IPSR17 */ + PINMUX_IPSR_MSEL(IP17_3_0, AUDIO_CLKA_A, SEL_ADG_A_0), + PINMUX_IPSR_GPSR(IP17_3_0, CC5_OSCOUT), + + PINMUX_IPSR_MSEL(IP17_7_4, AUDIO_CLKB_B, SEL_ADG_B_1), + PINMUX_IPSR_MSEL(IP17_7_4, SCIF_CLK_A, SEL_SCIF_0), + PINMUX_IPSR_MSEL(IP17_7_4, STP_IVCXO27_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_7_4, REMOCON_A, SEL_REMOCON_0), + PINMUX_IPSR_MSEL(IP17_7_4, TCLK1_A, SEL_TIMER_TMU1_0), + + PINMUX_IPSR_GPSR(IP17_11_8, USB0_PWEN), + PINMUX_IPSR_MSEL(IP17_11_8, SIM0_RST_C, SEL_SIMCARD_2), + PINMUX_IPSR_MSEL(IP17_11_8, TS_SCK1_D, SEL_TSIF1_3), + PINMUX_IPSR_MSEL(IP17_11_8, STP_ISCLK_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_11_8, BPFCLK_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP17_11_8, RIF3_CLK_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP17_11_8, HSCK2_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_15_12, USB0_OVC), + PINMUX_IPSR_MSEL(IP17_15_12, SIM0_D_C, SEL_SIMCARD_2), + PINMUX_IPSR_MSEL(IP17_15_12, TS_SDAT1_D, SEL_TSIF1_3), + PINMUX_IPSR_MSEL(IP17_15_12, STP_ISD_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_15_12, RIF3_SYNC_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP17_15_12, HRX2_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_19_16, USB1_PWEN), + PINMUX_IPSR_MSEL(IP17_19_16, SIM0_CLK_C, SEL_SIMCARD_2), + PINMUX_IPSR_MSEL(IP17_19_16, SSI_SCK1_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP17_19_16, TS_SCK0_E, SEL_TSIF0_4), + PINMUX_IPSR_MSEL(IP17_19_16, STP_ISCLK_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP17_19_16, FMCLK_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP17_19_16, RIF2_CLK_B, SEL_DRIF2_1), + PINMUX_IPSR_MSEL(IP17_19_16, SPEEDIN_A, SEL_SPEED_PULSE_0), + PINMUX_IPSR_MSEL(IP17_19_16, HTX2_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_23_20, USB1_OVC), + PINMUX_IPSR_MSEL(IP17_23_20, MSIOF1_SS2_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP17_23_20, SSI_WS1_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP17_23_20, TS_SDAT0_E, SEL_TSIF0_4), + PINMUX_IPSR_MSEL(IP17_23_20, STP_ISD_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP17_23_20, FMIN_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP17_23_20, RIF2_SYNC_B, SEL_DRIF2_1), + PINMUX_IPSR_MSEL(IP17_23_20, REMOCON_B, SEL_REMOCON_1), + PINMUX_IPSR_MSEL(IP17_23_20, HCTS2_N_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_27_24, USB30_PWEN), + PINMUX_IPSR_GPSR(IP17_27_24, AUDIO_CLKOUT_B), + PINMUX_IPSR_MSEL(IP17_27_24, SSI_SCK2_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP17_27_24, TS_SDEN1_D, SEL_TSIF1_3), + PINMUX_IPSR_MSEL(IP17_27_24, STP_ISEN_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_27_24, STP_OPWM_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP17_27_24, RIF3_D0_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP17_27_24, TCLK2_B, SEL_TIMER_TMU2_1), + PINMUX_IPSR_GPSR(IP17_27_24, TPU0TO0), + PINMUX_IPSR_MSEL(IP17_27_24, BPFCLK_C, SEL_FM_2), + PINMUX_IPSR_MSEL(IP17_27_24, HRTS2_N_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_31_28, USB30_OVC), + PINMUX_IPSR_GPSR(IP17_31_28, AUDIO_CLKOUT1_B), + PINMUX_IPSR_MSEL(IP17_31_28, SSI_WS2_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP17_31_28, TS_SPSYNC1_D, SEL_TSIF1_3), + PINMUX_IPSR_MSEL(IP17_31_28, STP_ISSYNC_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_31_28, STP_IVCXO27_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP17_31_28, RIF3_D1_B, SEL_DRIF3_1), + PINMUX_IPSR_GPSR(IP17_31_28, FSO_TOE_N), + PINMUX_IPSR_GPSR(IP17_31_28, TPU0TO1), + + /* IPSR18 */ + PINMUX_IPSR_GPSR(IP18_3_0, USB2_CH3_PWEN), + PINMUX_IPSR_GPSR(IP18_3_0, AUDIO_CLKOUT2_B), + PINMUX_IPSR_MSEL(IP18_3_0, SSI_SCK9_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP18_3_0, TS_SDEN0_E, SEL_TSIF0_4), + PINMUX_IPSR_MSEL(IP18_3_0, STP_ISEN_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP18_3_0, RIF2_D0_B, SEL_DRIF2_1), + PINMUX_IPSR_GPSR(IP18_3_0, TPU0TO2), + PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_C, SEL_FM_2), + PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_D, SEL_FM_3), + + PINMUX_IPSR_GPSR(IP18_7_4, USB2_CH3_OVC), + PINMUX_IPSR_GPSR(IP18_7_4, AUDIO_CLKOUT3_B), + PINMUX_IPSR_MSEL(IP18_7_4, SSI_WS9_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP18_7_4, TS_SPSYNC0_E, SEL_TSIF0_4), + PINMUX_IPSR_MSEL(IP18_7_4, STP_ISSYNC_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP18_7_4, RIF2_D1_B, SEL_DRIF2_1), + PINMUX_IPSR_GPSR(IP18_7_4, TPU0TO3), + PINMUX_IPSR_MSEL(IP18_7_4, FMIN_C, SEL_FM_2), + PINMUX_IPSR_MSEL(IP18_7_4, FMIN_D, SEL_FM_3), + +/* + * Static pins can not be muxed between different functions but + * still needs a mark entry in the pinmux list. Add each static + * pin to the list without an associated function. The sh-pfc + * core will do the right thing and skip trying to mux then pin + * while still applying configuration to it + */ +#define FM(x) PINMUX_DATA(x##_MARK, 0), + PINMUX_STATIC +#undef FM +}; + +/* + * R8A7795 has 8 banks with 32 PGIOS in each => 256 GPIOs. + * Physical layout rows: A - AW, cols: 1 - 39. + */ +#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) +#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300) +#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) + +static const struct sh_pfc_pin pinmux_pins[] = { + PINMUX_GPIO_GP_ALL(), + + /* + * Pins not associated with a GPIO port. + * + * The pin positions are different between different r8a7795 + * packages, all that is needed for the pfc driver is a unique + * number for each pin. To this end use the pin layout from + * R-Car H3SiP to calculate a unique number for each pin. + */ + SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('F', 1, CLKOUT, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 7, DU_DOTCLKIN2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS), +}; + +/* - EtherAVB --------------------------------------------------------------- */ +static const unsigned int avb_link_pins[] = { + /* AVB_LINK */ + RCAR_GP_PIN(2, 12), +}; +static const unsigned int avb_link_mux[] = { + AVB_LINK_MARK, +}; +static const unsigned int avb_magic_pins[] = { + /* AVB_MAGIC_ */ + RCAR_GP_PIN(2, 10), +}; +static const unsigned int avb_magic_mux[] = { + AVB_MAGIC_MARK, +}; +static const unsigned int avb_phy_int_pins[] = { + /* AVB_PHY_INT */ + RCAR_GP_PIN(2, 11), +}; +static const unsigned int avb_phy_int_mux[] = { + AVB_PHY_INT_MARK, +}; +static const unsigned int avb_mdc_pins[] = { + /* AVB_MDC, AVB_MDIO */ + RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), +}; +static const unsigned int avb_mdc_mux[] = { + AVB_MDC_MARK, AVB_MDIO_MARK, +}; +static const unsigned int avb_mii_pins[] = { + /* + * AVB_TX_CTL, AVB_TXC, AVB_TD0, + * AVB_TD1, AVB_TD2, AVB_TD3, + * AVB_RX_CTL, AVB_RXC, AVB_RD0, + * AVB_RD1, AVB_RD2, AVB_RD3, + * AVB_TXCREFCLK + */ + PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), + PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), + PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), + PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), + PIN_NUMBER('A', 12), + +}; +static const unsigned int avb_mii_mux[] = { + AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, + AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK, + AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK, + AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK, + AVB_TXCREFCLK_MARK, +}; +static const unsigned int avb_avtp_pps_pins[] = { + /* AVB_AVTP_PPS */ + RCAR_GP_PIN(2, 6), +}; +static const unsigned int avb_avtp_pps_mux[] = { + AVB_AVTP_PPS_MARK, +}; +static const unsigned int avb_avtp_match_a_pins[] = { + /* AVB_AVTP_MATCH_A */ + RCAR_GP_PIN(2, 13), +}; +static const unsigned int avb_avtp_match_a_mux[] = { + AVB_AVTP_MATCH_A_MARK, +}; +static const unsigned int avb_avtp_capture_a_pins[] = { + /* AVB_AVTP_CAPTURE_A */ + RCAR_GP_PIN(2, 14), +}; +static const unsigned int avb_avtp_capture_a_mux[] = { + AVB_AVTP_CAPTURE_A_MARK, +}; +static const unsigned int avb_avtp_match_b_pins[] = { + /* AVB_AVTP_MATCH_B */ + RCAR_GP_PIN(1, 8), +}; +static const unsigned int avb_avtp_match_b_mux[] = { + AVB_AVTP_MATCH_B_MARK, +}; +static const unsigned int avb_avtp_capture_b_pins[] = { + /* AVB_AVTP_CAPTURE_B */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int avb_avtp_capture_b_mux[] = { + AVB_AVTP_CAPTURE_B_MARK, +}; + +/* - DRIF0 --------------------------------------------------------------- */ +static const unsigned int drif0_ctrl_a_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), +}; +static const unsigned int drif0_ctrl_a_mux[] = { + RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK, +}; +static const unsigned int drif0_data0_a_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int drif0_data0_a_mux[] = { + RIF0_D0_A_MARK, +}; +static const unsigned int drif0_data1_a_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 7), +}; +static const unsigned int drif0_data1_a_mux[] = { + RIF0_D1_A_MARK, +}; +static const unsigned int drif0_ctrl_b_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4), +}; +static const unsigned int drif0_ctrl_b_mux[] = { + RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK, +}; +static const unsigned int drif0_data0_b_pins[] = { + /* D0 */ + RCAR_GP_PIN(5, 1), +}; +static const unsigned int drif0_data0_b_mux[] = { + RIF0_D0_B_MARK, +}; +static const unsigned int drif0_data1_b_pins[] = { + /* D1 */ + RCAR_GP_PIN(5, 2), +}; +static const unsigned int drif0_data1_b_mux[] = { + RIF0_D1_B_MARK, +}; +static const unsigned int drif0_ctrl_c_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15), +}; +static const unsigned int drif0_ctrl_c_mux[] = { + RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK, +}; +static const unsigned int drif0_data0_c_pins[] = { + /* D0 */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int drif0_data0_c_mux[] = { + RIF0_D0_C_MARK, +}; +static const unsigned int drif0_data1_c_pins[] = { + /* D1 */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int drif0_data1_c_mux[] = { + RIF0_D1_C_MARK, +}; +/* - DRIF1 --------------------------------------------------------------- */ +static const unsigned int drif1_ctrl_a_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), +}; +static const unsigned int drif1_ctrl_a_mux[] = { + RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK, +}; +static const unsigned int drif1_data0_a_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 19), +}; +static const unsigned int drif1_data0_a_mux[] = { + RIF1_D0_A_MARK, +}; +static const unsigned int drif1_data1_a_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 20), +}; +static const unsigned int drif1_data1_a_mux[] = { + RIF1_D1_A_MARK, +}; +static const unsigned int drif1_ctrl_b_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3), +}; +static const unsigned int drif1_ctrl_b_mux[] = { + RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK, +}; +static const unsigned int drif1_data0_b_pins[] = { + /* D0 */ + RCAR_GP_PIN(5, 7), +}; +static const unsigned int drif1_data0_b_mux[] = { + RIF1_D0_B_MARK, +}; +static const unsigned int drif1_data1_b_pins[] = { + /* D1 */ + RCAR_GP_PIN(5, 8), +}; +static const unsigned int drif1_data1_b_mux[] = { + RIF1_D1_B_MARK, +}; +static const unsigned int drif1_ctrl_c_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11), +}; +static const unsigned int drif1_ctrl_c_mux[] = { + RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK, +}; +static const unsigned int drif1_data0_c_pins[] = { + /* D0 */ + RCAR_GP_PIN(5, 6), +}; +static const unsigned int drif1_data0_c_mux[] = { + RIF1_D0_C_MARK, +}; +static const unsigned int drif1_data1_c_pins[] = { + /* D1 */ + RCAR_GP_PIN(5, 10), +}; +static const unsigned int drif1_data1_c_mux[] = { + RIF1_D1_C_MARK, +}; +/* - DRIF2 --------------------------------------------------------------- */ +static const unsigned int drif2_ctrl_a_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), +}; +static const unsigned int drif2_ctrl_a_mux[] = { + RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK, +}; +static const unsigned int drif2_data0_a_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 7), +}; +static const unsigned int drif2_data0_a_mux[] = { + RIF2_D0_A_MARK, +}; +static const unsigned int drif2_data1_a_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int drif2_data1_a_mux[] = { + RIF2_D1_A_MARK, +}; +static const unsigned int drif2_ctrl_b_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), +}; +static const unsigned int drif2_ctrl_b_mux[] = { + RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK, +}; +static const unsigned int drif2_data0_b_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 30), +}; +static const unsigned int drif2_data0_b_mux[] = { + RIF2_D0_B_MARK, +}; +static const unsigned int drif2_data1_b_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 31), +}; +static const unsigned int drif2_data1_b_mux[] = { + RIF2_D1_B_MARK, +}; +/* - DRIF3 --------------------------------------------------------------- */ +static const unsigned int drif3_ctrl_a_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), +}; +static const unsigned int drif3_ctrl_a_mux[] = { + RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK, +}; +static const unsigned int drif3_data0_a_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 19), +}; +static const unsigned int drif3_data0_a_mux[] = { + RIF3_D0_A_MARK, +}; +static const unsigned int drif3_data1_a_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 20), +}; +static const unsigned int drif3_data1_a_mux[] = { + RIF3_D1_A_MARK, +}; +static const unsigned int drif3_ctrl_b_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), +}; +static const unsigned int drif3_ctrl_b_mux[] = { + RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK, +}; +static const unsigned int drif3_data0_b_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 28), +}; +static const unsigned int drif3_data0_b_mux[] = { + RIF3_D0_B_MARK, +}; +static const unsigned int drif3_data1_b_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 29), +}; +static const unsigned int drif3_data1_b_mux[] = { + RIF3_D1_B_MARK, +}; + +/* - DU --------------------------------------------------------------------- */ +static const unsigned int du_rgb666_pins[] = { + /* R[7:2], G[7:2], B[7:2] */ + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18), + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5), + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2), +}; +static const unsigned int du_rgb666_mux[] = { + DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK, + DU_DR3_MARK, DU_DR2_MARK, + DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK, + DU_DG3_MARK, DU_DG2_MARK, + DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK, + DU_DB3_MARK, DU_DB2_MARK, +}; +static const unsigned int du_rgb888_pins[] = { + /* R[7:0], G[7:0], B[7:0] */ + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), + RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 8), + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18), + RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16), + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5), + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2), + RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 0), +}; +static const unsigned int du_rgb888_mux[] = { + DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK, + DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK, + DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK, + DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK, + DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK, + DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK, +}; +static const unsigned int du_clk_out_0_pins[] = { + /* CLKOUT */ + RCAR_GP_PIN(1, 27), +}; +static const unsigned int du_clk_out_0_mux[] = { + DU_DOTCLKOUT0_MARK +}; +static const unsigned int du_clk_out_1_pins[] = { + /* CLKOUT */ + RCAR_GP_PIN(2, 3), +}; +static const unsigned int du_clk_out_1_mux[] = { + DU_DOTCLKOUT1_MARK +}; +static const unsigned int du_sync_pins[] = { + /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */ + RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4), +}; +static const unsigned int du_sync_mux[] = { + DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK +}; +static const unsigned int du_oddf_pins[] = { + /* EXDISP/EXODDF/EXCDE */ + RCAR_GP_PIN(2, 2), +}; +static const unsigned int du_oddf_mux[] = { + DU_EXODDF_DU_ODDF_DISP_CDE_MARK, +}; +static const unsigned int du_cde_pins[] = { + /* CDE */ + RCAR_GP_PIN(2, 0), +}; +static const unsigned int du_cde_mux[] = { + DU_CDE_MARK, +}; +static const unsigned int du_disp_pins[] = { + /* DISP */ + RCAR_GP_PIN(2, 1), +}; +static const unsigned int du_disp_mux[] = { + DU_DISP_MARK, +}; + +/* - MSIOF0 ----------------------------------------------------------------- */ +static const unsigned int msiof0_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 17), +}; +static const unsigned int msiof0_clk_mux[] = { + MSIOF0_SCK_MARK, +}; +static const unsigned int msiof0_sync_pins[] = { + /* SYNC */ + RCAR_GP_PIN(5, 18), +}; +static const unsigned int msiof0_sync_mux[] = { + MSIOF0_SYNC_MARK, +}; +static const unsigned int msiof0_ss1_pins[] = { + /* SS1 */ + RCAR_GP_PIN(5, 19), +}; +static const unsigned int msiof0_ss1_mux[] = { + MSIOF0_SS1_MARK, +}; +static const unsigned int msiof0_ss2_pins[] = { + /* SS2 */ + RCAR_GP_PIN(5, 21), +}; +static const unsigned int msiof0_ss2_mux[] = { + MSIOF0_SS2_MARK, +}; +static const unsigned int msiof0_txd_pins[] = { + /* TXD */ + RCAR_GP_PIN(5, 20), +}; +static const unsigned int msiof0_txd_mux[] = { + MSIOF0_TXD_MARK, +}; +static const unsigned int msiof0_rxd_pins[] = { + /* RXD */ + RCAR_GP_PIN(5, 22), +}; +static const unsigned int msiof0_rxd_mux[] = { + MSIOF0_RXD_MARK, +}; +/* - MSIOF1 ----------------------------------------------------------------- */ +static const unsigned int msiof1_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 8), +}; +static const unsigned int msiof1_clk_a_mux[] = { + MSIOF1_SCK_A_MARK, +}; +static const unsigned int msiof1_sync_a_pins[] = { + /* SYNC */ + RCAR_GP_PIN(6, 9), +}; +static const unsigned int msiof1_sync_a_mux[] = { + MSIOF1_SYNC_A_MARK, +}; +static const unsigned int msiof1_ss1_a_pins[] = { + /* SS1 */ + RCAR_GP_PIN(6, 5), +}; +static const unsigned int msiof1_ss1_a_mux[] = { + MSIOF1_SS1_A_MARK, +}; +static const unsigned int msiof1_ss2_a_pins[] = { + /* SS2 */ + RCAR_GP_PIN(6, 6), +}; +static const unsigned int msiof1_ss2_a_mux[] = { + MSIOF1_SS2_A_MARK, +}; +static const unsigned int msiof1_txd_a_pins[] = { + /* TXD */ + RCAR_GP_PIN(6, 7), +}; +static const unsigned int msiof1_txd_a_mux[] = { + MSIOF1_TXD_A_MARK, +}; +static const unsigned int msiof1_rxd_a_pins[] = { + /* RXD */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int msiof1_rxd_a_mux[] = { + MSIOF1_RXD_A_MARK, +}; +static const unsigned int msiof1_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 9), +}; +static const unsigned int msiof1_clk_b_mux[] = { + MSIOF1_SCK_B_MARK, +}; +static const unsigned int msiof1_sync_b_pins[] = { + /* SYNC */ + RCAR_GP_PIN(5, 3), +}; +static const unsigned int msiof1_sync_b_mux[] = { + MSIOF1_SYNC_B_MARK, +}; +static const unsigned int msiof1_ss1_b_pins[] = { + /* SS1 */ + RCAR_GP_PIN(5, 4), +}; +static const unsigned int msiof1_ss1_b_mux[] = { + MSIOF1_SS1_B_MARK, +}; +static const unsigned int msiof1_ss2_b_pins[] = { + /* SS2 */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int msiof1_ss2_b_mux[] = { + MSIOF1_SS2_B_MARK, +}; +static const unsigned int msiof1_txd_b_pins[] = { + /* TXD */ + RCAR_GP_PIN(5, 8), +}; +static const unsigned int msiof1_txd_b_mux[] = { + MSIOF1_TXD_B_MARK, +}; +static const unsigned int msiof1_rxd_b_pins[] = { + /* RXD */ + RCAR_GP_PIN(5, 7), +}; +static const unsigned int msiof1_rxd_b_mux[] = { + MSIOF1_RXD_B_MARK, +}; +static const unsigned int msiof1_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 17), +}; +static const unsigned int msiof1_clk_c_mux[] = { + MSIOF1_SCK_C_MARK, +}; +static const unsigned int msiof1_sync_c_pins[] = { + /* SYNC */ + RCAR_GP_PIN(6, 18), +}; +static const unsigned int msiof1_sync_c_mux[] = { + MSIOF1_SYNC_C_MARK, +}; +static const unsigned int msiof1_ss1_c_pins[] = { + /* SS1 */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int msiof1_ss1_c_mux[] = { + MSIOF1_SS1_C_MARK, +}; +static const unsigned int msiof1_ss2_c_pins[] = { + /* SS2 */ + RCAR_GP_PIN(6, 27), +}; +static const unsigned int msiof1_ss2_c_mux[] = { + MSIOF1_SS2_C_MARK, +}; +static const unsigned int msiof1_txd_c_pins[] = { + /* TXD */ + RCAR_GP_PIN(6, 20), +}; +static const unsigned int msiof1_txd_c_mux[] = { + MSIOF1_TXD_C_MARK, +}; +static const unsigned int msiof1_rxd_c_pins[] = { + /* RXD */ + RCAR_GP_PIN(6, 19), +}; +static const unsigned int msiof1_rxd_c_mux[] = { + MSIOF1_RXD_C_MARK, +}; +static const unsigned int msiof1_clk_d_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int msiof1_clk_d_mux[] = { + MSIOF1_SCK_D_MARK, +}; +static const unsigned int msiof1_sync_d_pins[] = { + /* SYNC */ + RCAR_GP_PIN(5, 15), +}; +static const unsigned int msiof1_sync_d_mux[] = { + MSIOF1_SYNC_D_MARK, +}; +static const unsigned int msiof1_ss1_d_pins[] = { + /* SS1 */ + RCAR_GP_PIN(5, 16), +}; +static const unsigned int msiof1_ss1_d_mux[] = { + MSIOF1_SS1_D_MARK, +}; +static const unsigned int msiof1_ss2_d_pins[] = { + /* SS2 */ + RCAR_GP_PIN(5, 21), +}; +static const unsigned int msiof1_ss2_d_mux[] = { + MSIOF1_SS2_D_MARK, +}; +static const unsigned int msiof1_txd_d_pins[] = { + /* TXD */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int msiof1_txd_d_mux[] = { + MSIOF1_TXD_D_MARK, +}; +static const unsigned int msiof1_rxd_d_pins[] = { + /* RXD */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int msiof1_rxd_d_mux[] = { + MSIOF1_RXD_D_MARK, +}; +static const unsigned int msiof1_clk_e_pins[] = { + /* SCK */ + RCAR_GP_PIN(3, 0), +}; +static const unsigned int msiof1_clk_e_mux[] = { + MSIOF1_SCK_E_MARK, +}; +static const unsigned int msiof1_sync_e_pins[] = { + /* SYNC */ + RCAR_GP_PIN(3, 1), +}; +static const unsigned int msiof1_sync_e_mux[] = { + MSIOF1_SYNC_E_MARK, +}; +static const unsigned int msiof1_ss1_e_pins[] = { + /* SS1 */ + RCAR_GP_PIN(3, 4), +}; +static const unsigned int msiof1_ss1_e_mux[] = { + MSIOF1_SS1_E_MARK, +}; +static const unsigned int msiof1_ss2_e_pins[] = { + /* SS2 */ + RCAR_GP_PIN(3, 5), +}; +static const unsigned int msiof1_ss2_e_mux[] = { + MSIOF1_SS2_E_MARK, +}; +static const unsigned int msiof1_txd_e_pins[] = { + /* TXD */ + RCAR_GP_PIN(3, 3), +}; +static const unsigned int msiof1_txd_e_mux[] = { + MSIOF1_TXD_E_MARK, +}; +static const unsigned int msiof1_rxd_e_pins[] = { + /* RXD */ + RCAR_GP_PIN(3, 2), +}; +static const unsigned int msiof1_rxd_e_mux[] = { + MSIOF1_RXD_E_MARK, +}; +static const unsigned int msiof1_clk_f_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 23), +}; +static const unsigned int msiof1_clk_f_mux[] = { + MSIOF1_SCK_F_MARK, +}; +static const unsigned int msiof1_sync_f_pins[] = { + /* SYNC */ + RCAR_GP_PIN(5, 24), +}; +static const unsigned int msiof1_sync_f_mux[] = { + MSIOF1_SYNC_F_MARK, +}; +static const unsigned int msiof1_ss1_f_pins[] = { + /* SS1 */ + RCAR_GP_PIN(6, 1), +}; +static const unsigned int msiof1_ss1_f_mux[] = { + MSIOF1_SS1_F_MARK, +}; +static const unsigned int msiof1_ss2_f_pins[] = { + /* SS2 */ + RCAR_GP_PIN(6, 2), +}; +static const unsigned int msiof1_ss2_f_mux[] = { + MSIOF1_SS2_F_MARK, +}; +static const unsigned int msiof1_txd_f_pins[] = { + /* TXD */ + RCAR_GP_PIN(6, 0), +}; +static const unsigned int msiof1_txd_f_mux[] = { + MSIOF1_TXD_F_MARK, +}; +static const unsigned int msiof1_rxd_f_pins[] = { + /* RXD */ + RCAR_GP_PIN(5, 25), +}; +static const unsigned int msiof1_rxd_f_mux[] = { + MSIOF1_RXD_F_MARK, +}; +static const unsigned int msiof1_clk_g_pins[] = { + /* SCK */ + RCAR_GP_PIN(3, 6), +}; +static const unsigned int msiof1_clk_g_mux[] = { + MSIOF1_SCK_G_MARK, +}; +static const unsigned int msiof1_sync_g_pins[] = { + /* SYNC */ + RCAR_GP_PIN(3, 7), +}; +static const unsigned int msiof1_sync_g_mux[] = { + MSIOF1_SYNC_G_MARK, +}; +static const unsigned int msiof1_ss1_g_pins[] = { + /* SS1 */ + RCAR_GP_PIN(3, 10), +}; +static const unsigned int msiof1_ss1_g_mux[] = { + MSIOF1_SS1_G_MARK, +}; +static const unsigned int msiof1_ss2_g_pins[] = { + /* SS2 */ + RCAR_GP_PIN(3, 11), +}; +static const unsigned int msiof1_ss2_g_mux[] = { + MSIOF1_SS2_G_MARK, +}; +static const unsigned int msiof1_txd_g_pins[] = { + /* TXD */ + RCAR_GP_PIN(3, 9), +}; +static const unsigned int msiof1_txd_g_mux[] = { + MSIOF1_TXD_G_MARK, +}; +static const unsigned int msiof1_rxd_g_pins[] = { + /* RXD */ + RCAR_GP_PIN(3, 8), +}; +static const unsigned int msiof1_rxd_g_mux[] = { + MSIOF1_RXD_G_MARK, +}; +/* - MSIOF2 ----------------------------------------------------------------- */ +static const unsigned int msiof2_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 9), +}; +static const unsigned int msiof2_clk_a_mux[] = { + MSIOF2_SCK_A_MARK, +}; +static const unsigned int msiof2_sync_a_pins[] = { + /* SYNC */ + RCAR_GP_PIN(1, 8), +}; +static const unsigned int msiof2_sync_a_mux[] = { + MSIOF2_SYNC_A_MARK, +}; +static const unsigned int msiof2_ss1_a_pins[] = { + /* SS1 */ + RCAR_GP_PIN(1, 6), +}; +static const unsigned int msiof2_ss1_a_mux[] = { + MSIOF2_SS1_A_MARK, +}; +static const unsigned int msiof2_ss2_a_pins[] = { + /* SS2 */ + RCAR_GP_PIN(1, 7), +}; +static const unsigned int msiof2_ss2_a_mux[] = { + MSIOF2_SS2_A_MARK, +}; +static const unsigned int msiof2_txd_a_pins[] = { + /* TXD */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int msiof2_txd_a_mux[] = { + MSIOF2_TXD_A_MARK, +}; +static const unsigned int msiof2_rxd_a_pins[] = { + /* RXD */ + RCAR_GP_PIN(1, 10), +}; +static const unsigned int msiof2_rxd_a_mux[] = { + MSIOF2_RXD_A_MARK, +}; +static const unsigned int msiof2_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 4), +}; +static const unsigned int msiof2_clk_b_mux[] = { + MSIOF2_SCK_B_MARK, +}; +static const unsigned int msiof2_sync_b_pins[] = { + /* SYNC */ + RCAR_GP_PIN(0, 5), +}; +static const unsigned int msiof2_sync_b_mux[] = { + MSIOF2_SYNC_B_MARK, +}; +static const unsigned int msiof2_ss1_b_pins[] = { + /* SS1 */ + RCAR_GP_PIN(0, 0), +}; +static const unsigned int msiof2_ss1_b_mux[] = { + MSIOF2_SS1_B_MARK, +}; +static const unsigned int msiof2_ss2_b_pins[] = { + /* SS2 */ + RCAR_GP_PIN(0, 1), +}; +static const unsigned int msiof2_ss2_b_mux[] = { + MSIOF2_SS2_B_MARK, +}; +static const unsigned int msiof2_txd_b_pins[] = { + /* TXD */ + RCAR_GP_PIN(0, 7), +}; +static const unsigned int msiof2_txd_b_mux[] = { + MSIOF2_TXD_B_MARK, +}; +static const unsigned int msiof2_rxd_b_pins[] = { + /* RXD */ + RCAR_GP_PIN(0, 6), +}; +static const unsigned int msiof2_rxd_b_mux[] = { + MSIOF2_RXD_B_MARK, +}; +static const unsigned int msiof2_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 12), +}; +static const unsigned int msiof2_clk_c_mux[] = { + MSIOF2_SCK_C_MARK, +}; +static const unsigned int msiof2_sync_c_pins[] = { + /* SYNC */ + RCAR_GP_PIN(2, 11), +}; +static const unsigned int msiof2_sync_c_mux[] = { + MSIOF2_SYNC_C_MARK, +}; +static const unsigned int msiof2_ss1_c_pins[] = { + /* SS1 */ + RCAR_GP_PIN(2, 10), +}; +static const unsigned int msiof2_ss1_c_mux[] = { + MSIOF2_SS1_C_MARK, +}; +static const unsigned int msiof2_ss2_c_pins[] = { + /* SS2 */ + RCAR_GP_PIN(2, 9), +}; +static const unsigned int msiof2_ss2_c_mux[] = { + MSIOF2_SS2_C_MARK, +}; +static const unsigned int msiof2_txd_c_pins[] = { + /* TXD */ + RCAR_GP_PIN(2, 14), +}; +static const unsigned int msiof2_txd_c_mux[] = { + MSIOF2_TXD_C_MARK, +}; +static const unsigned int msiof2_rxd_c_pins[] = { + /* RXD */ + RCAR_GP_PIN(2, 13), +}; +static const unsigned int msiof2_rxd_c_mux[] = { + MSIOF2_RXD_C_MARK, +}; +static const unsigned int msiof2_clk_d_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 8), +}; +static const unsigned int msiof2_clk_d_mux[] = { + MSIOF2_SCK_D_MARK, +}; +static const unsigned int msiof2_sync_d_pins[] = { + /* SYNC */ + RCAR_GP_PIN(0, 9), +}; +static const unsigned int msiof2_sync_d_mux[] = { + MSIOF2_SYNC_D_MARK, +}; +static const unsigned int msiof2_ss1_d_pins[] = { + /* SS1 */ + RCAR_GP_PIN(0, 12), +}; +static const unsigned int msiof2_ss1_d_mux[] = { + MSIOF2_SS1_D_MARK, +}; +static const unsigned int msiof2_ss2_d_pins[] = { + /* SS2 */ + RCAR_GP_PIN(0, 13), +}; +static const unsigned int msiof2_ss2_d_mux[] = { + MSIOF2_SS2_D_MARK, +}; +static const unsigned int msiof2_txd_d_pins[] = { + /* TXD */ + RCAR_GP_PIN(0, 11), +}; +static const unsigned int msiof2_txd_d_mux[] = { + MSIOF2_TXD_D_MARK, +}; +static const unsigned int msiof2_rxd_d_pins[] = { + /* RXD */ + RCAR_GP_PIN(0, 10), +}; +static const unsigned int msiof2_rxd_d_mux[] = { + MSIOF2_RXD_D_MARK, +}; +/* - MSIOF3 ----------------------------------------------------------------- */ +static const unsigned int msiof3_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 0), +}; +static const unsigned int msiof3_clk_a_mux[] = { + MSIOF3_SCK_A_MARK, +}; +static const unsigned int msiof3_sync_a_pins[] = { + /* SYNC */ + RCAR_GP_PIN(0, 1), +}; +static const unsigned int msiof3_sync_a_mux[] = { + MSIOF3_SYNC_A_MARK, +}; +static const unsigned int msiof3_ss1_a_pins[] = { + /* SS1 */ + RCAR_GP_PIN(0, 14), +}; +static const unsigned int msiof3_ss1_a_mux[] = { + MSIOF3_SS1_A_MARK, +}; +static const unsigned int msiof3_ss2_a_pins[] = { + /* SS2 */ + RCAR_GP_PIN(0, 15), +}; +static const unsigned int msiof3_ss2_a_mux[] = { + MSIOF3_SS2_A_MARK, +}; +static const unsigned int msiof3_txd_a_pins[] = { + /* TXD */ + RCAR_GP_PIN(0, 3), +}; +static const unsigned int msiof3_txd_a_mux[] = { + MSIOF3_TXD_A_MARK, +}; +static const unsigned int msiof3_rxd_a_pins[] = { + /* RXD */ + RCAR_GP_PIN(0, 2), +}; +static const unsigned int msiof3_rxd_a_mux[] = { + MSIOF3_RXD_A_MARK, +}; +static const unsigned int msiof3_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 2), +}; +static const unsigned int msiof3_clk_b_mux[] = { + MSIOF3_SCK_B_MARK, +}; +static const unsigned int msiof3_sync_b_pins[] = { + /* SYNC */ + RCAR_GP_PIN(1, 0), +}; +static const unsigned int msiof3_sync_b_mux[] = { + MSIOF3_SYNC_B_MARK, +}; +static const unsigned int msiof3_ss1_b_pins[] = { + /* SS1 */ + RCAR_GP_PIN(1, 4), +}; +static const unsigned int msiof3_ss1_b_mux[] = { + MSIOF3_SS1_B_MARK, +}; +static const unsigned int msiof3_ss2_b_pins[] = { + /* SS2 */ + RCAR_GP_PIN(1, 5), +}; +static const unsigned int msiof3_ss2_b_mux[] = { + MSIOF3_SS2_B_MARK, +}; +static const unsigned int msiof3_txd_b_pins[] = { + /* TXD */ + RCAR_GP_PIN(1, 1), +}; +static const unsigned int msiof3_txd_b_mux[] = { + MSIOF3_TXD_B_MARK, +}; +static const unsigned int msiof3_rxd_b_pins[] = { + /* RXD */ + RCAR_GP_PIN(1, 3), +}; +static const unsigned int msiof3_rxd_b_mux[] = { + MSIOF3_RXD_B_MARK, +}; +static const unsigned int msiof3_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 12), +}; +static const unsigned int msiof3_clk_c_mux[] = { + MSIOF3_SCK_C_MARK, +}; +static const unsigned int msiof3_sync_c_pins[] = { + /* SYNC */ + RCAR_GP_PIN(1, 13), +}; +static const unsigned int msiof3_sync_c_mux[] = { + MSIOF3_SYNC_C_MARK, +}; +static const unsigned int msiof3_txd_c_pins[] = { + /* TXD */ + RCAR_GP_PIN(1, 15), +}; +static const unsigned int msiof3_txd_c_mux[] = { + MSIOF3_TXD_C_MARK, +}; +static const unsigned int msiof3_rxd_c_pins[] = { + /* RXD */ + RCAR_GP_PIN(1, 14), +}; +static const unsigned int msiof3_rxd_c_mux[] = { + MSIOF3_RXD_C_MARK, +}; +static const unsigned int msiof3_clk_d_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 22), +}; +static const unsigned int msiof3_clk_d_mux[] = { + MSIOF3_SCK_D_MARK, +}; +static const unsigned int msiof3_sync_d_pins[] = { + /* SYNC */ + RCAR_GP_PIN(1, 23), +}; +static const unsigned int msiof3_sync_d_mux[] = { + MSIOF3_SYNC_D_MARK, +}; +static const unsigned int msiof3_ss1_d_pins[] = { + /* SS1 */ + RCAR_GP_PIN(1, 26), +}; +static const unsigned int msiof3_ss1_d_mux[] = { + MSIOF3_SS1_D_MARK, +}; +static const unsigned int msiof3_txd_d_pins[] = { + /* TXD */ + RCAR_GP_PIN(1, 25), +}; +static const unsigned int msiof3_txd_d_mux[] = { + MSIOF3_TXD_D_MARK, +}; +static const unsigned int msiof3_rxd_d_pins[] = { + /* RXD */ + RCAR_GP_PIN(1, 24), +}; +static const unsigned int msiof3_rxd_d_mux[] = { + MSIOF3_RXD_D_MARK, +}; +static const unsigned int msiof3_clk_e_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 3), +}; +static const unsigned int msiof3_clk_e_mux[] = { + MSIOF3_SCK_E_MARK, +}; +static const unsigned int msiof3_sync_e_pins[] = { + /* SYNC */ + RCAR_GP_PIN(2, 2), +}; +static const unsigned int msiof3_sync_e_mux[] = { + MSIOF3_SYNC_E_MARK, +}; +static const unsigned int msiof3_ss1_e_pins[] = { + /* SS1 */ + RCAR_GP_PIN(2, 1), +}; +static const unsigned int msiof3_ss1_e_mux[] = { + MSIOF3_SS1_E_MARK, +}; +static const unsigned int msiof3_ss2_e_pins[] = { + /* SS1 */ + RCAR_GP_PIN(2, 0), +}; +static const unsigned int msiof3_ss2_e_mux[] = { + MSIOF3_SS2_E_MARK, +}; +static const unsigned int msiof3_txd_e_pins[] = { + /* TXD */ + RCAR_GP_PIN(2, 5), +}; +static const unsigned int msiof3_txd_e_mux[] = { + MSIOF3_TXD_E_MARK, +}; +static const unsigned int msiof3_rxd_e_pins[] = { + /* RXD */ + RCAR_GP_PIN(2, 4), +}; +static const unsigned int msiof3_rxd_e_mux[] = { + MSIOF3_RXD_E_MARK, +}; + +/* - PWM0 --------------------------------------------------------------------*/ +static const unsigned int pwm0_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 6), +}; +static const unsigned int pwm0_mux[] = { + PWM0_MARK, +}; +/* - PWM1 --------------------------------------------------------------------*/ +static const unsigned int pwm1_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 7), +}; +static const unsigned int pwm1_a_mux[] = { + PWM1_A_MARK, +}; +static const unsigned int pwm1_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 8), +}; +static const unsigned int pwm1_b_mux[] = { + PWM1_B_MARK, +}; +/* - PWM2 --------------------------------------------------------------------*/ +static const unsigned int pwm2_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 8), +}; +static const unsigned int pwm2_a_mux[] = { + PWM2_A_MARK, +}; +static const unsigned int pwm2_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int pwm2_b_mux[] = { + PWM2_B_MARK, +}; +/* - PWM3 --------------------------------------------------------------------*/ +static const unsigned int pwm3_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 0), +}; +static const unsigned int pwm3_a_mux[] = { + PWM3_A_MARK, +}; +static const unsigned int pwm3_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 2), +}; +static const unsigned int pwm3_b_mux[] = { + PWM3_B_MARK, +}; +/* - PWM4 --------------------------------------------------------------------*/ +static const unsigned int pwm4_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 1), +}; +static const unsigned int pwm4_a_mux[] = { + PWM4_A_MARK, +}; +static const unsigned int pwm4_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 3), +}; +static const unsigned int pwm4_b_mux[] = { + PWM4_B_MARK, +}; +/* - PWM5 --------------------------------------------------------------------*/ +static const unsigned int pwm5_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 2), +}; +static const unsigned int pwm5_a_mux[] = { + PWM5_A_MARK, +}; +static const unsigned int pwm5_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 4), +}; +static const unsigned int pwm5_b_mux[] = { + PWM5_B_MARK, +}; +/* - PWM6 --------------------------------------------------------------------*/ +static const unsigned int pwm6_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 3), +}; +static const unsigned int pwm6_a_mux[] = { + PWM6_A_MARK, +}; +static const unsigned int pwm6_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 5), +}; +static const unsigned int pwm6_b_mux[] = { + PWM6_B_MARK, +}; + +/* - SCIF0 ------------------------------------------------------------------ */ +static const unsigned int scif0_data_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), +}; +static const unsigned int scif0_data_mux[] = { + RX0_MARK, TX0_MARK, +}; +static const unsigned int scif0_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int scif0_clk_mux[] = { + SCK0_MARK, +}; +static const unsigned int scif0_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3), +}; +static const unsigned int scif0_ctrl_mux[] = { + RTS0_N_TANS_MARK, CTS0_N_MARK, +}; +/* - SCIF1 ------------------------------------------------------------------ */ +static const unsigned int scif1_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), +}; +static const unsigned int scif1_data_a_mux[] = { + RX1_A_MARK, TX1_A_MARK, +}; +static const unsigned int scif1_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int scif1_clk_mux[] = { + SCK1_MARK, +}; +static const unsigned int scif1_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7), +}; +static const unsigned int scif1_ctrl_mux[] = { + RTS1_N_TANS_MARK, CTS1_N_MARK, +}; + +static const unsigned int scif1_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25), +}; +static const unsigned int scif1_data_b_mux[] = { + RX1_B_MARK, TX1_B_MARK, +}; +/* - SCIF2 ------------------------------------------------------------------ */ +static const unsigned int scif2_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10), +}; +static const unsigned int scif2_data_a_mux[] = { + RX2_A_MARK, TX2_A_MARK, +}; +static const unsigned int scif2_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 9), +}; +static const unsigned int scif2_clk_mux[] = { + SCK2_MARK, +}; +static const unsigned int scif2_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), +}; +static const unsigned int scif2_data_b_mux[] = { + RX2_B_MARK, TX2_B_MARK, +}; +/* - SCIF3 ------------------------------------------------------------------ */ +static const unsigned int scif3_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24), +}; +static const unsigned int scif3_data_a_mux[] = { + RX3_A_MARK, TX3_A_MARK, +}; +static const unsigned int scif3_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 22), +}; +static const unsigned int scif3_clk_mux[] = { + SCK3_MARK, +}; +static const unsigned int scif3_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25), +}; +static const unsigned int scif3_ctrl_mux[] = { + RTS3_N_TANS_MARK, CTS3_N_MARK, +}; +static const unsigned int scif3_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11), +}; +static const unsigned int scif3_data_b_mux[] = { + RX3_B_MARK, TX3_B_MARK, +}; +/* - SCIF4 ------------------------------------------------------------------ */ +static const unsigned int scif4_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), +}; +static const unsigned int scif4_data_a_mux[] = { + RX4_A_MARK, TX4_A_MARK, +}; +static const unsigned int scif4_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 10), +}; +static const unsigned int scif4_clk_a_mux[] = { + SCK4_A_MARK, +}; +static const unsigned int scif4_ctrl_a_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13), +}; +static const unsigned int scif4_ctrl_a_mux[] = { + RTS4_N_TANS_A_MARK, CTS4_N_A_MARK, +}; +static const unsigned int scif4_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), +}; +static const unsigned int scif4_data_b_mux[] = { + RX4_B_MARK, TX4_B_MARK, +}; +static const unsigned int scif4_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 5), +}; +static const unsigned int scif4_clk_b_mux[] = { + SCK4_B_MARK, +}; +static const unsigned int scif4_ctrl_b_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9), +}; +static const unsigned int scif4_ctrl_b_mux[] = { + RTS4_N_TANS_B_MARK, CTS4_N_B_MARK, +}; +static const unsigned int scif4_data_c_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), +}; +static const unsigned int scif4_data_c_mux[] = { + RX4_C_MARK, TX4_C_MARK, +}; +static const unsigned int scif4_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 8), +}; +static const unsigned int scif4_clk_c_mux[] = { + SCK4_C_MARK, +}; +static const unsigned int scif4_ctrl_c_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), +}; +static const unsigned int scif4_ctrl_c_mux[] = { + RTS4_N_TANS_C_MARK, CTS4_N_C_MARK, +}; +/* - SCIF5 ------------------------------------------------------------------ */ +static const unsigned int scif5_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21), +}; +static const unsigned int scif5_data_a_mux[] = { + RX5_A_MARK, TX5_A_MARK, +}; +static const unsigned int scif5_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int scif5_clk_a_mux[] = { + SCK5_A_MARK, +}; +static const unsigned int scif5_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 18), +}; +static const unsigned int scif5_data_b_mux[] = { + RX5_B_MARK, TX5_B_MARK, +}; +static const unsigned int scif5_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int scif5_clk_b_mux[] = { + SCK5_B_MARK, +}; + +/* - SDHI0 ------------------------------------------------------------------ */ +static const unsigned int sdhi0_data1_pins[] = { + /* D0 */ + RCAR_GP_PIN(3, 2), +}; +static const unsigned int sdhi0_data1_mux[] = { + SD0_DAT0_MARK, +}; +static const unsigned int sdhi0_data4_pins[] = { + /* D[0:3] */ + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), + RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), +}; +static const unsigned int sdhi0_data4_mux[] = { + SD0_DAT0_MARK, SD0_DAT1_MARK, + SD0_DAT2_MARK, SD0_DAT3_MARK, +}; +static const unsigned int sdhi0_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), +}; +static const unsigned int sdhi0_ctrl_mux[] = { + SD0_CLK_MARK, SD0_CMD_MARK, +}; +static const unsigned int sdhi0_cd_pins[] = { + /* CD */ + RCAR_GP_PIN(3, 12), +}; +static const unsigned int sdhi0_cd_mux[] = { + SD0_CD_MARK, +}; +static const unsigned int sdhi0_wp_pins[] = { + /* WP */ + RCAR_GP_PIN(3, 13), +}; +static const unsigned int sdhi0_wp_mux[] = { + SD0_WP_MARK, +}; +/* - SDHI1 ------------------------------------------------------------------ */ +static const unsigned int sdhi1_data1_pins[] = { + /* D0 */ + RCAR_GP_PIN(3, 8), +}; +static const unsigned int sdhi1_data1_mux[] = { + SD1_DAT0_MARK, +}; +static const unsigned int sdhi1_data4_pins[] = { + /* D[0:3] */ + RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), +}; +static const unsigned int sdhi1_data4_mux[] = { + SD1_DAT0_MARK, SD1_DAT1_MARK, + SD1_DAT2_MARK, SD1_DAT3_MARK, +}; +static const unsigned int sdhi1_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), +}; +static const unsigned int sdhi1_ctrl_mux[] = { + SD1_CLK_MARK, SD1_CMD_MARK, +}; +static const unsigned int sdhi1_cd_pins[] = { + /* CD */ + RCAR_GP_PIN(3, 14), +}; +static const unsigned int sdhi1_cd_mux[] = { + SD1_CD_MARK, +}; +static const unsigned int sdhi1_wp_pins[] = { + /* WP */ + RCAR_GP_PIN(3, 15), +}; +static const unsigned int sdhi1_wp_mux[] = { + SD1_WP_MARK, +}; +/* - SDHI2 ------------------------------------------------------------------ */ +static const unsigned int sdhi2_data1_pins[] = { + /* D0 */ + RCAR_GP_PIN(4, 2), +}; +static const unsigned int sdhi2_data1_mux[] = { + SD2_DAT0_MARK, +}; +static const unsigned int sdhi2_data4_pins[] = { + /* D[0:3] */ + RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3), + RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), +}; +static const unsigned int sdhi2_data4_mux[] = { + SD2_DAT0_MARK, SD2_DAT1_MARK, + SD2_DAT2_MARK, SD2_DAT3_MARK, +}; +static const unsigned int sdhi2_data8_pins[] = { + /* D[0:7] */ + RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3), + RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), + RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), +}; +static const unsigned int sdhi2_data8_mux[] = { + SD2_DAT0_MARK, SD2_DAT1_MARK, + SD2_DAT2_MARK, SD2_DAT3_MARK, + SD2_DAT4_MARK, SD2_DAT5_MARK, + SD2_DAT6_MARK, SD2_DAT7_MARK, +}; +static const unsigned int sdhi2_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), +}; +static const unsigned int sdhi2_ctrl_mux[] = { + SD2_CLK_MARK, SD2_CMD_MARK, +}; +static const unsigned int sdhi2_cd_a_pins[] = { + /* CD */ + RCAR_GP_PIN(4, 13), +}; +static const unsigned int sdhi2_cd_a_mux[] = { + SD2_CD_A_MARK, +}; +static const unsigned int sdhi2_cd_b_pins[] = { + /* CD */ + RCAR_GP_PIN(5, 10), +}; +static const unsigned int sdhi2_cd_b_mux[] = { + SD2_CD_B_MARK, +}; +static const unsigned int sdhi2_wp_a_pins[] = { + /* WP */ + RCAR_GP_PIN(4, 14), +}; +static const unsigned int sdhi2_wp_a_mux[] = { + SD2_WP_A_MARK, +}; +static const unsigned int sdhi2_wp_b_pins[] = { + /* WP */ + RCAR_GP_PIN(5, 11), +}; +static const unsigned int sdhi2_wp_b_mux[] = { + SD2_WP_B_MARK, +}; +static const unsigned int sdhi2_ds_pins[] = { + /* DS */ + RCAR_GP_PIN(4, 6), +}; +static const unsigned int sdhi2_ds_mux[] = { + SD2_DS_MARK, +}; +/* - SDHI3 ------------------------------------------------------------------ */ +static const unsigned int sdhi3_data1_pins[] = { + /* D0 */ + RCAR_GP_PIN(4, 9), +}; +static const unsigned int sdhi3_data1_mux[] = { + SD3_DAT0_MARK, +}; +static const unsigned int sdhi3_data4_pins[] = { + /* D[0:3] */ + RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), + RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), +}; +static const unsigned int sdhi3_data4_mux[] = { + SD3_DAT0_MARK, SD3_DAT1_MARK, + SD3_DAT2_MARK, SD3_DAT3_MARK, +}; +static const unsigned int sdhi3_data8_pins[] = { + /* D[0:7] */ + RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), + RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), + RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14), + RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), +}; +static const unsigned int sdhi3_data8_mux[] = { + SD3_DAT0_MARK, SD3_DAT1_MARK, + SD3_DAT2_MARK, SD3_DAT3_MARK, + SD3_DAT4_MARK, SD3_DAT5_MARK, + SD3_DAT6_MARK, SD3_DAT7_MARK, +}; +static const unsigned int sdhi3_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8), +}; +static const unsigned int sdhi3_ctrl_mux[] = { + SD3_CLK_MARK, SD3_CMD_MARK, +}; +static const unsigned int sdhi3_cd_pins[] = { + /* CD */ + RCAR_GP_PIN(4, 15), +}; +static const unsigned int sdhi3_cd_mux[] = { + SD3_CD_MARK, +}; +static const unsigned int sdhi3_wp_pins[] = { + /* WP */ + RCAR_GP_PIN(4, 16), +}; +static const unsigned int sdhi3_wp_mux[] = { + SD3_WP_MARK, +}; +static const unsigned int sdhi3_ds_pins[] = { + /* DS */ + RCAR_GP_PIN(4, 17), +}; +static const unsigned int sdhi3_ds_mux[] = { + SD3_DS_MARK, +}; + +/* - SCIF Clock ------------------------------------------------------------- */ +static const unsigned int scif_clk_a_pins[] = { + /* SCIF_CLK */ + RCAR_GP_PIN(6, 23), +}; +static const unsigned int scif_clk_a_mux[] = { + SCIF_CLK_A_MARK, +}; +static const unsigned int scif_clk_b_pins[] = { + /* SCIF_CLK */ + RCAR_GP_PIN(5, 9), +}; +static const unsigned int scif_clk_b_mux[] = { + SCIF_CLK_B_MARK, +}; + +/* - USB0 ------------------------------------------------------------------- */ +static const unsigned int usb0_pins[] = { + /* PWEN, OVC */ + RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), +}; +static const unsigned int usb0_mux[] = { + USB0_PWEN_MARK, USB0_OVC_MARK, +}; +/* - USB1 ------------------------------------------------------------------- */ +static const unsigned int usb1_pins[] = { + /* PWEN, OVC */ + RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), +}; +static const unsigned int usb1_mux[] = { + USB1_PWEN_MARK, USB1_OVC_MARK, +}; +/* - USB2 ------------------------------------------------------------------- */ +static const unsigned int usb2_pins[] = { + /* PWEN, OVC */ + RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), +}; +static const unsigned int usb2_mux[] = { + USB2_PWEN_MARK, USB2_OVC_MARK, +}; +/* - USB2_CH3 --------------------------------------------------------------- */ +static const unsigned int usb2_ch3_pins[] = { + /* PWEN, OVC */ + RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31), +}; +static const unsigned int usb2_ch3_mux[] = { + USB2_CH3_PWEN_MARK, USB2_CH3_OVC_MARK, +}; + +static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(avb_link), + SH_PFC_PIN_GROUP(avb_magic), + SH_PFC_PIN_GROUP(avb_phy_int), + SH_PFC_PIN_GROUP(avb_mdc), + SH_PFC_PIN_GROUP(avb_mii), + SH_PFC_PIN_GROUP(avb_avtp_pps), + SH_PFC_PIN_GROUP(avb_avtp_match_a), + SH_PFC_PIN_GROUP(avb_avtp_capture_a), + SH_PFC_PIN_GROUP(avb_avtp_match_b), + SH_PFC_PIN_GROUP(avb_avtp_capture_b), + SH_PFC_PIN_GROUP(drif0_ctrl_a), + SH_PFC_PIN_GROUP(drif0_data0_a), + SH_PFC_PIN_GROUP(drif0_data1_a), + SH_PFC_PIN_GROUP(drif0_ctrl_b), + SH_PFC_PIN_GROUP(drif0_data0_b), + SH_PFC_PIN_GROUP(drif0_data1_b), + SH_PFC_PIN_GROUP(drif0_ctrl_c), + SH_PFC_PIN_GROUP(drif0_data0_c), + SH_PFC_PIN_GROUP(drif0_data1_c), + SH_PFC_PIN_GROUP(drif1_ctrl_a), + SH_PFC_PIN_GROUP(drif1_data0_a), + SH_PFC_PIN_GROUP(drif1_data1_a), + SH_PFC_PIN_GROUP(drif1_ctrl_b), + SH_PFC_PIN_GROUP(drif1_data0_b), + SH_PFC_PIN_GROUP(drif1_data1_b), + SH_PFC_PIN_GROUP(drif1_ctrl_c), + SH_PFC_PIN_GROUP(drif1_data0_c), + SH_PFC_PIN_GROUP(drif1_data1_c), + SH_PFC_PIN_GROUP(drif2_ctrl_a), + SH_PFC_PIN_GROUP(drif2_data0_a), + SH_PFC_PIN_GROUP(drif2_data1_a), + SH_PFC_PIN_GROUP(drif2_ctrl_b), + SH_PFC_PIN_GROUP(drif2_data0_b), + SH_PFC_PIN_GROUP(drif2_data1_b), + SH_PFC_PIN_GROUP(drif3_ctrl_a), + SH_PFC_PIN_GROUP(drif3_data0_a), + SH_PFC_PIN_GROUP(drif3_data1_a), + SH_PFC_PIN_GROUP(drif3_ctrl_b), + SH_PFC_PIN_GROUP(drif3_data0_b), + SH_PFC_PIN_GROUP(drif3_data1_b), + SH_PFC_PIN_GROUP(du_rgb666), + SH_PFC_PIN_GROUP(du_rgb888), + SH_PFC_PIN_GROUP(du_clk_out_0), + SH_PFC_PIN_GROUP(du_clk_out_1), + SH_PFC_PIN_GROUP(du_sync), + SH_PFC_PIN_GROUP(du_oddf), + SH_PFC_PIN_GROUP(du_cde), + SH_PFC_PIN_GROUP(du_disp), + SH_PFC_PIN_GROUP(msiof0_clk), + SH_PFC_PIN_GROUP(msiof0_sync), + SH_PFC_PIN_GROUP(msiof0_ss1), + SH_PFC_PIN_GROUP(msiof0_ss2), + SH_PFC_PIN_GROUP(msiof0_txd), + SH_PFC_PIN_GROUP(msiof0_rxd), + SH_PFC_PIN_GROUP(msiof1_clk_a), + SH_PFC_PIN_GROUP(msiof1_sync_a), + SH_PFC_PIN_GROUP(msiof1_ss1_a), + SH_PFC_PIN_GROUP(msiof1_ss2_a), + SH_PFC_PIN_GROUP(msiof1_txd_a), + SH_PFC_PIN_GROUP(msiof1_rxd_a), + SH_PFC_PIN_GROUP(msiof1_clk_b), + SH_PFC_PIN_GROUP(msiof1_sync_b), + SH_PFC_PIN_GROUP(msiof1_ss1_b), + SH_PFC_PIN_GROUP(msiof1_ss2_b), + SH_PFC_PIN_GROUP(msiof1_txd_b), + SH_PFC_PIN_GROUP(msiof1_rxd_b), + SH_PFC_PIN_GROUP(msiof1_clk_c), + SH_PFC_PIN_GROUP(msiof1_sync_c), + SH_PFC_PIN_GROUP(msiof1_ss1_c), + SH_PFC_PIN_GROUP(msiof1_ss2_c), + SH_PFC_PIN_GROUP(msiof1_txd_c), + SH_PFC_PIN_GROUP(msiof1_rxd_c), + SH_PFC_PIN_GROUP(msiof1_clk_d), + SH_PFC_PIN_GROUP(msiof1_sync_d), + SH_PFC_PIN_GROUP(msiof1_ss1_d), + SH_PFC_PIN_GROUP(msiof1_ss2_d), + SH_PFC_PIN_GROUP(msiof1_txd_d), + SH_PFC_PIN_GROUP(msiof1_rxd_d), + SH_PFC_PIN_GROUP(msiof1_clk_e), + SH_PFC_PIN_GROUP(msiof1_sync_e), + SH_PFC_PIN_GROUP(msiof1_ss1_e), + SH_PFC_PIN_GROUP(msiof1_ss2_e), + SH_PFC_PIN_GROUP(msiof1_txd_e), + SH_PFC_PIN_GROUP(msiof1_rxd_e), + SH_PFC_PIN_GROUP(msiof1_clk_f), + SH_PFC_PIN_GROUP(msiof1_sync_f), + SH_PFC_PIN_GROUP(msiof1_ss1_f), + SH_PFC_PIN_GROUP(msiof1_ss2_f), + SH_PFC_PIN_GROUP(msiof1_txd_f), + SH_PFC_PIN_GROUP(msiof1_rxd_f), + SH_PFC_PIN_GROUP(msiof1_clk_g), + SH_PFC_PIN_GROUP(msiof1_sync_g), + SH_PFC_PIN_GROUP(msiof1_ss1_g), + SH_PFC_PIN_GROUP(msiof1_ss2_g), + SH_PFC_PIN_GROUP(msiof1_txd_g), + SH_PFC_PIN_GROUP(msiof1_rxd_g), + SH_PFC_PIN_GROUP(msiof2_clk_a), + SH_PFC_PIN_GROUP(msiof2_sync_a), + SH_PFC_PIN_GROUP(msiof2_ss1_a), + SH_PFC_PIN_GROUP(msiof2_ss2_a), + SH_PFC_PIN_GROUP(msiof2_txd_a), + SH_PFC_PIN_GROUP(msiof2_rxd_a), + SH_PFC_PIN_GROUP(msiof2_clk_b), + SH_PFC_PIN_GROUP(msiof2_sync_b), + SH_PFC_PIN_GROUP(msiof2_ss1_b), + SH_PFC_PIN_GROUP(msiof2_ss2_b), + SH_PFC_PIN_GROUP(msiof2_txd_b), + SH_PFC_PIN_GROUP(msiof2_rxd_b), + SH_PFC_PIN_GROUP(msiof2_clk_c), + SH_PFC_PIN_GROUP(msiof2_sync_c), + SH_PFC_PIN_GROUP(msiof2_ss1_c), + SH_PFC_PIN_GROUP(msiof2_ss2_c), + SH_PFC_PIN_GROUP(msiof2_txd_c), + SH_PFC_PIN_GROUP(msiof2_rxd_c), + SH_PFC_PIN_GROUP(msiof2_clk_d), + SH_PFC_PIN_GROUP(msiof2_sync_d), + SH_PFC_PIN_GROUP(msiof2_ss1_d), + SH_PFC_PIN_GROUP(msiof2_ss2_d), + SH_PFC_PIN_GROUP(msiof2_txd_d), + SH_PFC_PIN_GROUP(msiof2_rxd_d), + SH_PFC_PIN_GROUP(msiof3_clk_a), + SH_PFC_PIN_GROUP(msiof3_sync_a), + SH_PFC_PIN_GROUP(msiof3_ss1_a), + SH_PFC_PIN_GROUP(msiof3_ss2_a), + SH_PFC_PIN_GROUP(msiof3_txd_a), + SH_PFC_PIN_GROUP(msiof3_rxd_a), + SH_PFC_PIN_GROUP(msiof3_clk_b), + SH_PFC_PIN_GROUP(msiof3_sync_b), + SH_PFC_PIN_GROUP(msiof3_ss1_b), + SH_PFC_PIN_GROUP(msiof3_ss2_b), + SH_PFC_PIN_GROUP(msiof3_txd_b), + SH_PFC_PIN_GROUP(msiof3_rxd_b), + SH_PFC_PIN_GROUP(msiof3_clk_c), + SH_PFC_PIN_GROUP(msiof3_sync_c), + SH_PFC_PIN_GROUP(msiof3_txd_c), + SH_PFC_PIN_GROUP(msiof3_rxd_c), + SH_PFC_PIN_GROUP(msiof3_clk_d), + SH_PFC_PIN_GROUP(msiof3_sync_d), + SH_PFC_PIN_GROUP(msiof3_ss1_d), + SH_PFC_PIN_GROUP(msiof3_txd_d), + SH_PFC_PIN_GROUP(msiof3_rxd_d), + SH_PFC_PIN_GROUP(msiof3_clk_e), + SH_PFC_PIN_GROUP(msiof3_sync_e), + SH_PFC_PIN_GROUP(msiof3_ss1_e), + SH_PFC_PIN_GROUP(msiof3_ss2_e), + SH_PFC_PIN_GROUP(msiof3_txd_e), + SH_PFC_PIN_GROUP(msiof3_rxd_e), + SH_PFC_PIN_GROUP(pwm0), + SH_PFC_PIN_GROUP(pwm1_a), + SH_PFC_PIN_GROUP(pwm1_b), + SH_PFC_PIN_GROUP(pwm2_a), + SH_PFC_PIN_GROUP(pwm2_b), + SH_PFC_PIN_GROUP(pwm3_a), + SH_PFC_PIN_GROUP(pwm3_b), + SH_PFC_PIN_GROUP(pwm4_a), + SH_PFC_PIN_GROUP(pwm4_b), + SH_PFC_PIN_GROUP(pwm5_a), + SH_PFC_PIN_GROUP(pwm5_b), + SH_PFC_PIN_GROUP(pwm6_a), + SH_PFC_PIN_GROUP(pwm6_b), + SH_PFC_PIN_GROUP(scif0_data), + SH_PFC_PIN_GROUP(scif0_clk), + SH_PFC_PIN_GROUP(scif0_ctrl), + SH_PFC_PIN_GROUP(scif1_data_a), + SH_PFC_PIN_GROUP(scif1_clk), + SH_PFC_PIN_GROUP(scif1_ctrl), + SH_PFC_PIN_GROUP(scif1_data_b), + SH_PFC_PIN_GROUP(scif2_data_a), + SH_PFC_PIN_GROUP(scif2_clk), + SH_PFC_PIN_GROUP(scif2_data_b), + SH_PFC_PIN_GROUP(scif3_data_a), + SH_PFC_PIN_GROUP(scif3_clk), + SH_PFC_PIN_GROUP(scif3_ctrl), + SH_PFC_PIN_GROUP(scif3_data_b), + SH_PFC_PIN_GROUP(scif4_data_a), + SH_PFC_PIN_GROUP(scif4_clk_a), + SH_PFC_PIN_GROUP(scif4_ctrl_a), + SH_PFC_PIN_GROUP(scif4_data_b), + SH_PFC_PIN_GROUP(scif4_clk_b), + SH_PFC_PIN_GROUP(scif4_ctrl_b), + SH_PFC_PIN_GROUP(scif4_data_c), + SH_PFC_PIN_GROUP(scif4_clk_c), + SH_PFC_PIN_GROUP(scif4_ctrl_c), + SH_PFC_PIN_GROUP(scif5_data_a), + SH_PFC_PIN_GROUP(scif5_clk_a), + SH_PFC_PIN_GROUP(scif5_data_b), + SH_PFC_PIN_GROUP(scif5_clk_b), + SH_PFC_PIN_GROUP(scif_clk_a), + SH_PFC_PIN_GROUP(scif_clk_b), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi1_cd), + SH_PFC_PIN_GROUP(sdhi1_wp), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_data8), + SH_PFC_PIN_GROUP(sdhi2_ctrl), + SH_PFC_PIN_GROUP(sdhi2_cd_a), + SH_PFC_PIN_GROUP(sdhi2_wp_a), + SH_PFC_PIN_GROUP(sdhi2_cd_b), + SH_PFC_PIN_GROUP(sdhi2_wp_b), + SH_PFC_PIN_GROUP(sdhi2_ds), + SH_PFC_PIN_GROUP(sdhi3_data1), + SH_PFC_PIN_GROUP(sdhi3_data4), + SH_PFC_PIN_GROUP(sdhi3_data8), + SH_PFC_PIN_GROUP(sdhi3_ctrl), + SH_PFC_PIN_GROUP(sdhi3_cd), + SH_PFC_PIN_GROUP(sdhi3_wp), + SH_PFC_PIN_GROUP(sdhi3_ds), + SH_PFC_PIN_GROUP(usb0), + SH_PFC_PIN_GROUP(usb1), + SH_PFC_PIN_GROUP(usb2), + SH_PFC_PIN_GROUP(usb2_ch3), +}; + +static const char * const avb_groups[] = { + "avb_link", + "avb_magic", + "avb_phy_int", + "avb_mdc", + "avb_mii", + "avb_avtp_pps", + "avb_avtp_match_a", + "avb_avtp_capture_a", + "avb_avtp_match_b", + "avb_avtp_capture_b", +}; + +static const char * const drif0_groups[] = { + "drif0_ctrl_a", + "drif0_data0_a", + "drif0_data1_a", + "drif0_ctrl_b", + "drif0_data0_b", + "drif0_data1_b", + "drif0_ctrl_c", + "drif0_data0_c", + "drif0_data1_c", +}; + +static const char * const drif1_groups[] = { + "drif1_ctrl_a", + "drif1_data0_a", + "drif1_data1_a", + "drif1_ctrl_b", + "drif1_data0_b", + "drif1_data1_b", + "drif1_ctrl_c", + "drif1_data0_c", + "drif1_data1_c", +}; + +static const char * const drif2_groups[] = { + "drif2_ctrl_a", + "drif2_data0_a", + "drif2_data1_a", + "drif2_ctrl_b", + "drif2_data0_b", + "drif2_data1_b", +}; + +static const char * const drif3_groups[] = { + "drif3_ctrl_a", + "drif3_data0_a", + "drif3_data1_a", + "drif3_ctrl_b", + "drif3_data0_b", + "drif3_data1_b", +}; + +static const char * const du_groups[] = { + "du_rgb666", + "du_rgb888", + "du_clk_out_0", + "du_clk_out_1", + "du_sync", + "du_oddf", + "du_cde", + "du_disp", +}; + +static const char * const msiof0_groups[] = { + "msiof0_clk", + "msiof0_sync", + "msiof0_ss1", + "msiof0_ss2", + "msiof0_txd", + "msiof0_rxd", +}; + +static const char * const msiof1_groups[] = { + "msiof1_clk_a", + "msiof1_sync_a", + "msiof1_ss1_a", + "msiof1_ss2_a", + "msiof1_txd_a", + "msiof1_rxd_a", + "msiof1_clk_b", + "msiof1_sync_b", + "msiof1_ss1_b", + "msiof1_ss2_b", + "msiof1_txd_b", + "msiof1_rxd_b", + "msiof1_clk_c", + "msiof1_sync_c", + "msiof1_ss1_c", + "msiof1_ss2_c", + "msiof1_txd_c", + "msiof1_rxd_c", + "msiof1_clk_d", + "msiof1_sync_d", + "msiof1_ss1_d", + "msiof1_ss2_d", + "msiof1_txd_d", + "msiof1_rxd_d", + "msiof1_clk_e", + "msiof1_sync_e", + "msiof1_ss1_e", + "msiof1_ss2_e", + "msiof1_txd_e", + "msiof1_rxd_e", + "msiof1_clk_f", + "msiof1_sync_f", + "msiof1_ss1_f", + "msiof1_ss2_f", + "msiof1_txd_f", + "msiof1_rxd_f", + "msiof1_clk_g", + "msiof1_sync_g", + "msiof1_ss1_g", + "msiof1_ss2_g", + "msiof1_txd_g", + "msiof1_rxd_g", +}; + +static const char * const msiof2_groups[] = { + "msiof2_clk_a", + "msiof2_sync_a", + "msiof2_ss1_a", + "msiof2_ss2_a", + "msiof2_txd_a", + "msiof2_rxd_a", + "msiof2_clk_b", + "msiof2_sync_b", + "msiof2_ss1_b", + "msiof2_ss2_b", + "msiof2_txd_b", + "msiof2_rxd_b", + "msiof2_clk_c", + "msiof2_sync_c", + "msiof2_ss1_c", + "msiof2_ss2_c", + "msiof2_txd_c", + "msiof2_rxd_c", + "msiof2_clk_d", + "msiof2_sync_d", + "msiof2_ss1_d", + "msiof2_ss2_d", + "msiof2_txd_d", + "msiof2_rxd_d", +}; + +static const char * const msiof3_groups[] = { + "msiof3_clk_a", + "msiof3_sync_a", + "msiof3_ss1_a", + "msiof3_ss2_a", + "msiof3_txd_a", + "msiof3_rxd_a", + "msiof3_clk_b", + "msiof3_sync_b", + "msiof3_ss1_b", + "msiof3_ss2_b", + "msiof3_txd_b", + "msiof3_rxd_b", + "msiof3_clk_c", + "msiof3_sync_c", + "msiof3_txd_c", + "msiof3_rxd_c", + "msiof3_clk_d", + "msiof3_sync_d", + "msiof3_ss1_d", + "msiof3_txd_d", + "msiof3_rxd_d", + "msiof3_clk_e", + "msiof3_sync_e", + "msiof3_ss1_e", + "msiof3_ss2_e", + "msiof3_txd_e", + "msiof3_rxd_e", +}; + +static const char * const pwm0_groups[] = { + "pwm0", +}; + +static const char * const pwm1_groups[] = { + "pwm1_a", + "pwm1_b", +}; + +static const char * const pwm2_groups[] = { + "pwm2_a", + "pwm2_b", +}; + +static const char * const pwm3_groups[] = { + "pwm3_a", + "pwm3_b", +}; + +static const char * const pwm4_groups[] = { + "pwm4_a", + "pwm4_b", +}; + +static const char * const pwm5_groups[] = { + "pwm5_a", + "pwm5_b", +}; + +static const char * const pwm6_groups[] = { + "pwm6_a", + "pwm6_b", +}; + +static const char * const scif0_groups[] = { + "scif0_data", + "scif0_clk", + "scif0_ctrl", +}; + +static const char * const scif1_groups[] = { + "scif1_data_a", + "scif1_clk", + "scif1_ctrl", + "scif1_data_b", +}; + +static const char * const scif2_groups[] = { + "scif2_data_a", + "scif2_clk", + "scif2_data_b", +}; + +static const char * const scif3_groups[] = { + "scif3_data_a", + "scif3_clk", + "scif3_ctrl", + "scif3_data_b", +}; + +static const char * const scif4_groups[] = { + "scif4_data_a", + "scif4_clk_a", + "scif4_ctrl_a", + "scif4_data_b", + "scif4_clk_b", + "scif4_ctrl_b", + "scif4_data_c", + "scif4_clk_c", + "scif4_ctrl_c", +}; + +static const char * const scif5_groups[] = { + "scif5_data_a", + "scif5_clk_a", + "scif5_data_b", + "scif5_clk_b", +}; + +static const char * const scif_clk_groups[] = { + "scif_clk_a", + "scif_clk_b", +}; + +static const char * const sdhi0_groups[] = { + "sdhi0_data1", + "sdhi0_data4", + "sdhi0_ctrl", + "sdhi0_cd", + "sdhi0_wp", +}; + +static const char * const sdhi1_groups[] = { + "sdhi1_data1", + "sdhi1_data4", + "sdhi1_ctrl", + "sdhi1_cd", + "sdhi1_wp", +}; + +static const char * const sdhi2_groups[] = { + "sdhi2_data1", + "sdhi2_data4", + "sdhi2_data8", + "sdhi2_ctrl", + "sdhi2_cd_a", + "sdhi2_wp_a", + "sdhi2_cd_b", + "sdhi2_wp_b", + "sdhi2_ds", +}; + +static const char * const sdhi3_groups[] = { + "sdhi3_data1", + "sdhi3_data4", + "sdhi3_data8", + "sdhi3_ctrl", + "sdhi3_cd", + "sdhi3_wp", + "sdhi3_ds", +}; + +static const char * const usb0_groups[] = { + "usb0", +}; + +static const char * const usb1_groups[] = { + "usb1", +}; + +static const char * const usb2_groups[] = { + "usb2", +}; + +static const char * const usb2_ch3_groups[] = { + "usb2_ch3", +}; + +static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(avb), + SH_PFC_FUNCTION(drif0), + SH_PFC_FUNCTION(drif1), + SH_PFC_FUNCTION(drif2), + SH_PFC_FUNCTION(drif3), + SH_PFC_FUNCTION(du), + SH_PFC_FUNCTION(msiof0), + SH_PFC_FUNCTION(msiof1), + SH_PFC_FUNCTION(msiof2), + SH_PFC_FUNCTION(msiof3), + SH_PFC_FUNCTION(pwm0), + SH_PFC_FUNCTION(pwm1), + SH_PFC_FUNCTION(pwm2), + SH_PFC_FUNCTION(pwm3), + SH_PFC_FUNCTION(pwm4), + SH_PFC_FUNCTION(pwm5), + SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(scif0), + SH_PFC_FUNCTION(scif1), + SH_PFC_FUNCTION(scif2), + SH_PFC_FUNCTION(scif3), + SH_PFC_FUNCTION(scif4), + SH_PFC_FUNCTION(scif5), + SH_PFC_FUNCTION(scif_clk), + SH_PFC_FUNCTION(sdhi0), + SH_PFC_FUNCTION(sdhi1), + SH_PFC_FUNCTION(sdhi2), + SH_PFC_FUNCTION(sdhi3), + SH_PFC_FUNCTION(usb0), + SH_PFC_FUNCTION(usb1), + SH_PFC_FUNCTION(usb2), + SH_PFC_FUNCTION(usb2_ch3), +}; + +static const struct pinmux_cfg_reg pinmux_config_regs[] = { +#define F_(x, y) FN_##y +#define FM(x) FN_##x + { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_0_15_FN, GPSR0_15, + GP_0_14_FN, GPSR0_14, + GP_0_13_FN, GPSR0_13, + GP_0_12_FN, GPSR0_12, + GP_0_11_FN, GPSR0_11, + GP_0_10_FN, GPSR0_10, + GP_0_9_FN, GPSR0_9, + GP_0_8_FN, GPSR0_8, + GP_0_7_FN, GPSR0_7, + GP_0_6_FN, GPSR0_6, + GP_0_5_FN, GPSR0_5, + GP_0_4_FN, GPSR0_4, + GP_0_3_FN, GPSR0_3, + GP_0_2_FN, GPSR0_2, + GP_0_1_FN, GPSR0_1, + GP_0_0_FN, GPSR0_0, } + }, + { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_1_27_FN, GPSR1_27, + GP_1_26_FN, GPSR1_26, + GP_1_25_FN, GPSR1_25, + GP_1_24_FN, GPSR1_24, + GP_1_23_FN, GPSR1_23, + GP_1_22_FN, GPSR1_22, + GP_1_21_FN, GPSR1_21, + GP_1_20_FN, GPSR1_20, + GP_1_19_FN, GPSR1_19, + GP_1_18_FN, GPSR1_18, + GP_1_17_FN, GPSR1_17, + GP_1_16_FN, GPSR1_16, + GP_1_15_FN, GPSR1_15, + GP_1_14_FN, GPSR1_14, + GP_1_13_FN, GPSR1_13, + GP_1_12_FN, GPSR1_12, + GP_1_11_FN, GPSR1_11, + GP_1_10_FN, GPSR1_10, + GP_1_9_FN, GPSR1_9, + GP_1_8_FN, GPSR1_8, + GP_1_7_FN, GPSR1_7, + GP_1_6_FN, GPSR1_6, + GP_1_5_FN, GPSR1_5, + GP_1_4_FN, GPSR1_4, + GP_1_3_FN, GPSR1_3, + GP_1_2_FN, GPSR1_2, + GP_1_1_FN, GPSR1_1, + GP_1_0_FN, GPSR1_0, } + }, + { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_2_14_FN, GPSR2_14, + GP_2_13_FN, GPSR2_13, + GP_2_12_FN, GPSR2_12, + GP_2_11_FN, GPSR2_11, + GP_2_10_FN, GPSR2_10, + GP_2_9_FN, GPSR2_9, + GP_2_8_FN, GPSR2_8, + GP_2_7_FN, GPSR2_7, + GP_2_6_FN, GPSR2_6, + GP_2_5_FN, GPSR2_5, + GP_2_4_FN, GPSR2_4, + GP_2_3_FN, GPSR2_3, + GP_2_2_FN, GPSR2_2, + GP_2_1_FN, GPSR2_1, + GP_2_0_FN, GPSR2_0, } + }, + { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_3_15_FN, GPSR3_15, + GP_3_14_FN, GPSR3_14, + GP_3_13_FN, GPSR3_13, + GP_3_12_FN, GPSR3_12, + GP_3_11_FN, GPSR3_11, + GP_3_10_FN, GPSR3_10, + GP_3_9_FN, GPSR3_9, + GP_3_8_FN, GPSR3_8, + GP_3_7_FN, GPSR3_7, + GP_3_6_FN, GPSR3_6, + GP_3_5_FN, GPSR3_5, + GP_3_4_FN, GPSR3_4, + GP_3_3_FN, GPSR3_3, + GP_3_2_FN, GPSR3_2, + GP_3_1_FN, GPSR3_1, + GP_3_0_FN, GPSR3_0, } + }, + { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_4_17_FN, GPSR4_17, + GP_4_16_FN, GPSR4_16, + GP_4_15_FN, GPSR4_15, + GP_4_14_FN, GPSR4_14, + GP_4_13_FN, GPSR4_13, + GP_4_12_FN, GPSR4_12, + GP_4_11_FN, GPSR4_11, + GP_4_10_FN, GPSR4_10, + GP_4_9_FN, GPSR4_9, + GP_4_8_FN, GPSR4_8, + GP_4_7_FN, GPSR4_7, + GP_4_6_FN, GPSR4_6, + GP_4_5_FN, GPSR4_5, + GP_4_4_FN, GPSR4_4, + GP_4_3_FN, GPSR4_3, + GP_4_2_FN, GPSR4_2, + GP_4_1_FN, GPSR4_1, + GP_4_0_FN, GPSR4_0, } + }, + { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_5_25_FN, GPSR5_25, + GP_5_24_FN, GPSR5_24, + GP_5_23_FN, GPSR5_23, + GP_5_22_FN, GPSR5_22, + GP_5_21_FN, GPSR5_21, + GP_5_20_FN, GPSR5_20, + GP_5_19_FN, GPSR5_19, + GP_5_18_FN, GPSR5_18, + GP_5_17_FN, GPSR5_17, + GP_5_16_FN, GPSR5_16, + GP_5_15_FN, GPSR5_15, + GP_5_14_FN, GPSR5_14, + GP_5_13_FN, GPSR5_13, + GP_5_12_FN, GPSR5_12, + GP_5_11_FN, GPSR5_11, + GP_5_10_FN, GPSR5_10, + GP_5_9_FN, GPSR5_9, + GP_5_8_FN, GPSR5_8, + GP_5_7_FN, GPSR5_7, + GP_5_6_FN, GPSR5_6, + GP_5_5_FN, GPSR5_5, + GP_5_4_FN, GPSR5_4, + GP_5_3_FN, GPSR5_3, + GP_5_2_FN, GPSR5_2, + GP_5_1_FN, GPSR5_1, + GP_5_0_FN, GPSR5_0, } + }, + { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) { + GP_6_31_FN, GPSR6_31, + GP_6_30_FN, GPSR6_30, + GP_6_29_FN, GPSR6_29, + GP_6_28_FN, GPSR6_28, + GP_6_27_FN, GPSR6_27, + GP_6_26_FN, GPSR6_26, + GP_6_25_FN, GPSR6_25, + GP_6_24_FN, GPSR6_24, + GP_6_23_FN, GPSR6_23, + GP_6_22_FN, GPSR6_22, + GP_6_21_FN, GPSR6_21, + GP_6_20_FN, GPSR6_20, + GP_6_19_FN, GPSR6_19, + GP_6_18_FN, GPSR6_18, + GP_6_17_FN, GPSR6_17, + GP_6_16_FN, GPSR6_16, + GP_6_15_FN, GPSR6_15, + GP_6_14_FN, GPSR6_14, + GP_6_13_FN, GPSR6_13, + GP_6_12_FN, GPSR6_12, + GP_6_11_FN, GPSR6_11, + GP_6_10_FN, GPSR6_10, + GP_6_9_FN, GPSR6_9, + GP_6_8_FN, GPSR6_8, + GP_6_7_FN, GPSR6_7, + GP_6_6_FN, GPSR6_6, + GP_6_5_FN, GPSR6_5, + GP_6_4_FN, GPSR6_4, + GP_6_3_FN, GPSR6_3, + GP_6_2_FN, GPSR6_2, + GP_6_1_FN, GPSR6_1, + GP_6_0_FN, GPSR6_0, } + }, + { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_7_3_FN, GPSR7_3, + GP_7_2_FN, GPSR7_2, + GP_7_1_FN, GPSR7_1, + GP_7_0_FN, GPSR7_0, } + }, +#undef F_ +#undef FM + +#define F_(x, y) x, +#define FM(x) FN_##x, + { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) { + IP0_31_28 + IP0_27_24 + IP0_23_20 + IP0_19_16 + IP0_15_12 + IP0_11_8 + IP0_7_4 + IP0_3_0 } + }, + { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) { + IP1_31_28 + IP1_27_24 + IP1_23_20 + IP1_19_16 + IP1_15_12 + IP1_11_8 + IP1_7_4 + IP1_3_0 } + }, + { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) { + IP2_31_28 + IP2_27_24 + IP2_23_20 + IP2_19_16 + IP2_15_12 + IP2_11_8 + IP2_7_4 + IP2_3_0 } + }, + { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4) { + IP3_31_28 + IP3_27_24 + IP3_23_20 + IP3_19_16 + IP3_15_12 + IP3_11_8 + IP3_7_4 + IP3_3_0 } + }, + { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4) { + IP4_31_28 + IP4_27_24 + IP4_23_20 + IP4_19_16 + IP4_15_12 + IP4_11_8 + IP4_7_4 + IP4_3_0 } + }, + { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4) { + IP5_31_28 + IP5_27_24 + IP5_23_20 + IP5_19_16 + IP5_15_12 + IP5_11_8 + IP5_7_4 + IP5_3_0 } + }, + { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4) { + IP6_31_28 + IP6_27_24 + IP6_23_20 + IP6_19_16 + IP6_15_12 + IP6_11_8 + IP6_7_4 + IP6_3_0 } + }, + { PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4) { + IP7_31_28 + IP7_27_24 + IP7_23_20 + IP7_19_16 + /* IP7_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + IP7_11_8 + IP7_7_4 + IP7_3_0 } + }, + { PINMUX_CFG_REG("IPSR8", 0xe6060220, 32, 4) { + IP8_31_28 + IP8_27_24 + IP8_23_20 + IP8_19_16 + IP8_15_12 + IP8_11_8 + IP8_7_4 + IP8_3_0 } + }, + { PINMUX_CFG_REG("IPSR9", 0xe6060224, 32, 4) { + IP9_31_28 + IP9_27_24 + IP9_23_20 + IP9_19_16 + IP9_15_12 + IP9_11_8 + IP9_7_4 + IP9_3_0 } + }, + { PINMUX_CFG_REG("IPSR10", 0xe6060228, 32, 4) { + IP10_31_28 + IP10_27_24 + IP10_23_20 + IP10_19_16 + IP10_15_12 + IP10_11_8 + IP10_7_4 + IP10_3_0 } + }, + { PINMUX_CFG_REG("IPSR11", 0xe606022c, 32, 4) { + IP11_31_28 + IP11_27_24 + IP11_23_20 + IP11_19_16 + IP11_15_12 + IP11_11_8 + IP11_7_4 + IP11_3_0 } + }, + { PINMUX_CFG_REG("IPSR12", 0xe6060230, 32, 4) { + IP12_31_28 + IP12_27_24 + IP12_23_20 + IP12_19_16 + IP12_15_12 + IP12_11_8 + IP12_7_4 + IP12_3_0 } + }, + { PINMUX_CFG_REG("IPSR13", 0xe6060234, 32, 4) { + IP13_31_28 + IP13_27_24 + IP13_23_20 + IP13_19_16 + IP13_15_12 + IP13_11_8 + IP13_7_4 + IP13_3_0 } + }, + { PINMUX_CFG_REG("IPSR14", 0xe6060238, 32, 4) { + IP14_31_28 + IP14_27_24 + IP14_23_20 + IP14_19_16 + IP14_15_12 + IP14_11_8 + IP14_7_4 + IP14_3_0 } + }, + { PINMUX_CFG_REG("IPSR15", 0xe606023c, 32, 4) { + IP15_31_28 + IP15_27_24 + IP15_23_20 + IP15_19_16 + IP15_15_12 + IP15_11_8 + IP15_7_4 + IP15_3_0 } + }, + { PINMUX_CFG_REG("IPSR16", 0xe6060240, 32, 4) { + IP16_31_28 + IP16_27_24 + IP16_23_20 + IP16_19_16 + IP16_15_12 + IP16_11_8 + IP16_7_4 + IP16_3_0 } + }, + { PINMUX_CFG_REG("IPSR17", 0xe6060244, 32, 4) { + IP17_31_28 + IP17_27_24 + IP17_23_20 + IP17_19_16 + IP17_15_12 + IP17_11_8 + IP17_7_4 + IP17_3_0 } + }, + { PINMUX_CFG_REG("IPSR18", 0xe6060248, 32, 4) { + /* IP18_31_28 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_27_24 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_23_20 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_19_16 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_11_8 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + IP18_7_4 + IP18_3_0 } + }, +#undef F_ +#undef FM + +#define F_(x, y) x, +#define FM(x) FN_##x, + { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32, + 3, 2, 3, 1, 1, 1, 1, 1, 2, 1, + 1, 2, 1, 1, 1, 2, 2, 1, 2, 3) { + MOD_SEL0_31_30_29 + MOD_SEL0_28_27 + MOD_SEL0_26_25_24 + MOD_SEL0_23 + MOD_SEL0_22 + MOD_SEL0_21 + MOD_SEL0_20 + MOD_SEL0_19 + MOD_SEL0_18_17 + MOD_SEL0_16 + 0, 0, /* RESERVED 15 */ + MOD_SEL0_14_13 + MOD_SEL0_12 + MOD_SEL0_11 + MOD_SEL0_10 + MOD_SEL0_9_8 + MOD_SEL0_7_6 + MOD_SEL0_5 + MOD_SEL0_4_3 + /* RESERVED 2, 1, 0 */ + 0, 0, 0, 0, 0, 0, 0, 0 } + }, + { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xe6060504, 32, + 2, 3, 1, 2, 3, 1, 1, 2, 1, + 2, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1) { + MOD_SEL1_31_30 + MOD_SEL1_29_28_27 + MOD_SEL1_26 + MOD_SEL1_25_24 + MOD_SEL1_23_22_21 + MOD_SEL1_20 + MOD_SEL1_19 + MOD_SEL1_18_17 + MOD_SEL1_16 + MOD_SEL1_15_14 + MOD_SEL1_13 + MOD_SEL1_12 + MOD_SEL1_11 + MOD_SEL1_10 + MOD_SEL1_9 + 0, 0, 0, 0, /* RESERVED 8, 7 */ + MOD_SEL1_6 + MOD_SEL1_5 + MOD_SEL1_4 + MOD_SEL1_3 + MOD_SEL1_2 + MOD_SEL1_1 + MOD_SEL1_0 } + }, + { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xe6060508, 32, + 1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, 1, + 4, 4, 4, 3, 1) { + MOD_SEL2_31 + MOD_SEL2_30 + MOD_SEL2_29 + MOD_SEL2_28_27 + MOD_SEL2_26 + MOD_SEL2_25_24_23 + /* RESERVED 22 */ + 0, 0, + MOD_SEL2_21 + MOD_SEL2_20 + MOD_SEL2_19 + MOD_SEL2_18 + MOD_SEL2_17 + /* RESERVED 16 */ + 0, 0, + /* RESERVED 15, 14, 13, 12 */ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + /* RESERVED 11, 10, 9, 8 */ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + /* RESERVED 7, 6, 5, 4 */ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + /* RESERVED 3, 2, 1 */ + 0, 0, 0, 0, 0, 0, 0, 0, + MOD_SEL2_0 } + }, + { }, +}; + +static const struct pinmux_drive_reg pinmux_drive_regs[] = { + { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) { + { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */ + { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */ + { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */ + { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */ + { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */ + { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */ + { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) { + { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */ + { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */ + { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */ + { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */ + { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */ + { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */ + { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */ + { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) { + { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */ + { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */ + { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */ + { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */ + { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */ + { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */ + { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */ + { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) { + { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */ + { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */ + { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */ + { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */ + { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */ + { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ + { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) { + { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */ + { RCAR_GP_PIN(2, 13), 24, 3 }, /* AVB_AVTP_MATCH */ + { RCAR_GP_PIN(2, 14), 20, 3 }, /* AVB_AVTP_CAPTURE */ + { RCAR_GP_PIN(2, 0), 16, 3 }, /* IRQ0 */ + { RCAR_GP_PIN(2, 1), 12, 3 }, /* IRQ1 */ + { RCAR_GP_PIN(2, 2), 8, 3 }, /* IRQ2 */ + { RCAR_GP_PIN(2, 3), 4, 3 }, /* IRQ3 */ + { RCAR_GP_PIN(2, 4), 0, 3 }, /* IRQ4 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL5", 0xe6060314) { + { RCAR_GP_PIN(2, 5), 28, 3 }, /* IRQ5 */ + { RCAR_GP_PIN(2, 6), 24, 3 }, /* PWM0 */ + { RCAR_GP_PIN(2, 7), 20, 3 }, /* PWM1 */ + { RCAR_GP_PIN(2, 8), 16, 3 }, /* PWM2 */ + { RCAR_GP_PIN(1, 0), 12, 3 }, /* A0 */ + { RCAR_GP_PIN(1, 1), 8, 3 }, /* A1 */ + { RCAR_GP_PIN(1, 2), 4, 3 }, /* A2 */ + { RCAR_GP_PIN(1, 3), 0, 3 }, /* A3 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL6", 0xe6060318) { + { RCAR_GP_PIN(1, 4), 28, 3 }, /* A4 */ + { RCAR_GP_PIN(1, 5), 24, 3 }, /* A5 */ + { RCAR_GP_PIN(1, 6), 20, 3 }, /* A6 */ + { RCAR_GP_PIN(1, 7), 16, 3 }, /* A7 */ + { RCAR_GP_PIN(1, 8), 12, 3 }, /* A8 */ + { RCAR_GP_PIN(1, 9), 8, 3 }, /* A9 */ + { RCAR_GP_PIN(1, 10), 4, 3 }, /* A10 */ + { RCAR_GP_PIN(1, 11), 0, 3 }, /* A11 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL7", 0xe606031c) { + { RCAR_GP_PIN(1, 12), 28, 3 }, /* A12 */ + { RCAR_GP_PIN(1, 13), 24, 3 }, /* A13 */ + { RCAR_GP_PIN(1, 14), 20, 3 }, /* A14 */ + { RCAR_GP_PIN(1, 15), 16, 3 }, /* A15 */ + { RCAR_GP_PIN(1, 16), 12, 3 }, /* A16 */ + { RCAR_GP_PIN(1, 17), 8, 3 }, /* A17 */ + { RCAR_GP_PIN(1, 18), 4, 3 }, /* A18 */ + { RCAR_GP_PIN(1, 19), 0, 3 }, /* A19 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) { + { PIN_NUMBER('F', 1), 28, 3 }, /* CLKOUT */ + { RCAR_GP_PIN(1, 20), 24, 3 }, /* CS0 */ + { RCAR_GP_PIN(1, 21), 20, 3 }, /* CS1_A26 */ + { RCAR_GP_PIN(1, 22), 16, 3 }, /* BS */ + { RCAR_GP_PIN(1, 23), 12, 3 }, /* RD */ + { RCAR_GP_PIN(1, 24), 8, 3 }, /* RD_WR */ + { RCAR_GP_PIN(1, 25), 4, 3 }, /* WE0 */ + { RCAR_GP_PIN(1, 26), 0, 3 }, /* WE1 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) { + { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */ + { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */ + { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */ + { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */ + { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */ + { RCAR_GP_PIN(0, 3), 8, 3 }, /* D3 */ + { RCAR_GP_PIN(0, 4), 4, 3 }, /* D4 */ + { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL10", 0xe6060328) { + { RCAR_GP_PIN(0, 6), 28, 3 }, /* D6 */ + { RCAR_GP_PIN(0, 7), 24, 3 }, /* D7 */ + { RCAR_GP_PIN(0, 8), 20, 3 }, /* D8 */ + { RCAR_GP_PIN(0, 9), 16, 3 }, /* D9 */ + { RCAR_GP_PIN(0, 10), 12, 3 }, /* D10 */ + { RCAR_GP_PIN(0, 11), 8, 3 }, /* D11 */ + { RCAR_GP_PIN(0, 12), 4, 3 }, /* D12 */ + { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) { + { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ + { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ + { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ + { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ + { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */ + { RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */ + { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */ + { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) { + { PIN_A_NUMBER('R', 7), 28, 2 }, /* DU_DOTCLKIN2 */ + { PIN_A_NUMBER('R', 8), 24, 2 }, /* DU_DOTCLKIN3 */ + { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST# */ + { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) { + { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */ + { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */ + { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ + { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) { + { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */ + { RCAR_GP_PIN(3, 7), 24, 3 }, /* SD1_CMD */ + { RCAR_GP_PIN(3, 8), 20, 3 }, /* SD1_DAT0 */ + { RCAR_GP_PIN(3, 9), 16, 3 }, /* SD1_DAT1 */ + { RCAR_GP_PIN(3, 10), 12, 3 }, /* SD1_DAT2 */ + { RCAR_GP_PIN(3, 11), 8, 3 }, /* SD1_DAT3 */ + { RCAR_GP_PIN(4, 0), 4, 3 }, /* SD2_CLK */ + { RCAR_GP_PIN(4, 1), 0, 3 }, /* SD2_CMD */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL15", 0xe606033c) { + { RCAR_GP_PIN(4, 2), 28, 3 }, /* SD2_DAT0 */ + { RCAR_GP_PIN(4, 3), 24, 3 }, /* SD2_DAT1 */ + { RCAR_GP_PIN(4, 4), 20, 3 }, /* SD2_DAT2 */ + { RCAR_GP_PIN(4, 5), 16, 3 }, /* SD2_DAT3 */ + { RCAR_GP_PIN(4, 6), 12, 3 }, /* SD2_DS */ + { RCAR_GP_PIN(4, 7), 8, 3 }, /* SD3_CLK */ + { RCAR_GP_PIN(4, 8), 4, 3 }, /* SD3_CMD */ + { RCAR_GP_PIN(4, 9), 0, 3 }, /* SD3_DAT0 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL16", 0xe6060340) { + { RCAR_GP_PIN(4, 10), 28, 3 }, /* SD3_DAT1 */ + { RCAR_GP_PIN(4, 11), 24, 3 }, /* SD3_DAT2 */ + { RCAR_GP_PIN(4, 12), 20, 3 }, /* SD3_DAT3 */ + { RCAR_GP_PIN(4, 13), 16, 3 }, /* SD3_DAT4 */ + { RCAR_GP_PIN(4, 14), 12, 3 }, /* SD3_DAT5 */ + { RCAR_GP_PIN(4, 15), 8, 3 }, /* SD3_DAT6 */ + { RCAR_GP_PIN(4, 16), 4, 3 }, /* SD3_DAT7 */ + { RCAR_GP_PIN(4, 17), 0, 3 }, /* SD3_DS */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL17", 0xe6060344) { + { RCAR_GP_PIN(3, 12), 28, 3 }, /* SD0_CD */ + { RCAR_GP_PIN(3, 13), 24, 3 }, /* SD0_WP */ + { RCAR_GP_PIN(3, 14), 20, 3 }, /* SD1_CD */ + { RCAR_GP_PIN(3, 15), 16, 3 }, /* SD1_WP */ + { RCAR_GP_PIN(5, 0), 12, 3 }, /* SCK0 */ + { RCAR_GP_PIN(5, 1), 8, 3 }, /* RX0 */ + { RCAR_GP_PIN(5, 2), 4, 3 }, /* TX0 */ + { RCAR_GP_PIN(5, 3), 0, 3 }, /* CTS0 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL18", 0xe6060348) { + { RCAR_GP_PIN(5, 4), 28, 3 }, /* RTS0_TANS */ + { RCAR_GP_PIN(5, 5), 24, 3 }, /* RX1 */ + { RCAR_GP_PIN(5, 6), 20, 3 }, /* TX1 */ + { RCAR_GP_PIN(5, 7), 16, 3 }, /* CTS1 */ + { RCAR_GP_PIN(5, 8), 12, 3 }, /* RTS1_TANS */ + { RCAR_GP_PIN(5, 9), 8, 3 }, /* SCK2 */ + { RCAR_GP_PIN(5, 10), 4, 3 }, /* TX2 */ + { RCAR_GP_PIN(5, 11), 0, 3 }, /* RX2 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL19", 0xe606034c) { + { RCAR_GP_PIN(5, 12), 28, 3 }, /* HSCK0 */ + { RCAR_GP_PIN(5, 13), 24, 3 }, /* HRX0 */ + { RCAR_GP_PIN(5, 14), 20, 3 }, /* HTX0 */ + { RCAR_GP_PIN(5, 15), 16, 3 }, /* HCTS0 */ + { RCAR_GP_PIN(5, 16), 12, 3 }, /* HRTS0 */ + { RCAR_GP_PIN(5, 17), 8, 3 }, /* MSIOF0_SCK */ + { RCAR_GP_PIN(5, 18), 4, 3 }, /* MSIOF0_SYNC */ + { RCAR_GP_PIN(5, 19), 0, 3 }, /* MSIOF0_SS1 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL20", 0xe6060350) { + { RCAR_GP_PIN(5, 20), 28, 3 }, /* MSIOF0_TXD */ + { RCAR_GP_PIN(5, 21), 24, 3 }, /* MSIOF0_SS2 */ + { RCAR_GP_PIN(5, 22), 20, 3 }, /* MSIOF0_RXD */ + { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */ + { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */ + { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */ + { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */ + { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) { + { RCAR_GP_PIN(6, 1), 28, 3 }, /* SSI_WS01239 */ + { RCAR_GP_PIN(6, 2), 24, 3 }, /* SSI_SDATA0 */ + { RCAR_GP_PIN(6, 3), 20, 3 }, /* SSI_SDATA1 */ + { RCAR_GP_PIN(6, 4), 16, 3 }, /* SSI_SDATA2 */ + { RCAR_GP_PIN(6, 5), 12, 3 }, /* SSI_SCK349 */ + { RCAR_GP_PIN(6, 6), 8, 3 }, /* SSI_WS349 */ + { RCAR_GP_PIN(6, 7), 4, 3 }, /* SSI_SDATA3 */ + { RCAR_GP_PIN(6, 8), 0, 3 }, /* SSI_SCK4 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL22", 0xe6060358) { + { RCAR_GP_PIN(6, 9), 28, 3 }, /* SSI_WS4 */ + { RCAR_GP_PIN(6, 10), 24, 3 }, /* SSI_SDATA4 */ + { RCAR_GP_PIN(6, 11), 20, 3 }, /* SSI_SCK5 */ + { RCAR_GP_PIN(6, 12), 16, 3 }, /* SSI_WS5 */ + { RCAR_GP_PIN(6, 13), 12, 3 }, /* SSI_SDATA5 */ + { RCAR_GP_PIN(6, 14), 8, 3 }, /* SSI_SCK6 */ + { RCAR_GP_PIN(6, 15), 4, 3 }, /* SSI_WS6 */ + { RCAR_GP_PIN(6, 16), 0, 3 }, /* SSI_SDATA6 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL23", 0xe606035c) { + { RCAR_GP_PIN(6, 17), 28, 3 }, /* SSI_SCK78 */ + { RCAR_GP_PIN(6, 18), 24, 3 }, /* SSI_WS78 */ + { RCAR_GP_PIN(6, 19), 20, 3 }, /* SSI_SDATA7 */ + { RCAR_GP_PIN(6, 20), 16, 3 }, /* SSI_SDATA8 */ + { RCAR_GP_PIN(6, 21), 12, 3 }, /* SSI_SDATA9 */ + { RCAR_GP_PIN(6, 22), 8, 3 }, /* AUDIO_CLKA */ + { RCAR_GP_PIN(6, 23), 4, 3 }, /* AUDIO_CLKB */ + { RCAR_GP_PIN(6, 24), 0, 3 }, /* USB0_PWEN */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL24", 0xe6060360) { + { RCAR_GP_PIN(6, 25), 28, 3 }, /* USB0_OVC */ + { RCAR_GP_PIN(6, 26), 24, 3 }, /* USB1_PWEN */ + { RCAR_GP_PIN(6, 27), 20, 3 }, /* USB1_OVC */ + { RCAR_GP_PIN(6, 28), 16, 3 }, /* USB30_PWEN */ + { RCAR_GP_PIN(6, 29), 12, 3 }, /* USB30_OVC */ + { RCAR_GP_PIN(6, 30), 8, 3 }, /* USB2_CH3_PWEN */ + { RCAR_GP_PIN(6, 31), 4, 3 }, /* USB2_CH3_OVC */ + } }, + { }, +}; + +static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) +{ + int bit = -EINVAL; + + *pocctrl = 0xe6060380; + + if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11)) + bit = pin & 0x1f; + + if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 17)) + bit = (pin & 0x1f) + 12; + + return bit; +} + +#define PUEN 0xe6060400 +#define PUD 0xe6060440 + +#define PU0 0x00 +#define PU1 0x04 +#define PU2 0x08 +#define PU3 0x0c +#define PU4 0x10 +#define PU5 0x14 +#define PU6 0x18 + +static const struct sh_pfc_bias_info bias_info[] = { + { RCAR_GP_PIN(2, 11), PU0, 31 }, /* AVB_PHY_INT */ + { RCAR_GP_PIN(2, 10), PU0, 30 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 9), PU0, 29 }, /* AVB_MDC */ + { PIN_NUMBER('A', 9), PU0, 28 }, /* AVB_MDIO */ + { PIN_NUMBER('A', 12), PU0, 27 }, /* AVB_TXCREFCLK */ + { PIN_NUMBER('B', 17), PU0, 26 }, /* AVB_TD3 */ + { PIN_NUMBER('A', 17), PU0, 25 }, /* AVB_TD2 */ + { PIN_NUMBER('B', 18), PU0, 24 }, /* AVB_TD1 */ + { PIN_NUMBER('A', 18), PU0, 23 }, /* AVB_TD0 */ + { PIN_NUMBER('A', 19), PU0, 22 }, /* AVB_TXC */ + { PIN_NUMBER('A', 8), PU0, 21 }, /* AVB_TX_CTL */ + { PIN_NUMBER('B', 14), PU0, 20 }, /* AVB_RD3 */ + { PIN_NUMBER('A', 14), PU0, 19 }, /* AVB_RD2 */ + { PIN_NUMBER('B', 13), PU0, 18 }, /* AVB_RD1 */ + { PIN_NUMBER('A', 13), PU0, 17 }, /* AVB_RD0 */ + { PIN_NUMBER('B', 19), PU0, 16 }, /* AVB_RXC */ + { PIN_NUMBER('A', 16), PU0, 15 }, /* AVB_RX_CTL */ + { PIN_NUMBER('V', 7), PU0, 14 }, /* RPC_RESET# */ + { PIN_NUMBER('V', 6), PU0, 13 }, /* RPC_WP# */ + { PIN_NUMBER('Y', 7), PU0, 12 }, /* RPC_INT# */ + { PIN_NUMBER('V', 5), PU0, 11 }, /* QSPI1_SSL */ + { PIN_A_NUMBER('C', 3), PU0, 10 }, /* QSPI1_IO3 */ + { PIN_A_NUMBER('E', 4), PU0, 9 }, /* QSPI1_IO2 */ + { PIN_A_NUMBER('E', 5), PU0, 8 }, /* QSPI1_MISO_IO1 */ + { PIN_A_NUMBER('C', 7), PU0, 7 }, /* QSPI1_MOSI_IO0 */ + { PIN_NUMBER('V', 3), PU0, 6 }, /* QSPI1_SPCLK */ + { PIN_NUMBER('Y', 3), PU0, 5 }, /* QSPI0_SSL */ + { PIN_A_NUMBER('B', 6), PU0, 4 }, /* QSPI0_IO3 */ + { PIN_NUMBER('Y', 6), PU0, 3 }, /* QSPI0_IO2 */ + { PIN_A_NUMBER('B', 4), PU0, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_A_NUMBER('C', 5), PU0, 1 }, /* QSPI0_MOSI_IO0 */ + { PIN_NUMBER('W', 3), PU0, 0 }, /* QSPI0_SPCLK */ + + { RCAR_GP_PIN(1, 19), PU1, 31 }, /* A19 */ + { RCAR_GP_PIN(1, 18), PU1, 30 }, /* A18 */ + { RCAR_GP_PIN(1, 17), PU1, 29 }, /* A17 */ + { RCAR_GP_PIN(1, 16), PU1, 28 }, /* A16 */ + { RCAR_GP_PIN(1, 15), PU1, 27 }, /* A15 */ + { RCAR_GP_PIN(1, 14), PU1, 26 }, /* A14 */ + { RCAR_GP_PIN(1, 13), PU1, 25 }, /* A13 */ + { RCAR_GP_PIN(1, 12), PU1, 24 }, /* A12 */ + { RCAR_GP_PIN(1, 11), PU1, 23 }, /* A11 */ + { RCAR_GP_PIN(1, 10), PU1, 22 }, /* A10 */ + { RCAR_GP_PIN(1, 9), PU1, 21 }, /* A9 */ + { RCAR_GP_PIN(1, 8), PU1, 20 }, /* A8 */ + { RCAR_GP_PIN(1, 7), PU1, 19 }, /* A7 */ + { RCAR_GP_PIN(1, 6), PU1, 18 }, /* A6 */ + { RCAR_GP_PIN(1, 5), PU1, 17 }, /* A5 */ + { RCAR_GP_PIN(1, 4), PU1, 16 }, /* A4 */ + { RCAR_GP_PIN(1, 3), PU1, 15 }, /* A3 */ + { RCAR_GP_PIN(1, 2), PU1, 14 }, /* A2 */ + { RCAR_GP_PIN(1, 1), PU1, 13 }, /* A1 */ + { RCAR_GP_PIN(1, 0), PU1, 12 }, /* A0 */ + { RCAR_GP_PIN(2, 8), PU1, 11 }, /* PWM2_A */ + { RCAR_GP_PIN(2, 7), PU1, 10 }, /* PWM1_A */ + { RCAR_GP_PIN(2, 6), PU1, 9 }, /* PWM0 */ + { RCAR_GP_PIN(2, 5), PU1, 8 }, /* IRQ5 */ + { RCAR_GP_PIN(2, 4), PU1, 7 }, /* IRQ4 */ + { RCAR_GP_PIN(2, 3), PU1, 6 }, /* IRQ3 */ + { RCAR_GP_PIN(2, 2), PU1, 5 }, /* IRQ2 */ + { RCAR_GP_PIN(2, 1), PU1, 4 }, /* IRQ1 */ + { RCAR_GP_PIN(2, 0), PU1, 3 }, /* IRQ0 */ + { RCAR_GP_PIN(2, 14), PU1, 2 }, /* AVB_AVTP_CAPTURE_A */ + { RCAR_GP_PIN(2, 13), PU1, 1 }, /* AVB_AVTP_MATCH_A */ + { RCAR_GP_PIN(2, 12), PU1, 0 }, /* AVB_LINK */ + + { PIN_A_NUMBER('P', 8), PU2, 31 }, /* DU_DOTCLKIN1 */ + { PIN_A_NUMBER('P', 7), PU2, 30 }, /* DU_DOTCLKIN0 */ + { RCAR_GP_PIN(7, 3), PU2, 29 }, /* HDMI1_CEC */ + { RCAR_GP_PIN(7, 2), PU2, 28 }, /* HDMI0_CEC */ + { RCAR_GP_PIN(7, 1), PU2, 27 }, /* AVS2 */ + { RCAR_GP_PIN(7, 0), PU2, 26 }, /* AVS1 */ + { RCAR_GP_PIN(0, 15), PU2, 25 }, /* D15 */ + { RCAR_GP_PIN(0, 14), PU2, 24 }, /* D14 */ + { RCAR_GP_PIN(0, 13), PU2, 23 }, /* D13 */ + { RCAR_GP_PIN(0, 12), PU2, 22 }, /* D12 */ + { RCAR_GP_PIN(0, 11), PU2, 21 }, /* D11 */ + { RCAR_GP_PIN(0, 10), PU2, 20 }, /* D10 */ + { RCAR_GP_PIN(0, 9), PU2, 19 }, /* D9 */ + { RCAR_GP_PIN(0, 8), PU2, 18 }, /* D8 */ + { RCAR_GP_PIN(0, 7), PU2, 17 }, /* D7 */ + { RCAR_GP_PIN(0, 6), PU2, 16 }, /* D6 */ + { RCAR_GP_PIN(0, 5), PU2, 15 }, /* D5 */ + { RCAR_GP_PIN(0, 4), PU2, 14 }, /* D4 */ + { RCAR_GP_PIN(0, 3), PU2, 13 }, /* D3 */ + { RCAR_GP_PIN(0, 2), PU2, 12 }, /* D2 */ + { RCAR_GP_PIN(0, 1), PU2, 11 }, /* D1 */ + { RCAR_GP_PIN(0, 0), PU2, 10 }, /* D0 */ + { PIN_NUMBER('C', 1), PU2, 9 }, /* PRESETOUT# */ + { RCAR_GP_PIN(1, 27), PU2, 8 }, /* EX_WAIT0_A */ + { RCAR_GP_PIN(1, 26), PU2, 7 }, /* WE1_N */ + { RCAR_GP_PIN(1, 25), PU2, 6 }, /* WE0_N */ + { RCAR_GP_PIN(1, 24), PU2, 5 }, /* RD_WR_N */ + { RCAR_GP_PIN(1, 23), PU2, 4 }, /* RD_N */ + { RCAR_GP_PIN(1, 22), PU2, 3 }, /* BS_N */ + { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N */ + { RCAR_GP_PIN(1, 20), PU2, 1 }, /* CS0_N */ + { PIN_NUMBER('F', 1), PU2, 0 }, /* CLKOUT */ + + { RCAR_GP_PIN(4, 9), PU3, 31 }, /* SD3_DAT0 */ + { RCAR_GP_PIN(4, 8), PU3, 30 }, /* SD3_CMD */ + { RCAR_GP_PIN(4, 7), PU3, 29 }, /* SD3_CLK */ + { RCAR_GP_PIN(4, 6), PU3, 28 }, /* SD2_DS */ + { RCAR_GP_PIN(4, 5), PU3, 27 }, /* SD2_DAT3 */ + { RCAR_GP_PIN(4, 4), PU3, 26 }, /* SD2_DAT2 */ + { RCAR_GP_PIN(4, 3), PU3, 25 }, /* SD2_DAT1 */ + { RCAR_GP_PIN(4, 2), PU3, 24 }, /* SD2_DAT0 */ + { RCAR_GP_PIN(4, 1), PU3, 23 }, /* SD2_CMD */ + { RCAR_GP_PIN(4, 0), PU3, 22 }, /* SD2_CLK */ + { RCAR_GP_PIN(3, 11), PU3, 21 }, /* SD1_DAT3 */ + { RCAR_GP_PIN(3, 10), PU3, 20 }, /* SD1_DAT2 */ + { RCAR_GP_PIN(3, 9), PU3, 19 }, /* SD1_DAT1 */ + { RCAR_GP_PIN(3, 8), PU3, 18 }, /* SD1_DAT0 */ + { RCAR_GP_PIN(3, 7), PU3, 17 }, /* SD1_CMD */ + { RCAR_GP_PIN(3, 6), PU3, 16 }, /* SD1_CLK */ + { RCAR_GP_PIN(3, 5), PU3, 15 }, /* SD0_DAT3 */ + { RCAR_GP_PIN(3, 4), PU3, 14 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 3), PU3, 13 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 2), PU3, 12 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 1), PU3, 11 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 0), PU3, 10 }, /* SD0_CLK */ + { PIN_A_NUMBER('T', 30), PU3, 9 }, /* ASEBRK */ + /* bit 8 n/a */ + { PIN_A_NUMBER('R', 29), PU3, 7 }, /* TDI */ + { PIN_A_NUMBER('R', 30), PU3, 6 }, /* TMS */ + { PIN_A_NUMBER('T', 27), PU3, 5 }, /* TCK */ + { PIN_A_NUMBER('R', 26), PU3, 4 }, /* TRST# */ + { PIN_A_NUMBER('D', 39), PU3, 3 }, /* EXTALR*/ + { PIN_A_NUMBER('D', 38), PU3, 2 }, /* FSCLKST# */ + { PIN_A_NUMBER('R', 8), PU3, 1 }, /* DU_DOTCLKIN3 */ + { PIN_A_NUMBER('R', 7), PU3, 0 }, /* DU_DOTCLKIN2 */ + + { RCAR_GP_PIN(5, 19), PU4, 31 }, /* MSIOF0_SS1 */ + { RCAR_GP_PIN(5, 18), PU4, 30 }, /* MSIOF0_SYNC */ + { RCAR_GP_PIN(5, 17), PU4, 29 }, /* MSIOF0_SCK */ + { RCAR_GP_PIN(5, 16), PU4, 28 }, /* HRTS0_N */ + { RCAR_GP_PIN(5, 15), PU4, 27 }, /* HCTS0_N */ + { RCAR_GP_PIN(5, 14), PU4, 26 }, /* HTX0 */ + { RCAR_GP_PIN(5, 13), PU4, 25 }, /* HRX0 */ + { RCAR_GP_PIN(5, 12), PU4, 24 }, /* HSCK0 */ + { RCAR_GP_PIN(5, 11), PU4, 23 }, /* RX2_A */ + { RCAR_GP_PIN(5, 10), PU4, 22 }, /* TX2_A */ + { RCAR_GP_PIN(5, 9), PU4, 21 }, /* SCK2 */ + { RCAR_GP_PIN(5, 8), PU4, 20 }, /* RTS1_N_TANS */ + { RCAR_GP_PIN(5, 7), PU4, 19 }, /* CTS1_N */ + { RCAR_GP_PIN(5, 6), PU4, 18 }, /* TX1_A */ + { RCAR_GP_PIN(5, 5), PU4, 17 }, /* RX1_A */ + { RCAR_GP_PIN(5, 4), PU4, 16 }, /* RTS0_N_TANS */ + { RCAR_GP_PIN(5, 3), PU4, 15 }, /* CTS0_N */ + { RCAR_GP_PIN(5, 2), PU4, 14 }, /* TX0 */ + { RCAR_GP_PIN(5, 1), PU4, 13 }, /* RX0 */ + { RCAR_GP_PIN(5, 0), PU4, 12 }, /* SCK0 */ + { RCAR_GP_PIN(3, 15), PU4, 11 }, /* SD1_WP */ + { RCAR_GP_PIN(3, 14), PU4, 10 }, /* SD1_CD */ + { RCAR_GP_PIN(3, 13), PU4, 9 }, /* SD0_WP */ + { RCAR_GP_PIN(3, 12), PU4, 8 }, /* SD0_CD */ + { RCAR_GP_PIN(4, 17), PU4, 7 }, /* SD3_DS */ + { RCAR_GP_PIN(4, 16), PU4, 6 }, /* SD3_DAT7 */ + { RCAR_GP_PIN(4, 15), PU4, 5 }, /* SD3_DAT6 */ + { RCAR_GP_PIN(4, 14), PU4, 4 }, /* SD3_DAT5 */ + { RCAR_GP_PIN(4, 13), PU4, 3 }, /* SD3_DAT4 */ + { RCAR_GP_PIN(4, 12), PU4, 2 }, /* SD3_DAT3 */ + { RCAR_GP_PIN(4, 11), PU4, 1 }, /* SD3_DAT2 */ + { RCAR_GP_PIN(4, 10), PU4, 0 }, /* SD3_DAT1 */ + + { RCAR_GP_PIN(6, 24), PU5, 31 }, /* USB0_PWEN */ + { RCAR_GP_PIN(6, 23), PU5, 30 }, /* AUDIO_CLKB_B */ + { RCAR_GP_PIN(6, 22), PU5, 29 }, /* AUDIO_CLKA_A */ + { RCAR_GP_PIN(6, 21), PU5, 28 }, /* SSI_SDATA9_A */ + { RCAR_GP_PIN(6, 20), PU5, 27 }, /* SSI_SDATA8 */ + { RCAR_GP_PIN(6, 19), PU5, 26 }, /* SSI_SDATA7 */ + { RCAR_GP_PIN(6, 18), PU5, 25 }, /* SSI_WS78 */ + { RCAR_GP_PIN(6, 17), PU5, 24 }, /* SSI_SCK78 */ + { RCAR_GP_PIN(6, 16), PU5, 23 }, /* SSI_SDATA6 */ + { RCAR_GP_PIN(6, 15), PU5, 22 }, /* SSI_WS6 */ + { RCAR_GP_PIN(6, 14), PU5, 21 }, /* SSI_SCK6 */ + { RCAR_GP_PIN(6, 13), PU5, 20 }, /* SSI_SDATA5 */ + { RCAR_GP_PIN(6, 12), PU5, 19 }, /* SSI_WS5 */ + { RCAR_GP_PIN(6, 11), PU5, 18 }, /* SSI_SCK5 */ + { RCAR_GP_PIN(6, 10), PU5, 17 }, /* SSI_SDATA4 */ + { RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */ + { RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */ + { RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */ + { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS349 */ + { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK349 */ + { RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */ + { RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */ + { RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */ + { RCAR_GP_PIN(6, 1), PU5, 8 }, /* SSI_WS01239 */ + { RCAR_GP_PIN(6, 0), PU5, 7 }, /* SSI_SCK01239 */ + { PIN_NUMBER('H', 37), PU5, 6 }, /* MLB_REF */ + { RCAR_GP_PIN(5, 25), PU5, 5 }, /* MLB_DAT */ + { RCAR_GP_PIN(5, 24), PU5, 4 }, /* MLB_SIG */ + { RCAR_GP_PIN(5, 23), PU5, 3 }, /* MLB_CLK */ + { RCAR_GP_PIN(5, 22), PU5, 2 }, /* MSIOF0_RXD */ + { RCAR_GP_PIN(5, 21), PU5, 1 }, /* MSIOF0_SS2 */ + { RCAR_GP_PIN(5, 20), PU5, 0 }, /* MSIOF0_TXD */ + + { RCAR_GP_PIN(6, 31), PU6, 6 }, /* USB2_CH3_OVC */ + { RCAR_GP_PIN(6, 30), PU6, 5 }, /* USB2_CH3_PWEN */ + { RCAR_GP_PIN(6, 29), PU6, 4 }, /* USB30_OVC */ + { RCAR_GP_PIN(6, 28), PU6, 3 }, /* USB30_PWEN */ + { RCAR_GP_PIN(6, 27), PU6, 2 }, /* USB1_OVC */ + { RCAR_GP_PIN(6, 26), PU6, 1 }, /* USB1_PWEN */ + { RCAR_GP_PIN(6, 25), PU6, 0 }, /* USB0_OVC */ +}; + +static unsigned int r8a7795_pinmux_get_bias(struct sh_pfc *pfc, + unsigned int pin) +{ + const struct sh_pfc_bias_info *info; + u32 reg; + u32 bit; + + info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin); + if (!info) + return PIN_CONFIG_BIAS_DISABLE; + + reg = info->reg; + bit = BIT(info->bit); + + if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit)) + return PIN_CONFIG_BIAS_DISABLE; + else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit) + return PIN_CONFIG_BIAS_PULL_UP; + else + return PIN_CONFIG_BIAS_PULL_DOWN; +} + +static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, + unsigned int bias) +{ + const struct sh_pfc_bias_info *info; + u32 enable, updown; + u32 reg; + u32 bit; + + info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin); + if (!info) + return; + + reg = info->reg; + bit = BIT(info->bit); + + enable = sh_pfc_read_reg(pfc, PUEN + reg, 32) & ~bit; + if (bias != PIN_CONFIG_BIAS_DISABLE) + enable |= bit; + + updown = sh_pfc_read_reg(pfc, PUD + reg, 32) & ~bit; + if (bias == PIN_CONFIG_BIAS_PULL_UP) + updown |= bit; + + sh_pfc_write_reg(pfc, PUD + reg, 32, updown); + sh_pfc_write_reg(pfc, PUEN + reg, 32, enable); +} + +static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = { + .pin_to_pocctrl = r8a7795_pin_to_pocctrl, + .get_bias = r8a7795_pinmux_get_bias, + .set_bias = r8a7795_pinmux_set_bias, +}; + +const struct sh_pfc_soc_info r8a7795_pinmux_info = { + .name = "r8a77951_pfc", + .ops = &r8a7795_pinmux_ops, + .unlock_reg = 0xe6060000, /* PMMR */ + + .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, + + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .groups = pinmux_groups, + .nr_groups = ARRAY_SIZE(pinmux_groups), + .functions = pinmux_functions, + .nr_functions = ARRAY_SIZE(pinmux_functions), + + .cfg_regs = pinmux_config_regs, + .drive_regs = pinmux_drive_regs, + + .pinmux_data = pinmux_data, + .pinmux_data_size = ARRAY_SIZE(pinmux_data), +}; diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c new file mode 100644 index 0000000000..fa8150be0e --- /dev/null +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c @@ -0,0 +1,5728 @@ +/* + * R8A7796 processor support - PFC hardware block. + * + * Copyright (C) 2016 Renesas Electronics Corp. + * + * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * + * R-Car Gen3 processor support - PFC hardware block. + * + * Copyright (C) 2015 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <dm/pinctrl.h> +#include <linux/kernel.h> + +#include "sh_pfc.h" + +#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \ + SH_PFC_PIN_CFG_PULL_UP | \ + SH_PFC_PIN_CFG_PULL_DOWN) + +#define CPU_ALL_PORT(fn, sfx) \ + PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_12(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_1(3, 12, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_1(3, 13, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_1(3, 14, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_1(3, 15, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_18(4, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ + PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) +/* + * F_() : just information + * FM() : macro for FN_xxx / xxx_MARK + */ + +/* GPSR0 */ +#define GPSR0_15 F_(D15, IP7_11_8) +#define GPSR0_14 F_(D14, IP7_7_4) +#define GPSR0_13 F_(D13, IP7_3_0) +#define GPSR0_12 F_(D12, IP6_31_28) +#define GPSR0_11 F_(D11, IP6_27_24) +#define GPSR0_10 F_(D10, IP6_23_20) +#define GPSR0_9 F_(D9, IP6_19_16) +#define GPSR0_8 F_(D8, IP6_15_12) +#define GPSR0_7 F_(D7, IP6_11_8) +#define GPSR0_6 F_(D6, IP6_7_4) +#define GPSR0_5 F_(D5, IP6_3_0) +#define GPSR0_4 F_(D4, IP5_31_28) +#define GPSR0_3 F_(D3, IP5_27_24) +#define GPSR0_2 F_(D2, IP5_23_20) +#define GPSR0_1 F_(D1, IP5_19_16) +#define GPSR0_0 F_(D0, IP5_15_12) + +/* GPSR1 */ +#define GPSR1_28 FM(CLKOUT) +#define GPSR1_27 F_(EX_WAIT0_A, IP5_11_8) +#define GPSR1_26 F_(WE1_N, IP5_7_4) +#define GPSR1_25 F_(WE0_N, IP5_3_0) +#define GPSR1_24 F_(RD_WR_N, IP4_31_28) +#define GPSR1_23 F_(RD_N, IP4_27_24) +#define GPSR1_22 F_(BS_N, IP4_23_20) +#define GPSR1_21 F_(CS1_N, IP4_19_16) +#define GPSR1_20 F_(CS0_N, IP4_15_12) +#define GPSR1_19 F_(A19, IP4_11_8) +#define GPSR1_18 F_(A18, IP4_7_4) +#define GPSR1_17 F_(A17, IP4_3_0) +#define GPSR1_16 F_(A16, IP3_31_28) +#define GPSR1_15 F_(A15, IP3_27_24) +#define GPSR1_14 F_(A14, IP3_23_20) +#define GPSR1_13 F_(A13, IP3_19_16) +#define GPSR1_12 F_(A12, IP3_15_12) +#define GPSR1_11 F_(A11, IP3_11_8) +#define GPSR1_10 F_(A10, IP3_7_4) +#define GPSR1_9 F_(A9, IP3_3_0) +#define GPSR1_8 F_(A8, IP2_31_28) +#define GPSR1_7 F_(A7, IP2_27_24) +#define GPSR1_6 F_(A6, IP2_23_20) +#define GPSR1_5 F_(A5, IP2_19_16) +#define GPSR1_4 F_(A4, IP2_15_12) +#define GPSR1_3 F_(A3, IP2_11_8) +#define GPSR1_2 F_(A2, IP2_7_4) +#define GPSR1_1 F_(A1, IP2_3_0) +#define GPSR1_0 F_(A0, IP1_31_28) + +/* GPSR2 */ +#define GPSR2_14 F_(AVB_AVTP_CAPTURE_A, IP0_23_20) +#define GPSR2_13 F_(AVB_AVTP_MATCH_A, IP0_19_16) +#define GPSR2_12 F_(AVB_LINK, IP0_15_12) +#define GPSR2_11 F_(AVB_PHY_INT, IP0_11_8) +#define GPSR2_10 F_(AVB_MAGIC, IP0_7_4) +#define GPSR2_9 F_(AVB_MDC, IP0_3_0) +#define GPSR2_8 F_(PWM2_A, IP1_27_24) +#define GPSR2_7 F_(PWM1_A, IP1_23_20) +#define GPSR2_6 F_(PWM0, IP1_19_16) +#define GPSR2_5 F_(IRQ5, IP1_15_12) +#define GPSR2_4 F_(IRQ4, IP1_11_8) +#define GPSR2_3 F_(IRQ3, IP1_7_4) +#define GPSR2_2 F_(IRQ2, IP1_3_0) +#define GPSR2_1 F_(IRQ1, IP0_31_28) +#define GPSR2_0 F_(IRQ0, IP0_27_24) + +/* GPSR3 */ +#define GPSR3_15 F_(SD1_WP, IP11_23_20) +#define GPSR3_14 F_(SD1_CD, IP11_19_16) +#define GPSR3_13 F_(SD0_WP, IP11_15_12) +#define GPSR3_12 F_(SD0_CD, IP11_11_8) +#define GPSR3_11 F_(SD1_DAT3, IP8_31_28) +#define GPSR3_10 F_(SD1_DAT2, IP8_27_24) +#define GPSR3_9 F_(SD1_DAT1, IP8_23_20) +#define GPSR3_8 F_(SD1_DAT0, IP8_19_16) +#define GPSR3_7 F_(SD1_CMD, IP8_15_12) +#define GPSR3_6 F_(SD1_CLK, IP8_11_8) +#define GPSR3_5 F_(SD0_DAT3, IP8_7_4) +#define GPSR3_4 F_(SD0_DAT2, IP8_3_0) +#define GPSR3_3 F_(SD0_DAT1, IP7_31_28) +#define GPSR3_2 F_(SD0_DAT0, IP7_27_24) +#define GPSR3_1 F_(SD0_CMD, IP7_23_20) +#define GPSR3_0 F_(SD0_CLK, IP7_19_16) + +/* GPSR4 */ +#define GPSR4_17 F_(SD3_DS, IP11_7_4) +#define GPSR4_16 F_(SD3_DAT7, IP11_3_0) +#define GPSR4_15 F_(SD3_DAT6, IP10_31_28) +#define GPSR4_14 F_(SD3_DAT5, IP10_27_24) +#define GPSR4_13 F_(SD3_DAT4, IP10_23_20) +#define GPSR4_12 F_(SD3_DAT3, IP10_19_16) +#define GPSR4_11 F_(SD3_DAT2, IP10_15_12) +#define GPSR4_10 F_(SD3_DAT1, IP10_11_8) +#define GPSR4_9 F_(SD3_DAT0, IP10_7_4) +#define GPSR4_8 F_(SD3_CMD, IP10_3_0) +#define GPSR4_7 F_(SD3_CLK, IP9_31_28) +#define GPSR4_6 F_(SD2_DS, IP9_27_24) +#define GPSR4_5 F_(SD2_DAT3, IP9_23_20) +#define GPSR4_4 F_(SD2_DAT2, IP9_19_16) +#define GPSR4_3 F_(SD2_DAT1, IP9_15_12) +#define GPSR4_2 F_(SD2_DAT0, IP9_11_8) +#define GPSR4_1 F_(SD2_CMD, IP9_7_4) +#define GPSR4_0 F_(SD2_CLK, IP9_3_0) + +/* GPSR5 */ +#define GPSR5_25 F_(MLB_DAT, IP14_19_16) +#define GPSR5_24 F_(MLB_SIG, IP14_15_12) +#define GPSR5_23 F_(MLB_CLK, IP14_11_8) +#define GPSR5_22 FM(MSIOF0_RXD) +#define GPSR5_21 F_(MSIOF0_SS2, IP14_7_4) +#define GPSR5_20 FM(MSIOF0_TXD) +#define GPSR5_19 F_(MSIOF0_SS1, IP14_3_0) +#define GPSR5_18 F_(MSIOF0_SYNC, IP13_31_28) +#define GPSR5_17 FM(MSIOF0_SCK) +#define GPSR5_16 F_(HRTS0_N, IP13_27_24) +#define GPSR5_15 F_(HCTS0_N, IP13_23_20) +#define GPSR5_14 F_(HTX0, IP13_19_16) +#define GPSR5_13 F_(HRX0, IP13_15_12) +#define GPSR5_12 F_(HSCK0, IP13_11_8) +#define GPSR5_11 F_(RX2_A, IP13_7_4) +#define GPSR5_10 F_(TX2_A, IP13_3_0) +#define GPSR5_9 F_(SCK2, IP12_31_28) +#define GPSR5_8 F_(RTS1_N_TANS, IP12_27_24) +#define GPSR5_7 F_(CTS1_N, IP12_23_20) +#define GPSR5_6 F_(TX1_A, IP12_19_16) +#define GPSR5_5 F_(RX1_A, IP12_15_12) +#define GPSR5_4 F_(RTS0_N_TANS, IP12_11_8) +#define GPSR5_3 F_(CTS0_N, IP12_7_4) +#define GPSR5_2 F_(TX0, IP12_3_0) +#define GPSR5_1 F_(RX0, IP11_31_28) +#define GPSR5_0 F_(SCK0, IP11_27_24) + +/* GPSR6 */ +#define GPSR6_31 F_(GP6_31, IP18_7_4) +#define GPSR6_30 F_(GP6_30, IP18_3_0) +#define GPSR6_29 F_(USB30_OVC, IP17_31_28) +#define GPSR6_28 F_(USB30_PWEN, IP17_27_24) +#define GPSR6_27 F_(USB1_OVC, IP17_23_20) +#define GPSR6_26 F_(USB1_PWEN, IP17_19_16) +#define GPSR6_25 F_(USB0_OVC, IP17_15_12) +#define GPSR6_24 F_(USB0_PWEN, IP17_11_8) +#define GPSR6_23 F_(AUDIO_CLKB_B, IP17_7_4) +#define GPSR6_22 F_(AUDIO_CLKA_A, IP17_3_0) +#define GPSR6_21 F_(SSI_SDATA9_A, IP16_31_28) +#define GPSR6_20 F_(SSI_SDATA8, IP16_27_24) +#define GPSR6_19 F_(SSI_SDATA7, IP16_23_20) +#define GPSR6_18 F_(SSI_WS78, IP16_19_16) +#define GPSR6_17 F_(SSI_SCK78, IP16_15_12) +#define GPSR6_16 F_(SSI_SDATA6, IP16_11_8) +#define GPSR6_15 F_(SSI_WS6, IP16_7_4) +#define GPSR6_14 F_(SSI_SCK6, IP16_3_0) +#define GPSR6_13 FM(SSI_SDATA5) +#define GPSR6_12 FM(SSI_WS5) +#define GPSR6_11 FM(SSI_SCK5) +#define GPSR6_10 F_(SSI_SDATA4, IP15_31_28) +#define GPSR6_9 F_(SSI_WS4, IP15_27_24) +#define GPSR6_8 F_(SSI_SCK4, IP15_23_20) +#define GPSR6_7 F_(SSI_SDATA3, IP15_19_16) +#define GPSR6_6 F_(SSI_WS349, IP15_15_12) +#define GPSR6_5 F_(SSI_SCK349, IP15_11_8) +#define GPSR6_4 F_(SSI_SDATA2_A, IP15_7_4) +#define GPSR6_3 F_(SSI_SDATA1_A, IP15_3_0) +#define GPSR6_2 F_(SSI_SDATA0, IP14_31_28) +#define GPSR6_1 F_(SSI_WS01239, IP14_27_24) +#define GPSR6_0 F_(SSI_SCK01239, IP14_23_20) + +/* GPSR7 */ +#define GPSR7_3 FM(GP7_03) +#define GPSR7_2 FM(HDMI0_CEC) +#define GPSR7_1 FM(AVS2) +#define GPSR7_0 FM(AVS1) + + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP0_3_0 FM(AVB_MDC) F_(0, 0) FM(MSIOF2_SS2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_7_4 FM(AVB_MAGIC) F_(0, 0) FM(MSIOF2_SS1_C) FM(SCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_11_8 FM(AVB_PHY_INT) F_(0, 0) FM(MSIOF2_SYNC_C) FM(RX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_19_16 FM(AVB_AVTP_MATCH_A) F_(0, 0) FM(MSIOF2_RXD_C) FM(CTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_23_20 FM(AVB_AVTP_CAPTURE_A) F_(0, 0) FM(MSIOF2_TXD_C) FM(RTS4_N_TANS_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_27_24 FM(IRQ0) FM(QPOLB) F_(0, 0) FM(DU_CDE) FM(VI4_DATA0_B) FM(CAN0_TX_B) FM(CANFD0_TX_B) FM(MSIOF3_SS2_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_31_28 FM(IRQ1) FM(QPOLA) F_(0, 0) FM(DU_DISP) FM(VI4_DATA1_B) FM(CAN0_RX_B) FM(CANFD0_RX_B) FM(MSIOF3_SS1_E) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_3_0 FM(IRQ2) FM(QCPV_QDE) F_(0, 0) FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(VI4_DATA2_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SYNC_E) F_(0, 0) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) FM(A25) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_11_8 FM(IRQ4) FM(QSTH_QHS) FM(A24) FM(DU_EXHSYNC_DU_HSYNC) FM(VI4_DATA4_B) F_(0, 0) F_(0, 0) FM(MSIOF3_RXD_E) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_15_12 FM(IRQ5) FM(QSTB_QHE) FM(A23) FM(DU_EXVSYNC_DU_VSYNC) FM(VI4_DATA5_B) F_(0, 0) F_(0, 0) FM(MSIOF3_TXD_E) F_(0, 0) FM(PWM6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_19_16 FM(PWM0) FM(AVB_AVTP_PPS)FM(A22) F_(0, 0) FM(VI4_DATA6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IECLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_23_20 FM(PWM1_A) F_(0, 0) FM(A21) FM(HRX3_D) FM(VI4_DATA7_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IERX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_27_24 FM(PWM2_A) F_(0, 0) FM(A20) FM(HTX3_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(IETX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_31_28 FM(A0) FM(LCDOUT16) FM(MSIOF3_SYNC_B) F_(0, 0) FM(VI4_DATA8) F_(0, 0) FM(DU_DB0) F_(0, 0) F_(0, 0) FM(PWM3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_3_0 FM(A1) FM(LCDOUT17) FM(MSIOF3_TXD_B) F_(0, 0) FM(VI4_DATA9) F_(0, 0) FM(DU_DB1) F_(0, 0) F_(0, 0) FM(PWM4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_11_8 FM(A3) FM(LCDOUT19) FM(MSIOF3_RXD_B) F_(0, 0) FM(VI4_DATA11) F_(0, 0) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_15_12 FM(A4) FM(LCDOUT20) FM(MSIOF3_SS1_B) F_(0, 0) FM(VI4_DATA12) FM(VI5_DATA12) FM(DU_DB4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_27_24 FM(A7) FM(LCDOUT23) FM(MSIOF2_SS2_A) FM(TX4_B) FM(VI4_DATA15) FM(VI5_DATA15) FM(DU_DB7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(SDA6_A) FM(AVB_AVTP_MATCH_B) FM(PWM1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_3_0 FM(A9) F_(0, 0) FM(MSIOF2_SCK_A) FM(CTS4_N_B) F_(0, 0) FM(VI5_VSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_7_4 FM(A10) F_(0, 0) FM(MSIOF2_RXD_A) FM(RTS4_N_TANS_B) F_(0, 0) FM(VI5_HSYNC_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_11_8 FM(A11) FM(TX3_B) FM(MSIOF2_TXD_A) FM(HTX4_B) FM(HSCK4) FM(VI5_FIELD) F_(0, 0) FM(SCL6_A) FM(AVB_AVTP_CAPTURE_B) FM(PWM2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP3_15_12 FM(A12) FM(LCDOUT12) FM(MSIOF3_SCK_C) F_(0, 0) FM(HRX4_A) FM(VI5_DATA8) FM(DU_DG4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_19_16 FM(A13) FM(LCDOUT13) FM(MSIOF3_SYNC_C) F_(0, 0) FM(HTX4_A) FM(VI5_DATA9) FM(DU_DG5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_23_20 FM(A14) FM(LCDOUT14) FM(MSIOF3_RXD_C) F_(0, 0) FM(HCTS4_N) FM(VI5_DATA10) FM(DU_DG6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_27_24 FM(A15) FM(LCDOUT15) FM(MSIOF3_TXD_C) F_(0, 0) FM(HRTS4_N) FM(VI5_DATA11) FM(DU_DG7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_31_28 FM(A16) FM(LCDOUT8) F_(0, 0) F_(0, 0) FM(VI4_FIELD) F_(0, 0) FM(DU_DG0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_3_0 FM(A17) FM(LCDOUT9) F_(0, 0) F_(0, 0) FM(VI4_VSYNC_N) F_(0, 0) FM(DU_DG1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_11_8 FM(A19) FM(LCDOUT11) F_(0, 0) F_(0, 0) FM(VI4_CLKENB) F_(0, 0) FM(DU_DG3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_19_16 FM(CS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLK) F_(0, 0) FM(EX_WAIT0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_23_20 FM(BS_N) FM(QSTVA_QVS) FM(MSIOF3_SCK_D) FM(SCK3) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN1_TX) FM(CANFD1_TX) FM(IETX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_27_24 FM(RD_N) F_(0, 0) FM(MSIOF3_SYNC_D) FM(RX3_A) FM(HRX3_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN0_TX_A) FM(CANFD0_TX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_31_28 FM(RD_WR_N) F_(0, 0) FM(MSIOF3_RXD_D) FM(TX3_A) FM(HTX3_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(CAN0_RX_A) FM(CANFD0_RX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_3_0 FM(WE0_N) F_(0, 0) FM(MSIOF3_TXD_D) FM(CTS3_N) FM(HCTS3_N) F_(0, 0) F_(0, 0) FM(SCL6_B) FM(CAN_CLK) F_(0, 0) FM(IECLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_7_4 FM(WE1_N) F_(0, 0) FM(MSIOF3_SS1_D) FM(RTS3_N_TANS) FM(HRTS3_N) F_(0, 0) F_(0, 0) FM(SDA6_B) FM(CAN1_RX) FM(CANFD1_RX) FM(IERX_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_11_8 FM(EX_WAIT0_A) FM(QCLK) F_(0, 0) F_(0, 0) FM(VI4_CLK) F_(0, 0) FM(DU_DOTCLKOUT0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_15_12 FM(D0) FM(MSIOF2_SS1_B)FM(MSIOF3_SCK_A) F_(0, 0) FM(VI4_DATA16) FM(VI5_DATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_19_16 FM(D1) FM(MSIOF2_SS2_B)FM(MSIOF3_SYNC_A) F_(0, 0) FM(VI4_DATA17) FM(VI5_DATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_23_20 FM(D2) F_(0, 0) FM(MSIOF3_RXD_A) F_(0, 0) FM(VI4_DATA18) FM(VI5_DATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_27_24 FM(D3) F_(0, 0) FM(MSIOF3_TXD_A) F_(0, 0) FM(VI4_DATA19) FM(VI5_DATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_7_4 FM(D6) FM(MSIOF2_RXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA22) FM(VI5_DATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_11_8 FM(D7) FM(MSIOF2_TXD_B)F_(0, 0) F_(0, 0) FM(VI4_DATA23) FM(VI5_DATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_15_12 FM(D8) FM(LCDOUT0) FM(MSIOF2_SCK_D) FM(SCK4_C) FM(VI4_DATA0_A) F_(0, 0) FM(DU_DR0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_19_16 FM(D9) FM(LCDOUT1) FM(MSIOF2_SYNC_D) F_(0, 0) FM(VI4_DATA1_A) F_(0, 0) FM(DU_DR1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_23_20 FM(D10) FM(LCDOUT2) FM(MSIOF2_RXD_D) FM(HRX3_B) FM(VI4_DATA2_A) FM(CTS4_N_C) FM(DU_DR2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_27_24 FM(D11) FM(LCDOUT3) FM(MSIOF2_TXD_D) FM(HTX3_B) FM(VI4_DATA3_A) FM(RTS4_N_TANS_C)FM(DU_DR3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP7_3_0 FM(D13) FM(LCDOUT5) FM(MSIOF2_SS2_D) FM(TX4_C) FM(VI4_DATA5_A) F_(0, 0) FM(DU_DR5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_7_4 FM(D14) FM(LCDOUT6) FM(MSIOF3_SS1_A) FM(HRX3_C) FM(VI4_DATA6_A) F_(0, 0) FM(DU_DR6) FM(SCL6_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_11_8 FM(D15) FM(LCDOUT7) FM(MSIOF3_SS2_A) FM(HTX3_C) FM(VI4_DATA7_A) F_(0, 0) FM(DU_DR7) FM(SDA6_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_19_16 FM(SD0_CLK) F_(0, 0) FM(MSIOF1_SCK_E) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_23_20 FM(SD0_CMD) F_(0, 0) FM(MSIOF1_SYNC_E) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_27_24 FM(SD0_DAT0) F_(0, 0) FM(MSIOF1_RXD_E) F_(0, 0) F_(0, 0) FM(TS_SCK0_B) FM(STP_ISCLK_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_31_28 FM(SD0_DAT1) F_(0, 0) FM(MSIOF1_TXD_E) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_B)FM(STP_ISSYNC_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_3_0 FM(SD0_DAT2) F_(0, 0) FM(MSIOF1_SS1_E) F_(0, 0) F_(0, 0) FM(TS_SDAT0_B) FM(STP_ISD_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_7_4 FM(SD0_DAT3) F_(0, 0) FM(MSIOF1_SS2_E) F_(0, 0) F_(0, 0) FM(TS_SDEN0_B) FM(STP_ISEN_0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_15_12 FM(SD1_CMD) F_(0, 0) FM(MSIOF1_SYNC_G) FM(NFCE_N_B) F_(0, 0) FM(SIM0_D_A) FM(STP_IVCXO27_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_19_16 FM(SD1_DAT0) FM(SD2_DAT4) FM(MSIOF1_RXD_G) FM(NFWP_N_B) F_(0, 0) FM(TS_SCK1_B) FM(STP_ISCLK_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_23_20 FM(SD1_DAT1) FM(SD2_DAT5) FM(MSIOF1_TXD_G) FM(NFDATA14_B) F_(0, 0) FM(TS_SPSYNC1_B)FM(STP_ISSYNC_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_27_24 FM(SD1_DAT2) FM(SD2_DAT6) FM(MSIOF1_SS1_G) FM(NFDATA15_B) F_(0, 0) FM(TS_SDAT1_B) FM(STP_ISD_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_31_28 FM(SD1_DAT3) FM(SD2_DAT7) FM(MSIOF1_SS2_G) FM(NFRB_N_B) F_(0, 0) FM(TS_SDEN1_B) FM(STP_ISEN_1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_3_0 FM(SD2_CLK) F_(0, 0) FM(NFDATA8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_7_4 FM(SD2_CMD) F_(0, 0) FM(NFDATA9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_11_8 FM(SD2_DAT0) F_(0, 0) FM(NFDATA10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_15_12 FM(SD2_DAT1) F_(0, 0) FM(NFDATA11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_19_16 FM(SD2_DAT2) F_(0, 0) FM(NFDATA12) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_23_20 FM(SD2_DAT3) F_(0, 0) FM(NFDATA13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_27_24 FM(SD2_DS) F_(0, 0) FM(NFALE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_31_28 FM(SD3_CLK) F_(0, 0) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_3_0 FM(SD3_CMD) F_(0, 0) FM(NFRE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_11_8 FM(SD3_DAT1) F_(0, 0) FM(NFDATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_15_12 FM(SD3_DAT2) F_(0, 0) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_19_16 FM(SD3_DAT3) F_(0, 0) FM(NFDATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_23_20 FM(SD3_DAT4) FM(SD2_CD_A) FM(NFDATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_27_24 FM(SD3_DAT5) FM(SD2_WP_A) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_31_28 FM(SD3_DAT6) FM(SD3_CD) FM(NFDATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_3_0 FM(SD3_DAT7) FM(SD3_WP) FM(NFDATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_7_4 FM(SD3_DS) F_(0, 0) FM(NFCLE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_11_8 FM(SD0_CD) F_(0, 0) FM(NFDATA14_A) F_(0, 0) FM(SCL2_B) FM(SIM0_RST_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP11_15_12 FM(SD0_WP) F_(0, 0) FM(NFDATA15_A) F_(0, 0) FM(SDA2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_19_16 FM(SD1_CD) F_(0, 0) FM(NFRB_N_A) F_(0, 0) F_(0, 0) FM(SIM0_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_23_20 FM(SD1_WP) F_(0, 0) FM(NFCE_N_A) F_(0, 0) F_(0, 0) FM(SIM0_D_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_27_24 FM(SCK0) FM(HSCK1_B) FM(MSIOF1_SS2_B) FM(AUDIO_CLKC_B) FM(SDA2_A) FM(SIM0_RST_B) FM(STP_OPWM_0_C) FM(RIF0_CLK_B) F_(0, 0) FM(ADICHS2) FM(SCK5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_C) FM(RIF0_D0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_3_0 FM(TX0) FM(HTX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_C)FM(STP_ISSYNC_0_C) FM(RIF0_D1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_7_4 FM(CTS0_N) FM(HCTS1_N_B) FM(MSIOF1_SYNC_B) F_(0, 0) F_(0, 0) FM(TS_SPSYNC1_C)FM(STP_ISSYNC_1_C) FM(RIF1_SYNC_B) FM(AUDIO_CLKOUT_C) FM(ADICS_SAMP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_11_8 FM(RTS0_N_TANS) FM(HRTS1_N_B) FM(MSIOF1_SS1_B) FM(AUDIO_CLKA_B) FM(SCL2_A) F_(0, 0) FM(STP_IVCXO27_1_C) FM(RIF0_SYNC_B) F_(0, 0) FM(ADICHS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_15_12 FM(RX1_A) FM(HRX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDAT0_C) FM(STP_ISD_0_C) FM(RIF1_CLK_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_19_16 FM(TX1_A) FM(HTX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0_C) FM(STP_ISEN_0_C) FM(RIF1_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_23_20 FM(CTS1_N) FM(HCTS1_N_A) FM(MSIOF1_RXD_B) F_(0, 0) F_(0, 0) FM(TS_SDEN1_C) FM(STP_ISEN_1_C) FM(RIF1_D0_B) F_(0, 0) FM(ADIDATA) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_27_24 FM(RTS1_N_TANS) FM(HRTS1_N_A) FM(MSIOF1_TXD_B) F_(0, 0) F_(0, 0) FM(TS_SDAT1_C) FM(STP_ISD_1_C) FM(RIF1_D1_B) F_(0, 0) FM(ADICHS0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_31_28 FM(SCK2) FM(SCIF_CLK_B) FM(MSIOF1_SCK_B) F_(0, 0) F_(0, 0) FM(TS_SCK1_C) FM(STP_ISCLK_1_C) FM(RIF1_CLK_B) F_(0, 0) FM(ADICLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_3_0 FM(TX2_A) F_(0, 0) F_(0, 0) FM(SD2_CD_B) FM(SCL1_A) F_(0, 0) FM(FMCLK_A) FM(RIF1_D1_C) F_(0, 0) FM(FSO_CFE_0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_7_4 FM(RX2_A) F_(0, 0) F_(0, 0) FM(SD2_WP_B) FM(SDA1_A) F_(0, 0) FM(FMIN_A) FM(RIF1_SYNC_C) F_(0, 0) FM(FSO_CFE_1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_11_8 FM(HSCK0) F_(0, 0) FM(MSIOF1_SCK_D) FM(AUDIO_CLKB_A) FM(SSI_SDATA1_B)FM(TS_SCK0_D) FM(STP_ISCLK_0_D) FM(RIF0_CLK_C) F_(0, 0) F_(0, 0) FM(RX5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_15_12 FM(HRX0) F_(0, 0) FM(MSIOF1_RXD_D) F_(0, 0) FM(SSI_SDATA2_B)FM(TS_SDEN0_D) FM(STP_ISEN_0_D) FM(RIF0_D0_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_19_16 FM(HTX0) F_(0, 0) FM(MSIOF1_TXD_D) F_(0, 0) FM(SSI_SDATA9_B)FM(TS_SDAT0_D) FM(STP_ISD_0_D) FM(RIF0_D1_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_23_20 FM(HCTS0_N) FM(RX2_B) FM(MSIOF1_SYNC_D) F_(0, 0) FM(SSI_SCK9_A) FM(TS_SPSYNC0_D)FM(STP_ISSYNC_0_D) FM(RIF0_SYNC_C) FM(AUDIO_CLKOUT1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_27_24 FM(HRTS0_N) FM(TX2_B) FM(MSIOF1_SS1_D) F_(0, 0) FM(SSI_WS9_A) F_(0, 0) FM(STP_IVCXO27_0_D) FM(BPFCLK_A) FM(AUDIO_CLKOUT2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_31_28 FM(MSIOF0_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT_A) F_(0, 0) FM(TX5_B) F_(0, 0) F_(0, 0) FM(BPFCLK_D) F_(0, 0) F_(0, 0) +#define IP14_3_0 FM(MSIOF0_SS1) FM(RX5_A) FM(NFWP_N_A) FM(AUDIO_CLKA_C) FM(SSI_SCK2_A) F_(0, 0) FM(STP_IVCXO27_0_C) F_(0, 0) FM(AUDIO_CLKOUT3_A) F_(0, 0) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_7_4 FM(MSIOF0_SS2) FM(TX5_A) FM(MSIOF1_SS2_D) FM(AUDIO_CLKC_A) FM(SSI_WS2_A) F_(0, 0) FM(STP_OPWM_0_D) F_(0, 0) FM(AUDIO_CLKOUT_D) F_(0, 0) FM(SPEEDIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_11_8 FM(MLB_CLK) F_(0, 0) FM(MSIOF1_SCK_F) F_(0, 0) FM(SCL1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_15_12 FM(MLB_SIG) FM(RX1_B) FM(MSIOF1_SYNC_F) F_(0, 0) FM(SDA1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_19_16 FM(MLB_DAT) FM(TX1_B) FM(MSIOF1_RXD_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_23_20 FM(SSI_SCK01239) F_(0, 0) FM(MSIOF1_TXD_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_27_24 FM(SSI_WS01239) F_(0, 0) FM(MSIOF1_SS1_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 */ /* A */ /* B */ /* C - F */ +#define IP14_31_28 FM(SSI_SDATA0) F_(0, 0) FM(MSIOF1_SS2_F) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_3_0 FM(SSI_SDATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_7_4 FM(SSI_SDATA2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(SSI_SCK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_11_8 FM(SSI_SCK349) F_(0, 0) FM(MSIOF1_SS1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_OPWM_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_15_12 FM(SSI_WS349) FM(HCTS2_N_A) FM(MSIOF1_SS2_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_19_16 FM(SSI_SDATA3) FM(HRTS2_N_A) FM(MSIOF1_TXD_A) F_(0, 0) F_(0, 0) FM(TS_SCK0_A) FM(STP_ISCLK_0_A) FM(RIF0_D1_A) FM(RIF2_D0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_23_20 FM(SSI_SCK4) FM(HRX2_A) FM(MSIOF1_SCK_A) F_(0, 0) F_(0, 0) FM(TS_SDAT0_A) FM(STP_ISD_0_A) FM(RIF0_CLK_A) FM(RIF2_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_27_24 FM(SSI_WS4) FM(HTX2_A) FM(MSIOF1_SYNC_A) F_(0, 0) F_(0, 0) FM(TS_SDEN0_A) FM(STP_ISEN_0_A) FM(RIF0_SYNC_A) FM(RIF2_SYNC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_31_28 FM(SSI_SDATA4) FM(HSCK2_A) FM(MSIOF1_RXD_A) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0_A)FM(STP_ISSYNC_0_A) FM(RIF0_D0_A) FM(RIF2_D1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_3_0 FM(SSI_SCK6) F_(0, 0) F_(0, 0) FM(SIM0_RST_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_7_4 FM(SSI_WS6) F_(0, 0) F_(0, 0) FM(SIM0_D_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_11_8 FM(SSI_SDATA6) F_(0, 0) F_(0, 0) FM(SIM0_CLK_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_15_12 FM(SSI_SCK78) FM(HRX2_B) FM(MSIOF1_SCK_C) F_(0, 0) F_(0, 0) FM(TS_SCK1_A) FM(STP_ISCLK_1_A) FM(RIF1_CLK_A) FM(RIF3_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_19_16 FM(SSI_WS78) FM(HTX2_B) FM(MSIOF1_SYNC_C) F_(0, 0) F_(0, 0) FM(TS_SDAT1_A) FM(STP_ISD_1_A) FM(RIF1_SYNC_A) FM(RIF3_SYNC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_23_20 FM(SSI_SDATA7) FM(HCTS2_N_B) FM(MSIOF1_RXD_C) F_(0, 0) F_(0, 0) FM(TS_SDEN1_A) FM(STP_ISEN_1_A) FM(RIF1_D0_A) FM(RIF3_D0_A) F_(0, 0) FM(TCLK2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_27_24 FM(SSI_SDATA8) FM(HRTS2_N_B) FM(MSIOF1_TXD_C) F_(0, 0) F_(0, 0) FM(TS_SPSYNC1_A)FM(STP_ISSYNC_1_A) FM(RIF1_D1_A) FM(RIF3_D1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP16_31_28 FM(SSI_SDATA9_A) FM(HSCK2_B) FM(MSIOF1_SS1_C) FM(HSCK1_A) FM(SSI_WS1_B) FM(SCK1) FM(STP_IVCXO27_1_A) FM(SCK5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP17_3_0 FM(AUDIO_CLKA_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(CC5_OSCOUT) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP17_7_4 FM(AUDIO_CLKB_B) FM(SCIF_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(STP_IVCXO27_1_D) FM(REMOCON_A) F_(0, 0) F_(0, 0) FM(TCLK1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP17_11_8 FM(USB0_PWEN) F_(0, 0) F_(0, 0) FM(SIM0_RST_C) F_(0, 0) FM(TS_SCK1_D) FM(STP_ISCLK_1_D) FM(BPFCLK_B) FM(RIF3_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(HSCK2_C) F_(0, 0) F_(0, 0) +#define IP17_15_12 FM(USB0_OVC) F_(0, 0) F_(0, 0) FM(SIM0_D_C) F_(0, 0) FM(TS_SDAT1_D) FM(STP_ISD_1_D) F_(0, 0) FM(RIF3_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(HRX2_C) F_(0, 0) F_(0, 0) +#define IP17_19_16 FM(USB1_PWEN) F_(0, 0) F_(0, 0) FM(SIM0_CLK_C) FM(SSI_SCK1_A) FM(TS_SCK0_E) FM(STP_ISCLK_0_E) FM(FMCLK_B) FM(RIF2_CLK_B) F_(0, 0) FM(SPEEDIN_A) F_(0, 0) F_(0, 0) FM(HTX2_C) F_(0, 0) F_(0, 0) +#define IP17_23_20 FM(USB1_OVC) F_(0, 0) FM(MSIOF1_SS2_C) F_(0, 0) FM(SSI_WS1_A) FM(TS_SDAT0_E) FM(STP_ISD_0_E) FM(FMIN_B) FM(RIF2_SYNC_B) F_(0, 0) FM(REMOCON_B) F_(0, 0) F_(0, 0) FM(HCTS2_N_C) F_(0, 0) F_(0, 0) +#define IP17_27_24 FM(USB30_PWEN) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT_B) FM(SSI_SCK2_B) FM(TS_SDEN1_D) FM(STP_ISEN_1_D) FM(STP_OPWM_0_E)FM(RIF3_D0_B) F_(0, 0) FM(TCLK2_B) FM(TPU0TO0) FM(BPFCLK_C) FM(HRTS2_N_C) F_(0, 0) F_(0, 0) +#define IP17_31_28 FM(USB30_OVC) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT1_B) FM(SSI_WS2_B) FM(TS_SPSYNC1_D)FM(STP_ISSYNC_1_D) FM(STP_IVCXO27_0_E)FM(RIF3_D1_B) F_(0, 0) FM(FSO_TOE_N) FM(TPU0TO1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP18_3_0 FM(GP6_30) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_B) FM(TS_SDEN0_E) FM(STP_ISEN_0_E) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) F_(0, 0) FM(TPU0TO2) FM(FMCLK_C) FM(FMCLK_D) F_(0, 0) F_(0, 0) +#define IP18_7_4 FM(GP6_31) F_(0, 0) F_(0, 0) FM(AUDIO_CLKOUT3_B) FM(SSI_WS9_B) FM(TS_SPSYNC0_E)FM(STP_ISSYNC_0_E) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) F_(0, 0) FM(TPU0TO3) FM(FMIN_C) FM(FMIN_D) F_(0, 0) F_(0, 0) + +#define PINMUX_GPSR \ +\ + GPSR6_31 \ + GPSR6_30 \ + GPSR6_29 \ + GPSR1_28 GPSR6_28 \ + GPSR1_27 GPSR6_27 \ + GPSR1_26 GPSR6_26 \ + GPSR1_25 GPSR5_25 GPSR6_25 \ + GPSR1_24 GPSR5_24 GPSR6_24 \ + GPSR1_23 GPSR5_23 GPSR6_23 \ + GPSR1_22 GPSR5_22 GPSR6_22 \ + GPSR1_21 GPSR5_21 GPSR6_21 \ + GPSR1_20 GPSR5_20 GPSR6_20 \ + GPSR1_19 GPSR5_19 GPSR6_19 \ + GPSR1_18 GPSR5_18 GPSR6_18 \ + GPSR1_17 GPSR4_17 GPSR5_17 GPSR6_17 \ + GPSR1_16 GPSR4_16 GPSR5_16 GPSR6_16 \ +GPSR0_15 GPSR1_15 GPSR3_15 GPSR4_15 GPSR5_15 GPSR6_15 \ +GPSR0_14 GPSR1_14 GPSR2_14 GPSR3_14 GPSR4_14 GPSR5_14 GPSR6_14 \ +GPSR0_13 GPSR1_13 GPSR2_13 GPSR3_13 GPSR4_13 GPSR5_13 GPSR6_13 \ +GPSR0_12 GPSR1_12 GPSR2_12 GPSR3_12 GPSR4_12 GPSR5_12 GPSR6_12 \ +GPSR0_11 GPSR1_11 GPSR2_11 GPSR3_11 GPSR4_11 GPSR5_11 GPSR6_11 \ +GPSR0_10 GPSR1_10 GPSR2_10 GPSR3_10 GPSR4_10 GPSR5_10 GPSR6_10 \ +GPSR0_9 GPSR1_9 GPSR2_9 GPSR3_9 GPSR4_9 GPSR5_9 GPSR6_9 \ +GPSR0_8 GPSR1_8 GPSR2_8 GPSR3_8 GPSR4_8 GPSR5_8 GPSR6_8 \ +GPSR0_7 GPSR1_7 GPSR2_7 GPSR3_7 GPSR4_7 GPSR5_7 GPSR6_7 \ +GPSR0_6 GPSR1_6 GPSR2_6 GPSR3_6 GPSR4_6 GPSR5_6 GPSR6_6 \ +GPSR0_5 GPSR1_5 GPSR2_5 GPSR3_5 GPSR4_5 GPSR5_5 GPSR6_5 \ +GPSR0_4 GPSR1_4 GPSR2_4 GPSR3_4 GPSR4_4 GPSR5_4 GPSR6_4 \ +GPSR0_3 GPSR1_3 GPSR2_3 GPSR3_3 GPSR4_3 GPSR5_3 GPSR6_3 GPSR7_3 \ +GPSR0_2 GPSR1_2 GPSR2_2 GPSR3_2 GPSR4_2 GPSR5_2 GPSR6_2 GPSR7_2 \ +GPSR0_1 GPSR1_1 GPSR2_1 GPSR3_1 GPSR4_1 GPSR5_1 GPSR6_1 GPSR7_1 \ +GPSR0_0 GPSR1_0 GPSR2_0 GPSR3_0 GPSR4_0 GPSR5_0 GPSR6_0 GPSR7_0 + +#define PINMUX_IPSR \ +\ +FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \ +FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \ +FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ +FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ +FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \ +FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \ +FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ +FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ +\ +FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \ +FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \ +FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \ +FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \ +FM(IP4_19_16) IP4_19_16 FM(IP5_19_16) IP5_19_16 FM(IP6_19_16) IP6_19_16 FM(IP7_19_16) IP7_19_16 \ +FM(IP4_23_20) IP4_23_20 FM(IP5_23_20) IP5_23_20 FM(IP6_23_20) IP6_23_20 FM(IP7_23_20) IP7_23_20 \ +FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ +FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ +\ +FM(IP8_3_0) IP8_3_0 FM(IP9_3_0) IP9_3_0 FM(IP10_3_0) IP10_3_0 FM(IP11_3_0) IP11_3_0 \ +FM(IP8_7_4) IP8_7_4 FM(IP9_7_4) IP9_7_4 FM(IP10_7_4) IP10_7_4 FM(IP11_7_4) IP11_7_4 \ +FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \ +FM(IP8_15_12) IP8_15_12 FM(IP9_15_12) IP9_15_12 FM(IP10_15_12) IP10_15_12 FM(IP11_15_12) IP11_15_12 \ +FM(IP8_19_16) IP8_19_16 FM(IP9_19_16) IP9_19_16 FM(IP10_19_16) IP10_19_16 FM(IP11_19_16) IP11_19_16 \ +FM(IP8_23_20) IP8_23_20 FM(IP9_23_20) IP9_23_20 FM(IP10_23_20) IP10_23_20 FM(IP11_23_20) IP11_23_20 \ +FM(IP8_27_24) IP8_27_24 FM(IP9_27_24) IP9_27_24 FM(IP10_27_24) IP10_27_24 FM(IP11_27_24) IP11_27_24 \ +FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \ +\ +FM(IP12_3_0) IP12_3_0 FM(IP13_3_0) IP13_3_0 FM(IP14_3_0) IP14_3_0 FM(IP15_3_0) IP15_3_0 \ +FM(IP12_7_4) IP12_7_4 FM(IP13_7_4) IP13_7_4 FM(IP14_7_4) IP14_7_4 FM(IP15_7_4) IP15_7_4 \ +FM(IP12_11_8) IP12_11_8 FM(IP13_11_8) IP13_11_8 FM(IP14_11_8) IP14_11_8 FM(IP15_11_8) IP15_11_8 \ +FM(IP12_15_12) IP12_15_12 FM(IP13_15_12) IP13_15_12 FM(IP14_15_12) IP14_15_12 FM(IP15_15_12) IP15_15_12 \ +FM(IP12_19_16) IP12_19_16 FM(IP13_19_16) IP13_19_16 FM(IP14_19_16) IP14_19_16 FM(IP15_19_16) IP15_19_16 \ +FM(IP12_23_20) IP12_23_20 FM(IP13_23_20) IP13_23_20 FM(IP14_23_20) IP14_23_20 FM(IP15_23_20) IP15_23_20 \ +FM(IP12_27_24) IP12_27_24 FM(IP13_27_24) IP13_27_24 FM(IP14_27_24) IP14_27_24 FM(IP15_27_24) IP15_27_24 \ +FM(IP12_31_28) IP12_31_28 FM(IP13_31_28) IP13_31_28 FM(IP14_31_28) IP14_31_28 FM(IP15_31_28) IP15_31_28 \ +\ +FM(IP16_3_0) IP16_3_0 FM(IP17_3_0) IP17_3_0 FM(IP18_3_0) IP18_3_0 \ +FM(IP16_7_4) IP16_7_4 FM(IP17_7_4) IP17_7_4 FM(IP18_7_4) IP18_7_4 \ +FM(IP16_11_8) IP16_11_8 FM(IP17_11_8) IP17_11_8 \ +FM(IP16_15_12) IP16_15_12 FM(IP17_15_12) IP17_15_12 \ +FM(IP16_19_16) IP16_19_16 FM(IP17_19_16) IP17_19_16 \ +FM(IP16_23_20) IP16_23_20 FM(IP17_23_20) IP17_23_20 \ +FM(IP16_27_24) IP16_27_24 FM(IP17_27_24) IP17_27_24 \ +FM(IP16_31_28) IP16_31_28 FM(IP17_31_28) IP17_31_28 + +/* MOD_SEL0 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ +#define MOD_SEL0_31_30_29 FM(SEL_MSIOF3_0) FM(SEL_MSIOF3_1) FM(SEL_MSIOF3_2) FM(SEL_MSIOF3_3) FM(SEL_MSIOF3_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL0_28_27 FM(SEL_MSIOF2_0) FM(SEL_MSIOF2_1) FM(SEL_MSIOF2_2) FM(SEL_MSIOF2_3) +#define MOD_SEL0_26_25_24 FM(SEL_MSIOF1_0) FM(SEL_MSIOF1_1) FM(SEL_MSIOF1_2) FM(SEL_MSIOF1_3) FM(SEL_MSIOF1_4) FM(SEL_MSIOF1_5) FM(SEL_MSIOF1_6) F_(0, 0) +#define MOD_SEL0_23 FM(SEL_LBSC_0) FM(SEL_LBSC_1) +#define MOD_SEL0_22 FM(SEL_IEBUS_0) FM(SEL_IEBUS_1) +#define MOD_SEL0_21 FM(SEL_I2C2_0) FM(SEL_I2C2_1) +#define MOD_SEL0_20 FM(SEL_I2C1_0) FM(SEL_I2C1_1) +#define MOD_SEL0_19 FM(SEL_HSCIF4_0) FM(SEL_HSCIF4_1) +#define MOD_SEL0_18_17 FM(SEL_HSCIF3_0) FM(SEL_HSCIF3_1) FM(SEL_HSCIF3_2) FM(SEL_HSCIF3_3) +#define MOD_SEL0_16 FM(SEL_HSCIF1_0) FM(SEL_HSCIF1_1) +#define MOD_SEL0_14_13 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) FM(SEL_HSCIF2_2) F_(0, 0) +#define MOD_SEL0_12 FM(SEL_ETHERAVB_0) FM(SEL_ETHERAVB_1) +#define MOD_SEL0_11 FM(SEL_DRIF3_0) FM(SEL_DRIF3_1) +#define MOD_SEL0_10 FM(SEL_DRIF2_0) FM(SEL_DRIF2_1) +#define MOD_SEL0_9_8 FM(SEL_DRIF1_0) FM(SEL_DRIF1_1) FM(SEL_DRIF1_2) F_(0, 0) +#define MOD_SEL0_7_6 FM(SEL_DRIF0_0) FM(SEL_DRIF0_1) FM(SEL_DRIF0_2) F_(0, 0) +#define MOD_SEL0_5 FM(SEL_CANFD0_0) FM(SEL_CANFD0_1) +#define MOD_SEL0_4_3 FM(SEL_ADG_A_0) FM(SEL_ADG_A_1) FM(SEL_ADG_A_2) FM(SEL_ADG_A_3) + +/* MOD_SEL1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ +#define MOD_SEL1_31_30 FM(SEL_TSIF1_0) FM(SEL_TSIF1_1) FM(SEL_TSIF1_2) FM(SEL_TSIF1_3) +#define MOD_SEL1_29_28_27 FM(SEL_TSIF0_0) FM(SEL_TSIF0_1) FM(SEL_TSIF0_2) FM(SEL_TSIF0_3) FM(SEL_TSIF0_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL1_26 FM(SEL_TIMER_TMU_0) FM(SEL_TIMER_TMU_1) +#define MOD_SEL1_25_24 FM(SEL_SSP1_1_0) FM(SEL_SSP1_1_1) FM(SEL_SSP1_1_2) FM(SEL_SSP1_1_3) +#define MOD_SEL1_23_22_21 FM(SEL_SSP1_0_0) FM(SEL_SSP1_0_1) FM(SEL_SSP1_0_2) FM(SEL_SSP1_0_3) FM(SEL_SSP1_0_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL1_20 FM(SEL_SSI_0) FM(SEL_SSI_1) +#define MOD_SEL1_19 FM(SEL_SPEED_PULSE_0) FM(SEL_SPEED_PULSE_1) +#define MOD_SEL1_18_17 FM(SEL_SIMCARD_0) FM(SEL_SIMCARD_1) FM(SEL_SIMCARD_2) FM(SEL_SIMCARD_3) +#define MOD_SEL1_16 FM(SEL_SDHI2_0) FM(SEL_SDHI2_1) +#define MOD_SEL1_15_14 FM(SEL_SCIF4_0) FM(SEL_SCIF4_1) FM(SEL_SCIF4_2) F_(0, 0) +#define MOD_SEL1_13 FM(SEL_SCIF3_0) FM(SEL_SCIF3_1) +#define MOD_SEL1_12 FM(SEL_SCIF2_0) FM(SEL_SCIF2_1) +#define MOD_SEL1_11 FM(SEL_SCIF1_0) FM(SEL_SCIF1_1) +#define MOD_SEL1_10 FM(SEL_SCIF_0) FM(SEL_SCIF_1) +#define MOD_SEL1_9 FM(SEL_REMOCON_0) FM(SEL_REMOCON_1) +#define MOD_SEL1_6 FM(SEL_RCAN0_0) FM(SEL_RCAN0_1) +#define MOD_SEL1_5 FM(SEL_PWM6_0) FM(SEL_PWM6_1) +#define MOD_SEL1_4 FM(SEL_PWM5_0) FM(SEL_PWM5_1) +#define MOD_SEL1_3 FM(SEL_PWM4_0) FM(SEL_PWM4_1) +#define MOD_SEL1_2 FM(SEL_PWM3_0) FM(SEL_PWM3_1) +#define MOD_SEL1_1 FM(SEL_PWM2_0) FM(SEL_PWM2_1) +#define MOD_SEL1_0 FM(SEL_PWM1_0) FM(SEL_PWM1_1) + +/* MOD_SEL1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ +#define MOD_SEL2_31 FM(I2C_SEL_5_0) FM(I2C_SEL_5_1) +#define MOD_SEL2_30 FM(I2C_SEL_3_0) FM(I2C_SEL_3_1) +#define MOD_SEL2_29 FM(I2C_SEL_0_0) FM(I2C_SEL_0_1) +#define MOD_SEL2_28_27 FM(SEL_FM_0) FM(SEL_FM_1) FM(SEL_FM_2) FM(SEL_FM_3) +#define MOD_SEL2_26 FM(SEL_SCIF5_0) FM(SEL_SCIF5_1) +#define MOD_SEL2_25_24_23 FM(SEL_I2C6_0) FM(SEL_I2C6_1) FM(SEL_I2C6_2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL2_22 FM(SEL_NDF_0) FM(SEL_NDF_1) +#define MOD_SEL2_21 FM(SEL_SSI2_0) FM(SEL_SSI2_1) +#define MOD_SEL2_20 FM(SEL_SSI9_0) FM(SEL_SSI9_1) +#define MOD_SEL2_19 FM(SEL_TIMER_TMU2_0) FM(SEL_TIMER_TMU2_1) +#define MOD_SEL2_18 FM(SEL_ADG_B_0) FM(SEL_ADG_B_1) +#define MOD_SEL2_17 FM(SEL_ADG_C_0) FM(SEL_ADG_C_1) +#define MOD_SEL2_0 FM(SEL_VIN4_0) FM(SEL_VIN4_1) + +#define PINMUX_MOD_SELS \ +\ +MOD_SEL0_31_30_29 MOD_SEL1_31_30 MOD_SEL2_31 \ + MOD_SEL2_30 \ + MOD_SEL1_29_28_27 MOD_SEL2_29 \ +MOD_SEL0_28_27 MOD_SEL2_28_27 \ +MOD_SEL0_26_25_24 MOD_SEL1_26 MOD_SEL2_26 \ + MOD_SEL1_25_24 MOD_SEL2_25_24_23 \ +MOD_SEL0_23 MOD_SEL1_23_22_21 \ +MOD_SEL0_22 MOD_SEL2_22 \ +MOD_SEL0_21 MOD_SEL2_21 \ +MOD_SEL0_20 MOD_SEL1_20 MOD_SEL2_20 \ +MOD_SEL0_19 MOD_SEL1_19 MOD_SEL2_19 \ +MOD_SEL0_18_17 MOD_SEL1_18_17 MOD_SEL2_18 \ + MOD_SEL2_17 \ +MOD_SEL0_16 MOD_SEL1_16 \ + MOD_SEL1_15_14 \ +MOD_SEL0_14_13 \ + MOD_SEL1_13 \ +MOD_SEL0_12 MOD_SEL1_12 \ +MOD_SEL0_11 MOD_SEL1_11 \ +MOD_SEL0_10 MOD_SEL1_10 \ +MOD_SEL0_9_8 MOD_SEL1_9 \ +MOD_SEL0_7_6 \ + MOD_SEL1_6 \ +MOD_SEL0_5 MOD_SEL1_5 \ +MOD_SEL0_4_3 MOD_SEL1_4 \ + MOD_SEL1_3 \ + MOD_SEL1_2 \ + MOD_SEL1_1 \ + MOD_SEL1_0 MOD_SEL2_0 + +/* + * These pins are not able to be muxed but have other properties + * that can be set, such as drive-strength or pull-up/pull-down enable. + */ +#define PINMUX_STATIC \ + FM(QSPI0_SPCLK) FM(QSPI0_SSL) FM(QSPI0_MOSI_IO0) FM(QSPI0_MISO_IO1) \ + FM(QSPI0_IO2) FM(QSPI0_IO3) \ + FM(QSPI1_SPCLK) FM(QSPI1_SSL) FM(QSPI1_MOSI_IO0) FM(QSPI1_MISO_IO1) \ + FM(QSPI1_IO2) FM(QSPI1_IO3) \ + FM(RPC_INT) FM(RPC_WP) FM(RPC_RESET) \ + FM(AVB_TX_CTL) FM(AVB_TXC) FM(AVB_TD0) FM(AVB_TD1) FM(AVB_TD2) FM(AVB_TD3) \ + FM(AVB_RX_CTL) FM(AVB_RXC) FM(AVB_RD0) FM(AVB_RD1) FM(AVB_RD2) FM(AVB_RD3) \ + FM(AVB_TXCREFCLK) FM(AVB_MDIO) \ + FM(PRESETOUT) \ + FM(DU_DOTCLKIN0) FM(DU_DOTCLKIN1) FM(DU_DOTCLKIN2) \ + FM(TMS) FM(TDO) FM(ASEBRK) FM(MLB_REF) FM(TDI) FM(TCK) FM(TRST) FM(EXTALR) + +enum { + PINMUX_RESERVED = 0, + + PINMUX_DATA_BEGIN, + GP_ALL(DATA), + PINMUX_DATA_END, + +#define F_(x, y) +#define FM(x) FN_##x, + PINMUX_FUNCTION_BEGIN, + GP_ALL(FN), + PINMUX_GPSR + PINMUX_IPSR + PINMUX_MOD_SELS + PINMUX_FUNCTION_END, +#undef F_ +#undef FM + +#define F_(x, y) +#define FM(x) x##_MARK, + PINMUX_MARK_BEGIN, + PINMUX_GPSR + PINMUX_IPSR + PINMUX_MOD_SELS + PINMUX_STATIC + PINMUX_MARK_END, +#undef F_ +#undef FM +}; + +static const u16 pinmux_data[] = { + PINMUX_DATA_GP_ALL(), + + PINMUX_SINGLE(AVS1), + PINMUX_SINGLE(AVS2), + PINMUX_SINGLE(CLKOUT), + PINMUX_SINGLE(GP7_03), + PINMUX_SINGLE(HDMI0_CEC), + PINMUX_SINGLE(MSIOF0_RXD), + PINMUX_SINGLE(MSIOF0_SCK), + PINMUX_SINGLE(MSIOF0_TXD), + PINMUX_SINGLE(SSI_SCK5), + PINMUX_SINGLE(SSI_SDATA5), + PINMUX_SINGLE(SSI_WS5), + + /* IPSR0 */ + PINMUX_IPSR_GPSR(IP0_3_0, AVB_MDC), + PINMUX_IPSR_MSEL(IP0_3_0, MSIOF2_SS2_C, SEL_MSIOF2_2), + + PINMUX_IPSR_GPSR(IP0_7_4, AVB_MAGIC), + PINMUX_IPSR_MSEL(IP0_7_4, MSIOF2_SS1_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_7_4, SCK4_A, SEL_SCIF4_0), + + PINMUX_IPSR_GPSR(IP0_11_8, AVB_PHY_INT), + PINMUX_IPSR_MSEL(IP0_11_8, MSIOF2_SYNC_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_11_8, RX4_A, SEL_SCIF4_0), + + PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK), + PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0), + + PINMUX_IPSR_MSEL(IP0_19_16, AVB_AVTP_MATCH_A, SEL_ETHERAVB_0), + PINMUX_IPSR_MSEL(IP0_19_16, MSIOF2_RXD_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_19_16, CTS4_N_A, SEL_SCIF4_0), + + PINMUX_IPSR_MSEL(IP0_23_20, AVB_AVTP_CAPTURE_A, SEL_ETHERAVB_0), + PINMUX_IPSR_MSEL(IP0_23_20, MSIOF2_TXD_C, SEL_MSIOF2_2), + PINMUX_IPSR_MSEL(IP0_23_20, RTS4_N_TANS_A, SEL_SCIF4_0), + + PINMUX_IPSR_GPSR(IP0_27_24, IRQ0), + PINMUX_IPSR_GPSR(IP0_27_24, QPOLB), + PINMUX_IPSR_GPSR(IP0_27_24, DU_CDE), + PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA0_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP0_27_24, CAN0_TX_B, SEL_RCAN0_1), + PINMUX_IPSR_MSEL(IP0_27_24, CANFD0_TX_B, SEL_CANFD0_1), + PINMUX_IPSR_MSEL(IP0_27_24, MSIOF3_SS2_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP0_31_28, IRQ1), + PINMUX_IPSR_GPSR(IP0_31_28, QPOLA), + PINMUX_IPSR_GPSR(IP0_31_28, DU_DISP), + PINMUX_IPSR_MSEL(IP0_31_28, VI4_DATA1_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP0_31_28, CAN0_RX_B, SEL_RCAN0_1), + PINMUX_IPSR_MSEL(IP0_31_28, CANFD0_RX_B, SEL_CANFD0_1), + PINMUX_IPSR_MSEL(IP0_31_28, MSIOF3_SS1_E, SEL_MSIOF3_4), + + /* IPSR1 */ + PINMUX_IPSR_GPSR(IP1_3_0, IRQ2), + PINMUX_IPSR_GPSR(IP1_3_0, QCPV_QDE), + PINMUX_IPSR_GPSR(IP1_3_0, DU_EXODDF_DU_ODDF_DISP_CDE), + PINMUX_IPSR_MSEL(IP1_3_0, VI4_DATA2_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_3_0, PWM3_B, SEL_PWM3_1), + PINMUX_IPSR_MSEL(IP1_3_0, MSIOF3_SYNC_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP1_7_4, IRQ3), + PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE), + PINMUX_IPSR_GPSR(IP1_7_4, A25), + PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1), + PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1), + PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP1_11_8, IRQ4), + PINMUX_IPSR_GPSR(IP1_11_8, QSTH_QHS), + PINMUX_IPSR_GPSR(IP1_11_8, A24), + PINMUX_IPSR_GPSR(IP1_11_8, DU_EXHSYNC_DU_HSYNC), + PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA4_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_11_8, PWM5_B, SEL_PWM5_1), + PINMUX_IPSR_MSEL(IP1_11_8, MSIOF3_RXD_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP1_15_12, IRQ5), + PINMUX_IPSR_GPSR(IP1_15_12, QSTB_QHE), + PINMUX_IPSR_GPSR(IP1_15_12, A23), + PINMUX_IPSR_GPSR(IP1_15_12, DU_EXVSYNC_DU_VSYNC), + PINMUX_IPSR_MSEL(IP1_15_12, VI4_DATA5_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_15_12, PWM6_B, SEL_PWM6_1), + PINMUX_IPSR_MSEL(IP1_15_12, MSIOF3_TXD_E, SEL_MSIOF3_4), + + PINMUX_IPSR_GPSR(IP1_19_16, PWM0), + PINMUX_IPSR_GPSR(IP1_19_16, AVB_AVTP_PPS), + PINMUX_IPSR_GPSR(IP1_19_16, A22), + PINMUX_IPSR_MSEL(IP1_19_16, VI4_DATA6_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_19_16, IECLK_B, SEL_IEBUS_1), + + PINMUX_IPSR_MSEL(IP1_23_20, PWM1_A, SEL_PWM1_0), + PINMUX_IPSR_GPSR(IP1_23_20, A21), + PINMUX_IPSR_MSEL(IP1_23_20, HRX3_D, SEL_HSCIF3_3), + PINMUX_IPSR_MSEL(IP1_23_20, VI4_DATA7_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP1_23_20, IERX_B, SEL_IEBUS_1), + + PINMUX_IPSR_MSEL(IP1_27_24, PWM2_A, SEL_PWM2_0), + PINMUX_IPSR_GPSR(IP1_27_24, A20), + PINMUX_IPSR_MSEL(IP1_27_24, HTX3_D, SEL_HSCIF3_3), + PINMUX_IPSR_MSEL(IP1_27_24, IETX_B, SEL_IEBUS_1), + + PINMUX_IPSR_GPSR(IP1_31_28, A0), + PINMUX_IPSR_GPSR(IP1_31_28, LCDOUT16), + PINMUX_IPSR_MSEL(IP1_31_28, MSIOF3_SYNC_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP1_31_28, VI4_DATA8), + PINMUX_IPSR_GPSR(IP1_31_28, DU_DB0), + PINMUX_IPSR_MSEL(IP1_31_28, PWM3_A, SEL_PWM3_0), + + /* IPSR2 */ + PINMUX_IPSR_GPSR(IP2_3_0, A1), + PINMUX_IPSR_GPSR(IP2_3_0, LCDOUT17), + PINMUX_IPSR_MSEL(IP2_3_0, MSIOF3_TXD_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP2_3_0, VI4_DATA9), + PINMUX_IPSR_GPSR(IP2_3_0, DU_DB1), + PINMUX_IPSR_MSEL(IP2_3_0, PWM4_A, SEL_PWM4_0), + + PINMUX_IPSR_GPSR(IP2_7_4, A2), + PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18), + PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10), + PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2), + PINMUX_IPSR_MSEL(IP2_7_4, PWM5_A, SEL_PWM5_0), + + PINMUX_IPSR_GPSR(IP2_11_8, A3), + PINMUX_IPSR_GPSR(IP2_11_8, LCDOUT19), + PINMUX_IPSR_MSEL(IP2_11_8, MSIOF3_RXD_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP2_11_8, VI4_DATA11), + PINMUX_IPSR_GPSR(IP2_11_8, DU_DB3), + PINMUX_IPSR_MSEL(IP2_11_8, PWM6_A, SEL_PWM6_0), + + PINMUX_IPSR_GPSR(IP2_15_12, A4), + PINMUX_IPSR_GPSR(IP2_15_12, LCDOUT20), + PINMUX_IPSR_MSEL(IP2_15_12, MSIOF3_SS1_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP2_15_12, VI4_DATA12), + PINMUX_IPSR_GPSR(IP2_15_12, VI5_DATA12), + PINMUX_IPSR_GPSR(IP2_15_12, DU_DB4), + + PINMUX_IPSR_GPSR(IP2_19_16, A5), + PINMUX_IPSR_GPSR(IP2_19_16, LCDOUT21), + PINMUX_IPSR_MSEL(IP2_19_16, MSIOF3_SS2_B, SEL_MSIOF3_1), + PINMUX_IPSR_MSEL(IP2_19_16, SCK4_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP2_19_16, VI4_DATA13), + PINMUX_IPSR_GPSR(IP2_19_16, VI5_DATA13), + PINMUX_IPSR_GPSR(IP2_19_16, DU_DB5), + + PINMUX_IPSR_GPSR(IP2_23_20, A6), + PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22), + PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14), + PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA14), + PINMUX_IPSR_GPSR(IP2_23_20, DU_DB6), + + PINMUX_IPSR_GPSR(IP2_27_24, A7), + PINMUX_IPSR_GPSR(IP2_27_24, LCDOUT23), + PINMUX_IPSR_MSEL(IP2_27_24, MSIOF2_SS2_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP2_27_24, TX4_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP2_27_24, VI4_DATA15), + PINMUX_IPSR_GPSR(IP2_27_24, VI5_DATA15), + PINMUX_IPSR_GPSR(IP2_27_24, DU_DB7), + + PINMUX_IPSR_GPSR(IP2_31_28, A8), + PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), + PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), + PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), + PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), + PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), + + /* IPSR3 */ + PINMUX_IPSR_GPSR(IP3_3_0, A9), + PINMUX_IPSR_MSEL(IP3_3_0, MSIOF2_SCK_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP3_3_0, CTS4_N_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP3_3_0, VI5_VSYNC_N), + + PINMUX_IPSR_GPSR(IP3_7_4, A10), + PINMUX_IPSR_MSEL(IP3_7_4, MSIOF2_RXD_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP3_7_4, RTS4_N_TANS_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP3_7_4, VI5_HSYNC_N), + + PINMUX_IPSR_GPSR(IP3_11_8, A11), + PINMUX_IPSR_MSEL(IP3_11_8, TX3_B, SEL_SCIF3_1), + PINMUX_IPSR_MSEL(IP3_11_8, MSIOF2_TXD_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP3_11_8, HTX4_B, SEL_HSCIF4_1), + PINMUX_IPSR_GPSR(IP3_11_8, HSCK4), + PINMUX_IPSR_GPSR(IP3_11_8, VI5_FIELD), + PINMUX_IPSR_MSEL(IP3_11_8, SCL6_A, SEL_I2C6_0), + PINMUX_IPSR_MSEL(IP3_11_8, AVB_AVTP_CAPTURE_B, SEL_ETHERAVB_1), + PINMUX_IPSR_MSEL(IP3_11_8, PWM2_B, SEL_PWM2_1), + + PINMUX_IPSR_GPSR(IP3_15_12, A12), + PINMUX_IPSR_GPSR(IP3_15_12, LCDOUT12), + PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SCK_C, SEL_MSIOF3_2), + PINMUX_IPSR_MSEL(IP3_15_12, HRX4_A, SEL_HSCIF4_0), + PINMUX_IPSR_GPSR(IP3_15_12, VI5_DATA8), + PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4), + + PINMUX_IPSR_GPSR(IP3_19_16, A13), + PINMUX_IPSR_GPSR(IP3_19_16, LCDOUT13), + PINMUX_IPSR_MSEL(IP3_19_16, MSIOF3_SYNC_C, SEL_MSIOF3_2), + PINMUX_IPSR_MSEL(IP3_19_16, HTX4_A, SEL_HSCIF4_0), + PINMUX_IPSR_GPSR(IP3_19_16, VI5_DATA9), + PINMUX_IPSR_GPSR(IP3_19_16, DU_DG5), + + PINMUX_IPSR_GPSR(IP3_23_20, A14), + PINMUX_IPSR_GPSR(IP3_23_20, LCDOUT14), + PINMUX_IPSR_MSEL(IP3_23_20, MSIOF3_RXD_C, SEL_MSIOF3_2), + PINMUX_IPSR_GPSR(IP3_23_20, HCTS4_N), + PINMUX_IPSR_GPSR(IP3_23_20, VI5_DATA10), + PINMUX_IPSR_GPSR(IP3_23_20, DU_DG6), + + PINMUX_IPSR_GPSR(IP3_27_24, A15), + PINMUX_IPSR_GPSR(IP3_27_24, LCDOUT15), + PINMUX_IPSR_MSEL(IP3_27_24, MSIOF3_TXD_C, SEL_MSIOF3_2), + PINMUX_IPSR_GPSR(IP3_27_24, HRTS4_N), + PINMUX_IPSR_GPSR(IP3_27_24, VI5_DATA11), + PINMUX_IPSR_GPSR(IP3_27_24, DU_DG7), + + PINMUX_IPSR_GPSR(IP3_31_28, A16), + PINMUX_IPSR_GPSR(IP3_31_28, LCDOUT8), + PINMUX_IPSR_GPSR(IP3_31_28, VI4_FIELD), + PINMUX_IPSR_GPSR(IP3_31_28, DU_DG0), + + /* IPSR4 */ + PINMUX_IPSR_GPSR(IP4_3_0, A17), + PINMUX_IPSR_GPSR(IP4_3_0, LCDOUT9), + PINMUX_IPSR_GPSR(IP4_3_0, VI4_VSYNC_N), + PINMUX_IPSR_GPSR(IP4_3_0, DU_DG1), + + PINMUX_IPSR_GPSR(IP4_7_4, A18), + PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10), + PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N), + PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2), + + PINMUX_IPSR_GPSR(IP4_11_8, A19), + PINMUX_IPSR_GPSR(IP4_11_8, LCDOUT11), + PINMUX_IPSR_GPSR(IP4_11_8, VI4_CLKENB), + PINMUX_IPSR_GPSR(IP4_11_8, DU_DG3), + + PINMUX_IPSR_GPSR(IP4_15_12, CS0_N), + PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB), + + PINMUX_IPSR_GPSR(IP4_19_16, CS1_N), + PINMUX_IPSR_GPSR(IP4_19_16, VI5_CLK), + PINMUX_IPSR_MSEL(IP4_19_16, EX_WAIT0_B, SEL_LBSC_1), + + PINMUX_IPSR_GPSR(IP4_23_20, BS_N), + PINMUX_IPSR_GPSR(IP4_23_20, QSTVA_QVS), + PINMUX_IPSR_MSEL(IP4_23_20, MSIOF3_SCK_D, SEL_MSIOF3_3), + PINMUX_IPSR_GPSR(IP4_23_20, SCK3), + PINMUX_IPSR_GPSR(IP4_23_20, HSCK3), + PINMUX_IPSR_GPSR(IP4_23_20, CAN1_TX), + PINMUX_IPSR_GPSR(IP4_23_20, CANFD1_TX), + PINMUX_IPSR_MSEL(IP4_23_20, IETX_A, SEL_IEBUS_0), + + PINMUX_IPSR_GPSR(IP4_27_24, RD_N), + PINMUX_IPSR_MSEL(IP4_27_24, MSIOF3_SYNC_D, SEL_MSIOF3_3), + PINMUX_IPSR_MSEL(IP4_27_24, RX3_A, SEL_SCIF3_0), + PINMUX_IPSR_MSEL(IP4_27_24, HRX3_A, SEL_HSCIF3_0), + PINMUX_IPSR_MSEL(IP4_27_24, CAN0_TX_A, SEL_RCAN0_0), + PINMUX_IPSR_MSEL(IP4_27_24, CANFD0_TX_A, SEL_CANFD0_0), + + PINMUX_IPSR_GPSR(IP4_31_28, RD_WR_N), + PINMUX_IPSR_MSEL(IP4_31_28, MSIOF3_RXD_D, SEL_MSIOF3_3), + PINMUX_IPSR_MSEL(IP4_31_28, TX3_A, SEL_SCIF3_0), + PINMUX_IPSR_MSEL(IP4_31_28, HTX3_A, SEL_HSCIF3_0), + PINMUX_IPSR_MSEL(IP4_31_28, CAN0_RX_A, SEL_RCAN0_0), + PINMUX_IPSR_MSEL(IP4_31_28, CANFD0_RX_A, SEL_CANFD0_0), + + /* IPSR5 */ + PINMUX_IPSR_GPSR(IP5_3_0, WE0_N), + PINMUX_IPSR_MSEL(IP5_3_0, MSIOF3_TXD_D, SEL_MSIOF3_3), + PINMUX_IPSR_GPSR(IP5_3_0, CTS3_N), + PINMUX_IPSR_GPSR(IP5_3_0, HCTS3_N), + PINMUX_IPSR_MSEL(IP5_3_0, SCL6_B, SEL_I2C6_1), + PINMUX_IPSR_GPSR(IP5_3_0, CAN_CLK), + PINMUX_IPSR_MSEL(IP5_3_0, IECLK_A, SEL_IEBUS_0), + + PINMUX_IPSR_GPSR(IP5_7_4, WE1_N), + PINMUX_IPSR_MSEL(IP5_7_4, MSIOF3_SS1_D, SEL_MSIOF3_3), + PINMUX_IPSR_GPSR(IP5_7_4, RTS3_N_TANS), + PINMUX_IPSR_GPSR(IP5_7_4, HRTS3_N), + PINMUX_IPSR_MSEL(IP5_7_4, SDA6_B, SEL_I2C6_1), + PINMUX_IPSR_GPSR(IP5_7_4, CAN1_RX), + PINMUX_IPSR_GPSR(IP5_7_4, CANFD1_RX), + PINMUX_IPSR_MSEL(IP5_7_4, IERX_A, SEL_IEBUS_0), + + PINMUX_IPSR_MSEL(IP5_11_8, EX_WAIT0_A, SEL_LBSC_0), + PINMUX_IPSR_GPSR(IP5_11_8, QCLK), + PINMUX_IPSR_GPSR(IP5_11_8, VI4_CLK), + PINMUX_IPSR_GPSR(IP5_11_8, DU_DOTCLKOUT0), + + PINMUX_IPSR_GPSR(IP5_15_12, D0), + PINMUX_IPSR_MSEL(IP5_15_12, MSIOF2_SS1_B, SEL_MSIOF2_1), + PINMUX_IPSR_MSEL(IP5_15_12, MSIOF3_SCK_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_15_12, VI4_DATA16), + PINMUX_IPSR_GPSR(IP5_15_12, VI5_DATA0), + + PINMUX_IPSR_GPSR(IP5_19_16, D1), + PINMUX_IPSR_MSEL(IP5_19_16, MSIOF2_SS2_B, SEL_MSIOF2_1), + PINMUX_IPSR_MSEL(IP5_19_16, MSIOF3_SYNC_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_19_16, VI4_DATA17), + PINMUX_IPSR_GPSR(IP5_19_16, VI5_DATA1), + + PINMUX_IPSR_GPSR(IP5_23_20, D2), + PINMUX_IPSR_MSEL(IP5_23_20, MSIOF3_RXD_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_23_20, VI4_DATA18), + PINMUX_IPSR_GPSR(IP5_23_20, VI5_DATA2), + + PINMUX_IPSR_GPSR(IP5_27_24, D3), + PINMUX_IPSR_MSEL(IP5_27_24, MSIOF3_TXD_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_27_24, VI4_DATA19), + PINMUX_IPSR_GPSR(IP5_27_24, VI5_DATA3), + + PINMUX_IPSR_GPSR(IP5_31_28, D4), + PINMUX_IPSR_MSEL(IP5_31_28, MSIOF2_SCK_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP5_31_28, VI4_DATA20), + PINMUX_IPSR_GPSR(IP5_31_28, VI5_DATA4), + + /* IPSR6 */ + PINMUX_IPSR_GPSR(IP6_3_0, D5), + PINMUX_IPSR_MSEL(IP6_3_0, MSIOF2_SYNC_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP6_3_0, VI4_DATA21), + PINMUX_IPSR_GPSR(IP6_3_0, VI5_DATA5), + + PINMUX_IPSR_GPSR(IP6_7_4, D6), + PINMUX_IPSR_MSEL(IP6_7_4, MSIOF2_RXD_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP6_7_4, VI4_DATA22), + PINMUX_IPSR_GPSR(IP6_7_4, VI5_DATA6), + + PINMUX_IPSR_GPSR(IP6_11_8, D7), + PINMUX_IPSR_MSEL(IP6_11_8, MSIOF2_TXD_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP6_11_8, VI4_DATA23), + PINMUX_IPSR_GPSR(IP6_11_8, VI5_DATA7), + + PINMUX_IPSR_GPSR(IP6_15_12, D8), + PINMUX_IPSR_GPSR(IP6_15_12, LCDOUT0), + PINMUX_IPSR_MSEL(IP6_15_12, MSIOF2_SCK_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_15_12, SCK4_C, SEL_SCIF4_2), + PINMUX_IPSR_MSEL(IP6_15_12, VI4_DATA0_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP6_15_12, DU_DR0), + + PINMUX_IPSR_GPSR(IP6_19_16, D9), + PINMUX_IPSR_GPSR(IP6_19_16, LCDOUT1), + PINMUX_IPSR_MSEL(IP6_19_16, MSIOF2_SYNC_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_19_16, VI4_DATA1_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP6_19_16, DU_DR1), + + PINMUX_IPSR_GPSR(IP6_23_20, D10), + PINMUX_IPSR_GPSR(IP6_23_20, LCDOUT2), + PINMUX_IPSR_MSEL(IP6_23_20, MSIOF2_RXD_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_23_20, HRX3_B, SEL_HSCIF3_1), + PINMUX_IPSR_MSEL(IP6_23_20, VI4_DATA2_A, SEL_VIN4_0), + PINMUX_IPSR_MSEL(IP6_23_20, CTS4_N_C, SEL_SCIF4_2), + PINMUX_IPSR_GPSR(IP6_23_20, DU_DR2), + + PINMUX_IPSR_GPSR(IP6_27_24, D11), + PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT3), + PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_TXD_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_27_24, HTX3_B, SEL_HSCIF3_1), + PINMUX_IPSR_MSEL(IP6_27_24, VI4_DATA3_A, SEL_VIN4_0), + PINMUX_IPSR_MSEL(IP6_27_24, RTS4_N_TANS_C, SEL_SCIF4_2), + PINMUX_IPSR_GPSR(IP6_27_24, DU_DR3), + + PINMUX_IPSR_GPSR(IP6_31_28, D12), + PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT4), + PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_SS1_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP6_31_28, RX4_C, SEL_SCIF4_2), + PINMUX_IPSR_MSEL(IP6_31_28, VI4_DATA4_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP6_31_28, DU_DR4), + + /* IPSR7 */ + PINMUX_IPSR_GPSR(IP7_3_0, D13), + PINMUX_IPSR_GPSR(IP7_3_0, LCDOUT5), + PINMUX_IPSR_MSEL(IP7_3_0, MSIOF2_SS2_D, SEL_MSIOF2_3), + PINMUX_IPSR_MSEL(IP7_3_0, TX4_C, SEL_SCIF4_2), + PINMUX_IPSR_MSEL(IP7_3_0, VI4_DATA5_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP7_3_0, DU_DR5), + + PINMUX_IPSR_GPSR(IP7_7_4, D14), + PINMUX_IPSR_GPSR(IP7_7_4, LCDOUT6), + PINMUX_IPSR_MSEL(IP7_7_4, MSIOF3_SS1_A, SEL_MSIOF3_0), + PINMUX_IPSR_MSEL(IP7_7_4, HRX3_C, SEL_HSCIF3_2), + PINMUX_IPSR_MSEL(IP7_7_4, VI4_DATA6_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP7_7_4, DU_DR6), + PINMUX_IPSR_MSEL(IP7_7_4, SCL6_C, SEL_I2C6_2), + + PINMUX_IPSR_GPSR(IP7_11_8, D15), + PINMUX_IPSR_GPSR(IP7_11_8, LCDOUT7), + PINMUX_IPSR_MSEL(IP7_11_8, MSIOF3_SS2_A, SEL_MSIOF3_0), + PINMUX_IPSR_MSEL(IP7_11_8, HTX3_C, SEL_HSCIF3_2), + PINMUX_IPSR_MSEL(IP7_11_8, VI4_DATA7_A, SEL_VIN4_0), + PINMUX_IPSR_GPSR(IP7_11_8, DU_DR7), + PINMUX_IPSR_MSEL(IP7_11_8, SDA6_C, SEL_I2C6_2), + + PINMUX_IPSR_GPSR(IP7_19_16, SD0_CLK), + PINMUX_IPSR_MSEL(IP7_19_16, MSIOF1_SCK_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP7_19_16, STP_OPWM_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP7_23_20, SD0_CMD), + PINMUX_IPSR_MSEL(IP7_23_20, MSIOF1_SYNC_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP7_23_20, STP_IVCXO27_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP7_27_24, SD0_DAT0), + PINMUX_IPSR_MSEL(IP7_27_24, MSIOF1_RXD_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP7_27_24, TS_SCK0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP7_27_24, STP_ISCLK_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP7_31_28, SD0_DAT1), + PINMUX_IPSR_MSEL(IP7_31_28, MSIOF1_TXD_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP7_31_28, TS_SPSYNC0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP7_31_28, STP_ISSYNC_0_B, SEL_SSP1_0_1), + + /* IPSR8 */ + PINMUX_IPSR_GPSR(IP8_3_0, SD0_DAT2), + PINMUX_IPSR_MSEL(IP8_3_0, MSIOF1_SS1_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP8_3_0, TS_SDAT0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP8_3_0, STP_ISD_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP8_7_4, SD0_DAT3), + PINMUX_IPSR_MSEL(IP8_7_4, MSIOF1_SS2_E, SEL_MSIOF1_4), + PINMUX_IPSR_MSEL(IP8_7_4, TS_SDEN0_B, SEL_TSIF0_1), + PINMUX_IPSR_MSEL(IP8_7_4, STP_ISEN_0_B, SEL_SSP1_0_1), + + PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK), + PINMUX_IPSR_MSEL(IP8_11_8, MSIOF1_SCK_G, SEL_MSIOF1_6), + PINMUX_IPSR_MSEL(IP8_11_8, SIM0_CLK_A, SEL_SIMCARD_0), + + PINMUX_IPSR_GPSR(IP8_15_12, SD1_CMD), + PINMUX_IPSR_MSEL(IP8_15_12, MSIOF1_SYNC_G, SEL_MSIOF1_6), + PINMUX_IPSR_MSEL(IP8_15_12, NFCE_N_B, SEL_NDF_1), + PINMUX_IPSR_MSEL(IP8_15_12, SIM0_D_A, SEL_SIMCARD_0), + PINMUX_IPSR_MSEL(IP8_15_12, STP_IVCXO27_1_B, SEL_SSP1_1_1), + + PINMUX_IPSR_GPSR(IP8_19_16, SD1_DAT0), + PINMUX_IPSR_GPSR(IP8_19_16, SD2_DAT4), + PINMUX_IPSR_MSEL(IP8_19_16, MSIOF1_RXD_G, SEL_MSIOF1_6), + PINMUX_IPSR_MSEL(IP8_19_16, NFWP_N_B, SEL_NDF_1), + PINMUX_IPSR_MSEL(IP8_19_16, TS_SCK1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP8_19_16, STP_ISCLK_1_B, SEL_SSP1_1_1), + + PINMUX_IPSR_GPSR(IP8_23_20, SD1_DAT1), + PINMUX_IPSR_GPSR(IP8_23_20, SD2_DAT5), + PINMUX_IPSR_MSEL(IP8_23_20, MSIOF1_TXD_G, SEL_MSIOF1_6), + PINMUX_IPSR_MSEL(IP8_23_20, NFDATA14_B, SEL_NDF_1), + PINMUX_IPSR_MSEL(IP8_23_20, TS_SPSYNC1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP8_23_20, STP_ISSYNC_1_B, SEL_SSP1_1_1), + + PINMUX_IPSR_GPSR(IP8_27_24, SD1_DAT2), + PINMUX_IPSR_GPSR(IP8_27_24, SD2_DAT6), + PINMUX_IPSR_MSEL(IP8_27_24, MSIOF1_SS1_G, SEL_MSIOF1_6), + PINMUX_IPSR_MSEL(IP8_27_24, NFDATA15_B, SEL_NDF_1), + PINMUX_IPSR_MSEL(IP8_27_24, TS_SDAT1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP8_27_24, STP_ISD_1_B, SEL_SSP1_1_1), + + PINMUX_IPSR_GPSR(IP8_31_28, SD1_DAT3), + PINMUX_IPSR_GPSR(IP8_31_28, SD2_DAT7), + PINMUX_IPSR_MSEL(IP8_31_28, MSIOF1_SS2_G, SEL_MSIOF1_6), + PINMUX_IPSR_MSEL(IP8_31_28, NFRB_N_B, SEL_NDF_1), + PINMUX_IPSR_MSEL(IP8_31_28, TS_SDEN1_B, SEL_TSIF1_1), + PINMUX_IPSR_MSEL(IP8_31_28, STP_ISEN_1_B, SEL_SSP1_1_1), + + /* IPSR9 */ + PINMUX_IPSR_GPSR(IP9_3_0, SD2_CLK), + PINMUX_IPSR_GPSR(IP9_3_0, NFDATA8), + + PINMUX_IPSR_GPSR(IP9_7_4, SD2_CMD), + PINMUX_IPSR_GPSR(IP9_7_4, NFDATA9), + + PINMUX_IPSR_GPSR(IP9_11_8, SD2_DAT0), + PINMUX_IPSR_GPSR(IP9_11_8, NFDATA10), + + PINMUX_IPSR_GPSR(IP9_15_12, SD2_DAT1), + PINMUX_IPSR_GPSR(IP9_15_12, NFDATA11), + + PINMUX_IPSR_GPSR(IP9_19_16, SD2_DAT2), + PINMUX_IPSR_GPSR(IP9_19_16, NFDATA12), + + PINMUX_IPSR_GPSR(IP9_23_20, SD2_DAT3), + PINMUX_IPSR_GPSR(IP9_23_20, NFDATA13), + + PINMUX_IPSR_GPSR(IP9_27_24, SD2_DS), + PINMUX_IPSR_GPSR(IP9_27_24, NFALE), + + PINMUX_IPSR_GPSR(IP9_31_28, SD3_CLK), + PINMUX_IPSR_GPSR(IP9_31_28, NFWE_N), + + /* IPSR10 */ + PINMUX_IPSR_GPSR(IP10_3_0, SD3_CMD), + PINMUX_IPSR_GPSR(IP10_3_0, NFRE_N), + + PINMUX_IPSR_GPSR(IP10_7_4, SD3_DAT0), + PINMUX_IPSR_GPSR(IP10_7_4, NFDATA0), + + PINMUX_IPSR_GPSR(IP10_11_8, SD3_DAT1), + PINMUX_IPSR_GPSR(IP10_11_8, NFDATA1), + + PINMUX_IPSR_GPSR(IP10_15_12, SD3_DAT2), + PINMUX_IPSR_GPSR(IP10_15_12, NFDATA2), + + PINMUX_IPSR_GPSR(IP10_19_16, SD3_DAT3), + PINMUX_IPSR_GPSR(IP10_19_16, NFDATA3), + + PINMUX_IPSR_GPSR(IP10_23_20, SD3_DAT4), + PINMUX_IPSR_MSEL(IP10_23_20, SD2_CD_A, SEL_SDHI2_0), + PINMUX_IPSR_GPSR(IP10_23_20, NFDATA4), + + PINMUX_IPSR_GPSR(IP10_27_24, SD3_DAT5), + PINMUX_IPSR_MSEL(IP10_27_24, SD2_WP_A, SEL_SDHI2_0), + PINMUX_IPSR_GPSR(IP10_27_24, NFDATA5), + + PINMUX_IPSR_GPSR(IP10_31_28, SD3_DAT6), + PINMUX_IPSR_GPSR(IP10_31_28, SD3_CD), + PINMUX_IPSR_GPSR(IP10_31_28, NFDATA6), + + /* IPSR11 */ + PINMUX_IPSR_GPSR(IP11_3_0, SD3_DAT7), + PINMUX_IPSR_GPSR(IP11_3_0, SD3_WP), + PINMUX_IPSR_GPSR(IP11_3_0, NFDATA7), + + PINMUX_IPSR_GPSR(IP11_7_4, SD3_DS), + PINMUX_IPSR_GPSR(IP11_7_4, NFCLE), + + PINMUX_IPSR_GPSR(IP11_11_8, SD0_CD), + PINMUX_IPSR_MSEL(IP11_11_8, SCL2_B, SEL_I2C2_1), + PINMUX_IPSR_MSEL(IP11_11_8, SIM0_RST_A, SEL_SIMCARD_0), + + PINMUX_IPSR_GPSR(IP11_15_12, SD0_WP), + PINMUX_IPSR_MSEL(IP11_15_12, SDA2_B, SEL_I2C2_1), + + PINMUX_IPSR_GPSR(IP11_19_16, SD1_CD), + PINMUX_IPSR_MSEL(IP11_19_16, SIM0_CLK_B, SEL_SIMCARD_1), + + PINMUX_IPSR_GPSR(IP11_23_20, SD1_WP), + PINMUX_IPSR_MSEL(IP11_23_20, SIM0_D_B, SEL_SIMCARD_1), + + PINMUX_IPSR_GPSR(IP11_27_24, SCK0), + PINMUX_IPSR_MSEL(IP11_27_24, HSCK1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP11_27_24, MSIOF1_SS2_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP11_27_24, AUDIO_CLKC_B, SEL_ADG_C_1), + PINMUX_IPSR_MSEL(IP11_27_24, SDA2_A, SEL_I2C2_0), + PINMUX_IPSR_MSEL(IP11_27_24, SIM0_RST_B, SEL_SIMCARD_1), + PINMUX_IPSR_MSEL(IP11_27_24, STP_OPWM_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP11_27_24, RIF0_CLK_B, SEL_DRIF0_1), + PINMUX_IPSR_GPSR(IP11_27_24, ADICHS2), + PINMUX_IPSR_MSEL(IP11_27_24, SCK5_B, SEL_SCIF5_1), + + PINMUX_IPSR_GPSR(IP11_31_28, RX0), + PINMUX_IPSR_MSEL(IP11_31_28, HRX1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP11_31_28, TS_SCK0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP11_31_28, STP_ISCLK_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP11_31_28, RIF0_D0_B, SEL_DRIF0_1), + + /* IPSR12 */ + PINMUX_IPSR_GPSR(IP12_3_0, TX0), + PINMUX_IPSR_MSEL(IP12_3_0, HTX1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP12_3_0, TS_SPSYNC0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP12_3_0, STP_ISSYNC_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP12_3_0, RIF0_D1_B, SEL_DRIF0_1), + + PINMUX_IPSR_GPSR(IP12_7_4, CTS0_N), + PINMUX_IPSR_MSEL(IP12_7_4, HCTS1_N_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP12_7_4, MSIOF1_SYNC_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_7_4, TS_SPSYNC1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP12_7_4, STP_ISSYNC_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_7_4, RIF1_SYNC_B, SEL_DRIF1_1), + PINMUX_IPSR_GPSR(IP12_7_4, AUDIO_CLKOUT_C), + PINMUX_IPSR_GPSR(IP12_7_4, ADICS_SAMP), + + PINMUX_IPSR_GPSR(IP12_11_8, RTS0_N_TANS), + PINMUX_IPSR_MSEL(IP12_11_8, HRTS1_N_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP12_11_8, MSIOF1_SS1_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_11_8, AUDIO_CLKA_B, SEL_ADG_A_1), + PINMUX_IPSR_MSEL(IP12_11_8, SCL2_A, SEL_I2C2_0), + PINMUX_IPSR_MSEL(IP12_11_8, STP_IVCXO27_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_11_8, RIF0_SYNC_B, SEL_DRIF0_1), + PINMUX_IPSR_GPSR(IP12_11_8, ADICHS1), + + PINMUX_IPSR_MSEL(IP12_15_12, RX1_A, SEL_SCIF1_0), + PINMUX_IPSR_MSEL(IP12_15_12, HRX1_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP12_15_12, TS_SDAT0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP12_15_12, STP_ISD_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP12_15_12, RIF1_CLK_C, SEL_DRIF1_2), + + PINMUX_IPSR_MSEL(IP12_19_16, TX1_A, SEL_SCIF1_0), + PINMUX_IPSR_MSEL(IP12_19_16, HTX1_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP12_19_16, TS_SDEN0_C, SEL_TSIF0_2), + PINMUX_IPSR_MSEL(IP12_19_16, STP_ISEN_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_MSEL(IP12_19_16, RIF1_D0_C, SEL_DRIF1_2), + + PINMUX_IPSR_GPSR(IP12_23_20, CTS1_N), + PINMUX_IPSR_MSEL(IP12_23_20, HCTS1_N_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP12_23_20, MSIOF1_RXD_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_23_20, TS_SDEN1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP12_23_20, STP_ISEN_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_23_20, RIF1_D0_B, SEL_DRIF1_1), + PINMUX_IPSR_GPSR(IP12_23_20, ADIDATA), + + PINMUX_IPSR_GPSR(IP12_27_24, RTS1_N_TANS), + PINMUX_IPSR_MSEL(IP12_27_24, HRTS1_N_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP12_27_24, MSIOF1_TXD_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_27_24, TS_SDAT1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP12_27_24, STP_ISD_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_27_24, RIF1_D1_B, SEL_DRIF1_1), + PINMUX_IPSR_GPSR(IP12_27_24, ADICHS0), + + PINMUX_IPSR_GPSR(IP12_31_28, SCK2), + PINMUX_IPSR_MSEL(IP12_31_28, SCIF_CLK_B, SEL_SCIF_1), + PINMUX_IPSR_MSEL(IP12_31_28, MSIOF1_SCK_B, SEL_MSIOF1_1), + PINMUX_IPSR_MSEL(IP12_31_28, TS_SCK1_C, SEL_TSIF1_2), + PINMUX_IPSR_MSEL(IP12_31_28, STP_ISCLK_1_C, SEL_SSP1_1_2), + PINMUX_IPSR_MSEL(IP12_31_28, RIF1_CLK_B, SEL_DRIF1_1), + PINMUX_IPSR_GPSR(IP12_31_28, ADICLK), + + /* IPSR13 */ + PINMUX_IPSR_MSEL(IP13_3_0, TX2_A, SEL_SCIF2_0), + PINMUX_IPSR_MSEL(IP13_3_0, SD2_CD_B, SEL_SDHI2_1), + PINMUX_IPSR_MSEL(IP13_3_0, SCL1_A, SEL_I2C1_0), + PINMUX_IPSR_MSEL(IP13_3_0, FMCLK_A, SEL_FM_0), + PINMUX_IPSR_MSEL(IP13_3_0, RIF1_D1_C, SEL_DRIF1_2), + PINMUX_IPSR_GPSR(IP13_3_0, FSO_CFE_0_N), + + PINMUX_IPSR_MSEL(IP13_7_4, RX2_A, SEL_SCIF2_0), + PINMUX_IPSR_MSEL(IP13_7_4, SD2_WP_B, SEL_SDHI2_1), + PINMUX_IPSR_MSEL(IP13_7_4, SDA1_A, SEL_I2C1_0), + PINMUX_IPSR_MSEL(IP13_7_4, FMIN_A, SEL_FM_0), + PINMUX_IPSR_MSEL(IP13_7_4, RIF1_SYNC_C, SEL_DRIF1_2), + PINMUX_IPSR_GPSR(IP13_7_4, FSO_CFE_1_N), + + PINMUX_IPSR_GPSR(IP13_11_8, HSCK0), + PINMUX_IPSR_MSEL(IP13_11_8, MSIOF1_SCK_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_11_8, AUDIO_CLKB_A, SEL_ADG_B_0), + PINMUX_IPSR_MSEL(IP13_11_8, SSI_SDATA1_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP13_11_8, TS_SCK0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP13_11_8, STP_ISCLK_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_11_8, RIF0_CLK_C, SEL_DRIF0_2), + PINMUX_IPSR_MSEL(IP13_11_8, RX5_B, SEL_SCIF5_1), + + PINMUX_IPSR_GPSR(IP13_15_12, HRX0), + PINMUX_IPSR_MSEL(IP13_15_12, MSIOF1_RXD_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_15_12, SSI_SDATA2_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP13_15_12, TS_SDEN0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP13_15_12, STP_ISEN_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_15_12, RIF0_D0_C, SEL_DRIF0_2), + + PINMUX_IPSR_GPSR(IP13_19_16, HTX0), + PINMUX_IPSR_MSEL(IP13_19_16, MSIOF1_TXD_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_19_16, SSI_SDATA9_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP13_19_16, TS_SDAT0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP13_19_16, STP_ISD_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_19_16, RIF0_D1_C, SEL_DRIF0_2), + + PINMUX_IPSR_GPSR(IP13_23_20, HCTS0_N), + PINMUX_IPSR_MSEL(IP13_23_20, RX2_B, SEL_SCIF2_1), + PINMUX_IPSR_MSEL(IP13_23_20, MSIOF1_SYNC_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_23_20, SSI_SCK9_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP13_23_20, TS_SPSYNC0_D, SEL_TSIF0_3), + PINMUX_IPSR_MSEL(IP13_23_20, STP_ISSYNC_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_23_20, RIF0_SYNC_C, SEL_DRIF0_2), + PINMUX_IPSR_GPSR(IP13_23_20, AUDIO_CLKOUT1_A), + + PINMUX_IPSR_GPSR(IP13_27_24, HRTS0_N), + PINMUX_IPSR_MSEL(IP13_27_24, TX2_B, SEL_SCIF2_1), + PINMUX_IPSR_MSEL(IP13_27_24, MSIOF1_SS1_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP13_27_24, SSI_WS9_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP13_27_24, STP_IVCXO27_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_MSEL(IP13_27_24, BPFCLK_A, SEL_FM_0), + PINMUX_IPSR_GPSR(IP13_27_24, AUDIO_CLKOUT2_A), + + PINMUX_IPSR_GPSR(IP13_31_28, MSIOF0_SYNC), + PINMUX_IPSR_GPSR(IP13_31_28, AUDIO_CLKOUT_A), + PINMUX_IPSR_MSEL(IP13_31_28, TX5_B, SEL_SCIF5_1), + PINMUX_IPSR_MSEL(IP13_31_28, BPFCLK_D, SEL_FM_3), + + /* IPSR14 */ + PINMUX_IPSR_GPSR(IP14_3_0, MSIOF0_SS1), + PINMUX_IPSR_MSEL(IP14_3_0, RX5_A, SEL_SCIF5_0), + PINMUX_IPSR_MSEL(IP14_3_0, NFWP_N_A, SEL_NDF_0), + PINMUX_IPSR_MSEL(IP14_3_0, AUDIO_CLKA_C, SEL_ADG_A_2), + PINMUX_IPSR_MSEL(IP14_3_0, SSI_SCK2_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP14_3_0, STP_IVCXO27_0_C, SEL_SSP1_0_2), + PINMUX_IPSR_GPSR(IP14_3_0, AUDIO_CLKOUT3_A), + PINMUX_IPSR_MSEL(IP14_3_0, TCLK1_B, SEL_TIMER_TMU_1), + + PINMUX_IPSR_GPSR(IP14_7_4, MSIOF0_SS2), + PINMUX_IPSR_MSEL(IP14_7_4, TX5_A, SEL_SCIF5_0), + PINMUX_IPSR_MSEL(IP14_7_4, MSIOF1_SS2_D, SEL_MSIOF1_3), + PINMUX_IPSR_MSEL(IP14_7_4, AUDIO_CLKC_A, SEL_ADG_C_0), + PINMUX_IPSR_MSEL(IP14_7_4, SSI_WS2_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP14_7_4, STP_OPWM_0_D, SEL_SSP1_0_3), + PINMUX_IPSR_GPSR(IP14_7_4, AUDIO_CLKOUT_D), + PINMUX_IPSR_MSEL(IP14_7_4, SPEEDIN_B, SEL_SPEED_PULSE_1), + + PINMUX_IPSR_GPSR(IP14_11_8, MLB_CLK), + PINMUX_IPSR_MSEL(IP14_11_8, MSIOF1_SCK_F, SEL_MSIOF1_5), + PINMUX_IPSR_MSEL(IP14_11_8, SCL1_B, SEL_I2C1_1), + + PINMUX_IPSR_GPSR(IP14_15_12, MLB_SIG), + PINMUX_IPSR_MSEL(IP14_15_12, RX1_B, SEL_SCIF1_1), + PINMUX_IPSR_MSEL(IP14_15_12, MSIOF1_SYNC_F, SEL_MSIOF1_5), + PINMUX_IPSR_MSEL(IP14_15_12, SDA1_B, SEL_I2C1_1), + + PINMUX_IPSR_GPSR(IP14_19_16, MLB_DAT), + PINMUX_IPSR_MSEL(IP14_19_16, TX1_B, SEL_SCIF1_1), + PINMUX_IPSR_MSEL(IP14_19_16, MSIOF1_RXD_F, SEL_MSIOF1_5), + + PINMUX_IPSR_GPSR(IP14_23_20, SSI_SCK01239), + PINMUX_IPSR_MSEL(IP14_23_20, MSIOF1_TXD_F, SEL_MSIOF1_5), + + PINMUX_IPSR_GPSR(IP14_27_24, SSI_WS01239), + PINMUX_IPSR_MSEL(IP14_27_24, MSIOF1_SS1_F, SEL_MSIOF1_5), + + PINMUX_IPSR_GPSR(IP14_31_28, SSI_SDATA0), + PINMUX_IPSR_MSEL(IP14_31_28, MSIOF1_SS2_F, SEL_MSIOF1_5), + + /* IPSR15 */ + PINMUX_IPSR_MSEL(IP15_3_0, SSI_SDATA1_A, SEL_SSI_0), + + PINMUX_IPSR_MSEL(IP15_7_4, SSI_SDATA2_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP15_7_4, SSI_SCK1_B, SEL_SSI_1), + + PINMUX_IPSR_GPSR(IP15_11_8, SSI_SCK349), + PINMUX_IPSR_MSEL(IP15_11_8, MSIOF1_SS1_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_11_8, STP_OPWM_0_A, SEL_SSP1_0_0), + + PINMUX_IPSR_GPSR(IP15_15_12, SSI_WS349), + PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_15_12, MSIOF1_SS2_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_15_12, STP_IVCXO27_0_A, SEL_SSP1_0_0), + + PINMUX_IPSR_GPSR(IP15_19_16, SSI_SDATA3), + PINMUX_IPSR_MSEL(IP15_19_16, HRTS2_N_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_19_16, MSIOF1_TXD_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_19_16, TS_SCK0_A, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_19_16, STP_ISCLK_0_A, SEL_SSP1_0_0), + PINMUX_IPSR_MSEL(IP15_19_16, RIF0_D1_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP15_19_16, RIF2_D0_A, SEL_DRIF2_0), + + PINMUX_IPSR_GPSR(IP15_23_20, SSI_SCK4), + PINMUX_IPSR_MSEL(IP15_23_20, HRX2_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_23_20, MSIOF1_SCK_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_23_20, TS_SDAT0_A, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_23_20, STP_ISD_0_A, SEL_SSP1_0_0), + PINMUX_IPSR_MSEL(IP15_23_20, RIF0_CLK_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP15_23_20, RIF2_CLK_A, SEL_DRIF2_0), + + PINMUX_IPSR_GPSR(IP15_27_24, SSI_WS4), + PINMUX_IPSR_MSEL(IP15_27_24, HTX2_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_27_24, MSIOF1_SYNC_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_27_24, TS_SDEN0_A, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_27_24, STP_ISEN_0_A, SEL_SSP1_0_0), + PINMUX_IPSR_MSEL(IP15_27_24, RIF0_SYNC_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP15_27_24, RIF2_SYNC_A, SEL_DRIF2_0), + + PINMUX_IPSR_GPSR(IP15_31_28, SSI_SDATA4), + PINMUX_IPSR_MSEL(IP15_31_28, HSCK2_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_31_28, MSIOF1_RXD_A, SEL_MSIOF1_0), + PINMUX_IPSR_MSEL(IP15_31_28, TS_SPSYNC0_A, SEL_TSIF0_0), + PINMUX_IPSR_MSEL(IP15_31_28, STP_ISSYNC_0_A, SEL_SSP1_0_0), + PINMUX_IPSR_MSEL(IP15_31_28, RIF0_D0_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP15_31_28, RIF2_D1_A, SEL_DRIF2_0), + + /* IPSR16 */ + PINMUX_IPSR_GPSR(IP16_3_0, SSI_SCK6), + PINMUX_IPSR_MSEL(IP16_3_0, SIM0_RST_D, SEL_SIMCARD_3), + + PINMUX_IPSR_GPSR(IP16_7_4, SSI_WS6), + PINMUX_IPSR_MSEL(IP16_7_4, SIM0_D_D, SEL_SIMCARD_3), + + PINMUX_IPSR_GPSR(IP16_11_8, SSI_SDATA6), + PINMUX_IPSR_MSEL(IP16_11_8, SIM0_CLK_D, SEL_SIMCARD_3), + + PINMUX_IPSR_GPSR(IP16_15_12, SSI_SCK78), + PINMUX_IPSR_MSEL(IP16_15_12, HRX2_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_15_12, MSIOF1_SCK_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_15_12, TS_SCK1_A, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP16_15_12, STP_ISCLK_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_15_12, RIF1_CLK_A, SEL_DRIF1_0), + PINMUX_IPSR_MSEL(IP16_15_12, RIF3_CLK_A, SEL_DRIF3_0), + + PINMUX_IPSR_GPSR(IP16_19_16, SSI_WS78), + PINMUX_IPSR_MSEL(IP16_19_16, HTX2_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_19_16, MSIOF1_SYNC_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_19_16, TS_SDAT1_A, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP16_19_16, STP_ISD_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_19_16, RIF1_SYNC_A, SEL_DRIF1_0), + PINMUX_IPSR_MSEL(IP16_19_16, RIF3_SYNC_A, SEL_DRIF3_0), + + PINMUX_IPSR_GPSR(IP16_23_20, SSI_SDATA7), + PINMUX_IPSR_MSEL(IP16_23_20, HCTS2_N_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_23_20, MSIOF1_RXD_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_23_20, TS_SDEN1_A, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP16_23_20, STP_ISEN_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_23_20, RIF1_D0_A, SEL_DRIF1_0), + PINMUX_IPSR_MSEL(IP16_23_20, RIF3_D0_A, SEL_DRIF3_0), + PINMUX_IPSR_MSEL(IP16_23_20, TCLK2_A, SEL_TIMER_TMU2_0), + + PINMUX_IPSR_GPSR(IP16_27_24, SSI_SDATA8), + PINMUX_IPSR_MSEL(IP16_27_24, HRTS2_N_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_27_24, MSIOF1_TXD_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_27_24, TS_SPSYNC1_A, SEL_TSIF1_0), + PINMUX_IPSR_MSEL(IP16_27_24, STP_ISSYNC_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_27_24, RIF1_D1_A, SEL_DRIF1_0), + PINMUX_IPSR_MSEL(IP16_27_24, RIF3_D1_A, SEL_DRIF3_0), + + PINMUX_IPSR_MSEL(IP16_31_28, SSI_SDATA9_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP16_31_28, HSCK2_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP16_31_28, MSIOF1_SS1_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP16_31_28, HSCK1_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP16_31_28, SSI_WS1_B, SEL_SSI_1), + PINMUX_IPSR_GPSR(IP16_31_28, SCK1), + PINMUX_IPSR_MSEL(IP16_31_28, STP_IVCXO27_1_A, SEL_SSP1_1_0), + PINMUX_IPSR_MSEL(IP16_31_28, SCK5_A, SEL_SCIF5_0), + + /* IPSR17 */ + PINMUX_IPSR_MSEL(IP17_3_0, AUDIO_CLKA_A, SEL_ADG_A_0), + PINMUX_IPSR_GPSR(IP17_3_0, CC5_OSCOUT), + + PINMUX_IPSR_MSEL(IP17_7_4, AUDIO_CLKB_B, SEL_ADG_B_1), + PINMUX_IPSR_MSEL(IP17_7_4, SCIF_CLK_A, SEL_SCIF_0), + PINMUX_IPSR_MSEL(IP17_7_4, STP_IVCXO27_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_7_4, REMOCON_A, SEL_REMOCON_0), + PINMUX_IPSR_MSEL(IP17_7_4, TCLK1_A, SEL_TIMER_TMU_0), + + PINMUX_IPSR_GPSR(IP17_11_8, USB0_PWEN), + PINMUX_IPSR_MSEL(IP17_11_8, SIM0_RST_C, SEL_SIMCARD_2), + PINMUX_IPSR_MSEL(IP17_11_8, TS_SCK1_D, SEL_TSIF1_3), + PINMUX_IPSR_MSEL(IP17_11_8, STP_ISCLK_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_11_8, BPFCLK_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP17_11_8, RIF3_CLK_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP17_11_8, HSCK2_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_15_12, USB0_OVC), + PINMUX_IPSR_MSEL(IP17_15_12, SIM0_D_C, SEL_SIMCARD_2), + PINMUX_IPSR_MSEL(IP17_15_12, TS_SDAT1_D, SEL_TSIF1_3), + PINMUX_IPSR_MSEL(IP17_15_12, STP_ISD_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_15_12, RIF3_SYNC_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP17_15_12, HRX2_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_19_16, USB1_PWEN), + PINMUX_IPSR_MSEL(IP17_19_16, SIM0_CLK_C, SEL_SIMCARD_2), + PINMUX_IPSR_MSEL(IP17_19_16, SSI_SCK1_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP17_19_16, TS_SCK0_E, SEL_TSIF0_4), + PINMUX_IPSR_MSEL(IP17_19_16, STP_ISCLK_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP17_19_16, FMCLK_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP17_19_16, RIF2_CLK_B, SEL_DRIF2_1), + PINMUX_IPSR_MSEL(IP17_19_16, SPEEDIN_A, SEL_SPEED_PULSE_0), + PINMUX_IPSR_MSEL(IP17_19_16, HTX2_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_23_20, USB1_OVC), + PINMUX_IPSR_MSEL(IP17_23_20, MSIOF1_SS2_C, SEL_MSIOF1_2), + PINMUX_IPSR_MSEL(IP17_23_20, SSI_WS1_A, SEL_SSI_0), + PINMUX_IPSR_MSEL(IP17_23_20, TS_SDAT0_E, SEL_TSIF0_4), + PINMUX_IPSR_MSEL(IP17_23_20, STP_ISD_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP17_23_20, FMIN_B, SEL_FM_1), + PINMUX_IPSR_MSEL(IP17_23_20, RIF2_SYNC_B, SEL_DRIF2_1), + PINMUX_IPSR_MSEL(IP17_23_20, REMOCON_B, SEL_REMOCON_1), + PINMUX_IPSR_MSEL(IP17_23_20, HCTS2_N_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_27_24, USB30_PWEN), + PINMUX_IPSR_GPSR(IP17_27_24, AUDIO_CLKOUT_B), + PINMUX_IPSR_MSEL(IP17_27_24, SSI_SCK2_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP17_27_24, TS_SDEN1_D, SEL_TSIF1_3), + PINMUX_IPSR_MSEL(IP17_27_24, STP_ISEN_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_27_24, STP_OPWM_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP17_27_24, RIF3_D0_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP17_27_24, TCLK2_B, SEL_TIMER_TMU2_1), + PINMUX_IPSR_GPSR(IP17_27_24, TPU0TO0), + PINMUX_IPSR_MSEL(IP17_27_24, BPFCLK_C, SEL_FM_2), + PINMUX_IPSR_MSEL(IP17_27_24, HRTS2_N_C, SEL_HSCIF2_2), + + PINMUX_IPSR_GPSR(IP17_31_28, USB30_OVC), + PINMUX_IPSR_GPSR(IP17_31_28, AUDIO_CLKOUT1_B), + PINMUX_IPSR_MSEL(IP17_31_28, SSI_WS2_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP17_31_28, TS_SPSYNC1_D, SEL_TSIF1_3), + PINMUX_IPSR_MSEL(IP17_31_28, STP_ISSYNC_1_D, SEL_SSP1_1_3), + PINMUX_IPSR_MSEL(IP17_31_28, STP_IVCXO27_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP17_31_28, RIF3_D1_B, SEL_DRIF3_1), + PINMUX_IPSR_GPSR(IP17_31_28, FSO_TOE_N), + PINMUX_IPSR_GPSR(IP17_31_28, TPU0TO1), + + /* IPSR18 */ + PINMUX_IPSR_GPSR(IP18_3_0, GP6_30), + PINMUX_IPSR_GPSR(IP18_3_0, AUDIO_CLKOUT2_B), + PINMUX_IPSR_MSEL(IP18_3_0, SSI_SCK9_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP18_3_0, TS_SDEN0_E, SEL_TSIF0_4), + PINMUX_IPSR_MSEL(IP18_3_0, STP_ISEN_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP18_3_0, RIF2_D0_B, SEL_DRIF2_1), + PINMUX_IPSR_GPSR(IP18_3_0, TPU0TO2), + PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_C, SEL_FM_2), + PINMUX_IPSR_MSEL(IP18_3_0, FMCLK_D, SEL_FM_3), + + PINMUX_IPSR_GPSR(IP18_7_4, GP6_31), + PINMUX_IPSR_GPSR(IP18_7_4, AUDIO_CLKOUT3_B), + PINMUX_IPSR_MSEL(IP18_7_4, SSI_WS9_B, SEL_SSI_1), + PINMUX_IPSR_MSEL(IP18_7_4, TS_SPSYNC0_E, SEL_TSIF0_4), + PINMUX_IPSR_MSEL(IP18_7_4, STP_ISSYNC_0_E, SEL_SSP1_0_4), + PINMUX_IPSR_MSEL(IP18_7_4, RIF2_D1_B, SEL_DRIF2_1), + PINMUX_IPSR_GPSR(IP18_7_4, TPU0TO3), + PINMUX_IPSR_MSEL(IP18_7_4, FMIN_C, SEL_FM_2), + PINMUX_IPSR_MSEL(IP18_7_4, FMIN_D, SEL_FM_3), + + /* I2C */ + PINMUX_IPSR_NOGP(0, I2C_SEL_0_1), + PINMUX_IPSR_NOGP(0, I2C_SEL_3_1), + PINMUX_IPSR_NOGP(0, I2C_SEL_5_1), + +/* + * Static pins can not be muxed between different functions but + * still needs a mark entry in the pinmux list. Add each static + * pin to the list without an associated function. The sh-pfc + * core will do the right thing and skip trying to mux then pin + * while still applying configuration to it + */ +#define FM(x) PINMUX_DATA(x##_MARK, 0), + PINMUX_STATIC +#undef FM +}; + +/* + * R8A7796 has 8 banks with 32 GPIOs in each => 256 GPIOs. + * Physical layout rows: A - AW, cols: 1 - 39. + */ +#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) +#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300) +#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) + +static const struct sh_pfc_pin pinmux_pins[] = { + PINMUX_GPIO_GP_ALL(), + + /* + * Pins not associated with a GPIO port. + * + * The pin positions are different between different r8a7796 + * packages, all that is needed for the pfc driver is a unique + * number for each pin. To this end use the pin layout from + * R-Car M3SiP to calculate a unique number for each pin. + */ + SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN2, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH), + SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS), +}; + +/* - AUDIO CLOCK ------------------------------------------------------------ */ +static const unsigned int audio_clk_a_a_pins[] = { + /* CLK A */ + RCAR_GP_PIN(6, 22), +}; +static const unsigned int audio_clk_a_a_mux[] = { + AUDIO_CLKA_A_MARK, +}; +static const unsigned int audio_clk_a_b_pins[] = { + /* CLK A */ + RCAR_GP_PIN(5, 4), +}; +static const unsigned int audio_clk_a_b_mux[] = { + AUDIO_CLKA_B_MARK, +}; +static const unsigned int audio_clk_a_c_pins[] = { + /* CLK A */ + RCAR_GP_PIN(5, 19), +}; +static const unsigned int audio_clk_a_c_mux[] = { + AUDIO_CLKA_C_MARK, +}; +static const unsigned int audio_clk_b_a_pins[] = { + /* CLK B */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int audio_clk_b_a_mux[] = { + AUDIO_CLKB_A_MARK, +}; +static const unsigned int audio_clk_b_b_pins[] = { + /* CLK B */ + RCAR_GP_PIN(6, 23), +}; +static const unsigned int audio_clk_b_b_mux[] = { + AUDIO_CLKB_B_MARK, +}; +static const unsigned int audio_clk_c_a_pins[] = { + /* CLK C */ + RCAR_GP_PIN(5, 21), +}; +static const unsigned int audio_clk_c_a_mux[] = { + AUDIO_CLKC_A_MARK, +}; +static const unsigned int audio_clk_c_b_pins[] = { + /* CLK C */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int audio_clk_c_b_mux[] = { + AUDIO_CLKC_B_MARK, +}; +static const unsigned int audio_clkout_a_pins[] = { + /* CLKOUT */ + RCAR_GP_PIN(5, 18), +}; +static const unsigned int audio_clkout_a_mux[] = { + AUDIO_CLKOUT_A_MARK, +}; +static const unsigned int audio_clkout_b_pins[] = { + /* CLKOUT */ + RCAR_GP_PIN(6, 28), +}; +static const unsigned int audio_clkout_b_mux[] = { + AUDIO_CLKOUT_B_MARK, +}; +static const unsigned int audio_clkout_c_pins[] = { + /* CLKOUT */ + RCAR_GP_PIN(5, 3), +}; +static const unsigned int audio_clkout_c_mux[] = { + AUDIO_CLKOUT_C_MARK, +}; +static const unsigned int audio_clkout_d_pins[] = { + /* CLKOUT */ + RCAR_GP_PIN(5, 21), +}; +static const unsigned int audio_clkout_d_mux[] = { + AUDIO_CLKOUT_D_MARK, +}; +static const unsigned int audio_clkout1_a_pins[] = { + /* CLKOUT1 */ + RCAR_GP_PIN(5, 15), +}; +static const unsigned int audio_clkout1_a_mux[] = { + AUDIO_CLKOUT1_A_MARK, +}; +static const unsigned int audio_clkout1_b_pins[] = { + /* CLKOUT1 */ + RCAR_GP_PIN(6, 29), +}; +static const unsigned int audio_clkout1_b_mux[] = { + AUDIO_CLKOUT1_B_MARK, +}; +static const unsigned int audio_clkout2_a_pins[] = { + /* CLKOUT2 */ + RCAR_GP_PIN(5, 16), +}; +static const unsigned int audio_clkout2_a_mux[] = { + AUDIO_CLKOUT2_A_MARK, +}; +static const unsigned int audio_clkout2_b_pins[] = { + /* CLKOUT2 */ + RCAR_GP_PIN(6, 30), +}; +static const unsigned int audio_clkout2_b_mux[] = { + AUDIO_CLKOUT2_B_MARK, +}; + +static const unsigned int audio_clkout3_a_pins[] = { + /* CLKOUT3 */ + RCAR_GP_PIN(5, 19), +}; +static const unsigned int audio_clkout3_a_mux[] = { + AUDIO_CLKOUT3_A_MARK, +}; +static const unsigned int audio_clkout3_b_pins[] = { + /* CLKOUT3 */ + RCAR_GP_PIN(6, 31), +}; +static const unsigned int audio_clkout3_b_mux[] = { + AUDIO_CLKOUT3_B_MARK, +}; + +/* - EtherAVB --------------------------------------------------------------- */ +static const unsigned int avb_link_pins[] = { + /* AVB_LINK */ + RCAR_GP_PIN(2, 12), +}; +static const unsigned int avb_link_mux[] = { + AVB_LINK_MARK, +}; +static const unsigned int avb_magic_pins[] = { + /* AVB_MAGIC_ */ + RCAR_GP_PIN(2, 10), +}; +static const unsigned int avb_magic_mux[] = { + AVB_MAGIC_MARK, +}; +static const unsigned int avb_phy_int_pins[] = { + /* AVB_PHY_INT */ + RCAR_GP_PIN(2, 11), +}; +static const unsigned int avb_phy_int_mux[] = { + AVB_PHY_INT_MARK, +}; +static const unsigned int avb_mdc_pins[] = { + /* AVB_MDC, AVB_MDIO */ + RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), +}; +static const unsigned int avb_mdc_mux[] = { + AVB_MDC_MARK, AVB_MDIO_MARK, +}; +static const unsigned int avb_mii_pins[] = { + /* + * AVB_TX_CTL, AVB_TXC, AVB_TD0, + * AVB_TD1, AVB_TD2, AVB_TD3, + * AVB_RX_CTL, AVB_RXC, AVB_RD0, + * AVB_RD1, AVB_RD2, AVB_RD3, + * AVB_TXCREFCLK + */ + PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), + PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), + PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), + PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), + PIN_NUMBER('A', 12), + +}; +static const unsigned int avb_mii_mux[] = { + AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, + AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK, + AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK, + AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK, + AVB_TXCREFCLK_MARK, +}; +static const unsigned int avb_avtp_pps_pins[] = { + /* AVB_AVTP_PPS */ + RCAR_GP_PIN(2, 6), +}; +static const unsigned int avb_avtp_pps_mux[] = { + AVB_AVTP_PPS_MARK, +}; +static const unsigned int avb_avtp_match_a_pins[] = { + /* AVB_AVTP_MATCH_A */ + RCAR_GP_PIN(2, 13), +}; +static const unsigned int avb_avtp_match_a_mux[] = { + AVB_AVTP_MATCH_A_MARK, +}; +static const unsigned int avb_avtp_capture_a_pins[] = { + /* AVB_AVTP_CAPTURE_A */ + RCAR_GP_PIN(2, 14), +}; +static const unsigned int avb_avtp_capture_a_mux[] = { + AVB_AVTP_CAPTURE_A_MARK, +}; +static const unsigned int avb_avtp_match_b_pins[] = { + /* AVB_AVTP_MATCH_B */ + RCAR_GP_PIN(1, 8), +}; +static const unsigned int avb_avtp_match_b_mux[] = { + AVB_AVTP_MATCH_B_MARK, +}; +static const unsigned int avb_avtp_capture_b_pins[] = { + /* AVB_AVTP_CAPTURE_B */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int avb_avtp_capture_b_mux[] = { + AVB_AVTP_CAPTURE_B_MARK, +}; + +/* - CAN ------------------------------------------------------------------ */ +static const unsigned int can0_data_a_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24), +}; +static const unsigned int can0_data_a_mux[] = { + CAN0_TX_A_MARK, CAN0_RX_A_MARK, +}; +static const unsigned int can0_data_b_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), +}; +static const unsigned int can0_data_b_mux[] = { + CAN0_TX_B_MARK, CAN0_RX_B_MARK, +}; +static const unsigned int can1_data_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26), +}; +static const unsigned int can1_data_mux[] = { + CAN1_TX_MARK, CAN1_RX_MARK, +}; + +/* - CAN Clock -------------------------------------------------------------- */ +static const unsigned int can_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(1, 25), +}; +static const unsigned int can_clk_mux[] = { + CAN_CLK_MARK, +}; + +/* - CAN FD --------------------------------------------------------------- */ +static const unsigned int canfd0_data_a_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24), +}; +static const unsigned int canfd0_data_a_mux[] = { + CANFD0_TX_A_MARK, CANFD0_RX_A_MARK, +}; +static const unsigned int canfd0_data_b_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1), +}; +static const unsigned int canfd0_data_b_mux[] = { + CANFD0_TX_B_MARK, CANFD0_RX_B_MARK, +}; +static const unsigned int canfd1_data_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26), +}; +static const unsigned int canfd1_data_mux[] = { + CANFD1_TX_MARK, CANFD1_RX_MARK, +}; + +/* - DRIF0 --------------------------------------------------------------- */ +static const unsigned int drif0_ctrl_a_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), +}; +static const unsigned int drif0_ctrl_a_mux[] = { + RIF0_CLK_A_MARK, RIF0_SYNC_A_MARK, +}; +static const unsigned int drif0_data0_a_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int drif0_data0_a_mux[] = { + RIF0_D0_A_MARK, +}; +static const unsigned int drif0_data1_a_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 7), +}; +static const unsigned int drif0_data1_a_mux[] = { + RIF0_D1_A_MARK, +}; +static const unsigned int drif0_ctrl_b_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4), +}; +static const unsigned int drif0_ctrl_b_mux[] = { + RIF0_CLK_B_MARK, RIF0_SYNC_B_MARK, +}; +static const unsigned int drif0_data0_b_pins[] = { + /* D0 */ + RCAR_GP_PIN(5, 1), +}; +static const unsigned int drif0_data0_b_mux[] = { + RIF0_D0_B_MARK, +}; +static const unsigned int drif0_data1_b_pins[] = { + /* D1 */ + RCAR_GP_PIN(5, 2), +}; +static const unsigned int drif0_data1_b_mux[] = { + RIF0_D1_B_MARK, +}; +static const unsigned int drif0_ctrl_c_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 15), +}; +static const unsigned int drif0_ctrl_c_mux[] = { + RIF0_CLK_C_MARK, RIF0_SYNC_C_MARK, +}; +static const unsigned int drif0_data0_c_pins[] = { + /* D0 */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int drif0_data0_c_mux[] = { + RIF0_D0_C_MARK, +}; +static const unsigned int drif0_data1_c_pins[] = { + /* D1 */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int drif0_data1_c_mux[] = { + RIF0_D1_C_MARK, +}; +/* - DRIF1 --------------------------------------------------------------- */ +static const unsigned int drif1_ctrl_a_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), +}; +static const unsigned int drif1_ctrl_a_mux[] = { + RIF1_CLK_A_MARK, RIF1_SYNC_A_MARK, +}; +static const unsigned int drif1_data0_a_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 19), +}; +static const unsigned int drif1_data0_a_mux[] = { + RIF1_D0_A_MARK, +}; +static const unsigned int drif1_data1_a_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 20), +}; +static const unsigned int drif1_data1_a_mux[] = { + RIF1_D1_A_MARK, +}; +static const unsigned int drif1_ctrl_b_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 3), +}; +static const unsigned int drif1_ctrl_b_mux[] = { + RIF1_CLK_B_MARK, RIF1_SYNC_B_MARK, +}; +static const unsigned int drif1_data0_b_pins[] = { + /* D0 */ + RCAR_GP_PIN(5, 7), +}; +static const unsigned int drif1_data0_b_mux[] = { + RIF1_D0_B_MARK, +}; +static const unsigned int drif1_data1_b_pins[] = { + /* D1 */ + RCAR_GP_PIN(5, 8), +}; +static const unsigned int drif1_data1_b_mux[] = { + RIF1_D1_B_MARK, +}; +static const unsigned int drif1_ctrl_c_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11), +}; +static const unsigned int drif1_ctrl_c_mux[] = { + RIF1_CLK_C_MARK, RIF1_SYNC_C_MARK, +}; +static const unsigned int drif1_data0_c_pins[] = { + /* D0 */ + RCAR_GP_PIN(5, 6), +}; +static const unsigned int drif1_data0_c_mux[] = { + RIF1_D0_C_MARK, +}; +static const unsigned int drif1_data1_c_pins[] = { + /* D1 */ + RCAR_GP_PIN(5, 10), +}; +static const unsigned int drif1_data1_c_mux[] = { + RIF1_D1_C_MARK, +}; +/* - DRIF2 --------------------------------------------------------------- */ +static const unsigned int drif2_ctrl_a_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), +}; +static const unsigned int drif2_ctrl_a_mux[] = { + RIF2_CLK_A_MARK, RIF2_SYNC_A_MARK, +}; +static const unsigned int drif2_data0_a_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 7), +}; +static const unsigned int drif2_data0_a_mux[] = { + RIF2_D0_A_MARK, +}; +static const unsigned int drif2_data1_a_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int drif2_data1_a_mux[] = { + RIF2_D1_A_MARK, +}; +static const unsigned int drif2_ctrl_b_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), +}; +static const unsigned int drif2_ctrl_b_mux[] = { + RIF2_CLK_B_MARK, RIF2_SYNC_B_MARK, +}; +static const unsigned int drif2_data0_b_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 30), +}; +static const unsigned int drif2_data0_b_mux[] = { + RIF2_D0_B_MARK, +}; +static const unsigned int drif2_data1_b_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 31), +}; +static const unsigned int drif2_data1_b_mux[] = { + RIF2_D1_B_MARK, +}; +/* - DRIF3 --------------------------------------------------------------- */ +static const unsigned int drif3_ctrl_a_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), +}; +static const unsigned int drif3_ctrl_a_mux[] = { + RIF3_CLK_A_MARK, RIF3_SYNC_A_MARK, +}; +static const unsigned int drif3_data0_a_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 19), +}; +static const unsigned int drif3_data0_a_mux[] = { + RIF3_D0_A_MARK, +}; +static const unsigned int drif3_data1_a_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 20), +}; +static const unsigned int drif3_data1_a_mux[] = { + RIF3_D1_A_MARK, +}; +static const unsigned int drif3_ctrl_b_pins[] = { + /* CLK, SYNC */ + RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), +}; +static const unsigned int drif3_ctrl_b_mux[] = { + RIF3_CLK_B_MARK, RIF3_SYNC_B_MARK, +}; +static const unsigned int drif3_data0_b_pins[] = { + /* D0 */ + RCAR_GP_PIN(6, 28), +}; +static const unsigned int drif3_data0_b_mux[] = { + RIF3_D0_B_MARK, +}; +static const unsigned int drif3_data1_b_pins[] = { + /* D1 */ + RCAR_GP_PIN(6, 29), +}; +static const unsigned int drif3_data1_b_mux[] = { + RIF3_D1_B_MARK, +}; + +/* - DU --------------------------------------------------------------------- */ +static const unsigned int du_rgb666_pins[] = { + /* R[7:2], G[7:2], B[7:2] */ + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18), + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5), + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2), +}; +static const unsigned int du_rgb666_mux[] = { + DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK, + DU_DR3_MARK, DU_DR2_MARK, + DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK, + DU_DG3_MARK, DU_DG2_MARK, + DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK, + DU_DB3_MARK, DU_DB2_MARK, +}; +static const unsigned int du_rgb888_pins[] = { + /* R[7:0], G[7:0], B[7:0] */ + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 13), + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), + RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 8), + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18), + RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16), + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 5), + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2), + RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 0), +}; +static const unsigned int du_rgb888_mux[] = { + DU_DR7_MARK, DU_DR6_MARK, DU_DR5_MARK, DU_DR4_MARK, + DU_DR3_MARK, DU_DR2_MARK, DU_DR1_MARK, DU_DR0_MARK, + DU_DG7_MARK, DU_DG6_MARK, DU_DG5_MARK, DU_DG4_MARK, + DU_DG3_MARK, DU_DG2_MARK, DU_DG1_MARK, DU_DG0_MARK, + DU_DB7_MARK, DU_DB6_MARK, DU_DB5_MARK, DU_DB4_MARK, + DU_DB3_MARK, DU_DB2_MARK, DU_DB1_MARK, DU_DB0_MARK, +}; +static const unsigned int du_clk_out_0_pins[] = { + /* CLKOUT */ + RCAR_GP_PIN(1, 27), +}; +static const unsigned int du_clk_out_0_mux[] = { + DU_DOTCLKOUT0_MARK +}; +static const unsigned int du_clk_out_1_pins[] = { + /* CLKOUT */ + RCAR_GP_PIN(2, 3), +}; +static const unsigned int du_clk_out_1_mux[] = { + DU_DOTCLKOUT1_MARK +}; +static const unsigned int du_sync_pins[] = { + /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */ + RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4), +}; +static const unsigned int du_sync_mux[] = { + DU_EXVSYNC_DU_VSYNC_MARK, DU_EXHSYNC_DU_HSYNC_MARK +}; +static const unsigned int du_oddf_pins[] = { + /* EXDISP/EXODDF/EXCDE */ + RCAR_GP_PIN(2, 2), +}; +static const unsigned int du_oddf_mux[] = { + DU_EXODDF_DU_ODDF_DISP_CDE_MARK, +}; +static const unsigned int du_cde_pins[] = { + /* CDE */ + RCAR_GP_PIN(2, 0), +}; +static const unsigned int du_cde_mux[] = { + DU_CDE_MARK, +}; +static const unsigned int du_disp_pins[] = { + /* DISP */ + RCAR_GP_PIN(2, 1), +}; +static const unsigned int du_disp_mux[] = { + DU_DISP_MARK, +}; + +/* - HSCIF0 ----------------------------------------------------------------- */ +static const unsigned int hscif0_data_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), +}; +static const unsigned int hscif0_data_mux[] = { + HRX0_MARK, HTX0_MARK, +}; +static const unsigned int hscif0_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int hscif0_clk_mux[] = { + HSCK0_MARK, +}; +static const unsigned int hscif0_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15), +}; +static const unsigned int hscif0_ctrl_mux[] = { + HRTS0_N_MARK, HCTS0_N_MARK, +}; +/* - HSCIF1 ----------------------------------------------------------------- */ +static const unsigned int hscif1_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), +}; +static const unsigned int hscif1_data_a_mux[] = { + HRX1_A_MARK, HTX1_A_MARK, +}; +static const unsigned int hscif1_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int hscif1_clk_a_mux[] = { + HSCK1_A_MARK, +}; +static const unsigned int hscif1_ctrl_a_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7), +}; +static const unsigned int hscif1_ctrl_a_mux[] = { + HRTS1_N_A_MARK, HCTS1_N_A_MARK, +}; + +static const unsigned int hscif1_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), +}; +static const unsigned int hscif1_data_b_mux[] = { + HRX1_B_MARK, HTX1_B_MARK, +}; +static const unsigned int hscif1_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int hscif1_clk_b_mux[] = { + HSCK1_B_MARK, +}; +static const unsigned int hscif1_ctrl_b_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3), +}; +static const unsigned int hscif1_ctrl_b_mux[] = { + HRTS1_N_B_MARK, HCTS1_N_B_MARK, +}; +/* - HSCIF2 ----------------------------------------------------------------- */ +static const unsigned int hscif2_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), +}; +static const unsigned int hscif2_data_a_mux[] = { + HRX2_A_MARK, HTX2_A_MARK, +}; +static const unsigned int hscif2_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int hscif2_clk_a_mux[] = { + HSCK2_A_MARK, +}; +static const unsigned int hscif2_ctrl_a_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6), +}; +static const unsigned int hscif2_ctrl_a_mux[] = { + HRTS2_N_A_MARK, HCTS2_N_A_MARK, +}; + +static const unsigned int hscif2_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), +}; +static const unsigned int hscif2_data_b_mux[] = { + HRX2_B_MARK, HTX2_B_MARK, +}; +static const unsigned int hscif2_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int hscif2_clk_b_mux[] = { + HSCK2_B_MARK, +}; +static const unsigned int hscif2_ctrl_b_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19), +}; +static const unsigned int hscif2_ctrl_b_mux[] = { + HRTS2_N_B_MARK, HCTS2_N_B_MARK, +}; + +static const unsigned int hscif2_data_c_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26), +}; +static const unsigned int hscif2_data_c_mux[] = { + HRX2_C_MARK, HTX2_C_MARK, +}; +static const unsigned int hscif2_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 24), +}; +static const unsigned int hscif2_clk_c_mux[] = { + HSCK2_C_MARK, +}; +static const unsigned int hscif2_ctrl_c_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 27), +}; +static const unsigned int hscif2_ctrl_c_mux[] = { + HRTS2_N_C_MARK, HCTS2_N_C_MARK, +}; +/* - HSCIF3 ----------------------------------------------------------------- */ +static const unsigned int hscif3_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24), +}; +static const unsigned int hscif3_data_a_mux[] = { + HRX3_A_MARK, HTX3_A_MARK, +}; +static const unsigned int hscif3_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 22), +}; +static const unsigned int hscif3_clk_mux[] = { + HSCK3_MARK, +}; +static const unsigned int hscif3_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25), +}; +static const unsigned int hscif3_ctrl_mux[] = { + HRTS3_N_MARK, HCTS3_N_MARK, +}; + +static const unsigned int hscif3_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), +}; +static const unsigned int hscif3_data_b_mux[] = { + HRX3_B_MARK, HTX3_B_MARK, +}; +static const unsigned int hscif3_data_c_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), +}; +static const unsigned int hscif3_data_c_mux[] = { + HRX3_C_MARK, HTX3_C_MARK, +}; +static const unsigned int hscif3_data_d_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), +}; +static const unsigned int hscif3_data_d_mux[] = { + HRX3_D_MARK, HTX3_D_MARK, +}; +/* - HSCIF4 ----------------------------------------------------------------- */ +static const unsigned int hscif4_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13), +}; +static const unsigned int hscif4_data_a_mux[] = { + HRX4_A_MARK, HTX4_A_MARK, +}; +static const unsigned int hscif4_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int hscif4_clk_mux[] = { + HSCK4_MARK, +}; +static const unsigned int hscif4_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), +}; +static const unsigned int hscif4_ctrl_mux[] = { + HRTS4_N_MARK, HCTS4_N_MARK, +}; + +static const unsigned int hscif4_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11), +}; +static const unsigned int hscif4_data_b_mux[] = { + HRX4_B_MARK, HTX4_B_MARK, +}; + +/* - I2C -------------------------------------------------------------------- */ +static const unsigned int i2c1_a_pins[] = { + /* SDA, SCL */ + RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10), +}; +static const unsigned int i2c1_a_mux[] = { + SDA1_A_MARK, SCL1_A_MARK, +}; +static const unsigned int i2c1_b_pins[] = { + /* SDA, SCL */ + RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23), +}; +static const unsigned int i2c1_b_mux[] = { + SDA1_B_MARK, SCL1_B_MARK, +}; +static const unsigned int i2c2_a_pins[] = { + /* SDA, SCL */ + RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 4), +}; +static const unsigned int i2c2_a_mux[] = { + SDA2_A_MARK, SCL2_A_MARK, +}; +static const unsigned int i2c2_b_pins[] = { + /* SDA, SCL */ + RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12), +}; +static const unsigned int i2c2_b_mux[] = { + SDA2_B_MARK, SCL2_B_MARK, +}; +static const unsigned int i2c6_a_pins[] = { + /* SDA, SCL */ + RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11), +}; +static const unsigned int i2c6_a_mux[] = { + SDA6_A_MARK, SCL6_A_MARK, +}; +static const unsigned int i2c6_b_pins[] = { + /* SDA, SCL */ + RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25), +}; +static const unsigned int i2c6_b_mux[] = { + SDA6_B_MARK, SCL6_B_MARK, +}; +static const unsigned int i2c6_c_pins[] = { + /* SDA, SCL */ + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), +}; +static const unsigned int i2c6_c_mux[] = { + SDA6_C_MARK, SCL6_C_MARK, +}; + +/* - MSIOF0 ----------------------------------------------------------------- */ +static const unsigned int msiof0_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 17), +}; +static const unsigned int msiof0_clk_mux[] = { + MSIOF0_SCK_MARK, +}; +static const unsigned int msiof0_sync_pins[] = { + /* SYNC */ + RCAR_GP_PIN(5, 18), +}; +static const unsigned int msiof0_sync_mux[] = { + MSIOF0_SYNC_MARK, +}; +static const unsigned int msiof0_ss1_pins[] = { + /* SS1 */ + RCAR_GP_PIN(5, 19), +}; +static const unsigned int msiof0_ss1_mux[] = { + MSIOF0_SS1_MARK, +}; +static const unsigned int msiof0_ss2_pins[] = { + /* SS2 */ + RCAR_GP_PIN(5, 21), +}; +static const unsigned int msiof0_ss2_mux[] = { + MSIOF0_SS2_MARK, +}; +static const unsigned int msiof0_txd_pins[] = { + /* TXD */ + RCAR_GP_PIN(5, 20), +}; +static const unsigned int msiof0_txd_mux[] = { + MSIOF0_TXD_MARK, +}; +static const unsigned int msiof0_rxd_pins[] = { + /* RXD */ + RCAR_GP_PIN(5, 22), +}; +static const unsigned int msiof0_rxd_mux[] = { + MSIOF0_RXD_MARK, +}; +/* - MSIOF1 ----------------------------------------------------------------- */ +static const unsigned int msiof1_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 8), +}; +static const unsigned int msiof1_clk_a_mux[] = { + MSIOF1_SCK_A_MARK, +}; +static const unsigned int msiof1_sync_a_pins[] = { + /* SYNC */ + RCAR_GP_PIN(6, 9), +}; +static const unsigned int msiof1_sync_a_mux[] = { + MSIOF1_SYNC_A_MARK, +}; +static const unsigned int msiof1_ss1_a_pins[] = { + /* SS1 */ + RCAR_GP_PIN(6, 5), +}; +static const unsigned int msiof1_ss1_a_mux[] = { + MSIOF1_SS1_A_MARK, +}; +static const unsigned int msiof1_ss2_a_pins[] = { + /* SS2 */ + RCAR_GP_PIN(6, 6), +}; +static const unsigned int msiof1_ss2_a_mux[] = { + MSIOF1_SS2_A_MARK, +}; +static const unsigned int msiof1_txd_a_pins[] = { + /* TXD */ + RCAR_GP_PIN(6, 7), +}; +static const unsigned int msiof1_txd_a_mux[] = { + MSIOF1_TXD_A_MARK, +}; +static const unsigned int msiof1_rxd_a_pins[] = { + /* RXD */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int msiof1_rxd_a_mux[] = { + MSIOF1_RXD_A_MARK, +}; +static const unsigned int msiof1_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 9), +}; +static const unsigned int msiof1_clk_b_mux[] = { + MSIOF1_SCK_B_MARK, +}; +static const unsigned int msiof1_sync_b_pins[] = { + /* SYNC */ + RCAR_GP_PIN(5, 3), +}; +static const unsigned int msiof1_sync_b_mux[] = { + MSIOF1_SYNC_B_MARK, +}; +static const unsigned int msiof1_ss1_b_pins[] = { + /* SS1 */ + RCAR_GP_PIN(5, 4), +}; +static const unsigned int msiof1_ss1_b_mux[] = { + MSIOF1_SS1_B_MARK, +}; +static const unsigned int msiof1_ss2_b_pins[] = { + /* SS2 */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int msiof1_ss2_b_mux[] = { + MSIOF1_SS2_B_MARK, +}; +static const unsigned int msiof1_txd_b_pins[] = { + /* TXD */ + RCAR_GP_PIN(5, 8), +}; +static const unsigned int msiof1_txd_b_mux[] = { + MSIOF1_TXD_B_MARK, +}; +static const unsigned int msiof1_rxd_b_pins[] = { + /* RXD */ + RCAR_GP_PIN(5, 7), +}; +static const unsigned int msiof1_rxd_b_mux[] = { + MSIOF1_RXD_B_MARK, +}; +static const unsigned int msiof1_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 17), +}; +static const unsigned int msiof1_clk_c_mux[] = { + MSIOF1_SCK_C_MARK, +}; +static const unsigned int msiof1_sync_c_pins[] = { + /* SYNC */ + RCAR_GP_PIN(6, 18), +}; +static const unsigned int msiof1_sync_c_mux[] = { + MSIOF1_SYNC_C_MARK, +}; +static const unsigned int msiof1_ss1_c_pins[] = { + /* SS1 */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int msiof1_ss1_c_mux[] = { + MSIOF1_SS1_C_MARK, +}; +static const unsigned int msiof1_ss2_c_pins[] = { + /* SS2 */ + RCAR_GP_PIN(6, 27), +}; +static const unsigned int msiof1_ss2_c_mux[] = { + MSIOF1_SS2_C_MARK, +}; +static const unsigned int msiof1_txd_c_pins[] = { + /* TXD */ + RCAR_GP_PIN(6, 20), +}; +static const unsigned int msiof1_txd_c_mux[] = { + MSIOF1_TXD_C_MARK, +}; +static const unsigned int msiof1_rxd_c_pins[] = { + /* RXD */ + RCAR_GP_PIN(6, 19), +}; +static const unsigned int msiof1_rxd_c_mux[] = { + MSIOF1_RXD_C_MARK, +}; +static const unsigned int msiof1_clk_d_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int msiof1_clk_d_mux[] = { + MSIOF1_SCK_D_MARK, +}; +static const unsigned int msiof1_sync_d_pins[] = { + /* SYNC */ + RCAR_GP_PIN(5, 15), +}; +static const unsigned int msiof1_sync_d_mux[] = { + MSIOF1_SYNC_D_MARK, +}; +static const unsigned int msiof1_ss1_d_pins[] = { + /* SS1 */ + RCAR_GP_PIN(5, 16), +}; +static const unsigned int msiof1_ss1_d_mux[] = { + MSIOF1_SS1_D_MARK, +}; +static const unsigned int msiof1_ss2_d_pins[] = { + /* SS2 */ + RCAR_GP_PIN(5, 21), +}; +static const unsigned int msiof1_ss2_d_mux[] = { + MSIOF1_SS2_D_MARK, +}; +static const unsigned int msiof1_txd_d_pins[] = { + /* TXD */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int msiof1_txd_d_mux[] = { + MSIOF1_TXD_D_MARK, +}; +static const unsigned int msiof1_rxd_d_pins[] = { + /* RXD */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int msiof1_rxd_d_mux[] = { + MSIOF1_RXD_D_MARK, +}; +static const unsigned int msiof1_clk_e_pins[] = { + /* SCK */ + RCAR_GP_PIN(3, 0), +}; +static const unsigned int msiof1_clk_e_mux[] = { + MSIOF1_SCK_E_MARK, +}; +static const unsigned int msiof1_sync_e_pins[] = { + /* SYNC */ + RCAR_GP_PIN(3, 1), +}; +static const unsigned int msiof1_sync_e_mux[] = { + MSIOF1_SYNC_E_MARK, +}; +static const unsigned int msiof1_ss1_e_pins[] = { + /* SS1 */ + RCAR_GP_PIN(3, 4), +}; +static const unsigned int msiof1_ss1_e_mux[] = { + MSIOF1_SS1_E_MARK, +}; +static const unsigned int msiof1_ss2_e_pins[] = { + /* SS2 */ + RCAR_GP_PIN(3, 5), +}; +static const unsigned int msiof1_ss2_e_mux[] = { + MSIOF1_SS2_E_MARK, +}; +static const unsigned int msiof1_txd_e_pins[] = { + /* TXD */ + RCAR_GP_PIN(3, 3), +}; +static const unsigned int msiof1_txd_e_mux[] = { + MSIOF1_TXD_E_MARK, +}; +static const unsigned int msiof1_rxd_e_pins[] = { + /* RXD */ + RCAR_GP_PIN(3, 2), +}; +static const unsigned int msiof1_rxd_e_mux[] = { + MSIOF1_RXD_E_MARK, +}; +static const unsigned int msiof1_clk_f_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 23), +}; +static const unsigned int msiof1_clk_f_mux[] = { + MSIOF1_SCK_F_MARK, +}; +static const unsigned int msiof1_sync_f_pins[] = { + /* SYNC */ + RCAR_GP_PIN(5, 24), +}; +static const unsigned int msiof1_sync_f_mux[] = { + MSIOF1_SYNC_F_MARK, +}; +static const unsigned int msiof1_ss1_f_pins[] = { + /* SS1 */ + RCAR_GP_PIN(6, 1), +}; +static const unsigned int msiof1_ss1_f_mux[] = { + MSIOF1_SS1_F_MARK, +}; +static const unsigned int msiof1_ss2_f_pins[] = { + /* SS2 */ + RCAR_GP_PIN(6, 2), +}; +static const unsigned int msiof1_ss2_f_mux[] = { + MSIOF1_SS2_F_MARK, +}; +static const unsigned int msiof1_txd_f_pins[] = { + /* TXD */ + RCAR_GP_PIN(6, 0), +}; +static const unsigned int msiof1_txd_f_mux[] = { + MSIOF1_TXD_F_MARK, +}; +static const unsigned int msiof1_rxd_f_pins[] = { + /* RXD */ + RCAR_GP_PIN(5, 25), +}; +static const unsigned int msiof1_rxd_f_mux[] = { + MSIOF1_RXD_F_MARK, +}; +static const unsigned int msiof1_clk_g_pins[] = { + /* SCK */ + RCAR_GP_PIN(3, 6), +}; +static const unsigned int msiof1_clk_g_mux[] = { + MSIOF1_SCK_G_MARK, +}; +static const unsigned int msiof1_sync_g_pins[] = { + /* SYNC */ + RCAR_GP_PIN(3, 7), +}; +static const unsigned int msiof1_sync_g_mux[] = { + MSIOF1_SYNC_G_MARK, +}; +static const unsigned int msiof1_ss1_g_pins[] = { + /* SS1 */ + RCAR_GP_PIN(3, 10), +}; +static const unsigned int msiof1_ss1_g_mux[] = { + MSIOF1_SS1_G_MARK, +}; +static const unsigned int msiof1_ss2_g_pins[] = { + /* SS2 */ + RCAR_GP_PIN(3, 11), +}; +static const unsigned int msiof1_ss2_g_mux[] = { + MSIOF1_SS2_G_MARK, +}; +static const unsigned int msiof1_txd_g_pins[] = { + /* TXD */ + RCAR_GP_PIN(3, 9), +}; +static const unsigned int msiof1_txd_g_mux[] = { + MSIOF1_TXD_G_MARK, +}; +static const unsigned int msiof1_rxd_g_pins[] = { + /* RXD */ + RCAR_GP_PIN(3, 8), +}; +static const unsigned int msiof1_rxd_g_mux[] = { + MSIOF1_RXD_G_MARK, +}; +/* - MSIOF2 ----------------------------------------------------------------- */ +static const unsigned int msiof2_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 9), +}; +static const unsigned int msiof2_clk_a_mux[] = { + MSIOF2_SCK_A_MARK, +}; +static const unsigned int msiof2_sync_a_pins[] = { + /* SYNC */ + RCAR_GP_PIN(1, 8), +}; +static const unsigned int msiof2_sync_a_mux[] = { + MSIOF2_SYNC_A_MARK, +}; +static const unsigned int msiof2_ss1_a_pins[] = { + /* SS1 */ + RCAR_GP_PIN(1, 6), +}; +static const unsigned int msiof2_ss1_a_mux[] = { + MSIOF2_SS1_A_MARK, +}; +static const unsigned int msiof2_ss2_a_pins[] = { + /* SS2 */ + RCAR_GP_PIN(1, 7), +}; +static const unsigned int msiof2_ss2_a_mux[] = { + MSIOF2_SS2_A_MARK, +}; +static const unsigned int msiof2_txd_a_pins[] = { + /* TXD */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int msiof2_txd_a_mux[] = { + MSIOF2_TXD_A_MARK, +}; +static const unsigned int msiof2_rxd_a_pins[] = { + /* RXD */ + RCAR_GP_PIN(1, 10), +}; +static const unsigned int msiof2_rxd_a_mux[] = { + MSIOF2_RXD_A_MARK, +}; +static const unsigned int msiof2_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 4), +}; +static const unsigned int msiof2_clk_b_mux[] = { + MSIOF2_SCK_B_MARK, +}; +static const unsigned int msiof2_sync_b_pins[] = { + /* SYNC */ + RCAR_GP_PIN(0, 5), +}; +static const unsigned int msiof2_sync_b_mux[] = { + MSIOF2_SYNC_B_MARK, +}; +static const unsigned int msiof2_ss1_b_pins[] = { + /* SS1 */ + RCAR_GP_PIN(0, 0), +}; +static const unsigned int msiof2_ss1_b_mux[] = { + MSIOF2_SS1_B_MARK, +}; +static const unsigned int msiof2_ss2_b_pins[] = { + /* SS2 */ + RCAR_GP_PIN(0, 1), +}; +static const unsigned int msiof2_ss2_b_mux[] = { + MSIOF2_SS2_B_MARK, +}; +static const unsigned int msiof2_txd_b_pins[] = { + /* TXD */ + RCAR_GP_PIN(0, 7), +}; +static const unsigned int msiof2_txd_b_mux[] = { + MSIOF2_TXD_B_MARK, +}; +static const unsigned int msiof2_rxd_b_pins[] = { + /* RXD */ + RCAR_GP_PIN(0, 6), +}; +static const unsigned int msiof2_rxd_b_mux[] = { + MSIOF2_RXD_B_MARK, +}; +static const unsigned int msiof2_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 12), +}; +static const unsigned int msiof2_clk_c_mux[] = { + MSIOF2_SCK_C_MARK, +}; +static const unsigned int msiof2_sync_c_pins[] = { + /* SYNC */ + RCAR_GP_PIN(2, 11), +}; +static const unsigned int msiof2_sync_c_mux[] = { + MSIOF2_SYNC_C_MARK, +}; +static const unsigned int msiof2_ss1_c_pins[] = { + /* SS1 */ + RCAR_GP_PIN(2, 10), +}; +static const unsigned int msiof2_ss1_c_mux[] = { + MSIOF2_SS1_C_MARK, +}; +static const unsigned int msiof2_ss2_c_pins[] = { + /* SS2 */ + RCAR_GP_PIN(2, 9), +}; +static const unsigned int msiof2_ss2_c_mux[] = { + MSIOF2_SS2_C_MARK, +}; +static const unsigned int msiof2_txd_c_pins[] = { + /* TXD */ + RCAR_GP_PIN(2, 14), +}; +static const unsigned int msiof2_txd_c_mux[] = { + MSIOF2_TXD_C_MARK, +}; +static const unsigned int msiof2_rxd_c_pins[] = { + /* RXD */ + RCAR_GP_PIN(2, 13), +}; +static const unsigned int msiof2_rxd_c_mux[] = { + MSIOF2_RXD_C_MARK, +}; +static const unsigned int msiof2_clk_d_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 8), +}; +static const unsigned int msiof2_clk_d_mux[] = { + MSIOF2_SCK_D_MARK, +}; +static const unsigned int msiof2_sync_d_pins[] = { + /* SYNC */ + RCAR_GP_PIN(0, 9), +}; +static const unsigned int msiof2_sync_d_mux[] = { + MSIOF2_SYNC_D_MARK, +}; +static const unsigned int msiof2_ss1_d_pins[] = { + /* SS1 */ + RCAR_GP_PIN(0, 12), +}; +static const unsigned int msiof2_ss1_d_mux[] = { + MSIOF2_SS1_D_MARK, +}; +static const unsigned int msiof2_ss2_d_pins[] = { + /* SS2 */ + RCAR_GP_PIN(0, 13), +}; +static const unsigned int msiof2_ss2_d_mux[] = { + MSIOF2_SS2_D_MARK, +}; +static const unsigned int msiof2_txd_d_pins[] = { + /* TXD */ + RCAR_GP_PIN(0, 11), +}; +static const unsigned int msiof2_txd_d_mux[] = { + MSIOF2_TXD_D_MARK, +}; +static const unsigned int msiof2_rxd_d_pins[] = { + /* RXD */ + RCAR_GP_PIN(0, 10), +}; +static const unsigned int msiof2_rxd_d_mux[] = { + MSIOF2_RXD_D_MARK, +}; +/* - MSIOF3 ----------------------------------------------------------------- */ +static const unsigned int msiof3_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 0), +}; +static const unsigned int msiof3_clk_a_mux[] = { + MSIOF3_SCK_A_MARK, +}; +static const unsigned int msiof3_sync_a_pins[] = { + /* SYNC */ + RCAR_GP_PIN(0, 1), +}; +static const unsigned int msiof3_sync_a_mux[] = { + MSIOF3_SYNC_A_MARK, +}; +static const unsigned int msiof3_ss1_a_pins[] = { + /* SS1 */ + RCAR_GP_PIN(0, 14), +}; +static const unsigned int msiof3_ss1_a_mux[] = { + MSIOF3_SS1_A_MARK, +}; +static const unsigned int msiof3_ss2_a_pins[] = { + /* SS2 */ + RCAR_GP_PIN(0, 15), +}; +static const unsigned int msiof3_ss2_a_mux[] = { + MSIOF3_SS2_A_MARK, +}; +static const unsigned int msiof3_txd_a_pins[] = { + /* TXD */ + RCAR_GP_PIN(0, 3), +}; +static const unsigned int msiof3_txd_a_mux[] = { + MSIOF3_TXD_A_MARK, +}; +static const unsigned int msiof3_rxd_a_pins[] = { + /* RXD */ + RCAR_GP_PIN(0, 2), +}; +static const unsigned int msiof3_rxd_a_mux[] = { + MSIOF3_RXD_A_MARK, +}; +static const unsigned int msiof3_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 2), +}; +static const unsigned int msiof3_clk_b_mux[] = { + MSIOF3_SCK_B_MARK, +}; +static const unsigned int msiof3_sync_b_pins[] = { + /* SYNC */ + RCAR_GP_PIN(1, 0), +}; +static const unsigned int msiof3_sync_b_mux[] = { + MSIOF3_SYNC_B_MARK, +}; +static const unsigned int msiof3_ss1_b_pins[] = { + /* SS1 */ + RCAR_GP_PIN(1, 4), +}; +static const unsigned int msiof3_ss1_b_mux[] = { + MSIOF3_SS1_B_MARK, +}; +static const unsigned int msiof3_ss2_b_pins[] = { + /* SS2 */ + RCAR_GP_PIN(1, 5), +}; +static const unsigned int msiof3_ss2_b_mux[] = { + MSIOF3_SS2_B_MARK, +}; +static const unsigned int msiof3_txd_b_pins[] = { + /* TXD */ + RCAR_GP_PIN(1, 1), +}; +static const unsigned int msiof3_txd_b_mux[] = { + MSIOF3_TXD_B_MARK, +}; +static const unsigned int msiof3_rxd_b_pins[] = { + /* RXD */ + RCAR_GP_PIN(1, 3), +}; +static const unsigned int msiof3_rxd_b_mux[] = { + MSIOF3_RXD_B_MARK, +}; +static const unsigned int msiof3_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 12), +}; +static const unsigned int msiof3_clk_c_mux[] = { + MSIOF3_SCK_C_MARK, +}; +static const unsigned int msiof3_sync_c_pins[] = { + /* SYNC */ + RCAR_GP_PIN(1, 13), +}; +static const unsigned int msiof3_sync_c_mux[] = { + MSIOF3_SYNC_C_MARK, +}; +static const unsigned int msiof3_txd_c_pins[] = { + /* TXD */ + RCAR_GP_PIN(1, 15), +}; +static const unsigned int msiof3_txd_c_mux[] = { + MSIOF3_TXD_C_MARK, +}; +static const unsigned int msiof3_rxd_c_pins[] = { + /* RXD */ + RCAR_GP_PIN(1, 14), +}; +static const unsigned int msiof3_rxd_c_mux[] = { + MSIOF3_RXD_C_MARK, +}; +static const unsigned int msiof3_clk_d_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 22), +}; +static const unsigned int msiof3_clk_d_mux[] = { + MSIOF3_SCK_D_MARK, +}; +static const unsigned int msiof3_sync_d_pins[] = { + /* SYNC */ + RCAR_GP_PIN(1, 23), +}; +static const unsigned int msiof3_sync_d_mux[] = { + MSIOF3_SYNC_D_MARK, +}; +static const unsigned int msiof3_ss1_d_pins[] = { + /* SS1 */ + RCAR_GP_PIN(1, 26), +}; +static const unsigned int msiof3_ss1_d_mux[] = { + MSIOF3_SS1_D_MARK, +}; +static const unsigned int msiof3_txd_d_pins[] = { + /* TXD */ + RCAR_GP_PIN(1, 25), +}; +static const unsigned int msiof3_txd_d_mux[] = { + MSIOF3_TXD_D_MARK, +}; +static const unsigned int msiof3_rxd_d_pins[] = { + /* RXD */ + RCAR_GP_PIN(1, 24), +}; +static const unsigned int msiof3_rxd_d_mux[] = { + MSIOF3_RXD_D_MARK, +}; + +static const unsigned int msiof3_clk_e_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 3), +}; +static const unsigned int msiof3_clk_e_mux[] = { + MSIOF3_SCK_E_MARK, +}; +static const unsigned int msiof3_sync_e_pins[] = { + /* SYNC */ + RCAR_GP_PIN(2, 2), +}; +static const unsigned int msiof3_sync_e_mux[] = { + MSIOF3_SYNC_E_MARK, +}; +static const unsigned int msiof3_ss1_e_pins[] = { + /* SS1 */ + RCAR_GP_PIN(2, 1), +}; +static const unsigned int msiof3_ss1_e_mux[] = { + MSIOF3_SS1_E_MARK, +}; +static const unsigned int msiof3_ss2_e_pins[] = { + /* SS1 */ + RCAR_GP_PIN(2, 0), +}; +static const unsigned int msiof3_ss2_e_mux[] = { + MSIOF3_SS2_E_MARK, +}; +static const unsigned int msiof3_txd_e_pins[] = { + /* TXD */ + RCAR_GP_PIN(2, 5), +}; +static const unsigned int msiof3_txd_e_mux[] = { + MSIOF3_TXD_E_MARK, +}; +static const unsigned int msiof3_rxd_e_pins[] = { + /* RXD */ + RCAR_GP_PIN(2, 4), +}; +static const unsigned int msiof3_rxd_e_mux[] = { + MSIOF3_RXD_E_MARK, +}; + +/* - PWM0 --------------------------------------------------------------------*/ +static const unsigned int pwm0_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 6), +}; +static const unsigned int pwm0_mux[] = { + PWM0_MARK, +}; +/* - PWM1 --------------------------------------------------------------------*/ +static const unsigned int pwm1_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 7), +}; +static const unsigned int pwm1_a_mux[] = { + PWM1_A_MARK, +}; +static const unsigned int pwm1_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 8), +}; +static const unsigned int pwm1_b_mux[] = { + PWM1_B_MARK, +}; +/* - PWM2 --------------------------------------------------------------------*/ +static const unsigned int pwm2_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 8), +}; +static const unsigned int pwm2_a_mux[] = { + PWM2_A_MARK, +}; +static const unsigned int pwm2_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int pwm2_b_mux[] = { + PWM2_B_MARK, +}; +/* - PWM3 --------------------------------------------------------------------*/ +static const unsigned int pwm3_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 0), +}; +static const unsigned int pwm3_a_mux[] = { + PWM3_A_MARK, +}; +static const unsigned int pwm3_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 2), +}; +static const unsigned int pwm3_b_mux[] = { + PWM3_B_MARK, +}; +/* - PWM4 --------------------------------------------------------------------*/ +static const unsigned int pwm4_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 1), +}; +static const unsigned int pwm4_a_mux[] = { + PWM4_A_MARK, +}; +static const unsigned int pwm4_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 3), +}; +static const unsigned int pwm4_b_mux[] = { + PWM4_B_MARK, +}; +/* - PWM5 --------------------------------------------------------------------*/ +static const unsigned int pwm5_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 2), +}; +static const unsigned int pwm5_a_mux[] = { + PWM5_A_MARK, +}; +static const unsigned int pwm5_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 4), +}; +static const unsigned int pwm5_b_mux[] = { + PWM5_B_MARK, +}; +/* - PWM6 --------------------------------------------------------------------*/ +static const unsigned int pwm6_a_pins[] = { + /* PWM */ + RCAR_GP_PIN(1, 3), +}; +static const unsigned int pwm6_a_mux[] = { + PWM6_A_MARK, +}; +static const unsigned int pwm6_b_pins[] = { + /* PWM */ + RCAR_GP_PIN(2, 5), +}; +static const unsigned int pwm6_b_mux[] = { + PWM6_B_MARK, +}; + +/* - SCIF0 ------------------------------------------------------------------ */ +static const unsigned int scif0_data_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), +}; +static const unsigned int scif0_data_mux[] = { + RX0_MARK, TX0_MARK, +}; +static const unsigned int scif0_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int scif0_clk_mux[] = { + SCK0_MARK, +}; +static const unsigned int scif0_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3), +}; +static const unsigned int scif0_ctrl_mux[] = { + RTS0_N_TANS_MARK, CTS0_N_MARK, +}; +/* - SCIF1 ------------------------------------------------------------------ */ +static const unsigned int scif1_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), +}; +static const unsigned int scif1_data_a_mux[] = { + RX1_A_MARK, TX1_A_MARK, +}; +static const unsigned int scif1_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int scif1_clk_mux[] = { + SCK1_MARK, +}; +static const unsigned int scif1_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7), +}; +static const unsigned int scif1_ctrl_mux[] = { + RTS1_N_TANS_MARK, CTS1_N_MARK, +}; + +static const unsigned int scif1_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25), +}; +static const unsigned int scif1_data_b_mux[] = { + RX1_B_MARK, TX1_B_MARK, +}; +/* - SCIF2 ------------------------------------------------------------------ */ +static const unsigned int scif2_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10), +}; +static const unsigned int scif2_data_a_mux[] = { + RX2_A_MARK, TX2_A_MARK, +}; +static const unsigned int scif2_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 9), +}; +static const unsigned int scif2_clk_mux[] = { + SCK2_MARK, +}; +static const unsigned int scif2_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), +}; +static const unsigned int scif2_data_b_mux[] = { + RX2_B_MARK, TX2_B_MARK, +}; +/* - SCIF3 ------------------------------------------------------------------ */ +static const unsigned int scif3_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24), +}; +static const unsigned int scif3_data_a_mux[] = { + RX3_A_MARK, TX3_A_MARK, +}; +static const unsigned int scif3_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 22), +}; +static const unsigned int scif3_clk_mux[] = { + SCK3_MARK, +}; +static const unsigned int scif3_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25), +}; +static const unsigned int scif3_ctrl_mux[] = { + RTS3_N_TANS_MARK, CTS3_N_MARK, +}; +static const unsigned int scif3_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11), +}; +static const unsigned int scif3_data_b_mux[] = { + RX3_B_MARK, TX3_B_MARK, +}; +/* - SCIF4 ------------------------------------------------------------------ */ +static const unsigned int scif4_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), +}; +static const unsigned int scif4_data_a_mux[] = { + RX4_A_MARK, TX4_A_MARK, +}; +static const unsigned int scif4_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(2, 10), +}; +static const unsigned int scif4_clk_a_mux[] = { + SCK4_A_MARK, +}; +static const unsigned int scif4_ctrl_a_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13), +}; +static const unsigned int scif4_ctrl_a_mux[] = { + RTS4_N_TANS_A_MARK, CTS4_N_A_MARK, +}; +static const unsigned int scif4_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), +}; +static const unsigned int scif4_data_b_mux[] = { + RX4_B_MARK, TX4_B_MARK, +}; +static const unsigned int scif4_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 5), +}; +static const unsigned int scif4_clk_b_mux[] = { + SCK4_B_MARK, +}; +static const unsigned int scif4_ctrl_b_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 9), +}; +static const unsigned int scif4_ctrl_b_mux[] = { + RTS4_N_TANS_B_MARK, CTS4_N_B_MARK, +}; +static const unsigned int scif4_data_c_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), +}; +static const unsigned int scif4_data_c_mux[] = { + RX4_C_MARK, TX4_C_MARK, +}; +static const unsigned int scif4_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(0, 8), +}; +static const unsigned int scif4_clk_c_mux[] = { + SCK4_C_MARK, +}; +static const unsigned int scif4_ctrl_c_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 10), +}; +static const unsigned int scif4_ctrl_c_mux[] = { + RTS4_N_TANS_C_MARK, CTS4_N_C_MARK, +}; +/* - SCIF5 ------------------------------------------------------------------ */ +static const unsigned int scif5_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21), +}; +static const unsigned int scif5_data_a_mux[] = { + RX5_A_MARK, TX5_A_MARK, +}; +static const unsigned int scif5_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int scif5_clk_a_mux[] = { + SCK5_A_MARK, +}; + +static const unsigned int scif5_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 18), +}; +static const unsigned int scif5_data_b_mux[] = { + RX5_B_MARK, TX5_B_MARK, +}; +static const unsigned int scif5_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int scif5_clk_b_mux[] = { + SCK5_B_MARK, +}; + +/* - SCIF Clock ------------------------------------------------------------- */ +static const unsigned int scif_clk_a_pins[] = { + /* SCIF_CLK */ + RCAR_GP_PIN(6, 23), +}; +static const unsigned int scif_clk_a_mux[] = { + SCIF_CLK_A_MARK, +}; +static const unsigned int scif_clk_b_pins[] = { + /* SCIF_CLK */ + RCAR_GP_PIN(5, 9), +}; +static const unsigned int scif_clk_b_mux[] = { + SCIF_CLK_B_MARK, +}; + +/* - SDHI0 ------------------------------------------------------------------ */ +static const unsigned int sdhi0_data1_pins[] = { + /* D0 */ + RCAR_GP_PIN(3, 2), +}; +static const unsigned int sdhi0_data1_mux[] = { + SD0_DAT0_MARK, +}; +static const unsigned int sdhi0_data4_pins[] = { + /* D[0:3] */ + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), + RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), +}; +static const unsigned int sdhi0_data4_mux[] = { + SD0_DAT0_MARK, SD0_DAT1_MARK, + SD0_DAT2_MARK, SD0_DAT3_MARK, +}; +static const unsigned int sdhi0_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), +}; +static const unsigned int sdhi0_ctrl_mux[] = { + SD0_CLK_MARK, SD0_CMD_MARK, +}; +static const unsigned int sdhi0_cd_pins[] = { + /* CD */ + RCAR_GP_PIN(3, 12), +}; +static const unsigned int sdhi0_cd_mux[] = { + SD0_CD_MARK, +}; +static const unsigned int sdhi0_wp_pins[] = { + /* WP */ + RCAR_GP_PIN(3, 13), +}; +static const unsigned int sdhi0_wp_mux[] = { + SD0_WP_MARK, +}; +/* - SDHI1 ------------------------------------------------------------------ */ +static const unsigned int sdhi1_data1_pins[] = { + /* D0 */ + RCAR_GP_PIN(3, 8), +}; +static const unsigned int sdhi1_data1_mux[] = { + SD1_DAT0_MARK, +}; +static const unsigned int sdhi1_data4_pins[] = { + /* D[0:3] */ + RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), +}; +static const unsigned int sdhi1_data4_mux[] = { + SD1_DAT0_MARK, SD1_DAT1_MARK, + SD1_DAT2_MARK, SD1_DAT3_MARK, +}; +static const unsigned int sdhi1_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), +}; +static const unsigned int sdhi1_ctrl_mux[] = { + SD1_CLK_MARK, SD1_CMD_MARK, +}; +static const unsigned int sdhi1_cd_pins[] = { + /* CD */ + RCAR_GP_PIN(3, 14), +}; +static const unsigned int sdhi1_cd_mux[] = { + SD1_CD_MARK, +}; +static const unsigned int sdhi1_wp_pins[] = { + /* WP */ + RCAR_GP_PIN(3, 15), +}; +static const unsigned int sdhi1_wp_mux[] = { + SD1_WP_MARK, +}; +/* - SDHI2 ------------------------------------------------------------------ */ +static const unsigned int sdhi2_data1_pins[] = { + /* D0 */ + RCAR_GP_PIN(4, 2), +}; +static const unsigned int sdhi2_data1_mux[] = { + SD2_DAT0_MARK, +}; +static const unsigned int sdhi2_data4_pins[] = { + /* D[0:3] */ + RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3), + RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), +}; +static const unsigned int sdhi2_data4_mux[] = { + SD2_DAT0_MARK, SD2_DAT1_MARK, + SD2_DAT2_MARK, SD2_DAT3_MARK, +}; +static const unsigned int sdhi2_data8_pins[] = { + /* D[0:7] */ + RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3), + RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5), + RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), +}; +static const unsigned int sdhi2_data8_mux[] = { + SD2_DAT0_MARK, SD2_DAT1_MARK, + SD2_DAT2_MARK, SD2_DAT3_MARK, + SD2_DAT4_MARK, SD2_DAT5_MARK, + SD2_DAT6_MARK, SD2_DAT7_MARK, +}; +static const unsigned int sdhi2_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), +}; +static const unsigned int sdhi2_ctrl_mux[] = { + SD2_CLK_MARK, SD2_CMD_MARK, +}; +static const unsigned int sdhi2_cd_a_pins[] = { + /* CD */ + RCAR_GP_PIN(4, 13), +}; +static const unsigned int sdhi2_cd_a_mux[] = { + SD2_CD_A_MARK, +}; +static const unsigned int sdhi2_cd_b_pins[] = { + /* CD */ + RCAR_GP_PIN(5, 10), +}; +static const unsigned int sdhi2_cd_b_mux[] = { + SD2_CD_B_MARK, +}; +static const unsigned int sdhi2_wp_a_pins[] = { + /* WP */ + RCAR_GP_PIN(4, 14), +}; +static const unsigned int sdhi2_wp_a_mux[] = { + SD2_WP_A_MARK, +}; +static const unsigned int sdhi2_wp_b_pins[] = { + /* WP */ + RCAR_GP_PIN(5, 11), +}; +static const unsigned int sdhi2_wp_b_mux[] = { + SD2_WP_B_MARK, +}; +static const unsigned int sdhi2_ds_pins[] = { + /* DS */ + RCAR_GP_PIN(4, 6), +}; +static const unsigned int sdhi2_ds_mux[] = { + SD2_DS_MARK, +}; +/* - SDHI3 ------------------------------------------------------------------ */ +static const unsigned int sdhi3_data1_pins[] = { + /* D0 */ + RCAR_GP_PIN(4, 9), +}; +static const unsigned int sdhi3_data1_mux[] = { + SD3_DAT0_MARK, +}; +static const unsigned int sdhi3_data4_pins[] = { + /* D[0:3] */ + RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), + RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), +}; +static const unsigned int sdhi3_data4_mux[] = { + SD3_DAT0_MARK, SD3_DAT1_MARK, + SD3_DAT2_MARK, SD3_DAT3_MARK, +}; +static const unsigned int sdhi3_data8_pins[] = { + /* D[0:7] */ + RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), + RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), + RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14), + RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), +}; +static const unsigned int sdhi3_data8_mux[] = { + SD3_DAT0_MARK, SD3_DAT1_MARK, + SD3_DAT2_MARK, SD3_DAT3_MARK, + SD3_DAT4_MARK, SD3_DAT5_MARK, + SD3_DAT6_MARK, SD3_DAT7_MARK, +}; +static const unsigned int sdhi3_ctrl_pins[] = { + /* CLK, CMD */ + RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8), +}; +static const unsigned int sdhi3_ctrl_mux[] = { + SD3_CLK_MARK, SD3_CMD_MARK, +}; +static const unsigned int sdhi3_cd_pins[] = { + /* CD */ + RCAR_GP_PIN(4, 15), +}; +static const unsigned int sdhi3_cd_mux[] = { + SD3_CD_MARK, +}; +static const unsigned int sdhi3_wp_pins[] = { + /* WP */ + RCAR_GP_PIN(4, 16), +}; +static const unsigned int sdhi3_wp_mux[] = { + SD3_WP_MARK, +}; +static const unsigned int sdhi3_ds_pins[] = { + /* DS */ + RCAR_GP_PIN(4, 17), +}; +static const unsigned int sdhi3_ds_mux[] = { + SD3_DS_MARK, +}; + +/* - SSI -------------------------------------------------------------------- */ +static const unsigned int ssi0_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 2), +}; +static const unsigned int ssi0_data_mux[] = { + SSI_SDATA0_MARK, +}; +static const unsigned int ssi01239_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), +}; +static const unsigned int ssi01239_ctrl_mux[] = { + SSI_SCK01239_MARK, SSI_WS01239_MARK, +}; +static const unsigned int ssi1_data_a_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 3), +}; +static const unsigned int ssi1_data_a_mux[] = { + SSI_SDATA1_A_MARK, +}; +static const unsigned int ssi1_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int ssi1_data_b_mux[] = { + SSI_SDATA1_B_MARK, +}; +static const unsigned int ssi1_ctrl_a_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), +}; +static const unsigned int ssi1_ctrl_a_mux[] = { + SSI_SCK1_A_MARK, SSI_WS1_A_MARK, +}; +static const unsigned int ssi1_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 21), +}; +static const unsigned int ssi1_ctrl_b_mux[] = { + SSI_SCK1_B_MARK, SSI_WS1_B_MARK, +}; +static const unsigned int ssi2_data_a_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 4), +}; +static const unsigned int ssi2_data_a_mux[] = { + SSI_SDATA2_A_MARK, +}; +static const unsigned int ssi2_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int ssi2_data_b_mux[] = { + SSI_SDATA2_B_MARK, +}; +static const unsigned int ssi2_ctrl_a_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21), +}; +static const unsigned int ssi2_ctrl_a_mux[] = { + SSI_SCK2_A_MARK, SSI_WS2_A_MARK, +}; +static const unsigned int ssi2_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), +}; +static const unsigned int ssi2_ctrl_b_mux[] = { + SSI_SCK2_B_MARK, SSI_WS2_B_MARK, +}; +static const unsigned int ssi3_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 7), +}; +static const unsigned int ssi3_data_mux[] = { + SSI_SDATA3_MARK, +}; +static const unsigned int ssi349_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6), +}; +static const unsigned int ssi349_ctrl_mux[] = { + SSI_SCK349_MARK, SSI_WS349_MARK, +}; +static const unsigned int ssi4_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int ssi4_data_mux[] = { + SSI_SDATA4_MARK, +}; +static const unsigned int ssi4_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), +}; +static const unsigned int ssi4_ctrl_mux[] = { + SSI_SCK4_MARK, SSI_WS4_MARK, +}; +static const unsigned int ssi5_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 13), +}; +static const unsigned int ssi5_data_mux[] = { + SSI_SDATA5_MARK, +}; +static const unsigned int ssi5_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 11), RCAR_GP_PIN(6, 12), +}; +static const unsigned int ssi5_ctrl_mux[] = { + SSI_SCK5_MARK, SSI_WS5_MARK, +}; +static const unsigned int ssi6_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 16), +}; +static const unsigned int ssi6_data_mux[] = { + SSI_SDATA6_MARK, +}; +static const unsigned int ssi6_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), +}; +static const unsigned int ssi6_ctrl_mux[] = { + SSI_SCK6_MARK, SSI_WS6_MARK, +}; +static const unsigned int ssi7_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 19), +}; +static const unsigned int ssi7_data_mux[] = { + SSI_SDATA7_MARK, +}; +static const unsigned int ssi78_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), +}; +static const unsigned int ssi78_ctrl_mux[] = { + SSI_SCK78_MARK, SSI_WS78_MARK, +}; +static const unsigned int ssi8_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 20), +}; +static const unsigned int ssi8_data_mux[] = { + SSI_SDATA8_MARK, +}; +static const unsigned int ssi9_data_a_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int ssi9_data_a_mux[] = { + SSI_SDATA9_A_MARK, +}; +static const unsigned int ssi9_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int ssi9_data_b_mux[] = { + SSI_SDATA9_B_MARK, +}; +static const unsigned int ssi9_ctrl_a_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), +}; +static const unsigned int ssi9_ctrl_a_mux[] = { + SSI_SCK9_A_MARK, SSI_WS9_A_MARK, +}; +static const unsigned int ssi9_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31), +}; +static const unsigned int ssi9_ctrl_b_mux[] = { + SSI_SCK9_B_MARK, SSI_WS9_B_MARK, +}; + +/* - USB0 ------------------------------------------------------------------- */ +static const unsigned int usb0_pins[] = { + /* PWEN, OVC */ + RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), +}; +static const unsigned int usb0_mux[] = { + USB0_PWEN_MARK, USB0_OVC_MARK, +}; +/* - USB1 ------------------------------------------------------------------- */ +static const unsigned int usb1_pins[] = { + /* PWEN, OVC */ + RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), +}; +static const unsigned int usb1_mux[] = { + USB1_PWEN_MARK, USB1_OVC_MARK, +}; + +/* - USB30 ------------------------------------------------------------------ */ +static const unsigned int usb30_pins[] = { + /* PWEN, OVC */ + RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), +}; +static const unsigned int usb30_mux[] = { + USB30_PWEN_MARK, USB30_OVC_MARK, +}; + +static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(audio_clk_a_a), + SH_PFC_PIN_GROUP(audio_clk_a_b), + SH_PFC_PIN_GROUP(audio_clk_a_c), + SH_PFC_PIN_GROUP(audio_clk_b_a), + SH_PFC_PIN_GROUP(audio_clk_b_b), + SH_PFC_PIN_GROUP(audio_clk_c_a), + SH_PFC_PIN_GROUP(audio_clk_c_b), + SH_PFC_PIN_GROUP(audio_clkout_a), + SH_PFC_PIN_GROUP(audio_clkout_b), + SH_PFC_PIN_GROUP(audio_clkout_c), + SH_PFC_PIN_GROUP(audio_clkout_d), + SH_PFC_PIN_GROUP(audio_clkout1_a), + SH_PFC_PIN_GROUP(audio_clkout1_b), + SH_PFC_PIN_GROUP(audio_clkout2_a), + SH_PFC_PIN_GROUP(audio_clkout2_b), + SH_PFC_PIN_GROUP(audio_clkout3_a), + SH_PFC_PIN_GROUP(audio_clkout3_b), + SH_PFC_PIN_GROUP(avb_link), + SH_PFC_PIN_GROUP(avb_magic), + SH_PFC_PIN_GROUP(avb_phy_int), + SH_PFC_PIN_GROUP(avb_mdc), + SH_PFC_PIN_GROUP(avb_mii), + SH_PFC_PIN_GROUP(avb_avtp_pps), + SH_PFC_PIN_GROUP(avb_avtp_match_a), + SH_PFC_PIN_GROUP(avb_avtp_capture_a), + SH_PFC_PIN_GROUP(avb_avtp_match_b), + SH_PFC_PIN_GROUP(avb_avtp_capture_b), + SH_PFC_PIN_GROUP(can0_data_a), + SH_PFC_PIN_GROUP(can0_data_b), + SH_PFC_PIN_GROUP(can1_data), + SH_PFC_PIN_GROUP(can_clk), + SH_PFC_PIN_GROUP(canfd0_data_a), + SH_PFC_PIN_GROUP(canfd0_data_b), + SH_PFC_PIN_GROUP(canfd1_data), + SH_PFC_PIN_GROUP(drif0_ctrl_a), + SH_PFC_PIN_GROUP(drif0_data0_a), + SH_PFC_PIN_GROUP(drif0_data1_a), + SH_PFC_PIN_GROUP(drif0_ctrl_b), + SH_PFC_PIN_GROUP(drif0_data0_b), + SH_PFC_PIN_GROUP(drif0_data1_b), + SH_PFC_PIN_GROUP(drif0_ctrl_c), + SH_PFC_PIN_GROUP(drif0_data0_c), + SH_PFC_PIN_GROUP(drif0_data1_c), + SH_PFC_PIN_GROUP(drif1_ctrl_a), + SH_PFC_PIN_GROUP(drif1_data0_a), + SH_PFC_PIN_GROUP(drif1_data1_a), + SH_PFC_PIN_GROUP(drif1_ctrl_b), + SH_PFC_PIN_GROUP(drif1_data0_b), + SH_PFC_PIN_GROUP(drif1_data1_b), + SH_PFC_PIN_GROUP(drif1_ctrl_c), + SH_PFC_PIN_GROUP(drif1_data0_c), + SH_PFC_PIN_GROUP(drif1_data1_c), + SH_PFC_PIN_GROUP(drif2_ctrl_a), + SH_PFC_PIN_GROUP(drif2_data0_a), + SH_PFC_PIN_GROUP(drif2_data1_a), + SH_PFC_PIN_GROUP(drif2_ctrl_b), + SH_PFC_PIN_GROUP(drif2_data0_b), + SH_PFC_PIN_GROUP(drif2_data1_b), + SH_PFC_PIN_GROUP(drif3_ctrl_a), + SH_PFC_PIN_GROUP(drif3_data0_a), + SH_PFC_PIN_GROUP(drif3_data1_a), + SH_PFC_PIN_GROUP(drif3_ctrl_b), + SH_PFC_PIN_GROUP(drif3_data0_b), + SH_PFC_PIN_GROUP(drif3_data1_b), + SH_PFC_PIN_GROUP(du_rgb666), + SH_PFC_PIN_GROUP(du_rgb888), + SH_PFC_PIN_GROUP(du_clk_out_0), + SH_PFC_PIN_GROUP(du_clk_out_1), + SH_PFC_PIN_GROUP(du_sync), + SH_PFC_PIN_GROUP(du_oddf), + SH_PFC_PIN_GROUP(du_cde), + SH_PFC_PIN_GROUP(du_disp), + SH_PFC_PIN_GROUP(hscif0_data), + SH_PFC_PIN_GROUP(hscif0_clk), + SH_PFC_PIN_GROUP(hscif0_ctrl), + SH_PFC_PIN_GROUP(hscif1_data_a), + SH_PFC_PIN_GROUP(hscif1_clk_a), + SH_PFC_PIN_GROUP(hscif1_ctrl_a), + SH_PFC_PIN_GROUP(hscif1_data_b), + SH_PFC_PIN_GROUP(hscif1_clk_b), + SH_PFC_PIN_GROUP(hscif1_ctrl_b), + SH_PFC_PIN_GROUP(hscif2_data_a), + SH_PFC_PIN_GROUP(hscif2_clk_a), + SH_PFC_PIN_GROUP(hscif2_ctrl_a), + SH_PFC_PIN_GROUP(hscif2_data_b), + SH_PFC_PIN_GROUP(hscif2_clk_b), + SH_PFC_PIN_GROUP(hscif2_ctrl_b), + SH_PFC_PIN_GROUP(hscif2_data_c), + SH_PFC_PIN_GROUP(hscif2_clk_c), + SH_PFC_PIN_GROUP(hscif2_ctrl_c), + SH_PFC_PIN_GROUP(hscif3_data_a), + SH_PFC_PIN_GROUP(hscif3_clk), + SH_PFC_PIN_GROUP(hscif3_ctrl), + SH_PFC_PIN_GROUP(hscif3_data_b), + SH_PFC_PIN_GROUP(hscif3_data_c), + SH_PFC_PIN_GROUP(hscif3_data_d), + SH_PFC_PIN_GROUP(hscif4_data_a), + SH_PFC_PIN_GROUP(hscif4_clk), + SH_PFC_PIN_GROUP(hscif4_ctrl), + SH_PFC_PIN_GROUP(hscif4_data_b), + SH_PFC_PIN_GROUP(i2c1_a), + SH_PFC_PIN_GROUP(i2c1_b), + SH_PFC_PIN_GROUP(i2c2_a), + SH_PFC_PIN_GROUP(i2c2_b), + SH_PFC_PIN_GROUP(i2c6_a), + SH_PFC_PIN_GROUP(i2c6_b), + SH_PFC_PIN_GROUP(i2c6_c), + SH_PFC_PIN_GROUP(msiof0_clk), + SH_PFC_PIN_GROUP(msiof0_sync), + SH_PFC_PIN_GROUP(msiof0_ss1), + SH_PFC_PIN_GROUP(msiof0_ss2), + SH_PFC_PIN_GROUP(msiof0_txd), + SH_PFC_PIN_GROUP(msiof0_rxd), + SH_PFC_PIN_GROUP(msiof1_clk_a), + SH_PFC_PIN_GROUP(msiof1_sync_a), + SH_PFC_PIN_GROUP(msiof1_ss1_a), + SH_PFC_PIN_GROUP(msiof1_ss2_a), + SH_PFC_PIN_GROUP(msiof1_txd_a), + SH_PFC_PIN_GROUP(msiof1_rxd_a), + SH_PFC_PIN_GROUP(msiof1_clk_b), + SH_PFC_PIN_GROUP(msiof1_sync_b), + SH_PFC_PIN_GROUP(msiof1_ss1_b), + SH_PFC_PIN_GROUP(msiof1_ss2_b), + SH_PFC_PIN_GROUP(msiof1_txd_b), + SH_PFC_PIN_GROUP(msiof1_rxd_b), + SH_PFC_PIN_GROUP(msiof1_clk_c), + SH_PFC_PIN_GROUP(msiof1_sync_c), + SH_PFC_PIN_GROUP(msiof1_ss1_c), + SH_PFC_PIN_GROUP(msiof1_ss2_c), + SH_PFC_PIN_GROUP(msiof1_txd_c), + SH_PFC_PIN_GROUP(msiof1_rxd_c), + SH_PFC_PIN_GROUP(msiof1_clk_d), + SH_PFC_PIN_GROUP(msiof1_sync_d), + SH_PFC_PIN_GROUP(msiof1_ss1_d), + SH_PFC_PIN_GROUP(msiof1_ss2_d), + SH_PFC_PIN_GROUP(msiof1_txd_d), + SH_PFC_PIN_GROUP(msiof1_rxd_d), + SH_PFC_PIN_GROUP(msiof1_clk_e), + SH_PFC_PIN_GROUP(msiof1_sync_e), + SH_PFC_PIN_GROUP(msiof1_ss1_e), + SH_PFC_PIN_GROUP(msiof1_ss2_e), + SH_PFC_PIN_GROUP(msiof1_txd_e), + SH_PFC_PIN_GROUP(msiof1_rxd_e), + SH_PFC_PIN_GROUP(msiof1_clk_f), + SH_PFC_PIN_GROUP(msiof1_sync_f), + SH_PFC_PIN_GROUP(msiof1_ss1_f), + SH_PFC_PIN_GROUP(msiof1_ss2_f), + SH_PFC_PIN_GROUP(msiof1_txd_f), + SH_PFC_PIN_GROUP(msiof1_rxd_f), + SH_PFC_PIN_GROUP(msiof1_clk_g), + SH_PFC_PIN_GROUP(msiof1_sync_g), + SH_PFC_PIN_GROUP(msiof1_ss1_g), + SH_PFC_PIN_GROUP(msiof1_ss2_g), + SH_PFC_PIN_GROUP(msiof1_txd_g), + SH_PFC_PIN_GROUP(msiof1_rxd_g), + SH_PFC_PIN_GROUP(msiof2_clk_a), + SH_PFC_PIN_GROUP(msiof2_sync_a), + SH_PFC_PIN_GROUP(msiof2_ss1_a), + SH_PFC_PIN_GROUP(msiof2_ss2_a), + SH_PFC_PIN_GROUP(msiof2_txd_a), + SH_PFC_PIN_GROUP(msiof2_rxd_a), + SH_PFC_PIN_GROUP(msiof2_clk_b), + SH_PFC_PIN_GROUP(msiof2_sync_b), + SH_PFC_PIN_GROUP(msiof2_ss1_b), + SH_PFC_PIN_GROUP(msiof2_ss2_b), + SH_PFC_PIN_GROUP(msiof2_txd_b), + SH_PFC_PIN_GROUP(msiof2_rxd_b), + SH_PFC_PIN_GROUP(msiof2_clk_c), + SH_PFC_PIN_GROUP(msiof2_sync_c), + SH_PFC_PIN_GROUP(msiof2_ss1_c), + SH_PFC_PIN_GROUP(msiof2_ss2_c), + SH_PFC_PIN_GROUP(msiof2_txd_c), + SH_PFC_PIN_GROUP(msiof2_rxd_c), + SH_PFC_PIN_GROUP(msiof2_clk_d), + SH_PFC_PIN_GROUP(msiof2_sync_d), + SH_PFC_PIN_GROUP(msiof2_ss1_d), + SH_PFC_PIN_GROUP(msiof2_ss2_d), + SH_PFC_PIN_GROUP(msiof2_txd_d), + SH_PFC_PIN_GROUP(msiof2_rxd_d), + SH_PFC_PIN_GROUP(msiof3_clk_a), + SH_PFC_PIN_GROUP(msiof3_sync_a), + SH_PFC_PIN_GROUP(msiof3_ss1_a), + SH_PFC_PIN_GROUP(msiof3_ss2_a), + SH_PFC_PIN_GROUP(msiof3_txd_a), + SH_PFC_PIN_GROUP(msiof3_rxd_a), + SH_PFC_PIN_GROUP(msiof3_clk_b), + SH_PFC_PIN_GROUP(msiof3_sync_b), + SH_PFC_PIN_GROUP(msiof3_ss1_b), + SH_PFC_PIN_GROUP(msiof3_ss2_b), + SH_PFC_PIN_GROUP(msiof3_txd_b), + SH_PFC_PIN_GROUP(msiof3_rxd_b), + SH_PFC_PIN_GROUP(msiof3_clk_c), + SH_PFC_PIN_GROUP(msiof3_sync_c), + SH_PFC_PIN_GROUP(msiof3_txd_c), + SH_PFC_PIN_GROUP(msiof3_rxd_c), + SH_PFC_PIN_GROUP(msiof3_clk_d), + SH_PFC_PIN_GROUP(msiof3_sync_d), + SH_PFC_PIN_GROUP(msiof3_ss1_d), + SH_PFC_PIN_GROUP(msiof3_txd_d), + SH_PFC_PIN_GROUP(msiof3_rxd_d), + SH_PFC_PIN_GROUP(msiof3_clk_e), + SH_PFC_PIN_GROUP(msiof3_sync_e), + SH_PFC_PIN_GROUP(msiof3_ss1_e), + SH_PFC_PIN_GROUP(msiof3_ss2_e), + SH_PFC_PIN_GROUP(msiof3_txd_e), + SH_PFC_PIN_GROUP(msiof3_rxd_e), + SH_PFC_PIN_GROUP(pwm0), + SH_PFC_PIN_GROUP(pwm1_a), + SH_PFC_PIN_GROUP(pwm1_b), + SH_PFC_PIN_GROUP(pwm2_a), + SH_PFC_PIN_GROUP(pwm2_b), + SH_PFC_PIN_GROUP(pwm3_a), + SH_PFC_PIN_GROUP(pwm3_b), + SH_PFC_PIN_GROUP(pwm4_a), + SH_PFC_PIN_GROUP(pwm4_b), + SH_PFC_PIN_GROUP(pwm5_a), + SH_PFC_PIN_GROUP(pwm5_b), + SH_PFC_PIN_GROUP(pwm6_a), + SH_PFC_PIN_GROUP(pwm6_b), + SH_PFC_PIN_GROUP(scif0_data), + SH_PFC_PIN_GROUP(scif0_clk), + SH_PFC_PIN_GROUP(scif0_ctrl), + SH_PFC_PIN_GROUP(scif1_data_a), + SH_PFC_PIN_GROUP(scif1_clk), + SH_PFC_PIN_GROUP(scif1_ctrl), + SH_PFC_PIN_GROUP(scif1_data_b), + SH_PFC_PIN_GROUP(scif2_data_a), + SH_PFC_PIN_GROUP(scif2_clk), + SH_PFC_PIN_GROUP(scif2_data_b), + SH_PFC_PIN_GROUP(scif3_data_a), + SH_PFC_PIN_GROUP(scif3_clk), + SH_PFC_PIN_GROUP(scif3_ctrl), + SH_PFC_PIN_GROUP(scif3_data_b), + SH_PFC_PIN_GROUP(scif4_data_a), + SH_PFC_PIN_GROUP(scif4_clk_a), + SH_PFC_PIN_GROUP(scif4_ctrl_a), + SH_PFC_PIN_GROUP(scif4_data_b), + SH_PFC_PIN_GROUP(scif4_clk_b), + SH_PFC_PIN_GROUP(scif4_ctrl_b), + SH_PFC_PIN_GROUP(scif4_data_c), + SH_PFC_PIN_GROUP(scif4_clk_c), + SH_PFC_PIN_GROUP(scif4_ctrl_c), + SH_PFC_PIN_GROUP(scif5_data_a), + SH_PFC_PIN_GROUP(scif5_clk_a), + SH_PFC_PIN_GROUP(scif5_data_b), + SH_PFC_PIN_GROUP(scif5_clk_b), + SH_PFC_PIN_GROUP(scif_clk_a), + SH_PFC_PIN_GROUP(scif_clk_b), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi1_cd), + SH_PFC_PIN_GROUP(sdhi1_wp), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_data8), + SH_PFC_PIN_GROUP(sdhi2_ctrl), + SH_PFC_PIN_GROUP(sdhi2_cd_a), + SH_PFC_PIN_GROUP(sdhi2_wp_a), + SH_PFC_PIN_GROUP(sdhi2_cd_b), + SH_PFC_PIN_GROUP(sdhi2_wp_b), + SH_PFC_PIN_GROUP(sdhi2_ds), + SH_PFC_PIN_GROUP(sdhi3_data1), + SH_PFC_PIN_GROUP(sdhi3_data4), + SH_PFC_PIN_GROUP(sdhi3_data8), + SH_PFC_PIN_GROUP(sdhi3_ctrl), + SH_PFC_PIN_GROUP(sdhi3_cd), + SH_PFC_PIN_GROUP(sdhi3_wp), + SH_PFC_PIN_GROUP(sdhi3_ds), + SH_PFC_PIN_GROUP(ssi0_data), + SH_PFC_PIN_GROUP(ssi01239_ctrl), + SH_PFC_PIN_GROUP(ssi1_data_a), + SH_PFC_PIN_GROUP(ssi1_data_b), + SH_PFC_PIN_GROUP(ssi1_ctrl_a), + SH_PFC_PIN_GROUP(ssi1_ctrl_b), + SH_PFC_PIN_GROUP(ssi2_data_a), + SH_PFC_PIN_GROUP(ssi2_data_b), + SH_PFC_PIN_GROUP(ssi2_ctrl_a), + SH_PFC_PIN_GROUP(ssi2_ctrl_b), + SH_PFC_PIN_GROUP(ssi3_data), + SH_PFC_PIN_GROUP(ssi349_ctrl), + SH_PFC_PIN_GROUP(ssi4_data), + SH_PFC_PIN_GROUP(ssi4_ctrl), + SH_PFC_PIN_GROUP(ssi5_data), + SH_PFC_PIN_GROUP(ssi5_ctrl), + SH_PFC_PIN_GROUP(ssi6_data), + SH_PFC_PIN_GROUP(ssi6_ctrl), + SH_PFC_PIN_GROUP(ssi7_data), + SH_PFC_PIN_GROUP(ssi78_ctrl), + SH_PFC_PIN_GROUP(ssi8_data), + SH_PFC_PIN_GROUP(ssi9_data_a), + SH_PFC_PIN_GROUP(ssi9_data_b), + SH_PFC_PIN_GROUP(ssi9_ctrl_a), + SH_PFC_PIN_GROUP(ssi9_ctrl_b), + SH_PFC_PIN_GROUP(usb0), + SH_PFC_PIN_GROUP(usb1), + SH_PFC_PIN_GROUP(usb30), +}; + +static const char * const audio_clk_groups[] = { + "audio_clk_a_a", + "audio_clk_a_b", + "audio_clk_a_c", + "audio_clk_b_a", + "audio_clk_b_b", + "audio_clk_c_a", + "audio_clk_c_b", + "audio_clkout_a", + "audio_clkout_b", + "audio_clkout_c", + "audio_clkout_d", + "audio_clkout1_a", + "audio_clkout1_b", + "audio_clkout2_a", + "audio_clkout2_b", + "audio_clkout3_a", + "audio_clkout3_b", +}; + +static const char * const avb_groups[] = { + "avb_link", + "avb_magic", + "avb_phy_int", + "avb_mdc", + "avb_mii", + "avb_avtp_pps", + "avb_avtp_match_a", + "avb_avtp_capture_a", + "avb_avtp_match_b", + "avb_avtp_capture_b", +}; + +static const char * const can0_groups[] = { + "can0_data_a", + "can0_data_b", +}; + +static const char * const can1_groups[] = { + "can1_data", +}; + +static const char * const can_clk_groups[] = { + "can_clk", +}; + +static const char * const canfd0_groups[] = { + "canfd0_data_a", + "canfd0_data_b", +}; + +static const char * const canfd1_groups[] = { + "canfd1_data", +}; + +static const char * const drif0_groups[] = { + "drif0_ctrl_a", + "drif0_data0_a", + "drif0_data1_a", + "drif0_ctrl_b", + "drif0_data0_b", + "drif0_data1_b", + "drif0_ctrl_c", + "drif0_data0_c", + "drif0_data1_c", +}; + +static const char * const drif1_groups[] = { + "drif1_ctrl_a", + "drif1_data0_a", + "drif1_data1_a", + "drif1_ctrl_b", + "drif1_data0_b", + "drif1_data1_b", + "drif1_ctrl_c", + "drif1_data0_c", + "drif1_data1_c", +}; + +static const char * const drif2_groups[] = { + "drif2_ctrl_a", + "drif2_data0_a", + "drif2_data1_a", + "drif2_ctrl_b", + "drif2_data0_b", + "drif2_data1_b", +}; + +static const char * const drif3_groups[] = { + "drif3_ctrl_a", + "drif3_data0_a", + "drif3_data1_a", + "drif3_ctrl_b", + "drif3_data0_b", + "drif3_data1_b", +}; + +static const char * const du_groups[] = { + "du_rgb666", + "du_rgb888", + "du_clk_out_0", + "du_clk_out_1", + "du_sync", + "du_oddf", + "du_cde", + "du_disp", +}; + +static const char * const hscif0_groups[] = { + "hscif0_data", + "hscif0_clk", + "hscif0_ctrl", +}; + +static const char * const hscif1_groups[] = { + "hscif1_data_a", + "hscif1_clk_a", + "hscif1_ctrl_a", + "hscif1_data_b", + "hscif1_clk_b", + "hscif1_ctrl_b", +}; + +static const char * const hscif2_groups[] = { + "hscif2_data_a", + "hscif2_clk_a", + "hscif2_ctrl_a", + "hscif2_data_b", + "hscif2_clk_b", + "hscif2_ctrl_b", + "hscif2_data_c", + "hscif2_clk_c", + "hscif2_ctrl_c", +}; + +static const char * const hscif3_groups[] = { + "hscif3_data_a", + "hscif3_clk", + "hscif3_ctrl", + "hscif3_data_b", + "hscif3_data_c", + "hscif3_data_d", +}; + +static const char * const hscif4_groups[] = { + "hscif4_data_a", + "hscif4_clk", + "hscif4_ctrl", + "hscif4_data_b", +}; + +static const char * const i2c1_groups[] = { + "i2c1_a", + "i2c1_b", +}; + +static const char * const i2c2_groups[] = { + "i2c2_a", + "i2c2_b", +}; + +static const char * const i2c6_groups[] = { + "i2c6_a", + "i2c6_b", + "i2c6_c", +}; + +static const char * const msiof0_groups[] = { + "msiof0_clk", + "msiof0_sync", + "msiof0_ss1", + "msiof0_ss2", + "msiof0_txd", + "msiof0_rxd", +}; + +static const char * const msiof1_groups[] = { + "msiof1_clk_a", + "msiof1_sync_a", + "msiof1_ss1_a", + "msiof1_ss2_a", + "msiof1_txd_a", + "msiof1_rxd_a", + "msiof1_clk_b", + "msiof1_sync_b", + "msiof1_ss1_b", + "msiof1_ss2_b", + "msiof1_txd_b", + "msiof1_rxd_b", + "msiof1_clk_c", + "msiof1_sync_c", + "msiof1_ss1_c", + "msiof1_ss2_c", + "msiof1_txd_c", + "msiof1_rxd_c", + "msiof1_clk_d", + "msiof1_sync_d", + "msiof1_ss1_d", + "msiof1_ss2_d", + "msiof1_txd_d", + "msiof1_rxd_d", + "msiof1_clk_e", + "msiof1_sync_e", + "msiof1_ss1_e", + "msiof1_ss2_e", + "msiof1_txd_e", + "msiof1_rxd_e", + "msiof1_clk_f", + "msiof1_sync_f", + "msiof1_ss1_f", + "msiof1_ss2_f", + "msiof1_txd_f", + "msiof1_rxd_f", + "msiof1_clk_g", + "msiof1_sync_g", + "msiof1_ss1_g", + "msiof1_ss2_g", + "msiof1_txd_g", + "msiof1_rxd_g", +}; + +static const char * const msiof2_groups[] = { + "msiof2_clk_a", + "msiof2_sync_a", + "msiof2_ss1_a", + "msiof2_ss2_a", + "msiof2_txd_a", + "msiof2_rxd_a", + "msiof2_clk_b", + "msiof2_sync_b", + "msiof2_ss1_b", + "msiof2_ss2_b", + "msiof2_txd_b", + "msiof2_rxd_b", + "msiof2_clk_c", + "msiof2_sync_c", + "msiof2_ss1_c", + "msiof2_ss2_c", + "msiof2_txd_c", + "msiof2_rxd_c", + "msiof2_clk_d", + "msiof2_sync_d", + "msiof2_ss1_d", + "msiof2_ss2_d", + "msiof2_txd_d", + "msiof2_rxd_d", +}; + +static const char * const msiof3_groups[] = { + "msiof3_clk_a", + "msiof3_sync_a", + "msiof3_ss1_a", + "msiof3_ss2_a", + "msiof3_txd_a", + "msiof3_rxd_a", + "msiof3_clk_b", + "msiof3_sync_b", + "msiof3_ss1_b", + "msiof3_ss2_b", + "msiof3_txd_b", + "msiof3_rxd_b", + "msiof3_clk_c", + "msiof3_sync_c", + "msiof3_txd_c", + "msiof3_rxd_c", + "msiof3_clk_d", + "msiof3_sync_d", + "msiof3_ss1_d", + "msiof3_txd_d", + "msiof3_rxd_d", + "msiof3_clk_e", + "msiof3_sync_e", + "msiof3_ss1_e", + "msiof3_ss2_e", + "msiof3_txd_e", + "msiof3_rxd_e", +}; + +static const char * const pwm0_groups[] = { + "pwm0", +}; + +static const char * const pwm1_groups[] = { + "pwm1_a", + "pwm1_b", +}; + +static const char * const pwm2_groups[] = { + "pwm2_a", + "pwm2_b", +}; + +static const char * const pwm3_groups[] = { + "pwm3_a", + "pwm3_b", +}; + +static const char * const pwm4_groups[] = { + "pwm4_a", + "pwm4_b", +}; + +static const char * const pwm5_groups[] = { + "pwm5_a", + "pwm5_b", +}; + +static const char * const pwm6_groups[] = { + "pwm6_a", + "pwm6_b", +}; + +static const char * const scif0_groups[] = { + "scif0_data", + "scif0_clk", + "scif0_ctrl", +}; + +static const char * const scif1_groups[] = { + "scif1_data_a", + "scif1_clk", + "scif1_ctrl", + "scif1_data_b", +}; + +static const char * const scif2_groups[] = { + "scif2_data_a", + "scif2_clk", + "scif2_data_b", +}; + +static const char * const scif3_groups[] = { + "scif3_data_a", + "scif3_clk", + "scif3_ctrl", + "scif3_data_b", +}; + +static const char * const scif4_groups[] = { + "scif4_data_a", + "scif4_clk_a", + "scif4_ctrl_a", + "scif4_data_b", + "scif4_clk_b", + "scif4_ctrl_b", + "scif4_data_c", + "scif4_clk_c", + "scif4_ctrl_c", +}; + +static const char * const scif5_groups[] = { + "scif5_data_a", + "scif5_clk_a", + "scif5_data_b", + "scif5_clk_b", +}; + +static const char * const scif_clk_groups[] = { + "scif_clk_a", + "scif_clk_b", +}; + +static const char * const sdhi0_groups[] = { + "sdhi0_data1", + "sdhi0_data4", + "sdhi0_ctrl", + "sdhi0_cd", + "sdhi0_wp", +}; + +static const char * const sdhi1_groups[] = { + "sdhi1_data1", + "sdhi1_data4", + "sdhi1_ctrl", + "sdhi1_cd", + "sdhi1_wp", +}; + +static const char * const sdhi2_groups[] = { + "sdhi2_data1", + "sdhi2_data4", + "sdhi2_data8", + "sdhi2_ctrl", + "sdhi2_cd_a", + "sdhi2_wp_a", + "sdhi2_cd_b", + "sdhi2_wp_b", + "sdhi2_ds", +}; + +static const char * const sdhi3_groups[] = { + "sdhi3_data1", + "sdhi3_data4", + "sdhi3_data8", + "sdhi3_ctrl", + "sdhi3_cd", + "sdhi3_wp", + "sdhi3_ds", +}; + +static const char * const ssi_groups[] = { + "ssi0_data", + "ssi01239_ctrl", + "ssi1_data_a", + "ssi1_data_b", + "ssi1_ctrl_a", + "ssi1_ctrl_b", + "ssi2_data_a", + "ssi2_data_b", + "ssi2_ctrl_a", + "ssi2_ctrl_b", + "ssi3_data", + "ssi349_ctrl", + "ssi4_data", + "ssi4_ctrl", + "ssi5_data", + "ssi5_ctrl", + "ssi6_data", + "ssi6_ctrl", + "ssi7_data", + "ssi78_ctrl", + "ssi8_data", + "ssi9_data_a", + "ssi9_data_b", + "ssi9_ctrl_a", + "ssi9_ctrl_b", +}; + +static const char * const usb0_groups[] = { + "usb0", +}; + +static const char * const usb1_groups[] = { + "usb1", +}; + +static const char * const usb30_groups[] = { + "usb30", +}; + +static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(audio_clk), + SH_PFC_FUNCTION(avb), + SH_PFC_FUNCTION(can0), + SH_PFC_FUNCTION(can1), + SH_PFC_FUNCTION(can_clk), + SH_PFC_FUNCTION(canfd0), + SH_PFC_FUNCTION(canfd1), + SH_PFC_FUNCTION(drif0), + SH_PFC_FUNCTION(drif1), + SH_PFC_FUNCTION(drif2), + SH_PFC_FUNCTION(drif3), + SH_PFC_FUNCTION(du), + SH_PFC_FUNCTION(hscif0), + SH_PFC_FUNCTION(hscif1), + SH_PFC_FUNCTION(hscif2), + SH_PFC_FUNCTION(hscif3), + SH_PFC_FUNCTION(hscif4), + SH_PFC_FUNCTION(i2c1), + SH_PFC_FUNCTION(i2c2), + SH_PFC_FUNCTION(i2c6), + SH_PFC_FUNCTION(msiof0), + SH_PFC_FUNCTION(msiof1), + SH_PFC_FUNCTION(msiof2), + SH_PFC_FUNCTION(msiof3), + SH_PFC_FUNCTION(pwm0), + SH_PFC_FUNCTION(pwm1), + SH_PFC_FUNCTION(pwm2), + SH_PFC_FUNCTION(pwm3), + SH_PFC_FUNCTION(pwm4), + SH_PFC_FUNCTION(pwm5), + SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(scif0), + SH_PFC_FUNCTION(scif1), + SH_PFC_FUNCTION(scif2), + SH_PFC_FUNCTION(scif3), + SH_PFC_FUNCTION(scif4), + SH_PFC_FUNCTION(scif5), + SH_PFC_FUNCTION(scif_clk), + SH_PFC_FUNCTION(sdhi0), + SH_PFC_FUNCTION(sdhi1), + SH_PFC_FUNCTION(sdhi2), + SH_PFC_FUNCTION(sdhi3), + SH_PFC_FUNCTION(ssi), + SH_PFC_FUNCTION(usb0), + SH_PFC_FUNCTION(usb1), + SH_PFC_FUNCTION(usb30), +}; + +static const struct pinmux_cfg_reg pinmux_config_regs[] = { +#define F_(x, y) FN_##y +#define FM(x) FN_##x + { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_0_15_FN, GPSR0_15, + GP_0_14_FN, GPSR0_14, + GP_0_13_FN, GPSR0_13, + GP_0_12_FN, GPSR0_12, + GP_0_11_FN, GPSR0_11, + GP_0_10_FN, GPSR0_10, + GP_0_9_FN, GPSR0_9, + GP_0_8_FN, GPSR0_8, + GP_0_7_FN, GPSR0_7, + GP_0_6_FN, GPSR0_6, + GP_0_5_FN, GPSR0_5, + GP_0_4_FN, GPSR0_4, + GP_0_3_FN, GPSR0_3, + GP_0_2_FN, GPSR0_2, + GP_0_1_FN, GPSR0_1, + GP_0_0_FN, GPSR0_0, } + }, + { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + GP_1_28_FN, GPSR1_28, + GP_1_27_FN, GPSR1_27, + GP_1_26_FN, GPSR1_26, + GP_1_25_FN, GPSR1_25, + GP_1_24_FN, GPSR1_24, + GP_1_23_FN, GPSR1_23, + GP_1_22_FN, GPSR1_22, + GP_1_21_FN, GPSR1_21, + GP_1_20_FN, GPSR1_20, + GP_1_19_FN, GPSR1_19, + GP_1_18_FN, GPSR1_18, + GP_1_17_FN, GPSR1_17, + GP_1_16_FN, GPSR1_16, + GP_1_15_FN, GPSR1_15, + GP_1_14_FN, GPSR1_14, + GP_1_13_FN, GPSR1_13, + GP_1_12_FN, GPSR1_12, + GP_1_11_FN, GPSR1_11, + GP_1_10_FN, GPSR1_10, + GP_1_9_FN, GPSR1_9, + GP_1_8_FN, GPSR1_8, + GP_1_7_FN, GPSR1_7, + GP_1_6_FN, GPSR1_6, + GP_1_5_FN, GPSR1_5, + GP_1_4_FN, GPSR1_4, + GP_1_3_FN, GPSR1_3, + GP_1_2_FN, GPSR1_2, + GP_1_1_FN, GPSR1_1, + GP_1_0_FN, GPSR1_0, } + }, + { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_2_14_FN, GPSR2_14, + GP_2_13_FN, GPSR2_13, + GP_2_12_FN, GPSR2_12, + GP_2_11_FN, GPSR2_11, + GP_2_10_FN, GPSR2_10, + GP_2_9_FN, GPSR2_9, + GP_2_8_FN, GPSR2_8, + GP_2_7_FN, GPSR2_7, + GP_2_6_FN, GPSR2_6, + GP_2_5_FN, GPSR2_5, + GP_2_4_FN, GPSR2_4, + GP_2_3_FN, GPSR2_3, + GP_2_2_FN, GPSR2_2, + GP_2_1_FN, GPSR2_1, + GP_2_0_FN, GPSR2_0, } + }, + { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_3_15_FN, GPSR3_15, + GP_3_14_FN, GPSR3_14, + GP_3_13_FN, GPSR3_13, + GP_3_12_FN, GPSR3_12, + GP_3_11_FN, GPSR3_11, + GP_3_10_FN, GPSR3_10, + GP_3_9_FN, GPSR3_9, + GP_3_8_FN, GPSR3_8, + GP_3_7_FN, GPSR3_7, + GP_3_6_FN, GPSR3_6, + GP_3_5_FN, GPSR3_5, + GP_3_4_FN, GPSR3_4, + GP_3_3_FN, GPSR3_3, + GP_3_2_FN, GPSR3_2, + GP_3_1_FN, GPSR3_1, + GP_3_0_FN, GPSR3_0, } + }, + { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_4_17_FN, GPSR4_17, + GP_4_16_FN, GPSR4_16, + GP_4_15_FN, GPSR4_15, + GP_4_14_FN, GPSR4_14, + GP_4_13_FN, GPSR4_13, + GP_4_12_FN, GPSR4_12, + GP_4_11_FN, GPSR4_11, + GP_4_10_FN, GPSR4_10, + GP_4_9_FN, GPSR4_9, + GP_4_8_FN, GPSR4_8, + GP_4_7_FN, GPSR4_7, + GP_4_6_FN, GPSR4_6, + GP_4_5_FN, GPSR4_5, + GP_4_4_FN, GPSR4_4, + GP_4_3_FN, GPSR4_3, + GP_4_2_FN, GPSR4_2, + GP_4_1_FN, GPSR4_1, + GP_4_0_FN, GPSR4_0, } + }, + { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_5_25_FN, GPSR5_25, + GP_5_24_FN, GPSR5_24, + GP_5_23_FN, GPSR5_23, + GP_5_22_FN, GPSR5_22, + GP_5_21_FN, GPSR5_21, + GP_5_20_FN, GPSR5_20, + GP_5_19_FN, GPSR5_19, + GP_5_18_FN, GPSR5_18, + GP_5_17_FN, GPSR5_17, + GP_5_16_FN, GPSR5_16, + GP_5_15_FN, GPSR5_15, + GP_5_14_FN, GPSR5_14, + GP_5_13_FN, GPSR5_13, + GP_5_12_FN, GPSR5_12, + GP_5_11_FN, GPSR5_11, + GP_5_10_FN, GPSR5_10, + GP_5_9_FN, GPSR5_9, + GP_5_8_FN, GPSR5_8, + GP_5_7_FN, GPSR5_7, + GP_5_6_FN, GPSR5_6, + GP_5_5_FN, GPSR5_5, + GP_5_4_FN, GPSR5_4, + GP_5_3_FN, GPSR5_3, + GP_5_2_FN, GPSR5_2, + GP_5_1_FN, GPSR5_1, + GP_5_0_FN, GPSR5_0, } + }, + { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) { + GP_6_31_FN, GPSR6_31, + GP_6_30_FN, GPSR6_30, + GP_6_29_FN, GPSR6_29, + GP_6_28_FN, GPSR6_28, + GP_6_27_FN, GPSR6_27, + GP_6_26_FN, GPSR6_26, + GP_6_25_FN, GPSR6_25, + GP_6_24_FN, GPSR6_24, + GP_6_23_FN, GPSR6_23, + GP_6_22_FN, GPSR6_22, + GP_6_21_FN, GPSR6_21, + GP_6_20_FN, GPSR6_20, + GP_6_19_FN, GPSR6_19, + GP_6_18_FN, GPSR6_18, + GP_6_17_FN, GPSR6_17, + GP_6_16_FN, GPSR6_16, + GP_6_15_FN, GPSR6_15, + GP_6_14_FN, GPSR6_14, + GP_6_13_FN, GPSR6_13, + GP_6_12_FN, GPSR6_12, + GP_6_11_FN, GPSR6_11, + GP_6_10_FN, GPSR6_10, + GP_6_9_FN, GPSR6_9, + GP_6_8_FN, GPSR6_8, + GP_6_7_FN, GPSR6_7, + GP_6_6_FN, GPSR6_6, + GP_6_5_FN, GPSR6_5, + GP_6_4_FN, GPSR6_4, + GP_6_3_FN, GPSR6_3, + GP_6_2_FN, GPSR6_2, + GP_6_1_FN, GPSR6_1, + GP_6_0_FN, GPSR6_0, } + }, + { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_7_3_FN, GPSR7_3, + GP_7_2_FN, GPSR7_2, + GP_7_1_FN, GPSR7_1, + GP_7_0_FN, GPSR7_0, } + }, +#undef F_ +#undef FM + +#define F_(x, y) x, +#define FM(x) FN_##x, + { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) { + IP0_31_28 + IP0_27_24 + IP0_23_20 + IP0_19_16 + IP0_15_12 + IP0_11_8 + IP0_7_4 + IP0_3_0 } + }, + { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) { + IP1_31_28 + IP1_27_24 + IP1_23_20 + IP1_19_16 + IP1_15_12 + IP1_11_8 + IP1_7_4 + IP1_3_0 } + }, + { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) { + IP2_31_28 + IP2_27_24 + IP2_23_20 + IP2_19_16 + IP2_15_12 + IP2_11_8 + IP2_7_4 + IP2_3_0 } + }, + { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4) { + IP3_31_28 + IP3_27_24 + IP3_23_20 + IP3_19_16 + IP3_15_12 + IP3_11_8 + IP3_7_4 + IP3_3_0 } + }, + { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4) { + IP4_31_28 + IP4_27_24 + IP4_23_20 + IP4_19_16 + IP4_15_12 + IP4_11_8 + IP4_7_4 + IP4_3_0 } + }, + { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4) { + IP5_31_28 + IP5_27_24 + IP5_23_20 + IP5_19_16 + IP5_15_12 + IP5_11_8 + IP5_7_4 + IP5_3_0 } + }, + { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4) { + IP6_31_28 + IP6_27_24 + IP6_23_20 + IP6_19_16 + IP6_15_12 + IP6_11_8 + IP6_7_4 + IP6_3_0 } + }, + { PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4) { + IP7_31_28 + IP7_27_24 + IP7_23_20 + IP7_19_16 + /* IP7_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + IP7_11_8 + IP7_7_4 + IP7_3_0 } + }, + { PINMUX_CFG_REG("IPSR8", 0xe6060220, 32, 4) { + IP8_31_28 + IP8_27_24 + IP8_23_20 + IP8_19_16 + IP8_15_12 + IP8_11_8 + IP8_7_4 + IP8_3_0 } + }, + { PINMUX_CFG_REG("IPSR9", 0xe6060224, 32, 4) { + IP9_31_28 + IP9_27_24 + IP9_23_20 + IP9_19_16 + IP9_15_12 + IP9_11_8 + IP9_7_4 + IP9_3_0 } + }, + { PINMUX_CFG_REG("IPSR10", 0xe6060228, 32, 4) { + IP10_31_28 + IP10_27_24 + IP10_23_20 + IP10_19_16 + IP10_15_12 + IP10_11_8 + IP10_7_4 + IP10_3_0 } + }, + { PINMUX_CFG_REG("IPSR11", 0xe606022c, 32, 4) { + IP11_31_28 + IP11_27_24 + IP11_23_20 + IP11_19_16 + IP11_15_12 + IP11_11_8 + IP11_7_4 + IP11_3_0 } + }, + { PINMUX_CFG_REG("IPSR12", 0xe6060230, 32, 4) { + IP12_31_28 + IP12_27_24 + IP12_23_20 + IP12_19_16 + IP12_15_12 + IP12_11_8 + IP12_7_4 + IP12_3_0 } + }, + { PINMUX_CFG_REG("IPSR13", 0xe6060234, 32, 4) { + IP13_31_28 + IP13_27_24 + IP13_23_20 + IP13_19_16 + IP13_15_12 + IP13_11_8 + IP13_7_4 + IP13_3_0 } + }, + { PINMUX_CFG_REG("IPSR14", 0xe6060238, 32, 4) { + IP14_31_28 + IP14_27_24 + IP14_23_20 + IP14_19_16 + IP14_15_12 + IP14_11_8 + IP14_7_4 + IP14_3_0 } + }, + { PINMUX_CFG_REG("IPSR15", 0xe606023c, 32, 4) { + IP15_31_28 + IP15_27_24 + IP15_23_20 + IP15_19_16 + IP15_15_12 + IP15_11_8 + IP15_7_4 + IP15_3_0 } + }, + { PINMUX_CFG_REG("IPSR16", 0xe6060240, 32, 4) { + IP16_31_28 + IP16_27_24 + IP16_23_20 + IP16_19_16 + IP16_15_12 + IP16_11_8 + IP16_7_4 + IP16_3_0 } + }, + { PINMUX_CFG_REG("IPSR17", 0xe6060244, 32, 4) { + IP17_31_28 + IP17_27_24 + IP17_23_20 + IP17_19_16 + IP17_15_12 + IP17_11_8 + IP17_7_4 + IP17_3_0 } + }, + { PINMUX_CFG_REG("IPSR18", 0xe6060248, 32, 4) { + /* IP18_31_28 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_27_24 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_23_20 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_19_16 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_15_12 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + /* IP18_11_8 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + IP18_7_4 + IP18_3_0 } + }, +#undef F_ +#undef FM + +#define F_(x, y) x, +#define FM(x) FN_##x, + { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32, + 3, 2, 3, 1, 1, 1, 1, 1, 2, 1, + 1, 2, 1, 1, 1, 2, 2, 1, 2, 3) { + MOD_SEL0_31_30_29 + MOD_SEL0_28_27 + MOD_SEL0_26_25_24 + MOD_SEL0_23 + MOD_SEL0_22 + MOD_SEL0_21 + MOD_SEL0_20 + MOD_SEL0_19 + MOD_SEL0_18_17 + MOD_SEL0_16 + 0, 0, /* RESERVED 15 */ + MOD_SEL0_14_13 + MOD_SEL0_12 + MOD_SEL0_11 + MOD_SEL0_10 + MOD_SEL0_9_8 + MOD_SEL0_7_6 + MOD_SEL0_5 + MOD_SEL0_4_3 + /* RESERVED 2, 1, 0 */ + 0, 0, 0, 0, 0, 0, 0, 0 } + }, + { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xe6060504, 32, + 2, 3, 1, 2, 3, 1, 1, 2, 1, + 2, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1) { + MOD_SEL1_31_30 + MOD_SEL1_29_28_27 + MOD_SEL1_26 + MOD_SEL1_25_24 + MOD_SEL1_23_22_21 + MOD_SEL1_20 + MOD_SEL1_19 + MOD_SEL1_18_17 + MOD_SEL1_16 + MOD_SEL1_15_14 + MOD_SEL1_13 + MOD_SEL1_12 + MOD_SEL1_11 + MOD_SEL1_10 + MOD_SEL1_9 + 0, 0, 0, 0, /* RESERVED 8, 7 */ + MOD_SEL1_6 + MOD_SEL1_5 + MOD_SEL1_4 + MOD_SEL1_3 + MOD_SEL1_2 + MOD_SEL1_1 + MOD_SEL1_0 } + }, + { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xe6060508, 32, + 1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, 1, + 4, 4, 4, 3, 1) { + MOD_SEL2_31 + MOD_SEL2_30 + MOD_SEL2_29 + MOD_SEL2_28_27 + MOD_SEL2_26 + MOD_SEL2_25_24_23 + MOD_SEL2_22 + MOD_SEL2_21 + MOD_SEL2_20 + MOD_SEL2_19 + MOD_SEL2_18 + MOD_SEL2_17 + /* RESERVED 16 */ + 0, 0, + /* RESERVED 15, 14, 13, 12 */ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + /* RESERVED 11, 10, 9, 8 */ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + /* RESERVED 7, 6, 5, 4 */ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + /* RESERVED 3, 2, 1 */ + 0, 0, 0, 0, 0, 0, 0, 0, + MOD_SEL2_0 } + }, + { }, +}; + +static const struct pinmux_drive_reg pinmux_drive_regs[] = { + { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) { + { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */ + { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */ + { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */ + { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */ + { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */ + { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */ + { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) { + { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */ + { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */ + { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */ + { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */ + { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */ + { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */ + { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */ + { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) { + { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */ + { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */ + { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */ + { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */ + { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */ + { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */ + { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */ + { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) { + { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */ + { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */ + { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */ + { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */ + { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */ + { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ + { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) { + { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */ + { RCAR_GP_PIN(2, 13), 24, 3 }, /* AVB_AVTP_MATCH */ + { RCAR_GP_PIN(2, 14), 20, 3 }, /* AVB_AVTP_CAPTURE */ + { RCAR_GP_PIN(2, 0), 16, 3 }, /* IRQ0 */ + { RCAR_GP_PIN(2, 1), 12, 3 }, /* IRQ1 */ + { RCAR_GP_PIN(2, 2), 8, 3 }, /* IRQ2 */ + { RCAR_GP_PIN(2, 3), 4, 3 }, /* IRQ3 */ + { RCAR_GP_PIN(2, 4), 0, 3 }, /* IRQ4 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL5", 0xe6060314) { + { RCAR_GP_PIN(2, 5), 28, 3 }, /* IRQ5 */ + { RCAR_GP_PIN(2, 6), 24, 3 }, /* PWM0 */ + { RCAR_GP_PIN(2, 7), 20, 3 }, /* PWM1 */ + { RCAR_GP_PIN(2, 8), 16, 3 }, /* PWM2 */ + { RCAR_GP_PIN(1, 0), 12, 3 }, /* A0 */ + { RCAR_GP_PIN(1, 1), 8, 3 }, /* A1 */ + { RCAR_GP_PIN(1, 2), 4, 3 }, /* A2 */ + { RCAR_GP_PIN(1, 3), 0, 3 }, /* A3 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL6", 0xe6060318) { + { RCAR_GP_PIN(1, 4), 28, 3 }, /* A4 */ + { RCAR_GP_PIN(1, 5), 24, 3 }, /* A5 */ + { RCAR_GP_PIN(1, 6), 20, 3 }, /* A6 */ + { RCAR_GP_PIN(1, 7), 16, 3 }, /* A7 */ + { RCAR_GP_PIN(1, 8), 12, 3 }, /* A8 */ + { RCAR_GP_PIN(1, 9), 8, 3 }, /* A9 */ + { RCAR_GP_PIN(1, 10), 4, 3 }, /* A10 */ + { RCAR_GP_PIN(1, 11), 0, 3 }, /* A11 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL7", 0xe606031c) { + { RCAR_GP_PIN(1, 12), 28, 3 }, /* A12 */ + { RCAR_GP_PIN(1, 13), 24, 3 }, /* A13 */ + { RCAR_GP_PIN(1, 14), 20, 3 }, /* A14 */ + { RCAR_GP_PIN(1, 15), 16, 3 }, /* A15 */ + { RCAR_GP_PIN(1, 16), 12, 3 }, /* A16 */ + { RCAR_GP_PIN(1, 17), 8, 3 }, /* A17 */ + { RCAR_GP_PIN(1, 18), 4, 3 }, /* A18 */ + { RCAR_GP_PIN(1, 19), 0, 3 }, /* A19 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL8", 0xe6060320) { + { RCAR_GP_PIN(1, 28), 28, 3 }, /* CLKOUT */ + { RCAR_GP_PIN(1, 20), 24, 3 }, /* CS0 */ + { RCAR_GP_PIN(1, 21), 20, 3 }, /* CS1_A26 */ + { RCAR_GP_PIN(1, 22), 16, 3 }, /* BS */ + { RCAR_GP_PIN(1, 23), 12, 3 }, /* RD */ + { RCAR_GP_PIN(1, 24), 8, 3 }, /* RD_WR */ + { RCAR_GP_PIN(1, 25), 4, 3 }, /* WE0 */ + { RCAR_GP_PIN(1, 26), 0, 3 }, /* WE1 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) { + { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */ + { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */ + { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */ + { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */ + { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */ + { RCAR_GP_PIN(0, 3), 8, 3 }, /* D3 */ + { RCAR_GP_PIN(0, 4), 4, 3 }, /* D4 */ + { RCAR_GP_PIN(0, 5), 0, 3 }, /* D5 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL10", 0xe6060328) { + { RCAR_GP_PIN(0, 6), 28, 3 }, /* D6 */ + { RCAR_GP_PIN(0, 7), 24, 3 }, /* D7 */ + { RCAR_GP_PIN(0, 8), 20, 3 }, /* D8 */ + { RCAR_GP_PIN(0, 9), 16, 3 }, /* D9 */ + { RCAR_GP_PIN(0, 10), 12, 3 }, /* D10 */ + { RCAR_GP_PIN(0, 11), 8, 3 }, /* D11 */ + { RCAR_GP_PIN(0, 12), 4, 3 }, /* D12 */ + { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) { + { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ + { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ + { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ + { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ + { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */ + { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ + { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */ + { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) { + { PIN_A_NUMBER('R', 8), 28, 2 }, /* DU_DOTCLKIN2 */ + { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST */ + { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) { + { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */ + { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */ + { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ + { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) { + { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */ + { RCAR_GP_PIN(3, 7), 24, 3 }, /* SD1_CMD */ + { RCAR_GP_PIN(3, 8), 20, 3 }, /* SD1_DAT0 */ + { RCAR_GP_PIN(3, 9), 16, 3 }, /* SD1_DAT1 */ + { RCAR_GP_PIN(3, 10), 12, 3 }, /* SD1_DAT2 */ + { RCAR_GP_PIN(3, 11), 8, 3 }, /* SD1_DAT3 */ + { RCAR_GP_PIN(4, 0), 4, 3 }, /* SD2_CLK */ + { RCAR_GP_PIN(4, 1), 0, 3 }, /* SD2_CMD */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL15", 0xe606033c) { + { RCAR_GP_PIN(4, 2), 28, 3 }, /* SD2_DAT0 */ + { RCAR_GP_PIN(4, 3), 24, 3 }, /* SD2_DAT1 */ + { RCAR_GP_PIN(4, 4), 20, 3 }, /* SD2_DAT2 */ + { RCAR_GP_PIN(4, 5), 16, 3 }, /* SD2_DAT3 */ + { RCAR_GP_PIN(4, 6), 12, 3 }, /* SD2_DS */ + { RCAR_GP_PIN(4, 7), 8, 3 }, /* SD3_CLK */ + { RCAR_GP_PIN(4, 8), 4, 3 }, /* SD3_CMD */ + { RCAR_GP_PIN(4, 9), 0, 3 }, /* SD3_DAT0 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL16", 0xe6060340) { + { RCAR_GP_PIN(4, 10), 28, 3 }, /* SD3_DAT1 */ + { RCAR_GP_PIN(4, 11), 24, 3 }, /* SD3_DAT2 */ + { RCAR_GP_PIN(4, 12), 20, 3 }, /* SD3_DAT3 */ + { RCAR_GP_PIN(4, 13), 16, 3 }, /* SD3_DAT4 */ + { RCAR_GP_PIN(4, 14), 12, 3 }, /* SD3_DAT5 */ + { RCAR_GP_PIN(4, 15), 8, 3 }, /* SD3_DAT6 */ + { RCAR_GP_PIN(4, 16), 4, 3 }, /* SD3_DAT7 */ + { RCAR_GP_PIN(4, 17), 0, 3 }, /* SD3_DS */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL17", 0xe6060344) { + { RCAR_GP_PIN(3, 12), 28, 3 }, /* SD0_CD */ + { RCAR_GP_PIN(3, 13), 24, 3 }, /* SD0_WP */ + { RCAR_GP_PIN(3, 14), 20, 3 }, /* SD1_CD */ + { RCAR_GP_PIN(3, 15), 16, 3 }, /* SD1_WP */ + { RCAR_GP_PIN(5, 0), 12, 3 }, /* SCK0 */ + { RCAR_GP_PIN(5, 1), 8, 3 }, /* RX0 */ + { RCAR_GP_PIN(5, 2), 4, 3 }, /* TX0 */ + { RCAR_GP_PIN(5, 3), 0, 3 }, /* CTS0 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL18", 0xe6060348) { + { RCAR_GP_PIN(5, 4), 28, 3 }, /* RTS0_TANS */ + { RCAR_GP_PIN(5, 5), 24, 3 }, /* RX1 */ + { RCAR_GP_PIN(5, 6), 20, 3 }, /* TX1 */ + { RCAR_GP_PIN(5, 7), 16, 3 }, /* CTS1 */ + { RCAR_GP_PIN(5, 8), 12, 3 }, /* RTS1_TANS */ + { RCAR_GP_PIN(5, 9), 8, 3 }, /* SCK2 */ + { RCAR_GP_PIN(5, 10), 4, 3 }, /* TX2 */ + { RCAR_GP_PIN(5, 11), 0, 3 }, /* RX2 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL19", 0xe606034c) { + { RCAR_GP_PIN(5, 12), 28, 3 }, /* HSCK0 */ + { RCAR_GP_PIN(5, 13), 24, 3 }, /* HRX0 */ + { RCAR_GP_PIN(5, 14), 20, 3 }, /* HTX0 */ + { RCAR_GP_PIN(5, 15), 16, 3 }, /* HCTS0 */ + { RCAR_GP_PIN(5, 16), 12, 3 }, /* HRTS0 */ + { RCAR_GP_PIN(5, 17), 8, 3 }, /* MSIOF0_SCK */ + { RCAR_GP_PIN(5, 18), 4, 3 }, /* MSIOF0_SYNC */ + { RCAR_GP_PIN(5, 19), 0, 3 }, /* MSIOF0_SS1 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL20", 0xe6060350) { + { RCAR_GP_PIN(5, 20), 28, 3 }, /* MSIOF0_TXD */ + { RCAR_GP_PIN(5, 21), 24, 3 }, /* MSIOF0_SS2 */ + { RCAR_GP_PIN(5, 22), 20, 3 }, /* MSIOF0_RXD */ + { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */ + { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */ + { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */ + { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */ + { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) { + { RCAR_GP_PIN(6, 1), 28, 3 }, /* SSI_WS01239 */ + { RCAR_GP_PIN(6, 2), 24, 3 }, /* SSI_SDATA0 */ + { RCAR_GP_PIN(6, 3), 20, 3 }, /* SSI_SDATA1 */ + { RCAR_GP_PIN(6, 4), 16, 3 }, /* SSI_SDATA2 */ + { RCAR_GP_PIN(6, 5), 12, 3 }, /* SSI_SCK349 */ + { RCAR_GP_PIN(6, 6), 8, 3 }, /* SSI_WS349 */ + { RCAR_GP_PIN(6, 7), 4, 3 }, /* SSI_SDATA3 */ + { RCAR_GP_PIN(6, 8), 0, 3 }, /* SSI_SCK4 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL22", 0xe6060358) { + { RCAR_GP_PIN(6, 9), 28, 3 }, /* SSI_WS4 */ + { RCAR_GP_PIN(6, 10), 24, 3 }, /* SSI_SDATA4 */ + { RCAR_GP_PIN(6, 11), 20, 3 }, /* SSI_SCK5 */ + { RCAR_GP_PIN(6, 12), 16, 3 }, /* SSI_WS5 */ + { RCAR_GP_PIN(6, 13), 12, 3 }, /* SSI_SDATA5 */ + { RCAR_GP_PIN(6, 14), 8, 3 }, /* SSI_SCK6 */ + { RCAR_GP_PIN(6, 15), 4, 3 }, /* SSI_WS6 */ + { RCAR_GP_PIN(6, 16), 0, 3 }, /* SSI_SDATA6 */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL23", 0xe606035c) { + { RCAR_GP_PIN(6, 17), 28, 3 }, /* SSI_SCK78 */ + { RCAR_GP_PIN(6, 18), 24, 3 }, /* SSI_WS78 */ + { RCAR_GP_PIN(6, 19), 20, 3 }, /* SSI_SDATA7 */ + { RCAR_GP_PIN(6, 20), 16, 3 }, /* SSI_SDATA8 */ + { RCAR_GP_PIN(6, 21), 12, 3 }, /* SSI_SDATA9 */ + { RCAR_GP_PIN(6, 22), 8, 3 }, /* AUDIO_CLKA */ + { RCAR_GP_PIN(6, 23), 4, 3 }, /* AUDIO_CLKB */ + { RCAR_GP_PIN(6, 24), 0, 3 }, /* USB0_PWEN */ + } }, + { PINMUX_DRIVE_REG("DRVCTRL24", 0xe6060360) { + { RCAR_GP_PIN(6, 25), 28, 3 }, /* USB0_OVC */ + { RCAR_GP_PIN(6, 26), 24, 3 }, /* USB1_PWEN */ + { RCAR_GP_PIN(6, 27), 20, 3 }, /* USB1_OVC */ + { RCAR_GP_PIN(6, 28), 16, 3 }, /* USB30_PWEN */ + { RCAR_GP_PIN(6, 29), 12, 3 }, /* USB30_OVC */ + { RCAR_GP_PIN(6, 30), 8, 3 }, /* GP6_30 */ + { RCAR_GP_PIN(6, 31), 4, 3 }, /* GP6_31 */ + } }, + { }, +}; + +static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) +{ + int bit = -EINVAL; + + *pocctrl = 0xe6060380; + + if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11)) + bit = pin & 0x1f; + + if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 17)) + bit = (pin & 0x1f) + 12; + + return bit; +} + +#define PUEN 0xe6060400 +#define PUD 0xe6060440 + +#define PU0 0x00 +#define PU1 0x04 +#define PU2 0x08 +#define PU3 0x0c +#define PU4 0x10 +#define PU5 0x14 +#define PU6 0x18 + +static const struct sh_pfc_bias_info bias_info[] = { + { RCAR_GP_PIN(2, 11), PU0, 31 }, /* AVB_PHY_INT */ + { RCAR_GP_PIN(2, 10), PU0, 30 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 9), PU0, 29 }, /* AVB_MDC */ + { PIN_NUMBER('A', 9), PU0, 28 }, /* AVB_MDIO */ + { PIN_NUMBER('A', 12), PU0, 27 }, /* AVB_TXCREFCLK */ + { PIN_NUMBER('B', 17), PU0, 26 }, /* AVB_TD3 */ + { PIN_NUMBER('A', 17), PU0, 25 }, /* AVB_TD2 */ + { PIN_NUMBER('B', 18), PU0, 24 }, /* AVB_TD1 */ + { PIN_NUMBER('A', 18), PU0, 23 }, /* AVB_TD0 */ + { PIN_NUMBER('A', 19), PU0, 22 }, /* AVB_TXC */ + { PIN_NUMBER('A', 8), PU0, 21 }, /* AVB_TX_CTL */ + { PIN_NUMBER('B', 14), PU0, 20 }, /* AVB_RD3 */ + { PIN_NUMBER('A', 14), PU0, 19 }, /* AVB_RD2 */ + { PIN_NUMBER('B', 13), PU0, 18 }, /* AVB_RD1 */ + { PIN_NUMBER('A', 13), PU0, 17 }, /* AVB_RD0 */ + { PIN_NUMBER('B', 19), PU0, 16 }, /* AVB_RXC */ + { PIN_NUMBER('A', 16), PU0, 15 }, /* AVB_RX_CTL */ + { PIN_NUMBER('V', 7), PU0, 14 }, /* RPC_RESET# */ + { PIN_NUMBER('V', 6), PU0, 13 }, /* RPC_WP# */ + { PIN_NUMBER('Y', 7), PU0, 12 }, /* RPC_INT# */ + { PIN_NUMBER('V', 5), PU0, 11 }, /* QSPI1_SSL */ + { PIN_A_NUMBER('C', 3), PU0, 10 }, /* QSPI1_IO3 */ + { PIN_A_NUMBER('E', 4), PU0, 9 }, /* QSPI1_IO2 */ + { PIN_A_NUMBER('E', 5), PU0, 8 }, /* QSPI1_MISO_IO1 */ + { PIN_A_NUMBER('C', 7), PU0, 7 }, /* QSPI1_MOSI_IO0 */ + { PIN_NUMBER('V', 3), PU0, 6 }, /* QSPI1_SPCLK */ + { PIN_NUMBER('Y', 3), PU0, 5 }, /* QSPI0_SSL */ + { PIN_A_NUMBER('B', 6), PU0, 4 }, /* QSPI0_IO3 */ + { PIN_NUMBER('Y', 6), PU0, 3 }, /* QSPI0_IO2 */ + { PIN_A_NUMBER('B', 4), PU0, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_A_NUMBER('C', 5), PU0, 1 }, /* QSPI0_MOSI_IO0 */ + { PIN_NUMBER('W', 3), PU0, 0 }, /* QSPI0_SPCLK */ + + { RCAR_GP_PIN(1, 19), PU1, 31 }, /* A19 */ + { RCAR_GP_PIN(1, 18), PU1, 30 }, /* A18 */ + { RCAR_GP_PIN(1, 17), PU1, 29 }, /* A17 */ + { RCAR_GP_PIN(1, 16), PU1, 28 }, /* A16 */ + { RCAR_GP_PIN(1, 15), PU1, 27 }, /* A15 */ + { RCAR_GP_PIN(1, 14), PU1, 26 }, /* A14 */ + { RCAR_GP_PIN(1, 13), PU1, 25 }, /* A13 */ + { RCAR_GP_PIN(1, 12), PU1, 24 }, /* A12 */ + { RCAR_GP_PIN(1, 11), PU1, 23 }, /* A11 */ + { RCAR_GP_PIN(1, 10), PU1, 22 }, /* A10 */ + { RCAR_GP_PIN(1, 9), PU1, 21 }, /* A9 */ + { RCAR_GP_PIN(1, 8), PU1, 20 }, /* A8 */ + { RCAR_GP_PIN(1, 7), PU1, 19 }, /* A7 */ + { RCAR_GP_PIN(1, 6), PU1, 18 }, /* A6 */ + { RCAR_GP_PIN(1, 5), PU1, 17 }, /* A5 */ + { RCAR_GP_PIN(1, 4), PU1, 16 }, /* A4 */ + { RCAR_GP_PIN(1, 3), PU1, 15 }, /* A3 */ + { RCAR_GP_PIN(1, 2), PU1, 14 }, /* A2 */ + { RCAR_GP_PIN(1, 1), PU1, 13 }, /* A1 */ + { RCAR_GP_PIN(1, 0), PU1, 12 }, /* A0 */ + { RCAR_GP_PIN(2, 8), PU1, 11 }, /* PWM2_A */ + { RCAR_GP_PIN(2, 7), PU1, 10 }, /* PWM1_A */ + { RCAR_GP_PIN(2, 6), PU1, 9 }, /* PWM0 */ + { RCAR_GP_PIN(2, 5), PU1, 8 }, /* IRQ5 */ + { RCAR_GP_PIN(2, 4), PU1, 7 }, /* IRQ4 */ + { RCAR_GP_PIN(2, 3), PU1, 6 }, /* IRQ3 */ + { RCAR_GP_PIN(2, 2), PU1, 5 }, /* IRQ2 */ + { RCAR_GP_PIN(2, 1), PU1, 4 }, /* IRQ1 */ + { RCAR_GP_PIN(2, 0), PU1, 3 }, /* IRQ0 */ + { RCAR_GP_PIN(2, 14), PU1, 2 }, /* AVB_AVTP_CAPTURE_A */ + { RCAR_GP_PIN(2, 13), PU1, 1 }, /* AVB_AVTP_MATCH_A */ + { RCAR_GP_PIN(2, 12), PU1, 0 }, /* AVB_LINK */ + + { PIN_A_NUMBER('P', 8), PU2, 31 }, /* DU_DOTCLKIN1 */ + { PIN_A_NUMBER('P', 7), PU2, 30 }, /* DU_DOTCLKIN0 */ + { RCAR_GP_PIN(7, 3), PU2, 29 }, /* GP7_03 */ + { RCAR_GP_PIN(7, 2), PU2, 28 }, /* HDMI0_CEC */ + { RCAR_GP_PIN(7, 1), PU2, 27 }, /* AVS2 */ + { RCAR_GP_PIN(7, 0), PU2, 26 }, /* AVS1 */ + { RCAR_GP_PIN(0, 15), PU2, 25 }, /* D15 */ + { RCAR_GP_PIN(0, 14), PU2, 24 }, /* D14 */ + { RCAR_GP_PIN(0, 13), PU2, 23 }, /* D13 */ + { RCAR_GP_PIN(0, 12), PU2, 22 }, /* D12 */ + { RCAR_GP_PIN(0, 11), PU2, 21 }, /* D11 */ + { RCAR_GP_PIN(0, 10), PU2, 20 }, /* D10 */ + { RCAR_GP_PIN(0, 9), PU2, 19 }, /* D9 */ + { RCAR_GP_PIN(0, 8), PU2, 18 }, /* D8 */ + { RCAR_GP_PIN(0, 7), PU2, 17 }, /* D7 */ + { RCAR_GP_PIN(0, 6), PU2, 16 }, /* D6 */ + { RCAR_GP_PIN(0, 5), PU2, 15 }, /* D5 */ + { RCAR_GP_PIN(0, 4), PU2, 14 }, /* D4 */ + { RCAR_GP_PIN(0, 3), PU2, 13 }, /* D3 */ + { RCAR_GP_PIN(0, 2), PU2, 12 }, /* D2 */ + { RCAR_GP_PIN(0, 1), PU2, 11 }, /* D1 */ + { RCAR_GP_PIN(0, 0), PU2, 10 }, /* D0 */ + { PIN_NUMBER('C', 1), PU2, 9 }, /* PRESETOUT# */ + { RCAR_GP_PIN(1, 27), PU2, 8 }, /* EX_WAIT0_A */ + { RCAR_GP_PIN(1, 26), PU2, 7 }, /* WE1_N */ + { RCAR_GP_PIN(1, 25), PU2, 6 }, /* WE0_N */ + { RCAR_GP_PIN(1, 24), PU2, 5 }, /* RD_WR_N */ + { RCAR_GP_PIN(1, 23), PU2, 4 }, /* RD_N */ + { RCAR_GP_PIN(1, 22), PU2, 3 }, /* BS_N */ + { RCAR_GP_PIN(1, 21), PU2, 2 }, /* CS1_N */ + { RCAR_GP_PIN(1, 20), PU2, 1 }, /* CS0_N */ + { RCAR_GP_PIN(1, 28), PU2, 0 }, /* CLKOUT */ + + { RCAR_GP_PIN(4, 9), PU3, 31 }, /* SD3_DAT0 */ + { RCAR_GP_PIN(4, 8), PU3, 30 }, /* SD3_CMD */ + { RCAR_GP_PIN(4, 7), PU3, 29 }, /* SD3_CLK */ + { RCAR_GP_PIN(4, 6), PU3, 28 }, /* SD2_DS */ + { RCAR_GP_PIN(4, 5), PU3, 27 }, /* SD2_DAT3 */ + { RCAR_GP_PIN(4, 4), PU3, 26 }, /* SD2_DAT2 */ + { RCAR_GP_PIN(4, 3), PU3, 25 }, /* SD2_DAT1 */ + { RCAR_GP_PIN(4, 2), PU3, 24 }, /* SD2_DAT0 */ + { RCAR_GP_PIN(4, 1), PU3, 23 }, /* SD2_CMD */ + { RCAR_GP_PIN(4, 0), PU3, 22 }, /* SD2_CLK */ + { RCAR_GP_PIN(3, 11), PU3, 21 }, /* SD1_DAT3 */ + { RCAR_GP_PIN(3, 10), PU3, 20 }, /* SD1_DAT2 */ + { RCAR_GP_PIN(3, 9), PU3, 19 }, /* SD1_DAT1 */ + { RCAR_GP_PIN(3, 8), PU3, 18 }, /* SD1_DAT0 */ + { RCAR_GP_PIN(3, 7), PU3, 17 }, /* SD1_CMD */ + { RCAR_GP_PIN(3, 6), PU3, 16 }, /* SD1_CLK */ + { RCAR_GP_PIN(3, 5), PU3, 15 }, /* SD0_DAT3 */ + { RCAR_GP_PIN(3, 4), PU3, 14 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 3), PU3, 13 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 2), PU3, 12 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 1), PU3, 11 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 0), PU3, 10 }, /* SD0_CLK */ + { PIN_A_NUMBER('T', 30), PU3, 9 }, /* ASEBRK */ + /* bit 8 n/a */ + { PIN_A_NUMBER('R', 29), PU3, 7 }, /* TDI */ + { PIN_A_NUMBER('R', 30), PU3, 6 }, /* TMS */ + { PIN_A_NUMBER('T', 27), PU3, 5 }, /* TCK */ + { PIN_A_NUMBER('R', 26), PU3, 4 }, /* TRST# */ + { PIN_A_NUMBER('D', 39), PU3, 3 }, /* EXTALR*/ + { PIN_A_NUMBER('D', 38), PU3, 2 }, /* FSCLKST */ + /* bit 1 n/a on M3*/ + { PIN_A_NUMBER('R', 8), PU3, 0 }, /* DU_DOTCLKIN2 */ + + { RCAR_GP_PIN(5, 19), PU4, 31 }, /* MSIOF0_SS1 */ + { RCAR_GP_PIN(5, 18), PU4, 30 }, /* MSIOF0_SYNC */ + { RCAR_GP_PIN(5, 17), PU4, 29 }, /* MSIOF0_SCK */ + { RCAR_GP_PIN(5, 16), PU4, 28 }, /* HRTS0_N */ + { RCAR_GP_PIN(5, 15), PU4, 27 }, /* HCTS0_N */ + { RCAR_GP_PIN(5, 14), PU4, 26 }, /* HTX0 */ + { RCAR_GP_PIN(5, 13), PU4, 25 }, /* HRX0 */ + { RCAR_GP_PIN(5, 12), PU4, 24 }, /* HSCK0 */ + { RCAR_GP_PIN(5, 11), PU4, 23 }, /* RX2_A */ + { RCAR_GP_PIN(5, 10), PU4, 22 }, /* TX2_A */ + { RCAR_GP_PIN(5, 9), PU4, 21 }, /* SCK2 */ + { RCAR_GP_PIN(5, 8), PU4, 20 }, /* RTS1_N_TANS */ + { RCAR_GP_PIN(5, 7), PU4, 19 }, /* CTS1_N */ + { RCAR_GP_PIN(5, 6), PU4, 18 }, /* TX1_A */ + { RCAR_GP_PIN(5, 5), PU4, 17 }, /* RX1_A */ + { RCAR_GP_PIN(5, 4), PU4, 16 }, /* RTS0_N_TANS */ + { RCAR_GP_PIN(5, 3), PU4, 15 }, /* CTS0_N */ + { RCAR_GP_PIN(5, 2), PU4, 14 }, /* TX0 */ + { RCAR_GP_PIN(5, 1), PU4, 13 }, /* RX0 */ + { RCAR_GP_PIN(5, 0), PU4, 12 }, /* SCK0 */ + { RCAR_GP_PIN(3, 15), PU4, 11 }, /* SD1_WP */ + { RCAR_GP_PIN(3, 14), PU4, 10 }, /* SD1_CD */ + { RCAR_GP_PIN(3, 13), PU4, 9 }, /* SD0_WP */ + { RCAR_GP_PIN(3, 12), PU4, 8 }, /* SD0_CD */ + { RCAR_GP_PIN(4, 17), PU4, 7 }, /* SD3_DS */ + { RCAR_GP_PIN(4, 16), PU4, 6 }, /* SD3_DAT7 */ + { RCAR_GP_PIN(4, 15), PU4, 5 }, /* SD3_DAT6 */ + { RCAR_GP_PIN(4, 14), PU4, 4 }, /* SD3_DAT5 */ + { RCAR_GP_PIN(4, 13), PU4, 3 }, /* SD3_DAT4 */ + { RCAR_GP_PIN(4, 12), PU4, 2 }, /* SD3_DAT3 */ + { RCAR_GP_PIN(4, 11), PU4, 1 }, /* SD3_DAT2 */ + { RCAR_GP_PIN(4, 10), PU4, 0 }, /* SD3_DAT1 */ + + { RCAR_GP_PIN(6, 24), PU5, 31 }, /* USB0_PWEN */ + { RCAR_GP_PIN(6, 23), PU5, 30 }, /* AUDIO_CLKB_B */ + { RCAR_GP_PIN(6, 22), PU5, 29 }, /* AUDIO_CLKA_A */ + { RCAR_GP_PIN(6, 21), PU5, 28 }, /* SSI_SDATA9_A */ + { RCAR_GP_PIN(6, 20), PU5, 27 }, /* SSI_SDATA8 */ + { RCAR_GP_PIN(6, 19), PU5, 26 }, /* SSI_SDATA7 */ + { RCAR_GP_PIN(6, 18), PU5, 25 }, /* SSI_WS78 */ + { RCAR_GP_PIN(6, 17), PU5, 24 }, /* SSI_SCK78 */ + { RCAR_GP_PIN(6, 16), PU5, 23 }, /* SSI_SDATA6 */ + { RCAR_GP_PIN(6, 15), PU5, 22 }, /* SSI_WS6 */ + { RCAR_GP_PIN(6, 14), PU5, 21 }, /* SSI_SCK6 */ + { RCAR_GP_PIN(6, 13), PU5, 20 }, /* SSI_SDATA5 */ + { RCAR_GP_PIN(6, 12), PU5, 19 }, /* SSI_WS5 */ + { RCAR_GP_PIN(6, 11), PU5, 18 }, /* SSI_SCK5 */ + { RCAR_GP_PIN(6, 10), PU5, 17 }, /* SSI_SDATA4 */ + { RCAR_GP_PIN(6, 9), PU5, 16 }, /* SSI_WS4 */ + { RCAR_GP_PIN(6, 8), PU5, 15 }, /* SSI_SCK4 */ + { RCAR_GP_PIN(6, 7), PU5, 14 }, /* SSI_SDATA3 */ + { RCAR_GP_PIN(6, 6), PU5, 13 }, /* SSI_WS349 */ + { RCAR_GP_PIN(6, 5), PU5, 12 }, /* SSI_SCK349 */ + { RCAR_GP_PIN(6, 4), PU5, 11 }, /* SSI_SDATA2_A */ + { RCAR_GP_PIN(6, 3), PU5, 10 }, /* SSI_SDATA1_A */ + { RCAR_GP_PIN(6, 2), PU5, 9 }, /* SSI_SDATA0 */ + { RCAR_GP_PIN(6, 1), PU5, 8 }, /* SSI_WS01239 */ + { RCAR_GP_PIN(6, 0), PU5, 7 }, /* SSI_SCK01239 */ + { PIN_NUMBER('H', 37), PU5, 6 }, /* MLB_REF */ + { RCAR_GP_PIN(5, 25), PU5, 5 }, /* MLB_DAT */ + { RCAR_GP_PIN(5, 24), PU5, 4 }, /* MLB_SIG */ + { RCAR_GP_PIN(5, 23), PU5, 3 }, /* MLB_CLK */ + { RCAR_GP_PIN(5, 22), PU5, 2 }, /* MSIOF0_RXD */ + { RCAR_GP_PIN(5, 21), PU5, 1 }, /* MSIOF0_SS2 */ + { RCAR_GP_PIN(5, 20), PU5, 0 }, /* MSIOF0_TXD */ + + { RCAR_GP_PIN(6, 31), PU6, 6 }, /* GP6_31 */ + { RCAR_GP_PIN(6, 30), PU6, 5 }, /* GP6_30 */ + { RCAR_GP_PIN(6, 29), PU6, 4 }, /* USB30_OVC */ + { RCAR_GP_PIN(6, 28), PU6, 3 }, /* USB30_PWEN */ + { RCAR_GP_PIN(6, 27), PU6, 2 }, /* USB1_OVC */ + { RCAR_GP_PIN(6, 26), PU6, 1 }, /* USB1_PWEN */ + { RCAR_GP_PIN(6, 25), PU6, 0 }, /* USB0_OVC */ +}; + +static unsigned int r8a7796_pinmux_get_bias(struct sh_pfc *pfc, + unsigned int pin) +{ + const struct sh_pfc_bias_info *info; + u32 reg; + u32 bit; + + info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin); + if (!info) + return PIN_CONFIG_BIAS_DISABLE; + + reg = info->reg; + bit = BIT(info->bit); + + if (!(sh_pfc_read_reg(pfc, PUEN + reg, 32) & bit)) + return PIN_CONFIG_BIAS_DISABLE; + else if (sh_pfc_read_reg(pfc, PUD + reg, 32) & bit) + return PIN_CONFIG_BIAS_PULL_UP; + else + return PIN_CONFIG_BIAS_PULL_DOWN; +} + +static void r8a7796_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, + unsigned int bias) +{ + const struct sh_pfc_bias_info *info; + u32 enable, updown; + u32 reg; + u32 bit; + + info = sh_pfc_pin_to_bias_info(bias_info, ARRAY_SIZE(bias_info), pin); + if (!info) + return; + + reg = info->reg; + bit = BIT(info->bit); + + enable = sh_pfc_read_reg(pfc, PUEN + reg, 32) & ~bit; + if (bias != PIN_CONFIG_BIAS_DISABLE) + enable |= bit; + + updown = sh_pfc_read_reg(pfc, PUD + reg, 32) & ~bit; + if (bias == PIN_CONFIG_BIAS_PULL_UP) + updown |= bit; + + sh_pfc_write_reg(pfc, PUD + reg, 32, updown); + sh_pfc_write_reg(pfc, PUEN + reg, 32, enable); +} + +static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = { + .pin_to_pocctrl = r8a7796_pin_to_pocctrl, + .get_bias = r8a7796_pinmux_get_bias, + .set_bias = r8a7796_pinmux_set_bias, +}; + +const struct sh_pfc_soc_info r8a7796_pinmux_info = { + .name = "r8a77960_pfc", + .ops = &r8a7796_pinmux_ops, + .unlock_reg = 0xe6060000, /* PMMR */ + + .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, + + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .groups = pinmux_groups, + .nr_groups = ARRAY_SIZE(pinmux_groups), + .functions = pinmux_functions, + .nr_functions = ARRAY_SIZE(pinmux_functions), + + .cfg_regs = pinmux_config_regs, + .drive_regs = pinmux_drive_regs, + + .pinmux_data = pinmux_data, + .pinmux_data_size = ARRAY_SIZE(pinmux_data), +}; diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c new file mode 100644 index 0000000000..1675485d66 --- /dev/null +++ b/drivers/pinctrl/renesas/pfc.c @@ -0,0 +1,752 @@ +/* + * Pin Control driver for SuperH Pin Function Controller. + * + * Authors: Magnus Damm, Paul Mundt, Laurent Pinchart + * + * Copyright (C) 2008 Magnus Damm + * Copyright (C) 2009 - 2012 Paul Mundt + * Copyright (C) 2017 Marek Vasut + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#define DRV_NAME "sh-pfc" + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <dm/pinctrl.h> +#include <linux/io.h> +#include <linux/sizes.h> + +#include "sh_pfc.h" + +DECLARE_GLOBAL_DATA_PTR; + +enum sh_pfc_model { + SH_PFC_R8A7795 = 0, + SH_PFC_R8A7796, +}; + +struct sh_pfc_pin_config { + u32 type; +}; + +struct sh_pfc_pinctrl { + struct sh_pfc *pfc; + + struct sh_pfc_pin_config *configs; + + const char *func_prop_name; + const char *groups_prop_name; + const char *pins_prop_name; +}; + +struct sh_pfc_pin_range { + u16 start; + u16 end; +}; + +struct sh_pfc_pinctrl_priv { + struct sh_pfc pfc; + struct sh_pfc_pinctrl pmx; +}; + +int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin) +{ + unsigned int offset; + unsigned int i; + + for (i = 0, offset = 0; i < pfc->nr_ranges; ++i) { + const struct sh_pfc_pin_range *range = &pfc->ranges[i]; + + if (pin <= range->end) + return pin >= range->start + ? offset + pin - range->start : -1; + + offset += range->end - range->start + 1; + } + + return -EINVAL; +} + +static int sh_pfc_enum_in_range(u16 enum_id, const struct pinmux_range *r) +{ + if (enum_id < r->begin) + return 0; + + if (enum_id > r->end) + return 0; + + return 1; +} + +u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width) +{ + switch (reg_width) { + case 8: + return readb(mapped_reg); + case 16: + return readw(mapped_reg); + case 32: + return readl(mapped_reg); + } + + BUG(); + return 0; +} + +void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, + u32 data) +{ + switch (reg_width) { + case 8: + writeb(data, mapped_reg); + return; + case 16: + writew(data, mapped_reg); + return; + case 32: + writel(data, mapped_reg); + return; + } + + BUG(); +} + +u32 sh_pfc_read_reg(struct sh_pfc *pfc, u32 reg, unsigned int width) +{ + return sh_pfc_read_raw_reg(pfc->regs + reg, width); +} + +void sh_pfc_write_reg(struct sh_pfc *pfc, u32 reg, unsigned int width, u32 data) +{ + void __iomem *unlock_reg = + (void __iomem *)(uintptr_t)pfc->info->unlock_reg; + + if (pfc->info->unlock_reg) + sh_pfc_write_raw_reg(unlock_reg, 32, ~data); + + sh_pfc_write_raw_reg(pfc->regs + reg, width, data); +} + +static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, + const struct pinmux_cfg_reg *crp, + unsigned int in_pos, + void __iomem **mapped_regp, u32 *maskp, + unsigned int *posp) +{ + unsigned int k; + + *mapped_regp = (void __iomem *)(uintptr_t)crp->reg; + + if (crp->field_width) { + *maskp = (1 << crp->field_width) - 1; + *posp = crp->reg_width - ((in_pos + 1) * crp->field_width); + } else { + *maskp = (1 << crp->var_field_width[in_pos]) - 1; + *posp = crp->reg_width; + for (k = 0; k <= in_pos; k++) + *posp -= crp->var_field_width[k]; + } +} + +static void sh_pfc_write_config_reg(struct sh_pfc *pfc, + const struct pinmux_cfg_reg *crp, + unsigned int field, u32 value) +{ + void __iomem *mapped_reg; + void __iomem *unlock_reg = + (void __iomem *)(uintptr_t)pfc->info->unlock_reg; + unsigned int pos; + u32 mask, data; + + sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos); + + dev_dbg(pfc->dev, "write_reg addr = %x, value = 0x%x, field = %u, " + "r_width = %u, f_width = %u\n", + crp->reg, value, field, crp->reg_width, crp->field_width); + + mask = ~(mask << pos); + value = value << pos; + + data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width); + data &= mask; + data |= value; + + if (pfc->info->unlock_reg) + sh_pfc_write_raw_reg(unlock_reg, 32, ~data); + + sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data); +} + +static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id, + const struct pinmux_cfg_reg **crp, + unsigned int *fieldp, u32 *valuep) +{ + unsigned int k = 0; + + while (1) { + const struct pinmux_cfg_reg *config_reg = + pfc->info->cfg_regs + k; + unsigned int r_width = config_reg->reg_width; + unsigned int f_width = config_reg->field_width; + unsigned int curr_width; + unsigned int bit_pos; + unsigned int pos = 0; + unsigned int m = 0; + + if (!r_width) + break; + + for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) { + u32 ncomb; + u32 n; + + if (f_width) + curr_width = f_width; + else + curr_width = config_reg->var_field_width[m]; + + ncomb = 1 << curr_width; + for (n = 0; n < ncomb; n++) { + if (config_reg->enum_ids[pos + n] == enum_id) { + *crp = config_reg; + *fieldp = m; + *valuep = n; + return 0; + } + } + pos += ncomb; + m++; + } + k++; + } + + return -EINVAL; +} + +static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos, + u16 *enum_idp) +{ + const u16 *data = pfc->info->pinmux_data; + unsigned int k; + + if (pos) { + *enum_idp = data[pos + 1]; + return pos + 1; + } + + for (k = 0; k < pfc->info->pinmux_data_size; k++) { + if (data[k] == mark) { + *enum_idp = data[k + 1]; + return k + 1; + } + } + + dev_err(pfc->dev, "cannot locate data/mark enum_id for mark %d\n", + mark); + return -EINVAL; +} + +int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) +{ + const struct pinmux_range *range; + int pos = 0; + + switch (pinmux_type) { + case PINMUX_TYPE_GPIO: + case PINMUX_TYPE_FUNCTION: + range = NULL; + break; + + case PINMUX_TYPE_OUTPUT: + range = &pfc->info->output; + break; + + case PINMUX_TYPE_INPUT: + range = &pfc->info->input; + break; + + default: + return -EINVAL; + } + + /* Iterate over all the configuration fields we need to update. */ + while (1) { + const struct pinmux_cfg_reg *cr; + unsigned int field; + u16 enum_id; + u32 value; + int in_range; + int ret; + + pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id); + if (pos < 0) + return pos; + + if (!enum_id) + break; + + /* Check if the configuration field selects a function. If it + * doesn't, skip the field if it's not applicable to the + * requested pinmux type. + */ + in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function); + if (!in_range) { + if (pinmux_type == PINMUX_TYPE_FUNCTION) { + /* Functions are allowed to modify all + * fields. + */ + in_range = 1; + } else if (pinmux_type != PINMUX_TYPE_GPIO) { + /* Input/output types can only modify fields + * that correspond to their respective ranges. + */ + in_range = sh_pfc_enum_in_range(enum_id, range); + + /* + * special case pass through for fixed + * input-only or output-only pins without + * function enum register association. + */ + if (in_range && enum_id == range->force) + continue; + } + /* GPIOs are only allowed to modify function fields. */ + } + + if (!in_range) + continue; + + ret = sh_pfc_get_config_reg(pfc, enum_id, &cr, &field, &value); + if (ret < 0) + return ret; + + sh_pfc_write_config_reg(pfc, cr, field, value); + } + + return 0; +} + +const struct sh_pfc_bias_info * +sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info, + unsigned int num, unsigned int pin) +{ + unsigned int i; + + for (i = 0; i < num; i++) + if (info[i].pin == pin) + return &info[i]; + + printf("Pin %u is not in bias info list\n", pin); + + return NULL; +} + +static int sh_pfc_init_ranges(struct sh_pfc *pfc) +{ + struct sh_pfc_pin_range *range; + unsigned int nr_ranges; + unsigned int i; + + if (pfc->info->pins[0].pin == (u16)-1) { + /* Pin number -1 denotes that the SoC doesn't report pin numbers + * in its pin arrays yet. Consider the pin numbers range as + * continuous and allocate a single range. + */ + pfc->nr_ranges = 1; + pfc->ranges = kzalloc(sizeof(*pfc->ranges), GFP_KERNEL); + if (pfc->ranges == NULL) + return -ENOMEM; + + pfc->ranges->start = 0; + pfc->ranges->end = pfc->info->nr_pins - 1; + pfc->nr_gpio_pins = pfc->info->nr_pins; + + return 0; + } + + /* Count, allocate and fill the ranges. The PFC SoC data pins array must + * be sorted by pin numbers, and pins without a GPIO port must come + * last. + */ + for (i = 1, nr_ranges = 1; i < pfc->info->nr_pins; ++i) { + if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1) + nr_ranges++; + } + + pfc->nr_ranges = nr_ranges; + pfc->ranges = kzalloc(sizeof(*pfc->ranges) * nr_ranges, GFP_KERNEL); + if (pfc->ranges == NULL) + return -ENOMEM; + + range = pfc->ranges; + range->start = pfc->info->pins[0].pin; + + for (i = 1; i < pfc->info->nr_pins; ++i) { + if (pfc->info->pins[i-1].pin == pfc->info->pins[i].pin - 1) + continue; + + range->end = pfc->info->pins[i-1].pin; + if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO)) + pfc->nr_gpio_pins = range->end + 1; + + range++; + range->start = pfc->info->pins[i].pin; + } + + range->end = pfc->info->pins[i-1].pin; + if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO)) + pfc->nr_gpio_pins = range->end + 1; + + return 0; +} + +static int sh_pfc_pinctrl_get_pins_count(struct udevice *dev) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->pfc.info->nr_pins; +} + +static const char *sh_pfc_pinctrl_get_pin_name(struct udevice *dev, + unsigned selector) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->pfc.info->pins[selector].name; +} + +static int sh_pfc_pinctrl_get_groups_count(struct udevice *dev) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->pfc.info->nr_groups; +} + +static const char *sh_pfc_pinctrl_get_group_name(struct udevice *dev, + unsigned selector) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->pfc.info->groups[selector].name; +} + +static int sh_pfc_pinctrl_get_functions_count(struct udevice *dev) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->pfc.info->nr_functions; +} + +static const char *sh_pfc_pinctrl_get_function_name(struct udevice *dev, + unsigned selector) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->pfc.info->functions[selector].name; +} + +static int sh_pfc_pinctrl_group_set(struct udevice *dev, unsigned group_selector, + unsigned func_selector) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + struct sh_pfc_pinctrl *pmx = &priv->pmx; + struct sh_pfc *pfc = &priv->pfc; + const struct sh_pfc_pin_group *grp = &priv->pfc.info->groups[group_selector]; + unsigned int i; + int ret = 0; + + for (i = 0; i < grp->nr_pins; ++i) { + int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]); + struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; + + if (cfg->type != PINMUX_TYPE_NONE) { + ret = -EBUSY; + goto done; + } + } + + for (i = 0; i < grp->nr_pins; ++i) { + ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION); + if (ret < 0) + break; + } + +done: + return ret; +} +#if CONFIG_IS_ENABLED(PINCONF) +static const struct pinconf_param sh_pfc_pinconf_params[] = { + { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, + { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, + { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, + { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 }, + { "power-source", PIN_CONFIG_POWER_SOURCE, 3300 }, +}; + +static void __iomem * +sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc, unsigned int pin, + unsigned int *offset, unsigned int *size) +{ + const struct pinmux_drive_reg_field *field; + const struct pinmux_drive_reg *reg; + unsigned int i; + + for (reg = pfc->info->drive_regs; reg->reg; ++reg) { + for (i = 0; i < ARRAY_SIZE(reg->fields); ++i) { + field = ®->fields[i]; + + if (field->size && field->pin == pin) { + *offset = field->offset; + *size = field->size; + + return (void __iomem *)(uintptr_t)reg->reg; + } + } + } + + return NULL; +} + +static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc, + unsigned int pin, u16 strength) +{ + unsigned int offset; + unsigned int size; + unsigned int step; + void __iomem *reg; + void __iomem *unlock_reg = + (void __iomem *)(uintptr_t)pfc->info->unlock_reg; + u32 val; + + reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size); + if (!reg) + return -EINVAL; + + step = size == 2 ? 6 : 3; + + if (strength < step || strength > 24) + return -EINVAL; + + /* Convert the value from mA based on a full drive strength value of + * 24mA. We can make the full value configurable later if needed. + */ + strength = strength / step - 1; + + val = sh_pfc_read_raw_reg(reg, 32); + val &= ~GENMASK(offset + size - 1, offset); + val |= strength << offset; + + if (unlock_reg) + sh_pfc_write_raw_reg(unlock_reg, 32, ~val); + + sh_pfc_write_raw_reg(reg, 32, val); + + return 0; +} + +/* Check whether the requested parameter is supported for a pin. */ +static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin, + unsigned int param) +{ + int idx = sh_pfc_get_pin_index(pfc, _pin); + const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + return pin->configs & + (SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN); + + case PIN_CONFIG_BIAS_PULL_UP: + return pin->configs & SH_PFC_PIN_CFG_PULL_UP; + + case PIN_CONFIG_BIAS_PULL_DOWN: + return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN; + + case PIN_CONFIG_DRIVE_STRENGTH: + return pin->configs & SH_PFC_PIN_CFG_DRIVE_STRENGTH; + + case PIN_CONFIG_POWER_SOURCE: + return pin->configs & SH_PFC_PIN_CFG_IO_VOLTAGE; + + default: + return false; + } +} + +static int sh_pfc_pinconf_set(struct sh_pfc_pinctrl *pmx, unsigned _pin, + unsigned int param, unsigned int arg) +{ + struct sh_pfc *pfc = pmx->pfc; + void __iomem *pocctrl; + void __iomem *unlock_reg = + (void __iomem *)(uintptr_t)pfc->info->unlock_reg; + u32 addr, val; + int bit, ret; + + if (!sh_pfc_pinconf_validate(pfc, _pin, param)) + return -ENOTSUPP; + + switch (param) { + case PIN_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_BIAS_PULL_DOWN: + case PIN_CONFIG_BIAS_DISABLE: + if (!pfc->info->ops || !pfc->info->ops->set_bias) + return -ENOTSUPP; + + pfc->info->ops->set_bias(pfc, _pin, param); + + break; + + case PIN_CONFIG_DRIVE_STRENGTH: + ret = sh_pfc_pinconf_set_drive_strength(pfc, _pin, arg); + if (ret < 0) + return ret; + + break; + + case PIN_CONFIG_POWER_SOURCE: + if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl) + return -ENOTSUPP; + + bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &addr); + if (bit < 0) { + printf("invalid pin %#x", _pin); + return bit; + } + + if (arg != 1800 && arg != 3300) + return -EINVAL; + + pocctrl = (void __iomem *)(uintptr_t)addr; + + val = sh_pfc_read_raw_reg(pocctrl, 32); + if (arg == 3300) + val |= BIT(bit); + else + val &= ~BIT(bit); + + if (unlock_reg) + sh_pfc_write_raw_reg(unlock_reg, 32, ~val); + + sh_pfc_write_raw_reg(pocctrl, 32, val); + + break; + + default: + return -ENOTSUPP; + } + + return 0; +} + + +static int sh_pfc_pinconf_group_set(struct udevice *dev, + unsigned int group_selector, + unsigned int param, unsigned int arg) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + struct sh_pfc_pinctrl *pmx = &priv->pmx; + struct sh_pfc *pfc = &priv->pfc; + const struct sh_pfc_pin_group *grp = &pfc->info->groups[group_selector]; + unsigned int i; + + for (i = 0; i < grp->nr_pins; i++) + sh_pfc_pinconf_set(pmx, grp->pins[i], param, arg); + + return 0; +} +#endif + +static struct pinctrl_ops sh_pfc_pinctrl_ops = { + .get_pins_count = sh_pfc_pinctrl_get_pins_count, + .get_pin_name = sh_pfc_pinctrl_get_pin_name, + .get_groups_count = sh_pfc_pinctrl_get_groups_count, + .get_group_name = sh_pfc_pinctrl_get_group_name, + .get_functions_count = sh_pfc_pinctrl_get_functions_count, + .get_function_name = sh_pfc_pinctrl_get_function_name, + +#if CONFIG_IS_ENABLED(PINCONF) + .pinconf_num_params = ARRAY_SIZE(sh_pfc_pinconf_params), + .pinconf_params = sh_pfc_pinconf_params, + .pinconf_group_set = sh_pfc_pinconf_group_set, +#endif + .pinmux_group_set = sh_pfc_pinctrl_group_set, + .set_state = pinctrl_generic_set_state, +}; + +static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx) +{ + unsigned int i; + + /* Allocate and initialize the pins and configs arrays. */ + pmx->configs = kzalloc(sizeof(*pmx->configs) * pfc->info->nr_pins, + GFP_KERNEL); + if (unlikely(!pmx->configs)) + return -ENOMEM; + + for (i = 0; i < pfc->info->nr_pins; ++i) { + struct sh_pfc_pin_config *cfg = &pmx->configs[i]; + cfg->type = PINMUX_TYPE_NONE; + } + + return 0; +} + + +static int sh_pfc_pinctrl_probe(struct udevice *dev) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + enum sh_pfc_model model = dev_get_driver_data(dev); + fdt_addr_t base; + + base = devfdt_get_addr(dev); + if (base == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->pfc.regs = devm_ioremap(dev, base, SZ_2K); + if (!priv->pfc.regs) + return -ENOMEM; + +#ifdef CONFIG_PINCTRL_PFC_R8A7795 + if (model == SH_PFC_R8A7795) + priv->pfc.info = &r8a7795_pinmux_info; +#endif +#ifdef CONFIG_PINCTRL_PFC_R8A7796 + if (model == SH_PFC_R8A7796) + priv->pfc.info = &r8a7796_pinmux_info; +#endif + + priv->pmx.pfc = &priv->pfc; + sh_pfc_init_ranges(&priv->pfc); + sh_pfc_map_pins(&priv->pfc, &priv->pmx); + + return 0; +} + +static const struct udevice_id sh_pfc_pinctrl_ids[] = { +#ifdef CONFIG_PINCTRL_PFC_R8A7795 + { + .compatible = "renesas,pfc-r8a7795", + .data = SH_PFC_R8A7795, + }, +#endif +#ifdef CONFIG_PINCTRL_PFC_R8A7796 + { + .compatible = "renesas,pfc-r8a7796", + .data = SH_PFC_R8A7796, + }, +#endif + { }, +}; + +U_BOOT_DRIVER(pinctrl_sh_pfc) = { + .name = "sh_pfc_pinctrl", + .id = UCLASS_PINCTRL, + .of_match = sh_pfc_pinctrl_ids, + .priv_auto_alloc_size = sizeof(struct sh_pfc_pinctrl_priv), + .ops = &sh_pfc_pinctrl_ops, + .probe = sh_pfc_pinctrl_probe, +}; diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h new file mode 100644 index 0000000000..7aef2d360b --- /dev/null +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -0,0 +1,575 @@ +/* + * SuperH Pin Function Controller Support + * + * Copyright (c) 2008 Magnus Damm + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#ifndef __SH_PFC_H +#define __SH_PFC_H + +#include <linux/stringify.h> + +enum { + PINMUX_TYPE_NONE, + PINMUX_TYPE_FUNCTION, + PINMUX_TYPE_GPIO, + PINMUX_TYPE_OUTPUT, + PINMUX_TYPE_INPUT, +}; + +#define SH_PFC_PIN_CFG_INPUT (1 << 0) +#define SH_PFC_PIN_CFG_OUTPUT (1 << 1) +#define SH_PFC_PIN_CFG_PULL_UP (1 << 2) +#define SH_PFC_PIN_CFG_PULL_DOWN (1 << 3) +#define SH_PFC_PIN_CFG_IO_VOLTAGE (1 << 4) +#define SH_PFC_PIN_CFG_DRIVE_STRENGTH (1 << 5) +#define SH_PFC_PIN_CFG_NO_GPIO (1 << 31) + +struct sh_pfc_pin { + u16 pin; + u16 enum_id; + const char *name; + unsigned int configs; +}; + +#define SH_PFC_PIN_GROUP(n) \ + { \ + .name = #n, \ + .pins = n##_pins, \ + .mux = n##_mux, \ + .nr_pins = ARRAY_SIZE(n##_pins), \ + } + +struct sh_pfc_pin_group { + const char *name; + const unsigned int *pins; + const unsigned int *mux; + unsigned int nr_pins; +}; + +/* + * Using union vin_data saves memory occupied by the VIN data pins. + * VIN_DATA_PIN_GROUP() is a macro used to describe the VIN pin groups + * in this case. + */ +#define VIN_DATA_PIN_GROUP(n, s) \ + { \ + .name = #n#s, \ + .pins = n##_pins.data##s, \ + .mux = n##_mux.data##s, \ + .nr_pins = ARRAY_SIZE(n##_pins.data##s), \ + } + +union vin_data { + unsigned int data24[24]; + unsigned int data20[20]; + unsigned int data16[16]; + unsigned int data12[12]; + unsigned int data10[10]; + unsigned int data8[8]; + unsigned int data4[4]; +}; + +#define SH_PFC_FUNCTION(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .nr_groups = ARRAY_SIZE(n##_groups), \ + } + +struct sh_pfc_function { + const char *name; + const char * const *groups; + unsigned int nr_groups; +}; + +struct pinmux_func { + u16 enum_id; + const char *name; +}; + +struct pinmux_cfg_reg { + u32 reg; + u8 reg_width, field_width; + const u16 *enum_ids; + const u8 *var_field_width; +}; + +/* + * Describe a config register consisting of several fields of the same width + * - name: Register name (unused, for documentation purposes only) + * - r: Physical register address + * - r_width: Width of the register (in bits) + * - f_width: Width of the fixed-width register fields (in bits) + * This macro must be followed by initialization data: For each register field + * (from left to right, i.e. MSB to LSB), 2^f_width enum IDs must be specified, + * one for each possible combination of the register field bit values. + */ +#define PINMUX_CFG_REG(name, r, r_width, f_width) \ + .reg = r, .reg_width = r_width, .field_width = f_width, \ + .enum_ids = (const u16 [(r_width / f_width) * (1 << f_width)]) + +/* + * Describe a config register consisting of several fields of different widths + * - name: Register name (unused, for documentation purposes only) + * - r: Physical register address + * - r_width: Width of the register (in bits) + * - var_fw0, var_fwn...: List of widths of the register fields (in bits), + * From left to right (i.e. MSB to LSB) + * This macro must be followed by initialization data: For each register field + * (from left to right, i.e. MSB to LSB), 2^var_fwi enum IDs must be specified, + * one for each possible combination of the register field bit values. + */ +#define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \ + .reg = r, .reg_width = r_width, \ + .var_field_width = (const u8 [r_width]) \ + { var_fw0, var_fwn, 0 }, \ + .enum_ids = (const u16 []) + +struct pinmux_drive_reg_field { + u16 pin; + u8 offset; + u8 size; +}; + +struct pinmux_drive_reg { + u32 reg; + const struct pinmux_drive_reg_field fields[8]; +}; + +#define PINMUX_DRIVE_REG(name, r) \ + .reg = r, \ + .fields = + +struct pinmux_data_reg { + u32 reg; + u8 reg_width; + const u16 *enum_ids; +}; + +/* + * Describe a data register + * - name: Register name (unused, for documentation purposes only) + * - r: Physical register address + * - r_width: Width of the register (in bits) + * This macro must be followed by initialization data: For each register bit + * (from left to right, i.e. MSB to LSB), one enum ID must be specified. + */ +#define PINMUX_DATA_REG(name, r, r_width) \ + .reg = r, .reg_width = r_width, \ + .enum_ids = (const u16 [r_width]) \ + +struct pinmux_irq { + const short *gpios; +}; + +/* + * Describe the mapping from GPIOs to a single IRQ + * - ids...: List of GPIOs that are mapped to the same IRQ + */ +#define PINMUX_IRQ(ids...) \ + { .gpios = (const short []) { ids, -1 } } + +struct pinmux_range { + u16 begin; + u16 end; + u16 force; +}; + +struct sh_pfc_bias_info { + u16 pin; + u16 reg : 11; + u16 bit : 5; +}; + +struct sh_pfc_pin_range; + +struct sh_pfc { + struct device *dev; + const struct sh_pfc_soc_info *info; + + void *regs; + + struct sh_pfc_pin_range *ranges; + unsigned int nr_ranges; + + unsigned int nr_gpio_pins; + + struct sh_pfc_chip *gpio; +}; + +struct sh_pfc_soc_operations { + int (*init)(struct sh_pfc *pfc); + unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin); + void (*set_bias)(struct sh_pfc *pfc, unsigned int pin, + unsigned int bias); + int (*pin_to_pocctrl)(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl); +}; + +struct sh_pfc_soc_info { + const char *name; + const struct sh_pfc_soc_operations *ops; + + struct pinmux_range input; + struct pinmux_range output; + struct pinmux_range function; + + const struct sh_pfc_pin *pins; + unsigned int nr_pins; + const struct sh_pfc_pin_group *groups; + unsigned int nr_groups; + const struct sh_pfc_function *functions; + unsigned int nr_functions; + + const struct pinmux_cfg_reg *cfg_regs; + const struct pinmux_drive_reg *drive_regs; + const struct pinmux_data_reg *data_regs; + + const u16 *pinmux_data; + unsigned int pinmux_data_size; + + const struct pinmux_irq *gpio_irq; + unsigned int gpio_irq_size; + + u32 unlock_reg; +}; + +u32 sh_pfc_read_reg(struct sh_pfc *pfc, u32 reg, unsigned int width); +void sh_pfc_write_reg(struct sh_pfc *pfc, u32 reg, unsigned int width, u32 data); +const struct sh_pfc_bias_info * +sh_pfc_pin_to_bias_info(const struct sh_pfc_bias_info *info, + unsigned int num, unsigned int pin); + +extern const struct sh_pfc_soc_info r8a7795_pinmux_info; +extern const struct sh_pfc_soc_info r8a7796_pinmux_info; +/* ----------------------------------------------------------------------------- + * Helper macros to create pin and port lists + */ + +/* + * sh_pfc_soc_info pinmux_data array macros + */ + +/* + * Describe generic pinmux data + * - data_or_mark: *_DATA or *_MARK enum ID + * - ids...: List of enum IDs to associate with data_or_mark + */ +#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0 + +/* + * Describe a pinmux configuration without GPIO function that needs + * configuration in a Peripheral Function Select Register (IPSR) + * - ipsr: IPSR field (unused, for documentation purposes only) + * - fn: Function name, referring to a field in the IPSR + */ +#define PINMUX_IPSR_NOGP(ipsr, fn) \ + PINMUX_DATA(fn##_MARK, FN_##fn) + +/* + * Describe a pinmux configuration with GPIO function that needs configuration + * in both a Peripheral Function Select Register (IPSR) and in a + * GPIO/Peripheral Function Select Register (GPSR) + * - ipsr: IPSR field + * - fn: Function name, also referring to the IPSR field + */ +#define PINMUX_IPSR_GPSR(ipsr, fn) \ + PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr) + +/* + * Describe a pinmux configuration without GPIO function that needs + * configuration in a Peripheral Function Select Register (IPSR), and where the + * pinmux function has a representation in a Module Select Register (MOD_SEL). + * - ipsr: IPSR field (unused, for documentation purposes only) + * - fn: Function name, also referring to the IPSR field + * - msel: Module selector + */ +#define PINMUX_IPSR_NOGM(ipsr, fn, msel) \ + PINMUX_DATA(fn##_MARK, FN_##fn, FN_##msel) + +/* + * Describe a pinmux configuration with GPIO function where the pinmux function + * has no representation in a Peripheral Function Select Register (IPSR), but + * instead solely depends on a group selection. + * - gpsr: GPSR field + * - fn: Function name, also referring to the GPSR field + * - gsel: Group selector + */ +#define PINMUX_IPSR_NOFN(gpsr, fn, gsel) \ + PINMUX_DATA(fn##_MARK, FN_##gpsr, FN_##gsel) + +/* + * Describe a pinmux configuration with GPIO function that needs configuration + * in both a Peripheral Function Select Register (IPSR) and a GPIO/Peripheral + * Function Select Register (GPSR), and where the pinmux function has a + * representation in a Module Select Register (MOD_SEL). + * - ipsr: IPSR field + * - fn: Function name, also referring to the IPSR field + * - msel: Module selector + */ +#define PINMUX_IPSR_MSEL(ipsr, fn, msel) \ + PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr) + +/* + * Describe a pinmux configuration for a single-function pin with GPIO + * capability. + * - fn: Function name + */ +#define PINMUX_SINGLE(fn) \ + PINMUX_DATA(fn##_MARK, FN_##fn) + +/* + * GP port style (32 ports banks) + */ + +#define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) \ + fn(bank, pin, GP_##bank##_##pin, sfx, cfg) +#define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) + +#define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ + PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 3, fn, sfx, cfg) +#define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) + +#define PORT_GP_CFG_8(bank, fn, sfx, cfg) \ + PORT_GP_CFG_4(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 4, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 5, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 6, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 7, fn, sfx, cfg) +#define PORT_GP_8(bank, fn, sfx) PORT_GP_CFG_8(bank, fn, sfx, 0) + +#define PORT_GP_CFG_9(bank, fn, sfx, cfg) \ + PORT_GP_CFG_8(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 8, fn, sfx, cfg) +#define PORT_GP_9(bank, fn, sfx) PORT_GP_CFG_9(bank, fn, sfx, 0) + +#define PORT_GP_CFG_10(bank, fn, sfx, cfg) \ + PORT_GP_CFG_9(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 9, fn, sfx, cfg) +#define PORT_GP_10(bank, fn, sfx) PORT_GP_CFG_10(bank, fn, sfx, 0) + +#define PORT_GP_CFG_12(bank, fn, sfx, cfg) \ + PORT_GP_CFG_10(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 10, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 11, fn, sfx, cfg) +#define PORT_GP_12(bank, fn, sfx) PORT_GP_CFG_12(bank, fn, sfx, 0) + +#define PORT_GP_CFG_14(bank, fn, sfx, cfg) \ + PORT_GP_CFG_12(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 12, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 13, fn, sfx, cfg) +#define PORT_GP_14(bank, fn, sfx) PORT_GP_CFG_14(bank, fn, sfx, 0) + +#define PORT_GP_CFG_15(bank, fn, sfx, cfg) \ + PORT_GP_CFG_14(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 14, fn, sfx, cfg) +#define PORT_GP_15(bank, fn, sfx) PORT_GP_CFG_15(bank, fn, sfx, 0) + +#define PORT_GP_CFG_16(bank, fn, sfx, cfg) \ + PORT_GP_CFG_15(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 15, fn, sfx, cfg) +#define PORT_GP_16(bank, fn, sfx) PORT_GP_CFG_16(bank, fn, sfx, 0) + +#define PORT_GP_CFG_17(bank, fn, sfx, cfg) \ + PORT_GP_CFG_16(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 16, fn, sfx, cfg) +#define PORT_GP_17(bank, fn, sfx) PORT_GP_CFG_17(bank, fn, sfx, 0) + +#define PORT_GP_CFG_18(bank, fn, sfx, cfg) \ + PORT_GP_CFG_17(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 17, fn, sfx, cfg) +#define PORT_GP_18(bank, fn, sfx) PORT_GP_CFG_18(bank, fn, sfx, 0) + +#define PORT_GP_CFG_20(bank, fn, sfx, cfg) \ + PORT_GP_CFG_18(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 18, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 19, fn, sfx, cfg) +#define PORT_GP_20(bank, fn, sfx) PORT_GP_CFG_20(bank, fn, sfx, 0) + +#define PORT_GP_CFG_21(bank, fn, sfx, cfg) \ + PORT_GP_CFG_20(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 20, fn, sfx, cfg) +#define PORT_GP_21(bank, fn, sfx) PORT_GP_CFG_21(bank, fn, sfx, 0) + +#define PORT_GP_CFG_23(bank, fn, sfx, cfg) \ + PORT_GP_CFG_21(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 21, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 22, fn, sfx, cfg) +#define PORT_GP_23(bank, fn, sfx) PORT_GP_CFG_23(bank, fn, sfx, 0) + +#define PORT_GP_CFG_24(bank, fn, sfx, cfg) \ + PORT_GP_CFG_23(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 23, fn, sfx, cfg) +#define PORT_GP_24(bank, fn, sfx) PORT_GP_CFG_24(bank, fn, sfx, 0) + +#define PORT_GP_CFG_26(bank, fn, sfx, cfg) \ + PORT_GP_CFG_24(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 24, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 25, fn, sfx, cfg) +#define PORT_GP_26(bank, fn, sfx) PORT_GP_CFG_26(bank, fn, sfx, 0) + +#define PORT_GP_CFG_28(bank, fn, sfx, cfg) \ + PORT_GP_CFG_26(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 26, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 27, fn, sfx, cfg) +#define PORT_GP_28(bank, fn, sfx) PORT_GP_CFG_28(bank, fn, sfx, 0) + +#define PORT_GP_CFG_29(bank, fn, sfx, cfg) \ + PORT_GP_CFG_28(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 28, fn, sfx, cfg) +#define PORT_GP_29(bank, fn, sfx) PORT_GP_CFG_29(bank, fn, sfx, 0) + +#define PORT_GP_CFG_30(bank, fn, sfx, cfg) \ + PORT_GP_CFG_29(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 29, fn, sfx, cfg) +#define PORT_GP_30(bank, fn, sfx) PORT_GP_CFG_30(bank, fn, sfx, 0) + +#define PORT_GP_CFG_32(bank, fn, sfx, cfg) \ + PORT_GP_CFG_30(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 30, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 31, fn, sfx, cfg) +#define PORT_GP_32(bank, fn, sfx) PORT_GP_CFG_32(bank, fn, sfx, 0) + +#define PORT_GP_32_REV(bank, fn, sfx) \ + PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \ + PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \ + PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \ + PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \ + PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \ + PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \ + PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \ + PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \ + PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx), \ + PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx), \ + PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx), \ + PORT_GP_1(bank, 9, fn, sfx), PORT_GP_1(bank, 8, fn, sfx), \ + PORT_GP_1(bank, 7, fn, sfx), PORT_GP_1(bank, 6, fn, sfx), \ + PORT_GP_1(bank, 5, fn, sfx), PORT_GP_1(bank, 4, fn, sfx), \ + PORT_GP_1(bank, 3, fn, sfx), PORT_GP_1(bank, 2, fn, sfx), \ + PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx) + +/* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */ +#define _GP_ALL(bank, pin, name, sfx, cfg) name##_##sfx +#define GP_ALL(str) CPU_ALL_PORT(_GP_ALL, str) + +/* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */ +#define _GP_GPIO(bank, _pin, _name, sfx, cfg) \ + { \ + .pin = (bank * 32) + _pin, \ + .name = __stringify(_name), \ + .enum_id = _name##_DATA, \ + .configs = cfg, \ + } +#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused) + +/* PINMUX_DATA_GP_ALL - Expand to a list of name_DATA, name_FN marks */ +#define _GP_DATA(bank, pin, name, sfx, cfg) PINMUX_DATA(name##_DATA, name##_FN) +#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused) + +/* + * PORT style (linear pin space) + */ + +#define PORT_1(pn, fn, pfx, sfx) fn(pn, pfx, sfx) + +#define PORT_10(pn, fn, pfx, sfx) \ + PORT_1(pn, fn, pfx##0, sfx), PORT_1(pn+1, fn, pfx##1, sfx), \ + PORT_1(pn+2, fn, pfx##2, sfx), PORT_1(pn+3, fn, pfx##3, sfx), \ + PORT_1(pn+4, fn, pfx##4, sfx), PORT_1(pn+5, fn, pfx##5, sfx), \ + PORT_1(pn+6, fn, pfx##6, sfx), PORT_1(pn+7, fn, pfx##7, sfx), \ + PORT_1(pn+8, fn, pfx##8, sfx), PORT_1(pn+9, fn, pfx##9, sfx) + +#define PORT_90(pn, fn, pfx, sfx) \ + PORT_10(pn+10, fn, pfx##1, sfx), PORT_10(pn+20, fn, pfx##2, sfx), \ + PORT_10(pn+30, fn, pfx##3, sfx), PORT_10(pn+40, fn, pfx##4, sfx), \ + PORT_10(pn+50, fn, pfx##5, sfx), PORT_10(pn+60, fn, pfx##6, sfx), \ + PORT_10(pn+70, fn, pfx##7, sfx), PORT_10(pn+80, fn, pfx##8, sfx), \ + PORT_10(pn+90, fn, pfx##9, sfx) + +/* PORT_ALL(suffix) - Expand to a list of PORT_#_suffix */ +#define _PORT_ALL(pn, pfx, sfx) pfx##_##sfx +#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str) + +/* PINMUX_GPIO - Expand to a sh_pfc_pin entry */ +#define PINMUX_GPIO(_pin) \ + [GPIO_##_pin] = { \ + .pin = (u16)-1, \ + .name = __stringify(GPIO_##_pin), \ + .enum_id = _pin##_DATA, \ + } + +/* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */ +#define SH_PFC_PIN_CFG(_pin, cfgs) \ + { \ + .pin = _pin, \ + .name = __stringify(PORT##_pin), \ + .enum_id = PORT##_pin##_DATA, \ + .configs = cfgs, \ + } + +/* SH_PFC_PIN_NAMED - Expand to a sh_pfc_pin entry with the given name */ +#define SH_PFC_PIN_NAMED(row, col, _name) \ + { \ + .pin = PIN_NUMBER(row, col), \ + .name = __stringify(PIN_##_name), \ + .configs = SH_PFC_PIN_CFG_NO_GPIO, \ + } + +/* SH_PFC_PIN_NAMED_CFG - Expand to a sh_pfc_pin entry with the given name */ +#define SH_PFC_PIN_NAMED_CFG(row, col, _name, cfgs) \ + { \ + .pin = PIN_NUMBER(row, col), \ + .name = __stringify(PIN_##_name), \ + .configs = SH_PFC_PIN_CFG_NO_GPIO | cfgs, \ + } + +/* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0, + * PORT_name_OUT, PORT_name_IN marks + */ +#define _PORT_DATA(pn, pfx, sfx) \ + PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0, \ + PORT##pfx##_OUT, PORT##pfx##_IN) +#define PINMUX_DATA_ALL() CPU_ALL_PORT(_PORT_DATA, , unused) + +/* GPIO_FN(name) - Expand to a sh_pfc_pin entry for a function GPIO */ +#define PINMUX_GPIO_FN(gpio, base, data_or_mark) \ + [gpio - (base)] = { \ + .name = __stringify(gpio), \ + .enum_id = data_or_mark, \ + } +#define GPIO_FN(str) \ + PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK) + +/* + * PORTnCR helper macro for SH-Mobile/R-Mobile + */ +#define PORTCR(nr, reg) \ + { \ + PINMUX_CFG_REG_VAR("PORT" nr "CR", reg, 8, 2, 2, 1, 3) {\ + /* PULMD[1:0], handled by .set_bias() */ \ + 0, 0, 0, 0, \ + /* IE and OE */ \ + 0, PORT##nr##_OUT, PORT##nr##_IN, 0, \ + /* SEC, not supported */ \ + 0, 0, \ + /* PTMD[2:0] */ \ + PORT##nr##_FN0, PORT##nr##_FN1, \ + PORT##nr##_FN2, PORT##nr##_FN3, \ + PORT##nr##_FN4, PORT##nr##_FN5, \ + PORT##nr##_FN6, PORT##nr##_FN7 \ + } \ + } + +/* + * GPIO number helper macro for R-Car + */ +#define RCAR_GP_PIN(bank, pin) (((bank) * 32) + (pin)) + +#endif /* __SH_PFC_H */ diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c index b1f5704164..25249e377a 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3368.c @@ -208,6 +208,29 @@ enum { GPIO2A0_FLASH_CSN0 = (1 << GPIO2A0_SHIFT), }; +/*GRF_GPIO2B_IOMUX*/ +enum { + GPIO2B3_SHIFT = 6, + GPIO2B3_MASK = GENMASK(GPIO2B3_SHIFT + 1, GPIO2B3_SHIFT), + GPIO2B3_GPIO = 0, + GPIO2B3_SDMMC0_DTECTN = (1 << GPIO2B3_SHIFT), + + GPIO2B2_SHIFT = 4, + GPIO2B2_MASK = GENMASK(GPIO2B2_SHIFT + 1, GPIO2B2_SHIFT), + GPIO2B2_GPIO = 0, + GPIO2B2_SDMMC0_CMD = (1 << GPIO2B2_SHIFT), + + GPIO2B1_SHIFT = 2, + GPIO2B1_MASK = GENMASK(GPIO2B1_SHIFT + 1, GPIO2B1_SHIFT), + GPIO2B1_GPIO = 0, + GPIO2B1_SDMMC0_CLKOUT = (1 << GPIO2B1_SHIFT), + + GPIO2B0_SHIFT = 0, + GPIO2B0_MASK = GENMASK(GPIO2B0_SHIFT + 1, GPIO2B0_SHIFT), + GPIO2B0_GPIO = 0, + GPIO2B0_SDMMC0_D3 = (1 << GPIO2B0_SHIFT), +}; + /*GRF_GPIO2D_IOMUX*/ enum { GPIO2D7_SHIFT = 14, @@ -580,11 +603,17 @@ static void pinctrl_rk3368_sdmmc_config(struct rk3368_grf *grf, int mmc_id) GPIO2A4_EMMC_CLKOUT); break; case PERIPH_ID_SDCARD: - /* - * We assume that the BROM has already set this up - * correctly for us and that there's nothing to do - * here. - */ + debug("mmc id = %d setting registers!\n", mmc_id); + rk_clrsetreg(&grf->gpio2a_iomux, + GPIO2A5_MASK | GPIO2A7_MASK | + GPIO2A7_MASK, + GPIO2A5_SDMMC0_D0 | GPIO2A6_SDMMC0_D1 | + GPIO2A7_SDMMC0_D2); + rk_clrsetreg(&grf->gpio2b_iomux, + GPIO2B0_MASK | GPIO2B1_MASK | + GPIO2B2_MASK | GPIO2B3_MASK, + GPIO2B0_SDMMC0_D3 | GPIO2B1_SDMMC0_CLKOUT | + GPIO2B2_SDMMC0_CMD | GPIO2B3_SDMMC0_DTECTN); break; default: debug("mmc id = %d iomux error!\n", mmc_id); diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c index d314482acf..215b19ea0e 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -9,6 +9,7 @@ #include <dm.h> #include <linux/io.h> #include <linux/err.h> +#include <linux/kernel.h> #include <linux/sizes.h> #include <dm/pinctrl.h> @@ -81,9 +82,6 @@ static int uniphier_pinconf_input_enable_legacy(struct udevice *dev, unsigned int pin, int enable) { struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); - int pins_count = priv->socdata->pins_count; - const struct uniphier_pinctrl_pin *pins = priv->socdata->pins; - int i; /* * Multiple pins share one input enable, per-pin disabling is @@ -92,17 +90,8 @@ static int uniphier_pinconf_input_enable_legacy(struct udevice *dev, if (!enable) return -EINVAL; - for (i = 0; i < pins_count; i++) { - if (pins[i].number == pin) { - unsigned int iectrl; - u32 tmp; - - iectrl = uniphier_pin_get_iectrl(pins[i].data); - tmp = readl(priv->base + UNIPHIER_PINCTRL_IECTRL); - tmp |= 1 << iectrl; - writel(tmp, priv->base + UNIPHIER_PINCTRL_IECTRL); - } - } + /* Set all bits instead of having a bunch of pin data */ + writel(U32_MAX, priv->base + UNIPHIER_PINCTRL_IECTRL); return 0; } diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c index 709b005298..7eb693d648 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c @@ -11,20 +11,6 @@ #include "pinctrl-uniphier.h" -static const struct uniphier_pinctrl_pin uniphier_ld4_pins[] = { - UNIPHIER_PINCTRL_PIN(53, 0), - UNIPHIER_PINCTRL_PIN(54, 0), - UNIPHIER_PINCTRL_PIN(55, 0), - UNIPHIER_PINCTRL_PIN(56, 0), - UNIPHIER_PINCTRL_PIN(67, 0), - UNIPHIER_PINCTRL_PIN(68, 0), - UNIPHIER_PINCTRL_PIN(69, 0), - UNIPHIER_PINCTRL_PIN(70, 0), - UNIPHIER_PINCTRL_PIN(85, 0), - UNIPHIER_PINCTRL_PIN(88, 0), - UNIPHIER_PINCTRL_PIN(156, 0), -}; - static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27}; static const int emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31}; @@ -132,8 +118,6 @@ static const char * const uniphier_ld4_functions[] = { }; static struct uniphier_pinctrl_socdata uniphier_ld4_pinctrl_socdata = { - .pins = uniphier_ld4_pins, - .pins_count = ARRAY_SIZE(uniphier_ld4_pins), .groups = uniphier_ld4_groups, .groups_count = ARRAY_SIZE(uniphier_ld4_groups), .functions = uniphier_ld4_functions, diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index df5f2d86fa..0695e0713a 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c @@ -11,9 +11,6 @@ #include "pinctrl-uniphier.h" -static const struct uniphier_pinctrl_pin uniphier_pro4_pins[] = { -}; - static const unsigned emmc_pins[] = {40, 41, 42, 43, 51, 52, 53}; static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {44, 45, 46, 47}; @@ -151,8 +148,6 @@ static const char * const uniphier_pro4_functions[] = { }; static struct uniphier_pinctrl_socdata uniphier_pro4_pinctrl_socdata = { - .pins = uniphier_pro4_pins, - .pins_count = ARRAY_SIZE(uniphier_pro4_pins), .groups = uniphier_pro4_groups, .groups_count = ARRAY_SIZE(uniphier_pro4_groups), .functions = uniphier_pro4_functions, diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 7b14662a71..39cdd95072 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -11,19 +11,6 @@ #include "pinctrl-uniphier.h" -static const struct uniphier_pinctrl_pin uniphier_pro5_pins[] = { - UNIPHIER_PINCTRL_PIN(47, 0), - UNIPHIER_PINCTRL_PIN(48, 0), - UNIPHIER_PINCTRL_PIN(49, 0), - UNIPHIER_PINCTRL_PIN(50, 0), - UNIPHIER_PINCTRL_PIN(53, 0), - UNIPHIER_PINCTRL_PIN(54, 0), - UNIPHIER_PINCTRL_PIN(87, 0), - UNIPHIER_PINCTRL_PIN(88, 0), - UNIPHIER_PINCTRL_PIN(101, 0), - UNIPHIER_PINCTRL_PIN(102, 0), -}; - static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; @@ -142,8 +129,6 @@ static const char * const uniphier_pro5_functions[] = { }; static struct uniphier_pinctrl_socdata uniphier_pro5_pinctrl_socdata = { - .pins = uniphier_pro5_pins, - .pins_count = ARRAY_SIZE(uniphier_pro5_pins), .groups = uniphier_pro5_groups, .groups_count = ARRAY_SIZE(uniphier_pro5_groups), .functions = uniphier_pro5_functions, diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index 90d632903c..70c985db7e 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -11,13 +11,6 @@ #include "pinctrl-uniphier.h" -static const struct uniphier_pinctrl_pin uniphier_pxs2_pins[] = { - UNIPHIER_PINCTRL_PIN(113, 0), - UNIPHIER_PINCTRL_PIN(114, 0), - UNIPHIER_PINCTRL_PIN(115, 0), - UNIPHIER_PINCTRL_PIN(116, 0), -}; - static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; static const int emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; @@ -135,8 +128,6 @@ static const char * const uniphier_pxs2_functions[] = { }; static struct uniphier_pinctrl_socdata uniphier_pxs2_pinctrl_socdata = { - .pins = uniphier_pxs2_pins, - .pins_count = ARRAY_SIZE(uniphier_pxs2_pins), .groups = uniphier_pxs2_groups, .groups_count = ARRAY_SIZE(uniphier_pxs2_groups), .functions = uniphier_pxs2_functions, diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c index 423e48b003..7c54d376b7 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c @@ -118,7 +118,8 @@ static struct uniphier_pinctrl_socdata uniphier_pxs3_pinctrl_socdata = { .groups_count = ARRAY_SIZE(uniphier_pxs3_groups), .functions = uniphier_pxs3_functions, .functions_count = ARRAY_SIZE(uniphier_pxs3_functions), - .caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, + .caps = UNIPHIER_PINCTRL_CAPS_PUPD_SIMPLE | + UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, }; static int uniphier_pxs3_pinctrl_probe(struct udevice *dev) diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c index 897ce15131..5168bbee9f 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c @@ -11,34 +11,6 @@ #include "pinctrl-uniphier.h" -static const struct uniphier_pinctrl_pin uniphier_sld8_pins[] = { - UNIPHIER_PINCTRL_PIN(32, 8), - UNIPHIER_PINCTRL_PIN(33, 8), - UNIPHIER_PINCTRL_PIN(34, 8), - UNIPHIER_PINCTRL_PIN(35, 8), - UNIPHIER_PINCTRL_PIN(36, 8), - UNIPHIER_PINCTRL_PIN(37, 8), - UNIPHIER_PINCTRL_PIN(38, 8), - UNIPHIER_PINCTRL_PIN(39, 8), - UNIPHIER_PINCTRL_PIN(40, 9), - UNIPHIER_PINCTRL_PIN(41, 0), - UNIPHIER_PINCTRL_PIN(42, 0), - UNIPHIER_PINCTRL_PIN(43, 0), - UNIPHIER_PINCTRL_PIN(44, 0), - UNIPHIER_PINCTRL_PIN(70, 0), - UNIPHIER_PINCTRL_PIN(71, 0), - UNIPHIER_PINCTRL_PIN(102, 10), - UNIPHIER_PINCTRL_PIN(103, 10), - UNIPHIER_PINCTRL_PIN(104, 11), - UNIPHIER_PINCTRL_PIN(105, 11), - UNIPHIER_PINCTRL_PIN(108, 13), - UNIPHIER_PINCTRL_PIN(109, 13), - UNIPHIER_PINCTRL_PIN(112, 0), - UNIPHIER_PINCTRL_PIN(113, 0), - UNIPHIER_PINCTRL_PIN(114, 0), - UNIPHIER_PINCTRL_PIN(115, 0), -}; - static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27}; static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31}; @@ -143,8 +115,6 @@ static const char * const uniphier_sld8_functions[] = { }; static struct uniphier_pinctrl_socdata uniphier_sld8_pinctrl_socdata = { - .pins = uniphier_sld8_pins, - .pins_count = ARRAY_SIZE(uniphier_sld8_pins), .groups = uniphier_sld8_groups, .groups_count = ARRAY_SIZE(uniphier_sld8_groups), .functions = uniphier_sld8_functions, diff --git a/drivers/power/pmic/as3722.c b/drivers/power/pmic/as3722.c index 4efe8ee183..3b0427e0b9 100644 --- a/drivers/power/pmic/as3722.c +++ b/drivers/power/pmic/as3722.c @@ -46,14 +46,14 @@ static int as3722_read_id(struct udevice *dev, uint *idp, uint *revisionp) ret = pmic_reg_read(dev, AS3722_ASIC_ID1); if (ret < 0) { - error("failed to read ID1 register: %d", ret); + pr_err("failed to read ID1 register: %d", ret); return ret; } *idp = ret; ret = pmic_reg_read(dev, AS3722_ASIC_ID2); if (ret < 0) { - error("failed to read ID2 register: %d", ret); + pr_err("failed to read ID2 register: %d", ret); return ret; } *revisionp = ret; @@ -71,7 +71,7 @@ int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value) ret = pmic_reg_write(dev, AS3722_SD_VOLTAGE(sd), value); if (ret < 0) { - error("failed to write SD%u voltage register: %d", sd, ret); + pr_err("failed to write SD%u voltage register: %d", sd, ret); return ret; } @@ -87,7 +87,7 @@ int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value) ret = pmic_reg_write(dev, AS3722_LDO_VOLTAGE(ldo), value); if (ret < 0) { - error("failed to write LDO%u voltage register: %d", ldo, + pr_err("failed to write LDO%u voltage register: %d", ldo, ret); return ret; } @@ -102,12 +102,12 @@ static int as3722_probe(struct udevice *dev) ret = as3722_read_id(dev, &id, &revision); if (ret < 0) { - error("failed to read ID: %d", ret); + pr_err("failed to read ID: %d", ret); return ret; } if (id != AS3722_DEVICE_ID) { - error("unknown device"); + pr_err("unknown device"); return -ENOENT; } diff --git a/drivers/power/pmic/as3722_gpio.c b/drivers/power/pmic/as3722_gpio.c index d0b681ca4a..5cf4cb6b51 100644 --- a/drivers/power/pmic/as3722_gpio.c +++ b/drivers/power/pmic/as3722_gpio.c @@ -26,7 +26,7 @@ int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio, err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value); if (err) { - error("failed to configure GPIO#%u: %d", gpio, err); + pr_err("failed to configure GPIO#%u: %d", gpio, err); return err; } @@ -46,7 +46,7 @@ static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio, err = pmic_reg_read(pmic, AS3722_GPIO_SIGNAL_OUT); if (err < 0) { - error("failed to read GPIO signal out register: %d", err); + pr_err("failed to read GPIO signal out register: %d", err); return err; } value = err; @@ -61,7 +61,7 @@ static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio, err = pmic_reg_write(pmic, AS3722_GPIO_SIGNAL_OUT, value); if (err) { - error("failed to set GPIO#%u %s: %d", gpio, l, err); + pr_err("failed to set GPIO#%u %s: %d", gpio, l, err); return err; } @@ -84,13 +84,13 @@ int as3722_gpio_direction_output(struct udevice *dev, unsigned int gpio, err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value); if (err) { - error("failed to configure GPIO#%u as output: %d", gpio, err); + pr_err("failed to configure GPIO#%u as output: %d", gpio, err); return err; } err = as3722_gpio_set_value(pmic, gpio, value); if (err < 0) { - error("failed to set GPIO#%u high: %d", gpio, err); + pr_err("failed to set GPIO#%u high: %d", gpio, err); return err; } diff --git a/drivers/power/pmic/i2c_pmic_emul.c b/drivers/power/pmic/i2c_pmic_emul.c index 2d35d09d45..38a2a04f17 100644 --- a/drivers/power/pmic/i2c_pmic_emul.c +++ b/drivers/power/pmic/i2c_pmic_emul.c @@ -31,7 +31,7 @@ static int sandbox_i2c_pmic_read_data(struct udevice *emul, uchar chip, struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul); if (plat->rw_reg + len > SANDBOX_PMIC_REG_COUNT) { - error("Request exceeds PMIC register range! Max register: %#x", + pr_err("Request exceeds PMIC register range! Max register: %#x", SANDBOX_PMIC_REG_COUNT); return -EFAULT; } @@ -68,7 +68,7 @@ static int sandbox_i2c_pmic_write_data(struct udevice *emul, uchar chip, len--; if (plat->rw_reg + len > SANDBOX_PMIC_REG_COUNT) { - error("Request exceeds PMIC register range! Max register: %#x", + pr_err("Request exceeds PMIC register range! Max register: %#x", SANDBOX_PMIC_REG_COUNT); } @@ -111,7 +111,7 @@ static int sandbox_i2c_pmic_ofdata_to_platdata(struct udevice *emul) SANDBOX_PMIC_REG_COUNT); if (!reg_defaults) { - error("Property \"reg-defaults\" not found for device: %s!", + pr_err("Property \"reg-defaults\" not found for device: %s!", emul->name); return -EINVAL; } diff --git a/drivers/power/pmic/lp873x.c b/drivers/power/pmic/lp873x.c index f505468313..95c2b7e8c7 100644 --- a/drivers/power/pmic/lp873x.c +++ b/drivers/power/pmic/lp873x.c @@ -27,7 +27,7 @@ static int lp873x_write(struct udevice *dev, uint reg, const uint8_t *buff, int len) { if (dm_i2c_write(dev, reg, buff, len)) { - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return -EIO; } @@ -37,7 +37,7 @@ static int lp873x_write(struct udevice *dev, uint reg, const uint8_t *buff, static int lp873x_read(struct udevice *dev, uint reg, uint8_t *buff, int len) { if (dm_i2c_read(dev, reg, buff, len)) { - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return -EIO; } diff --git a/drivers/power/pmic/lp87565.c b/drivers/power/pmic/lp87565.c index 782a46c4cc..506769e362 100644 --- a/drivers/power/pmic/lp87565.c +++ b/drivers/power/pmic/lp87565.c @@ -29,7 +29,7 @@ static int lp87565_write(struct udevice *dev, uint reg, const uint8_t *buff, ret = dm_i2c_write(dev, reg, buff, len); if (ret) - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return ret; } @@ -40,7 +40,7 @@ static int lp87565_read(struct udevice *dev, uint reg, uint8_t *buff, int len) ret = dm_i2c_read(dev, reg, buff, len); if (ret) - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return ret; } diff --git a/drivers/power/pmic/max77686.c b/drivers/power/pmic/max77686.c index ceca9f96a7..b3ed84992f 100644 --- a/drivers/power/pmic/max77686.c +++ b/drivers/power/pmic/max77686.c @@ -31,7 +31,7 @@ static int max77686_write(struct udevice *dev, uint reg, const uint8_t *buff, int len) { if (dm_i2c_write(dev, reg, buff, len)) { - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return -EIO; } @@ -41,7 +41,7 @@ static int max77686_write(struct udevice *dev, uint reg, const uint8_t *buff, static int max77686_read(struct udevice *dev, uint reg, uint8_t *buff, int len) { if (dm_i2c_read(dev, reg, buff, len)) { - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return -EIO; } diff --git a/drivers/power/pmic/max8997.c b/drivers/power/pmic/max8997.c index f749d7debf..5ebeb8a316 100644 --- a/drivers/power/pmic/max8997.c +++ b/drivers/power/pmic/max8997.c @@ -26,7 +26,7 @@ static int max8997_write(struct udevice *dev, uint reg, const uint8_t *buff, ret = dm_i2c_write(dev, reg, buff, len); if (ret) - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return ret; } @@ -37,7 +37,7 @@ static int max8997_read(struct udevice *dev, uint reg, uint8_t *buff, int len) ret = dm_i2c_read(dev, reg, buff, len); if (ret) - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return ret; } diff --git a/drivers/power/pmic/max8998.c b/drivers/power/pmic/max8998.c index 7c4773c7b3..a7e04699e8 100644 --- a/drivers/power/pmic/max8998.c +++ b/drivers/power/pmic/max8998.c @@ -26,7 +26,7 @@ static int max8998_write(struct udevice *dev, uint reg, const uint8_t *buff, ret = dm_i2c_write(dev, reg, buff, len); if (ret) - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return ret; } @@ -37,7 +37,7 @@ static int max8998_read(struct udevice *dev, uint reg, uint8_t *buff, int len) ret = dm_i2c_read(dev, reg, buff, len); if (ret) - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return ret; } diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c index 804c0d13a0..1e1ecb382e 100644 --- a/drivers/power/pmic/palmas.c +++ b/drivers/power/pmic/palmas.c @@ -27,7 +27,7 @@ static int palmas_write(struct udevice *dev, uint reg, const uint8_t *buff, int len) { if (dm_i2c_write(dev, reg, buff, len)) { - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return -EIO; } @@ -37,7 +37,7 @@ static int palmas_write(struct udevice *dev, uint reg, const uint8_t *buff, static int palmas_read(struct udevice *dev, uint reg, uint8_t *buff, int len) { if (dm_i2c_read(dev, reg, buff, len)) { - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return -EIO; } diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c index 5f361c7696..a06cbc07d4 100644 --- a/drivers/power/pmic/pfuze100.c +++ b/drivers/power/pmic/pfuze100.c @@ -33,7 +33,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff, int len) { if (dm_i2c_write(dev, reg, buff, len)) { - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return -EIO; } @@ -43,7 +43,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff, static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len) { if (dm_i2c_read(dev, reg, buff, len)) { - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return -EIO; } diff --git a/drivers/power/pmic/s2mps11.c b/drivers/power/pmic/s2mps11.c index 9d83059c40..522105e5ff 100644 --- a/drivers/power/pmic/s2mps11.c +++ b/drivers/power/pmic/s2mps11.c @@ -27,7 +27,7 @@ static int s2mps11_write(struct udevice *dev, uint reg, const uint8_t *buff, ret = dm_i2c_write(dev, reg, buff, len); if (ret) - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return ret; } @@ -38,7 +38,7 @@ static int s2mps11_read(struct udevice *dev, uint reg, uint8_t *buff, int len) ret = dm_i2c_read(dev, reg, buff, len); if (ret) - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return ret; } diff --git a/drivers/power/pmic/s5m8767.c b/drivers/power/pmic/s5m8767.c index f8ae5ea2db..3812e240ab 100644 --- a/drivers/power/pmic/s5m8767.c +++ b/drivers/power/pmic/s5m8767.c @@ -30,7 +30,7 @@ static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff, int len) { if (dm_i2c_write(dev, reg, buff, len)) { - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return -EIO; } @@ -40,7 +40,7 @@ static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff, static int s5m8767_read(struct udevice *dev, uint reg, uint8_t *buff, int len) { if (dm_i2c_read(dev, reg, buff, len)) { - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return -EIO; } diff --git a/drivers/power/pmic/sandbox.c b/drivers/power/pmic/sandbox.c index 6763303c66..e8d6faca16 100644 --- a/drivers/power/pmic/sandbox.c +++ b/drivers/power/pmic/sandbox.c @@ -31,7 +31,7 @@ static int sandbox_pmic_write(struct udevice *dev, uint reg, const uint8_t *buff, int len) { if (dm_i2c_write(dev, reg, buff, len)) { - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return -EIO; } @@ -42,7 +42,7 @@ static int sandbox_pmic_read(struct udevice *dev, uint reg, uint8_t *buff, int len) { if (dm_i2c_read(dev, reg, buff, len)) { - error("read error from device: %p register: %#x!", dev, reg); + pr_err("read error from device: %p register: %#x!", dev, reg); return -EIO; } @@ -52,7 +52,7 @@ static int sandbox_pmic_read(struct udevice *dev, uint reg, static int sandbox_pmic_bind(struct udevice *dev) { if (!pmic_bind_children(dev, dev_ofnode(dev), pmic_children_info)) - error("%s:%d PMIC: %s - no child found!", __func__, __LINE__, + pr_err("%s:%d PMIC: %s - no child found!", __func__, __LINE__, dev->name); /* Always return success for this device - allows for PMIC I/O */ diff --git a/drivers/power/pmic/tps65090.c b/drivers/power/pmic/tps65090.c index 4565e3b54c..ee5358bced 100644 --- a/drivers/power/pmic/tps65090.c +++ b/drivers/power/pmic/tps65090.c @@ -29,7 +29,7 @@ static int tps65090_write(struct udevice *dev, uint reg, const uint8_t *buff, int len) { if (dm_i2c_write(dev, reg, buff, len)) { - error("write error to device: %p register: %#x!", dev, reg); + pr_err("write error to device: %p register: %#x!", dev, reg); return -EIO; } @@ -42,7 +42,7 @@ static int tps65090_read(struct udevice *dev, uint reg, uint8_t *buff, int len) ret = dm_i2c_read(dev, reg, buff, len); if (ret) { - error("read error %d from device: %p register: %#x!", ret, dev, + pr_err("read error %d from device: %p register: %#x!", ret, dev, reg); return -EIO; } diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index c82a936e8a..8892fa14e0 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -77,6 +77,13 @@ config DM_REGULATOR_FIXED features for fixed value regulators. The driver implements get/set api for enable and get only for voltage value. +config SPL_DM_REGULATOR_FIXED + bool "Enable Driver Model for REGULATOR Fixed value in SPL" + depends on DM_REGULATOR_FIXED + ---help--- + This config enables implementation of driver-model regulator uclass + features for fixed value regulators in SPL. + config DM_REGULATOR_GPIO bool "Enable Driver Model for GPIO REGULATOR" depends on DM_REGULATOR @@ -151,6 +158,19 @@ config DM_REGULATOR_PALMAS features for REGULATOR PALMAS and the family of PALMAS PMICs. The driver implements get/set api for: value and enable. +config DM_REGULATOR_PBIAS + bool "Enable driver for PBIAS regulator" + depends on DM_REGULATOR + select REGMAP + select SYSCON + ---help--- + This enables implementation of driver-model regulator uclass + features for pseudo-regulator PBIAS found in the OMAP SOCs. + This pseudo-regulator is used to provide a BIAS voltage to MMC1 + signal pads and must be configured properly during a voltage switch. + Voltage switching is required by some operating modes of SDcards and + eMMC. + config DM_REGULATOR_LP873X bool "Enable driver for LP873X PMIC regulators" depends on PMIC_LP873X diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 18fb870e43..6c149a9263 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -18,5 +18,6 @@ obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o obj-$(CONFIG_DM_REGULATOR_SANDBOX) += sandbox.o obj-$(CONFIG_REGULATOR_TPS65090) += tps65090_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_PALMAS) += palmas_regulator.o +obj-$(CONFIG_$(SPL_)DM_REGULATOR_PBIAS) += pbias_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c index 35c292222b..97b4a98bf0 100644 --- a/drivers/power/regulator/fixed.c +++ b/drivers/power/regulator/fixed.c @@ -117,7 +117,7 @@ static int fixed_regulator_set_enable(struct udevice *dev, bool enable) ret = dm_gpio_set_value(&dev_pdata->gpio, enable); if (ret) { - error("Can't set regulator : %s gpio to: %d\n", dev->name, + pr_err("Can't set regulator : %s gpio to: %d\n", dev->name, enable); return ret; } diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c index 42391c69b4..1031a0362b 100644 --- a/drivers/power/regulator/gpio-regulator.c +++ b/drivers/power/regulator/gpio-regulator.c @@ -109,7 +109,7 @@ static int gpio_regulator_set_value(struct udevice *dev, int uV) ret = dm_gpio_set_value(&dev_pdata->gpio, enable); if (ret) { - error("Can't set regulator : %s gpio to: %d\n", dev->name, + pr_err("Can't set regulator : %s gpio to: %d\n", dev->name, enable); return ret; } diff --git a/drivers/power/regulator/max77686.c b/drivers/power/regulator/max77686.c index 8780806cff..2212d36ed6 100644 --- a/drivers/power/regulator/max77686.c +++ b/drivers/power/regulator/max77686.c @@ -98,7 +98,7 @@ static int max77686_buck_volt2hex(int buck, int uV) if (hex >= 0 && hex <= hex_max) return hex; - error("Value: %d uV is wrong for BUCK%d", uV, buck); + pr_err("Value: %d uV is wrong for BUCK%d", uV, buck); return -EINVAL; } @@ -134,7 +134,7 @@ static int max77686_buck_hex2volt(int buck, int hex) return uV; bad_hex: - error("Value: %#x is wrong for BUCK%d", hex, buck); + pr_err("Value: %#x is wrong for BUCK%d", hex, buck); return -EINVAL; } @@ -160,7 +160,7 @@ static int max77686_ldo_volt2hex(int ldo, int uV) if (hex >= 0 && hex <= MAX77686_LDO_VOLT_MAX_HEX) return hex; - error("Value: %d uV is wrong for LDO%d", uV, ldo); + pr_err("Value: %d uV is wrong for LDO%d", uV, ldo); return -EINVAL; } @@ -189,7 +189,7 @@ static int max77686_ldo_hex2volt(int ldo, int hex) return uV; bad_hex: - error("Value: %#x is wrong for ldo%d", hex, ldo); + pr_err("Value: %#x is wrong for ldo%d", hex, ldo); return -EINVAL; } @@ -328,7 +328,7 @@ static int max77686_ldo_val(struct udevice *dev, int op, int *uV) ldo = dev->driver_data; if (ldo < 1 || ldo > MAX77686_LDO_NUM) { - error("Wrong ldo number: %d", ldo); + pr_err("Wrong ldo number: %d", ldo); return -EINVAL; } @@ -366,7 +366,7 @@ static int max77686_buck_val(struct udevice *dev, int op, int *uV) buck = dev->driver_data; if (buck < 1 || buck > MAX77686_BUCK_NUM) { - error("Wrong buck number: %d", buck); + pr_err("Wrong buck number: %d", buck); return -EINVAL; } @@ -423,7 +423,7 @@ static int max77686_ldo_mode(struct udevice *dev, int op, int *opmode) ldo = dev->driver_data; if (ldo < 1 || ldo > MAX77686_LDO_NUM) { - error("Wrong ldo number: %d", ldo); + pr_err("Wrong ldo number: %d", ldo); return -EINVAL; } @@ -493,7 +493,7 @@ static int max77686_ldo_mode(struct udevice *dev, int op, int *opmode) } if (mode == 0xff) { - error("Wrong mode: %d for ldo%d", *opmode, ldo); + pr_err("Wrong mode: %d for ldo%d", *opmode, ldo); return -EINVAL; } @@ -545,7 +545,7 @@ static int max77686_buck_mode(struct udevice *dev, int op, int *opmode) buck = dev->driver_data; if (buck < 1 || buck > MAX77686_BUCK_NUM) { - error("Wrong buck number: %d", buck); + pr_err("Wrong buck number: %d", buck); return -EINVAL; } @@ -614,7 +614,7 @@ static int max77686_buck_mode(struct udevice *dev, int op, int *opmode) } if (mode == 0xff) { - error("Wrong mode: %d for buck: %d\n", *opmode, buck); + pr_err("Wrong mode: %d for buck: %d\n", *opmode, buck); return -EINVAL; } diff --git a/drivers/power/regulator/pbias_regulator.c b/drivers/power/regulator/pbias_regulator.c new file mode 100644 index 0000000000..116b7f480a --- /dev/null +++ b/drivers/power/regulator/pbias_regulator.c @@ -0,0 +1,301 @@ +/* + * (C) Copyright 2016 Texas Instruments Incorporated, <www.ti.com> + * Jean-Jacques Hiblot <jjhiblot@ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <dm.h> +#include <power/pmic.h> +#include <power/regulator.h> +#include <regmap.h> +#include <syscon.h> +#include <linux/bitops.h> +#include <linux/ioport.h> +#include <dm/read.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct pbias_reg_info { + u32 enable; + u32 enable_mask; + u32 disable_val; + u32 vmode; + unsigned int enable_time; + char *name; +}; + +struct pbias_priv { + struct regmap *regmap; + int offset; +}; + +static const struct pmic_child_info pmic_children_info[] = { + { .prefix = "pbias", .driver = "pbias_regulator"}, + { }, +}; + +static int pbias_write(struct udevice *dev, uint reg, const uint8_t *buff, + int len) +{ + struct pbias_priv *priv = dev_get_priv(dev); + u32 val = *(u32 *)buff; + + if (len != 4) + return -EINVAL; + + return regmap_write(priv->regmap, priv->offset, val); +} + +static int pbias_read(struct udevice *dev, uint reg, uint8_t *buff, int len) +{ + struct pbias_priv *priv = dev_get_priv(dev); + + if (len != 4) + return -EINVAL; + + return regmap_read(priv->regmap, priv->offset, (u32 *)buff); +} + +static int pbias_ofdata_to_platdata(struct udevice *dev) +{ + struct pbias_priv *priv = dev_get_priv(dev); + struct udevice *syscon; + struct regmap *regmap; + struct resource res; + int err; + + err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, + "syscon", &syscon); + if (err) { + pr_err("%s: unable to find syscon device (%d)\n", __func__, + err); + return err; + } + + regmap = syscon_get_regmap(syscon); + if (IS_ERR(regmap)) { + pr_err("%s: unable to find regmap (%ld)\n", __func__, + PTR_ERR(regmap)); + return PTR_ERR(regmap); + } + priv->regmap = regmap; + + err = dev_read_resource(dev, 0, &res); + if (err) { + pr_err("%s: unable to find offset (%d)\n", __func__, err); + return err; + } + priv->offset = res.start; + + return 0; +} + +static int pbias_bind(struct udevice *dev) +{ + int children; + + children = pmic_bind_children(dev, dev->node, pmic_children_info); + if (!children) + debug("%s: %s - no child found\n", __func__, dev->name); + + return 0; +} + +static struct dm_pmic_ops pbias_ops = { + .read = pbias_read, + .write = pbias_write, +}; + +static const struct udevice_id pbias_ids[] = { + { .compatible = "ti,pbias-dra7" }, + { } +}; + +U_BOOT_DRIVER(pbias_pmic) = { + .name = "pbias_pmic", + .id = UCLASS_PMIC, + .of_match = pbias_ids, + .bind = pbias_bind, + .ops = &pbias_ops, + .ofdata_to_platdata = pbias_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct pbias_priv), +}; + +static const struct pbias_reg_info pbias_mmc_omap2430 = { + .enable = BIT(1), + .enable_mask = BIT(1), + .vmode = BIT(0), + .disable_val = 0, + .enable_time = 100, + .name = "pbias_mmc_omap2430" +}; + +static const struct pbias_reg_info pbias_sim_omap3 = { + .enable = BIT(9), + .enable_mask = BIT(9), + .vmode = BIT(8), + .enable_time = 100, + .name = "pbias_sim_omap3" +}; + +static const struct pbias_reg_info pbias_mmc_omap4 = { + .enable = BIT(26) | BIT(22), + .enable_mask = BIT(26) | BIT(25) | BIT(22), + .disable_val = BIT(25), + .vmode = BIT(21), + .enable_time = 100, + .name = "pbias_mmc_omap4" +}; + +static const struct pbias_reg_info pbias_mmc_omap5 = { + .enable = BIT(27) | BIT(26), + .enable_mask = BIT(27) | BIT(25) | BIT(26), + .disable_val = BIT(25), + .vmode = BIT(21), + .enable_time = 100, + .name = "pbias_mmc_omap5" +}; + +static const struct pbias_reg_info *pbias_reg_infos[] = { + &pbias_mmc_omap5, + &pbias_mmc_omap4, + &pbias_sim_omap3, + &pbias_mmc_omap2430, + NULL +}; + +static int pbias_regulator_probe(struct udevice *dev) +{ + const struct pbias_reg_info **p = pbias_reg_infos; + struct dm_regulator_uclass_platdata *uc_pdata; + + uc_pdata = dev_get_uclass_platdata(dev); + + while (*p) { + int rc; + + rc = dev_read_stringlist_search(dev, "regulator-name", + (*p)->name); + if (rc >= 0) { + debug("found regulator %s\n", (*p)->name); + break; + } else if (rc != -ENODATA) { + return rc; + } + p++; + } + if (!*p) { + int i = 0; + const char *s; + + debug("regulator "); + while (dev_read_string_index(dev, "regulator-name", i++, &s) >= 0) + debug("%s'%s' ", (i > 1) ? ", " : "", s); + debug("%s not supported\n", (i > 2) ? "are" : "is"); + return -EINVAL; + } + + uc_pdata->type = REGULATOR_TYPE_OTHER; + dev->priv = (void *)*p; + + return 0; +} + +static int pbias_regulator_get_value(struct udevice *dev) +{ + const struct pbias_reg_info *p = dev_get_priv(dev); + int rc; + u32 reg; + + rc = pmic_read(dev->parent, 0, (uint8_t *)®, sizeof(reg)); + if (rc) + return rc; + + debug("%s voltage id %s\n", p->name, + (reg & p->vmode) ? "3.0v" : "1.8v"); + return (reg & p->vmode) ? 3000000 : 1800000; +} + +static int pbias_regulator_set_value(struct udevice *dev, int uV) +{ + const struct pbias_reg_info *p = dev_get_priv(dev); + int rc; + u32 reg; + + debug("Setting %s voltage to %s\n", p->name, + (reg & p->vmode) ? "3.0v" : "1.8v"); + + rc = pmic_read(dev->parent, 0, (uint8_t *)®, sizeof(reg)); + if (rc) + return rc; + + if (uV == 3000000) + reg |= p->vmode; + else if (uV == 1800000) + reg &= ~p->vmode; + else + return -EINVAL; + + return pmic_write(dev->parent, 0, (uint8_t *)®, sizeof(reg)); +} + +static int pbias_regulator_get_enable(struct udevice *dev) +{ + const struct pbias_reg_info *p = dev_get_priv(dev); + int rc; + u32 reg; + + rc = pmic_read(dev->parent, 0, (uint8_t *)®, sizeof(reg)); + if (rc) + return rc; + + debug("%s id %s\n", p->name, + (reg & p->enable_mask) == (p->disable_val) ? "on" : "off"); + + return (reg & p->enable_mask) == (p->disable_val); +} + +static int pbias_regulator_set_enable(struct udevice *dev, bool enable) +{ + const struct pbias_reg_info *p = dev_get_priv(dev); + int rc; + u32 reg; + + debug("Turning %s %s\n", enable ? "on" : "off", p->name); + + rc = pmic_read(dev->parent, 0, (uint8_t *)®, sizeof(reg)); + if (rc) + return rc; + + reg &= ~p->enable_mask; + if (enable) + reg |= p->enable; + else + reg |= p->disable_val; + + rc = pmic_write(dev->parent, 0, (uint8_t *)®, sizeof(reg)); + if (rc) + return rc; + + if (enable) + udelay(p->enable_time); + + return 0; +} + +static const struct dm_regulator_ops pbias_regulator_ops = { + .get_value = pbias_regulator_get_value, + .set_value = pbias_regulator_set_value, + .get_enable = pbias_regulator_get_enable, + .set_enable = pbias_regulator_set_enable, +}; + +U_BOOT_DRIVER(pbias_regulator) = { + .name = "pbias_regulator", + .id = UCLASS_REGULATOR, + .ops = &pbias_regulator_ops, + .probe = pbias_regulator_probe, +}; diff --git a/drivers/power/regulator/sandbox.c b/drivers/power/regulator/sandbox.c index 06c09fd051..f980a17389 100644 --- a/drivers/power/regulator/sandbox.c +++ b/drivers/power/regulator/sandbox.c @@ -87,7 +87,7 @@ int out_get_value(struct udevice *dev, int output_count, int reg_type, int ret; if (dev->driver_data > output_count) { - error("Unknown regulator number: %lu for PMIC %s!", + pr_err("Unknown regulator number: %lu for PMIC %s!", dev->driver_data, dev->name); return -EINVAL; } @@ -95,7 +95,7 @@ int out_get_value(struct udevice *dev, int output_count, int reg_type, reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type; ret = pmic_read(dev->parent, reg, ®_val, 1); if (ret) { - error("PMIC read failed: %d\n", ret); + pr_err("PMIC read failed: %d\n", ret); return ret; } @@ -115,14 +115,14 @@ static int out_set_value(struct udevice *dev, int output_count, int reg_type, int max_value; if (dev->driver_data > output_count) { - error("Unknown regulator number: %lu for PMIC %s!", + pr_err("Unknown regulator number: %lu for PMIC %s!", dev->driver_data, dev->name); return -EINVAL; } max_value = range[dev->driver_data - 1].max; if (value > max_value) { - error("Wrong value for %s: %lu. Max is: %d.", + pr_err("Wrong value for %s: %lu. Max is: %d.", dev->name, dev->driver_data, max_value); return -EINVAL; } @@ -134,7 +134,7 @@ static int out_set_value(struct udevice *dev, int output_count, int reg_type, reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type; ret = pmic_write(dev->parent, reg, ®_val, 1); if (ret) { - error("PMIC write failed: %d\n", ret); + pr_err("PMIC write failed: %d\n", ret); return ret; } @@ -154,7 +154,7 @@ static int out_get_mode(struct udevice *dev) reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM; ret = pmic_read(dev->parent, reg, ®_val, 1); if (ret) { - error("PMIC read failed: %d\n", ret); + pr_err("PMIC read failed: %d\n", ret); return ret; } @@ -163,7 +163,7 @@ static int out_get_mode(struct udevice *dev) return uc_pdata->mode[i].id; } - error("Unknown operation mode for %s!", dev->name); + pr_err("Unknown operation mode for %s!", dev->name); return -EINVAL; } @@ -188,14 +188,14 @@ static int out_set_mode(struct udevice *dev, int mode) } if (reg_val == -1) { - error("Unknown operation mode for %s!", dev->name); + pr_err("Unknown operation mode for %s!", dev->name); return -EINVAL; } reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM; ret = pmic_write(dev->parent, reg, (uint8_t *)®_val, 1); if (ret) { - error("PMIC write failed: %d\n", ret); + pr_err("PMIC write failed: %d\n", ret); return ret; } diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile index b09d03c2c9..45b5fe7247 100644 --- a/drivers/ram/rockchip/Makefile +++ b/drivers/ram/rockchip/Makefile @@ -5,3 +5,8 @@ # obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o +obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o +obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o +obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o +obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o +obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index 7577ff0363..bfcb1ddefe 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -230,7 +230,7 @@ static int memory_init(struct rk3368_ddr_pctl *pctl, tmp = get_timer(0); do { if (get_timer(tmp) > timeout_ms) { - error("%s: POWER_UP_START did not complete in %ld ms\n", + pr_err("%s: POWER_UP_START did not complete in %ld ms\n", __func__, timeout_ms); return -ETIME; } @@ -422,7 +422,7 @@ static int dfi_cfg(struct rk3368_ddr_pctl *pctl) tmp = get_timer(0); do { if (get_timer(tmp) > timeout_ms) { - error("%s: DFI init did not complete within %ld ms\n", + pr_err("%s: DFI init did not complete within %ld ms\n", __func__, timeout_ms); return -ETIME; } @@ -457,7 +457,7 @@ static int pctl_calc_timings(struct rk3368_sdram_params *params, u32 tfaw_as_ps; if (params->ddr_speed_bin != DDR3_1600K) { - error("%s: unimplemented DDR3 speed bin %d\n", + pr_err("%s: unimplemented DDR3 speed bin %d\n", __func__, params->ddr_speed_bin); return -1; } @@ -585,7 +585,7 @@ static int ddrphy_data_training(struct rk3368_ddr_pctl *pctl, tmp = get_timer(0); do { if (get_timer(tmp) > timeout_ms) { - error("%s: did not complete within %ld ms\n", + pr_err("%s: did not complete within %ld ms\n", __func__, timeout_ms); return -ETIME; } @@ -625,7 +625,7 @@ static int sdram_col_row_detect(struct udevice *dev) } if (col == 8) { - error("%s: col detect error\n", __func__); + pr_err("%s: col detect error\n", __func__); return -EINVAL; } @@ -644,7 +644,7 @@ static int sdram_col_row_detect(struct udevice *dev) } if (row == 11) { - error("%s: row detect error\n", __func__); + pr_err("%s: row detect error\n", __func__); return -EINVAL; } @@ -764,7 +764,7 @@ static int msch_niu_config(struct rk3368_msch *msch, } } - error("%s: ddrconf (NIU config) not found\n", __func__); + pr_err("%s: ddrconf (NIU config) not found\n", __func__); return -EINVAL; } diff --git a/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index 9d8b225dfa..365d00ef54 100644 --- a/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -682,11 +682,18 @@ out: static int sdram_get_niu_config(struct rk3188_sdram_params *sdram_params) { - int i, tmp, size, ret = 0; + int i, tmp, size, row, ret = 0; + row = sdram_params->ch[0].cs0_row; + /* + * RK3188 share the rank and row bit15, we use same ddr config for 15bit + * and 16bit row + */ + if (row == 16) + row = 15; tmp = sdram_params->ch[0].col - 9; tmp -= (sdram_params->ch[0].bw == 2) ? 0 : 1; - tmp |= ((sdram_params->ch[0].cs0_row - 13) << 4); + tmp |= ((row - 13) << 4); size = sizeof(ddrconf_table)/sizeof(ddrconf_table[0]); for (i = 0; i < size; i++) if (tmp == ddrconf_table[i]) diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c new file mode 100644 index 0000000000..cc3138b21d --- /dev/null +++ b/drivers/ram/rockchip/sdram_rk322x.c @@ -0,0 +1,855 @@ +/* + * (C) Copyright 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0 + */ +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <dt-structs.h> +#include <errno.h> +#include <ram.h> +#include <regmap.h> +#include <syscon.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/cru_rk322x.h> +#include <asm/arch/grf_rk322x.h> +#include <asm/arch/hardware.h> +#include <asm/arch/sdram_rk322x.h> +#include <asm/arch/timer.h> +#include <asm/arch/uart.h> +#include <asm/arch/sdram_common.h> +#include <asm/types.h> +#include <linux/err.h> + +DECLARE_GLOBAL_DATA_PTR; +struct chan_info { + struct rk322x_ddr_pctl *pctl; + struct rk322x_ddr_phy *phy; + struct rk322x_service_sys *msch; +}; + +struct dram_info { + struct chan_info chan[1]; + struct ram_info info; + struct clk ddr_clk; + struct rk322x_cru *cru; + struct rk322x_grf *grf; +}; + +struct rk322x_sdram_params { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_rockchip_rk3228_dmc of_plat; +#endif + struct rk322x_sdram_channel ch[1]; + struct rk322x_pctl_timing pctl_timing; + struct rk322x_phy_timing phy_timing; + struct rk322x_base_params base; + int num_channels; + struct regmap *map; +}; + +#ifdef CONFIG_TPL_BUILD +/* + * [7:6] bank(n:n bit bank) + * [5:4] row(13+n) + * [3] cs(0:1 cs, 1:2 cs) + * [2:1] bank(n:n bit bank) + * [0] col(10+n) + */ +const char ddr_cfg_2_rbc[] = { + ((0 << 6) | (0 << 4) | (0 << 3) | (1 << 2) | 1), + ((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 1), + ((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 1), + ((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 1), + ((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 2), + ((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 2), + ((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 2), + ((0 << 6) | (0 << 4) | (0 << 3) | (1 << 2) | 0), + ((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 0), + ((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 0), + ((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 0), + ((0 << 6) | (2 << 4) | (0 << 3) | (0 << 2) | 1), + ((1 << 6) | (1 << 4) | (0 << 3) | (0 << 2) | 2), + ((1 << 6) | (1 << 4) | (0 << 3) | (0 << 2) | 1), + ((0 << 6) | (3 << 4) | (1 << 3) | (1 << 2) | 1), + ((0 << 6) | (3 << 4) | (1 << 3) | (1 << 2) | 0), +}; + +static void copy_to_reg(u32 *dest, const u32 *src, u32 n) +{ + int i; + + for (i = 0; i < n / sizeof(u32); i++) { + writel(*src, dest); + src++; + dest++; + } +} + +void phy_pctrl_reset(struct rk322x_cru *cru, + struct rk322x_ddr_phy *ddr_phy) +{ + rk_clrsetreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT | + 1 << DDRCTRL_SRST_SHIFT | 1 << DDRPHY_PSRST_SHIFT | + 1 << DDRPHY_SRST_SHIFT, + 1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT | + 1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT); + + rockchip_udelay(10); + + rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT | + 1 << DDRPHY_SRST_SHIFT); + rockchip_udelay(10); + + rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT | + 1 << DDRCTRL_SRST_SHIFT); + rockchip_udelay(10); + + clrbits_le32(&ddr_phy->ddrphy_reg[0], + SOFT_RESET_MASK << SOFT_RESET_SHIFT); + rockchip_udelay(10); + setbits_le32(&ddr_phy->ddrphy_reg[0], + SOFT_DERESET_ANALOG); + rockchip_udelay(5); + setbits_le32(&ddr_phy->ddrphy_reg[0], + SOFT_DERESET_DIGITAL); + + rockchip_udelay(1); +} + +void phy_dll_bypass_set(struct rk322x_ddr_phy *ddr_phy, u32 freq) +{ + u32 tmp; + + setbits_le32(&ddr_phy->ddrphy_reg[0x13], 0x10); + setbits_le32(&ddr_phy->ddrphy_reg[0x26], 0x10); + setbits_le32(&ddr_phy->ddrphy_reg[0x36], 0x10); + setbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x10); + setbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x10); + + clrbits_le32(&ddr_phy->ddrphy_reg[0x14], 0x8); + clrbits_le32(&ddr_phy->ddrphy_reg[0x27], 0x8); + clrbits_le32(&ddr_phy->ddrphy_reg[0x37], 0x8); + clrbits_le32(&ddr_phy->ddrphy_reg[0x47], 0x8); + clrbits_le32(&ddr_phy->ddrphy_reg[0x57], 0x8); + + if (freq <= 400) + setbits_le32(&ddr_phy->ddrphy_reg[0xa4], 0x1f); + else + clrbits_le32(&ddr_phy->ddrphy_reg[0xa4], 0x1f); + + if (freq <= 680) + tmp = 3; + else + tmp = 2; + + writel(tmp, &ddr_phy->ddrphy_reg[0x28]); + writel(tmp, &ddr_phy->ddrphy_reg[0x38]); + writel(tmp, &ddr_phy->ddrphy_reg[0x48]); + writel(tmp, &ddr_phy->ddrphy_reg[0x58]); +} + +static void send_command(struct rk322x_ddr_pctl *pctl, + u32 rank, u32 cmd, u32 arg) +{ + writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd); + rockchip_udelay(1); + while (readl(&pctl->mcmd) & START_CMD) + ; +} + +static void memory_init(struct chan_info *chan, + struct rk322x_sdram_params *sdram_params) +{ + struct rk322x_ddr_pctl *pctl = chan->pctl; + u32 dramtype = sdram_params->base.dramtype; + + if (dramtype == DDR3) { + send_command(pctl, 3, DESELECT_CMD, 0); + rockchip_udelay(1); + send_command(pctl, 3, PREA_CMD, 0); + send_command(pctl, 3, MRS_CMD, + (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT | + (sdram_params->phy_timing.mr[2] & CMD_ADDR_MASK) << + CMD_ADDR_SHIFT); + + send_command(pctl, 3, MRS_CMD, + (0x03 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT | + (sdram_params->phy_timing.mr[3] & CMD_ADDR_MASK) << + CMD_ADDR_SHIFT); + + send_command(pctl, 3, MRS_CMD, + (0x01 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT | + (sdram_params->phy_timing.mr[1] & CMD_ADDR_MASK) << + CMD_ADDR_SHIFT); + + send_command(pctl, 3, MRS_CMD, + (0x00 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT | + ((sdram_params->phy_timing.mr[0] | + DDR3_DLL_RESET) & + CMD_ADDR_MASK) << CMD_ADDR_SHIFT); + + send_command(pctl, 3, ZQCL_CMD, 0); + } else { + send_command(pctl, 3, MRS_CMD, + (0x63 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT | + (0 & LPDDR23_OP_MASK) << + LPDDR23_OP_SHIFT); + rockchip_udelay(10); + send_command(pctl, 3, MRS_CMD, + (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT | + (0xff & LPDDR23_OP_MASK) << + LPDDR23_OP_SHIFT); + rockchip_udelay(1); + send_command(pctl, 3, MRS_CMD, + (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT | + (0xff & LPDDR23_OP_MASK) << + LPDDR23_OP_SHIFT); + rockchip_udelay(1); + send_command(pctl, 3, MRS_CMD, + (1 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT | + (sdram_params->phy_timing.mr[1] & + LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT); + send_command(pctl, 3, MRS_CMD, + (2 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT | + (sdram_params->phy_timing.mr[2] & + LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT); + send_command(pctl, 3, MRS_CMD, + (3 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT | + (sdram_params->phy_timing.mr[3] & + LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT); + if (dramtype == LPDDR3) + send_command(pctl, 3, MRS_CMD, (11 & LPDDR23_MA_MASK) << + LPDDR23_MA_SHIFT | + (sdram_params->phy_timing.mr11 & + LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT); + } +} + +static u32 data_training(struct chan_info *chan) +{ + struct rk322x_ddr_phy *ddr_phy = chan->phy; + struct rk322x_ddr_pctl *pctl = chan->pctl; + u32 value; + u32 bw = (readl(&ddr_phy->ddrphy_reg[0]) >> 4) & 0xf; + u32 ret; + + /* disable auto refresh */ + value = readl(&pctl->trefi) | (1 << 31); + writel(1 << 31, &pctl->trefi); + + clrsetbits_le32(&ddr_phy->ddrphy_reg[2], 0x30, + DQS_SQU_CAL_SEL_CS0); + setbits_le32(&ddr_phy->ddrphy_reg[2], DQS_SQU_CAL_START); + + rockchip_udelay(30); + ret = readl(&ddr_phy->ddrphy_reg[0xff]); + + clrbits_le32(&ddr_phy->ddrphy_reg[2], + DQS_SQU_CAL_START); + + /* + * since data training will take about 20us, so send some auto + * refresh(about 7.8us) to complement the lost time + */ + send_command(pctl, 3, PREA_CMD, 0); + send_command(pctl, 3, REF_CMD, 0); + + writel(value, &pctl->trefi); + + if (ret & 0x10) { + ret = -1; + } else { + ret = (ret & 0xf) ^ bw; + ret = (ret == 0) ? 0 : -1; + } + return ret; +} + +static void move_to_config_state(struct rk322x_ddr_pctl *pctl) +{ + unsigned int state; + + while (1) { + state = readl(&pctl->stat) & PCTL_STAT_MASK; + switch (state) { + case LOW_POWER: + writel(WAKEUP_STATE, &pctl->sctl); + while ((readl(&pctl->stat) & PCTL_STAT_MASK) + != ACCESS) + ; + /* + * If at low power state, need wakeup first, and then + * enter the config, so fallthrough + */ + case ACCESS: + /* fallthrough */ + case INIT_MEM: + writel(CFG_STATE, &pctl->sctl); + while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG) + ; + break; + case CONFIG: + return; + default: + break; + } + } +} + +static void move_to_access_state(struct rk322x_ddr_pctl *pctl) +{ + unsigned int state; + + while (1) { + state = readl(&pctl->stat) & PCTL_STAT_MASK; + switch (state) { + case LOW_POWER: + writel(WAKEUP_STATE, &pctl->sctl); + while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS) + ; + break; + case INIT_MEM: + writel(CFG_STATE, &pctl->sctl); + while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG) + ; + /* fallthrough */ + case CONFIG: + writel(GO_STATE, &pctl->sctl); + while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS) + ; + break; + case ACCESS: + return; + default: + break; + } + } +} + +static void move_to_lowpower_state(struct rk322x_ddr_pctl *pctl) +{ + unsigned int state; + + while (1) { + state = readl(&pctl->stat) & PCTL_STAT_MASK; + switch (state) { + case INIT_MEM: + writel(CFG_STATE, &pctl->sctl); + while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG) + ; + /* fallthrough */ + case CONFIG: + writel(GO_STATE, &pctl->sctl); + while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS) + ; + break; + case ACCESS: + writel(SLEEP_STATE, &pctl->sctl); + while ((readl(&pctl->stat) & PCTL_STAT_MASK) != + LOW_POWER) + ; + break; + case LOW_POWER: + return; + default: + break; + } + } +} + +/* pctl should in low power mode when call this function */ +static void phy_softreset(struct dram_info *dram) +{ + struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy; + struct rk322x_grf *grf = dram->grf; + + writel(GRF_DDRPHY_BUFFEREN_CORE_EN, &grf->soc_con[0]); + clrbits_le32(&ddr_phy->ddrphy_reg[0], 0x3 << 2); + rockchip_udelay(1); + setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 2); + rockchip_udelay(5); + setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 3); + writel(GRF_DDRPHY_BUFFEREN_CORE_DIS, &grf->soc_con[0]); +} + +/* bw: 2: 32bit, 1:16bit */ +static void set_bw(struct dram_info *dram, u32 bw) +{ + struct rk322x_ddr_pctl *pctl = dram->chan[0].pctl; + struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy; + struct rk322x_grf *grf = dram->grf; + + if (bw == 1) { + setbits_le32(&pctl->ppcfg, 1); + clrbits_le32(&ddr_phy->ddrphy_reg[0], 0xc << 4); + writel(GRF_MSCH_NOC_16BIT_EN, &grf->soc_con[0]); + clrbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x8); + clrbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x8); + } else { + clrbits_le32(&pctl->ppcfg, 1); + setbits_le32(&ddr_phy->ddrphy_reg[0], 0xf << 4); + writel(GRF_DDR_32BIT_EN | GRF_MSCH_NOC_32BIT_EN, + &grf->soc_con[0]); + setbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x8); + setbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x8); + } +} + +static void pctl_cfg(struct rk322x_ddr_pctl *pctl, + struct rk322x_sdram_params *sdram_params, + struct rk322x_grf *grf) +{ + u32 burst_len; + u32 bw; + u32 dramtype = sdram_params->base.dramtype; + + if (sdram_params->ch[0].bw == 2) + bw = GRF_DDR_32BIT_EN | GRF_MSCH_NOC_32BIT_EN; + else + bw = GRF_MSCH_NOC_16BIT_EN; + + writel(DFI_INIT_START | DFI_DATA_BYTE_DISABLE_EN, &pctl->dfistcfg0); + writel(DFI_DRAM_CLK_SR_EN | DFI_DRAM_CLK_DPD_EN, &pctl->dfistcfg1); + writel(DFI_PARITY_INTR_EN | DFI_PARITY_EN, &pctl->dfistcfg2); + writel(0x51010, &pctl->dfilpcfg0); + + writel(1, &pctl->dfitphyupdtype0); + writel(0x0d, &pctl->dfitphyrdlat); + writel(0, &pctl->dfitphywrdata); + + writel(0, &pctl->dfiupdcfg); + copy_to_reg(&pctl->togcnt1u, &sdram_params->pctl_timing.togcnt1u, + sizeof(struct rk322x_pctl_timing)); + if (dramtype == DDR3) { + writel((1 << 3) | (1 << 11), + &pctl->dfiodtcfg); + writel(7 << 16, &pctl->dfiodtcfg1); + writel((readl(&pctl->tcl) - 1) / 2 - 1, &pctl->dfitrddataen); + writel((readl(&pctl->tcwl) - 1) / 2 - 1, &pctl->dfitphywrlat); + writel(500, &pctl->trsth); + writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT | DDR3_EN | + DDR2_DDR3_BL_8 | (6 - 4) << TFAW_SHIFT | PD_EXIT_SLOW | + 1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT, + &pctl->mcfg); + writel(bw | GRF_DDR3_EN, &grf->soc_con[0]); + } else { + if (sdram_params->phy_timing.bl & PHT_BL_8) + burst_len = MDDR_LPDDR2_BL_8; + else + burst_len = MDDR_LPDDR2_BL_4; + + writel(readl(&pctl->tcl) / 2 - 1, &pctl->dfitrddataen); + writel(readl(&pctl->tcwl) / 2 - 1, &pctl->dfitphywrlat); + writel(0, &pctl->trsth); + if (dramtype == LPDDR2) { + writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT | + LPDDR2_S4 | LPDDR2_EN | burst_len | + (6 - 4) << TFAW_SHIFT | PD_EXIT_FAST | + 1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT, + &pctl->mcfg); + writel(0, &pctl->dfiodtcfg); + writel(0, &pctl->dfiodtcfg1); + } else { + writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT | + LPDDR2_S4 | LPDDR3_EN | burst_len | + (6 - 4) << TFAW_SHIFT | PD_EXIT_FAST | + 1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT, + &pctl->mcfg); + writel((1 << 3) | (1 << 2), &pctl->dfiodtcfg); + writel((7 << 16) | 4, &pctl->dfiodtcfg1); + } + writel(bw | GRF_LPDDR2_3_EN, &grf->soc_con[0]); + } + setbits_le32(&pctl->scfg, 1); +} + +static void phy_cfg(struct chan_info *chan, + struct rk322x_sdram_params *sdram_params) +{ + struct rk322x_ddr_phy *ddr_phy = chan->phy; + struct rk322x_service_sys *axi_bus = chan->msch; + struct rk322x_msch_timings *noc_timing = &sdram_params->base.noc_timing; + struct rk322x_phy_timing *phy_timing = &sdram_params->phy_timing; + struct rk322x_pctl_timing *pctl_timing = &sdram_params->pctl_timing; + u32 cmd_drv, clk_drv, dqs_drv, dqs_odt; + + writel(noc_timing->ddrtiming, &axi_bus->ddrtiming); + writel(noc_timing->ddrmode, &axi_bus->ddrmode); + writel(noc_timing->readlatency, &axi_bus->readlatency); + writel(noc_timing->activate, &axi_bus->activate); + writel(noc_timing->devtodev, &axi_bus->devtodev); + + switch (sdram_params->base.dramtype) { + case DDR3: + writel(PHY_DDR3 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]); + break; + case LPDDR2: + writel(PHY_LPDDR2 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]); + break; + default: + writel(PHY_LPDDR2 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]); + break; + } + + writel(phy_timing->cl_al, &ddr_phy->ddrphy_reg[0xb]); + writel(pctl_timing->tcwl, &ddr_phy->ddrphy_reg[0xc]); + + cmd_drv = PHY_RON_RTT_34OHM; + clk_drv = PHY_RON_RTT_45OHM; + dqs_drv = PHY_RON_RTT_34OHM; + if (sdram_params->base.dramtype == LPDDR2) + dqs_odt = PHY_RON_RTT_DISABLE; + else + dqs_odt = PHY_RON_RTT_225OHM; + + writel(cmd_drv, &ddr_phy->ddrphy_reg[0x11]); + clrsetbits_le32(&ddr_phy->ddrphy_reg[0x12], (0x1f << 3), cmd_drv << 3); + writel(clk_drv, &ddr_phy->ddrphy_reg[0x16]); + writel(clk_drv, &ddr_phy->ddrphy_reg[0x18]); + + writel(dqs_drv, &ddr_phy->ddrphy_reg[0x20]); + writel(dqs_drv, &ddr_phy->ddrphy_reg[0x2f]); + writel(dqs_drv, &ddr_phy->ddrphy_reg[0x30]); + writel(dqs_drv, &ddr_phy->ddrphy_reg[0x3f]); + writel(dqs_drv, &ddr_phy->ddrphy_reg[0x40]); + writel(dqs_drv, &ddr_phy->ddrphy_reg[0x4f]); + writel(dqs_drv, &ddr_phy->ddrphy_reg[0x50]); + writel(dqs_drv, &ddr_phy->ddrphy_reg[0x5f]); + + writel(dqs_odt, &ddr_phy->ddrphy_reg[0x21]); + writel(dqs_odt, &ddr_phy->ddrphy_reg[0x2e]); + writel(dqs_odt, &ddr_phy->ddrphy_reg[0x31]); + writel(dqs_odt, &ddr_phy->ddrphy_reg[0x3e]); + writel(dqs_odt, &ddr_phy->ddrphy_reg[0x41]); + writel(dqs_odt, &ddr_phy->ddrphy_reg[0x4e]); + writel(dqs_odt, &ddr_phy->ddrphy_reg[0x51]); + writel(dqs_odt, &ddr_phy->ddrphy_reg[0x5e]); +} + +void dram_cfg_rbc(struct chan_info *chan, + struct rk322x_sdram_params *sdram_params) +{ + char noc_config; + int i = 0; + struct rk322x_sdram_channel *config = &sdram_params->ch[0]; + struct rk322x_service_sys *axi_bus = chan->msch; + + move_to_config_state(chan->pctl); + + if ((config->rank == 2) && (config->cs1_row == config->cs0_row)) { + if ((config->col + config->bw) == 12) { + i = 14; + goto finish; + } else if ((config->col + config->bw) == 11) { + i = 15; + goto finish; + } + } + noc_config = ((config->cs0_row - 13) << 4) | ((config->bk - 2) << 2) | + (config->col + config->bw - 11); + for (i = 0; i < 11; i++) { + if (noc_config == ddr_cfg_2_rbc[i]) + break; + } + + if (i < 11) + goto finish; + + noc_config = ((config->bk - 2) << 6) | ((config->cs0_row - 13) << 4) | + (config->col + config->bw - 11); + + for (i = 11; i < 14; i++) { + if (noc_config == ddr_cfg_2_rbc[i]) + break; + } + if (i < 14) + goto finish; + else + i = 0; + +finish: + writel(i, &axi_bus->ddrconf); + move_to_access_state(chan->pctl); +} + +static void dram_all_config(const struct dram_info *dram, + struct rk322x_sdram_params *sdram_params) +{ + struct rk322x_sdram_channel *info = &sdram_params->ch[0]; + u32 sys_reg = 0; + + sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; + sys_reg |= (1 - 1) << SYS_REG_NUM_CH_SHIFT; + sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(0); + sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(0); + sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(0); + sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(0); + sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(0); + sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(0); + sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(0); + sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(0); + sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(0); + + writel(sys_reg, &dram->grf->os_reg[2]); +} + +#define TEST_PATTEN 0x5aa5f00f + +static int dram_cap_detect(struct dram_info *dram, + struct rk322x_sdram_params *sdram_params) +{ + u32 bw, row, col, addr; + u32 ret = 0; + struct rk322x_service_sys *axi_bus = dram->chan[0].msch; + + if (sdram_params->base.dramtype == DDR3) + sdram_params->ch[0].dbw = 1; + else + sdram_params->ch[0].dbw = 2; + + move_to_config_state(dram->chan[0].pctl); + /* bw detect */ + set_bw(dram, 2); + if (data_training(&dram->chan[0]) == 0) { + bw = 2; + } else { + bw = 1; + set_bw(dram, 1); + move_to_lowpower_state(dram->chan[0].pctl); + phy_softreset(dram); + move_to_config_state(dram->chan[0].pctl); + if (data_training(&dram->chan[0])) { + printf("BW detect error\n"); + ret = -EINVAL; + } + } + sdram_params->ch[0].bw = bw; + sdram_params->ch[0].bk = 3; + + if (bw == 2) + writel(6, &axi_bus->ddrconf); + else + writel(3, &axi_bus->ddrconf); + move_to_access_state(dram->chan[0].pctl); + for (col = 11; col >= 9; col--) { + writel(0, CONFIG_SYS_SDRAM_BASE); + addr = CONFIG_SYS_SDRAM_BASE + + (1 << (col + bw - 1)); + writel(TEST_PATTEN, addr); + if ((readl(addr) == TEST_PATTEN) && + (readl(CONFIG_SYS_SDRAM_BASE) == 0)) + break; + } + if (col == 8) { + printf("Col detect error\n"); + ret = -EINVAL; + goto out; + } else { + sdram_params->ch[0].col = col; + } + + writel(10, &axi_bus->ddrconf); + + /* Detect row*/ + for (row = 16; row >= 12; row--) { + writel(0, CONFIG_SYS_SDRAM_BASE); + addr = CONFIG_SYS_SDRAM_BASE + (1u << (row + 11 + 3 - 1)); + writel(TEST_PATTEN, addr); + if ((readl(addr) == TEST_PATTEN) && + (readl(CONFIG_SYS_SDRAM_BASE) == 0)) + break; + } + if (row == 11) { + printf("Row detect error\n"); + ret = -EINVAL; + } else { + sdram_params->ch[0].cs1_row = row; + sdram_params->ch[0].row_3_4 = 0; + sdram_params->ch[0].cs0_row = row; + } + /* cs detect */ + writel(0, CONFIG_SYS_SDRAM_BASE); + writel(TEST_PATTEN, CONFIG_SYS_SDRAM_BASE + (1u << 30)); + writel(~TEST_PATTEN, CONFIG_SYS_SDRAM_BASE + (1u << 30) + 4); + if ((readl(CONFIG_SYS_SDRAM_BASE + (1u << 30)) == TEST_PATTEN) && + (readl(CONFIG_SYS_SDRAM_BASE) == 0)) + sdram_params->ch[0].rank = 2; + else + sdram_params->ch[0].rank = 1; +out: + return ret; +} + +static int sdram_init(struct dram_info *dram, + struct rk322x_sdram_params *sdram_params) +{ + int ret; + + ret = clk_set_rate(&dram->ddr_clk, + sdram_params->base.ddr_freq * MHz * 2); + if (ret < 0) { + printf("Could not set DDR clock\n"); + return ret; + } + + phy_pctrl_reset(dram->cru, dram->chan[0].phy); + phy_dll_bypass_set(dram->chan[0].phy, sdram_params->base.ddr_freq); + pctl_cfg(dram->chan[0].pctl, sdram_params, dram->grf); + phy_cfg(&dram->chan[0], sdram_params); + writel(POWER_UP_START, &dram->chan[0].pctl->powctl); + while (!(readl(&dram->chan[0].pctl->powstat) & POWER_UP_DONE)) + ; + memory_init(&dram->chan[0], sdram_params); + move_to_access_state(dram->chan[0].pctl); + ret = dram_cap_detect(dram, sdram_params); + if (ret) + goto out; + dram_cfg_rbc(&dram->chan[0], sdram_params); + dram_all_config(dram, sdram_params); +out: + return ret; +} + +static int rk322x_dmc_ofdata_to_platdata(struct udevice *dev) +{ +#if !CONFIG_IS_ENABLED(OF_PLATDATA) + struct rk322x_sdram_params *params = dev_get_platdata(dev); + const void *blob = gd->fdt_blob; + int node = dev_of_offset(dev); + int ret; + + params->num_channels = 1; + + ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing", + (u32 *)¶ms->pctl_timing, + sizeof(params->pctl_timing) / sizeof(u32)); + if (ret) { + printf("%s: Cannot read rockchip,pctl-timing\n", __func__); + return -EINVAL; + } + ret = fdtdec_get_int_array(blob, node, "rockchip,phy-timing", + (u32 *)¶ms->phy_timing, + sizeof(params->phy_timing) / sizeof(u32)); + if (ret) { + printf("%s: Cannot read rockchip,phy-timing\n", __func__); + return -EINVAL; + } + ret = fdtdec_get_int_array(blob, node, "rockchip,sdram-params", + (u32 *)¶ms->base, + sizeof(params->base) / sizeof(u32)); + if (ret) { + printf("%s: Cannot read rockchip,sdram-params\n", __func__); + return -EINVAL; + } + ret = regmap_init_mem(dev, ¶ms->map); + if (ret) + return ret; +#endif + + return 0; +} +#endif /* CONFIG_TPL_BUILD */ + +#if CONFIG_IS_ENABLED(OF_PLATDATA) +static int conv_of_platdata(struct udevice *dev) +{ + struct rk322x_sdram_params *plat = dev_get_platdata(dev); + struct dtd_rockchip_rk322x_dmc *of_plat = &plat->of_plat; + int ret; + + memcpy(&plat->pctl_timing, of_plat->rockchip_pctl_timing, + sizeof(plat->pctl_timing)); + memcpy(&plat->phy_timing, of_plat->rockchip_phy_timing, + sizeof(plat->phy_timing)); + memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base)); + + plat->num_channels = 1; + ret = regmap_init_mem_platdata(dev, of_plat->reg, + ARRAY_SIZE(of_plat->reg) / 2, + &plat->map); + if (ret) + return ret; + + return 0; +} +#endif + +static int rk322x_dmc_probe(struct udevice *dev) +{ +#ifdef CONFIG_TPL_BUILD + struct rk322x_sdram_params *plat = dev_get_platdata(dev); + int ret; + struct udevice *dev_clk; +#endif + struct dram_info *priv = dev_get_priv(dev); + + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); +#ifdef CONFIG_TPL_BUILD +#if CONFIG_IS_ENABLED(OF_PLATDATA) + ret = conv_of_platdata(dev); + if (ret) + return ret; +#endif + + priv->chan[0].msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH); + priv->chan[0].pctl = regmap_get_range(plat->map, 0); + priv->chan[0].phy = regmap_get_range(plat->map, 1); + ret = rockchip_get_clk(&dev_clk); + if (ret) + return ret; + priv->ddr_clk.id = CLK_DDR; + ret = clk_request(dev_clk, &priv->ddr_clk); + if (ret) + return ret; + + priv->cru = rockchip_get_cru(); + if (IS_ERR(priv->cru)) + return PTR_ERR(priv->cru); + ret = sdram_init(priv, plat); + if (ret) + return ret; +#else + priv->info.base = CONFIG_SYS_SDRAM_BASE; + priv->info.size = rockchip_sdram_size( + (phys_addr_t)&priv->grf->os_reg[2]); +#endif + + return 0; +} + +static int rk322x_dmc_get_info(struct udevice *dev, struct ram_info *info) +{ + struct dram_info *priv = dev_get_priv(dev); + + *info = priv->info; + + return 0; +} + +static struct ram_ops rk322x_dmc_ops = { + .get_info = rk322x_dmc_get_info, +}; + +static const struct udevice_id rk322x_dmc_ids[] = { + { .compatible = "rockchip,rk3228-dmc" }, + { } +}; + +U_BOOT_DRIVER(dmc_rk322x) = { + .name = "rockchip_rk322x_dmc", + .id = UCLASS_RAM, + .of_match = rk322x_dmc_ids, + .ops = &rk322x_dmc_ops, +#ifdef CONFIG_TPL_BUILD + .ofdata_to_platdata = rk322x_dmc_ofdata_to_platdata, +#endif + .probe = rk322x_dmc_probe, + .priv_auto_alloc_size = sizeof(struct dram_info), +#ifdef CONFIG_TPL_BUILD + .platdata_auto_alloc_size = sizeof(struct rk322x_sdram_params), +#endif +}; + diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index 95efb117fc..95efb117fc 100644 --- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c diff --git a/arch/arm/mach-rockchip/rk3328/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c index 9637a35e23..9637a35e23 100644 --- a/arch/arm/mach-rockchip/rk3328/sdram_rk3328.c +++ b/drivers/ram/rockchip/sdram_rk3328.c diff --git a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 5ed4b03837..76c1fe80a7 100644 --- a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -551,7 +551,7 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel, tmp = get_timer(0); do { if (get_timer(tmp) > timeout_ms) { - error("DRAM (%s): phy failed to lock within %ld ms\n", + pr_err("DRAM (%s): phy failed to lock within %ld ms\n", __func__, timeout_ms); return -ETIME; } diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index b1b0289a1b..fdf088e783 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -262,7 +262,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) bank_name = (char *)ofnode_get_name(bank_node); strsep(&bank_name, "@"); if (!bank_name) { - error("missing sdram bank index"); + pr_err("missing sdram bank index"); return -EINVAL; } @@ -271,7 +271,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) (long unsigned int *)&bank_params->target_bank); if (bank_params->target_bank >= MAX_SDRAM_BANK) { - error("Found bank %d , but only bank 0 and 1 are supported", + pr_err("Found bank %d , but only bank 0 and 1 are supported", bank_params->target_bank); return -EINVAL; } @@ -285,7 +285,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) sizeof(struct stm32_sdram_control)); if (!params->bank_params[bank].sdram_control) { - error("st,sdram-control not found for %s", + pr_err("st,sdram-control not found for %s", ofnode_get_name(bank_node)); return -EINVAL; } @@ -298,7 +298,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) sizeof(struct stm32_sdram_timing)); if (!params->bank_params[bank].sdram_timing) { - error("st,sdram-timing not found for %s", + pr_err("st,sdram-timing not found for %s", ofnode_get_name(bank_node)); return -EINVAL; } diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index c74d16fe20..a40cea55ae 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -210,7 +210,8 @@ static int uniphier_reset_update(struct reset_ctl *reset_ctl, int assert) return 0; } - dev_err(priv->dev, "reset_id=%lu was not handled\n", id); + dev_err(reset_ctl->dev, "reset_id=%lu was not handled\n", id); + return -EINVAL; } diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c index a79708cde2..024b996f0c 100644 --- a/drivers/reset/sti-reset.c +++ b/drivers/reset/sti-reset.c @@ -201,20 +201,20 @@ phys_addr_t sti_reset_get_regmap(const char *compatible) node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, compatible); if (node < 0) { - error("unable to find %s node\n", compatible); + pr_err("unable to find %s node\n", compatible); return node; } ret = uclass_get_device_by_of_offset(UCLASS_SYSCON, node, &syscon); if (ret) { - error("%s: uclass_get_device_by_of_offset failed: %d\n", + pr_err("%s: uclass_get_device_by_of_offset failed: %d\n", __func__, ret); return ret; } regmap = syscon_get_regmap(syscon); if (!regmap) { - error("unable to get regmap for %s\n", syscon->name); + pr_err("unable to get regmap for %s\n", syscon->name); return -ENODEV; } @@ -251,7 +251,7 @@ static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert) if (ch->deassert_cnt > 0) return 0; } else - error("Reset balancing error: reset_ctl=%p dev=%p id=%lu\n", + pr_err("Reset balancing error: reset_ctl=%p dev=%p id=%lu\n", reset_ctl, reset_ctl->dev, reset_ctl->id); } @@ -268,7 +268,7 @@ static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert) reg = (void __iomem *)base + ch->ack_offset; if (wait_for_bit(__func__, reg, BIT(ch->ack_bit), ctrl_val, 1000, false)) { - error("Stuck on waiting ack reset_ctl=%p dev=%p id=%lu\n", + pr_err("Stuck on waiting ack reset_ctl=%p dev=%p id=%lu\n", reset_ctl, reset_ctl->dev, reset_ctl->id); return -ETIMEDOUT; diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 9bf2e26e9d..7c54a49bb3 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -531,9 +531,9 @@ config STI_ASC_SERIAL config STM32X7_SERIAL bool "STMicroelectronics STM32 SoCs on-chip UART" - depends on DM_SERIAL && (STM32F7 || STM32H7) + depends on DM_SERIAL && (STM32F4 || STM32F7 || STM32H7) help - If you have a machine based on a STM32 F7 or H7 SoC you can + If you have a machine based on a STM32 F4, F7 or H7 SoC you can enable its onboard serial ports, say Y to this option. If unsure, say N. diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 087785f9a2..d9db702803 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -226,11 +226,14 @@ static int sh_serial_ofdata_to_platdata(struct udevice *dev) plat->base = addr; ret = clk_get_by_name(dev, "fck", &sh_serial_clk); - if (!ret) - plat->clk = clk_get_rate(&sh_serial_clk); - else + if (!ret) { + ret = clk_enable(&sh_serial_clk); + if (!ret) + plat->clk = clk_get_rate(&sh_serial_clk); + } else { plat->clk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "clock", 1); + } plat->type = dev_get_driver_data(dev); return 0; diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c index 2f4eafa885..a5d529cab2 100644 --- a/drivers/serial/serial_stm32x7.c +++ b/drivers/serial/serial_stm32x7.c @@ -17,71 +17,81 @@ DECLARE_GLOBAL_DATA_PTR; static int stm32_serial_setbrg(struct udevice *dev, int baudrate) { - struct stm32x7_serial_platdata *plat = dev->platdata; - struct stm32_usart *const usart = plat->base; + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + bool stm32f4 = plat->uart_info->stm32f4; + fdt_addr_t base = plat->base; u32 int_div, mantissa, fraction, oversampling; int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate); if (int_div < 16) { oversampling = 8; - setbits_le32(&usart->cr1, USART_CR1_OVER8); + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); } else { oversampling = 16; - clrbits_le32(&usart->cr1, USART_CR1_OVER8); + clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8); } mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT; fraction = int_div % oversampling; - writel(mantissa | fraction, &usart->brr); + writel(mantissa | fraction, base + BRR_OFFSET(stm32f4)); return 0; } static int stm32_serial_getc(struct udevice *dev) { - struct stm32x7_serial_platdata *plat = dev->platdata; - struct stm32_usart *const usart = plat->base; + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + bool stm32f4 = plat->uart_info->stm32f4; + fdt_addr_t base = plat->base; - if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0) + if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_RXNE) == 0) return -EAGAIN; - return readl(&usart->rd_dr); + return readl(base + RDR_OFFSET(stm32f4)); } static int stm32_serial_putc(struct udevice *dev, const char c) { - struct stm32x7_serial_platdata *plat = dev->platdata; - struct stm32_usart *const usart = plat->base; + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + bool stm32f4 = plat->uart_info->stm32f4; + fdt_addr_t base = plat->base; - if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0) + if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0) return -EAGAIN; - writel(c, &usart->tx_dr); + writel(c, base + TDR_OFFSET(stm32f4)); return 0; } static int stm32_serial_pending(struct udevice *dev, bool input) { - struct stm32x7_serial_platdata *plat = dev->platdata; - struct stm32_usart *const usart = plat->base; + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + bool stm32f4 = plat->uart_info->stm32f4; + fdt_addr_t base = plat->base; if (input) - return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0; + return readl(base + ISR_OFFSET(stm32f4)) & + USART_SR_FLAG_RXNE ? 1 : 0; else - return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1; + return readl(base + ISR_OFFSET(stm32f4)) & + USART_SR_FLAG_TXE ? 0 : 1; } static int stm32_serial_probe(struct udevice *dev) { - struct stm32x7_serial_platdata *plat = dev->platdata; - struct stm32_usart *const usart = plat->base; - -#ifdef CONFIG_CLK - int ret; + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); struct clk clk; + fdt_addr_t base = plat->base; + int ret; + bool stm32f4; + u8 uart_enable_bit; + + plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev); + stm32f4 = plat->uart_info->stm32f4; + uart_enable_bit = plat->uart_info->uart_enable_bit; ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) @@ -92,7 +102,6 @@ static int stm32_serial_probe(struct udevice *dev) dev_err(dev, "failed to enable clock\n"); return ret; } -#endif plat->clock_rate = clk_get_rate(&clk); if (plat->clock_rate < 0) { @@ -100,37 +109,36 @@ static int stm32_serial_probe(struct udevice *dev) return plat->clock_rate; }; - /* Disable usart-> disable overrun-> enable usart */ - clrbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE); - setbits_le32(&usart->cr3, USART_CR3_OVRDIS); - setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE); + /* Disable uart-> disable overrun-> enable uart */ + clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | + BIT(uart_enable_bit)); + if (plat->uart_info->has_overrun_disable) + setbits_le32(base + CR3_OFFSET(stm32f4), USART_CR3_OVRDIS); + if (plat->uart_info->has_fifo) + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | + BIT(uart_enable_bit)); return 0; } -#if CONFIG_IS_ENABLED(OF_CONTROL) static const struct udevice_id stm32_serial_id[] = { - {.compatible = "st,stm32f7-usart"}, - {.compatible = "st,stm32f7-uart"}, - {.compatible = "st,stm32h7-usart"}, - {.compatible = "st,stm32h7-uart"}, + { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info}, + { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info}, + { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info}, {} }; static int stm32_serial_ofdata_to_platdata(struct udevice *dev) { struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); - fdt_addr_t addr; - addr = devfdt_get_addr(dev); - if (addr == FDT_ADDR_T_NONE) + plat->base = devfdt_get_addr(dev); + if (plat->base == FDT_ADDR_T_NONE) return -EINVAL; - plat->base = (struct stm32_usart *)addr; - return 0; } -#endif static const struct dm_serial_ops stm32_serial_ops = { .putc = stm32_serial_putc, diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h index 9fe37af5cc..b914edf28a 100644 --- a/drivers/serial/serial_stm32x7.h +++ b/drivers/serial/serial_stm32x7.h @@ -8,38 +8,65 @@ #ifndef _SERIAL_STM32_X7_ #define _SERIAL_STM32_X7_ -struct stm32_usart { - u32 cr1; - u32 cr2; - u32 cr3; - u32 brr; - u32 gtpr; - u32 rtor; - u32 rqr; - u32 sr; - u32 icr; - u32 rd_dr; - u32 tx_dr; +#define CR1_OFFSET(x) (x ? 0x0c : 0x00) +#define CR3_OFFSET(x) (x ? 0x14 : 0x08) +#define BRR_OFFSET(x) (x ? 0x08 : 0x0c) +#define ISR_OFFSET(x) (x ? 0x00 : 0x1c) +/* + * STM32F4 has one Data Register (DR) for received or transmitted + * data, so map Receive Data Register (RDR) and Transmit Data + * Register (TDR) at the same offset + */ +#define RDR_OFFSET(x) (x ? 0x04 : 0x24) +#define TDR_OFFSET(x) (x ? 0x04 : 0x28) + +struct stm32_uart_info { + u8 uart_enable_bit; /* UART_CR1_UE */ + bool stm32f4; /* true for STM32F4, false otherwise */ + bool has_overrun_disable; + bool has_fifo; +}; + +struct stm32_uart_info stm32f4_info = { + .stm32f4 = true, + .uart_enable_bit = 13, + .has_overrun_disable = false, + .has_fifo = false, +}; + +struct stm32_uart_info stm32f7_info = { + .uart_enable_bit = 0, + .stm32f4 = false, + .has_overrun_disable = true, + .has_fifo = false, +}; + +struct stm32_uart_info stm32h7_info = { + .uart_enable_bit = 0, + .stm32f4 = false, + .has_overrun_disable = true, + .has_fifo = true, }; /* Information about a serial port */ struct stm32x7_serial_platdata { - struct stm32_usart *base; /* address of registers in physical memory */ + fdt_addr_t base; /* address of registers in physical memory */ + struct stm32_uart_info *uart_info; unsigned long int clock_rate; }; -#define USART_CR1_OVER8 (1 << 15) -#define USART_CR1_TE (1 << 3) -#define USART_CR1_RE (1 << 2) -#define USART_CR1_UE (1 << 0) +#define USART_CR1_FIFOEN BIT(29) +#define USART_CR1_OVER8 BIT(15) +#define USART_CR1_TE BIT(3) +#define USART_CR1_RE BIT(2) -#define USART_CR3_OVRDIS (1 << 12) +#define USART_CR3_OVRDIS BIT(12) -#define USART_SR_FLAG_RXNE (1 << 5) -#define USART_SR_FLAG_TXE (1 << 7) +#define USART_SR_FLAG_RXNE BIT(5) +#define USART_SR_FLAG_TXE BIT(7) -#define USART_BRR_F_MASK 0xFF +#define USART_BRR_F_MASK GENMASK(7, 0) #define USART_BRR_M_SHIFT 4 -#define USART_BRR_M_MASK 0xFFF0 +#define USART_BRR_M_MASK GENMASK(15, 4) #endif diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index 353109c070..182385e499 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -525,7 +525,7 @@ int drv_usbtty_init (void) char * tt; int snlen; - /* Ger seiral number */ + /* Get serial number */ sn = env_get("serial#"); if (!sn) sn = "000000000000"; diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index cd7c7556a7..ad56203cd6 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -17,7 +17,6 @@ endif obj-$(CONFIG_ALTERA_SPI) += altera_spi.o obj-$(CONFIG_ATH79_SPI) += ath79_spi.o -obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o obj-$(CONFIG_CF_SPI) += cf_spi.o diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c deleted file mode 100644 index a2e9c00ea6..0000000000 --- a/drivers/spi/atmel_dataflash_spi.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * Driver for ATMEL DataFlash support - * Author : Hamid Ikdoumi (Atmel) - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * This driver desperately needs rework: - * - * - use structure SoC access - * - get rid of including asm/arch/at91_spi.h - * - remove asm/arch/at91_spi.h - * - get rid of all CONFIG_ATMEL_LEGACY defines and uses - * - * 02-Aug-2010 Reinhard Meyer <uboot@emk-elektronik.de> - */ - -#include <common.h> -#ifndef CONFIG_ATMEL_LEGACY -# define CONFIG_ATMEL_LEGACY -#endif -#include <spi.h> -#include <malloc.h> - -#include <asm/io.h> - -#include <asm/arch/clk.h> -#include <asm/arch/hardware.h> - -#include "atmel_spi.h" - -#include <asm/arch/gpio.h> -#include <asm/arch/at91_pio.h> -#include <asm/arch/at91_spi.h> - -#include <dataflash.h> - -#define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ -#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 1: NPCS1%1101 */ -#define AT91_SPI_PCS2_DATAFLASH_CARD 0xB /* Chip Select 2: NPCS2%1011 */ -#define AT91_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ - -void AT91F_SpiInit(void) -{ - /* Reset the SPI */ - writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR); - - /* Configure SPI in Master Mode with No CS selected !!! */ - writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS, - ATMEL_BASE_SPI0 + AT91_SPI_MR); - - /* Configure CS0 */ - writel(AT91_SPI_NCPHA | - (AT91_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), - ATMEL_BASE_SPI0 + AT91_SPI_CSR(0)); - -#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 - /* Configure CS1 */ - writel(AT91_SPI_NCPHA | - (AT91_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), - ATMEL_BASE_SPI0 + AT91_SPI_CSR(1)); -#endif -#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2 - /* Configure CS2 */ - writel(AT91_SPI_NCPHA | - (AT91_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), - ATMEL_BASE_SPI0 + AT91_SPI_CSR(2)); -#endif -#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 - /* Configure CS3 */ - writel(AT91_SPI_NCPHA | - (AT91_SPI_DLYBS & DATAFLASH_TCSS) | - (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | - ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), - ATMEL_BASE_SPI0 + AT91_SPI_CSR(3)); -#endif - - /* SPI_Enable */ - writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR); - - while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_SPIENS)) - ; - - /* - * Add tempo to get SPI in a safe state. - * Should not be needed for new silicon (Rev B) - */ - udelay(500000); - readl(ATMEL_BASE_SPI0 + AT91_SPI_SR); - readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR); - -} - -void AT91F_SpiEnable(int cs) -{ - unsigned long mode; - - mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR); - mode &= ~AT91_SPI_PCS; - - switch (cs) { - case 0: - mode |= AT91_SPI_PCS0_DATAFLASH_CARD << 16; - break; - case 1: - mode |= AT91_SPI_PCS1_DATAFLASH_CARD << 16; - break; - case 2: - mode |= AT91_SPI_PCS2_DATAFLASH_CARD << 16; - break; - case 3: - mode |= AT91_SPI_PCS3_DATAFLASH_CARD << 16; - break; - } - - writel(mode, ATMEL_BASE_SPI0 + AT91_SPI_MR); - - /* SPI_Enable */ - writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR); -} - -unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc); - -unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) -{ - unsigned int timeout; - unsigned int timebase; - - pDesc->state = BUSY; - - writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, - ATMEL_BASE_SPI0 + AT91_SPI_PTCR); - - /* Initialize the Transmit and Receive Pointer */ - writel((unsigned int)pDesc->rx_cmd_pt, - ATMEL_BASE_SPI0 + AT91_SPI_RPR); - writel((unsigned int)pDesc->tx_cmd_pt, - ATMEL_BASE_SPI0 + AT91_SPI_TPR); - - /* Intialize the Transmit and Receive Counters */ - writel(pDesc->rx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_RCR); - writel(pDesc->tx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_TCR); - - if (pDesc->tx_data_size != 0) { - /* Initialize the Next Transmit and Next Receive Pointer */ - writel((unsigned int)pDesc->rx_data_pt, - ATMEL_BASE_SPI0 + AT91_SPI_RNPR); - writel((unsigned int)pDesc->tx_data_pt, - ATMEL_BASE_SPI0 + AT91_SPI_TNPR); - - /* Intialize the Next Transmit and Next Receive Counters */ - writel(pDesc->rx_data_size, - ATMEL_BASE_SPI0 + AT91_SPI_RNCR); - writel(pDesc->tx_data_size, - ATMEL_BASE_SPI0 + AT91_SPI_TNCR); - } - - /* arm simple, non interrupt dependent timer */ - timebase = get_timer(0); - timeout = 0; - - writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, - ATMEL_BASE_SPI0 + AT91_SPI_PTCR); - while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_RXBUFF) && - ((timeout = get_timer(timebase)) < CONFIG_SYS_SPI_WRITE_TOUT)) - ; - writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, - ATMEL_BASE_SPI0 + AT91_SPI_PTCR); - pDesc->state = IDLE; - - if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) { - printf("Error Timeout\n\r"); - return DATAFLASH_ERROR; - } - - return DATAFLASH_OK; -} diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index e2f8342e88..228e714e09 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c @@ -474,7 +474,7 @@ static int atmel_spi_probe(struct udevice *bus) ret = gpio_request_list_by_name(bus, "cs-gpios", priv->cs_gpios, ARRAY_SIZE(priv->cs_gpios), 0); if (ret < 0) { - error("Can't get %s gpios! Error: %d", bus->name, ret); + pr_err("Can't get %s gpios! Error: %d", bus->name, ret); return ret; } diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 291ef9576a..eda252d0b3 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -563,6 +563,7 @@ static const struct dm_spi_ops davinci_spi_ops = { static const struct udevice_id davinci_spi_ids[] = { { .compatible = "ti,keystone-spi" }, { .compatible = "ti,dm6441-spi" }, + { .compatible = "ti,da830-spi" }, { } }; diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c index c5b766c0dd..e2a593b934 100644 --- a/drivers/spi/lpc32xx_ssp.c +++ b/drivers/spi/lpc32xx_ssp.c @@ -66,17 +66,17 @@ struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) /* we only set up SSP0 for now, so ignore bus */ if (mode & SPI_3WIRE) { - error("3-wire mode not supported"); + pr_err("3-wire mode not supported"); return NULL; } if (mode & SPI_SLAVE) { - error("slave mode not supported\n"); + pr_err("slave mode not supported\n"); return NULL; } if (mode & SPI_PREAMBLE) { - error("preamble byte skipping not supported\n"); + pr_err("preamble byte skipping not supported\n"); return NULL; } diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c index 9b58aa8e97..bf698a737b 100644 --- a/drivers/sysreset/sysreset_sti.c +++ b/drivers/sysreset/sysreset_sti.c @@ -39,7 +39,7 @@ static int sti_sysreset_probe(struct udevice *dev) "st,syscfg", NULL, 0, 0, &syscfg_phandle); if (ret < 0) { - error("Can't get syscfg phandle: %d\n", ret); + pr_err("Can't get syscfg phandle: %d\n", ret); return ret; } @@ -47,14 +47,14 @@ static int sti_sysreset_probe(struct udevice *dev) syscfg_phandle.node, &syscon); if (ret) { - error("%s: uclass_get_device_by_of_offset failed: %d\n", + pr_err("%s: uclass_get_device_by_of_offset failed: %d\n", __func__, ret); return ret; } regmap = syscon_get_regmap(syscon); if (!regmap) { - error("unable to get regmap for %s\n", syscon->name); + pr_err("unable to get regmap for %s\n", syscon->name); return -ENODEV; } diff --git a/drivers/sysreset/sysreset_syscon.c b/drivers/sysreset/sysreset_syscon.c index 3818faeb46..3abce7f678 100644 --- a/drivers/sysreset/sysreset_syscon.c +++ b/drivers/sysreset/sysreset_syscon.c @@ -45,13 +45,13 @@ int syscon_reboot_probe(struct udevice *dev) err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "regmap", &syscon); if (err) { - error("unable to find syscon device\n"); + pr_err("unable to find syscon device\n"); return err; } priv->regmap = syscon_get_regmap(syscon); if (!priv->regmap) { - error("unable to find regmap\n"); + pr_err("unable to find regmap\n"); return -ENODEV; } diff --git a/drivers/sysreset/sysreset_watchdog.c b/drivers/sysreset/sysreset_watchdog.c index 304ed052a2..ab250aea29 100644 --- a/drivers/sysreset/sysreset_watchdog.c +++ b/drivers/sysreset/sysreset_watchdog.c @@ -38,7 +38,7 @@ int wdt_reboot_probe(struct udevice *dev) err = uclass_get_device_by_phandle(UCLASS_WDT, dev, "wdt", &priv->wdt); if (err) { - error("unable to find wdt device\n"); + pr_err("unable to find wdt device\n"); return err; } diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c index ef3ff0dbf6..e3e20d8996 100644 --- a/drivers/tpm/tpm_tis_infineon.c +++ b/drivers/tpm/tpm_tis_infineon.c @@ -539,7 +539,7 @@ static int tpm_tis_i2c_init(struct udevice *dev) } if (chip->chip_type != UNKNOWN && vendor != expected_did_vid) { - error("Vendor id did not match! ID was %08x\n", vendor); + pr_err("Vendor id did not match! ID was %08x\n", vendor); return -ENODEV; } diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 62126aad2f..e7658b4d95 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -75,7 +75,7 @@ if USB_KEYBOARD choice prompt "USB keyboard polling" - optional + default SYS_USB_EVENT_POLL ---help--- Enable a polling mechanism for USB keyboard. diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c index 35c2dc18d9..e8432bb016 100644 --- a/drivers/usb/common/common.c +++ b/drivers/usb/common/common.c @@ -28,7 +28,7 @@ enum usb_dr_mode usb_get_dr_mode(int node) dr_mode = fdt_getprop(fdt, node, "dr_mode", NULL); if (!dr_mode) { - error("usb dr_mode not found\n"); + pr_err("usb dr_mode not found\n"); return USB_DR_MODE_UNKNOWN; } diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index a291ceb6ae..ae7fc1c630 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -37,6 +37,13 @@ config USB_DWC3_OMAP Say 'Y' here if you have one such device +config USB_DWC3_UNIPHIER + bool "DesignWare USB3 Host Support on UniPhier Platforms" + depends on ARCH_UNIPHIER && USB_XHCI_DWC3 + help + Support of USB2/3 functionality in Socionext UniPhier platforms. + Say 'Y' here if you have one such device. + menu "PHY Subsystem" config USB_DWC3_PHY_OMAP diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index 2964bae0d8..51497768b2 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -9,5 +9,6 @@ dwc3-y := core.o obj-$(CONFIG_USB_DWC3_GADGET) += gadget.o ep0.o obj-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o +obj-$(CONFIG_USB_DWC3_UNIPHIER) += dwc3-uniphier.o obj-$(CONFIG_USB_DWC3_PHY_OMAP) += ti_usb_phy.o obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG) += samsung_usb_phy.o diff --git a/drivers/usb/dwc3/dwc3-uniphier.c b/drivers/usb/dwc3/dwc3-uniphier.c new file mode 100644 index 0000000000..25b17a85d0 --- /dev/null +++ b/drivers/usb/dwc3/dwc3-uniphier.c @@ -0,0 +1,120 @@ +/* + * UniPhier Specific Glue Layer for DWC3 + * + * Copyright (C) 2016-2017 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dm.h> +#include <linux/bitops.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/sizes.h> + +#define UNIPHIER_PRO4_DWC3_RESET 0x40 +#define UNIPHIER_PRO4_DWC3_RESET_XIOMMU BIT(5) +#define UNIPHIER_PRO4_DWC3_RESET_XLINK BIT(4) +#define UNIPHIER_PRO4_DWC3_RESET_PHY_SS BIT(2) + +#define UNIPHIER_PRO5_DWC3_RESET 0x00 +#define UNIPHIER_PRO5_DWC3_RESET_PHY_S1 BIT(17) +#define UNIPHIER_PRO5_DWC3_RESET_PHY_S0 BIT(16) +#define UNIPHIER_PRO5_DWC3_RESET_XLINK BIT(15) +#define UNIPHIER_PRO5_DWC3_RESET_XIOMMU BIT(14) + +#define UNIPHIER_PXS2_DWC3_RESET 0x00 +#define UNIPHIER_PXS2_DWC3_RESET_XLINK BIT(15) + +static int uniphier_pro4_dwc3_init(void __iomem *regs) +{ + u32 tmp; + + tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET); + tmp &= ~UNIPHIER_PRO4_DWC3_RESET_PHY_SS; + tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK; + writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET); + + return 0; +} + +static int uniphier_pro5_dwc3_init(void __iomem *regs) +{ + u32 tmp; + + tmp = readl(regs + UNIPHIER_PRO5_DWC3_RESET); + tmp &= ~(UNIPHIER_PRO5_DWC3_RESET_PHY_S1 | + UNIPHIER_PRO5_DWC3_RESET_PHY_S0); + tmp |= UNIPHIER_PRO5_DWC3_RESET_XLINK | UNIPHIER_PRO5_DWC3_RESET_XIOMMU; + writel(tmp, regs + UNIPHIER_PRO5_DWC3_RESET); + + return 0; +} + +static int uniphier_pxs2_dwc3_init(void __iomem *regs) +{ + u32 tmp; + + tmp = readl(regs + UNIPHIER_PXS2_DWC3_RESET); + tmp |= UNIPHIER_PXS2_DWC3_RESET_XLINK; + writel(tmp, regs + UNIPHIER_PXS2_DWC3_RESET); + + return 0; +} + +static int uniphier_dwc3_probe(struct udevice *dev) +{ + fdt_addr_t base; + void __iomem *regs; + int (*init)(void __iomem *regs); + int ret; + + base = devfdt_get_addr(dev); + if (base == FDT_ADDR_T_NONE) + return -EINVAL; + + regs = ioremap(base, SZ_32K); + if (!regs) + return -ENOMEM; + + init = (typeof(init))dev_get_driver_data(dev); + ret = init(regs); + if (ret) + dev_err(dev, "failed to init glue layer\n"); + + iounmap(regs); + + return ret; +} + +static const struct udevice_id uniphier_dwc3_match[] = { + { + .compatible = "socionext,uniphier-pro4-dwc3", + .data = (ulong)uniphier_pro4_dwc3_init, + }, + { + .compatible = "socionext,uniphier-pro5-dwc3", + .data = (ulong)uniphier_pro5_dwc3_init, + }, + { + .compatible = "socionext,uniphier-pxs2-dwc3", + .data = (ulong)uniphier_pxs2_dwc3_init, + }, + { + .compatible = "socionext,uniphier-ld20-dwc3", + .data = (ulong)uniphier_pxs2_dwc3_init, + }, + { + .compatible = "socionext,uniphier-pxs3-dwc3", + .data = (ulong)uniphier_pxs2_dwc3_init, + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(usb_xhci) = { + .name = "uniphier-dwc3", + .id = UCLASS_SIMPLE_BUS, + .of_match = uniphier_dwc3_match, + .probe = uniphier_dwc3_probe, +}; diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h index 9e944a31be..5cbe377e3c 100644 --- a/drivers/usb/dwc3/linux-compat.h +++ b/drivers/usb/dwc3/linux-compat.h @@ -12,10 +12,8 @@ #ifndef __DWC3_LINUX_COMPAT__ #define __DWC3_LINUX_COMPAT__ -#define pr_debug(format) debug(format) #define WARN(val, format, arg...) debug(format, ##arg) #define dev_WARN(dev, format, arg...) debug(format, ##arg) -#define WARN_ON_ONCE(val) debug("Error %d\n", val) static inline size_t strlcat(char *dest, const char *src, size_t n) { diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c index 98d20c0bc1..2f84b360ec 100644 --- a/drivers/usb/emul/sandbox_flash.c +++ b/drivers/usb/emul/sandbox_flash.c @@ -390,8 +390,7 @@ static int sandbox_flash_bind(struct udevice *dev) fs[2].id = STRINGID_SERIAL; fs[2].s = dev->name; - return usb_emul_setup_device(dev, PACKET_SIZE_64, plat->flash_strings, - flash_desc_list); + return usb_emul_setup_device(dev, plat->flash_strings, flash_desc_list); } static int sandbox_flash_probe(struct udevice *dev) diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c index 1432858fd5..9a0f47b81c 100644 --- a/drivers/usb/emul/sandbox_hub.c +++ b/drivers/usb/emul/sandbox_hub.c @@ -121,9 +121,12 @@ struct sandbox_hub_priv { int change[SANDBOX_NUM_PORTS]; }; -static struct udevice *hub_find_device(struct udevice *hub, int port) +static struct udevice *hub_find_device(struct udevice *hub, int port, + enum usb_device_speed *speed) { struct udevice *dev; + struct usb_generic_descriptor **gen_desc; + struct usb_device_descriptor **dev_desc; for (device_find_first_child(hub, &dev); dev; @@ -131,8 +134,27 @@ static struct udevice *hub_find_device(struct udevice *hub, int port) struct sandbox_hub_platdata *plat; plat = dev_get_parent_platdata(dev); - if (plat->port == port) + if (plat->port == port) { + gen_desc = plat->plat.desc_list; + gen_desc = usb_emul_find_descriptor(gen_desc, + USB_DT_DEVICE, 0); + dev_desc = (struct usb_device_descriptor **)gen_desc; + + switch (le16_to_cpu((*dev_desc)->bcdUSB)) { + case 0x0100: + *speed = USB_SPEED_LOW; + break; + case 0x0101: + *speed = USB_SPEED_FULL; + break; + case 0x0200: + default: + *speed = USB_SPEED_HIGH; + break; + } + return dev; + } } return NULL; @@ -146,7 +168,8 @@ static int clrset_post_state(struct udevice *hub, int port, int clear, int set) int ret = 0; if ((clear | set) & USB_PORT_STAT_POWER) { - struct udevice *dev = hub_find_device(hub, port); + enum usb_device_speed speed; + struct udevice *dev = hub_find_device(hub, port, &speed); if (dev) { if (set & USB_PORT_STAT_POWER) { @@ -156,6 +179,10 @@ static int clrset_post_state(struct udevice *hub, int port, int clear, int set) if (!ret) { set |= USB_PORT_STAT_CONNECTION | USB_PORT_STAT_ENABLE; + if (speed == USB_SPEED_LOW) + set |= USB_PORT_STAT_LOW_SPEED; + else if (speed == USB_SPEED_HIGH) + set |= USB_PORT_STAT_HIGH_SPEED; } } else if (clear & USB_PORT_STAT_POWER) { @@ -274,15 +301,16 @@ static int sandbox_hub_submit_control_msg(struct udevice *bus, static int sandbox_hub_bind(struct udevice *dev) { - return usb_emul_setup_device(dev, PACKET_SIZE_64, hub_strings, - hub_desc_list); + return usb_emul_setup_device(dev, hub_strings, hub_desc_list); } static int sandbox_child_post_bind(struct udevice *dev) { struct sandbox_hub_platdata *plat = dev_get_parent_platdata(dev); + struct usb_emul_platdata *emul = dev_get_uclass_platdata(dev); plat->port = dev_read_u32_default(dev, "reg", -1); + emul->port1 = plat->port + 1; return 0; } diff --git a/drivers/usb/emul/sandbox_keyb.c b/drivers/usb/emul/sandbox_keyb.c index 27359851df..cff017668f 100644 --- a/drivers/usb/emul/sandbox_keyb.c +++ b/drivers/usb/emul/sandbox_keyb.c @@ -208,8 +208,7 @@ static int sandbox_keyb_bind(struct udevice *dev) fs[2].id = STRINGID_SERIAL; fs[2].s = dev->name; - return usb_emul_setup_device(dev, PACKET_SIZE_8, plat->keyb_strings, - keyb_desc_list); + return usb_emul_setup_device(dev, plat->keyb_strings, keyb_desc_list); } static int sandbox_keyb_probe(struct udevice *dev) diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c index 6e03c1e0d9..fbe11f3135 100644 --- a/drivers/usb/emul/usb-emul-uclass.c +++ b/drivers/usb/emul/usb-emul-uclass.c @@ -52,7 +52,7 @@ static int usb_emul_get_string(struct usb_string *strings, int index, return -EINVAL; } -static struct usb_generic_descriptor **find_descriptor( +struct usb_generic_descriptor **usb_emul_find_descriptor( struct usb_generic_descriptor **ptr, int type, int index) { debug("%s: type=%x, index=%d\n", __func__, type, index); @@ -91,8 +91,7 @@ static int usb_emul_get_descriptor(struct usb_dev_platdata *plat, int value, length); } - ptr = find_descriptor((struct usb_generic_descriptor **)plat->desc_list, - type, index); + ptr = usb_emul_find_descriptor(plat->desc_list, type, index); if (!ptr) { debug("%s: Could not find descriptor type %d, index %d\n", __func__, type, index); @@ -107,7 +106,7 @@ static int usb_emul_get_descriptor(struct usb_dev_platdata *plat, int value, return upto ? upto : length ? -EIO : 0; } -static int usb_emul_find_devnum(int devnum, struct udevice **emulp) +static int usb_emul_find_devnum(int devnum, int port1, struct udevice **emulp) { struct udevice *dev; struct uclass *uc; @@ -120,7 +119,37 @@ static int usb_emul_find_devnum(int devnum, struct udevice **emulp) uclass_foreach_dev(dev, uc) { struct usb_dev_platdata *udev = dev_get_parent_platdata(dev); - if (udev->devnum == devnum) { + /* + * devnum is initialzied to zero at the beginning of the + * enumeration process in usb_setup_device(). At this + * point, udev->devnum has not been assigned to any valid + * USB address either, so we can't rely on the comparison + * result between udev->devnum and devnum to select an + * emulator device. + */ + if (!devnum) { + struct usb_emul_platdata *plat; + + /* + * If the parent is sandbox USB controller, we are + * the root hub. And there is only one root hub + * in the system. + */ + if (device_get_uclass_id(dev->parent) == UCLASS_USB) { + debug("%s: Found emulator '%s'\n", + __func__, dev->name); + *emulp = dev; + return 0; + } + + plat = dev_get_uclass_platdata(dev); + if (plat->port1 == port1) { + debug("%s: Found emulator '%s', port %d\n", + __func__, dev->name, port1); + *emulp = dev; + return 0; + } + } else if (udev->devnum == devnum) { debug("%s: Found emulator '%s', addr %d\n", __func__, dev->name, udev->devnum); *emulp = dev; @@ -132,18 +161,19 @@ static int usb_emul_find_devnum(int devnum, struct udevice **emulp) return -ENOENT; } -int usb_emul_find(struct udevice *bus, ulong pipe, struct udevice **emulp) +int usb_emul_find(struct udevice *bus, ulong pipe, int port1, + struct udevice **emulp) { int devnum = usb_pipedevice(pipe); - return usb_emul_find_devnum(devnum, emulp); + return usb_emul_find_devnum(devnum, port1, emulp); } int usb_emul_find_for_dev(struct udevice *dev, struct udevice **emulp) { struct usb_dev_platdata *udev = dev_get_parent_platdata(dev); - return usb_emul_find_devnum(udev->devnum, emulp); + return usb_emul_find_devnum(udev->devnum, 0, emulp); } int usb_emul_control(struct udevice *emul, struct usb_device *udev, @@ -229,8 +259,8 @@ int usb_emul_int(struct udevice *emul, struct usb_device *udev, return ops->interrupt(emul, udev, pipe, buffer, length, interval); } -int usb_emul_setup_device(struct udevice *dev, int maxpacketsize, - struct usb_string *strings, void **desc_list) +int usb_emul_setup_device(struct udevice *dev, struct usb_string *strings, + void **desc_list) { struct usb_dev_platdata *plat = dev_get_parent_platdata(dev); struct usb_generic_descriptor **ptr; @@ -264,18 +294,11 @@ int usb_emul_setup_device(struct udevice *dev, int maxpacketsize, return 0; } -void usb_emul_reset(struct udevice *dev) -{ - struct usb_dev_platdata *plat = dev_get_parent_platdata(dev); - - plat->devnum = 0; - plat->configno = 0; -} - UCLASS_DRIVER(usb_emul) = { .id = UCLASS_USB_EMUL, .name = "usb_emul", .post_bind = dm_scan_fdt_dev, + .per_device_platdata_auto_alloc_size = sizeof(struct usb_emul_platdata), .per_child_auto_alloc_size = sizeof(struct usb_device), .per_child_platdata_auto_alloc_size = sizeof(struct usb_dev_platdata), }; diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c index 4abef5d5c8..941d612a68 100644 --- a/drivers/usb/eth/mcs7830.c +++ b/drivers/usb/eth/mcs7830.c @@ -418,25 +418,25 @@ static int mcs7830_basic_reset(struct usb_device *udev, rc = mcs7830_set_autoneg(udev); if (rc < 0) { - error("setting autoneg failed\n"); + pr_err("setting autoneg failed\n"); return rc; } rc = mcs7830_write_mchash(udev, priv); if (rc < 0) { - error("failed to set multicast hash\n"); + pr_err("failed to set multicast hash\n"); return rc; } rc = mcs7830_write_config(udev, priv); if (rc < 0) { - error("failed to set configuration\n"); + pr_err("failed to set configuration\n"); return rc; } rc = mcs7830_apply_fixup(udev); if (rc < 0) { - error("fixup application failed\n"); + pr_err("fixup application failed\n"); return rc; } @@ -541,11 +541,11 @@ static int mcs7830_recv_common(struct ueth_data *ueth, uint8_t *buf) debug("%s() RX want len %d, got len %d, rc %d\n", __func__, wantlen, gotlen, rc); if (rc != 0) { - error("RX: failed to receive\n"); + pr_err("RX: failed to receive\n"); return rc; } if (gotlen > wantlen) { - error("RX: got too many bytes (%d)\n", gotlen); + pr_err("RX: got too many bytes (%d)\n", gotlen); return -EIO; } diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 225b66bc95..102a63b8ee 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -36,6 +36,30 @@ menuconfig USB_GADGET if USB_GADGET +config USB_GADGET_MANUFACTURER + string "Vendor name of the USB device" + default "Allwinner Technology" if ARCH_SUNXI + default "U-Boot" + help + Vendor name of the USB device emulated, reported to the host device. + This is usually either the manufacturer of the device or the SoC. + +config USB_GADGET_VENDOR_NUM + hex "Vendor ID of the USB device" + default 0x1f3a if ARCH_SUNXI + default 0x0 + help + Vendor ID of the USB device emulated, reported to the host device. + This is usually the board or SoC vendor's, unless you've registered + for one. + +config USB_GADGET_PRODUCT_NUM + hex "Product ID of the USB device" + default 0x1010 if ARCH_SUNXI + default 0x0 + help + Product ID of the USB device emulated, reported to the host device. + config USB_GADGET_ATMEL_USBA bool "Atmel USBA" select USB_GADGET_DUALSPEED @@ -110,19 +134,63 @@ config USB_FUNCTION_SDP allows to download images into memory and execute (jump to) them using the same protocol as implemented by the i.MX family's boot ROM. -config G_DNL_MANUFACTURER - string "Vendor name of USB device" +endif # USB_GADGET_DOWNLOAD -config G_DNL_VENDOR_NUM - hex "Vendor ID of USB device" +config USB_ETHER + bool "USB Ethernet Gadget" + default y if ARCH_SUNXI && USB_MUSB_GADGET + help + Creates an Ethernet network device through a USB peripheral + controller. This will create a network interface on both the device + (U-Boot) and the host (remote device) that can be used just like any + other nework interface. + It will bind on the peripheral USB controller, ignoring the USB hosts + controllers in the system. + +if USB_ETHER + +choice + prompt "USB Ethernet Gadget Model" + default USB_ETH_RNDIS + help + There is several models (protocols) to implement Ethernet over USB + devices. The main ones are Microsoft's RNDIS and USB's CDC-Ethernet + (also called CDC-ECM). RNDIS is obviously compatible with Windows, + while CDC-ECM is not. Most other operating systems support both, so + if inter-operability is a concern, RNDIS is to be preferred. + +config USB_ETH_CDC + bool "CDC-ECM Protocol" + help + CDC (Communications Device Class) is the standard for Ethernet over + USB devices. While there's several alternatives, the most widely used + protocol is ECM (Ethernet Control Model). However, compatibility with + Windows is not that great. + +config USB_ETH_RNDIS + bool "RNDIS Protocol" + help + The RNDIS (Remote Network Driver Interface Specification) is a + Microsoft proprietary protocol to create an Ethernet device over USB. + Windows obviously supports it, as well as all the major operating + systems, so it's the best option for compatibility. -config G_DNL_PRODUCT_NUM - hex "Product ID of USB device" +endchoice config USBNET_DEVADDR string "USB Gadget Ethernet device mac address" default "de:ad:be:ef:00:01" + help + Ethernet MAC address of the device-side (ie. local board's) MAC + address of the usb_ether interface -endif # USB_GADGET_DOWNLOAD +config USBNET_HOST_ADDR + string "USB Gadget Ethernet host mac address" + default "de:ad:be:ef:00:00" + help + Ethernet MAC address of the host-side (ie. remote device's) MAC + address of the usb_ether interface + +endif # USB_ETHER endif # USB_GADGET diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 9df6d32c65..ad2f606b78 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c @@ -1456,7 +1456,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver) ret = driver->bind(&udc->gadget); if (ret) { - error("driver->bind() returned %d\n", ret); + pr_err("driver->bind() returned %d\n", ret); udc->driver = NULL; } @@ -1468,7 +1468,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) struct at91_udc *udc = controller; if (!driver || !driver->unbind || !driver->disconnect) { - error("bad paramter\n"); + pr_err("bad paramter\n"); return -EINVAL; } diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c index ad31703c73..c0a95a97c9 100644 --- a/drivers/usb/gadget/atmel_usba_udc.c +++ b/drivers/usb/gadget/atmel_usba_udc.c @@ -1228,7 +1228,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver) ret = driver->bind(&udc->gadget); if (ret) { - error("driver->bind() returned %d\n", ret); + pr_err("driver->bind() returned %d\n", ret); udc->driver = NULL; } @@ -1240,7 +1240,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) struct usba_udc *udc = &controller; if (!driver || !driver->unbind || !driver->disconnect) { - error("bad paramter\n"); + pr_err("bad paramter\n"); return -EINVAL; } @@ -1261,7 +1261,7 @@ static struct usba_ep *usba_udc_pdata(struct usba_platform_data *pdata, eps = malloc(sizeof(struct usba_ep) * pdata->num_ep); if (!eps) { - error("failed to alloc eps\n"); + pr_err("failed to alloc eps\n"); return NULL; } diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index cb44374e81..088811c191 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -835,7 +835,7 @@ int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata) ROUND(sizeof(struct usb_ctrlrequest), CONFIG_SYS_CACHELINE_SIZE)); if (!usb_ctrl) { - error("No memory available for UDC!\n"); + pr_err("No memory available for UDC!\n"); return -ENOMEM; } diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c index 0d6d2fba8a..b6164afa92 100644 --- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c +++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c @@ -111,7 +111,8 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req) ctrl = readl(®->out_endp[ep_num].doepctl); invalidate_dcache_range((unsigned long) ep->dma_buf, - (unsigned long) ep->dma_buf + ep->len); + (unsigned long) ep->dma_buf + + ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE)); writel((unsigned int) ep->dma_buf, ®->out_endp[ep_num].doepdma); writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length), diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 2cf5c8d31e..a80486e91f 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -273,8 +273,8 @@ static inline int BITRATE(struct usb_gadget *g) * static ushort idProduct; */ -#if defined(CONFIG_USBNET_MANUFACTURER) -static char *iManufacturer = CONFIG_USBNET_MANUFACTURER; +#if defined(CONFIG_USB_GADGET_MANUFACTURER) +static char *iManufacturer = CONFIG_USB_GADGET_MANUFACTURER; #else static char *iManufacturer = "U-Boot"; #endif @@ -1059,7 +1059,7 @@ static int eth_set_config(struct eth_dev *dev, unsigned number, && dev->config && dev->tx_qlen != 0) { /* tx fifo is full, but we can't clear it...*/ - error("can't change configurations"); + pr_err("can't change configurations"); return -ESPIPE; } eth_reset_config(dev); @@ -1233,7 +1233,7 @@ static void rndis_command_complete(struct usb_ep *ep, struct usb_request *req) /* received RNDIS command from USB_CDC_SEND_ENCAPSULATED_COMMAND */ status = rndis_msg_parser(dev->rndis_config, (u8 *) req->buf); if (status < 0) - error("%s: rndis parse error %d", __func__, status); + pr_err("%s: rndis parse error %d", __func__, status); } #endif /* RNDIS */ @@ -1554,7 +1554,7 @@ static int rx_submit(struct eth_dev *dev, struct usb_request *req, retval = usb_ep_queue(dev->out_ep, req, gfp_flags); if (retval) - error("rx submit --> %d", retval); + pr_err("rx submit --> %d", retval); return retval; } @@ -1624,7 +1624,7 @@ static int alloc_requests(struct eth_dev *dev, unsigned n, gfp_t gfp_flags) fail2: usb_ep_free_request(dev->in_ep, dev->tx_req); fail1: - error("can't alloc requests"); + pr_err("can't alloc requests"); return -1; } @@ -2060,7 +2060,7 @@ static int eth_bind(struct usb_gadget *gadget) * anything less functional on CDC-capable hardware, * so we fail in this case. */ - error("controller '%s' not recognized", + pr_err("controller '%s' not recognized", gadget->name); return -ENODEV; } @@ -2073,11 +2073,11 @@ static int eth_bind(struct usb_gadget *gadget) * to choose the right configuration otherwise. */ if (rndis) { -#if defined(CONFIG_USB_RNDIS_VENDOR_ID) && defined(CONFIG_USB_RNDIS_PRODUCT_ID) +#if defined(CONFIG_USB_GADGET_VENDOR_NUM) && defined(CONFIG_USB_GADGET_PRODUCT_NUM) device_desc.idVendor = - __constant_cpu_to_le16(CONFIG_USB_RNDIS_VENDOR_ID); + __constant_cpu_to_le16(CONFIG_USB_GADGET_VENDOR_NUM); device_desc.idProduct = - __constant_cpu_to_le16(CONFIG_USB_RNDIS_PRODUCT_ID); + __constant_cpu_to_le16(CONFIG_USB_GADGET_PRODUCT_NUM); #else device_desc.idVendor = __constant_cpu_to_le16(RNDIS_VENDOR_NUM); @@ -2092,9 +2092,9 @@ static int eth_bind(struct usb_gadget *gadget) * supporting one submode of the "SAFE" variant of MDLM.) */ } else { -#if defined(CONFIG_USB_CDC_VENDOR_ID) && defined(CONFIG_USB_CDC_PRODUCT_ID) - device_desc.idVendor = cpu_to_le16(CONFIG_USB_CDC_VENDOR_ID); - device_desc.idProduct = cpu_to_le16(CONFIG_USB_CDC_PRODUCT_ID); +#if defined(CONFIG_USB_GADGET_VENDOR_NUM) && defined(CONFIG_USB_GADGET_PRODUCT_NUM) + device_desc.idVendor = cpu_to_le16(CONFIG_USB_GADGET_VENDOR_NUM); + device_desc.idProduct = cpu_to_le16(CONFIG_USB_GADGET_PRODUCT_NUM); #else if (!cdc) { device_desc.idVendor = @@ -2121,7 +2121,7 @@ static int eth_bind(struct usb_gadget *gadget) in_ep = usb_ep_autoconfig(gadget, &fs_source_desc); if (!in_ep) { autoconf_fail: - error("can't autoconfigure on %s\n", + pr_err("can't autoconfigure on %s\n", gadget->name); return -ENODEV; } @@ -2142,7 +2142,7 @@ autoconf_fail: if (status_ep) { status_ep->driver_data = status_ep; /* claim */ } else if (rndis) { - error("can't run RNDIS on %s", gadget->name); + pr_err("can't run RNDIS on %s", gadget->name); return -ENODEV; #ifdef CONFIG_USB_ETH_CDC } else if (cdc) { @@ -2244,7 +2244,7 @@ autoconf_fail: if (rndis) { status = rndis_init(); if (status < 0) { - error("can't init RNDIS, %d", status); + pr_err("can't init RNDIS, %d", status); goto fail; } } @@ -2335,7 +2335,7 @@ fail0: return 0; fail: - error("%s failed, status = %d", __func__, status); + pr_err("%s failed, status = %d", __func__, status); eth_unbind(gadget); return status; } @@ -2350,7 +2350,7 @@ int dm_usb_init(struct eth_dev *e_dev) ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &dev); if (!dev || ret) { - error("No USB device found\n"); + pr_err("No USB device found\n"); return -ENODEV; } @@ -2369,7 +2369,7 @@ static int _usb_eth_init(struct ether_priv *priv) #ifdef CONFIG_DM_USB if (dm_usb_init(dev)) { - error("USB ether not found\n"); + pr_err("USB ether not found\n"); return -ENODEV; } #else @@ -2393,11 +2393,11 @@ static int _usb_eth_init(struct ether_priv *priv) sizeof(host_addr)); if (!is_eth_addr_valid(dev_addr)) { - error("Need valid 'usbnet_devaddr' to be set"); + pr_err("Need valid 'usbnet_devaddr' to be set"); goto fail; } if (!is_eth_addr_valid(host_addr)) { - error("Need valid 'usbnet_hostaddr' to be set"); + pr_err("Need valid 'usbnet_hostaddr' to be set"); goto fail; } @@ -2427,7 +2427,7 @@ static int _usb_eth_init(struct ether_priv *priv) while (!dev->network_started) { /* Handle control-c and timeouts */ if (ctrlc() || (get_timer(ts) > timeout)) { - error("The remote end did not respond in time."); + pr_err("The remote end did not respond in time."); goto fail; } usb_gadget_handle_interrupts(0); @@ -2456,7 +2456,7 @@ static int _usb_eth_send(struct ether_priv *priv, void *packet, int length) rndis_pkt = malloc(length + sizeof(struct rndis_packet_msg_type)); if (!rndis_pkt) { - error("No memory to alloc RNDIS packet"); + pr_err("No memory to alloc RNDIS packet"); goto drop; } rndis_add_hdr(rndis_pkt, length); @@ -2574,7 +2574,7 @@ static int usb_eth_recv(struct eth_device *netdev) ret = _usb_eth_recv(priv); if (ret) { - error("error packet receive\n"); + pr_err("error packet receive\n"); return ret; } @@ -2585,7 +2585,7 @@ static int usb_eth_recv(struct eth_device *netdev) net_process_received_packet(net_rx_packets[0], dev->rx_req->length); } else { - error("dev->rx_req invalid"); + pr_err("dev->rx_req invalid"); } packet_received = 0; rx_submit(dev, dev->rx_req, 0); @@ -2641,7 +2641,7 @@ static int usb_eth_recv(struct udevice *dev, int flags, uchar **packetp) ret = _usb_eth_recv(priv); if (ret) { - error("error packet receive\n"); + pr_err("error packet receive\n"); return ret; } @@ -2650,7 +2650,7 @@ static int usb_eth_recv(struct udevice *dev, int flags, uchar **packetp) *packetp = (uchar *)net_rx_packets[0]; return ethdev->rx_req->length; } else { - error("dev->rx_req invalid"); + pr_err("dev->rx_req invalid"); return -EFAULT; } } @@ -2706,13 +2706,13 @@ int usb_ether_init(void) ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &usb_dev); if (!usb_dev || ret) { - error("No USB device found\n"); + pr_err("No USB device found\n"); return ret; } ret = device_bind_driver(usb_dev, "usb_ether", "usb_ether", &dev); if (!dev || ret) { - error("usb - not able to bind usb_ether device\n"); + pr_err("usb - not able to bind usb_ether device\n"); return ret; } diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index f3382a965b..7acffb6c87 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -410,7 +410,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) strsep(&cmd, ":"); if (!cmd) { - error("missing variable"); + pr_err("missing variable"); fastboot_tx_write_str("FAILmissing var"); return; } @@ -593,7 +593,7 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req) strsep(&cmd, ":"); if (!cmd) { - error("missing partition name"); + pr_err("missing partition name"); fastboot_tx_write_str("FAILmissing partition name"); return; } @@ -645,7 +645,7 @@ static void cb_erase(struct usb_ep *ep, struct usb_request *req) strsep(&cmd, ":"); if (!cmd) { - error("missing partition name"); + pr_err("missing partition name"); fastboot_tx_write_str("FAILmissing partition name"); return; } @@ -718,7 +718,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) } if (!func_cb) { - error("unknown command: %.*s", req->actual, cmdbuf); + pr_err("unknown command: %.*s", req->actual, cmdbuf); fastboot_tx_write_str("FAILunknown command"); } else { if (req->actual < req->length) { @@ -726,7 +726,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) buf[req->actual] = 0; func_cb(ep, req); } else { - error("buffer overflow"); + pr_err("buffer overflow"); fastboot_tx_write_str("FAILbuffer overflow"); } } diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c index 0fae66beab..fd3da922a6 100644 --- a/drivers/usb/gadget/f_sdp.c +++ b/drivers/usb/gadget/f_sdp.c @@ -237,12 +237,12 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req) u8 report = data[0]; if (status != 0) { - error("Status: %d", status); + pr_err("Status: %d", status); return; } if (report != 1) { - error("Unexpected report %d", report); + pr_err("Unexpected report %d", report); return; } @@ -309,7 +309,7 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req) sdp->next_state = SDP_STATE_IDLE; break; default: - error("Unknown command: %04x\n", be16_to_cpu(cmd->cmd)); + pr_err("Unknown command: %04x\n", be16_to_cpu(cmd->cmd)); } } @@ -322,12 +322,12 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req) int datalen = req->length - 1; if (status != 0) { - error("Status: %d", status); + pr_err("Status: %d", status); return; } if (report != 2) { - error("Unexpected report %d", report); + pr_err("Unexpected report %d", report); return; } @@ -360,7 +360,7 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req) sdp->state = SDP_STATE_TX_SEC_CONF; break; default: - error("Invalid state: %d", sdp->state); + pr_err("Invalid state: %d", sdp->state); } } @@ -370,7 +370,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req) int status = req->status; if (status != 0) { - error("Status: %d", status); + pr_err("Status: %d", status); return; } @@ -393,7 +393,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req) sdp->state = SDP_STATE_IDLE; break; default: - error("Wrong State: %d", sdp->state); + pr_err("Wrong State: %d", sdp->state); sdp->state = SDP_STATE_IDLE; break; } diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index cd4d9e659a..18f233ab58 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -174,7 +174,7 @@ static long long int download_head(unsigned long long total, transfer_buffer, THOR_STORE_UNIT_SIZE, (*cnt)++); if (ret) { - error("DFU write failed [%d] cnt: %d", + pr_err("DFU write failed [%d] cnt: %d", ret, *cnt); return ret; } @@ -218,20 +218,20 @@ static int download_tail(long long int left, int cnt) dfu_entity = dfu_get_entity(alt_setting_num); if (!dfu_entity) { - error("Alt setting: %d entity not found!\n", alt_setting_num); + pr_err("Alt setting: %d entity not found!\n", alt_setting_num); return -ENOENT; } transfer_buffer = dfu_get_buf(dfu_entity); if (!transfer_buffer) { - error("Transfer buffer not allocated!"); + pr_err("Transfer buffer not allocated!"); return -ENXIO; } if (left) { ret = dfu_write(dfu_entity, transfer_buffer, left, cnt++); if (ret) { - error("DFU write failed [%d]: left: %llu", ret, left); + pr_err("DFU write failed [%d]: left: %llu", ret, left); return ret; } } @@ -245,7 +245,7 @@ static int download_tail(long long int left, int cnt) */ ret = dfu_flush(dfu_entity, transfer_buffer, 0, cnt); if (ret) - error("DFU flush failed!"); + pr_err("DFU flush failed!"); return ret; } @@ -285,7 +285,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt) alt_setting_num = dfu_get_alt(f_name); if (alt_setting_num < 0) { - error("Alt setting [%d] to write not found!", + pr_err("Alt setting [%d] to write not found!", alt_setting_num); rsp->ack = -ENODEV; ret = rsp->ack; @@ -311,7 +311,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt) debug("DL EXIT\n"); break; default: - error("Operation not supported: %d", rqt->rqt_data); + pr_err("Operation not supported: %d", rqt->rqt_data); ret = -ENOTSUPP; } @@ -342,7 +342,7 @@ static int process_data(void) puts("RQT: UPLOAD not supported!\n"); break; default: - error("unknown request (%d)", rqt->rqt); + pr_err("unknown request (%d)", rqt->rqt); } return ret; @@ -541,7 +541,7 @@ static int thor_rx_data(void) status = usb_ep_queue(dev->out_ep, dev->out_req, 0); if (status) { - error("kill %s: resubmit %d bytes --> %d", + pr_err("kill %s: resubmit %d bytes --> %d", dev->out_ep->name, dev->out_req->length, status); usb_ep_set_halt(dev->out_ep); return -EAGAIN; @@ -575,7 +575,7 @@ static void thor_tx_data(unsigned char *data, int len) status = usb_ep_queue(dev->in_ep, dev->in_req, 0); if (status) { - error("kill %s: resubmit %d bytes --> %d", + pr_err("kill %s: resubmit %d bytes --> %d", dev->in_ep->name, dev->in_req->length, status); usb_ep_set_halt(dev->in_ep); } @@ -608,7 +608,7 @@ static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req) case -ESHUTDOWN: /* disconnect from host */ case -EREMOTEIO: /* short read */ case -EOVERFLOW: - error("ERROR:%d", status); + pr_err("ERROR:%d", status); break; } @@ -664,7 +664,7 @@ thor_func_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) break; default: - error("thor_setup: unknown request: %d", ctrl->bRequest); + pr_err("thor_setup: unknown request: %d", ctrl->bRequest); } if (value >= 0) { @@ -973,7 +973,7 @@ static int thor_func_set_alt(struct usb_function *f, debug("Communication Data interface\n"); result = thor_eps_setup(f); if (result) - error("%s: EPs setup failed!", __func__); + pr_err("%s: EPs setup failed!", __func__); dev->configuration_done = 1; break; } diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c index 039331a5af..99d500a6af 100644 --- a/drivers/usb/gadget/g_dnl.c +++ b/drivers/usb/gadget/g_dnl.c @@ -26,9 +26,9 @@ /* * One needs to define the following: - * CONFIG_G_DNL_VENDOR_NUM - * CONFIG_G_DNL_PRODUCT_NUM - * CONFIG_G_DNL_MANUFACTURER + * CONFIG_USB_GADGET_VENDOR_NUM + * CONFIG_USB_GADGET_PRODUCT_NUM + * CONFIG_USB_GADGET_MANUFACTURER * at e.g. ./configs/<board>_defconfig */ @@ -46,7 +46,7 @@ static const char product[] = "USB download gadget"; static char g_dnl_serial[MAX_STRING_SERIAL]; -static const char manufacturer[] = CONFIG_G_DNL_MANUFACTURER; +static const char manufacturer[] = CONFIG_USB_GADGET_MANUFACTURER; void g_dnl_set_serialnumber(char *s) { @@ -62,8 +62,8 @@ static struct usb_device_descriptor device_desc = { .bDeviceClass = USB_CLASS_PER_INTERFACE, .bDeviceSubClass = 0, /*0x02:CDC-modem , 0x00:CDC-serial*/ - .idVendor = __constant_cpu_to_le16(CONFIG_G_DNL_VENDOR_NUM), - .idProduct = __constant_cpu_to_le16(CONFIG_G_DNL_PRODUCT_NUM), + .idVendor = __constant_cpu_to_le16(CONFIG_USB_GADGET_VENDOR_NUM), + .idProduct = __constant_cpu_to_le16(CONFIG_USB_GADGET_PRODUCT_NUM), /* .iProduct = DYNAMIC */ /* .iSerialNumber = DYNAMIC */ .bNumConfigurations = 1, diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index f797a2568c..f5f19ed775 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -157,14 +157,6 @@ config USB_EHCI_PCI help Enables support for the PCI-based EHCI controller. -config USB_EHCI_RCAR_GEN3 - bool "Support for Renesas RCar M3/H3 EHCI USB controller" - depends on RCAR_GEN3 - default y - ---help--- - Enables support for the on-chip EHCI controller on Renesas - R8A7795 and R8A7796 SoCs. - config USB_EHCI_ZYNQ bool "Support for Xilinx Zynq on-chip EHCI USB controller" depends on ARCH_ZYNQ diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 29afb7cf1d..83903fcf99 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -46,7 +46,6 @@ obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o -obj-$(CONFIG_USB_EHCI_RCAR_GEN3) += ehci-rcar_gen3.o obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o # xhci diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 64c42ac471..1293e18f75 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -179,7 +179,7 @@ static int dwc_vbus_supply_init(struct udevice *dev) ret = regulator_set_enable(vbus_supply, true); if (ret) { - error("Error enabling vbus supply\n"); + pr_err("Error enabling vbus supply\n"); return ret; } @@ -1245,7 +1245,7 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev) struct dwc2_priv *priv = dev_get_priv(dev); fdt_addr_t addr; - addr = devfdt_get_addr(dev); + addr = dev_read_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL; priv->regs = (struct dwc2_core_regs *)addr; diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c index 02ad3115df..6dc656af89 100644 --- a/drivers/usb/host/dwc3-sti-glue.c +++ b/drivers/usb/host/dwc3-sti-glue.c @@ -71,7 +71,7 @@ static int sti_dwc3_glue_drd_init(struct sti_dwc3_glue_platdata *plat) break; default: - error("Unsupported mode of operation %d\n", plat->mode); + pr_err("Unsupported mode of operation %d\n", plat->mode); return -EINVAL; } writel(val, plat->syscfg_base + plat->syscfg_offset); @@ -113,7 +113,7 @@ static int sti_dwc3_glue_ofdata_to_platdata(struct udevice *dev) ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "reg", reg, ARRAY_SIZE(reg)); if (ret) { - error("unable to find st,stih407-dwc3 reg property(%d)\n", ret); + pr_err("unable to find st,stih407-dwc3 reg property(%d)\n", ret); return ret; } @@ -124,14 +124,14 @@ static int sti_dwc3_glue_ofdata_to_platdata(struct udevice *dev) ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "st,syscfg", &syscon); if (ret) { - error("unable to find syscon device (%d)\n", ret); + pr_err("unable to find syscon device (%d)\n", ret); return ret; } /* get syscfg-reg base address */ regmap = syscon_get_regmap(syscon); if (!regmap) { - error("unable to find regmap\n"); + pr_err("unable to find regmap\n"); return -ENODEV; } plat->syscfg_base = regmap->base; @@ -139,14 +139,14 @@ static int sti_dwc3_glue_ofdata_to_platdata(struct udevice *dev) /* get powerdown reset */ ret = reset_get_by_name(dev, "powerdown", &plat->powerdown_ctl); if (ret) { - error("can't get powerdown reset for %s (%d)", dev->name, ret); + pr_err("can't get powerdown reset for %s (%d)", dev->name, ret); return ret; } /* get softreset reset */ ret = reset_get_by_name(dev, "softreset", &plat->softreset_ctl); if (ret) - error("can't get soft reset for %s (%d)", dev->name, ret); + pr_err("can't get soft reset for %s (%d)", dev->name, ret); return ret; }; @@ -159,14 +159,14 @@ static int sti_dwc3_glue_bind(struct udevice *dev) /* check if one subnode is present */ dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev)); if (dwc3_node <= 0) { - error("Can't find subnode for %s\n", dev->name); + pr_err("Can't find subnode for %s\n", dev->name); return -ENODEV; } /* check if the subnode compatible string is the dwc3 one*/ if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node, "snps,dwc3") != 0) { - error("Can't find dwc3 subnode for %s\n", dev->name); + pr_err("Can't find dwc3 subnode for %s\n", dev->name); return -ENODEV; } @@ -187,13 +187,13 @@ static int sti_dwc3_glue_probe(struct udevice *dev) /* deassert both powerdown and softreset */ ret = reset_deassert(&plat->powerdown_ctl); if (ret < 0) { - error("DWC3 powerdown reset deassert failed: %d", ret); + pr_err("DWC3 powerdown reset deassert failed: %d", ret); return ret; } ret = reset_deassert(&plat->softreset_ctl); if (ret < 0) { - error("DWC3 soft reset deassert failed: %d", ret); + pr_err("DWC3 soft reset deassert failed: %d", ret); goto softreset_err; } @@ -208,14 +208,14 @@ static int sti_dwc3_glue_probe(struct udevice *dev) init_err: ret = reset_assert(&plat->softreset_ctl); if (ret < 0) { - error("DWC3 soft reset deassert failed: %d", ret); + pr_err("DWC3 soft reset deassert failed: %d", ret); return ret; } softreset_err: ret = reset_assert(&plat->powerdown_ctl); if (ret < 0) - error("DWC3 powerdown reset deassert failed: %d", ret); + pr_err("DWC3 powerdown reset deassert failed: %d", ret); return ret; } @@ -228,13 +228,13 @@ static int sti_dwc3_glue_remove(struct udevice *dev) /* assert both powerdown and softreset */ ret = reset_assert(&plat->powerdown_ctl); if (ret < 0) { - error("DWC3 powerdown reset deassert failed: %d", ret); + pr_err("DWC3 powerdown reset deassert failed: %d", ret); return ret; } ret = reset_assert(&plat->softreset_ctl); if (ret < 0) - error("DWC3 soft reset deassert failed: %d", ret); + pr_err("DWC3 soft reset deassert failed: %d", ret); return ret; } diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c index 03f8d321af..1cb92c0338 100644 --- a/drivers/usb/host/ehci-generic.c +++ b/drivers/usb/host/ehci-generic.c @@ -51,7 +51,7 @@ static int ehci_usb_probe(struct udevice *dev) break; err = clk_enable(&priv->clocks[i]); if (err) { - error("failed to enable clock %d\n", i); + pr_err("failed to enable clock %d\n", i); clk_free(&priv->clocks[i]); goto clk_err; } @@ -59,7 +59,7 @@ static int ehci_usb_probe(struct udevice *dev) } } else { if (clock_nb != -ENOENT) { - error("failed to get clock phandle(%d)\n", clock_nb); + pr_err("failed to get clock phandle(%d)\n", clock_nb); return clock_nb; } } @@ -80,7 +80,7 @@ static int ehci_usb_probe(struct udevice *dev) break; if (reset_deassert(&priv->resets[i])) { - error("failed to deassert reset %d\n", i); + pr_err("failed to deassert reset %d\n", i); reset_free(&priv->resets[i]); goto reset_err; } @@ -88,7 +88,7 @@ static int ehci_usb_probe(struct udevice *dev) } } else { if (reset_nb != -ENOENT) { - error("failed to get reset phandle(%d)\n", reset_nb); + pr_err("failed to get reset phandle(%d)\n", reset_nb); goto clk_err; } } @@ -96,19 +96,19 @@ static int ehci_usb_probe(struct udevice *dev) err = generic_phy_get_by_index(dev, 0, &priv->phy); if (err) { if (err != -ENOENT) { - error("failed to get usb phy\n"); + pr_err("failed to get usb phy\n"); goto reset_err; } } else { err = generic_phy_init(&priv->phy); if (err) { - error("failed to init usb phy\n"); + pr_err("failed to init usb phy\n"); goto reset_err; } } - hccr = map_physmem(devfdt_get_addr(dev), 0x100, MAP_NOCACHE); + hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE); hcor = (struct ehci_hcor *)((uintptr_t)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); @@ -122,17 +122,17 @@ phy_err: if (generic_phy_valid(&priv->phy)) { ret = generic_phy_exit(&priv->phy); if (ret) - error("failed to release phy\n"); + pr_err("failed to release phy\n"); } reset_err: ret = reset_release_all(priv->resets, priv->reset_count); if (ret) - error("failed to assert all resets\n"); + pr_err("failed to assert all resets\n"); clk_err: ret = clk_release_all(priv->clocks, priv->clock_count); if (ret) - error("failed to disable all clocks\n"); + pr_err("failed to disable all clocks\n"); return err; } diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 3243c1d1cf..be3e842dcc 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -1596,6 +1596,17 @@ static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev, return _ehci_destroy_int_queue(udev, queue); } +static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size) +{ + /* + * EHCD can handle any transfer length as long as there is enough + * free heap space left, hence set the theoretical max number here. + */ + *size = SIZE_MAX; + + return 0; +} + int ehci_register(struct udevice *dev, struct ehci_hccr *hccr, struct ehci_hcor *hcor, const struct ehci_ops *ops, uint tweaks, enum usb_init_type init) @@ -1658,6 +1669,7 @@ struct dm_usb_ops ehci_usb_ops = { .create_int_queue = ehci_create_int_queue, .poll_int_queue = ehci_poll_int_queue, .destroy_int_queue = ehci_destroy_int_queue, + .get_max_xfer_size = ehci_get_max_xfer_size, }; #endif diff --git a/drivers/usb/host/ehci-rcar_gen3.c b/drivers/usb/host/ehci-rcar_gen3.c deleted file mode 100644 index 525e7f3573..0000000000 --- a/drivers/usb/host/ehci-rcar_gen3.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * drivers/usb/host/ehci-rcar_gen3. - * This file is EHCI HCD (Host Controller Driver) for USB. - * - * Copyright (C) 2015-2017 Renesas Electronics Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <errno.h> -#include <wait_bit.h> -#include <asm/io.h> -#include <usb/ehci-ci.h> -#include "ehci.h" - -#define RCAR_GEN3_USB_BASE(n) (0xEE080000 + ((n) * 0x20000)) - -#define EHCI_USBCMD 0x120 - -#define CORE_SPD_RSM_TIMSET 0x30c -#define CORE_OC_TIMSET 0x310 - -/* Register offset */ -#define AHB_OFFSET 0x200 - -#define BASE_HSUSB 0xE6590000 -#define REG_LPSTS (BASE_HSUSB + 0x0102) /* 16bit */ -#define SUSPM 0x4000 -#define SUSPM_NORMAL BIT(14) -#define REG_UGCTRL2 (BASE_HSUSB + 0x0184) /* 32bit */ -#define USB0SEL 0x00000030 -#define USB0SEL_EHCI 0x00000010 - -#define SMSTPCR7 0xE615014C -#define SMSTPCR700 BIT(0) /* EHCI3 */ -#define SMSTPCR701 BIT(1) /* EHCI2 */ -#define SMSTPCR702 BIT(2) /* EHCI1 */ -#define SMSTPCR703 BIT(3) /* EHCI0 */ -#define SMSTPCR704 BIT(4) /* HSUSB */ - -#define AHB_PLL_RST BIT(1) - -#define USBH_INTBEN BIT(2) -#define USBH_INTAEN BIT(1) - -#define AHB_INT_ENABLE 0x200 -#define AHB_USBCTR 0x20c - -int ehci_hcd_stop(int index) -{ -#if defined(CONFIG_R8A7795) - const u32 mask = SMSTPCR703 | SMSTPCR702 | SMSTPCR701 | SMSTPCR700; -#else - const u32 mask = SMSTPCR703 | SMSTPCR702; -#endif - const u32 base = RCAR_GEN3_USB_BASE(index); - int ret; - - /* Reset EHCI */ - setbits_le32((uintptr_t)(base + EHCI_USBCMD), CMD_RESET); - ret = wait_for_bit("ehci-rcar", (void *)(uintptr_t)base + EHCI_USBCMD, - CMD_RESET, false, 10, true); - if (ret) { - printf("ehci-rcar: reset failed (index=%i, ret=%i).\n", - index, ret); - } - - setbits_le32(SMSTPCR7, BIT(3 - index)); - - if ((readl(SMSTPCR7) & mask) == mask) - setbits_le32(SMSTPCR7, SMSTPCR704); - - return 0; -} - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - const void __iomem *base = - (void __iomem *)(uintptr_t)RCAR_GEN3_USB_BASE(index); - struct usb_ehci *ehci = (struct usb_ehci *)(uintptr_t)base; - - clrbits_le32(SMSTPCR7, BIT(3 - index)); - clrbits_le32(SMSTPCR7, SMSTPCR704); - - *hccr = (struct ehci_hccr *)((uintptr_t)&ehci->caplength); - *hcor = (struct ehci_hcor *)((uintptr_t)*hccr + - HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - /* Enable interrupt */ - setbits_le32(base + AHB_INT_ENABLE, USBH_INTBEN | USBH_INTAEN); - writel(0x014e029b, base + CORE_SPD_RSM_TIMSET); - writel(0x000209ab, base + CORE_OC_TIMSET); - - /* Choice USB0SEL */ - clrsetbits_le32(REG_UGCTRL2, USB0SEL, USB0SEL_EHCI); - - /* Clock & Reset */ - clrbits_le32(base + AHB_USBCTR, AHB_PLL_RST); - - /* low power status */ - clrsetbits_le16(REG_LPSTS, SUSPM, SUSPM_NORMAL); - - return 0; -} diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c index e22ee97939..bf55a71d66 100644 --- a/drivers/usb/host/ohci-generic.c +++ b/drivers/usb/host/ohci-generic.c @@ -47,14 +47,14 @@ static int ohci_usb_probe(struct udevice *dev) err = clk_enable(&priv->clocks[i]); if (err) { - error("failed to enable clock %d\n", i); + pr_err("failed to enable clock %d\n", i); clk_free(&priv->clocks[i]); goto clk_err; } priv->clock_count++; } } else if (clock_nb != -ENOENT) { - error("failed to get clock phandle(%d)\n", clock_nb); + pr_err("failed to get clock phandle(%d)\n", clock_nb); return clock_nb; } @@ -74,28 +74,28 @@ static int ohci_usb_probe(struct udevice *dev) err = reset_deassert(&priv->resets[i]); if (err) { - error("failed to deassert reset %d\n", i); + pr_err("failed to deassert reset %d\n", i); reset_free(&priv->resets[i]); goto reset_err; } priv->reset_count++; } } else if (reset_nb != -ENOENT) { - error("failed to get reset phandle(%d)\n", reset_nb); + pr_err("failed to get reset phandle(%d)\n", reset_nb); goto clk_err; } err = generic_phy_get_by_index(dev, 0, &priv->phy); if (err) { if (err != -ENOENT) { - error("failed to get usb phy\n"); + pr_err("failed to get usb phy\n"); goto reset_err; } } else { err = generic_phy_init(&priv->phy); if (err) { - error("failed to init usb phy\n"); + pr_err("failed to init usb phy\n"); goto reset_err; } } @@ -110,17 +110,17 @@ phy_err: if (generic_phy_valid(&priv->phy)) { ret = generic_phy_exit(&priv->phy); if (ret) - error("failed to release phy\n"); + pr_err("failed to release phy\n"); } reset_err: ret = reset_release_all(priv->resets, priv->reset_count); if (ret) - error("failed to assert all resets\n"); + pr_err("failed to assert all resets\n"); clk_err: ret = clk_release_all(priv->clocks, priv->clock_count); if (ret) - error("failed to disable all clocks\n"); + pr_err("failed to disable all clocks\n"); return err; } diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c index 5e3d96c208..15055b351a 100644 --- a/drivers/usb/host/usb-sandbox.c +++ b/drivers/usb/host/usb-sandbox.c @@ -12,6 +12,10 @@ DECLARE_GLOBAL_DATA_PTR; +struct sandbox_usb_ctrl { + int rootdev; +}; + static void usbmon_trace(struct udevice *bus, ulong pipe, struct devrequest *setup, struct udevice *emul) { @@ -40,15 +44,24 @@ static int sandbox_submit_control(struct udevice *bus, void *buffer, int length, struct devrequest *setup) { + struct sandbox_usb_ctrl *ctrl = dev_get_priv(bus); struct udevice *emul; int ret; /* Just use child of dev as emulator? */ debug("%s: bus=%s\n", __func__, bus->name); - ret = usb_emul_find(bus, pipe, &emul); + ret = usb_emul_find(bus, pipe, udev->portnr, &emul); usbmon_trace(bus, pipe, setup, emul); if (ret) return ret; + + if (usb_pipedevice(pipe) == ctrl->rootdev) { + if (setup->request == USB_REQ_SET_ADDRESS) { + debug("%s: Set root hub's USB address\n", __func__); + ctrl->rootdev = le16_to_cpu(setup->value); + } + } + ret = usb_emul_control(emul, udev, pipe, buffer, length, setup); if (ret < 0) { debug("ret=%d\n", ret); @@ -70,7 +83,7 @@ static int sandbox_submit_bulk(struct udevice *bus, struct usb_device *udev, /* Just use child of dev as emulator? */ debug("%s: bus=%s\n", __func__, bus->name); - ret = usb_emul_find(bus, pipe, &emul); + ret = usb_emul_find(bus, pipe, udev->portnr, &emul); usbmon_trace(bus, pipe, NULL, emul); if (ret) return ret; @@ -96,7 +109,7 @@ static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev, /* Just use child of dev as emulator? */ debug("%s: bus=%s\n", __func__, bus->name); - ret = usb_emul_find(bus, pipe, &emul); + ret = usb_emul_find(bus, pipe, udev->portnr, &emul); usbmon_trace(bus, pipe, NULL, emul); if (ret) return ret; @@ -107,6 +120,16 @@ static int sandbox_submit_int(struct udevice *bus, struct usb_device *udev, static int sandbox_alloc_device(struct udevice *dev, struct usb_device *udev) { + struct sandbox_usb_ctrl *ctrl = dev_get_priv(dev); + + /* + * Root hub will be the first device to be initailized. + * If this device is a root hub, initialize its device speed + * to high speed as we are a USB 2.0 controller. + */ + if (ctrl->rootdev == 0) + udev->speed = USB_SPEED_HIGH; + return 0; } @@ -133,4 +156,5 @@ U_BOOT_DRIVER(usb_sandbox) = { .of_match = sandbox_usb_ids, .probe = sandbox_usb_probe, .ops = &sandbox_usb_ops, + .priv_auto_alloc_size = sizeof(struct sandbox_usb_ctrl), }; diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c index 0b8a501ce8..4e40f4bc3d 100644 --- a/drivers/usb/host/usb-uclass.c +++ b/drivers/usb/host/usb-uclass.c @@ -150,9 +150,21 @@ int usb_update_hub_device(struct usb_device *udev) return ops->update_hub_device(bus, udev); } +int usb_get_max_xfer_size(struct usb_device *udev, size_t *size) +{ + struct udevice *bus = udev->controller_dev; + struct dm_usb_ops *ops = usb_get_ops(bus); + + if (!ops->get_max_xfer_size) + return -ENOSYS; + + return ops->get_max_xfer_size(bus, size); +} + int usb_stop(void) { struct udevice *bus; + struct udevice *rh; struct uclass *uc; struct usb_uclass_priv *uc_priv; int err = 0, ret; @@ -168,23 +180,20 @@ int usb_stop(void) ret = device_remove(bus, DM_REMOVE_NORMAL); if (ret && !err) err = ret; - } -#ifdef CONFIG_BLK - ret = blk_unbind_all(IF_TYPE_USB); - if (ret && !err) - err = ret; -#endif -#ifdef CONFIG_SANDBOX - struct udevice *dev; - /* Reset all enulation devices */ - ret = uclass_get(UCLASS_USB_EMUL, &uc); - if (ret) - return ret; + /* Locate root hub device */ + device_find_first_child(bus, &rh); + if (rh) { + /* + * All USB devices are children of root hub. + * Unbinding root hub will unbind all of its children. + */ + ret = device_unbind(rh); + if (ret && !err) + err = ret; + } + } - uclass_foreach_dev(dev, uc) - usb_emul_reset(dev); -#endif #ifdef CONFIG_USB_STORAGE usb_stor_reset(); #endif @@ -251,6 +260,21 @@ int usb_init(void) /* init low_level USB */ printf("USB%d: ", count); count++; + +#ifdef CONFIG_SANDBOX + /* + * For Sandbox, we need scan the device tree each time when we + * start the USB stack, in order to re-create the emulated USB + * devices and bind drivers for them before we actually do the + * driver probe. + */ + ret = dm_scan_fdt_dev(bus); + if (ret) { + printf("Sandbox USB device scan failed (%d)\n", ret); + continue; + } +#endif + ret = device_probe(bus); if (ret == -ENODEV) { /* No such device. */ puts("Port not available.\n"); diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c index 4191a89421..258d1cd00a 100644 --- a/drivers/usb/host/xhci-dwc3.c +++ b/drivers/usb/host/xhci-dwc3.c @@ -128,13 +128,13 @@ static int xhci_dwc3_probe(struct udevice *dev) ret = generic_phy_get_by_index(dev, 0, &plat->usb_phy); if (ret) { if (ret != -ENOENT) { - error("Failed to get USB PHY for %s\n", dev->name); + pr_err("Failed to get USB PHY for %s\n", dev->name); return ret; } } else { ret = generic_phy_init(&plat->usb_phy); if (ret) { - error("Can't init USB PHY for %s\n", dev->name); + pr_err("Can't init USB PHY for %s\n", dev->name); return ret; } } @@ -161,7 +161,7 @@ static int xhci_dwc3_remove(struct udevice *dev) if (generic_phy_valid(&plat->usb_phy)) { ret = generic_phy_exit(&plat->usb_phy); if (ret) { - error("Can't deinit USB PHY for %s\n", dev->name); + pr_err("Can't deinit USB PHY for %s\n", dev->name); return ret; } } diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index d5eab3a615..0582a9be40 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -786,12 +786,22 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, #ifdef CONFIG_DM_USB /* Set up TT fields to support FS/LS devices */ if (speed == USB_SPEED_LOW || speed == USB_SPEED_FULL) { - dev = dev_get_parent_priv(udev->dev); - if (dev->speed == USB_SPEED_HIGH) { - hub = dev_get_uclass_priv(udev->dev); + struct udevice *parent = udev->dev; + + dev = udev; + do { + port_num = dev->portnr; + dev = dev_get_parent_priv(parent); + if (usb_hub_is_root_hub(dev->dev)) + break; + parent = dev->dev->parent; + } while (dev->speed != USB_SPEED_HIGH); + + if (!usb_hub_is_root_hub(dev->dev)) { + hub = dev_get_uclass_priv(dev->dev); if (hub->tt.multi) slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); - slot_ctx->tt_info |= cpu_to_le32(TT_PORT(udev->portnr)); + slot_ctx->tt_info |= cpu_to_le32(TT_PORT(port_num)); slot_ctx->tt_info |= cpu_to_le32(TT_SLOT(dev->slot_id)); } } @@ -840,6 +850,12 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl, trb_64 = (uintptr_t)virt_dev->eps[0].ring->first_seg->trbs; ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state); + /* + * xHCI spec 6.2.3: + * software shall set 'Average TRB Length' to 8 for control endpoints. + */ + ep0_ctx->tx_info = cpu_to_le32(EP_AVG_TRB_LENGTH(8)); + /* Steps 7 and 8 were done in xhci_alloc_virt_device() */ xhci_flush_cache((uintptr_t)ep0_ctx, sizeof(struct xhci_ep_ctx)); diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c index ec55f4e59f..b1f9884273 100644 --- a/drivers/usb/host/xhci-rockchip.c +++ b/drivers/usb/host/xhci-rockchip.c @@ -6,8 +6,6 @@ */ #include <common.h> #include <dm.h> -#include <fdtdec.h> -#include <libfdt.h> #include <malloc.h> #include <usb.h> #include <watchdog.h> @@ -46,9 +44,9 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev) /* * Get the base address for XHCI controller from the device node */ - plat->hcd_base = devfdt_get_addr(dev); + plat->hcd_base = dev_read_addr(dev); if (plat->hcd_base == FDT_ADDR_T_NONE) { - error("Can't get the XHCI register base address\n"); + pr_err("Can't get the XHCI register base address\n"); return -ENXIO; } @@ -62,7 +60,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev) } if (plat->phy_base == FDT_ADDR_T_NONE) { - error("Can't get the usbphy register address\n"); + pr_err("Can't get the usbphy register address\n"); return -ENXIO; } @@ -119,7 +117,7 @@ static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci, ret = dwc3_core_init(rkxhci->dwc3_reg); if (ret) { - error("failed to initialize core\n"); + pr_err("failed to initialize core\n"); return ret; } @@ -151,14 +149,14 @@ static int xhci_usb_probe(struct udevice *dev) if (plat->vbus_supply) { ret = regulator_set_enable(plat->vbus_supply, true); if (ret) { - error("XHCI: failed to set VBus supply\n"); + pr_err("XHCI: failed to set VBus supply\n"); return ret; } } ret = rockchip_xhci_core_init(ctx, dev); if (ret) { - error("XHCI: failed to initialize controller\n"); + pr_err("XHCI: failed to initialize controller\n"); return ret; } @@ -181,7 +179,7 @@ static int xhci_usb_remove(struct udevice *dev) if (plat->vbus_supply) { ret = regulator_set_enable(plat->vbus_supply, false); if (ret) - error("XHCI: failed to set VBus supply\n"); + pr_err("XHCI: failed to set VBus supply\n"); } return ret; diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 9b82ee5c60..4673738d1e 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -257,6 +257,188 @@ static unsigned int xhci_get_ep_index(struct usb_endpoint_descriptor *desc) return index; } +/* + * Convert bInterval expressed in microframes (in 1-255 range) to exponent of + * microframes, rounded down to nearest power of 2. + */ +static unsigned int xhci_microframes_to_exponent(unsigned int desc_interval, + unsigned int min_exponent, + unsigned int max_exponent) +{ + unsigned int interval; + + interval = fls(desc_interval) - 1; + interval = clamp_val(interval, min_exponent, max_exponent); + if ((1 << interval) != desc_interval) + debug("rounding interval to %d microframes, "\ + "ep desc says %d microframes\n", + 1 << interval, desc_interval); + + return interval; +} + +static unsigned int xhci_parse_microframe_interval(struct usb_device *udev, + struct usb_endpoint_descriptor *endpt_desc) +{ + if (endpt_desc->bInterval == 0) + return 0; + + return xhci_microframes_to_exponent(endpt_desc->bInterval, 0, 15); +} + +static unsigned int xhci_parse_frame_interval(struct usb_device *udev, + struct usb_endpoint_descriptor *endpt_desc) +{ + return xhci_microframes_to_exponent(endpt_desc->bInterval * 8, 3, 10); +} + +/* + * Convert interval expressed as 2^(bInterval - 1) == interval into + * straight exponent value 2^n == interval. + */ +static unsigned int xhci_parse_exponent_interval(struct usb_device *udev, + struct usb_endpoint_descriptor *endpt_desc) +{ + unsigned int interval; + + interval = clamp_val(endpt_desc->bInterval, 1, 16) - 1; + if (interval != endpt_desc->bInterval - 1) + debug("ep %#x - rounding interval to %d %sframes\n", + endpt_desc->bEndpointAddress, 1 << interval, + udev->speed == USB_SPEED_FULL ? "" : "micro"); + + if (udev->speed == USB_SPEED_FULL) { + /* + * Full speed isoc endpoints specify interval in frames, + * not microframes. We are using microframes everywhere, + * so adjust accordingly. + */ + interval += 3; /* 1 frame = 2^3 uframes */ + } + + return interval; +} + +/* + * Return the polling or NAK interval. + * + * The polling interval is expressed in "microframes". If xHCI's Interval field + * is set to N, it will service the endpoint every 2^(Interval)*125us. + * + * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval + * is set to 0. + */ +static unsigned int xhci_get_endpoint_interval(struct usb_device *udev, + struct usb_endpoint_descriptor *endpt_desc) +{ + unsigned int interval = 0; + + switch (udev->speed) { + case USB_SPEED_HIGH: + /* Max NAK rate */ + if (usb_endpoint_xfer_control(endpt_desc) || + usb_endpoint_xfer_bulk(endpt_desc)) { + interval = xhci_parse_microframe_interval(udev, + endpt_desc); + break; + } + /* Fall through - SS and HS isoc/int have same decoding */ + + case USB_SPEED_SUPER: + if (usb_endpoint_xfer_int(endpt_desc) || + usb_endpoint_xfer_isoc(endpt_desc)) { + interval = xhci_parse_exponent_interval(udev, + endpt_desc); + } + break; + + case USB_SPEED_FULL: + if (usb_endpoint_xfer_isoc(endpt_desc)) { + interval = xhci_parse_exponent_interval(udev, + endpt_desc); + break; + } + /* + * Fall through for interrupt endpoint interval decoding + * since it uses the same rules as low speed interrupt + * endpoints. + */ + + case USB_SPEED_LOW: + if (usb_endpoint_xfer_int(endpt_desc) || + usb_endpoint_xfer_isoc(endpt_desc)) { + interval = xhci_parse_frame_interval(udev, endpt_desc); + } + break; + + default: + BUG(); + } + + return interval; +} + +/* + * The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps. + * High speed endpoint descriptors can define "the number of additional + * transaction opportunities per microframe", but that goes in the Max Burst + * endpoint context field. + */ +static u32 xhci_get_endpoint_mult(struct usb_device *udev, + struct usb_endpoint_descriptor *endpt_desc, + struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc) +{ + if (udev->speed < USB_SPEED_SUPER || + !usb_endpoint_xfer_isoc(endpt_desc)) + return 0; + + return ss_ep_comp_desc->bmAttributes; +} + +static u32 xhci_get_endpoint_max_burst(struct usb_device *udev, + struct usb_endpoint_descriptor *endpt_desc, + struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc) +{ + /* Super speed and Plus have max burst in ep companion desc */ + if (udev->speed >= USB_SPEED_SUPER) + return ss_ep_comp_desc->bMaxBurst; + + if (udev->speed == USB_SPEED_HIGH && + (usb_endpoint_xfer_isoc(endpt_desc) || + usb_endpoint_xfer_int(endpt_desc))) + return usb_endpoint_maxp_mult(endpt_desc) - 1; + + return 0; +} + +/* + * Return the maximum endpoint service interval time (ESIT) payload. + * Basically, this is the maxpacket size, multiplied by the burst size + * and mult size. + */ +static u32 xhci_get_max_esit_payload(struct usb_device *udev, + struct usb_endpoint_descriptor *endpt_desc, + struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc) +{ + int max_burst; + int max_packet; + + /* Only applies for interrupt or isochronous endpoints */ + if (usb_endpoint_xfer_control(endpt_desc) || + usb_endpoint_xfer_bulk(endpt_desc)) + return 0; + + /* SuperSpeed Isoc ep with less than 48k per esit */ + if (udev->speed >= USB_SPEED_SUPER) + return le16_to_cpu(ss_ep_comp_desc->wBytesPerInterval); + + max_packet = usb_endpoint_maxp(endpt_desc); + max_burst = usb_endpoint_maxp_mult(endpt_desc); + + /* A 0 in max burst means 1 transfer per ESIT */ + return max_packet * max_burst; +} + /** * Issue a configure endpoint command or evaluate context command * and wait for it to finish. @@ -324,6 +506,12 @@ static int xhci_set_configuration(struct usb_device *udev) int slot_id = udev->slot_id; struct xhci_virt_device *virt_dev = ctrl->devs[slot_id]; struct usb_interface *ifdesc; + u32 max_esit_payload; + unsigned int interval; + unsigned int mult; + unsigned int max_burst; + unsigned int avg_trb_len; + unsigned int err_count = 0; out_ctx = virt_dev->out_ctx; in_ctx = virt_dev->in_ctx; @@ -357,10 +545,28 @@ static int xhci_set_configuration(struct usb_device *udev) /* filling up ep contexts */ for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) { struct usb_endpoint_descriptor *endpt_desc = NULL; + struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc = NULL; endpt_desc = &ifdesc->ep_desc[cur_ep]; + ss_ep_comp_desc = &ifdesc->ss_ep_comp_desc[cur_ep]; trb_64 = 0; + /* + * Get values to fill the endpoint context, mostly from ep + * descriptor. The average TRB buffer lengt for bulk endpoints + * is unclear as we have no clue on scatter gather list entry + * size. For Isoc and Int, set it to max available. + * See xHCI 1.1 spec 4.14.1.1 for details. + */ + max_esit_payload = xhci_get_max_esit_payload(udev, endpt_desc, + ss_ep_comp_desc); + interval = xhci_get_endpoint_interval(udev, endpt_desc); + mult = xhci_get_endpoint_mult(udev, endpt_desc, + ss_ep_comp_desc); + max_burst = xhci_get_endpoint_max_burst(udev, endpt_desc, + ss_ep_comp_desc); + avg_trb_len = max_esit_payload; + ep_index = xhci_get_ep_index(endpt_desc); ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index); @@ -372,20 +578,38 @@ static int xhci_set_configuration(struct usb_device *udev) /*NOTE: ep_desc[0] actually represents EP1 and so on */ dir = (((endpt_desc->bEndpointAddress) & (0x80)) >> 7); ep_type = (((endpt_desc->bmAttributes) & (0x3)) | (dir << 2)); + + ep_ctx[ep_index]->ep_info = + cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) | + EP_INTERVAL(interval) | EP_MULT(mult)); + ep_ctx[ep_index]->ep_info2 = cpu_to_le32(ep_type << EP_TYPE_SHIFT); ep_ctx[ep_index]->ep_info2 |= cpu_to_le32(MAX_PACKET (get_unaligned(&endpt_desc->wMaxPacketSize))); + /* Allow 3 retries for everything but isoc, set CErr = 3 */ + if (!usb_endpoint_xfer_isoc(endpt_desc)) + err_count = 3; ep_ctx[ep_index]->ep_info2 |= - cpu_to_le32(((0 & MAX_BURST_MASK) << MAX_BURST_SHIFT) | - ((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT)); + cpu_to_le32(MAX_BURST(max_burst) | + ERROR_COUNT(err_count)); trb_64 = (uintptr_t) virt_dev->eps[ep_index].ring->enqueue; ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 | virt_dev->eps[ep_index].ring->cycle_state); + + /* + * xHCI spec 6.2.3: + * 'Average TRB Length' should be 8 for control endpoints. + */ + if (usb_endpoint_xfer_control(endpt_desc)) + avg_trb_len = 8; + ep_ctx[ep_index]->tx_info = + cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) | + EP_AVG_TRB_LENGTH(avg_trb_len)); } return xhci_configure_endpoints(udev, false); @@ -546,16 +770,13 @@ int xhci_check_maxpacket(struct usb_device *udev) int max_packet_size; int hw_max_packet_size; int ret = 0; - struct usb_interface *ifdesc; - - ifdesc = &udev->config.if_desc[0]; out_ctx = ctrl->devs[slot_id]->out_ctx; xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size); ep_ctx = xhci_get_ep_ctx(ctrl, out_ctx, ep_index); hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); - max_packet_size = usb_endpoint_maxp(&ifdesc->ep_desc[0]); + max_packet_size = udev->epmaxpacketin[0]; if (hw_max_packet_size != max_packet_size) { debug("Max Packet Size for ep 0 changed.\n"); debug("Max packet size in usb_device = %d\n", max_packet_size); @@ -567,7 +788,8 @@ int xhci_check_maxpacket(struct usb_device *udev) ctrl->devs[slot_id]->out_ctx, ep_index); in_ctx = ctrl->devs[slot_id]->in_ctx; ep_ctx = xhci_get_ep_ctx(ctrl, in_ctx, ep_index); - ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK); + ep_ctx->ep_info2 &= cpu_to_le32(~((0xffff & MAX_PACKET_MASK) + << MAX_PACKET_SHIFT)); ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size)); /* @@ -890,11 +1112,18 @@ unknown: static int _xhci_submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer, int length, int interval) { + if (usb_pipetype(pipe) != PIPE_INTERRUPT) { + printf("non-interrupt pipe (type=%lu)", usb_pipetype(pipe)); + return -EINVAL; + } + /* - * TODO: Not addressing any interrupt type transfer requests - * Add support for it later. + * xHCI uses normal TRBs for both bulk and interrupt. When the + * interrupt endpoint is to be serviced, the xHC will consume + * (at most) one TD. A TD (comprised of sg list entries) can + * take several service intervals to transmit. */ - return -EINVAL; + return xhci_bulk_tx(udev, pipe, length, buffer); } /** @@ -1228,6 +1457,20 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev) return xhci_configure_endpoints(udev, false); } +static int xhci_get_max_xfer_size(struct udevice *dev, size_t *size) +{ + /* + * xHCD allocates one segment which includes 64 TRBs for each endpoint + * and the last TRB in this segment is configured as a link TRB to form + * a TRB ring. Each TRB can transfer up to 64K bytes, however data + * buffers referenced by transfer TRBs shall not span 64KB boundaries. + * Hence the maximum number of TRBs we can use in one transfer is 62. + */ + *size = (TRBS_PER_SEGMENT - 2) * TRB_MAX_BUFF_SIZE; + + return 0; +} + int xhci_register(struct udevice *dev, struct xhci_hccr *hccr, struct xhci_hcor *hcor) { @@ -1281,6 +1524,7 @@ struct dm_usb_ops xhci_usb_ops = { .interrupt = xhci_submit_int_msg, .alloc_device = xhci_alloc_device, .update_hub_device = xhci_update_hub_device, + .get_max_xfer_size = xhci_get_max_xfer_size, }; #endif diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index a497d9d830..ba5f650144 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -663,8 +663,9 @@ struct xhci_ep_ctx { #define GET_MAX_PACKET(p) ((p) & 0x7ff) /* tx_info bitmasks */ -#define AVG_TRB_LENGTH_FOR_EP(p) ((p) & 0xffff) -#define MAX_ESIT_PAYLOAD_FOR_EP(p) (((p) & 0xffff) << 16) +#define EP_AVG_TRB_LENGTH(p) ((p) & 0xffff) +#define EP_MAX_ESIT_PAYLOAD_LO(p) (((p) & 0xffff) << 16) +#define EP_MAX_ESIT_PAYLOAD_HI(p) ((((p) >> 16) & 0xff) << 24) #define CTX_TO_MAX_ESIT_PAYLOAD(p) (((p) >> 16) & 0xffff) /* deq bitmasks */ @@ -1045,9 +1046,9 @@ struct xhci_scratchpad { * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table, * meaning 64 ring segments. * Initial allocated size of the ERST, in number of entries */ -#define ERST_NUM_SEGS 3 +#define ERST_NUM_SEGS 1 /* Initial number of event segment rings allocated */ -#define ERST_ENTRIES 3 +#define ERST_ENTRIES 1 /* Initial allocated size of the ERST, in number of entries */ #define ERST_SIZE 64 /* Poll every 60 seconds */ diff --git a/drivers/usb/musb-new/linux-compat.h b/drivers/usb/musb-new/linux-compat.h index 4dae83ed68..7bb53d2b19 100644 --- a/drivers/usb/musb-new/linux-compat.h +++ b/drivers/usb/musb-new/linux-compat.h @@ -5,8 +5,6 @@ #include <linux/list.h> #include <linux/compat.h> -#define pr_debug(fmt, args...) debug(fmt, ##args) - #define WARN(condition, fmt, args...) ({ \ int ret_warn = !!condition; \ if (ret_warn) \ diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 5c1a902e42..7ee44ea919 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -308,9 +308,6 @@ static struct musb_hdrc_platform_data musb_plat = { .platform_ops = &sunxi_musb_ops, }; -#ifdef CONFIG_USB_MUSB_HOST -static int musb_usb_remove(struct udevice *dev); - static int musb_usb_probe(struct udevice *dev) { struct musb_host_data *host = dev_get_priv(dev); @@ -319,16 +316,20 @@ static int musb_usb_probe(struct udevice *dev) priv->desc_before_addr = true; +#ifdef CONFIG_USB_MUSB_HOST host->host = musb_init_controller(&musb_plat, NULL, (void *)SUNXI_USB0_BASE); if (!host->host) return -EIO; ret = musb_lowlevel_init(host); - if (ret == 0) - printf("MUSB OTG\n"); - else - musb_usb_remove(dev); + if (!ret) + printf("Allwinner mUSB OTG (Host)\n"); +#else + ret = musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE); + if (!ret) + printf("Allwinner mUSB OTG (Peripheral)\n"); +#endif return ret; } @@ -352,30 +353,27 @@ static int musb_usb_remove(struct udevice *dev) return 0; } -U_BOOT_DRIVER(usb_musb) = { - .name = "sunxi-musb", - .id = UCLASS_USB, - .probe = musb_usb_probe, - .remove = musb_usb_remove, - .ops = &musb_usb_ops, - .platdata_auto_alloc_size = sizeof(struct usb_platdata), - .priv_auto_alloc_size = sizeof(struct musb_host_data), +static const struct udevice_id sunxi_musb_ids[] = { + { .compatible = "allwinner,sun4i-a10-musb" }, + { .compatible = "allwinner,sun6i-a31-musb" }, + { .compatible = "allwinner,sun8i-a33-musb" }, + { .compatible = "allwinner,sun8i-h3-musb" }, + { } }; -#endif -void sunxi_musb_board_init(void) -{ +U_BOOT_DRIVER(usb_musb) = { + .name = "sunxi-musb", #ifdef CONFIG_USB_MUSB_HOST - struct udevice *dev; - - /* - * Bind the driver directly for now as musb linux kernel support is - * still pending upstream so our dts files do not have the necessary - * nodes yet. TODO: Remove this as soon as the dts nodes are in place - * and bind by compatible instead. - */ - device_bind_driver(dm_root(), "sunxi-musb", "sunxi-musb", &dev); + .id = UCLASS_USB, #else - musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE); + .id = UCLASS_USB_DEV_GENERIC, #endif -} + .of_match = sunxi_musb_ids, + .probe = musb_usb_probe, + .remove = musb_usb_remove, +#ifdef CONFIG_USB_MUSB_HOST + .ops = &musb_usb_ops, +#endif + .platdata_auto_alloc_size = sizeof(struct usb_platdata), + .priv_auto_alloc_size = sizeof(struct musb_host_data), +}; diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c index de101319cd..233857ad7a 100644 --- a/drivers/usb/musb-new/ti-musb.c +++ b/drivers/usb/musb-new/ti-musb.c @@ -106,7 +106,7 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev) "mentor,multipoint", -1); if (platdata->musb_config.multipoint < 0) { - error("MUSB multipoint DT entry missing\n"); + pr_err("MUSB multipoint DT entry missing\n"); return -ENOENT; } @@ -115,14 +115,14 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev) platdata->musb_config.num_eps = fdtdec_get_int(fdt, node, "mentor,num-eps", -1); if (platdata->musb_config.num_eps < 0) { - error("MUSB num-eps DT entry missing\n"); + pr_err("MUSB num-eps DT entry missing\n"); return -ENOENT; } platdata->musb_config.ram_bits = fdtdec_get_int(fdt, node, "mentor,ram-bits", -1); if (platdata->musb_config.ram_bits < 0) { - error("MUSB ram-bits DT entry missing\n"); + pr_err("MUSB ram-bits DT entry missing\n"); return -ENOENT; } @@ -132,7 +132,7 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev) platdata->plat.power = fdtdec_get_int(fdt, node, "mentor,power", -1); if (platdata->plat.power < 0) { - error("MUSB mentor,power DT entry missing\n"); + pr_err("MUSB mentor,power DT entry missing\n"); return -ENOENT; } @@ -183,7 +183,7 @@ static int ti_musb_host_ofdata_to_platdata(struct udevice *dev) ret = ti_musb_ofdata_to_platdata(dev); if (ret) { - error("platdata dt parse error\n"); + pr_err("platdata dt parse error\n"); return ret; } @@ -229,7 +229,7 @@ static int ti_musb_wrapper_bind(struct udevice *parent) ret = device_bind_driver_to_node(parent, "ti-musb-host", name, offset_to_ofnode(node), &dev); if (ret) { - error("musb - not able to bind usb host node\n"); + pr_err("musb - not able to bind usb host node\n"); return ret; } break; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 7ba7b580db..e6b7f11dc9 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -65,6 +65,14 @@ config VIDEO_BPP32 this option, such displays will not be supported and console output will be empty. +config VIDEO_ANSI + bool "Support ANSI escape sequences in video console" + depends on DM_VIDEO + default y if DM_VIDEO + help + Enable ANSI escape sequence decoding for a more fully functional + console. + config CONSOLE_NORMAL bool "Support a simple text console" depends on DM_VIDEO diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index bb5cc9788a..a8b3e747a0 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -128,7 +128,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel) raster_ctrl |= LCD_TFT_24BPP_MODE; break; default: - error("am335x-fb: invalid bpp value: %d\n", panel->bpp); + pr_err("am335x-fb: invalid bpp value: %d\n", panel->bpp); return -1; } diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c index b5afd72227..5f63c12d6c 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -9,6 +9,7 @@ */ #include <common.h> +#include <linux/ctype.h> #include <dm.h> #include <video.h> #include <video_console.h> @@ -107,12 +108,213 @@ static void vidconsole_newline(struct udevice *dev) video_sync(dev->parent); } +static const struct { + unsigned r; + unsigned g; + unsigned b; +} colors[] = { + { 0x00, 0x00, 0x00 }, /* black */ + { 0xff, 0x00, 0x00 }, /* red */ + { 0x00, 0xff, 0x00 }, /* green */ + { 0xff, 0xff, 0x00 }, /* yellow */ + { 0x00, 0x00, 0xff }, /* blue */ + { 0xff, 0x00, 0xff }, /* magenta */ + { 0x00, 0xff, 0xff }, /* cyan */ + { 0xff, 0xff, 0xff }, /* white */ +}; + +static void set_color(struct video_priv *priv, unsigned idx, unsigned *c) +{ + switch (priv->bpix) { + case VIDEO_BPP16: + *c = ((colors[idx].r >> 3) << 0) | + ((colors[idx].g >> 2) << 5) | + ((colors[idx].b >> 3) << 11); + break; + case VIDEO_BPP32: + *c = 0xff000000 | + (colors[idx].r << 0) | + (colors[idx].g << 8) | + (colors[idx].b << 16); + break; + default: + /* unsupported, leave current color in place */ + break; + } +} + +static char *parsenum(char *s, int *num) +{ + char *end; + *num = simple_strtol(s, &end, 10); + return end; +} + +/* + * Process a character while accumulating an escape string. Chars are + * accumulated into escape_buf until the end of escape sequence is + * found, at which point the sequence is parsed and processed. + */ +static void vidconsole_escape_char(struct udevice *dev, char ch) +{ + struct vidconsole_priv *priv = dev_get_uclass_priv(dev); + + if (!IS_ENABLED(CONFIG_VIDEO_ANSI)) + goto error; + + /* Sanity checking for bogus ESC sequences: */ + if (priv->escape_len >= sizeof(priv->escape_buf)) + goto error; + if (priv->escape_len == 0 && ch != '[') + goto error; + + priv->escape_buf[priv->escape_len++] = ch; + + /* + * Escape sequences are terminated by a letter, so keep + * accumulating until we get one: + */ + if (!isalpha(ch)) + return; + + /* + * clear escape mode first, otherwise things will get highly + * surprising if you hit any debug prints that come back to + * this console. + */ + priv->escape = 0; + + switch (ch) { + case 'H': + case 'f': { + int row, col; + char *s = priv->escape_buf; + + /* + * Set cursor position: [%d;%df or [%d;%dH + */ + s++; /* [ */ + s = parsenum(s, &row); + s++; /* ; */ + s = parsenum(s, &col); + + priv->ycur = row * priv->y_charsize; + priv->xcur_frac = priv->xstart_frac + + VID_TO_POS(col * priv->x_charsize); + + break; + } + case 'J': { + int mode; + + /* + * Clear part/all screen: + * [J or [0J - clear screen from cursor down + * [1J - clear screen from cursor up + * [2J - clear entire screen + * + * TODO we really only handle entire-screen case, others + * probably require some additions to video-uclass (and + * are not really needed yet by efi_console) + */ + parsenum(priv->escape_buf + 1, &mode); + + if (mode == 2) { + video_clear(dev->parent); + video_sync(dev->parent); + priv->ycur = 0; + priv->xcur_frac = priv->xstart_frac; + } else { + debug("unsupported clear mode: %d\n", mode); + } + break; + } + case 'm': { + struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent); + char *s = priv->escape_buf; + char *end = &priv->escape_buf[priv->escape_len]; + + /* + * Set graphics mode: [%d;...;%dm + * + * Currently only supports the color attributes: + * + * Foreground Colors: + * + * 30 Black + * 31 Red + * 32 Green + * 33 Yellow + * 34 Blue + * 35 Magenta + * 36 Cyan + * 37 White + * + * Background Colors: + * + * 40 Black + * 41 Red + * 42 Green + * 43 Yellow + * 44 Blue + * 45 Magenta + * 46 Cyan + * 47 White + */ + + s++; /* [ */ + while (s < end) { + int val; + + s = parsenum(s, &val); + s++; + + switch (val) { + case 30 ... 37: + /* fg color */ + set_color(vid_priv, val - 30, + (unsigned *)&vid_priv->colour_fg); + break; + case 40 ... 47: + /* bg color */ + set_color(vid_priv, val - 40, + (unsigned *)&vid_priv->colour_bg); + break; + default: + /* unknown/unsupported */ + break; + } + } + + break; + } + default: + debug("unrecognized escape sequence: %*s\n", + priv->escape_len, priv->escape_buf); + } + + return; + +error: + /* something went wrong, just revert to normal mode: */ + priv->escape = 0; +} + int vidconsole_put_char(struct udevice *dev, char ch) { struct vidconsole_priv *priv = dev_get_uclass_priv(dev); int ret; + if (priv->escape) { + vidconsole_escape_char(dev, ch); + return 0; + } + switch (ch) { + case '\x1b': + priv->escape_len = 0; + priv->escape = 1; + break; case '\a': /* beep */ break; @@ -163,6 +365,7 @@ static void vidconsole_putc(struct stdio_dev *sdev, const char ch) struct udevice *dev = sdev->priv; vidconsole_put_char(dev, ch); + video_sync(dev->parent); } static void vidconsole_puts(struct stdio_dev *sdev, const char *s) @@ -260,6 +463,8 @@ static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc, for (s = argv[1]; *s; s++) vidconsole_put_char(dev, *s); + video_sync(dev->parent); + return 0; } diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index dfa39b0d1b..dcaceed42c 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -87,7 +87,7 @@ int video_reserve(ulong *addrp) return 0; } -static int video_clear(struct udevice *dev) +void video_clear(struct udevice *dev) { struct video_priv *priv = dev_get_uclass_priv(dev); @@ -100,8 +100,6 @@ static int video_clear(struct udevice *dev) } else { memset(priv->fb, priv->colour_bg, priv->fb_size); } - - return 0; } /* Flush video activity to the caches */ diff --git a/dts/Kconfig b/dts/Kconfig index 4ee0510943..daa757dd56 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -102,7 +102,7 @@ config DEFAULT_DEVICE_TREE config OF_LIST string "List of device tree files to include for DT control" - depends on SPL_LOAD_FIT || FIT_EMBED + depends on SPL_LOAD_FIT || MULTI_DTB_FIT default DEFAULT_DEVICE_TREE help This option specifies a list of device tree files to use for DT @@ -112,6 +112,107 @@ config OF_LIST device tree files (without the directory or .dtb suffix) separated by <space>. + +config DTB_RESELECT + bool "Support swapping dtbs at a later point in boot" + depends on MULTI_DTB_FIT + help + It is possible during initial boot you may need to use a generic + dtb until you can fully determine the board your running on. This + config allows boards to implement a function at a later point + during boot to switch to the "correct" dtb. + +config MULTI_DTB_FIT + bool "Support embedding several DTBs in a FIT image for u-boot" + help + This option provides hooks to allow U-boot to parse an + appended FIT image and enable board specific code to then select + the correct DTB to be used. Use this if you need to support + multiple DTBs but don't use the SPL. + + +config SPL_MULTI_DTB_FIT + depends on SPL_LOAD_FIT && SPL_OF_CONTROL && !SPL_OF_PLATDATA + bool "Support embedding several DTBs in a FIT image for the SPL" + help + This option provides the SPL with the ability to select its own + DTB at runtime from an appended FIT image containing several DTBs. + This allows using the same SPL binary on multiple platforms. + The primary purpose is to handle different versions of + the same platform without tweaking the platform code if the + differences can be expressed in the DTBs (common examples are: bus + capabilities, pad configurations). + +config SPL_OF_LIST + string "List of device tree files to include for DT control in SPL" + depends on SPL_MULTI_DTB_FIT + default OF_LIST + help + This option specifies a list of device tree files to use for DT + control in the SPL. These will be packaged into a FIT. At run-time, + the SPL will select the correct DT to use by examining the + hardware (e.g. reading a board ID value). This is a list of + device tree files (without the directory or .dtb suffix) + separated by <space>. + +choice + prompt "SPL OF LIST compression" + depends on SPL_MULTI_DTB_FIT + default SPL_MULTI_DTB_FIT_LZO + +config SPL_MULTI_DTB_FIT_LZO + bool "LZO" + depends on SYS_MALLOC_F + select SPL_LZO + help + Compress the FIT image containing the DTBs available for the SPL + using LZO compression. (requires lzop on host). + +config SPL_MULTI_DTB_FIT_GZIP + bool "GZIP" + depends on SYS_MALLOC_F + select SPL_GZIP + help + Compress the FIT image containing the DTBs available for the SPL + using GZIP compression. (requires gzip on host) + +config SPL_MULTI_DTB_FIT_NO_COMPRESSION + bool "No compression" + help + Do not compress the FIT image containing the DTBs available for the SPL. + Use this options only if LZO is not available and the DTBs are very small. +endchoice + +choice + prompt "Location of uncompressed DTBs " + depends on (SPL_MULTI_DTB_FIT_GZIP || SPL_MULTI_DTB_FIT_LZO) + default SPL_MULTI_DTB_FIT_DYN_ALLOC if SYS_MALLOC_F + +config SPL_MULTI_DTB_FIT_DYN_ALLOC + bool "Dynamically allocate the memory" + depends on SYS_MALLOC_F + +config SPL_MULTI_DTB_FIT_USER_DEFINED_AREA + bool "User-defined location" +endchoice + +config SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ + hex "Size of memory reserved to uncompress the DTBs" + depends on (SPL_MULTI_DTB_FIT_GZIP || SPL_MULTI_DTB_FIT_LZO) + default 0x8000 + help + This is the size of this area where the DTBs are uncompressed. + If this area is dynamically allocated, make sure that + SPL_SYS_MALLOC_F_LEN is big enough to contain it. + +config SPL_MULTI_DTB_FIT_USER_DEF_ADDR + hex "Address of memory where dtbs are uncompressed" + depends on SPL_MULTI_DTB_FIT_USER_DEFINED_AREA + help + the FIT image containing the DTBs is uncompressed in an area defined + at compilation time. This is the address of this area. It must be + aligned on 2-byte boundary. + config OF_SPL_REMOVE_PROPS string "List of device tree properties to drop for SPL" depends on SPL_OF_CONTROL diff --git a/env/Kconfig b/env/Kconfig index 024d4d79bd..02cb7cbb75 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -3,7 +3,6 @@ menu "Environment" choice prompt "Select the location of the environment" default ENV_IS_IN_MMC if ARCH_SUNXI - default ENV_IS_IN_MMC if ARCH_UNIPHIER default ENV_IS_IN_MMC if ARCH_EXYNOS4 default ENV_IS_IN_MMC if MX6SX || MX7D default ENV_IS_IN_MMC if TEGRA30 || TEGRA124 @@ -40,21 +39,6 @@ config ENV_IS_NOWHERE stored. U-Boot will therefore always start up with a default environment. -config ENV_IS_IN_DATAFLASH - bool "Environment in dataflash" - depends on !CHAIN_OF_TRUST - help - Define this if you have a DataFlash memory device which you - want to use for the environment. - - - CONFIG_ENV_OFFSET: - - CONFIG_ENV_ADDR: - - CONFIG_ENV_SIZE: - - These three #defines specify the offset and size of the - environment area within the total memory of your DataFlash placed - at the specified address. - config ENV_IS_IN_EEPROM bool "Environment in EEPROM" depends on !CHAIN_OF_TRUST diff --git a/env/Makefile b/env/Makefile index 8df5b9d4c9..7ce8231d9a 100644 --- a/env/Makefile +++ b/env/Makefile @@ -11,7 +11,6 @@ ifndef CONFIG_SPL_BUILD obj-y += attr.o obj-y += callback.o obj-y += flags.o -obj-$(CONFIG_ENV_IS_IN_DATAFLASH) += dataflash.o obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o extra-$(CONFIG_ENV_IS_EMBEDDED) += embedded.o obj-$(CONFIG_ENV_IS_IN_EEPROM) += embedded.o diff --git a/env/common.c b/env/common.c index b403bd5f6c..70715bb6e7 100644 --- a/env/common.c +++ b/env/common.c @@ -84,7 +84,7 @@ void set_default_env(const char *s) if (himport_r(&env_htab, (char *)default_environment, sizeof(default_environment), '\0', flags, 0, 0, NULL) == 0) - error("Environment import failed: errno = %d\n", errno); + pr_err("Environment import failed: errno = %d\n", errno); gd->flags |= GD_FLG_ENV_READY; gd->flags |= GD_FLG_ENV_DEFAULT; @@ -172,7 +172,7 @@ int env_import(const char *buf, int check) /* Decrypt the env if desired. */ ret = env_aes_cbc_crypt(ep, 0); if (ret) { - error("Failed to decrypt env!\n"); + pr_err("Failed to decrypt env!\n"); set_default_env("!import failed"); return ret; } @@ -183,7 +183,7 @@ int env_import(const char *buf, int check) return 1; } - error("Cannot import environment: errno = %d\n", errno); + pr_err("Cannot import environment: errno = %d\n", errno); set_default_env("!import failed"); @@ -247,7 +247,7 @@ int env_export(env_t *env_out) res = (char *)env_out->data; len = hexport_r(&env_htab, '\0', 0, &res, ENV_SIZE, 0, NULL); if (len < 0) { - error("Cannot export environment: errno = %d\n", errno); + pr_err("Cannot export environment: errno = %d\n", errno); return 1; } diff --git a/env/dataflash.c b/env/dataflash.c deleted file mode 100644 index 77bc595e0d..0000000000 --- a/env/dataflash.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * LowLevel function for DataFlash environment support - * Author : Gilles Gastaldi (Atmel) - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <command.h> -#include <environment.h> -#include <linux/stddef.h> -#include <dataflash.h> -#include <search.h> -#include <errno.h> - -DECLARE_GLOBAL_DATA_PTR; - -static int env_dataflash_get_char(int index) -{ - uchar c; - - read_dataflash(CONFIG_ENV_ADDR + index + offsetof(env_t, data), - 1, (char *)&c); - return c; -} - -static int env_dataflash_load(void) -{ - ulong crc, new = 0; - unsigned off; - char buf[CONFIG_ENV_SIZE]; - - /* Read old CRC */ - read_dataflash(CONFIG_ENV_ADDR + offsetof(env_t, crc), - sizeof(ulong), (char *)&crc); - - /* Read whole environment */ - read_dataflash(CONFIG_ENV_ADDR, CONFIG_ENV_SIZE, buf); - - /* Calculate the CRC */ - off = offsetof(env_t, data); - new = crc32(new, (unsigned char *)(buf + off), ENV_SIZE); - - if (crc == new) - env_import(buf, 1); - else - set_default_env("!bad CRC"); - - return 0; -} - -#ifdef CONFIG_ENV_OFFSET_REDUND -#error No support for redundant environment on dataflash yet! -#endif - -static int env_dataflash_save(void) -{ - env_t env_new; - int ret; - - ret = env_export(&env_new); - if (ret) - return ret; - - return write_dataflash(CONFIG_ENV_ADDR, - (unsigned long)&env_new, - CONFIG_ENV_SIZE); -} - -U_BOOT_ENV_LOCATION(dataflash) = { - .location = ENVL_DATAFLASH, - ENV_NAME("dataflash") - .get_char = env_dataflash_get_char, - .load = env_dataflash_load, - .save = env_save_ptr(env_dataflash_save), -}; @@ -28,9 +28,7 @@ static struct env_driver *env_driver_lookup(enum env_location loc) static enum env_location env_get_default_location(void) { - if IS_ENABLED(CONFIG_ENV_IS_IN_DATAFLASH) - return ENVL_DATAFLASH; - else if IS_ENABLED(CONFIG_ENV_IS_IN_EEPROM) + if IS_ENABLED(CONFIG_ENV_IS_IN_EEPROM) return ENVL_EEPROM; else if IS_ENABLED(CONFIG_ENV_IS_IN_FAT) return ENVL_FAT; @@ -236,7 +236,7 @@ static int env_sf_load(void) ret = env_import((char *)ep, 0); if (!ret) { - error("Cannot import environment: errno = %d\n", errno); + pr_err("Cannot import environment: errno = %d\n", errno); set_default_env("!env_import failed"); } diff --git a/fs/Kconfig b/fs/Kconfig index e6803ac8cb..1cb9831be8 100644 --- a/fs/Kconfig +++ b/fs/Kconfig @@ -4,6 +4,8 @@ menu "File systems" +source "fs/btrfs/Kconfig" + source "fs/cbfs/Kconfig" source "fs/ext4/Kconfig" diff --git a/fs/Makefile b/fs/Makefile index 5770f41c0b..8a8175b7af 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_SPL_EXT_SUPPORT) += ext4/ else obj-y += fs.o +obj-$(CONFIG_FS_BTRFS) += btrfs/ obj-$(CONFIG_FS_CBFS) += cbfs/ obj-$(CONFIG_CMD_CRAMFS) += cramfs/ obj-$(CONFIG_FS_EXT4) += ext4/ @@ -23,3 +24,4 @@ obj-$(CONFIG_CMD_UBIFS) += ubifs/ obj-$(CONFIG_YAFFS2) += yaffs2/ obj-$(CONFIG_CMD_ZFS) += zfs/ endif +obj-y += fs_internal.o diff --git a/fs/btrfs/Kconfig b/fs/btrfs/Kconfig new file mode 100644 index 0000000000..22909d9fcc --- /dev/null +++ b/fs/btrfs/Kconfig @@ -0,0 +1,9 @@ +config FS_BTRFS + bool "Enable BTRFS filesystem support" + select CRC32C + select LZO + select RBTREE + help + This provides a single-device read-only BTRFS support. BTRFS is a + next-generation Linux file system based on the copy-on-write + principle. diff --git a/fs/btrfs/Makefile b/fs/btrfs/Makefile new file mode 100644 index 0000000000..01731557e6 --- /dev/null +++ b/fs/btrfs/Makefile @@ -0,0 +1,8 @@ +# +# 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := btrfs.o chunk-map.o compression.o ctree.o dev.o dir-item.o \ + extent-io.o hash.o inode.o root.o subvolume.o super.o diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c new file mode 100644 index 0000000000..4140e2bc20 --- /dev/null +++ b/fs/btrfs/btrfs.c @@ -0,0 +1,227 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" +#include <config.h> +#include <malloc.h> +#include <linux/time.h> + +struct btrfs_info btrfs_info; + +static int readdir_callback(const struct btrfs_root *root, + struct btrfs_dir_item *item) +{ + static const char typestr[BTRFS_FT_MAX][4] = { + [BTRFS_FT_UNKNOWN] = " ? ", + [BTRFS_FT_REG_FILE] = " ", + [BTRFS_FT_DIR] = "DIR", + [BTRFS_FT_CHRDEV] = "CHR", + [BTRFS_FT_BLKDEV] = "BLK", + [BTRFS_FT_FIFO] = "FIF", + [BTRFS_FT_SOCK] = "SCK", + [BTRFS_FT_SYMLINK] = "SYM", + [BTRFS_FT_XATTR] = " ? ", + }; + struct btrfs_inode_item inode; + const char *name = (const char *) (item + 1); + char filetime[32], *target = NULL; + time_t mtime; + + if (btrfs_lookup_inode(root, &item->location, &inode, NULL)) { + printf("%s: Cannot find inode item for directory entry %.*s!\n", + __func__, item->name_len, name); + return 0; + } + + mtime = inode.mtime.sec; + ctime_r(&mtime, filetime); + + if (item->type == BTRFS_FT_SYMLINK) { + target = malloc(min(inode.size + 1, + (u64) btrfs_info.sb.sectorsize)); + + if (target && btrfs_readlink(root, item->location.objectid, + target)) { + free(target); + target = NULL; + } + + if (!target) + printf("%s: Cannot read symlink target!\n", __func__); + } + + printf("<%s> ", typestr[item->type]); + if (item->type == BTRFS_FT_CHRDEV || item->type == BTRFS_FT_BLKDEV) + printf("%4u,%5u ", (unsigned int) (inode.rdev >> 20), + (unsigned int) (inode.rdev & 0xfffff)); + else + printf("%10llu ", inode.size); + + printf("%24.24s %.*s", filetime, item->name_len, name); + + if (item->type == BTRFS_FT_SYMLINK) { + printf(" -> %s", target ? target : "?"); + if (target) + free(target); + } + + printf("\n"); + + return 0; +} + +int btrfs_probe(struct blk_desc *fs_dev_desc, disk_partition_t *fs_partition) +{ + btrfs_blk_desc = fs_dev_desc; + btrfs_part_info = fs_partition; + + memset(&btrfs_info, 0, sizeof(btrfs_info)); + + btrfs_hash_init(); + if (btrfs_read_superblock()) + return -1; + + if (btrfs_chunk_map_init()) { + printf("%s: failed to init chunk map\n", __func__); + return -1; + } + + btrfs_info.tree_root.objectid = 0; + btrfs_info.tree_root.bytenr = btrfs_info.sb.root; + btrfs_info.chunk_root.objectid = 0; + btrfs_info.chunk_root.bytenr = btrfs_info.sb.chunk_root; + + if (btrfs_read_chunk_tree()) { + printf("%s: failed to read chunk tree\n", __func__); + return -1; + } + + if (btrfs_find_root(btrfs_get_default_subvol_objectid(), + &btrfs_info.fs_root, NULL)) { + printf("%s: failed to find default subvolume\n", __func__); + return -1; + } + + return 0; +} + +int btrfs_ls(const char *path) +{ + struct btrfs_root root = btrfs_info.fs_root; + u64 inr; + u8 type; + + inr = btrfs_lookup_path(&root, root.root_dirid, path, &type, NULL, 40); + + if (inr == -1ULL) { + printf("Cannot lookup path %s\n", path); + return 1; + } + + if (type != BTRFS_FT_DIR) { + printf("Not a directory: %s\n", path); + return 1; + } + + if (btrfs_readdir(&root, inr, readdir_callback)) { + printf("An error occured while listing directory %s\n", path); + return 1; + } + + return 0; +} + +int btrfs_exists(const char *file) +{ + struct btrfs_root root = btrfs_info.fs_root; + u64 inr; + u8 type; + + inr = btrfs_lookup_path(&root, root.root_dirid, file, &type, NULL, 40); + + return (inr != -1ULL && type == BTRFS_FT_REG_FILE); +} + +int btrfs_size(const char *file, loff_t *size) +{ + struct btrfs_root root = btrfs_info.fs_root; + struct btrfs_inode_item inode; + u64 inr; + u8 type; + + inr = btrfs_lookup_path(&root, root.root_dirid, file, &type, &inode, + 40); + + if (inr == -1ULL) { + printf("Cannot lookup file %s\n", file); + return 1; + } + + if (type != BTRFS_FT_REG_FILE) { + printf("Not a regular file: %s\n", file); + return 1; + } + + *size = inode.size; + return 0; +} + +int btrfs_read(const char *file, void *buf, loff_t offset, loff_t len, + loff_t *actread) +{ + struct btrfs_root root = btrfs_info.fs_root; + struct btrfs_inode_item inode; + u64 inr, rd; + u8 type; + + inr = btrfs_lookup_path(&root, root.root_dirid, file, &type, &inode, + 40); + + if (inr == -1ULL) { + printf("Cannot lookup file %s\n", file); + return 1; + } + + if (type != BTRFS_FT_REG_FILE) { + printf("Not a regular file: %s\n", file); + return 1; + } + + if (!len) + len = inode.size; + + if (len > inode.size - offset) + len = inode.size - offset; + + rd = btrfs_file_read(&root, inr, offset, len, buf); + if (rd == -1ULL) { + printf("An error occured while reading file %s\n", file); + return 1; + } + + *actread = rd; + return 0; +} + +void btrfs_close(void) +{ + btrfs_chunk_map_exit(); +} + +int btrfs_uuid(char *uuid_str) +{ +#ifdef CONFIG_LIB_UUID + uuid_bin_to_str(btrfs_info.sb.fsid, uuid_str, UUID_STR_FORMAT_STD); + return 0; +#endif + return -ENOSYS; +} + +/* + btrfs_list_subvols(); +*/ diff --git a/fs/btrfs/btrfs.h b/fs/btrfs/btrfs.h new file mode 100644 index 0000000000..4247cbbb09 --- /dev/null +++ b/fs/btrfs/btrfs.h @@ -0,0 +1,89 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BTRFS_BTRFS_H__ +#define __BTRFS_BTRFS_H__ + +#include <linux/rbtree.h> +#include "conv-funcs.h" + +struct btrfs_info { + struct btrfs_super_block sb; + struct btrfs_root_backup *root_backup; + + struct btrfs_root tree_root; + struct btrfs_root fs_root; + struct btrfs_root chunk_root; + + struct rb_root chunks_root; +}; + +extern struct btrfs_info btrfs_info; + +/* hash.c */ +void btrfs_hash_init(void); +u32 btrfs_crc32c(u32, const void *, size_t); +u32 btrfs_csum_data(char *, u32, size_t); +void btrfs_csum_final(u32, void *); + +static inline u64 btrfs_name_hash(const char *name, int len) +{ + return btrfs_crc32c((u32) ~1, name, len); +} + +/* dev.c */ +extern struct blk_desc *btrfs_blk_desc; +extern disk_partition_t *btrfs_part_info; + +int btrfs_devread(u64, int, void *); + +/* chunk-map.c */ +u64 btrfs_map_logical_to_physical(u64); +int btrfs_chunk_map_init(void); +void btrfs_chunk_map_exit(void); +int btrfs_read_chunk_tree(void); + +/* compression.c */ +u32 btrfs_decompress(u8 type, const char *, u32, char *, u32); + +/* super.c */ +int btrfs_read_superblock(void); + +/* dir-item.c */ +typedef int (*btrfs_readdir_callback_t)(const struct btrfs_root *, + struct btrfs_dir_item *); + +int btrfs_lookup_dir_item(const struct btrfs_root *, u64, const char *, int, + struct btrfs_dir_item *); +int btrfs_readdir(const struct btrfs_root *, u64, btrfs_readdir_callback_t); + +/* root.c */ +int btrfs_find_root(u64, struct btrfs_root *, struct btrfs_root_item *); +u64 btrfs_lookup_root_ref(u64, struct btrfs_root_ref *, char *); + +/* inode.c */ +u64 btrfs_lookup_inode_ref(struct btrfs_root *, u64, struct btrfs_inode_ref *, + char *); +int btrfs_lookup_inode(const struct btrfs_root *, struct btrfs_key *, + struct btrfs_inode_item *, struct btrfs_root *); +int btrfs_readlink(const struct btrfs_root *, u64, char *); +u64 btrfs_lookup_path(struct btrfs_root *, u64, const char *, u8 *, + struct btrfs_inode_item *, int); +u64 btrfs_file_read(const struct btrfs_root *, u64, u64, u64, char *); + +/* subvolume.c */ +u64 btrfs_get_default_subvol_objectid(void); + +/* extent-io.c */ +u64 btrfs_read_extent_inline(struct btrfs_path *, + struct btrfs_file_extent_item *, u64, u64, + char *); +u64 btrfs_read_extent_reg(struct btrfs_path *, struct btrfs_file_extent_item *, + u64, u64, char *); + +#endif /* !__BTRFS_BTRFS_H__ */ diff --git a/fs/btrfs/btrfs_tree.h b/fs/btrfs/btrfs_tree.h new file mode 100644 index 0000000000..f171b24288 --- /dev/null +++ b/fs/btrfs/btrfs_tree.h @@ -0,0 +1,766 @@ +/* + * From linux/include/uapi/linux/btrfs_tree.h + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BTRFS_BTRFS_TREE_H__ +#define __BTRFS_BTRFS_TREE_H__ + +#include <common.h> + +#define BTRFS_VOL_NAME_MAX 255 +#define BTRFS_NAME_MAX 255 +#define BTRFS_LABEL_SIZE 256 +#define BTRFS_FSID_SIZE 16 +#define BTRFS_UUID_SIZE 16 + +/* + * This header contains the structure definitions and constants used + * by file system objects that can be retrieved using + * the BTRFS_IOC_SEARCH_TREE ioctl. That means basically anything that + * is needed to describe a leaf node's key or item contents. + */ + +/* holds pointers to all of the tree roots */ +#define BTRFS_ROOT_TREE_OBJECTID 1ULL + +/* stores information about which extents are in use, and reference counts */ +#define BTRFS_EXTENT_TREE_OBJECTID 2ULL + +/* + * chunk tree stores translations from logical -> physical block numbering + * the super block points to the chunk tree + */ +#define BTRFS_CHUNK_TREE_OBJECTID 3ULL + +/* + * stores information about which areas of a given device are in use. + * one per device. The tree of tree roots points to the device tree + */ +#define BTRFS_DEV_TREE_OBJECTID 4ULL + +/* one per subvolume, storing files and directories */ +#define BTRFS_FS_TREE_OBJECTID 5ULL + +/* directory objectid inside the root tree */ +#define BTRFS_ROOT_TREE_DIR_OBJECTID 6ULL + +/* holds checksums of all the data extents */ +#define BTRFS_CSUM_TREE_OBJECTID 7ULL + +/* holds quota configuration and tracking */ +#define BTRFS_QUOTA_TREE_OBJECTID 8ULL + +/* for storing items that use the BTRFS_UUID_KEY* types */ +#define BTRFS_UUID_TREE_OBJECTID 9ULL + +/* tracks free space in block groups. */ +#define BTRFS_FREE_SPACE_TREE_OBJECTID 10ULL + +/* device stats in the device tree */ +#define BTRFS_DEV_STATS_OBJECTID 0ULL + +/* for storing balance parameters in the root tree */ +#define BTRFS_BALANCE_OBJECTID -4ULL + +/* orhpan objectid for tracking unlinked/truncated files */ +#define BTRFS_ORPHAN_OBJECTID -5ULL + +/* does write ahead logging to speed up fsyncs */ +#define BTRFS_TREE_LOG_OBJECTID -6ULL +#define BTRFS_TREE_LOG_FIXUP_OBJECTID -7ULL + +/* for space balancing */ +#define BTRFS_TREE_RELOC_OBJECTID -8ULL +#define BTRFS_DATA_RELOC_TREE_OBJECTID -9ULL + +/* + * extent checksums all have this objectid + * this allows them to share the logging tree + * for fsyncs + */ +#define BTRFS_EXTENT_CSUM_OBJECTID -10ULL + +/* For storing free space cache */ +#define BTRFS_FREE_SPACE_OBJECTID -11ULL + +/* + * The inode number assigned to the special inode for storing + * free ino cache + */ +#define BTRFS_FREE_INO_OBJECTID -12ULL + +/* dummy objectid represents multiple objectids */ +#define BTRFS_MULTIPLE_OBJECTIDS -255ULL + +/* + * All files have objectids in this range. + */ +#define BTRFS_FIRST_FREE_OBJECTID 256ULL +#define BTRFS_LAST_FREE_OBJECTID -256ULL +#define BTRFS_FIRST_CHUNK_TREE_OBJECTID 256ULL + + +/* + * the device items go into the chunk tree. The key is in the form + * [ 1 BTRFS_DEV_ITEM_KEY device_id ] + */ +#define BTRFS_DEV_ITEMS_OBJECTID 1ULL + +#define BTRFS_BTREE_INODE_OBJECTID 1 + +#define BTRFS_EMPTY_SUBVOL_DIR_OBJECTID 2 + +#define BTRFS_DEV_REPLACE_DEVID 0ULL + +/* + * inode items have the data typically returned from stat and store other + * info about object characteristics. There is one for every file and dir in + * the FS + */ +#define BTRFS_INODE_ITEM_KEY 1 +#define BTRFS_INODE_REF_KEY 12 +#define BTRFS_INODE_EXTREF_KEY 13 +#define BTRFS_XATTR_ITEM_KEY 24 +#define BTRFS_ORPHAN_ITEM_KEY 48 +/* reserve 2-15 close to the inode for later flexibility */ + +/* + * dir items are the name -> inode pointers in a directory. There is one + * for every name in a directory. + */ +#define BTRFS_DIR_LOG_ITEM_KEY 60 +#define BTRFS_DIR_LOG_INDEX_KEY 72 +#define BTRFS_DIR_ITEM_KEY 84 +#define BTRFS_DIR_INDEX_KEY 96 +/* + * extent data is for file data + */ +#define BTRFS_EXTENT_DATA_KEY 108 + +/* + * extent csums are stored in a separate tree and hold csums for + * an entire extent on disk. + */ +#define BTRFS_EXTENT_CSUM_KEY 128 + +/* + * root items point to tree roots. They are typically in the root + * tree used by the super block to find all the other trees + */ +#define BTRFS_ROOT_ITEM_KEY 132 + +/* + * root backrefs tie subvols and snapshots to the directory entries that + * reference them + */ +#define BTRFS_ROOT_BACKREF_KEY 144 + +/* + * root refs make a fast index for listing all of the snapshots and + * subvolumes referenced by a given root. They point directly to the + * directory item in the root that references the subvol + */ +#define BTRFS_ROOT_REF_KEY 156 + +/* + * extent items are in the extent map tree. These record which blocks + * are used, and how many references there are to each block + */ +#define BTRFS_EXTENT_ITEM_KEY 168 + +/* + * The same as the BTRFS_EXTENT_ITEM_KEY, except it's metadata we already know + * the length, so we save the level in key->offset instead of the length. + */ +#define BTRFS_METADATA_ITEM_KEY 169 + +#define BTRFS_TREE_BLOCK_REF_KEY 176 + +#define BTRFS_EXTENT_DATA_REF_KEY 178 + +#define BTRFS_EXTENT_REF_V0_KEY 180 + +#define BTRFS_SHARED_BLOCK_REF_KEY 182 + +#define BTRFS_SHARED_DATA_REF_KEY 184 + +/* + * block groups give us hints into the extent allocation trees. Which + * blocks are free etc etc + */ +#define BTRFS_BLOCK_GROUP_ITEM_KEY 192 + +/* + * Every block group is represented in the free space tree by a free space info + * item, which stores some accounting information. It is keyed on + * (block_group_start, FREE_SPACE_INFO, block_group_length). + */ +#define BTRFS_FREE_SPACE_INFO_KEY 198 + +/* + * A free space extent tracks an extent of space that is free in a block group. + * It is keyed on (start, FREE_SPACE_EXTENT, length). + */ +#define BTRFS_FREE_SPACE_EXTENT_KEY 199 + +/* + * When a block group becomes very fragmented, we convert it to use bitmaps + * instead of extents. A free space bitmap is keyed on + * (start, FREE_SPACE_BITMAP, length); the corresponding item is a bitmap with + * (length / sectorsize) bits. + */ +#define BTRFS_FREE_SPACE_BITMAP_KEY 200 + +#define BTRFS_DEV_EXTENT_KEY 204 +#define BTRFS_DEV_ITEM_KEY 216 +#define BTRFS_CHUNK_ITEM_KEY 228 + +/* + * Records the overall state of the qgroups. + * There's only one instance of this key present, + * (0, BTRFS_QGROUP_STATUS_KEY, 0) + */ +#define BTRFS_QGROUP_STATUS_KEY 240 +/* + * Records the currently used space of the qgroup. + * One key per qgroup, (0, BTRFS_QGROUP_INFO_KEY, qgroupid). + */ +#define BTRFS_QGROUP_INFO_KEY 242 +/* + * Contains the user configured limits for the qgroup. + * One key per qgroup, (0, BTRFS_QGROUP_LIMIT_KEY, qgroupid). + */ +#define BTRFS_QGROUP_LIMIT_KEY 244 +/* + * Records the child-parent relationship of qgroups. For + * each relation, 2 keys are present: + * (childid, BTRFS_QGROUP_RELATION_KEY, parentid) + * (parentid, BTRFS_QGROUP_RELATION_KEY, childid) + */ +#define BTRFS_QGROUP_RELATION_KEY 246 + +/* + * Obsolete name, see BTRFS_TEMPORARY_ITEM_KEY. + */ +#define BTRFS_BALANCE_ITEM_KEY 248 + +/* + * The key type for tree items that are stored persistently, but do not need to + * exist for extended period of time. The items can exist in any tree. + * + * [subtype, BTRFS_TEMPORARY_ITEM_KEY, data] + * + * Existing items: + * + * - balance status item + * (BTRFS_BALANCE_OBJECTID, BTRFS_TEMPORARY_ITEM_KEY, 0) + */ +#define BTRFS_TEMPORARY_ITEM_KEY 248 + +/* + * Obsolete name, see BTRFS_PERSISTENT_ITEM_KEY + */ +#define BTRFS_DEV_STATS_KEY 249 + +/* + * The key type for tree items that are stored persistently and usually exist + * for a long period, eg. filesystem lifetime. The item kinds can be status + * information, stats or preference values. The item can exist in any tree. + * + * [subtype, BTRFS_PERSISTENT_ITEM_KEY, data] + * + * Existing items: + * + * - device statistics, store IO stats in the device tree, one key for all + * stats + * (BTRFS_DEV_STATS_OBJECTID, BTRFS_DEV_STATS_KEY, 0) + */ +#define BTRFS_PERSISTENT_ITEM_KEY 249 + +/* + * Persistantly stores the device replace state in the device tree. + * The key is built like this: (0, BTRFS_DEV_REPLACE_KEY, 0). + */ +#define BTRFS_DEV_REPLACE_KEY 250 + +/* + * Stores items that allow to quickly map UUIDs to something else. + * These items are part of the filesystem UUID tree. + * The key is built like this: + * (UUID_upper_64_bits, BTRFS_UUID_KEY*, UUID_lower_64_bits). + */ +#if BTRFS_UUID_SIZE != 16 +#error "UUID items require BTRFS_UUID_SIZE == 16!" +#endif +#define BTRFS_UUID_KEY_SUBVOL 251 /* for UUIDs assigned to subvols */ +#define BTRFS_UUID_KEY_RECEIVED_SUBVOL 252 /* for UUIDs assigned to + * received subvols */ + +/* + * string items are for debugging. They just store a short string of + * data in the FS + */ +#define BTRFS_STRING_ITEM_KEY 253 + + + +/* 32 bytes in various csum fields */ +#define BTRFS_CSUM_SIZE 32 + +/* csum types */ +#define BTRFS_CSUM_TYPE_CRC32 0 + +/* + * flags definitions for directory entry item type + * + * Used by: + * struct btrfs_dir_item.type + */ +#define BTRFS_FT_UNKNOWN 0 +#define BTRFS_FT_REG_FILE 1 +#define BTRFS_FT_DIR 2 +#define BTRFS_FT_CHRDEV 3 +#define BTRFS_FT_BLKDEV 4 +#define BTRFS_FT_FIFO 5 +#define BTRFS_FT_SOCK 6 +#define BTRFS_FT_SYMLINK 7 +#define BTRFS_FT_XATTR 8 +#define BTRFS_FT_MAX 9 + +/* + * The key defines the order in the tree, and so it also defines (optimal) + * block layout. + * + * objectid corresponds to the inode number. + * + * type tells us things about the object, and is a kind of stream selector. + * so for a given inode, keys with type of 1 might refer to the inode data, + * type of 2 may point to file data in the btree and type == 3 may point to + * extents. + * + * offset is the starting byte offset for this key in the stream. + */ + +struct btrfs_key { + __u64 objectid; + __u8 type; + __u64 offset; +} __attribute__ ((__packed__)); + +struct btrfs_dev_item { + /* the internal btrfs device id */ + __u64 devid; + + /* size of the device */ + __u64 total_bytes; + + /* bytes used */ + __u64 bytes_used; + + /* optimal io alignment for this device */ + __u32 io_align; + + /* optimal io width for this device */ + __u32 io_width; + + /* minimal io size for this device */ + __u32 sector_size; + + /* type and info about this device */ + __u64 type; + + /* expected generation for this device */ + __u64 generation; + + /* + * starting byte of this partition on the device, + * to allow for stripe alignment in the future + */ + __u64 start_offset; + + /* grouping information for allocation decisions */ + __u32 dev_group; + + /* seek speed 0-100 where 100 is fastest */ + __u8 seek_speed; + + /* bandwidth 0-100 where 100 is fastest */ + __u8 bandwidth; + + /* btrfs generated uuid for this device */ + __u8 uuid[BTRFS_UUID_SIZE]; + + /* uuid of FS who owns this device */ + __u8 fsid[BTRFS_UUID_SIZE]; +} __attribute__ ((__packed__)); + +struct btrfs_stripe { + __u64 devid; + __u64 offset; + __u8 dev_uuid[BTRFS_UUID_SIZE]; +} __attribute__ ((__packed__)); + +struct btrfs_chunk { + /* size of this chunk in bytes */ + __u64 length; + + /* objectid of the root referencing this chunk */ + __u64 owner; + + __u64 stripe_len; + __u64 type; + + /* optimal io alignment for this chunk */ + __u32 io_align; + + /* optimal io width for this chunk */ + __u32 io_width; + + /* minimal io size for this chunk */ + __u32 sector_size; + + /* 2^16 stripes is quite a lot, a second limit is the size of a single + * item in the btree + */ + __u16 num_stripes; + + /* sub stripes only matter for raid10 */ + __u16 sub_stripes; + struct btrfs_stripe stripe; + /* additional stripes go here */ +} __attribute__ ((__packed__)); + +#define BTRFS_FREE_SPACE_EXTENT 1 +#define BTRFS_FREE_SPACE_BITMAP 2 + +struct btrfs_free_space_entry { + __u64 offset; + __u64 bytes; + __u8 type; +} __attribute__ ((__packed__)); + +struct btrfs_free_space_header { + struct btrfs_key location; + __u64 generation; + __u64 num_entries; + __u64 num_bitmaps; +} __attribute__ ((__packed__)); + +#define BTRFS_HEADER_FLAG_WRITTEN (1ULL << 0) +#define BTRFS_HEADER_FLAG_RELOC (1ULL << 1) + +/* Super block flags */ +/* Errors detected */ +#define BTRFS_SUPER_FLAG_ERROR (1ULL << 2) + +#define BTRFS_SUPER_FLAG_SEEDING (1ULL << 32) +#define BTRFS_SUPER_FLAG_METADUMP (1ULL << 33) + + +/* + * items in the extent btree are used to record the objectid of the + * owner of the block and the number of references + */ + +struct btrfs_extent_item { + __u64 refs; + __u64 generation; + __u64 flags; +} __attribute__ ((__packed__)); + + +#define BTRFS_EXTENT_FLAG_DATA (1ULL << 0) +#define BTRFS_EXTENT_FLAG_TREE_BLOCK (1ULL << 1) + +/* following flags only apply to tree blocks */ + +/* use full backrefs for extent pointers in the block */ +#define BTRFS_BLOCK_FLAG_FULL_BACKREF (1ULL << 8) + +/* + * this flag is only used internally by scrub and may be changed at any time + * it is only declared here to avoid collisions + */ +#define BTRFS_EXTENT_FLAG_SUPER (1ULL << 48) + +struct btrfs_tree_block_info { + struct btrfs_key key; + __u8 level; +} __attribute__ ((__packed__)); + +struct btrfs_extent_data_ref { + __u64 root; + __u64 objectid; + __u64 offset; + __u32 count; +} __attribute__ ((__packed__)); + +struct btrfs_shared_data_ref { + __u32 count; +} __attribute__ ((__packed__)); + +struct btrfs_extent_inline_ref { + __u8 type; + __u64 offset; +} __attribute__ ((__packed__)); + +/* dev extents record free space on individual devices. The owner + * field points back to the chunk allocation mapping tree that allocated + * the extent. The chunk tree uuid field is a way to double check the owner + */ +struct btrfs_dev_extent { + __u64 chunk_tree; + __u64 chunk_objectid; + __u64 chunk_offset; + __u64 length; + __u8 chunk_tree_uuid[BTRFS_UUID_SIZE]; +} __attribute__ ((__packed__)); + +struct btrfs_inode_ref { + __u64 index; + __u16 name_len; + /* name goes here */ +} __attribute__ ((__packed__)); + +struct btrfs_inode_extref { + __u64 parent_objectid; + __u64 index; + __u16 name_len; + __u8 name[0]; + /* name goes here */ +} __attribute__ ((__packed__)); + +struct btrfs_timespec { + __u64 sec; + __u32 nsec; +} __attribute__ ((__packed__)); + +struct btrfs_inode_item { + /* nfs style generation number */ + __u64 generation; + /* transid that last touched this inode */ + __u64 transid; + __u64 size; + __u64 nbytes; + __u64 block_group; + __u32 nlink; + __u32 uid; + __u32 gid; + __u32 mode; + __u64 rdev; + __u64 flags; + + /* modification sequence number for NFS */ + __u64 sequence; + + /* + * a little future expansion, for more than this we can + * just grow the inode item and version it + */ + __u64 reserved[4]; + struct btrfs_timespec atime; + struct btrfs_timespec ctime; + struct btrfs_timespec mtime; + struct btrfs_timespec otime; +} __attribute__ ((__packed__)); + +struct btrfs_dir_log_item { + __u64 end; +} __attribute__ ((__packed__)); + +struct btrfs_dir_item { + struct btrfs_key location; + __u64 transid; + __u16 data_len; + __u16 name_len; + __u8 type; +} __attribute__ ((__packed__)); + +#define BTRFS_ROOT_SUBVOL_RDONLY (1ULL << 0) + +/* + * Internal in-memory flag that a subvolume has been marked for deletion but + * still visible as a directory + */ +#define BTRFS_ROOT_SUBVOL_DEAD (1ULL << 48) + +struct btrfs_root_item { + struct btrfs_inode_item inode; + __u64 generation; + __u64 root_dirid; + __u64 bytenr; + __u64 byte_limit; + __u64 bytes_used; + __u64 last_snapshot; + __u64 flags; + __u32 refs; + struct btrfs_key drop_progress; + __u8 drop_level; + __u8 level; + + /* + * The following fields appear after subvol_uuids+subvol_times + * were introduced. + */ + + /* + * This generation number is used to test if the new fields are valid + * and up to date while reading the root item. Every time the root item + * is written out, the "generation" field is copied into this field. If + * anyone ever mounted the fs with an older kernel, we will have + * mismatching generation values here and thus must invalidate the + * new fields. See btrfs_update_root and btrfs_find_last_root for + * details. + * the offset of generation_v2 is also used as the start for the memset + * when invalidating the fields. + */ + __u64 generation_v2; + __u8 uuid[BTRFS_UUID_SIZE]; + __u8 parent_uuid[BTRFS_UUID_SIZE]; + __u8 received_uuid[BTRFS_UUID_SIZE]; + __u64 ctransid; /* updated when an inode changes */ + __u64 otransid; /* trans when created */ + __u64 stransid; /* trans when sent. non-zero for received subvol */ + __u64 rtransid; /* trans when received. non-zero for received subvol */ + struct btrfs_timespec ctime; + struct btrfs_timespec otime; + struct btrfs_timespec stime; + struct btrfs_timespec rtime; + __u64 reserved[8]; /* for future */ +} __attribute__ ((__packed__)); + +/* + * this is used for both forward and backward root refs + */ +struct btrfs_root_ref { + __u64 dirid; + __u64 sequence; + __u16 name_len; +} __attribute__ ((__packed__)); + +#define BTRFS_FILE_EXTENT_INLINE 0 +#define BTRFS_FILE_EXTENT_REG 1 +#define BTRFS_FILE_EXTENT_PREALLOC 2 + +enum btrfs_compression_type { + BTRFS_COMPRESS_NONE = 0, + BTRFS_COMPRESS_ZLIB = 1, + BTRFS_COMPRESS_LZO = 2, + BTRFS_COMPRESS_TYPES = 2, + BTRFS_COMPRESS_LAST = 3, +}; + +struct btrfs_file_extent_item { + /* + * transaction id that created this extent + */ + __u64 generation; + /* + * max number of bytes to hold this extent in ram + * when we split a compressed extent we can't know how big + * each of the resulting pieces will be. So, this is + * an upper limit on the size of the extent in ram instead of + * an exact limit. + */ + __u64 ram_bytes; + + /* + * 32 bits for the various ways we might encode the data, + * including compression and encryption. If any of these + * are set to something a given disk format doesn't understand + * it is treated like an incompat flag for reading and writing, + * but not for stat. + */ + __u8 compression; + __u8 encryption; + __u16 other_encoding; /* spare for later use */ + + /* are we inline data or a real extent? */ + __u8 type; + + /* + * disk space consumed by the extent, checksum blocks are included + * in these numbers + * + * At this offset in the structure, the inline extent data start. + */ + __u64 disk_bytenr; + __u64 disk_num_bytes; + /* + * the logical offset in file blocks (no csums) + * this extent record is for. This allows a file extent to point + * into the middle of an existing extent on disk, sharing it + * between two snapshots (useful if some bytes in the middle of the + * extent have changed + */ + __u64 offset; + /* + * the logical number of file blocks (no csums included). This + * always reflects the size uncompressed and without encoding. + */ + __u64 num_bytes; + +} __attribute__ ((__packed__)); + +struct btrfs_csum_item { + __u8 csum; +} __attribute__ ((__packed__)); + +/* different types of block groups (and chunks) */ +#define BTRFS_BLOCK_GROUP_DATA (1ULL << 0) +#define BTRFS_BLOCK_GROUP_SYSTEM (1ULL << 1) +#define BTRFS_BLOCK_GROUP_METADATA (1ULL << 2) +#define BTRFS_BLOCK_GROUP_RAID0 (1ULL << 3) +#define BTRFS_BLOCK_GROUP_RAID1 (1ULL << 4) +#define BTRFS_BLOCK_GROUP_DUP (1ULL << 5) +#define BTRFS_BLOCK_GROUP_RAID10 (1ULL << 6) +#define BTRFS_BLOCK_GROUP_RAID5 (1ULL << 7) +#define BTRFS_BLOCK_GROUP_RAID6 (1ULL << 8) +#define BTRFS_BLOCK_GROUP_RESERVED (BTRFS_AVAIL_ALLOC_BIT_SINGLE | \ + BTRFS_SPACE_INFO_GLOBAL_RSV) + +enum btrfs_raid_types { + BTRFS_RAID_RAID10, + BTRFS_RAID_RAID1, + BTRFS_RAID_DUP, + BTRFS_RAID_RAID0, + BTRFS_RAID_SINGLE, + BTRFS_RAID_RAID5, + BTRFS_RAID_RAID6, + BTRFS_NR_RAID_TYPES +}; + +#define BTRFS_BLOCK_GROUP_TYPE_MASK (BTRFS_BLOCK_GROUP_DATA | \ + BTRFS_BLOCK_GROUP_SYSTEM | \ + BTRFS_BLOCK_GROUP_METADATA) + +#define BTRFS_BLOCK_GROUP_PROFILE_MASK (BTRFS_BLOCK_GROUP_RAID0 | \ + BTRFS_BLOCK_GROUP_RAID1 | \ + BTRFS_BLOCK_GROUP_RAID5 | \ + BTRFS_BLOCK_GROUP_RAID6 | \ + BTRFS_BLOCK_GROUP_DUP | \ + BTRFS_BLOCK_GROUP_RAID10) +#define BTRFS_BLOCK_GROUP_RAID56_MASK (BTRFS_BLOCK_GROUP_RAID5 | \ + BTRFS_BLOCK_GROUP_RAID6) + +/* + * We need a bit for restriper to be able to tell when chunks of type + * SINGLE are available. This "extended" profile format is used in + * fs_info->avail_*_alloc_bits (in-memory) and balance item fields + * (on-disk). The corresponding on-disk bit in chunk.type is reserved + * to avoid remappings between two formats in future. + */ +#define BTRFS_AVAIL_ALLOC_BIT_SINGLE (1ULL << 48) + +/* + * A fake block group type that is used to communicate global block reserve + * size to userspace via the SPACE_INFO ioctl. + */ +#define BTRFS_SPACE_INFO_GLOBAL_RSV (1ULL << 49) + +#define BTRFS_EXTENDED_PROFILE_MASK (BTRFS_BLOCK_GROUP_PROFILE_MASK | \ + BTRFS_AVAIL_ALLOC_BIT_SINGLE) + +#endif /* __BTRFS_BTRFS_TREE_H__ */ diff --git a/fs/btrfs/chunk-map.c b/fs/btrfs/chunk-map.c new file mode 100644 index 0000000000..ce7330b1b7 --- /dev/null +++ b/fs/btrfs/chunk-map.c @@ -0,0 +1,178 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" +#include <malloc.h> + +struct chunk_map_item { + struct rb_node node; + u64 logical; + u64 length; + u64 physical; +}; + +static int add_chunk_mapping(struct btrfs_key *key, struct btrfs_chunk *chunk) +{ + struct btrfs_stripe *stripe; + u64 block_profile = chunk->type & BTRFS_BLOCK_GROUP_PROFILE_MASK; + struct rb_node **new = &(btrfs_info.chunks_root.rb_node), *prnt = NULL; + struct chunk_map_item *map_item; + + if (block_profile && block_profile != BTRFS_BLOCK_GROUP_DUP) { + printf("%s: unsupported chunk profile %llu\n", __func__, + block_profile); + return -1; + } else if (!chunk->length) { + printf("%s: zero length chunk\n", __func__); + return -1; + } + + stripe = &chunk->stripe; + btrfs_stripe_to_cpu(stripe); + + while (*new) { + struct chunk_map_item *this; + + this = rb_entry(*new, struct chunk_map_item, node); + + prnt = *new; + if (key->offset < this->logical) { + new = &((*new)->rb_left); + } else if (key->offset > this->logical) { + new = &((*new)->rb_right); + } else { + debug("%s: Logical address %llu already in map!\n", + __func__, key->offset); + return 0; + } + } + + map_item = malloc(sizeof(struct chunk_map_item)); + if (!map_item) + return -1; + + map_item->logical = key->offset; + map_item->length = chunk->length; + map_item->physical = le64_to_cpu(chunk->stripe.offset); + rb_link_node(&map_item->node, prnt, new); + rb_insert_color(&map_item->node, &btrfs_info.chunks_root); + + debug("%s: Mapping %llu to %llu\n", __func__, map_item->logical, + map_item->physical); + + return 0; +} + +u64 btrfs_map_logical_to_physical(u64 logical) +{ + struct rb_node *node = btrfs_info.chunks_root.rb_node; + + while (node) { + struct chunk_map_item *item; + + item = rb_entry(node, struct chunk_map_item, node); + + if (item->logical > logical) + node = node->rb_left; + else if (logical > item->logical + item->length) + node = node->rb_right; + else + return item->physical + logical - item->logical; + } + + printf("%s: Cannot map logical address %llu to physical\n", __func__, + logical); + + return -1ULL; +} + +void btrfs_chunk_map_exit(void) +{ + struct rb_node *now, *next; + struct chunk_map_item *item; + + for (now = rb_first_postorder(&btrfs_info.chunks_root); now; now = next) + { + item = rb_entry(now, struct chunk_map_item, node); + next = rb_next_postorder(now); + free(item); + } +} + +int btrfs_chunk_map_init(void) +{ + u8 sys_chunk_array_copy[sizeof(btrfs_info.sb.sys_chunk_array)]; + u8 * const start = sys_chunk_array_copy; + u8 * const end = start + btrfs_info.sb.sys_chunk_array_size; + u8 *cur; + struct btrfs_key *key; + struct btrfs_chunk *chunk; + + btrfs_info.chunks_root = RB_ROOT; + + memcpy(sys_chunk_array_copy, btrfs_info.sb.sys_chunk_array, + sizeof(sys_chunk_array_copy)); + + for (cur = start; cur < end;) { + key = (struct btrfs_key *) cur; + cur += sizeof(struct btrfs_key); + chunk = (struct btrfs_chunk *) cur; + + btrfs_key_to_cpu(key); + btrfs_chunk_to_cpu(chunk); + + if (key->type != BTRFS_CHUNK_ITEM_KEY) { + printf("%s: invalid key type %u\n", __func__, + key->type); + return -1; + } + + if (add_chunk_mapping(key, chunk)) + return -1; + + cur += sizeof(struct btrfs_chunk); + cur += sizeof(struct btrfs_stripe) * (chunk->num_stripes - 1); + } + + return 0; +} + +int btrfs_read_chunk_tree(void) +{ + struct btrfs_path path; + struct btrfs_key key, *found_key; + struct btrfs_chunk *chunk; + int res = 0; + + key.objectid = BTRFS_FIRST_CHUNK_TREE_OBJECTID; + key.type = BTRFS_CHUNK_ITEM_KEY; + key.offset = 0; + + if (btrfs_search_tree(&btrfs_info.chunk_root, &key, &path)) + return -1; + + do { + found_key = btrfs_path_leaf_key(&path); + if (btrfs_comp_keys_type(&key, found_key)) + break; + + chunk = btrfs_path_item_ptr(&path, struct btrfs_chunk); + btrfs_chunk_to_cpu(chunk); + if (add_chunk_mapping(found_key, chunk)) { + res = -1; + break; + } + } while (!(res = btrfs_next_slot(&path))); + + btrfs_free_path(&path); + + if (res < 0) + return -1; + + return 0; +} diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c new file mode 100644 index 0000000000..a59ff5a8bb --- /dev/null +++ b/fs/btrfs/compression.c @@ -0,0 +1,134 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" +#include <linux/lzo.h> +#include <u-boot/zlib.h> + +static u32 decompress_lzo(const u8 *cbuf, u32 clen, u8 *dbuf, u32 dlen) +{ + u32 tot_len, in_len, res; + size_t out_len; + int ret; + + if (clen < 4) + return -1; + + tot_len = le32_to_cpu(*(u32 *) cbuf); + cbuf += 4; + clen -= 4; + tot_len -= 4; + + if (tot_len == 0 && dlen) + return -1; + if (tot_len < 4) + return -1; + + res = 0; + + while (tot_len > 4) { + in_len = le32_to_cpu(*(u32 *) cbuf); + cbuf += 4; + clen -= 4; + + if (in_len > clen || tot_len < 4 + in_len) + return -1; + + tot_len -= 4 + in_len; + + out_len = dlen; + ret = lzo1x_decompress_safe(cbuf, in_len, dbuf, &out_len); + if (ret != LZO_E_OK) + return -1; + + cbuf += in_len; + clen -= in_len; + dbuf += out_len; + dlen -= out_len; + + res += out_len; + } + + return res; +} + +/* from zutil.h */ +#define PRESET_DICT 0x20 + +static u32 decompress_zlib(const u8 *_cbuf, u32 clen, u8 *dbuf, u32 dlen) +{ + int wbits = MAX_WBITS, ret = -1; + z_stream stream; + u8 *cbuf; + u32 res; + + memset(&stream, 0, sizeof(stream)); + + cbuf = (u8 *) _cbuf; + + stream.total_in = 0; + + stream.next_out = dbuf; + stream.avail_out = dlen; + stream.total_out = 0; + + /* skip adler32 check if deflate and no dictionary */ + if (clen > 2 && !(cbuf[1] & PRESET_DICT) && + ((cbuf[0] & 0x0f) == Z_DEFLATED) && + !(((cbuf[0] << 8) + cbuf[1]) % 31)) { + wbits = -((cbuf[0] >> 4) + 8); + cbuf += 2; + clen -= 2; + } + + if (Z_OK != inflateInit2(&stream, wbits)) + return -1; + + while (stream.total_in < clen) { + stream.next_in = cbuf + stream.total_in; + stream.avail_in = min((u32) (clen - stream.total_in), + (u32) btrfs_info.sb.sectorsize); + + ret = inflate(&stream, Z_NO_FLUSH); + if (ret != Z_OK) + break; + } + + res = stream.total_out; + inflateEnd(&stream); + + if (ret != Z_STREAM_END) + return -1; + + return res; +} + +u32 btrfs_decompress(u8 type, const char *c, u32 clen, char *d, u32 dlen) +{ + u32 res; + const u8 *cbuf; + u8 *dbuf; + + cbuf = (const u8 *) c; + dbuf = (u8 *) d; + + switch (type) { + case BTRFS_COMPRESS_NONE: + res = dlen < clen ? dlen : clen; + memcpy(dbuf, cbuf, res); + return res; + case BTRFS_COMPRESS_ZLIB: + return decompress_zlib(cbuf, clen, dbuf, dlen); + case BTRFS_COMPRESS_LZO: + return decompress_lzo(cbuf, clen, dbuf, dlen); + default: + printf("%s: Unsupported compression in extent: %i\n", __func__, + type); + return -1; + } +} diff --git a/fs/btrfs/conv-funcs.h b/fs/btrfs/conv-funcs.h new file mode 100644 index 0000000000..f2e7944e4e --- /dev/null +++ b/fs/btrfs/conv-funcs.h @@ -0,0 +1,176 @@ +/* + * Functions to convert BTRFS structures from disk to CPU endianness and back. + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BTRFS_CONV_FUNCS_H__ +#define __BTRFS_CONV_FUNCS_H__ + +#include "ctree.h" +#include <u-boot/variadic-macro.h> +#include <asm/byteorder.h> + +/* We are using variadic macros and C11 _Generic to achieve compact code. + + We want to define macro DEFINE_CONV(x, ...), where the first argument is the + name of the structure for which it shall define conversion functions (the + names of the functions shall be x_to_cpu and x_to_disk), and the other + arguments are names of the members on which the functions shall do + endianness conversion. */ + +#if defined(__LITTLE_ENDIAN) + +/* If the target machine is little endian, the conversion functions do + nothing, since the on disk format is little endian. */ + +# define DEFINE_CONV(n,...) \ + static inline struct n *n##_to_disk(struct n * r) \ + { \ + return r; \ + } \ + static inline struct n *n##_to_cpu(struct n * r) \ + { \ + return r; \ + } + +# define DEFINE_CONV_ALT(n,a,...) \ + static inline struct n *n##_to_disk_##a(struct n * r) \ + { \ + return r; \ + } \ + static inline struct n *n##_to_cpu_##a(struct n * r) \ + { \ + return r; \ + } + +#else /* !defined(__LITTLE_ENDIAN) */ + +/* Some structures contain not only scalar members, but compound types as well + (for example, struct btrfs_inode_item contains members of type struct + btrfs_timespec. + + For these members we want to call the conversion function recursively, so + first we declare the functions taking pointers to this types (these function + will be defined later by the DEFINE_CONV macro) and then we define + correspond functions taking non-pointers, so that they can be used in the + expansion of the _Generic. */ +# define DEFINE_CONV_FOR_STRUCT(n) \ + static inline struct n * n##_to_disk(struct n *); \ + static inline struct n * n##_to_cpu(struct n *); \ + static inline struct n n##_to_disk_v(struct n x) { \ + return *n##_to_disk(&x); \ + } \ + static inline struct n n##_to_cpu_v(struct n x) { \ + return *n##_to_cpu(&x); \ + } + +DEFINE_CONV_FOR_STRUCT(btrfs_key) +DEFINE_CONV_FOR_STRUCT(btrfs_stripe) +DEFINE_CONV_FOR_STRUCT(btrfs_timespec) +DEFINE_CONV_FOR_STRUCT(btrfs_inode_item) +DEFINE_CONV_FOR_STRUCT(btrfs_root_backup) +DEFINE_CONV_FOR_STRUCT(btrfs_dev_item) + +/* Now define the _Generic for both CPU to LE and LE to CPU */ +# define DEFINE_CONV_CPU_TO_LE(x) \ + (d->x) = _Generic((d->x), \ + __u16: cpu_to_le16, \ + __u32: cpu_to_le32, \ + __u64: cpu_to_le64, \ + struct btrfs_key: btrfs_key_to_disk_v, \ + struct btrfs_stripe: btrfs_stripe_to_disk_v, \ + struct btrfs_timespec: btrfs_timespec_to_disk_v, \ + struct btrfs_inode_item: btrfs_inode_item_to_disk_v, \ + struct btrfs_root_backup: btrfs_root_backup_to_disk_v, \ + struct btrfs_dev_item: btrfs_dev_item_to_disk_v \ + )((d->x)); + +# define DEFINE_CONV_LE_TO_CPU(x) \ + (d->x) = _Generic((d->x), \ + __u16: le16_to_cpu, \ + __u32: le32_to_cpu, \ + __u64: le64_to_cpu, \ + struct btrfs_key: btrfs_key_to_cpu_v, \ + struct btrfs_stripe: btrfs_stripe_to_cpu_v, \ + struct btrfs_timespec: btrfs_timespec_to_cpu_v, \ + struct btrfs_inode_item: btrfs_inode_item_to_cpu_v, \ + struct btrfs_root_backup: btrfs_root_backup_to_cpu_v, \ + struct btrfs_dev_item: btrfs_dev_item_to_cpu_v \ + )((d->x)); + +# define DEFINE_CONV_ONE(t,n,m,...) \ + static inline struct t * n(struct t * d) { \ + CALL_MACRO_FOR_EACH(m, ##__VA_ARGS__) \ + return d; \ + } + +/* Finally define the DEFINE_CONV macro */ +# define DEFINE_CONV(n,...) \ + DEFINE_CONV_ONE(n,n##_to_disk,DEFINE_CONV_CPU_TO_LE,##__VA_ARGS__) \ + DEFINE_CONV_ONE(n,n##_to_cpu,DEFINE_CONV_LE_TO_CPU,##__VA_ARGS__) + +# define DEFINE_CONV_ALT(n,a,...) \ + DEFINE_CONV_ONE(n,n##_to_disk_##a,DEFINE_CONV_CPU_TO_LE, \ + ##__VA_ARGS__) \ + DEFINE_CONV_ONE(n,n##_to_cpu_##a,DEFINE_CONV_LE_TO_CPU,##__VA_ARGS__) + +#endif /* !defined(__LITTLE_ENDIAN) */ + +DEFINE_CONV(btrfs_key, objectid, offset) +DEFINE_CONV(btrfs_dev_item, devid, total_bytes, bytes_used, io_align, io_width, + sector_size, type, generation, start_offset, dev_group) +DEFINE_CONV(btrfs_stripe, devid, offset) +DEFINE_CONV(btrfs_chunk, length, owner, stripe_len, type, io_align, io_width, + sector_size, num_stripes, sub_stripes) +DEFINE_CONV(btrfs_free_space_entry, offset, bytes) +DEFINE_CONV(btrfs_free_space_header, location, generation, num_entries, + num_bitmaps) +DEFINE_CONV(btrfs_extent_item, refs, generation, flags) +DEFINE_CONV(btrfs_tree_block_info, key) +DEFINE_CONV(btrfs_extent_data_ref, root, objectid, offset, count) +DEFINE_CONV(btrfs_shared_data_ref, count) +DEFINE_CONV(btrfs_extent_inline_ref, offset) +DEFINE_CONV(btrfs_dev_extent, chunk_tree, chunk_objectid, chunk_offset, length) +DEFINE_CONV(btrfs_inode_ref, index, name_len) +DEFINE_CONV(btrfs_inode_extref, parent_objectid, index, name_len) +DEFINE_CONV(btrfs_timespec, sec, nsec) +DEFINE_CONV(btrfs_inode_item, generation, transid, size, nbytes, block_group, + nlink, uid, gid, mode, rdev, flags, sequence, atime, ctime, mtime, + otime) +DEFINE_CONV(btrfs_dir_log_item, end) +DEFINE_CONV(btrfs_dir_item, location, transid, data_len, name_len) +DEFINE_CONV(btrfs_root_item, inode, generation, root_dirid, bytenr, byte_limit, + bytes_used, last_snapshot, flags, refs, drop_progress, + generation_v2, ctransid, otransid, stransid, rtransid, ctime, + otime, stime, rtime) +DEFINE_CONV(btrfs_root_ref, dirid, sequence, name_len) +DEFINE_CONV(btrfs_file_extent_item, generation, ram_bytes, other_encoding, + disk_bytenr, disk_num_bytes, offset, num_bytes) +DEFINE_CONV_ALT(btrfs_file_extent_item, inl, generation, ram_bytes, + other_encoding) +DEFINE_CONV(btrfs_dev_replace_item, src_devid, cursor_left, cursor_right, + cont_reading_from_srcdev_mode, replace_state, time_started, + time_stopped, num_write_errors, num_uncorrectable_read_errors) +DEFINE_CONV(btrfs_block_group_item, used, chunk_objectid, flags) +DEFINE_CONV(btrfs_free_space_info, extent_count, flags) + +DEFINE_CONV(btrfs_header, bytenr, flags, generation, owner, nritems) +DEFINE_CONV(btrfs_root_backup, tree_root, tree_root_gen, chunk_root, + chunk_root_gen, extent_root, extent_root_gen, fs_root, fs_root_gen, + dev_root, dev_root_gen, csum_root, csum_root_gen, total_bytes, + bytes_used, num_devices) +DEFINE_CONV(btrfs_super_block, bytenr, flags, magic, generation, root, + chunk_root, log_root, log_root_transid, total_bytes, bytes_used, + root_dir_objectid, num_devices, sectorsize, nodesize, + __unused_leafsize, stripesize, sys_chunk_array_size, + chunk_root_generation, compat_flags, compat_ro_flags, + incompat_flags, csum_type, dev_item, cache_generation, + uuid_tree_generation, super_roots[0], super_roots[1], + super_roots[2], super_roots[3]) +DEFINE_CONV(btrfs_item, key, offset, size) +DEFINE_CONV(btrfs_key_ptr, key, blockptr, generation) + +#endif /* __BTRFS_CONV_FUNCS_H__ */ diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c new file mode 100644 index 0000000000..b13ecb9376 --- /dev/null +++ b/fs/btrfs/ctree.c @@ -0,0 +1,289 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" +#include <malloc.h> + +int btrfs_comp_keys(struct btrfs_key *a, struct btrfs_key *b) +{ + if (a->objectid > b->objectid) + return 1; + if (a->objectid < b->objectid) + return -1; + if (a->type > b->type) + return 1; + if (a->type < b->type) + return -1; + if (a->offset > b->offset) + return 1; + if (a->offset < b->offset) + return -1; + return 0; +} + +int btrfs_comp_keys_type(struct btrfs_key *a, struct btrfs_key *b) +{ + if (a->objectid > b->objectid) + return 1; + if (a->objectid < b->objectid) + return -1; + if (a->type > b->type) + return 1; + if (a->type < b->type) + return -1; + return 0; +} + +static int generic_bin_search(void *addr, int item_size, struct btrfs_key *key, + int max, int *slot) +{ + int low = 0, high = max, mid, ret; + struct btrfs_key *tmp; + + if (0) { + int i; + printf("\tsearching %llu %i\n", key->objectid, key->type); + for (i = 0; i < max; ++i) { + tmp = (struct btrfs_key *) ((u8 *) addr + i*item_size); + printf("\t\t%llu %i\n", tmp->objectid, tmp->type); + } + printf("\n"); + } + + while (low < high) { + mid = (low + high) / 2; + + tmp = (struct btrfs_key *) ((u8 *) addr + mid*item_size); + ret = btrfs_comp_keys(tmp, key); + + if (ret < 0) { + low = mid + 1; + } else if (ret > 0) { + high = mid; + } else { + *slot = mid; + return 0; + } + } + + *slot = low; + return 1; +} + +int btrfs_bin_search(union btrfs_tree_node *p, struct btrfs_key *key, + int *slot) +{ + void *addr; + unsigned long size; + + if (p->header.level) { + addr = p->node.ptrs; + size = sizeof(struct btrfs_key_ptr); + } else { + addr = p->leaf.items; + size = sizeof(struct btrfs_item); + } + + return generic_bin_search(addr, size, key, p->header.nritems, slot); +} + +static void clear_path(struct btrfs_path *p) +{ + int i; + + for (i = 0; i < BTRFS_MAX_LEVEL; ++i) { + p->nodes[i] = NULL; + p->slots[i] = 0; + } +} + +void btrfs_free_path(struct btrfs_path *p) +{ + int i; + + for (i = 0; i < BTRFS_MAX_LEVEL; ++i) { + if (p->nodes[i]) + free(p->nodes[i]); + } + + clear_path(p); +} + +static int read_tree_node(u64 physical, union btrfs_tree_node **buf) +{ + struct btrfs_header hdr; + unsigned long size, offset = sizeof(hdr); + union btrfs_tree_node *res; + u32 i; + + if (!btrfs_devread(physical, sizeof(hdr), &hdr)) + return -1; + + btrfs_header_to_cpu(&hdr); + + if (hdr.level) + size = sizeof(struct btrfs_node) + + hdr.nritems * sizeof(struct btrfs_key_ptr); + else + size = btrfs_info.sb.nodesize; + + res = malloc(size); + if (!res) { + debug("%s: malloc failed\n", __func__); + return -1; + } + + if (!btrfs_devread(physical + offset, size - offset, + ((u8 *) res) + offset)) { + free(res); + return -1; + } + + res->header = hdr; + if (hdr.level) + for (i = 0; i < hdr.nritems; ++i) + btrfs_key_ptr_to_cpu(&res->node.ptrs[i]); + else + for (i = 0; i < hdr.nritems; ++i) + btrfs_item_to_cpu(&res->leaf.items[i]); + + *buf = res; + + return 0; +} + +int btrfs_search_tree(const struct btrfs_root *root, struct btrfs_key *key, + struct btrfs_path *p) +{ + u8 lvl, prev_lvl; + int i, slot, ret; + u64 logical, physical; + union btrfs_tree_node *buf; + + clear_path(p); + + logical = root->bytenr; + + for (i = 0; i < BTRFS_MAX_LEVEL; ++i) { + physical = btrfs_map_logical_to_physical(logical); + if (physical == -1ULL) + goto err; + + if (read_tree_node(physical, &buf)) + goto err; + + lvl = buf->header.level; + if (i && prev_lvl != lvl + 1) { + printf("%s: invalid level in header at %llu\n", + __func__, logical); + goto err; + } + prev_lvl = lvl; + + ret = btrfs_bin_search(buf, key, &slot); + if (ret < 0) + goto err; + if (ret && slot > 0 && lvl) + slot -= 1; + + p->slots[lvl] = slot; + p->nodes[lvl] = buf; + + if (lvl) + logical = buf->node.ptrs[slot].blockptr; + else + break; + } + + return 0; +err: + btrfs_free_path(p); + return -1; +} + +static int jump_leaf(struct btrfs_path *path, int dir) +{ + struct btrfs_path p; + u32 slot; + int level = 1, from_level, i; + + dir = dir >= 0 ? 1 : -1; + + p = *path; + + while (level < BTRFS_MAX_LEVEL) { + if (!p.nodes[level]) + return 1; + + slot = p.slots[level]; + if ((dir > 0 && slot + dir >= p.nodes[level]->header.nritems) + || (dir < 0 && !slot)) + level++; + else + break; + } + + if (level == BTRFS_MAX_LEVEL) + return 1; + + p.slots[level] = slot + dir; + level--; + from_level = level; + + while (level >= 0) { + u64 logical, physical; + + slot = p.slots[level + 1]; + logical = p.nodes[level + 1]->node.ptrs[slot].blockptr; + physical = btrfs_map_logical_to_physical(logical); + if (physical == -1ULL) + goto err; + + if (read_tree_node(physical, &p.nodes[level])) + goto err; + + if (dir > 0) + p.slots[level] = 0; + else + p.slots[level] = p.nodes[level]->header.nritems - 1; + level--; + } + + /* Free rewritten nodes in path */ + for (i = 0; i <= from_level; ++i) + free(path->nodes[i]); + + *path = p; + return 0; + +err: + /* Free rewritten nodes in p */ + for (i = level + 1; i <= from_level; ++i) + free(p.nodes[i]); + return -1; +} + +int btrfs_prev_slot(struct btrfs_path *p) +{ + if (!p->slots[0]) + return jump_leaf(p, -1); + + p->slots[0]--; + return 0; +} + +int btrfs_next_slot(struct btrfs_path *p) +{ + struct btrfs_leaf *leaf = &p->nodes[0]->leaf; + + if (p->slots[0] >= leaf->header.nritems) + return jump_leaf(p, 1); + + p->slots[0]++; + return 0; +} diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h new file mode 100644 index 0000000000..39f4473ae5 --- /dev/null +++ b/fs/btrfs/ctree.h @@ -0,0 +1,334 @@ +/* + * From linux/fs/btrfs/ctree.h + * Copyright (C) 2007,2008 Oracle. All rights reserved. + * + * Modified in 2017 by Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BTRFS_CTREE_H__ +#define __BTRFS_CTREE_H__ + +#include <common.h> +#include <compiler.h> +#include "btrfs_tree.h" + +#define BTRFS_MAGIC 0x4D5F53665248425FULL /* ascii _BHRfS_M, no null */ + +#define BTRFS_MAX_MIRRORS 3 + +#define BTRFS_MAX_LEVEL 8 + +#define BTRFS_COMPAT_EXTENT_TREE_V0 + +/* + * the max metadata block size. This limit is somewhat artificial, + * but the memmove costs go through the roof for larger blocks. + */ +#define BTRFS_MAX_METADATA_BLOCKSIZE 65536 + +/* + * we can actually store much bigger names, but lets not confuse the rest + * of linux + */ +#define BTRFS_NAME_LEN 255 + +/* + * Theoretical limit is larger, but we keep this down to a sane + * value. That should limit greatly the possibility of collisions on + * inode ref items. + */ +#define BTRFS_LINK_MAX 65535U + +static const int btrfs_csum_sizes[] = { 4 }; + +/* four bytes for CRC32 */ +#define BTRFS_EMPTY_DIR_SIZE 0 + +/* ioprio of readahead is set to idle */ +#define BTRFS_IOPRIO_READA (IOPRIO_PRIO_VALUE(IOPRIO_CLASS_IDLE, 0)) + +#define BTRFS_DIRTY_METADATA_THRESH SZ_32M + +#define BTRFS_MAX_EXTENT_SIZE SZ_128M + +/* + * File system states + */ +#define BTRFS_FS_STATE_ERROR 0 +#define BTRFS_FS_STATE_REMOUNTING 1 +#define BTRFS_FS_STATE_TRANS_ABORTED 2 +#define BTRFS_FS_STATE_DEV_REPLACING 3 +#define BTRFS_FS_STATE_DUMMY_FS_INFO 4 + +#define BTRFS_BACKREF_REV_MAX 256 +#define BTRFS_BACKREF_REV_SHIFT 56 +#define BTRFS_BACKREF_REV_MASK (((u64)BTRFS_BACKREF_REV_MAX - 1) << \ + BTRFS_BACKREF_REV_SHIFT) + +#define BTRFS_OLD_BACKREF_REV 0 +#define BTRFS_MIXED_BACKREF_REV 1 + +/* + * every tree block (leaf or node) starts with this header. + */ +struct btrfs_header { + /* these first four must match the super block */ + __u8 csum[BTRFS_CSUM_SIZE]; + __u8 fsid[BTRFS_FSID_SIZE]; /* FS specific uuid */ + __u64 bytenr; /* which block this node is supposed to live in */ + __u64 flags; + + /* allowed to be different from the super from here on down */ + __u8 chunk_tree_uuid[BTRFS_UUID_SIZE]; + __u64 generation; + __u64 owner; + __u32 nritems; + __u8 level; +} __attribute__ ((__packed__)); + +/* + * this is a very generous portion of the super block, giving us + * room to translate 14 chunks with 3 stripes each. + */ +#define BTRFS_SYSTEM_CHUNK_ARRAY_SIZE 2048 + +/* + * just in case we somehow lose the roots and are not able to mount, + * we store an array of the roots from previous transactions + * in the super. + */ +#define BTRFS_NUM_BACKUP_ROOTS 4 +struct btrfs_root_backup { + __u64 tree_root; + __u64 tree_root_gen; + + __u64 chunk_root; + __u64 chunk_root_gen; + + __u64 extent_root; + __u64 extent_root_gen; + + __u64 fs_root; + __u64 fs_root_gen; + + __u64 dev_root; + __u64 dev_root_gen; + + __u64 csum_root; + __u64 csum_root_gen; + + __u64 total_bytes; + __u64 bytes_used; + __u64 num_devices; + /* future */ + __u64 unused_64[4]; + + __u8 tree_root_level; + __u8 chunk_root_level; + __u8 extent_root_level; + __u8 fs_root_level; + __u8 dev_root_level; + __u8 csum_root_level; + /* future and to align */ + __u8 unused_8[10]; +} __attribute__ ((__packed__)); + +/* + * the super block basically lists the main trees of the FS + * it currently lacks any block count etc etc + */ +struct btrfs_super_block { + __u8 csum[BTRFS_CSUM_SIZE]; + /* the first 4 fields must match struct btrfs_header */ + __u8 fsid[BTRFS_FSID_SIZE]; /* FS specific uuid */ + __u64 bytenr; /* this block number */ + __u64 flags; + + /* allowed to be different from the btrfs_header from here own down */ + __u64 magic; + __u64 generation; + __u64 root; + __u64 chunk_root; + __u64 log_root; + + /* this will help find the new super based on the log root */ + __u64 log_root_transid; + __u64 total_bytes; + __u64 bytes_used; + __u64 root_dir_objectid; + __u64 num_devices; + __u32 sectorsize; + __u32 nodesize; + __u32 __unused_leafsize; + __u32 stripesize; + __u32 sys_chunk_array_size; + __u64 chunk_root_generation; + __u64 compat_flags; + __u64 compat_ro_flags; + __u64 incompat_flags; + __u16 csum_type; + __u8 root_level; + __u8 chunk_root_level; + __u8 log_root_level; + struct btrfs_dev_item dev_item; + + char label[BTRFS_LABEL_SIZE]; + + __u64 cache_generation; + __u64 uuid_tree_generation; + + /* future expansion */ + __u64 reserved[30]; + __u8 sys_chunk_array[BTRFS_SYSTEM_CHUNK_ARRAY_SIZE]; + struct btrfs_root_backup super_roots[BTRFS_NUM_BACKUP_ROOTS]; +} __attribute__ ((__packed__)); + +/* + * Compat flags that we support. If any incompat flags are set other than the + * ones specified below then we will fail to mount + */ +#define BTRFS_FEATURE_COMPAT_SUPP 0ULL +#define BTRFS_FEATURE_COMPAT_SAFE_SET 0ULL +#define BTRFS_FEATURE_COMPAT_SAFE_CLEAR 0ULL + +#define BTRFS_FEATURE_COMPAT_RO_SUPP \ + (BTRFS_FEATURE_COMPAT_RO_FREE_SPACE_TREE | \ + BTRFS_FEATURE_COMPAT_RO_FREE_SPACE_TREE_VALID) + +#define BTRFS_FEATURE_COMPAT_RO_SAFE_SET 0ULL +#define BTRFS_FEATURE_COMPAT_RO_SAFE_CLEAR 0ULL + +#define BTRFS_FEATURE_INCOMPAT_SUPP \ + (BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF | \ + BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL | \ + BTRFS_FEATURE_INCOMPAT_MIXED_GROUPS | \ + BTRFS_FEATURE_INCOMPAT_BIG_METADATA | \ + BTRFS_FEATURE_INCOMPAT_COMPRESS_LZO | \ + BTRFS_FEATURE_INCOMPAT_RAID56 | \ + BTRFS_FEATURE_INCOMPAT_EXTENDED_IREF | \ + BTRFS_FEATURE_INCOMPAT_SKINNY_METADATA | \ + BTRFS_FEATURE_INCOMPAT_NO_HOLES) + +#define BTRFS_FEATURE_INCOMPAT_SAFE_SET \ + (BTRFS_FEATURE_INCOMPAT_EXTENDED_IREF) +#define BTRFS_FEATURE_INCOMPAT_SAFE_CLEAR 0ULL + +/* + * A leaf is full of items. offset and size tell us where to find + * the item in the leaf (relative to the start of the data area) + */ +struct btrfs_item { + struct btrfs_key key; + __u32 offset; + __u32 size; +} __attribute__ ((__packed__)); + +/* + * leaves have an item area and a data area: + * [item0, item1....itemN] [free space] [dataN...data1, data0] + * + * The data is separate from the items to get the keys closer together + * during searches. + */ +struct btrfs_leaf { + struct btrfs_header header; + struct btrfs_item items[]; +} __attribute__ ((__packed__)); + +/* + * all non-leaf blocks are nodes, they hold only keys and pointers to + * other blocks + */ +struct btrfs_key_ptr { + struct btrfs_key key; + __u64 blockptr; + __u64 generation; +} __attribute__ ((__packed__)); + +struct btrfs_node { + struct btrfs_header header; + struct btrfs_key_ptr ptrs[]; +} __attribute__ ((__packed__)); + +union btrfs_tree_node { + struct btrfs_header header; + struct btrfs_leaf leaf; + struct btrfs_node node; +}; + +typedef __u8 u8; +typedef __u16 u16; +typedef __u32 u32; +typedef __u64 u64; + +struct btrfs_path { + union btrfs_tree_node *nodes[BTRFS_MAX_LEVEL]; + u32 slots[BTRFS_MAX_LEVEL]; +}; + +struct btrfs_root { + u64 objectid; + u64 bytenr; + u64 root_dirid; +}; + +int btrfs_comp_keys(struct btrfs_key *, struct btrfs_key *); +int btrfs_comp_keys_type(struct btrfs_key *, struct btrfs_key *); +int btrfs_bin_search(union btrfs_tree_node *, struct btrfs_key *, int *); +void btrfs_free_path(struct btrfs_path *); +int btrfs_search_tree(const struct btrfs_root *, struct btrfs_key *, + struct btrfs_path *); +int btrfs_prev_slot(struct btrfs_path *); +int btrfs_next_slot(struct btrfs_path *); + +static inline struct btrfs_key *btrfs_path_leaf_key(struct btrfs_path *p) { + return &p->nodes[0]->leaf.items[p->slots[0]].key; +} + +static inline struct btrfs_key * +btrfs_search_tree_key_type(const struct btrfs_root *root, u64 objectid, + u8 type, struct btrfs_path *path) +{ + struct btrfs_key key, *res; + + key.objectid = objectid; + key.type = type; + key.offset = 0; + + if (btrfs_search_tree(root, &key, path)) + return NULL; + + res = btrfs_path_leaf_key(path); + if (btrfs_comp_keys_type(&key, res)) { + btrfs_free_path(path); + return NULL; + } + + return res; +} + +static inline u32 btrfs_path_item_size(struct btrfs_path *p) +{ + return p->nodes[0]->leaf.items[p->slots[0]].size; +} + +static inline void *btrfs_leaf_data(struct btrfs_leaf *leaf, u32 slot) +{ + return ((u8 *) leaf) + sizeof(struct btrfs_header) + + leaf->items[slot].offset; +} + +static inline void *btrfs_path_leaf_data(struct btrfs_path *p) +{ + return btrfs_leaf_data(&p->nodes[0]->leaf, p->slots[0]); +} + +#define btrfs_item_ptr(l,s,t) \ + ((t *) btrfs_leaf_data((l),(s))) + +#define btrfs_path_item_ptr(p,t) \ + ((t *) btrfs_path_leaf_data((p))) + +#endif /* __BTRFS_CTREE_H__ */ diff --git a/fs/btrfs/dev.c b/fs/btrfs/dev.c new file mode 100644 index 0000000000..fd2e9b6127 --- /dev/null +++ b/fs/btrfs/dev.c @@ -0,0 +1,26 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <compiler.h> +#include <fs_internal.h> + +struct blk_desc *btrfs_blk_desc; +disk_partition_t *btrfs_part_info; + +int btrfs_devread(u64 address, int byte_len, void *buf) +{ + lbaint_t sector; + int byte_offset; + + sector = address >> btrfs_blk_desc->log2blksz; + byte_offset = address % btrfs_blk_desc->blksz; + + return fs_devread(btrfs_blk_desc, btrfs_part_info, sector, byte_offset, + byte_len, buf); +} diff --git a/fs/btrfs/dir-item.c b/fs/btrfs/dir-item.c new file mode 100644 index 0000000000..970563404f --- /dev/null +++ b/fs/btrfs/dir-item.c @@ -0,0 +1,125 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" + +static int verify_dir_item(struct btrfs_dir_item *item, u32 start, u32 total) +{ + u16 max_len = BTRFS_NAME_LEN; + u32 end; + + if (item->type >= BTRFS_FT_MAX) { + printf("%s: invalid dir item type: %i\n", __func__, item->type); + return 1; + } + + if (item->type == BTRFS_FT_XATTR) + max_len = 255; /* XATTR_NAME_MAX */ + + end = start + sizeof(*item) + item->name_len; + if (item->name_len > max_len || end > total) { + printf("%s: invalid dir item name len: %u\n", __func__, + item->name_len); + return 1; + } + + return 0; +} + +static struct btrfs_dir_item * +btrfs_match_dir_item_name(struct btrfs_path *path, const char *name, + int name_len) +{ + struct btrfs_dir_item *item; + u32 total_len, cur = 0, this_len; + const char *name_ptr; + + item = btrfs_path_item_ptr(path, struct btrfs_dir_item); + + total_len = btrfs_path_item_size(path); + + while (cur < total_len) { + btrfs_dir_item_to_cpu(item); + this_len = sizeof(*item) + item->name_len + item->data_len; + name_ptr = (const char *) (item + 1); + + if (verify_dir_item(item, cur, total_len)) + return NULL; + if (item->name_len == name_len && !memcmp(name_ptr, name, + name_len)) + return item; + + cur += this_len; + item = (struct btrfs_dir_item *) ((u8 *) item + this_len); + } + + return NULL; +} + +int btrfs_lookup_dir_item(const struct btrfs_root *root, u64 dir, + const char *name, int name_len, + struct btrfs_dir_item *item) +{ + struct btrfs_path path; + struct btrfs_key key; + struct btrfs_dir_item *res = NULL; + + key.objectid = dir; + key.type = BTRFS_DIR_ITEM_KEY; + key.offset = btrfs_name_hash(name, name_len); + + if (btrfs_search_tree(root, &key, &path)) + return -1; + + if (btrfs_comp_keys_type(&key, btrfs_path_leaf_key(&path))) + goto out; + + res = btrfs_match_dir_item_name(&path, name, name_len); + if (res) + *item = *res; +out: + btrfs_free_path(&path); + return res ? 0 : -1; +} + +int btrfs_readdir(const struct btrfs_root *root, u64 dir, + btrfs_readdir_callback_t callback) +{ + struct btrfs_path path; + struct btrfs_key key, *found_key; + struct btrfs_dir_item *item; + int res = 0; + + key.objectid = dir; + key.type = BTRFS_DIR_INDEX_KEY; + key.offset = 0; + + if (btrfs_search_tree(root, &key, &path)) + return -1; + + do { + found_key = btrfs_path_leaf_key(&path); + if (btrfs_comp_keys_type(&key, found_key)) + break; + + item = btrfs_path_item_ptr(&path, struct btrfs_dir_item); + btrfs_dir_item_to_cpu(item); + + if (verify_dir_item(item, 0, sizeof(*item) + item->name_len)) + continue; + if (item->type == BTRFS_FT_XATTR) + continue; + + if (callback(root, item)) + break; + } while (!(res = btrfs_next_slot(&path))); + + btrfs_free_path(&path); + + return res < 0 ? -1 : 0; +} diff --git a/fs/btrfs/extent-io.c b/fs/btrfs/extent-io.c new file mode 100644 index 0000000000..feb91432e9 --- /dev/null +++ b/fs/btrfs/extent-io.c @@ -0,0 +1,120 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" +#include <malloc.h> + +u64 btrfs_read_extent_inline(struct btrfs_path *path, + struct btrfs_file_extent_item *extent, u64 offset, + u64 size, char *out) +{ + u32 clen, dlen, orig_size = size, res; + const char *cbuf; + char *dbuf; + const int data_off = offsetof(struct btrfs_file_extent_item, + disk_bytenr); + + clen = btrfs_path_item_size(path) - data_off; + cbuf = (const char *) extent + data_off; + dlen = extent->ram_bytes; + + if (offset > dlen) + return -1ULL; + + if (size > dlen - offset) + size = dlen - offset; + + if (extent->compression == BTRFS_COMPRESS_NONE) { + memcpy(out, cbuf + offset, size); + return size; + } + + if (dlen > orig_size) { + dbuf = malloc(dlen); + if (!dbuf) + return -1ULL; + } else { + dbuf = out; + } + + res = btrfs_decompress(extent->compression, cbuf, clen, dbuf, dlen); + if (res == -1 || res != dlen) + goto err; + + if (dlen > orig_size) { + memcpy(out, dbuf + offset, size); + free(dbuf); + } else if (offset) { + memmove(out, dbuf + offset, size); + } + + return size; + +err: + if (dlen > orig_size) + free(dbuf); + return -1ULL; +} + +u64 btrfs_read_extent_reg(struct btrfs_path *path, + struct btrfs_file_extent_item *extent, u64 offset, + u64 size, char *out) +{ + u64 physical, clen, dlen, orig_size = size; + u32 res; + char *cbuf, *dbuf; + + clen = extent->disk_num_bytes; + dlen = extent->num_bytes; + + if (offset > dlen) + return -1ULL; + + if (size > dlen - offset) + size = dlen - offset; + + physical = btrfs_map_logical_to_physical(extent->disk_bytenr); + if (physical == -1ULL) + return -1ULL; + + if (extent->compression == BTRFS_COMPRESS_NONE) { + physical += extent->offset + offset; + if (!btrfs_devread(physical, size, out)) + return -1ULL; + + return size; + } + + cbuf = malloc(dlen > size ? clen + dlen : clen); + if (!cbuf) + return -1ULL; + + if (dlen > orig_size) + dbuf = cbuf + clen; + else + dbuf = out; + + if (!btrfs_devread(physical, clen, cbuf)) + goto err; + + res = btrfs_decompress(extent->compression, cbuf, clen, dbuf, dlen); + if (res == -1) + goto err; + + if (dlen > orig_size) + memcpy(out, dbuf + offset, size); + else + memmove(out, dbuf + offset, size); + + free(cbuf); + return res; + +err: + free(cbuf); + return -1ULL; +} diff --git a/fs/btrfs/hash.c b/fs/btrfs/hash.c new file mode 100644 index 0000000000..f8a50e532a --- /dev/null +++ b/fs/btrfs/hash.c @@ -0,0 +1,38 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" +#include <u-boot/crc.h> + +static u32 btrfs_crc32c_table[256]; + +void btrfs_hash_init(void) +{ + static int inited = 0; + + if (!inited) { + crc32c_init(btrfs_crc32c_table, 0x82F63B78); + inited = 1; + } +} + +u32 btrfs_crc32c(u32 crc, const void *data, size_t length) +{ + return crc32c_cal(crc, (const char *) data, length, + btrfs_crc32c_table); +} + +u32 btrfs_csum_data(char *data, u32 seed, size_t len) +{ + return btrfs_crc32c(seed, data, len); +} + +void btrfs_csum_final(u32 crc, void *result) +{ + *((u32 *) result) = cpu_to_le32(~crc); +} diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c new file mode 100644 index 0000000000..f785b600fa --- /dev/null +++ b/fs/btrfs/inode.c @@ -0,0 +1,384 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" +#include <malloc.h> + +u64 btrfs_lookup_inode_ref(struct btrfs_root *root, u64 inr, + struct btrfs_inode_ref *refp, char *name) +{ + struct btrfs_path path; + struct btrfs_key *key; + struct btrfs_inode_ref *ref; + u64 res = -1ULL; + + key = btrfs_search_tree_key_type(root, inr, BTRFS_INODE_REF_KEY, + &path); + + if (!key) + return -1ULL; + + ref = btrfs_path_item_ptr(&path, struct btrfs_inode_ref); + btrfs_inode_ref_to_cpu(ref); + + if (refp) + *refp = *ref; + + if (name) { + if (ref->name_len > BTRFS_NAME_MAX) { + printf("%s: inode name too long: %u\n", __func__, + ref->name_len); + goto out; + } + + memcpy(name, ref + 1, ref->name_len); + } + + res = key->offset; +out: + btrfs_free_path(&path); + return res; +} + +int btrfs_lookup_inode(const struct btrfs_root *root, + struct btrfs_key *location, + struct btrfs_inode_item *item, + struct btrfs_root *new_root) +{ + struct btrfs_root tmp_root = *root; + struct btrfs_path path; + int res = -1; + + if (location->type == BTRFS_ROOT_ITEM_KEY) { + if (btrfs_find_root(location->objectid, &tmp_root, NULL)) + return -1; + + location->objectid = tmp_root.root_dirid; + location->type = BTRFS_INODE_ITEM_KEY; + location->offset = 0; + } + + if (btrfs_search_tree(&tmp_root, location, &path)) + return res; + + if (btrfs_comp_keys(location, btrfs_path_leaf_key(&path))) + goto out; + + if (item) { + *item = *btrfs_path_item_ptr(&path, struct btrfs_inode_item); + btrfs_inode_item_to_cpu(item); + } + + if (new_root) + *new_root = tmp_root; + + res = 0; + +out: + btrfs_free_path(&path); + return res; +} + +int btrfs_readlink(const struct btrfs_root *root, u64 inr, char *target) +{ + struct btrfs_path path; + struct btrfs_key key; + struct btrfs_file_extent_item *extent; + const char *data_ptr; + int res = -1; + + key.objectid = inr; + key.type = BTRFS_EXTENT_DATA_KEY; + key.offset = 0; + + if (btrfs_search_tree(root, &key, &path)) + return -1; + + if (btrfs_comp_keys(&key, btrfs_path_leaf_key(&path))) + goto out; + + extent = btrfs_path_item_ptr(&path, struct btrfs_file_extent_item); + if (extent->type != BTRFS_FILE_EXTENT_INLINE) { + printf("%s: Extent for symlink %llu not of INLINE type\n", + __func__, inr); + goto out; + } + + btrfs_file_extent_item_to_cpu_inl(extent); + + if (extent->compression != BTRFS_COMPRESS_NONE) { + printf("%s: Symlink %llu extent data compressed!\n", __func__, + inr); + goto out; + } else if (extent->encryption != 0) { + printf("%s: Symlink %llu extent data encrypted!\n", __func__, + inr); + goto out; + } else if (extent->ram_bytes >= btrfs_info.sb.sectorsize) { + printf("%s: Symlink %llu extent data too long (%llu)!\n", + __func__, inr, extent->ram_bytes); + goto out; + } + + data_ptr = (const char *) extent + + offsetof(struct btrfs_file_extent_item, disk_bytenr); + + memcpy(target, data_ptr, extent->ram_bytes); + target[extent->ram_bytes] = '\0'; + res = 0; +out: + btrfs_free_path(&path); + return res; +} + +/* inr must be a directory (for regular files with multiple hard links this + function returns only one of the parents of the file) */ +static u64 get_parent_inode(struct btrfs_root *root, u64 inr, + struct btrfs_inode_item *inode_item) +{ + struct btrfs_key key; + u64 res; + + if (inr == BTRFS_FIRST_FREE_OBJECTID) { + if (root->objectid != btrfs_info.fs_root.objectid) { + u64 parent; + struct btrfs_root_ref ref; + + parent = btrfs_lookup_root_ref(root->objectid, &ref, + NULL); + if (parent == -1ULL) + return -1ULL; + + if (btrfs_find_root(parent, root, NULL)) + return -1ULL; + + inr = ref.dirid; + } + + if (inode_item) { + key.objectid = inr; + key.type = BTRFS_INODE_ITEM_KEY; + key.offset = 0; + + if (btrfs_lookup_inode(root, &key, inode_item, NULL)) + return -1ULL; + } + + return inr; + } + + res = btrfs_lookup_inode_ref(root, inr, NULL, NULL); + if (res == -1ULL) + return -1ULL; + + if (inode_item) { + key.objectid = res; + key.type = BTRFS_INODE_ITEM_KEY; + key.offset = 0; + + if (btrfs_lookup_inode(root, &key, inode_item, NULL)) + return -1ULL; + } + + return res; +} + +static inline int next_length(const char *path) +{ + int res = 0; + while (*path != '\0' && *path != '/' && res <= BTRFS_NAME_LEN) + ++res, ++path; + return res; +} + +static inline const char *skip_current_directories(const char *cur) +{ + while (1) { + if (cur[0] == '/') + ++cur; + else if (cur[0] == '.' && cur[1] == '/') + cur += 2; + else + break; + } + + return cur; +} + +u64 btrfs_lookup_path(struct btrfs_root *root, u64 inr, const char *path, + u8 *type_p, struct btrfs_inode_item *inode_item_p, + int symlink_limit) +{ + struct btrfs_dir_item item; + struct btrfs_inode_item inode_item; + u8 type = BTRFS_FT_DIR; + int len, have_inode = 0; + const char *cur = path; + + if (*cur == '/') { + ++cur; + inr = root->root_dirid; + } + + do { + cur = skip_current_directories(cur); + + len = next_length(cur); + if (len > BTRFS_NAME_LEN) { + printf("%s: Name too long at \"%.*s\"\n", __func__, + BTRFS_NAME_LEN, cur); + return -1ULL; + } + + if (len == 1 && cur[0] == '.') + break; + + if (len == 2 && cur[0] == '.' && cur[1] == '.') { + cur += 2; + inr = get_parent_inode(root, inr, &inode_item); + if (inr == -1ULL) + return -1ULL; + + type = BTRFS_FT_DIR; + continue; + } + + if (!*cur) + break; + + if (btrfs_lookup_dir_item(root, inr, cur, len, &item)) + return -1ULL; + + type = item.type; + have_inode = 1; + if (btrfs_lookup_inode(root, &item.location, &inode_item, root)) + return -1ULL; + + if (item.type == BTRFS_FT_SYMLINK && symlink_limit >= 0) { + char *target; + + if (!symlink_limit) { + printf("%s: Too much symlinks!\n", __func__); + return -1ULL; + } + + target = malloc(min(inode_item.size + 1, + (u64) btrfs_info.sb.sectorsize)); + if (!target) + return -1ULL; + + if (btrfs_readlink(root, item.location.objectid, + target)) { + free(target); + return -1ULL; + } + + inr = btrfs_lookup_path(root, inr, target, &type, + &inode_item, symlink_limit - 1); + + free(target); + + if (inr == -1ULL) + return -1ULL; + } else if (item.type != BTRFS_FT_DIR && cur[len]) { + printf("%s: \"%.*s\" not a directory\n", __func__, + (int) (cur - path + len), path); + return -1ULL; + } else { + inr = item.location.objectid; + } + + cur += len; + } while (*cur); + + if (type_p) + *type_p = type; + + if (inode_item_p) { + if (!have_inode) { + struct btrfs_key key; + + key.objectid = inr; + key.type = BTRFS_INODE_ITEM_KEY; + key.offset = 0; + + if (btrfs_lookup_inode(root, &key, &inode_item, NULL)) + return -1ULL; + } + + *inode_item_p = inode_item; + } + + return inr; +} + +u64 btrfs_file_read(const struct btrfs_root *root, u64 inr, u64 offset, + u64 size, char *buf) +{ + struct btrfs_path path; + struct btrfs_key key; + struct btrfs_file_extent_item *extent; + int res = 0; + u64 rd, rd_all = -1ULL; + + key.objectid = inr; + key.type = BTRFS_EXTENT_DATA_KEY; + key.offset = offset; + + if (btrfs_search_tree(root, &key, &path)) + return -1ULL; + + if (btrfs_comp_keys(&key, btrfs_path_leaf_key(&path)) < 0) { + if (btrfs_prev_slot(&path)) + goto out; + + if (btrfs_comp_keys_type(&key, btrfs_path_leaf_key(&path))) + goto out; + } + + rd_all = 0; + + do { + if (btrfs_comp_keys_type(&key, btrfs_path_leaf_key(&path))) + break; + + extent = btrfs_path_item_ptr(&path, + struct btrfs_file_extent_item); + + if (extent->type == BTRFS_FILE_EXTENT_INLINE) { + btrfs_file_extent_item_to_cpu_inl(extent); + rd = btrfs_read_extent_inline(&path, extent, offset, + size, buf); + } else { + btrfs_file_extent_item_to_cpu(extent); + rd = btrfs_read_extent_reg(&path, extent, offset, size, + buf); + } + + if (rd == -1ULL) { + printf("%s: Error reading extent\n", __func__); + rd_all = -1; + goto out; + } + + offset = 0; + buf += rd; + rd_all += rd; + size -= rd; + + if (!size) + break; + } while (!(res = btrfs_next_slot(&path))); + + if (res) + return -1ULL; + +out: + btrfs_free_path(&path); + return rd_all; +} diff --git a/fs/btrfs/root.c b/fs/btrfs/root.c new file mode 100644 index 0000000000..c405813b69 --- /dev/null +++ b/fs/btrfs/root.c @@ -0,0 +1,93 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" + +static void read_root_item(struct btrfs_path *p, struct btrfs_root_item *item) +{ + u32 len; + int reset = 0; + + len = btrfs_path_item_size(p); + memcpy(item, btrfs_path_item_ptr(p, struct btrfs_root_item), len); + btrfs_root_item_to_cpu(item); + + if (len < sizeof(*item)) + reset = 1; + if (!reset && item->generation != item->generation_v2) { + if (item->generation_v2 != 0) + printf("%s: generation != generation_v2 in root item", + __func__); + reset = 1; + } + if (reset) { + memset(&item->generation_v2, 0, + sizeof(*item) - offsetof(struct btrfs_root_item, + generation_v2)); + } +} + +int btrfs_find_root(u64 objectid, struct btrfs_root *root, + struct btrfs_root_item *root_item) +{ + struct btrfs_path path; + struct btrfs_root_item my_root_item; + + if (!btrfs_search_tree_key_type(&btrfs_info.tree_root, objectid, + BTRFS_ROOT_ITEM_KEY, &path)) + return -1; + + if (!root_item) + root_item = &my_root_item; + read_root_item(&path, root_item); + + if (root) { + root->objectid = objectid; + root->bytenr = root_item->bytenr; + root->root_dirid = root_item->root_dirid; + } + + btrfs_free_path(&path); + return 0; +} + +u64 btrfs_lookup_root_ref(u64 subvolid, struct btrfs_root_ref *refp, char *name) +{ + struct btrfs_path path; + struct btrfs_key *key; + struct btrfs_root_ref *ref; + u64 res = -1ULL; + + key = btrfs_search_tree_key_type(&btrfs_info.tree_root, subvolid, + BTRFS_ROOT_BACKREF_KEY, &path); + + if (!key) + return -1ULL; + + ref = btrfs_path_item_ptr(&path, struct btrfs_root_ref); + btrfs_root_ref_to_cpu(ref); + + if (refp) + *refp = *ref; + + if (name) { + if (ref->name_len > BTRFS_VOL_NAME_MAX) { + printf("%s: volume name too long: %u\n", __func__, + ref->name_len); + goto out; + } + + memcpy(name, ref + 1, ref->name_len); + } + + res = key->offset; +out: + btrfs_free_path(&path); + return res; +} + diff --git a/fs/btrfs/subvolume.c b/fs/btrfs/subvolume.c new file mode 100644 index 0000000000..54e0ab4546 --- /dev/null +++ b/fs/btrfs/subvolume.c @@ -0,0 +1,131 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" +#include <malloc.h> + +static int get_subvol_name(u64 subvolid, char *name, int max_len) +{ + struct btrfs_root_ref rref; + struct btrfs_inode_ref iref; + struct btrfs_root root; + u64 dir; + char tmp[max(BTRFS_VOL_NAME_MAX, BTRFS_NAME_MAX)]; + char *ptr; + + ptr = name + max_len - 1; + *ptr = '\0'; + + while (subvolid != BTRFS_FS_TREE_OBJECTID) { + subvolid = btrfs_lookup_root_ref(subvolid, &rref, tmp); + + if (subvolid == -1ULL) + return -1; + + ptr -= rref.name_len + 1; + if (ptr < name) + goto too_long; + + memcpy(ptr + 1, tmp, rref.name_len); + *ptr = '/'; + + if (btrfs_find_root(subvolid, &root, NULL)) + return -1; + + dir = rref.dirid; + + while (dir != BTRFS_FIRST_FREE_OBJECTID) { + dir = btrfs_lookup_inode_ref(&root, dir, &iref, tmp); + + if (dir == -1ULL) + return -1; + + ptr -= iref.name_len + 1; + if (ptr < name) + goto too_long; + + memcpy(ptr + 1, tmp, iref.name_len); + *ptr = '/'; + } + } + + if (ptr == name + max_len - 1) { + name[0] = '/'; + name[1] = '\0'; + } else { + memmove(name, ptr, name + max_len - ptr); + } + + return 0; + +too_long: + printf("%s: subvolume name too long\n", __func__); + return -1; +} + +u64 btrfs_get_default_subvol_objectid(void) +{ + struct btrfs_dir_item item; + + if (btrfs_lookup_dir_item(&btrfs_info.tree_root, + btrfs_info.sb.root_dir_objectid, "default", 7, + &item)) + return BTRFS_FS_TREE_OBJECTID; + return item.location.objectid; +} + +static void list_subvols(u64 tree, char *nameptr, int max_name_len, int level) +{ + struct btrfs_key key, *found_key; + struct btrfs_path path; + struct btrfs_root_ref *ref; + int res; + + key.objectid = tree; + key.type = BTRFS_ROOT_REF_KEY; + key.offset = 0; + + if (btrfs_search_tree(&btrfs_info.tree_root, &key, &path)) + return; + + do { + found_key = btrfs_path_leaf_key(&path); + if (btrfs_comp_keys_type(&key, found_key)) + break; + + ref = btrfs_path_item_ptr(&path, struct btrfs_root_ref); + btrfs_root_ref_to_cpu(ref); + + printf("ID %llu parent %llu name ", found_key->offset, tree); + if (nameptr && !get_subvol_name(found_key->offset, nameptr, + max_name_len)) + printf("%s\n", nameptr); + else + printf("%.*s\n", (int) ref->name_len, + (const char *) (ref + 1)); + + if (level > 0) + list_subvols(found_key->offset, nameptr, max_name_len, + level - 1); + else + printf("%s: Too much recursion, maybe skipping some " + "subvolumes\n", __func__); + } while (!(res = btrfs_next_slot(&path))); + + btrfs_free_path(&path); +} + +void btrfs_list_subvols(void) +{ + char *nameptr = malloc(4096); + + list_subvols(BTRFS_FS_TREE_OBJECTID, nameptr, nameptr ? 4096 : 0, 40); + + if (nameptr) + free(nameptr); +} diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c new file mode 100644 index 0000000000..2529c2b3b6 --- /dev/null +++ b/fs/btrfs/super.c @@ -0,0 +1,233 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "btrfs.h" + +#define BTRFS_SUPER_FLAG_SUPP (BTRFS_HEADER_FLAG_WRITTEN \ + | BTRFS_HEADER_FLAG_RELOC \ + | BTRFS_SUPER_FLAG_ERROR \ + | BTRFS_SUPER_FLAG_SEEDING \ + | BTRFS_SUPER_FLAG_METADUMP) + +#define BTRFS_SUPER_INFO_SIZE 4096 + +static int btrfs_newest_root_backup(struct btrfs_super_block *sb) +{ + struct btrfs_root_backup *root_backup; + int i, newest = -1; + + for (i = 0; i < BTRFS_NUM_BACKUP_ROOTS; ++i) { + root_backup = sb->super_roots + i; + if (root_backup->tree_root_gen == sb->generation) + newest = i; + } + + return newest; +} + +static inline int is_power_of_2(u64 x) +{ + return !(x & (x - 1)); +} + +static int btrfs_check_super_csum(char *raw_disk_sb) +{ + struct btrfs_super_block *disk_sb = + (struct btrfs_super_block *) raw_disk_sb; + u16 csum_type = le16_to_cpu(disk_sb->csum_type); + + if (csum_type == BTRFS_CSUM_TYPE_CRC32) { + u32 crc = ~(u32) 0; + const int csum_size = sizeof(crc); + char result[csum_size]; + + crc = btrfs_csum_data(raw_disk_sb + BTRFS_CSUM_SIZE, crc, + BTRFS_SUPER_INFO_SIZE - BTRFS_CSUM_SIZE); + btrfs_csum_final(crc, result); + + if (memcmp(raw_disk_sb, result, csum_size)) + return -1; + } else { + return -1; + } + + return 0; +} + +static int btrfs_check_super(struct btrfs_super_block *sb) +{ + int ret = 0; + + if (sb->flags & ~BTRFS_SUPER_FLAG_SUPP) { + printf("%s: Unsupported flags: %llu\n", __func__, + sb->flags & ~BTRFS_SUPER_FLAG_SUPP); + } + + if (sb->root_level > BTRFS_MAX_LEVEL) { + printf("%s: tree_root level too big: %d >= %d\n", __func__, + sb->root_level, BTRFS_MAX_LEVEL); + ret = -1; + } + + if (sb->chunk_root_level > BTRFS_MAX_LEVEL) { + printf("%s: chunk_root level too big: %d >= %d\n", __func__, + sb->chunk_root_level, BTRFS_MAX_LEVEL); + ret = -1; + } + + if (sb->log_root_level > BTRFS_MAX_LEVEL) { + printf("%s: log_root level too big: %d >= %d\n", __func__, + sb->log_root_level, BTRFS_MAX_LEVEL); + ret = -1; + } + + if (!is_power_of_2(sb->sectorsize) || sb->sectorsize < 4096 || + sb->sectorsize > BTRFS_MAX_METADATA_BLOCKSIZE) { + printf("%s: invalid sectorsize %u\n", __func__, + sb->sectorsize); + ret = -1; + } + + if (!is_power_of_2(sb->nodesize) || sb->nodesize < sb->sectorsize || + sb->nodesize > BTRFS_MAX_METADATA_BLOCKSIZE) { + printf("%s: invalid nodesize %u\n", __func__, sb->nodesize); + ret = -1; + } + + if (sb->nodesize != sb->__unused_leafsize) { + printf("%s: invalid leafsize %u, should be %u\n", __func__, + sb->__unused_leafsize, sb->nodesize); + ret = -1; + } + + if (!IS_ALIGNED(sb->root, sb->sectorsize)) { + printf("%s: tree_root block unaligned: %llu\n", __func__, + sb->root); + ret = -1; + } + + if (!IS_ALIGNED(sb->chunk_root, sb->sectorsize)) { + printf("%s: chunk_root block unaligned: %llu\n", __func__, + sb->chunk_root); + ret = -1; + } + + if (!IS_ALIGNED(sb->log_root, sb->sectorsize)) { + printf("%s: log_root block unaligned: %llu\n", __func__, + sb->log_root); + ret = -1; + } + + if (memcmp(sb->fsid, sb->dev_item.fsid, BTRFS_UUID_SIZE) != 0) { + printf("%s: dev_item UUID does not match fsid\n", __func__); + ret = -1; + } + + if (sb->bytes_used < 6*sb->nodesize) { + printf("%s: bytes_used is too small %llu\n", __func__, + sb->bytes_used); + ret = -1; + } + + if (!is_power_of_2(sb->stripesize)) { + printf("%s: invalid stripesize %u\n", __func__, sb->stripesize); + ret = -1; + } + + if (sb->sys_chunk_array_size > BTRFS_SYSTEM_CHUNK_ARRAY_SIZE) { + printf("%s: system chunk array too big %u > %u\n", __func__, + sb->sys_chunk_array_size, BTRFS_SYSTEM_CHUNK_ARRAY_SIZE); + ret = -1; + } + + if (sb->sys_chunk_array_size < sizeof(struct btrfs_key) + + sizeof(struct btrfs_chunk)) { + printf("%s: system chunk array too small %u < %lu\n", __func__, + sb->sys_chunk_array_size, (u32) sizeof(struct btrfs_key) + + sizeof(struct btrfs_chunk)); + ret = -1; + } + + return ret; +} + +int btrfs_read_superblock(void) +{ + const u64 superblock_offsets[4] = { + 0x10000ull, + 0x4000000ull, + 0x4000000000ull, + 0x4000000000000ull + }; + char raw_sb[BTRFS_SUPER_INFO_SIZE]; + struct btrfs_super_block *sb = (struct btrfs_super_block *) raw_sb; + u64 dev_total_bytes; + int i, root_backup_idx; + + dev_total_bytes = (u64) btrfs_part_info->size * btrfs_part_info->blksz; + + btrfs_info.sb.generation = 0; + + for (i = 0; i < 4; ++i) { + if (superblock_offsets[i] + sizeof(sb) > dev_total_bytes) + break; + + if (!btrfs_devread(superblock_offsets[i], BTRFS_SUPER_INFO_SIZE, + raw_sb)) + break; + + if (btrfs_check_super_csum(raw_sb)) { + printf("%s: invalid checksum at superblock mirror %i\n", + __func__, i); + continue; + } + + btrfs_super_block_to_cpu(sb); + + if (sb->magic != BTRFS_MAGIC) { + printf("%s: invalid BTRFS magic 0x%016llX at " + "superblock mirror %i\n", __func__, sb->magic, + i); + } else if (sb->bytenr != superblock_offsets[i]) { + printf("%s: invalid bytenr 0x%016llX (expected " + "0x%016llX) at superblock mirror %i\n", + __func__, sb->bytenr, superblock_offsets[i], i); + } else if (btrfs_check_super(sb)) { + printf("%s: Checking superblock mirror %i failed\n", + __func__, i); + } else if (sb->generation > btrfs_info.sb.generation) { + memcpy(&btrfs_info.sb, sb, sizeof(*sb)); + } else { + /* Nothing */ + } + } + + if (!btrfs_info.sb.generation) { + printf("%s: No valid BTRFS superblock found!\n", __func__); + return -1; + } + + root_backup_idx = btrfs_newest_root_backup(&btrfs_info.sb); + if (root_backup_idx < 0) { + printf("%s: No valid root_backup found!\n", __func__); + return -1; + } + btrfs_info.root_backup = btrfs_info.sb.super_roots + root_backup_idx; + + if (btrfs_info.root_backup->num_devices != 1) { + printf("%s: Unsupported number of devices (%lli). This driver " + "only supports filesystem on one device.\n", __func__, + btrfs_info.root_backup->num_devices); + return -1; + } + + debug("Chosen superblock with generation = %llu\n", + btrfs_info.sb.generation); + + return 0; +} diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c index ae2ba6a901..f04fa08f64 100644 --- a/fs/ext4/dev.c +++ b/fs/ext4/dev.c @@ -26,7 +26,7 @@ #include <common.h> #include <blk.h> #include <config.h> -#include <memalign.h> +#include <fs_internal.h> #include <ext4fs.h> #include <ext_common.h> #include "ext4_common.h" @@ -47,85 +47,11 @@ void ext4fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info) get_fs()->dev_desc->log2blksz; } -int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf) +int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, + char *buffer) { - unsigned block_len; - int log2blksz = ext4fs_blk_desc->log2blksz; - ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (ext4fs_blk_desc ? - ext4fs_blk_desc->blksz : - 0)); - if (ext4fs_blk_desc == NULL) { - printf("** Invalid Block Device Descriptor (NULL)\n"); - return 0; - } - - /* Check partition boundaries */ - if ((sector + ((byte_offset + byte_len - 1) >> log2blksz)) - >= part_info->size) { - printf("%s read outside partition " LBAFU "\n", __func__, - sector); - return 0; - } - - /* Get the read to the beginning of a partition */ - sector += byte_offset >> log2blksz; - byte_offset &= ext4fs_blk_desc->blksz - 1; - - debug(" <" LBAFU ", %d, %d>\n", sector, byte_offset, byte_len); - - if (byte_offset != 0) { - int readlen; - /* read first part which isn't aligned with start of sector */ - if (blk_dread(ext4fs_blk_desc, part_info->start + sector, 1, - (void *)sec_buf) != 1) { - printf(" ** ext2fs_devread() read error **\n"); - return 0; - } - readlen = min((int)ext4fs_blk_desc->blksz - byte_offset, - byte_len); - memcpy(buf, sec_buf + byte_offset, readlen); - buf += readlen; - byte_len -= readlen; - sector++; - } - - if (byte_len == 0) - return 1; - - /* read sector aligned part */ - block_len = byte_len & ~(ext4fs_blk_desc->blksz - 1); - - if (block_len == 0) { - ALLOC_CACHE_ALIGN_BUFFER(u8, p, ext4fs_blk_desc->blksz); - - block_len = ext4fs_blk_desc->blksz; - blk_dread(ext4fs_blk_desc, part_info->start + sector, 1, - (void *)p); - memcpy(buf, p, byte_len); - return 1; - } - - if (blk_dread(ext4fs_blk_desc, part_info->start + sector, - block_len >> log2blksz, (void *)buf) != - block_len >> log2blksz) { - printf(" ** %s read error - block\n", __func__); - return 0; - } - block_len = byte_len & ~(ext4fs_blk_desc->blksz - 1); - buf += block_len; - byte_len -= block_len; - sector += block_len / ext4fs_blk_desc->blksz; - - if (byte_len != 0) { - /* read rest of data which are not in whole sector */ - if (blk_dread(ext4fs_blk_desc, part_info->start + sector, 1, - (void *)sec_buf) != 1) { - printf("* %s read error - last part\n", __func__); - return 0; - } - memcpy(buf, sec_buf, byte_len); - } - return 1; + return fs_devread(get_fs()->dev_desc, part_info, sector, byte_offset, + byte_len, buffer); } int ext4_read_superblock(char *buffer) diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 621c61e5c7..31952f48b9 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -432,6 +432,10 @@ uint16_t ext4fs_checksum_update(uint32_t i) crc = ext2fs_crc16(crc, desc, offset); offset += sizeof(desc->bg_checksum); /* skip checksum */ assert(offset == sizeof(*desc)); + if (offset < fs->gdsize) { + crc = ext2fs_crc16(crc, (__u8 *)desc + offset, + fs->gdsize - offset); + } } return crc; diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index 081509dbb4..b0c7303aa4 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -167,6 +167,7 @@ int ext4fs_ls(const char *dirname) FILETYPE_DIRECTORY); if (status != 1) { printf("** Can not find directory. **\n"); + ext4fs_free_node(dirnode, &ext4fs_root->diropen); return 1; } diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 36a309c73c..7fe78439cf 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -495,7 +495,7 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize) return -1; } - block = memalign(ARCH_DMA_MINALIGN, cur_dev->blksz); + block = malloc_cache_aligned(cur_dev->blksz); if (block == NULL) { debug("Error: allocating block\n"); return -1; @@ -599,7 +599,7 @@ static int get_fs_info(fsdata *mydata) mydata->fatbufnum = -1; mydata->fat_dirty = 0; - mydata->fatbuf = memalign(ARCH_DMA_MINALIGN, FATBUFSIZE); + mydata->fatbuf = malloc_cache_aligned(FATBUFSIZE); if (mydata->fatbuf == NULL) { debug("Error: allocating memory\n"); return -1; @@ -710,13 +710,14 @@ static void fat_itr_child(fat_itr *itr, fat_itr *parent) itr->fsdata = parent->fsdata; if (clustnum > 0) { itr->clust = clustnum; + itr->is_root = 0; } else { itr->clust = parent->fsdata->root_cluster; + itr->is_root = 1; } itr->dent = NULL; itr->remaining = 0; itr->last_cluster = 0; - itr->is_root = 0; } static void *next_cluster(fat_itr *itr) @@ -1037,13 +1038,16 @@ int fat_exists(const char *filename) fat_itr *itr; int ret; - itr = malloc(sizeof(fat_itr)); + itr = malloc_cache_aligned(sizeof(fat_itr)); + if (!itr) + return 0; ret = fat_itr_root(itr, &fsdata); if (ret) - return 0; + goto out; ret = fat_itr_resolve(itr, filename, TYPE_ANY); free(fsdata.fatbuf); +out: free(itr); return ret == 0; } @@ -1054,10 +1058,12 @@ int fat_size(const char *filename, loff_t *size) fat_itr *itr; int ret; - itr = malloc(sizeof(fat_itr)); + itr = malloc_cache_aligned(sizeof(fat_itr)); + if (!itr) + return -ENOMEM; ret = fat_itr_root(itr, &fsdata); if (ret) - return ret; + goto out_free_itr; ret = fat_itr_resolve(itr, filename, TYPE_FILE); if (ret) { @@ -1071,12 +1077,13 @@ int fat_size(const char *filename, loff_t *size) *size = 0; ret = 0; } - goto out; + goto out_free_both; } *size = FAT2CPU32(itr->dent->size); +out_free_both: free(fsdata.fatbuf); -out: +out_free_itr: free(itr); return ret; } @@ -1088,20 +1095,23 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer, fat_itr *itr; int ret; - itr = malloc(sizeof(fat_itr)); + itr = malloc_cache_aligned(sizeof(fat_itr)); + if (!itr) + return -ENOMEM; ret = fat_itr_root(itr, &fsdata); if (ret) - return ret; + goto out_free_itr; ret = fat_itr_resolve(itr, filename, TYPE_FILE); if (ret) - goto out; + goto out_free_both; printf("reading %s\n", filename); ret = get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread); -out: +out_free_both: free(fsdata.fatbuf); +out_free_itr: free(itr); return ret; } @@ -1147,17 +1157,18 @@ int fat_opendir(const char *filename, struct fs_dir_stream **dirsp) ret = fat_itr_root(&dir->itr, &dir->fsdata); if (ret) - goto fail; + goto fail_free_dir; ret = fat_itr_resolve(&dir->itr, filename, TYPE_DIR); if (ret) - goto fail; + goto fail_free_both; *dirsp = (struct fs_dir_stream *)dir; return 0; -fail: +fail_free_both: free(dir->fsdata.fatbuf); +fail_free_dir: free(dir); return ret; } @@ -14,6 +14,7 @@ #include <fs.h> #include <sandboxfs.h> #include <ubifs_uboot.h> +#include <btrfs.h> #include <asm/io.h> #include <div64.h> #include <linux/math64.h> @@ -219,6 +220,22 @@ static struct fstype_info fstypes[] = { .opendir = fs_opendir_unsupported, }, #endif +#ifdef CONFIG_FS_BTRFS + { + .fstype = FS_TYPE_BTRFS, + .name = "btrfs", + .null_dev_desc_ok = false, + .probe = btrfs_probe, + .close = btrfs_close, + .ls = btrfs_ls, + .exists = btrfs_exists, + .size = btrfs_size, + .read = btrfs_read, + .write = fs_write_unsupported, + .uuid = btrfs_uuid, + .opendir = fs_opendir_unsupported, + }, +#endif { .fstype = FS_TYPE_ANY, .name = "unsupported", diff --git a/fs/fs_internal.c b/fs/fs_internal.c new file mode 100644 index 0000000000..58b441030c --- /dev/null +++ b/fs/fs_internal.c @@ -0,0 +1,92 @@ +/* + * 2017 by Marek Behun <marek.behun@nic.cz> + * + * Derived from code in ext4/dev.c, which was based on reiserfs/dev.c + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <compiler.h> +#include <part.h> +#include <memalign.h> + +int fs_devread(struct blk_desc *blk, disk_partition_t *partition, + lbaint_t sector, int byte_offset, int byte_len, char *buf) +{ + unsigned block_len; + int log2blksz = blk->log2blksz; + ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (blk ? blk->blksz : 0)); + if (blk == NULL) { + printf("** Invalid Block Device Descriptor (NULL)\n"); + return 0; + } + + /* Check partition boundaries */ + if ((sector + ((byte_offset + byte_len - 1) >> log2blksz)) + >= partition->size) { + printf("%s read outside partition " LBAFU "\n", __func__, + sector); + return 0; + } + + /* Get the read to the beginning of a partition */ + sector += byte_offset >> log2blksz; + byte_offset &= blk->blksz - 1; + + debug(" <" LBAFU ", %d, %d>\n", sector, byte_offset, byte_len); + + if (byte_offset != 0) { + int readlen; + /* read first part which isn't aligned with start of sector */ + if (blk_dread(blk, partition->start + sector, 1, + (void *)sec_buf) != 1) { + printf(" ** %s read error **\n", __func__); + return 0; + } + readlen = min((int)blk->blksz - byte_offset, + byte_len); + memcpy(buf, sec_buf + byte_offset, readlen); + buf += readlen; + byte_len -= readlen; + sector++; + } + + if (byte_len == 0) + return 1; + + /* read sector aligned part */ + block_len = byte_len & ~(blk->blksz - 1); + + if (block_len == 0) { + ALLOC_CACHE_ALIGN_BUFFER(u8, p, blk->blksz); + + block_len = blk->blksz; + blk_dread(blk, partition->start + sector, 1, + (void *)p); + memcpy(buf, p, byte_len); + return 1; + } + + if (blk_dread(blk, partition->start + sector, + block_len >> log2blksz, (void *)buf) != + block_len >> log2blksz) { + printf(" ** %s read error - block\n", __func__); + return 0; + } + block_len = byte_len & ~(blk->blksz - 1); + buf += block_len; + byte_len -= block_len; + sector += block_len / blk->blksz; + + if (byte_len != 0) { + /* read rest of data which are not in whole sector */ + if (blk_dread(blk, partition->start + sector, 1, + (void *)sec_buf) != 1) { + printf("* %s read error - last part\n", __func__); + return 0; + } + memcpy(buf, sec_buf, byte_len); + } + return 1; +} diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 4c6dfbf249..6bf1943958 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -201,7 +201,7 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf) retlen = NAND_CACHE_SIZE; if (nand_read(mtd, nand_cache_off, - &retlen, nand_cache) != 0 || + &retlen, nand_cache) < 0 || retlen != NAND_CACHE_SIZE) { printf("read_nand_cached: error reading nand off %#x size %d bytes\n", nand_cache_off, NAND_CACHE_SIZE); @@ -300,7 +300,7 @@ static int read_onenand_cached(u32 off, u32 size, u_char *buf) retlen = ONENAND_CACHE_SIZE; if (onenand_read(&onenand_mtd, onenand_cache_off, retlen, - &retlen, onenand_cache) != 0 || + &retlen, onenand_cache) < 0 || retlen != ONENAND_CACHE_SIZE) { printf("read_onenand_cached: error reading nand off %#x size %d bytes\n", onenand_cache_off, ONENAND_CACHE_SIZE); diff --git a/fs/jffs2/jffs2_nand_1pass.c b/fs/jffs2/jffs2_nand_1pass.c index 1d63fc9434..b16005e604 100644 --- a/fs/jffs2/jffs2_nand_1pass.c +++ b/fs/jffs2/jffs2_nand_1pass.c @@ -798,7 +798,7 @@ jffs2_1pass_build_lists(struct part_info * part) struct mtdids *id = part->dev->id; mtd = get_nand_dev_by_index(id->num); if (!mtd) { - error("\nno NAND devices available\n"); + pr_err("\nno NAND devices available\n"); return 0; } diff --git a/fs/jffs2/mini_inflate.c b/fs/jffs2/mini_inflate.c index 2f13412f98..7bfbdb6801 100644 --- a/fs/jffs2/mini_inflate.c +++ b/fs/jffs2/mini_inflate.c @@ -16,7 +16,7 @@ static unsigned char huffman_order[] = {16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15}; -inline void cramfs_memset(int *s, const int c, size n) +static inline void cramfs_memset(int *s, const int c, size n) { n--; for (;n > 0; n--) s[n] = c; @@ -65,8 +65,8 @@ static void init_stream(struct bitstream *stream, unsigned char *data, /* pull 'bits' bits out of the stream. The last bit pulled it returned as the * msb. (section 3.1.1) */ -inline unsigned long pull_bits(struct bitstream *stream, - const unsigned int bits) +static inline unsigned long pull_bits(struct bitstream *stream, + const unsigned int bits) { unsigned long ret; int i; @@ -85,7 +85,7 @@ inline unsigned long pull_bits(struct bitstream *stream, return ret; } -inline int pull_bit(struct bitstream *stream) +static inline int pull_bit(struct bitstream *stream) { int ret = ((*(stream->data) >> stream->bit) & 1); if (stream->bit++ == 7) { diff --git a/fs/reiserfs/dev.c b/fs/reiserfs/dev.c index 5a1ab0a364..7b786e4ed3 100644 --- a/fs/reiserfs/dev.c +++ b/fs/reiserfs/dev.c @@ -9,7 +9,7 @@ #include <common.h> #include <config.h> #include <reiserfs.h> - +#include <fs_internal.h> #include "reiserfs_private.h" static struct blk_desc *reiserfs_blk_desc; @@ -22,78 +22,8 @@ void reiserfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info) part_info = info; } - -int reiserfs_devread (int sector, int byte_offset, int byte_len, char *buf) +int reiserfs_devread(int sector, int byte_offset, int byte_len, char *buf) { - char sec_buf[SECTOR_SIZE]; - unsigned block_len; -/* - unsigned len = byte_len; - u8 *start = buf; -*/ - /* - * Check partition boundaries - */ - if (sector < 0 - || ((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS)) - >= part_info->size)) { -/* errnum = ERR_OUTSIDE_PART; */ - printf (" ** reiserfs_devread() read outside partition\n"); - return 0; - } - - /* - * Get the read to the beginning of a partition. - */ - sector += byte_offset >> SECTOR_BITS; - byte_offset &= SECTOR_SIZE - 1; - -#if defined(DEBUG) - printf (" <%d, %d, %d> ", sector, byte_offset, byte_len); -#endif - - - if (reiserfs_blk_desc == NULL) - return 0; - - - if (byte_offset != 0) { - /* read first part which isn't aligned with start of sector */ - if (reiserfs_blk_desc->block_read(reiserfs_blk_desc, - part_info->start + sector, - 1, (void *)sec_buf) != 1) { - printf (" ** reiserfs_devread() read error\n"); - return 0; - } - memcpy(buf, sec_buf+byte_offset, min(SECTOR_SIZE-byte_offset, byte_len)); - buf+=min(SECTOR_SIZE-byte_offset, byte_len); - byte_len-=min(SECTOR_SIZE-byte_offset, byte_len); - sector++; - } - - /* read sector aligned part */ - block_len = byte_len & ~(SECTOR_SIZE-1); - if (reiserfs_blk_desc->block_read(reiserfs_blk_desc, - part_info->start + sector, - block_len / SECTOR_SIZE, (void *)buf) - != block_len/SECTOR_SIZE) { - printf (" ** reiserfs_devread() read error - block\n"); - return 0; - } - buf+=block_len; - byte_len-=block_len; - sector+= block_len/SECTOR_SIZE; - - if ( byte_len != 0 ) { - /* read rest of data which are not in whole sector */ - if (reiserfs_blk_desc->block_read(reiserfs_blk_desc, - part_info->start + sector, - 1, (void *)sec_buf) != 1) { - printf (" ** reiserfs_devread() read error - last part\n"); - return 0; - } - memcpy(buf, sec_buf, byte_len); - } - - return 1; + return fs_devread(reiserfs_blk_desc, part_info, sector, byte_offset, + byte_len, buf); } diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c index bd66d31697..2a70e4a543 100644 --- a/fs/yaffs2/yaffs_uboot_glue.c +++ b/fs/yaffs2/yaffs_uboot_glue.c @@ -168,7 +168,7 @@ void cmd_yaffs_devconfig(char *_mp, int flash_dev, mtd = get_nand_dev_by_index(flash_dev); if (!mtd) { - error("\nno NAND devices available\n"); + pr_err("\nno NAND devices available\n"); return; } diff --git a/fs/zfs/dev.c b/fs/zfs/dev.c index 2f409e66cd..7dda42b48b 100644 --- a/fs/zfs/dev.c +++ b/fs/zfs/dev.c @@ -11,6 +11,7 @@ #include <common.h> #include <config.h> +#include <fs_internal.h> #include <zfs_common.h> static struct blk_desc *zfs_blk_desc; @@ -25,87 +26,6 @@ void zfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info) /* err */ int zfs_devread(int sector, int byte_offset, int byte_len, char *buf) { - short sec_buffer[SECTOR_SIZE/sizeof(short)]; - char *sec_buf = (char *)sec_buffer; - unsigned block_len; - - /* - * Check partition boundaries - */ - if ((sector < 0) || - ((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS)) >= - part_info->size)) { - /* errnum = ERR_OUTSIDE_PART; */ - printf(" ** zfs_devread() read outside partition sector %d\n", sector); - return 1; - } - - /* - * Get the read to the beginning of a partition. - */ - sector += byte_offset >> SECTOR_BITS; - byte_offset &= SECTOR_SIZE - 1; - - debug(" <%d, %d, %d>\n", sector, byte_offset, byte_len); - - if (zfs_blk_desc == NULL) { - printf("** Invalid Block Device Descriptor (NULL)\n"); - return 1; - } - - if (byte_offset != 0) { - /* read first part which isn't aligned with start of sector */ - if (zfs_blk_desc->block_read(zfs_blk_desc, - part_info->start + sector, 1, - (void *)sec_buf) != 1) { - printf(" ** zfs_devread() read error **\n"); - return 1; - } - memcpy(buf, sec_buf + byte_offset, - min(SECTOR_SIZE - byte_offset, byte_len)); - buf += min(SECTOR_SIZE - byte_offset, byte_len); - byte_len -= min(SECTOR_SIZE - byte_offset, byte_len); - sector++; - } - - if (byte_len == 0) - return 0; - - /* read sector aligned part */ - block_len = byte_len & ~(SECTOR_SIZE - 1); - - if (block_len == 0) { - u8 p[SECTOR_SIZE]; - - block_len = SECTOR_SIZE; - zfs_blk_desc->block_read(zfs_blk_desc, - part_info->start + sector, - 1, (void *)p); - memcpy(buf, p, byte_len); - return 0; - } - - if (zfs_blk_desc->block_read(zfs_blk_desc, part_info->start + sector, - block_len / SECTOR_SIZE, - (void *)buf) != block_len / SECTOR_SIZE) { - printf(" ** zfs_devread() read error - block\n"); - return 1; - } - - block_len = byte_len & ~(SECTOR_SIZE - 1); - buf += block_len; - byte_len -= block_len; - sector += block_len / SECTOR_SIZE; - - if (byte_len != 0) { - /* read rest of data which are not in whole sector */ - if (zfs_blk_desc->block_read(zfs_blk_desc, - part_info->start + sector, - 1, (void *)sec_buf) != 1) { - printf(" ** zfs_devread() read error - last part\n"); - return 1; - } - memcpy(buf, sec_buf, byte_len); - } - return 0; + return fs_devread(zfs_blk_desc, part_info, sector, byte_offset, + byte_len, buf); } diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h new file mode 100644 index 0000000000..0f5160c6f1 --- /dev/null +++ b/include/asm-generic/io.h @@ -0,0 +1,110 @@ +/* + * Generic I/O functions. + * + * Copyright (c) 2016 Imagination Technologies Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_GENERIC_IO_H__ +#define __ASM_GENERIC_IO_H__ + +/* + * This file should be included at the end of each architecture-specific + * asm/io.h such that we may provide generic implementations without + * conflicting with architecture-specific code. + */ + +#ifndef __ASSEMBLY__ + +/** + * phys_to_virt() - Return a virtual address mapped to a given physical address + * @paddr: the physical address + * + * Returns a virtual address which the CPU can access that maps to the physical + * address @paddr. This should only be used where it is known that no dynamic + * mapping is required. In general, map_physmem should be used instead. + * + * Returns: a virtual address which maps to @paddr + */ +#ifndef phys_to_virt +static inline void *phys_to_virt(phys_addr_t paddr) +{ + return (void *)(unsigned long)paddr; +} +#endif + +/** + * virt_to_phys() - Return the physical address that a virtual address maps to + * @vaddr: the virtual address + * + * Returns the physical address which the CPU-accessible virtual address @vaddr + * maps to. + * + * Returns: the physical address which @vaddr maps to + */ +#ifndef virt_to_phys +static inline phys_addr_t virt_to_phys(void *vaddr) +{ + return (phys_addr_t)((unsigned long)vaddr); +} +#endif + +/* + * Flags for use with map_physmem() & unmap_physmem(). Architectures need not + * support all of these, in which case they will be defined as zero here & + * ignored. Callers that may run on multiple architectures should therefore + * treat them as hints rather than requirements. + */ +#ifndef MAP_NOCACHE +# define MAP_NOCACHE 0 /* Produce an uncached mapping */ +#endif +#ifndef MAP_WRCOMBINE +# define MAP_WRCOMBINE 0 /* Allow write-combining on the mapping */ +#endif +#ifndef MAP_WRBACK +# define MAP_WRBACK 0 /* Map using write-back caching */ +#endif +#ifndef MAP_WRTHROUGH +# define MAP_WRTHROUGH 0 /* Map using write-through caching */ +#endif + +/** + * map_physmem() - Return a virtual address mapped to a given physical address + * @paddr: the physical address + * @len: the length of the required mapping + * @flags: flags affecting the type of mapping + * + * Return a virtual address through which the CPU may access the memory at + * physical address @paddr. The mapping will be valid for at least @len bytes, + * and may be affected by flags passed to the @flags argument. This function + * may create new mappings, so should generally be paired with a matching call + * to unmap_physmem once the caller is finished with the memory in question. + * + * Returns: a virtual address suitably mapped to @paddr + */ +#ifndef map_physmem +static inline void *map_physmem(phys_addr_t paddr, unsigned long len, + unsigned long flags) +{ + return phys_to_virt(paddr); +} +#endif + +/** + * unmap_physmem() - Remove mappings created by a prior call to map_physmem() + * @vaddr: the virtual address which map_physmem() previously returned + * @flags: flags matching those originally passed to map_physmem() + * + * Unmap memory which was previously mapped by a call to map_physmem(). If + * map_physmem() dynamically created a mapping for the memory in question then + * unmap_physmem() will remove that mapping. + */ +#ifndef unmap_physmem +static inline void unmap_physmem(void *vaddr, unsigned long flags) +{ +} +#endif + +#endif /* !__ASSEMBLY__ */ +#endif /* __ASM_GENERIC_IO_H__ */ diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index daf021b647..b6535705a5 100644 --- a/include/asm-generic/sections.h +++ b/include/asm-generic/sections.h @@ -22,8 +22,8 @@ extern char __kprobes_text_start[], __kprobes_text_end[]; extern char __entry_text_start[], __entry_text_end[]; extern char __initdata_begin[], __initdata_end[]; extern char __start_rodata[], __end_rodata[]; -extern char __efi_hello_world_begin[]; -extern char __efi_hello_world_end[]; +extern char __efi_helloworld_begin[]; +extern char __efi_helloworld_end[]; /* Start and end of .ctors section - used for constructor calls. */ extern char __ctors_start[], __ctors_end[]; diff --git a/include/blk.h b/include/blk.h index 1965812a9d..41b4d7efa8 100644 --- a/include/blk.h +++ b/include/blk.h @@ -8,6 +8,8 @@ #ifndef BLK_H #define BLK_H +#include <efi.h> + #ifdef CONFIG_SYS_64BIT_LBA typedef uint64_t lbaint_t; #define LBAFlength "ll" @@ -41,6 +43,17 @@ enum if_type { #define BLK_REV_SIZE 8 /* + * Identifies the partition table type (ie. MBR vs GPT GUID) signature + */ +enum sig_type { + SIG_TYPE_NONE, + SIG_TYPE_MBR, + SIG_TYPE_GUID, + + SIG_TYPE_COUNT /* Number of signature types */ +}; + +/* * With driver model (CONFIG_BLK) this is uclass platform data, accessible * with dev_get_uclass_platdata(dev) */ @@ -67,6 +80,11 @@ struct blk_desc { char vendor[BLK_VEN_SIZE + 1]; /* device vendor string */ char product[BLK_PRD_SIZE + 1]; /* device product number */ char revision[BLK_REV_SIZE + 1]; /* firmware revision */ + enum sig_type sig_type; /* Partition table signature type */ + union { + uint32_t mbr_sig; /* MBR integer signature */ + efi_guid_t guid_sig; /* GPT GUID Signature */ + }; #if CONFIG_IS_ENABLED(BLK) /* * For now we have a few functions which take struct blk_desc as a diff --git a/include/boot_fit.h b/include/boot_fit.h index b7d2462dd9..e16ae5bafa 100644 --- a/include/boot_fit.h +++ b/include/boot_fit.h @@ -5,5 +5,10 @@ * SPDX-License-Identifier: GPL-2.0+ */ -int fdt_offset(void *fit); -void *locate_dtb_in_fit(void *fit); +/** + * locate_dtb_in_fit - Find a DTB matching the board in a FIT image + * @fit: pointer to the FIT image + * + * @return a pointer to a matching DTB blob if found, NULL otherwise + */ +void *locate_dtb_in_fit(const void *fit); diff --git a/include/btrfs.h b/include/btrfs.h new file mode 100644 index 0000000000..7390975ea7 --- /dev/null +++ b/include/btrfs.h @@ -0,0 +1,21 @@ +/* + * BTRFS filesystem implementation for U-Boot + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __U_BOOT_BTRFS_H__ +#define __U_BOOT_BTRFS_H__ + +int btrfs_probe(struct blk_desc *, disk_partition_t *); +int btrfs_ls(const char *); +int btrfs_exists(const char *); +int btrfs_size(const char *, loff_t *); +int btrfs_read(const char *, void *, loff_t, loff_t, loff_t *); +void btrfs_close(void); +int btrfs_uuid(char *); +void btrfs_list_subvols(void); + +#endif /* __U_BOOT_BTRFS_H__ */ diff --git a/include/charset.h b/include/charset.h index 39279f746a..37a3278499 100644 --- a/include/charset.h +++ b/include/charset.h @@ -9,7 +9,7 @@ #ifndef __CHARSET_H_ #define __CHARSET_H_ -#define MAX_UTF8_PER_UTF16 4 +#define MAX_UTF8_PER_UTF16 3 /** * utf16_strlen() - Get the length of an utf16 string @@ -52,7 +52,7 @@ uint16_t *utf16_strdup(const uint16_t *s); * Converts 'size' characters of the utf16 string 'src' to utf8 * written to the 'dest' buffer. * - * NOTE that a single utf16 character can generate up to 4 utf8 + * NOTE that a single utf16 character can generate up to 3 utf8 * characters. See MAX_UTF8_PER_UTF16. * * @dest the destination buffer to write the utf8 characters diff --git a/include/common.h b/include/common.h index aaed131671..e14e1daa88 100644 --- a/include/common.h +++ b/include/common.h @@ -23,12 +23,15 @@ typedef volatile unsigned char vu_char; #include <time.h> #include <asm-offsets.h> #include <linux/bitops.h> +#include <linux/bug.h> #include <linux/delay.h> #include <linux/types.h> +#include <linux/printk.h> #include <linux/string.h> #include <linux/stringify.h> #include <asm/ptrace.h> #include <stdarg.h> +#include <stdio.h> #include <linux/kernel.h> #include <part.h> @@ -54,11 +57,6 @@ typedef volatile unsigned char vu_char; #define _SPL_BUILD 0 #endif -/* Define this at the top of a file to add a prefix to debug messages */ -#ifndef pr_fmt -#define pr_fmt(fmt) fmt -#endif - /* * Output a debug text when condition "cond" is met. The "cond" should be * computed by a preprocessor in the best case, allowing for the best @@ -93,19 +91,6 @@ void __assert_fail(const char *assertion, const char *file, unsigned line, ({ if (!(x) && _DEBUG) \ __assert_fail(#x, __FILE__, __LINE__, __func__); }) -#define error(fmt, args...) do { \ - printf("ERROR: " pr_fmt(fmt) "\nat %s:%d/%s()\n", \ - ##args, __FILE__, __LINE__, __func__); \ -} while (0) - -#ifndef BUG -#define BUG() do { \ - printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \ - panic("BUG!"); \ -} while (0) -#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0) -#endif /* BUG */ - typedef void (interrupt_handler_t)(void *); #include <asm/u-boot.h> /* boot information for Linux kernel */ @@ -529,6 +514,8 @@ int is_core_valid (unsigned int); */ int arch_cpu_init(void); +void s_init(void); + int checkcpu (void); int checkicache (void); int checkdcache (void); @@ -624,6 +611,7 @@ ulong usec2ticks (unsigned long usec); ulong ticks2usec (unsigned long ticks); /* lib/gunzip.c */ +int gzip_parse_header(const unsigned char *src, unsigned long len); int gunzip(void *, int, unsigned char *, unsigned long *); int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, int stoponerr, int offset); @@ -699,46 +687,6 @@ unsigned int rand_r(unsigned int *seedp); /* serial stuff */ int serial_printf (const char *fmt, ...) __attribute__ ((format (__printf__, 1, 2))); -/* stdin */ -int getc(void); -int tstc(void); - -/* stdout */ -#if !defined(CONFIG_SPL_BUILD) || \ - (defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL_SUPPORT)) || \ - (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \ - defined(CONFIG_SPL_SERIAL_SUPPORT)) -void putc(const char c); -void puts(const char *s); -int printf(const char *fmt, ...) - __attribute__ ((format (__printf__, 1, 2))); -int vprintf(const char *fmt, va_list args); -#else -#define putc(...) do { } while (0) -#define puts(...) do { } while (0) -#define printf(...) do { } while (0) -#define vprintf(...) do { } while (0) -#endif - -/* stderr */ -#define eputc(c) fputc(stderr, c) -#define eputs(s) fputs(stderr, s) -#define eprintf(fmt,args...) fprintf(stderr,fmt ,##args) - -/* - * FILE based functions (can only be used AFTER relocation!) - */ -#define stdin 0 -#define stdout 1 -#define stderr 2 -#define MAX_FILES 3 - -int fprintf(int file, const char *fmt, ...) - __attribute__ ((format (__printf__, 2, 3))); -void fputs(int file, const char *s); -void fputc(int file, const char c); -int ftstc(int file); -int fgetc(int file); /* lib/gzip.c */ int gzip(void *dst, unsigned long *lenp, diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 9ed6b9892c..e0d0034ed3 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -112,6 +112,11 @@ #define BOOTENV_SHARED_EFI \ "boot_efi_binary=" \ + "if fdt addr ${fdt_addr_r}; then " \ + "bootefi bootmgr ${fdt_addr_r};" \ + "else " \ + "bootefi bootmgr ${fdtcontroladdr};" \ + "fi;" \ "load ${devtype} ${devnum}:${distro_bootpart} " \ "${kernel_addr_r} efi/boot/"BOOTEFI_NAME"; " \ "if fdt addr ${fdt_addr_r}; then " \ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 415ce46e0d..96294679bf 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -263,12 +263,6 @@ #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_HOST -#ifdef CONFIG_USB_MUSB_GADGET -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_RNDIS -#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" -#endif /* CONFIG_USB_MUSB_GADGET */ - /* * Disable MMC DM for SPL build and can be re-enabled after adding * DM support in SPL diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 708a98f827..43fcfb2593 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -21,6 +21,7 @@ * header. That is 0x800FFFC0--0x80100000 should not be used for any * other needs. */ + #define CONFIG_SYS_TEXT_BASE 0x80100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 @@ -33,16 +34,6 @@ /* Hardware drivers */ -/* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) - -/* select serial console configuration */ -#define CONFIG_CONS_INDEX 3 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */ - - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -64,15 +55,9 @@ #endif /* CONFIG_USB_MUSB_HOST */ -#ifdef CONFIG_USB_MUSB_GADGET -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_RNDIS -#endif /* CONFIG_USB_MUSB_GADGET */ - #endif /* CONFIG_USB_MUSB_AM35X */ /* I2C */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 @@ -250,8 +235,6 @@ #define CONFIG_SPL_FRAMEWORK #undef CONFIG_SPL_TEXT_BASE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ - CONFIG_SPL_TEXT_BASE) #undef CONFIG_SPL_BSS_START_ADDR #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index b84f6e3480..743f953602 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -89,9 +89,9 @@ #undef CONFIG_USB_GADGET_DOWNLOAD #undef CONFIG_USB_GADGET_VBUS_DRAW -#undef CONFIG_G_DNL_MANUFACTURER -#undef CONFIG_G_DNL_VENDOR_NUM -#undef CONFIG_G_DNL_PRODUCT_NUM +#undef CONFIG_USB_GADGET_MANUFACTURER +#undef CONFIG_USB_GADGET_VENDOR_NUM +#undef CONFIG_USB_GADGET_PRODUCT_NUM #undef CONFIG_USB_GADGET_DUALSPEED #endif @@ -326,4 +326,9 @@ #define NANDBOOT #endif /* CONFIG_NAND */ +#if defined(CONFIG_TI_SECURE_DEVICE) +/* Avoid relocating onto firewalled area at end of DRAM */ +#define CONFIG_PRAM (64 * 1024) +#endif /* CONFIG_TI_SECURE_DEVICE */ + #endif /* __CONFIG_AM43XX_EVM_H */ diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 0c70c53050..ebb04746c3 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -44,7 +44,8 @@ #define PARTS_DEFAULT \ /* Linux partitions */ \ "uuid_disk=${uuid_gpt_disk};" \ - "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ + "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \ + "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \ /* Android partitions */ \ "partitions_android=" \ "uuid_disk=${uuid_gpt_disk};" \ @@ -58,6 +59,7 @@ "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \ "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ "name=system,size=768M,uuid=${uuid_gpt_system};" \ + "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \ "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \ "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ @@ -72,7 +74,6 @@ #include <configs/ti_omap5_common.h> /* Enhance our eMMC support / experience. */ -#define CONFIG_RANDOM_UUID #define CONFIG_HSMMC2_8BIT /* CPSW Ethernet */ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 9022a9d7bb..5a51f3c556 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -23,7 +23,6 @@ #ifdef CONFIG_SPL #include "imx6_spl.h" -#define CONFIG_SPL_PAD_TO 0x11000 /* 4k IVT/DCD, 64k SPL */ #endif #define CONFIG_CMDLINE_TAG diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 1d4971c59f..9450784521 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -23,16 +23,6 @@ /* general purpose I/O */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ -/* LCD */ -#define LCD_BPP LCD_COLOR16 -#define LCD_OUTPUT_BPP 24 -#define CONFIG_LCD_LOGO -#define CONFIG_LCD_INFO -#define CONFIG_LCD_INFO_BELOW_LOGO -#define CONFIG_ATMEL_HLCD -#define CONFIG_ATMEL_LCD_RGB565 - - /* * BOOTP options */ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 185c749d78..44af4d3dee 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -283,12 +283,6 @@ #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_OTG -#ifdef CONFIG_USB_MUSB_GADGET -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_RNDIS -#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" -#endif /* CONFIG_USB_MUSB_GADGET */ - #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) /* disable host part of MUSB in SPL */ /* disable EFI partitions and partition UUID support */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h new file mode 100644 index 0000000000..14c471228f --- /dev/null +++ b/include/configs/cl-som-imx7.h @@ -0,0 +1,192 @@ +/* + * Copyright (C) 2015 CompuLab, Ltd. + * + * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CL_SOM_IMX7_CONFIG_H +#define __CL_SOM_IMX7_CONFIG_H + +#include "mx7_common.h" + +#define CONFIG_DBG_MONITOR + +#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) + +#define CONFIG_BOARD_LATE_INIT + +/* Uncomment to enable secure boot support */ +/* #define CONFIG_SECURE_BOOT */ +#define CONFIG_CSF_SIZE 0x4000 + +/* Network */ +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +/* ENET1 */ +#define IMX_FEC_BASE ENET_IPS_BASE_ADDR + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE3000 +#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 + +#undef CONFIG_BOOTM_NETBSD +#undef CONFIG_BOOTM_PLAN9 +#undef CONFIG_BOOTM_RTEMS + +/* I2C configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */ +#define CONFIG_SYS_I2C_SPEED 100000 +#define SYS_I2C_BUS_SOM 0 + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM + +#define CONFIG_PCA953X +#define CONFIG_CMD_PCA953X +#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 +#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } + +#undef CONFIG_SYS_AUTOLOAD +#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CONFIG_BOOTCOMMAND +#undef CONFIG_BOOTDELAY + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_SYS_AUTOLOAD "no" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=off\0" \ + "script=boot.scr\0" \ + "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \ + "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \ + "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \ + "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \ + "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \ + "kernel=zImage\0" \ + "console=ttymxc0\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdtfile=imx7d-sbc-imx7.dtb\0" \ + "fdtaddr=0x83000000\0" \ + "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \ + "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \ + "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \ + "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \ + "mmcbootscript=" \ + "if run mmc_config; then " \ + "setenv storagetype mmc;" \ + "setenv storagedev ${mmcdev}:${mmcpart};" \ + "if run loadscript; then " \ + "run bootscript; " \ + "fi; " \ + "fi;\0" \ + "mmcboot=" \ + "if run mmc_config; then " \ + "setenv storagetype mmc;" \ + "setenv storagedev ${mmcdev}:${mmcpart};" \ + "if run loadkernel; then " \ + "if run loadfdt; then " \ + "run storagebootcmd;" \ + "fi; " \ + "fi; " \ + "fi;\0" \ + "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \ + "run mmcbootscript\0" \ + "usbbootscript=setenv usbdev ${usbdev_def}; " \ + "setenv storagetype usb;" \ + "setenv storagedev ${usbdev}:${usbpart};" \ + "if run loadscript; then " \ + "run bootscript; " \ + "fi; " \ + "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \ + "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \ + "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \ + +#define CONFIG_BOOTCOMMAND \ + "echo SD boot attempt ...; run sdbootscript; run sdboot; " \ + "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \ + "echo USB boot attempt ...; run usbbootscript; " + +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* SPI Flash support */ +#define CONFIG_SPI +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) + +/* FLASH and environment organization */ +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + +/* MMC Config*/ +#define CONFIG_FSL_USDHC +#ifdef CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR + +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#endif + +/* USB Configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +/* Uncomment to enable iMX thermal driver support */ +/*#define CONFIG_IMX_THERMAL*/ + +/* SPL */ +#include "imx7_spl.h" +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) +#endif /* CONFIG_SPL_BUILD */ + +#endif /* __CONFIG_H */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 5fd9aab03c..7d2c3d6b65 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -21,7 +21,6 @@ #ifdef CONFIG_SPL #include "imx6_spl.h" -#define CONFIG_SPL_PAD_TO 0x11000 /* 4k IVT/DCD, 64k SPL */ #endif #define CONFIG_CMDLINE_TAG diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index c05c64cad7..821b1fe534 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -21,6 +21,16 @@ #endif /* +* Disable DM_* for SPL build and can be re-enabled after adding +* DM support in SPL +*/ +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH +#undef CONFIG_DM_I2C +#undef CONFIG_DM_I2C_COMPAT +#endif +/* * SoC Configuration */ #define CONFIG_MACH_DAVINCI_DA850_EVM @@ -130,18 +140,23 @@ /* * Serial Driver info */ + +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_DIRECT_NOR_BOOT) #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ +#endif #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_SPI #define CONFIG_DAVINCI_SPI -#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif #ifdef CONFIG_USE_SPIFLASH #define CONFIG_SPL_SPI_LOAD @@ -152,11 +167,10 @@ /* * I2C Configuration */ -#define CONFIG_SYS_I2C +#ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_I2C_DAVINCI -#define CONFIG_SYS_DAVINCI_I2C_SPEED 25000 -#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 +#endif /* * Flash & Environment @@ -234,6 +248,17 @@ #define CONFIG_ENV_SIZE (64 << 10) #define CONFIG_ENV_OFFSET (512 << 10) #define CONFIG_ENV_SECT_SIZE (64 << 10) +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_SPI_FLASH_MTD +#endif +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ +#define MTDIDS_DEFAULT "nor0=spi0.0" +#define MTDPARTS_DEFAULT "mtdparts=spi0.0:"\ + "512k(u-boot.ais),"\ + "64k(u-boot-env),"\ + "7552k(kernel-spare),"\ + "64k(MAC-Address)" #endif /* @@ -257,7 +282,29 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_REVISION_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_EXTRA_ENV_SETTINGS "hwconfig=dsp:wake=yes" + +#define CONFIG_BOOTCOMMAND \ + "run envboot; " \ + "run mmcboot; " + +#define DEFAULT_LINUX_BOOT_ENV \ + "loadaddr=0xc0700000\0" \ + "fdtaddr=0xc0600000\0" \ + "scriptaddr=0xc0600000\0" + +#include <environment/ti/mmc.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + DEFAULT_MMC_TI_ARGS \ + "bootpart=0:2\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "fdtfile=da850-evm.dtb\0" \ + "boot_fdt=yes\0" \ + "boot_fit=0\0" \ + "console=ttyS2,115200n8\0" \ + "hwconfig=dsp:wake=yes" #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h new file mode 100644 index 0000000000..0595f60e32 --- /dev/null +++ b/include/configs/dh_imx6.h @@ -0,0 +1,191 @@ +/* + * DHCOM DH-iMX6 PDK board configuration + * + * Copyright (C) 2017 Marek Vasut <marex@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DH_IMX6_CONFIG_H +#define __DH_IMX6_CONFIG_H + +#include <asm/arch/imx-regs.h> + +#include <config_distro_defaults.h> +#include "mx6_common.h" + +/* + * SPI NOR layout: + * 0x00_0000-0x00_ffff ... U-Boot SPL + * 0x01_0000-0x0f_ffff ... U-Boot + * 0x10_0000-0x10_ffff ... U-Boot env #1 + * 0x11_0000-0x11_ffff ... U-Boot env #2 + * 0x12_0000-0x1f_ffff ... UNUSED + */ + +/* SPL */ +#include "imx6_spl.h" /* common IMX6 SPL configuration */ +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x11400 +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_TARGET "u-boot-with-spl.imx" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */ +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_BZIP2 + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M) + +/* Bootcounter */ +#define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_BOOTCOUNT_BE + +/* FEC ethernet */ +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_ARP_TIMEOUT 200UL + +/* Fuses */ +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +/* GPIO */ +#define CONFIG_MXC_GPIO + +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CONFIG_SYS_MMC_ENV_DEV 2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */ + +/* SATA Configs */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +/* SPI Flash Configs */ +#ifdef CONFIG_CMD_SF +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* UART */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* USB Configs */ +#ifdef CONFIG_CMD_USB +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ +#endif + +/* Watchdog */ +#define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_SYS_TEXT_BASE 0x17800000 +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc0,115200\0" \ + "fdt_addr=0x18000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "kernel_addr_r=0x10008000\0" \ + "fdt_addr_r=0x13000000\0" \ + "ramdisk_addr_r=0x18000000\0" \ + "scriptaddr=0x14000000\0" \ + "fdtfile=imx6q-dhcom-pdk2.dtb\0"\ + BOOTENV + +#define CONFIG_BOOTCOMMAND "run distro_bootcmd" + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 2) \ + func(USB, usb, 1) \ + func(SATA, sata, 0) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +#endif + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x20000000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +/* Environment */ +#define CONFIG_ENV_SIZE (16 * 1024) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT + +#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (1024 * 1024) +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_OFFSET_REDUND \ + (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#endif /* __DH_IMX6_CONFIG_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 6c0fc35d3a..3333e5efc5 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -51,7 +51,8 @@ #define PARTS_DEFAULT \ /* Linux partitions */ \ "uuid_disk=${uuid_gpt_disk};" \ - "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ + "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \ + "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \ /* Android partitions */ \ "partitions_android=" \ "uuid_disk=${uuid_gpt_disk};" \ @@ -65,6 +66,7 @@ "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \ "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ "name=system,size=768M,uuid=${uuid_gpt_system};" \ + "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \ "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \ "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ @@ -91,7 +93,6 @@ #include <configs/ti_omap5_common.h> /* Enhance our eMMC support / experience. */ -#define CONFIG_RANDOM_UUID #define CONFIG_HSMMC2_8BIT /* CPSW Ethernet */ diff --git a/include/configs/edison.h b/include/configs/edison.h index d25b50c076..79dd690e71 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -9,11 +9,13 @@ #include <asm/ibmpc.h> +/* ACPI */ +#define CONFIG_LAST_STAGE_INIT + /* Boot */ #define CONFIG_BOOTCOMMAND "run bootcmd" /* DISK Partition support */ -#define CONFIG_RANDOM_UUID /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 531f5bf5aa..01d75d6aa2 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_MXC_UART_BASE UART2_BASE -/* Command definition */ -#undef CONFIG_CMD_IMLS - #define CONFIG_BOARD_NAME EL6Q #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h index 015f25a774..66ead6c117 100644 --- a/include/configs/evb_rk3399.h +++ b/include/configs/evb_rk3399.h @@ -10,12 +10,6 @@ #include <configs/rk3399_common.h> #define CONFIG_SYS_MMC_ENV_DEV 1 -/* - * SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K - */ -#define CONFIG_ENV_OFFSET (96 * 1024) #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 128a6e5aec..a93172ace1 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -146,8 +146,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USBD_HS -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_CDC #define CONFIG_NETCONSOLE /* USB Mass Storage Gadget */ diff --git a/include/configs/h2200.h b/include/configs/h2200.h index 870014ddf4..24ff53f6f1 100644 --- a/include/configs/h2200.h +++ b/include/configs/h2200.h @@ -123,11 +123,9 @@ "bootm ; " #define CONFIG_USB_GADGET_PXA2XX -#define CONFIG_USB_ETHER #define CONFIG_USB_ETH_SUBSET #define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01" -#define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02" #define CONFIG_EXTRA_ENV_SETTINGS \ "stdin=serial\0" \ "stdout=serial\0" \ diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h new file mode 100644 index 0000000000..b89dba6554 --- /dev/null +++ b/include/configs/imx7_spl.h @@ -0,0 +1,61 @@ +/* + * SPL definitions for the i.MX7 SPL + * + * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com + * + * Author: Uri Mashiach <uri.mashiach@compulab.co.il> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __IMX7_SPL_CONFIG_H +#define __IMX7_SPL_CONFIG_H + +#ifdef CONFIG_SPL + +#define CONFIG_SPL_FRAMEWORK + +/* + * see figure 6-22 in i.MX 7Dual/Solo Reference manuals: + * - IMX7D/S OCRAM free area RAM (OCRAM) is from 0x00910000 to + * 0x00946C00. + * - Set the stack at the end of the free area section, at 0x00946BB8. + * - The BOOT ROM loads what they consider the firmware image + * which consists of a 4K header in front of us that contains the IVT, DCD + * and some padding thus 'our' max size is really 0x00946BB8 - 0x00911000. + * 64KB is more then enough for the SPL. + */ +#define CONFIG_SPL_TEXT_BASE 0x00911000 +#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_STACK 0x00946BB8 +/* + * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the + * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a + * boot media (given that boot media specific offset is configured properly). + */ +#define CONFIG_SPL_PAD_TO 0x11000 + +/* MMC support */ +#if defined(CONFIG_SPL_MMC_SUPPORT) +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ +#endif + +/* Define the payload for FAT/EXT support */ +#if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) +# ifdef CONFIG_OF_CONTROL +# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" +# else +# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +# endif +#endif + +#define CONFIG_SPL_BSS_START_ADDR 0x88200000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x88300000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ +#define CONFIG_SYS_TEXT_BASE 0x87800000 + +#endif /* CONFIG_SPL */ + +#endif /* __IMX7_SPL_CONFIG_H */ diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 1950740405..df81c09d86 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -38,7 +38,7 @@ "setenv name_fdt keystone-k2g-ice.dtb; " \ "else if test $name_fdt = undefined; then " \ "echo WARNING: Could not determine device tree to use;"\ - "fi;fi;fi;\0" \ + "fi;fi;fi; setenv fdtfile ${name_fdt}\0" \ "name_mon=skern-k2g.bin\0" \ "name_ubi=k2g-evm-ubifs.ubi\0" \ "name_uboot=u-boot-spi-k2g-evm.gph\0" \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 096799eb64..77bd930856 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -82,9 +82,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -/* Command line configuration */ -#undef CONFIG_CMD_IMLS - #define CONFIG_SYS_HZ 1000 #define CONFIG_HWCONFIG diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 3fe7b8f44c..63667810bd 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -215,10 +215,6 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_CMDLINE_EDITING -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT) -#undef CONFIG_CMD_IMLS -#endif - #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 @@ -280,7 +276,6 @@ #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_CMD_BOOTZ #define CONFIG_MISC_INIT_R diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 1f9efffa56..a29713499b 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -73,10 +73,10 @@ #define CONFIG_SPL_STACK 0x1001e000 #define CONFIG_SPL_PAD_TO 0x1d000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ - CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 +#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #ifdef CONFIG_SECURE_BOOT @@ -280,6 +280,7 @@ "load_addr=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "console=ttyS0,115200\0" \ + "boot_os=y\0" \ "mtdparts=" MTDPARTS_DEFAULT "\0" \ BOOTENV \ "boot_scripts=ls1043ardb_boot.scr\0" \ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index ca1d862479..f9843f5eba 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -28,13 +28,13 @@ #define CONFIG_SYS_SPD_BUS_NUM 0 -#define CONFIG_FSL_DDR_BIST #ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif #define CONFIG_SYS_DDR_RAW_TIMING +#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#define CONFIG_FSL_DDR_BIST #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#endif #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1043ardb/ls1043ardb_pbi.cfg @@ -46,6 +46,11 @@ #ifdef CONFIG_SD_BOOT #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043ardb/ls1043ardb_rcw_sd.cfg +#define CONFIG_CMD_SPL +#define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000 +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x10000 +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x500 +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 30 #endif /* diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index dfc8e9237d..6d501b9c54 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -183,7 +183,7 @@ #define CONFIG_ENV_SPI_MODE 0x03 #elif defined(CONFIG_NAND_BOOT) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (36 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR #define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 9231cca9e9..39bd1c38a8 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -435,7 +435,7 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_NAND_BOOT #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (24 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET (12 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SD_BOOT) #define CONFIG_ENV_OFFSET (3 * 1024 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 84e9b140d0..fa058f7e52 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -122,6 +122,12 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 + +/* Define phy_reset function to boot the MC based on mcinitcmd. + * This happens late enough to properly fixup u-boot env MAC addresses. + */ +#define CONFIG_RESET_PHY_R + /* * Carve out a DDR region which will not be used by u-boot/Linux * diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 3547b0bbbc..71d0e4e7d1 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -35,7 +35,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_QIXIS_I2C_ACCESS #define SYS_NO_FLASH -#undef CONFIG_CMD_IMLS #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 100000000 #else diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 3223278dfd..39f1345f97 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -26,7 +26,6 @@ #if defined(CONFIG_QSPI_BOOT) #define CONFIG_QIXIS_I2C_ACCESS #define SYS_NO_FLASH -#undef CONFIG_CMD_IMLS #endif #define CONFIG_SYS_CLK_FREQ 100000000 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index dcd1b0c35c..54d6b51c55 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -16,7 +16,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FSL_QSPI -#undef CONFIG_CMD_IMLS #define CONFIG_QIXIS_I2C_ACCESS #define CONFIG_SYS_I2C_EARLY_INIT #define CONFIG_SYS_I2C_IFDR_DIV 0x7e diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h index 0fe1bc1c1d..5ecc97fbe7 100644 --- a/include/configs/ma5d4evk.h +++ b/include/configs/ma5d4evk.h @@ -100,9 +100,6 @@ #ifdef CONFIG_CMD_USB /* USB device */ -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_RNDIS -#define CONFIG_USBNET_MANUFACTURER "AriesEmbedded" #define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 * 1024 * 1024) #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 66c7001f09..1b2e0d71b4 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -84,7 +84,6 @@ /* * Ethernet Driver configuration */ -#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index bc41a3362d..bb100c40df 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -58,8 +58,6 @@ #define CONFIG_ENV_SIZE (8 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_SYS_MMC_ENV_DEV 0 - /* U-Boot general configuration */ #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -70,6 +68,9 @@ /* U-Boot commands */ +/* Filesystem support */ +#define CONFIG_FS_EXT4 + /* Ethernet */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0x1f @@ -138,11 +139,11 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 25c83e81c5..9ddb1433ac 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -53,9 +53,9 @@ "ip_dyn=yes\0" \ "mmcdev=1\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "finduuid=part uuid mmc 1:2 uuid\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ + "root=PARTUUID=${uuid} rootwait rw\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ @@ -63,6 +63,7 @@ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ + "run finduuid; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index a7992ea852..6ab8db36a8 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -68,7 +68,6 @@ #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -#undef CONFIG_CMD_IMLS #define CONFIG_SYS_LONGHELP #define CONFIG_AUTO_COMPLETE @@ -90,7 +89,6 @@ #define PHYS_SDRAM_SIZE SZ_1G #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_CMD_BOOTZ #define CONFIG_LOADADDR 0x60800000 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 520a52cbc6..b847906310 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -19,8 +19,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_USBD_HS -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_CDC #define CONFIG_NETCONSOLE #define CONFIG_MXC_UART diff --git a/include/configs/novena.h b/include/configs/novena.h index 4480aaffa0..ac00975a8c 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -129,8 +129,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* Gadget part */ #define CONFIG_USBD_HS -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_CDC #define CONFIG_NETCONSOLE #endif diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 2afb19f84a..22e9c82497 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -174,7 +174,6 @@ "fdtaddr=40800000\0" /* GPT */ -#define CONFIG_RANDOM_UUID /* Security subsystem - enable hw_rand() */ #define CONFIG_EXYNOS_ACE_SHA diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 8bc7fbde9e..13a45010bf 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -45,7 +45,7 @@ #define DFU_MANIFEST_POLL_TIMEOUT 25000 /* THOR */ -#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM +#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_USB_GADGET_VENDOR_NUM #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D #define CONFIG_USB_FUNCTION_THOR diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 47a50bdaa6..06232bdfea 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -46,7 +46,6 @@ #define CONFIG_USB_MUSB_OMAP2PLUS #define CONFIG_USB_MUSB_PIO_ONLY #define CONFIG_TWL4030_USB 1 -#define CONFIG_USB_ETHER /* USB EHCI */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index e9a1cad0f7..3618d0ec1a 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -81,7 +81,6 @@ #define CONFIG_USB_OMAP3 #define CONFIG_USB_MUSB_OMAP2PLUS #define CONFIG_USB_MUSB_PIO_ONLY -#define CONFIG_USB_ETHER /* USB EHCI */ #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 5b31223b9e..f7db79d11c 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -57,7 +57,6 @@ /* USB */ #define CONFIG_USB_MUSB_OMAP2PLUS #define CONFIG_USB_MUSB_PIO_ONLY -#define CONFIG_USB_ETHER /* TWL4030 */ #define CONFIG_TWL4030_USB diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index f678b2944d..79f3f48df8 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -133,11 +133,6 @@ #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_HOST -#ifdef CONFIG_USB_MUSB_GADGET -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_RNDIS -#endif /* CONFIG_USB_MUSB_GADGET */ - #define CONFIG_PHY_SMSC #endif /* ! __CONFIG_PCM051_H */ diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h new file mode 100644 index 0000000000..4376a24787 --- /dev/null +++ b/include/configs/qemu-arm.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2017 Tuomas Tynkkynen + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <linux/sizes.h> + +/* Physical memory map */ +#define CONFIG_SYS_TEXT_BASE 0x00000000 + +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +/* The DTB generated by QEMU is placed at start of RAM, stay away from there */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) +#define CONFIG_SYS_MALLOC_LEN SZ_16M + +/* QEMU's PL011 serial port is detected via FDT using the device model */ +#define CONFIG_PL01X_SERIAL + +/* QEMU implements a 62.5MHz architected timer */ +/* FIXME: can we rely on CNTFREQ instead of hardcoding this fact here? */ +#define CONFIG_SYS_ARCH_TIMER +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_HZ_CLOCK 62500000 + +/* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */ +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 6 +#define CONFIG_SCSI_AHCI +#define CONFIG_LIBATA + +/* Environment options */ +#define CONFIG_ENV_SIZE SZ_64K + +#include <config_distro_defaults.h> + +#define BOOT_TARGET_DEVICES(func) \ + func(SCSI, scsi, 0) + +#include <config_distro_bootcmd.h> + +#define CONFIG_PREBOOT "pci enum" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_addr=0x40000000\0" \ + "scriptaddr=0x40200000\0" \ + "pxefile_addr_r=0x40300000\0" \ + "kernel_addr_r=0x40400000\0" \ + "ramdisk_addr_r=0x44000000\0" \ + BOOTENV + +#endif /* __CONFIG_H */ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 49b1b5ade4..6deed0dcd7 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -12,10 +12,6 @@ #include <asm/arch/rmobile.h> -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_EXT4 -#define CONFIG_CMD_EXT4_WRITE - #define CONFIG_REMAKE_ELF /* boot option */ @@ -35,8 +31,6 @@ #define CONFIG_ARCH_CPU_INIT -#define CONFIG_SH_GPIO_PFC - /* console */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE @@ -46,7 +40,7 @@ /* MEMORY */ #define CONFIG_SYS_TEXT_BASE 0x50000000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7fff0) +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define DRAM_RSV_SIZE 0x08000000 #if defined(CONFIG_R8A7795) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index e9e3c4013c..34f255847a 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -32,7 +32,11 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0xff718000 -#define CONFIG_SPL_TEXT_BASE 0xff704004 +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) +# define CONFIG_SPL_TEXT_BASE 0x0 +#else +# define CONFIG_SPL_TEXT_BASE 0xff704004 +#endif /* MMC/SD IP block */ #define CONFIG_BOUNCE_BUFFER diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index b3986c28af..5e9b6deb48 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -27,8 +27,6 @@ func(DHCP, dchp, na) #endif -#define CONFIG_RANDOM_UUID - #ifdef CONFIG_ARM64 #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0" #else diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h index 246b179766..fd1527ce70 100644 --- a/include/configs/s32v234evb.h +++ b/include/configs/s32v234evb.h @@ -73,8 +73,6 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_UART_PORT (1) -#undef CONFIG_CMD_IMLS - #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR diff --git a/include/configs/sama5d2_ptc.h b/include/configs/sama5d2_ptc.h index 3ae16dfc63..c52dcd4e8f 100644 --- a/include/configs/sama5d2_ptc.h +++ b/include/configs/sama5d2_ptc.h @@ -62,9 +62,6 @@ #endif /* USB device */ -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_RNDIS -#define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D2_PTC" /* Ethernet Hardware */ #define CONFIG_MACB diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index 4f24a56899..545ba1740d 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -35,18 +35,6 @@ #define CONFIG_SF_DEFAULT_SPEED 30000000 #endif -/* LCD */ - -#ifdef CONFIG_LCD -#define LCD_BPP LCD_COLOR16 -#define LCD_OUTPUT_BPP 24 -#define CONFIG_LCD_LOGO -#define CONFIG_LCD_INFO -#define CONFIG_LCD_INFO_BELOW_LOGO -#define CONFIG_ATMEL_HLCD -#define CONFIG_ATMEL_LCD_RGB565 -#endif - #ifdef CONFIG_SD_BOOT /* bootstrap + u-boot + env in sd card */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index bd93a1e84c..9ec1e76052 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -28,15 +28,6 @@ */ #define ATMEL_PMC_UHP (1 << 6) -/* LCD */ -#define LCD_BPP LCD_COLOR16 -#define LCD_OUTPUT_BPP 24 -#define CONFIG_LCD_LOGO -#define CONFIG_LCD_INFO -#define CONFIG_LCD_INFO_BELOW_LOGO -#define CONFIG_ATMEL_HLCD -#define CONFIG_ATMEL_LCD_RGB565 - /* board specific (not enough SRAM) */ #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000 diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 5dc5e7dd0c..6aa4bcc5c5 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -47,17 +47,6 @@ #define CONFIG_ATMEL_NAND_HW_PMECC #endif -/* LCD */ -#ifdef CONFIG_LCD -#define LCD_BPP LCD_COLOR16 -#define LCD_OUTPUT_BPP 24 -#define CONFIG_LCD_LOGO -#define CONFIG_LCD_INFO -#define CONFIG_LCD_INFO_BELOW_LOGO -#define CONFIG_ATMEL_HLCD -#define CONFIG_ATMEL_LCD_RGB565 -#endif - /* SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x200000 diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index 94e8e893c0..a46e3508bf 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -45,15 +45,6 @@ #define CONFIG_ATMEL_NAND_HW_PMECC #endif -/* LCD */ -#define LCD_BPP LCD_COLOR16 -#define LCD_OUTPUT_BPP 18 -#define CONFIG_LCD_LOGO -#define CONFIG_LCD_INFO -#define CONFIG_LCD_INFO_BELOW_LOGO -#define CONFIG_ATMEL_HLCD -#define CONFIG_ATMEL_LCD_RGB565 - /* SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x200000 diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h index 250917b1dc..99200140fe 100644 --- a/include/configs/sansa_fuze_plus.h +++ b/include/configs/sansa_fuze_plus.h @@ -39,8 +39,6 @@ #define CONFIG_EHCI_MXS_PORT0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_CDC #define CONFIG_NETCONSOLE #endif diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 2314a2d2ef..1997c2dd5a 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -178,12 +178,6 @@ #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_HOST -#ifdef CONFIG_USB_MUSB_GADGET -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_RNDIS -#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" -#endif /* CONFIG_USB_MUSB_GADGET */ - /* USB DRACO ID as default */ #define CONFIG_USBD_HS diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 372c083601..958d5cc54c 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -12,16 +12,35 @@ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x40000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define PHYS_SDRAM_1_SIZE 0x3FE00000 +#define PHYS_SDRAM_1_SIZE 0x3E000000 #define CONFIG_SYS_TEXT_BASE 0x7D600000 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 /* default load addr */ #define CONFIG_SYS_HZ_CLOCK 1000000000 /* 1 GHz */ +#include <config_distro_defaults.h> /* Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "board= B2260" \ - "load_addr= #CONFIG_SYS_LOAD_ADDR \0" + +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR + +#define CONFIG_ENV_VARS_UBOOT_CONFIG + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0x40000000\0" \ + "fdtfile=stih410-b2260.dtb\0" \ + "fdt_addr_r=0x47000000\0" \ + "scriptaddr=0x50000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "ramdisk_addr_r=0x48000000\0" \ + BOOTENV + #define CONFIG_ENV_SIZE 0x4000 diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h index b0061cd0de..967c5e5702 100644 --- a/include/configs/stm32h743-disco.h +++ b/include/configs/stm32h743-disco.h @@ -11,7 +11,7 @@ #include <config.h> #define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x30020000 +#define CONFIG_SYS_INIT_SP_ADDR 0x24040000 #define CONFIG_SYS_TEXT_BASE 0x08000000 /* diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h index b0061cd0de..967c5e5702 100644 --- a/include/configs/stm32h743-eval.h +++ b/include/configs/stm32h743-eval.h @@ -11,7 +11,7 @@ #include <config.h> #define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_INIT_SP_ADDR 0x30020000 +#define CONFIG_SYS_INIT_SP_ADDR 0x24040000 #define CONFIG_SYS_TEXT_BASE 0x08000000 /* diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 02d7be0849..91751171ec 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -148,7 +148,13 @@ #endif #if defined(CONFIG_ENV_IS_IN_MMC) -#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ +#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 +/* If we have two devices (most likely eMMC + MMC), favour the eMMC */ +#define CONFIG_SYS_MMC_ENV_DEV 1 +#else +/* Otherwise, use the only device we have */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#endif #define CONFIG_SYS_MMC_MAX_DEVICE 4 #elif defined(CONFIG_ENV_IS_NOWHERE) #define CONFIG_ENV_SIZE (128 << 10) @@ -382,15 +388,28 @@ extern int soft_i2c_gpio_scl; "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" #ifdef CONFIG_MMC -#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 -#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) +#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \ + BOOTENV_DEV_MMC(MMC, mmc, 0) \ + BOOTENV_DEV_MMC(MMC, mmc, 1) \ + "bootcmd_mmc_auto=" \ + "if test ${mmc_bootdev} -eq 1; then " \ + "run bootcmd_mmc1; " \ + "run bootcmd_mmc0; " \ + "elif test ${mmc_bootdev} -eq 0; then " \ + "run bootcmd_mmc0; " \ + "run bootcmd_mmc1; " \ + "fi\0" + +#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \ + "mmc_auto " + +#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na) #else -#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) +#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) #endif #else #define BOOT_TARGET_DEVICES_MMC(func) -#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) #endif #ifdef CONFIG_AHCI @@ -418,7 +437,6 @@ extern int soft_i2c_gpio_scl; #define BOOT_TARGET_DEVICES(func) \ func(FEL, fel, na) \ BOOT_TARGET_DEVICES_MMC(func) \ - BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ BOOT_TARGET_DEVICES_SCSI(func) \ BOOT_TARGET_DEVICES_USB(func) \ func(PXE, pxe, na) \ diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index b4311d94cc..f19a230b7a 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -212,8 +212,6 @@ /* USB EHCI */ #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162 -#define CONFIG_USB_ETHER - /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index e2225cd812..430c9a7623 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -13,7 +13,6 @@ /* * High Level Configuration Options */ -#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ #include <asm/arch/tegra.h> /* get chip and board defs */ diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index 238056a65f..c20803c535 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -46,7 +46,7 @@ "yocto_tty=" __stringify(DEF_ENV_YOCTO_TTY) "\0" \ "start_eth=if test -n \"${eth_init}\";" \ "then run eth_init;else sleep 0;fi\0" \ - "kernel-ver=4.8.0-54\0" \ + "kernel-ver=4.8.0-54-generic\0" \ "boot=zboot 03000000 0 04000000 ${filesize}\0" \ "mtdparts=mtdparts=intel-spi:4k(descriptor),7084k(me)," \ "8k(env1),8k(env2),64k(mrc),640k(u-boot)," \ @@ -58,7 +58,8 @@ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ "addmisc=setenv bootargs ${bootargs} " \ "intel-spi.writeable=1 vmalloc=300M " \ - "pci=realloc=on,hpmemsize=0x12000000\0" \ + "pci=realloc=on,hpmemsize=0x12000000," \ + "hpmemprefsize=0,hpiosize=0\0" \ "bootcmd=if env exists recovery_status;" \ "then run swupdate;" \ "else run yocto_boot;run swupdate;" \ @@ -68,9 +69,9 @@ "ubuntu_args_quiet=setenv bootargs " \ "root=/dev/sda${ubuntu_part} ro quiet\0" \ "ubuntu_load=load scsi 0:${ubuntu_part} 03000000 " \ - "/boot/vmlinuz-${kernel-ver}-generic;" \ + "/boot/vmlinuz-${kernel-ver};" \ "load scsi 0:${ubuntu_part} 04000000 " \ - "/boot/initrd.img-${kernel-ver}-generic\0" \ + "/boot/initrd.img-${kernel-ver}\0" \ "ubuntu_boot=run ubuntu_args_quiet addmtd addmisc " \ "ubuntu_load boot\0" \ "ubuntu_boot_console=run ubuntu_args addtty_ubuntu " \ @@ -79,7 +80,7 @@ "net_boot=run start_eth net_args addtty_yocto addmtd addmisc;" \ "tftp 03000000 ${tftpdir}/bzImage;" \ "load scsi 0:${ubuntu_part} 04000000 " \ - "/boot/initrd.img-${kernel-ver}-generic;" \ + "/boot/initrd.img-${kernel-ver};" \ "run boot\0" \ "yocto_args=setenv bootargs root=/dev/sda${yocto_part} " \ "panic=1\0" \ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 2b2b85d085..53046a2110 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -270,7 +270,7 @@ "${bootdir}/${fit_bootfile}\0" \ "get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \ "get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \ - "burn_uboot_spi=sf probe; sf erase 0 0x80000; " \ + "burn_uboot_spi=sf probe; sf erase 0 0x90000; " \ "sf write ${loadaddr} 0 ${filesize}\0" \ "burn_uboot_nand=nand erase 0 0x100000; " \ "nand write ${loadaddr} 0 ${filesize}\0" \ diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h index d538080aa3..400a7fc4a4 100644 --- a/include/configs/topic_miami.h +++ b/include/configs/topic_miami.h @@ -134,7 +134,6 @@ #undef CONFIG_DISPLAY_BOARDINFO /* Further tweaks to reduce image size */ -#undef CONFIG_CMD_BOOTZ #undef CONFIG_CMD_NET #endif /* __CONFIG_TOPIC_MIAMI_H */ diff --git a/include/configs/trats.h b/include/configs/trats.h index 5d0a3240a6..5b33a3b18e 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -168,7 +168,6 @@ #define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100 /* GPT */ -#define CONFIG_RANDOM_UUID /* Security subsystem - enable hw_rand() */ #define CONFIG_EXYNOS_ACE_SHA diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 7f6a61a1db..95c011f9a9 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -150,7 +150,6 @@ "fdtaddr=40800000\0" \ /* GPT */ -#define CONFIG_RANDOM_UUID /* Security subsystem - enable hw_rand() */ #define CONFIG_EXYNOS_ACE_SHA diff --git a/include/configs/vinco.h b/include/configs/vinco.h index aaed8150b5..0084051ba1 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -62,14 +62,10 @@ #define CONFIG_SYS_MMC_CLK_OD 500000 /* For generating MMC partitions */ -#define CONFIG_RANDOM_UUID #endif /* USB device */ -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_RNDIS -#define CONFIG_USBNET_MANUFACTURER "L+G VInCo" /* Ethernet Hardware */ #define CONFIG_PHY_SMSC diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h index 9d6c80f549..8774e42430 100644 --- a/include/configs/vyasa-rk3288.h +++ b/include/configs/vyasa-rk3288.h @@ -20,4 +20,21 @@ #define CONFIG_SYS_MMC_ENV_DEV 1 #undef CONFIG_CMD_USB_MASS_STORAGE +#ifndef CONFIG_TPL_BUILD + +#define CONFIG_SPL_OS_BOOT + +/* Falcon Mode */ +#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +#define CONFIG_CMD_SPL +#define CONFIG_SYS_SPL_ARGS_ADDR 0x0ffe5000 +#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) + +/* Falcon Mode - MMC support: args@1MB kernel@2MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ +#endif + #endif diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 3ba4c29f67..ba88d02b88 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -13,6 +13,7 @@ #include "mx6_common.h" #include "imx6_spl.h" +#define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_MACH_TYPE MACH_TYPE_WANDBOARD_IMX6 @@ -44,6 +45,12 @@ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 100000 +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -102,6 +109,10 @@ "fi; " \ "fi\0" \ "findfdt="\ + "if test $board_name = D1 && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-wandboard-revd1.dtb; fi; " \ + "if test $board_name = D1 && test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-wandboard-revd1.dtb; fi; " \ "if test $board_name = C1 && test $board_rev = MX6Q ; then " \ "setenv fdtfile imx6q-wandboard.dtb; fi; " \ "if test $board_name = C1 && test $board_rev = MX6DL ; then " \ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 75ae8a3e33..11f1bc3eab 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -136,10 +136,6 @@ #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_CDC -#define CONFIG_USB_ETH_RNDIS -#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" #define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01" #endif diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h index 73f431681d..1e70a762e0 100644 --- a/include/configs/xfi3.h +++ b/include/configs/xfi3.h @@ -39,8 +39,6 @@ #define CONFIG_EHCI_MXS_PORT0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_USB_ETHER -#define CONFIG_USB_ETH_CDC #define CONFIG_NETCONSOLE #endif diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 6025706964..1399dfd436 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -103,7 +103,6 @@ DFU_ALT_INFO_RAM #ifndef CONFIG_SPL_BUILD -# define CONFIG_RANDOM_UUID # define PARTS_DEFAULT \ "partitions=uuid_disk=${uuid_gpt_disk};" \ "name=""boot"",size=16M,uuid=${uuid_gpt_boot};" \ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index fdb504d9d9..c2575f01d9 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -18,7 +18,7 @@ #define CONFIG_SYS_MALLOC_LEN (16 << 20) #define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR @@ -87,7 +87,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ - "console=ttymxc0\0" \ + "console=ttymxc6\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "fdt_file=undefined\0" \ diff --git a/include/dataflash.h b/include/dataflash.h deleted file mode 100644 index c9f22200cf..0000000000 --- a/include/dataflash.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * (C) Copyright 2003 - * Data Flash Atmel Description File - * Author : Hamid Ikdoumi (Atmel) - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* File Name : dataflash.h */ -/* Object : Data Flash Atmel Description File */ -/* Translator : */ -/* */ -/* 1.0 03/04/01 HI : Creation */ -/* 1.2 20/10/02 FB : Adapatation Service and Lib v3 */ -/*----------------------------------------------------------------------*/ - -#ifndef _DataFlash_h -#define _DataFlash_h - - -#include "config.h" - -/*number of protected area*/ -#define NB_DATAFLASH_AREA 5 - -#ifndef CONFIG_MTD_NOR_FLASH - -/*----------------------------------------------------------------------- - * return codes from flash_write(): - */ -# define ERR_OK 0 -# define ERR_TIMOUT 1 -# define ERR_NOT_ERASED 2 -# define ERR_PROTECTED 4 -# define ERR_INVAL 8 -# define ERR_ALIGN 16 -# define ERR_UNKNOWN_FLASH_VENDOR 32 -# define ERR_UNKNOWN_FLASH_TYPE 64 -# define ERR_PROG_ERROR 128 - -/*----------------------------------------------------------------------- - * Protection Flags for flash_protect(): - */ -# define FLAG_PROTECT_SET 0x01 -# define FLAG_PROTECT_CLEAR 0x02 -# define FLAG_PROTECT_INVALID 0x03 - -/*----------------------------------------------------------------------- - * Set Environment according to label: - */ -# define FLAG_SETENV 0x80 -#endif /* CONFIG_MTD_NOR_FLASH */ - -/*define the area structure*/ -typedef struct { - unsigned long start; - unsigned long end; - unsigned char protected; - unsigned char setenv; - unsigned char label[20]; -} dataflash_protect_t; - -typedef unsigned int AT91S_DataFlashStatus; - -/*----------------------------------------------------------------------*/ -/* DataFlash Structures */ -/*----------------------------------------------------------------------*/ - -/*---------------------------------------------*/ -/* DataFlash Descriptor Structure Definition */ -/*---------------------------------------------*/ -typedef struct _AT91S_DataflashDesc { - unsigned char *tx_cmd_pt; - unsigned int tx_cmd_size; - unsigned char *rx_cmd_pt; - unsigned int rx_cmd_size; - unsigned char *tx_data_pt; - unsigned int tx_data_size; - unsigned char *rx_data_pt; - unsigned int rx_data_size; - volatile unsigned char state; - volatile unsigned char DataFlash_state; - unsigned char command[8]; -} AT91S_DataflashDesc, *AT91PS_DataflashDesc; - -/*---------------------------------------------*/ -/* DataFlash device definition structure */ -/*---------------------------------------------*/ -typedef struct _AT91S_Dataflash { - int pages_number; /* dataflash page number */ - int pages_size; /* dataflash page size */ - int page_offset; /* page offset in command */ - int byte_mask; /* byte mask in command */ - int cs; - dataflash_protect_t area_list[NB_DATAFLASH_AREA]; /* area protection status */ -} AT91S_DataflashFeatures, *AT91PS_DataflashFeatures; - -/*---------------------------------------------*/ -/* DataFlash Structure Definition */ -/*---------------------------------------------*/ -typedef struct _AT91S_DataFlash { - AT91PS_DataflashDesc pDataFlashDesc; /* dataflash descriptor */ - AT91PS_DataflashFeatures pDevice; /* Pointer on a dataflash features array */ -} AT91S_DataFlash, *AT91PS_DataFlash; - - -typedef struct _AT91S_DATAFLASH_INFO { - - AT91S_DataflashDesc Desc; - AT91S_DataflashFeatures Device; /* Pointer on a dataflash features array */ - unsigned long logical_address; - unsigned long end_address; - unsigned int id; /* device id */ -} AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO; - -struct dataflash_addr { - unsigned long addr; - int cs; -}; -/*-------------------------------------------------------------------------------------------------*/ -#define AT45DB161 0x2c -#define AT45DB021 0x14 -#define AT45DB081 0x24 -#define AT45DB321 0x34 -#define AT45DB642 0x3c -#define AT45DB128 0x10 -#define PAGES_PER_BLOCK 8 - -#define AT91C_DATAFLASH_TIMEOUT 10000 /* For AT91F_DataFlashWaitReady */ - -/* DataFlash return value */ -#define DATAFLASH_BUSY 0x00 -#define DATAFLASH_OK 0x01 -#define DATAFLASH_ERROR 0x02 -#define DATAFLASH_MEMORY_OVERFLOW 0x03 -#define DATAFLASH_BAD_COMMAND 0x04 -#define DATAFLASH_BAD_ADDRESS 0x05 - - -/* Driver State */ -#define IDLE 0x0 -#define BUSY 0x1 -#define ERROR 0x2 - -/* DataFlash Driver State */ -#define GET_STATUS 0x0F - -/*-------------------------------------------------------------------------------------------------*/ -/* Command Definition */ -/*-------------------------------------------------------------------------------------------------*/ - -/* READ COMMANDS */ -#define DB_CONTINUOUS_ARRAY_READ 0xE8 /* Continuous array read */ -#define DB_BURST_ARRAY_READ 0xE8 /* Burst array read */ -#define DB_PAGE_READ 0xD2 /* Main memory page read */ -#define DB_BUF1_READ 0xD4 /* Buffer 1 read */ -#define DB_BUF2_READ 0xD6 /* Buffer 2 read */ -#define DB_STATUS 0xD7 /* Status Register */ - -/* PROGRAM and ERASE COMMANDS */ -#define DB_BUF1_WRITE 0x84 /* Buffer 1 write */ -#define DB_BUF2_WRITE 0x87 /* Buffer 2 write */ -#define DB_BUF1_PAGE_ERASE_PGM 0x83 /* Buffer 1 to main memory page program with built-In erase */ -#define DB_BUF1_PAGE_ERASE_FASTPGM 0x93 /* Buffer 1 to main memory page program with built-In erase, Fast program */ -#define DB_BUF2_PAGE_ERASE_PGM 0x86 /* Buffer 2 to main memory page program with built-In erase */ -#define DB_BUF2_PAGE_ERASE_FASTPGM 0x96 /* Buffer 1 to main memory page program with built-In erase, Fast program */ -#define DB_BUF1_PAGE_PGM 0x88 /* Buffer 1 to main memory page program without built-In erase */ -#define DB_BUF1_PAGE_FASTPGM 0x98 /* Buffer 1 to main memory page program without built-In erase, Fast program */ -#define DB_BUF2_PAGE_PGM 0x89 /* Buffer 2 to main memory page program without built-In erase */ -#define DB_BUF2_PAGE_FASTPGM 0x99 /* Buffer 1 to main memory page program without built-In erase, Fast program */ -#define DB_PAGE_ERASE 0x81 /* Page Erase */ -#define DB_BLOCK_ERASE 0x50 /* Block Erase */ -#define DB_PAGE_PGM_BUF1 0x82 /* Main memory page through buffer 1 */ -#define DB_PAGE_FASTPGM_BUF1 0x92 /* Main memory page through buffer 1, Fast program */ -#define DB_PAGE_PGM_BUF2 0x85 /* Main memory page through buffer 2 */ -#define DB_PAGE_FastPGM_BUF2 0x95 /* Main memory page through buffer 2, Fast program */ - -/* ADDITIONAL COMMANDS */ -#define DB_PAGE_2_BUF1_TRF 0x53 /* Main memory page to buffer 1 transfert */ -#define DB_PAGE_2_BUF2_TRF 0x55 /* Main memory page to buffer 2 transfert */ -#define DB_PAGE_2_BUF1_CMP 0x60 /* Main memory page to buffer 1 compare */ -#define DB_PAGE_2_BUF2_CMP 0x61 /* Main memory page to buffer 2 compare */ -#define DB_AUTO_PAGE_PGM_BUF1 0x58 /* Auto page rewrite throught buffer 1 */ -#define DB_AUTO_PAGE_PGM_BUF2 0x59 /* Auto page rewrite throught buffer 2 */ - -/*-------------------------------------------------------------------------------------------------*/ - -extern int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, unsigned long size); -extern int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr); -extern int addr2ram(ulong addr); -extern int dataflash_real_protect (int flag, unsigned long start_addr, unsigned long end_addr); -extern int addr_dataflash (unsigned long addr); -extern int read_dataflash (unsigned long addr, unsigned long size, char *result); -extern int write_dataflash(unsigned long addr_dest, unsigned long addr_src, - unsigned long size); -extern int AT91F_DataflashInit(void); - -extern void dataflash_print_info (void); -extern void dataflash_perror (int err); -extern void AT91F_Dataflashenv_set(void); - -extern struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS]; -extern dataflash_protect_t area_list[NB_DATAFLASH_AREA]; -extern AT91S_DATAFLASH_INFO dataflash_info[]; -#endif diff --git a/include/dm/device.h b/include/dm/device.h index 4866f7c002..813e49f330 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -18,6 +18,7 @@ #include <linux/compat.h> #include <linux/kernel.h> #include <linux/list.h> +#include <linux/printk.h> struct driver_info; @@ -879,4 +880,75 @@ static inline void devm_kfree(struct udevice *dev, void *ptr) #endif /* ! CONFIG_DEVRES */ +/* + * REVISIT: + * remove the following after resolving conflicts with <linux/compat.h> + */ +#ifdef dev_dbg +#undef dev_dbg +#endif +#ifdef dev_vdbg +#undef dev_vdbg +#endif +#ifdef dev_info +#undef dev_info +#endif +#ifdef dev_err +#undef dev_err +#endif +#ifdef dev_warn +#undef dev_warn +#endif + +/* + * REVISIT: + * print device name like Linux + */ +#define dev_printk(dev, fmt, ...) \ +({ \ + printk(fmt, ##__VA_ARGS__); \ +}) + +#define __dev_printk(level, dev, fmt, ...) \ +({ \ + if (level < CONFIG_VAL(LOGLEVEL)) \ + dev_printk(dev, fmt, ##__VA_ARGS__); \ +}) + +#define dev_emerg(dev, fmt, ...) \ + __dev_printk(0, dev, fmt, ##__VA_ARGS__) +#define dev_alert(dev, fmt, ...) \ + __dev_printk(1, dev, fmt, ##__VA_ARGS__) +#define dev_crit(dev, fmt, ...) \ + __dev_printk(2, dev, fmt, ##__VA_ARGS__) +#define dev_err(dev, fmt, ...) \ + __dev_printk(3, dev, fmt, ##__VA_ARGS__) +#define dev_warn(dev, fmt, ...) \ + __dev_printk(4, dev, fmt, ##__VA_ARGS__) +#define dev_notice(dev, fmt, ...) \ + __dev_printk(5, dev, fmt, ##__VA_ARGS__) +#define dev_info(dev, fmt, ...) \ + __dev_printk(6, dev, fmt, ##__VA_ARGS__) + +#ifdef DEBUG +#define dev_dbg(dev, fmt, ...) \ + __dev_printk(7, dev, fmt, ##__VA_ARGS__) +#else +#define dev_dbg(dev, fmt, ...) \ +({ \ + if (0) \ + __dev_printk(7, dev, fmt, ##__VA_ARGS__); \ +}) +#endif + +#ifdef VERBOSE_DEBUG +#define dev_vdbg dev_dbg +#else +#define dev_vdbg(dev, fmt, ...) \ +({ \ + if (0) \ + __dev_printk(7, dev, fmt, ##__VA_ARGS__); \ +}) +#endif + #endif diff --git a/include/dm/read.h b/include/dm/read.h index e7f71256a8..8114037e97 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -166,6 +166,29 @@ int dev_read_stringlist_search(struct udevice *dev, const char *property, const char *string); /** + * dev_read_string_index() - obtain an indexed string from a string list + * + * @dev: device to examine + * @propname: name of the property containing the string list + * @index: index of the string to return + * @out: return location for the string + * + * @return: + * length of string, if found or -ve error value if not found + */ +int dev_read_string_index(struct udevice *dev, const char *propname, int index, + const char **outp); + +/** + * dev_read_string_count() - find the number of strings in a string list + * + * @dev: device to examine + * @propname: name of the property containing the string list + * @return: + * number of strings in the list, or -ve error value if not found + */ +int dev_read_string_count(struct udevice *dev, const char *propname); +/** * dev_read_phandle_with_args() - Find a node pointed by phandle in a list * * This function is useful to parse lists of phandles and their arguments. @@ -451,6 +474,19 @@ static inline int dev_read_stringlist_search(struct udevice *dev, return ofnode_stringlist_search(dev_ofnode(dev), propname, string); } +static inline int dev_read_string_index(struct udevice *dev, + const char *propname, int index, + const char **outp) +{ + return ofnode_read_string_index(dev_ofnode(dev), propname, index, outp); +} + +static inline int dev_read_string_count(struct udevice *dev, + const char *propname) +{ + return ofnode_read_string_count(dev_ofnode(dev), propname); +} + static inline int dev_read_phandle_with_args(struct udevice *dev, const char *list_name, const char *cells_name, int cell_count, int index, struct ofnode_phandle_args *out_args) diff --git a/include/dm/util.h b/include/dm/util.h index 45529ce0e6..0d4ce8f4e6 100644 --- a/include/dm/util.h +++ b/include/dm/util.h @@ -15,14 +15,6 @@ static inline void dm_warn(const char *fmt, ...) } #endif -#ifdef DEBUG -void dm_dbg(const char *fmt, ...); -#else -static inline void dm_dbg(const char *fmt, ...) -{ -} -#endif - struct list_head; /** diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h index 360e00cefd..a0c812b0fa 100644 --- a/include/dt-bindings/clock/bcm2835.h +++ b/include/dt-bindings/clock/bcm2835.h @@ -64,3 +64,5 @@ #define BCM2835_CLOCK_CAM1 46 #define BCM2835_CLOCK_DSI0E 47 #define BCM2835_CLOCK_DSI1E 48 +#define BCM2835_CLOCK_DSI0P 49 +#define BCM2835_CLOCK_DSI1P 50 diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h index d2ad3bb52d..7defc6b282 100644 --- a/include/dt-bindings/clock/rv1108-cru.h +++ b/include/dt-bindings/clock/rv1108-cru.h @@ -39,6 +39,7 @@ #define SCLK_MAC_TX 88 #define SCLK_MACREF 89 #define SCLK_MACREF_OUT 90 +#define SCLK_SARADC 91 /* aclk gates */ @@ -67,6 +68,7 @@ #define PCLK_TIMER 270 #define PCLK_PERI 271 #define PCLK_GMAC 272 +#define PCLK_SARADC 273 /* hclk gates */ #define HCLK_I2S0_8CH 320 diff --git a/include/dt-bindings/clock/sun8i-a23-a33-ccu.h b/include/dt-bindings/clock/sun8i-a23-a33-ccu.h new file mode 100644 index 0000000000..f8222b6b2c --- /dev/null +++ b/include/dt-bindings/clock/sun8i-a23-a33-ccu.h @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_CLK_SUN8I_A23_A33_H_ +#define _DT_BINDINGS_CLK_SUN8I_A23_A33_H_ + +#define CLK_CPUX 18 + +#define CLK_BUS_MIPI_DSI 23 +#define CLK_BUS_SS 24 +#define CLK_BUS_DMA 25 +#define CLK_BUS_MMC0 26 +#define CLK_BUS_MMC1 27 +#define CLK_BUS_MMC2 28 +#define CLK_BUS_NAND 29 +#define CLK_BUS_DRAM 30 +#define CLK_BUS_HSTIMER 31 +#define CLK_BUS_SPI0 32 +#define CLK_BUS_SPI1 33 +#define CLK_BUS_OTG 34 +#define CLK_BUS_EHCI 35 +#define CLK_BUS_OHCI 36 +#define CLK_BUS_VE 37 +#define CLK_BUS_LCD 38 +#define CLK_BUS_CSI 39 +#define CLK_BUS_DE_BE 40 +#define CLK_BUS_DE_FE 41 +#define CLK_BUS_GPU 42 +#define CLK_BUS_MSGBOX 43 +#define CLK_BUS_SPINLOCK 44 +#define CLK_BUS_DRC 45 +#define CLK_BUS_SAT 46 +#define CLK_BUS_CODEC 47 +#define CLK_BUS_PIO 48 +#define CLK_BUS_I2S0 49 +#define CLK_BUS_I2S1 50 +#define CLK_BUS_I2C0 51 +#define CLK_BUS_I2C1 52 +#define CLK_BUS_I2C2 53 +#define CLK_BUS_UART0 54 +#define CLK_BUS_UART1 55 +#define CLK_BUS_UART2 56 +#define CLK_BUS_UART3 57 +#define CLK_BUS_UART4 58 +#define CLK_NAND 59 +#define CLK_MMC0 60 +#define CLK_MMC0_SAMPLE 61 +#define CLK_MMC0_OUTPUT 62 +#define CLK_MMC1 63 +#define CLK_MMC1_SAMPLE 64 +#define CLK_MMC1_OUTPUT 65 +#define CLK_MMC2 66 +#define CLK_MMC2_SAMPLE 67 +#define CLK_MMC2_OUTPUT 68 +#define CLK_SS 69 +#define CLK_SPI0 70 +#define CLK_SPI1 71 +#define CLK_I2S0 72 +#define CLK_I2S1 73 +#define CLK_USB_PHY0 74 +#define CLK_USB_PHY1 75 +#define CLK_USB_HSIC 76 +#define CLK_USB_HSIC_12M 77 +#define CLK_USB_OHCI 78 + +#define CLK_DRAM_VE 80 +#define CLK_DRAM_CSI 81 +#define CLK_DRAM_DRC 82 +#define CLK_DRAM_DE_FE 83 +#define CLK_DRAM_DE_BE 84 +#define CLK_DE_BE 85 +#define CLK_DE_FE 86 +#define CLK_LCD_CH0 87 +#define CLK_LCD_CH1 88 +#define CLK_CSI_SCLK 89 +#define CLK_CSI_MCLK 90 +#define CLK_VE 91 +#define CLK_AC_DIG 92 +#define CLK_AC_DIG_4X 93 +#define CLK_AVS 94 + +#define CLK_DSI_SCLK 96 +#define CLK_DSI_DPHY 97 +#define CLK_DRC 98 +#define CLK_GPU 99 +#define CLK_ATS 100 + +#endif /* _DT_BINDINGS_CLK_SUN8I_A23_A33_H_ */ diff --git a/include/dt-bindings/pinctrl/bcm2835.h b/include/dt-bindings/pinctrl/bcm2835.h index 6f0bc37af3..e4e4fdf5d3 100644 --- a/include/dt-bindings/pinctrl/bcm2835.h +++ b/include/dt-bindings/pinctrl/bcm2835.h @@ -24,4 +24,9 @@ #define BCM2835_FSEL_ALT2 6 #define BCM2835_FSEL_ALT3 7 +/* brcm,pull property */ +#define BCM2835_PUD_OFF 0 +#define BCM2835_PUD_DOWN 1 +#define BCM2835_PUD_UP 2 + #endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */ diff --git a/include/dt-bindings/reset/sun8i-a23-a33-ccu.h b/include/dt-bindings/reset/sun8i-a23-a33-ccu.h new file mode 100644 index 0000000000..6121f2b0cd --- /dev/null +++ b/include/dt-bindings/reset/sun8i-a23-a33-ccu.h @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_RST_SUN8I_A23_A33_H_ +#define _DT_BINDINGS_RST_SUN8I_A23_A33_H_ + +#define RST_USB_PHY0 0 +#define RST_USB_PHY1 1 +#define RST_USB_HSIC 2 +#define RST_MBUS 3 +#define RST_BUS_MIPI_DSI 4 +#define RST_BUS_SS 5 +#define RST_BUS_DMA 6 +#define RST_BUS_MMC0 7 +#define RST_BUS_MMC1 8 +#define RST_BUS_MMC2 9 +#define RST_BUS_NAND 10 +#define RST_BUS_DRAM 11 +#define RST_BUS_HSTIMER 12 +#define RST_BUS_SPI0 13 +#define RST_BUS_SPI1 14 +#define RST_BUS_OTG 15 +#define RST_BUS_EHCI 16 +#define RST_BUS_OHCI 17 +#define RST_BUS_VE 18 +#define RST_BUS_LCD 19 +#define RST_BUS_CSI 20 +#define RST_BUS_DE_BE 21 +#define RST_BUS_DE_FE 22 +#define RST_BUS_GPU 23 +#define RST_BUS_MSGBOX 24 +#define RST_BUS_SPINLOCK 25 +#define RST_BUS_DRC 26 +#define RST_BUS_SAT 27 +#define RST_BUS_LVDS 28 +#define RST_BUS_CODEC 29 +#define RST_BUS_I2S0 30 +#define RST_BUS_I2S1 31 +#define RST_BUS_I2C0 32 +#define RST_BUS_I2C1 33 +#define RST_BUS_I2C2 34 +#define RST_BUS_UART0 35 +#define RST_BUS_UART1 36 +#define RST_BUS_UART2 37 +#define RST_BUS_UART3 38 +#define RST_BUS_UART4 39 + +#endif /* _DT_BINDINGS_RST_SUN8I_A23_A33_H_ */ diff --git a/include/efi.h b/include/efi.h index 02b78b31b1..dc8edc8743 100644 --- a/include/efi.h +++ b/include/efi.h @@ -28,6 +28,10 @@ struct efi_device_path; +typedef struct { + u8 b[16]; +} efi_guid_t; + #define EFI_BITS_PER_LONG BITS_PER_LONG /* @@ -77,6 +81,8 @@ struct efi_device_path; #define EFI_IP_ADDRESS_CONFLICT (EFI_ERROR_MASK | 34) #define EFI_HTTP_ERROR (EFI_ERROR_MASK | 35) +#define EFI_WARN_DELETE_FAILURE 2 + typedef unsigned long efi_status_t; typedef u64 efi_physical_addr_t; typedef u64 efi_virtual_addr_t; @@ -116,7 +122,7 @@ enum efi_mem_type { /* The code portions of a loaded Boot Services Driver */ EFI_BOOT_SERVICES_CODE, /* - * The data portions of a loaded Boot Serves Driver and + * The data portions of a loaded Boot Services Driver and * the default data allocation type used by a Boot Services * Driver to allocate pool memory. */ @@ -318,6 +324,25 @@ extern char image_base[]; /* Start and end of U-Boot image (for payload) */ extern char _binary_u_boot_bin_start[], _binary_u_boot_bin_end[]; +/* + * Variable Attributes + */ +#define EFI_VARIABLE_NON_VOLATILE 0x0000000000000001 +#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x0000000000000002 +#define EFI_VARIABLE_RUNTIME_ACCESS 0x0000000000000004 +#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x0000000000000008 +#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x0000000000000010 +#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x0000000000000020 +#define EFI_VARIABLE_APPEND_WRITE 0x0000000000000040 + +#define EFI_VARIABLE_MASK (EFI_VARIABLE_NON_VOLATILE | \ + EFI_VARIABLE_BOOTSERVICE_ACCESS | \ + EFI_VARIABLE_RUNTIME_ACCESS | \ + EFI_VARIABLE_HARDWARE_ERROR_RECORD | \ + EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | \ + EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS | \ + EFI_VARIABLE_APPEND_WRITE) + /** * efi_get_sys_table() - Get access to the main EFI system table * diff --git a/include/efi_api.h b/include/efi_api.h index ec1b321e8e..fcd7483ab2 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -29,6 +29,8 @@ enum efi_timer_delay { }; #define UINTN size_t +typedef long INTN; +typedef uint16_t *efi_string_t; #define EVT_TIMER 0x80000000 #define EVT_RUNTIME 0x40000000 @@ -69,30 +71,31 @@ struct efi_boot_services { enum efi_timer_delay type, uint64_t trigger_time); efi_status_t (EFIAPI *wait_for_event)(unsigned long number_of_events, - struct efi_event **event, unsigned long *index); + struct efi_event **event, size_t *index); efi_status_t (EFIAPI *signal_event)(struct efi_event *event); efi_status_t (EFIAPI *close_event)(struct efi_event *event); efi_status_t (EFIAPI *check_event)(struct efi_event *event); #define EFI_NATIVE_INTERFACE 0x00000000 efi_status_t (EFIAPI *install_protocol_interface)( - void **handle, efi_guid_t *protocol, + void **handle, const efi_guid_t *protocol, int protocol_interface_type, void *protocol_interface); efi_status_t (EFIAPI *reinstall_protocol_interface)( - void *handle, efi_guid_t *protocol, + void *handle, const efi_guid_t *protocol, void *old_interface, void *new_interface); efi_status_t (EFIAPI *uninstall_protocol_interface)(void *handle, - efi_guid_t *protocol, void *protocol_interface); - efi_status_t (EFIAPI *handle_protocol)(efi_handle_t, efi_guid_t *, - void **); + const efi_guid_t *protocol, void *protocol_interface); + efi_status_t (EFIAPI *handle_protocol)(efi_handle_t, + const efi_guid_t *protocol, + void **protocol_interface); void *reserved; efi_status_t (EFIAPI *register_protocol_notify)( - efi_guid_t *protocol, struct efi_event *event, + const efi_guid_t *protocol, struct efi_event *event, void **registration); efi_status_t (EFIAPI *locate_handle)( enum efi_locate_search_type search_type, - efi_guid_t *protocol, void *search_key, + const efi_guid_t *protocol, void *search_key, unsigned long *buffer_size, efi_handle_t *buffer); - efi_status_t (EFIAPI *locate_device_path)(efi_guid_t *protocol, + efi_status_t (EFIAPI *locate_device_path)(const efi_guid_t *protocol, struct efi_device_path **device_path, efi_handle_t *device); efi_status_t (EFIAPI *install_configuration_table)( @@ -129,14 +132,14 @@ struct efi_boot_services { #define EFI_OPEN_PROTOCOL_BY_DRIVER 0x00000010 #define EFI_OPEN_PROTOCOL_EXCLUSIVE 0x00000020 efi_status_t (EFIAPI *open_protocol)(efi_handle_t handle, - efi_guid_t *protocol, void **interface, + const efi_guid_t *protocol, void **interface, efi_handle_t agent_handle, efi_handle_t controller_handle, u32 attributes); efi_status_t (EFIAPI *close_protocol)(void *handle, - efi_guid_t *protocol, void *agent_handle, + const efi_guid_t *protocol, void *agent_handle, void *controller_handle); efi_status_t(EFIAPI *open_protocol_information)(efi_handle_t handle, - efi_guid_t *protocol, + const efi_guid_t *protocol, struct efi_open_protocol_info_entry **entry_buffer, unsigned long *entry_count); efi_status_t (EFIAPI *protocols_per_handle)(efi_handle_t handle, @@ -144,9 +147,9 @@ struct efi_boot_services { unsigned long *protocols_buffer_count); efi_status_t (EFIAPI *locate_handle_buffer) ( enum efi_locate_search_type search_type, - efi_guid_t *protocol, void *search_key, + const efi_guid_t *protocol, void *search_key, unsigned long *no_handles, efi_handle_t **buffer); - efi_status_t (EFIAPI *locate_protocol)(efi_guid_t *protocol, + efi_status_t (EFIAPI *locate_protocol)(const efi_guid_t *protocol, void *registration, void **protocol_interface); efi_status_t (EFIAPI *install_multiple_protocol_interfaces)( void **handle, ...); @@ -154,10 +157,9 @@ struct efi_boot_services { void *handle, ...); efi_status_t (EFIAPI *calculate_crc32)(void *data, unsigned long data_size, uint32_t *crc32); - void (EFIAPI *copy_mem)(void *destination, void *source, - unsigned long length); - void (EFIAPI *set_mem)(void *buffer, unsigned long size, - uint8_t value); + void (EFIAPI *copy_mem)(void *destination, const void *source, + size_t length); + void (EFIAPI *set_mem)(void *buffer, size_t size, uint8_t value); void *create_event_ex; }; @@ -211,6 +213,10 @@ struct efi_runtime_services { EFI_GUID(0x00000000, 0x0000, 0x0000, 0x00, 0x00, \ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00) +#define EFI_GLOBAL_VARIABLE_GUID \ + EFI_GUID(0x8be4df61, 0x93ca, 0x11d2, 0xaa, 0x0d, \ + 0x00, 0xe0, 0x98, 0x03, 0x2b, 0x8c) + #define LOADED_IMAGE_PROTOCOL_GUID \ EFI_GUID(0x5b1b31a1, 0x9562, 0x11d2, 0x8e, 0x3f, \ 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b) @@ -284,28 +290,101 @@ struct efi_device_path { u8 type; u8 sub_type; u16 length; -}; +} __packed; struct efi_mac_addr { u8 addr[32]; -}; +} __packed; + +#define DEVICE_PATH_TYPE_HARDWARE_DEVICE 0x01 +# define DEVICE_PATH_SUB_TYPE_MEMORY 0x03 +# define DEVICE_PATH_SUB_TYPE_VENDOR 0x04 + +struct efi_device_path_memory { + struct efi_device_path dp; + u32 memory_type; + u64 start_address; + u64 end_address; +} __packed; + +struct efi_device_path_vendor { + struct efi_device_path dp; + efi_guid_t guid; + u8 vendor_data[]; +} __packed; + +#define DEVICE_PATH_TYPE_ACPI_DEVICE 0x02 +# define DEVICE_PATH_SUB_TYPE_ACPI_DEVICE 0x01 + +#define EFI_PNP_ID(ID) (u32)(((ID) << 16) | 0x41D0) +#define EISA_PNP_ID(ID) EFI_PNP_ID(ID) +#define EISA_PNP_NUM(ID) ((ID) >> 16) + +struct efi_device_path_acpi_path { + struct efi_device_path dp; + u32 hid; + u32 uid; +} __packed; #define DEVICE_PATH_TYPE_MESSAGING_DEVICE 0x03 +# define DEVICE_PATH_SUB_TYPE_MSG_USB 0x05 # define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR 0x0b +# define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS 0x0f +# define DEVICE_PATH_SUB_TYPE_MSG_SD 0x1a +# define DEVICE_PATH_SUB_TYPE_MSG_MMC 0x1d + +struct efi_device_path_usb { + struct efi_device_path dp; + u8 parent_port_number; + u8 usb_interface; +} __packed; struct efi_device_path_mac_addr { struct efi_device_path dp; struct efi_mac_addr mac; u8 if_type; -}; +} __packed; + +struct efi_device_path_usb_class { + struct efi_device_path dp; + u16 vendor_id; + u16 product_id; + u8 device_class; + u8 device_subclass; + u8 device_protocol; +} __packed; + +struct efi_device_path_sd_mmc_path { + struct efi_device_path dp; + u8 slot_number; +} __packed; #define DEVICE_PATH_TYPE_MEDIA_DEVICE 0x04 +# define DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH 0x01 +# define DEVICE_PATH_SUB_TYPE_CDROM_PATH 0x02 # define DEVICE_PATH_SUB_TYPE_FILE_PATH 0x04 +struct efi_device_path_hard_drive_path { + struct efi_device_path dp; + u32 partition_number; + u64 partition_start; + u64 partition_end; + u8 partition_signature[16]; + u8 partmap_type; + u8 signature_type; +} __packed; + +struct efi_device_path_cdrom_path { + struct efi_device_path dp; + u32 boot_entry; + u64 partition_start; + u64 partition_end; +} __packed; + struct efi_device_path_file_path { struct efi_device_path dp; - u16 str[32]; -}; + u16 str[]; +} __packed; #define BLOCK_IO_GUID \ EFI_GUID(0x964e5b21, 0x6459, 0x11d2, \ @@ -354,14 +433,47 @@ struct simple_text_output_mode { EFI_GUID(0x387477c2, 0x69c7, 0x11d2, \ 0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b) +#define EFI_BLACK 0x00 +#define EFI_BLUE 0x01 +#define EFI_GREEN 0x02 +#define EFI_CYAN 0x03 +#define EFI_RED 0x04 +#define EFI_MAGENTA 0x05 +#define EFI_BROWN 0x06 +#define EFI_LIGHTGRAY 0x07 +#define EFI_BRIGHT 0x08 +#define EFI_DARKGRAY 0x08 +#define EFI_LIGHTBLUE 0x09 +#define EFI_LIGHTGREEN 0x0a +#define EFI_LIGHTCYAN 0x0b +#define EFI_LIGHTRED 0x0c +#define EFI_LIGHTMAGENTA 0x0d +#define EFI_YELLOW 0x0e +#define EFI_WHITE 0x0f +#define EFI_BACKGROUND_BLACK 0x00 +#define EFI_BACKGROUND_BLUE 0x10 +#define EFI_BACKGROUND_GREEN 0x20 +#define EFI_BACKGROUND_CYAN 0x30 +#define EFI_BACKGROUND_RED 0x40 +#define EFI_BACKGROUND_MAGENTA 0x50 +#define EFI_BACKGROUND_BROWN 0x60 +#define EFI_BACKGROUND_LIGHTGRAY 0x70 + +/* extract foreground color from EFI attribute */ +#define EFI_ATTR_FG(attr) ((attr) & 0x07) +/* treat high bit of FG as bright/bold (similar to edk2) */ +#define EFI_ATTR_BOLD(attr) (((attr) >> 3) & 0x01) +/* extract background color from EFI attribute */ +#define EFI_ATTR_BG(attr) (((attr) >> 4) & 0x7) + struct efi_simple_text_output_protocol { void *reset; efi_status_t (EFIAPI *output_string)( struct efi_simple_text_output_protocol *this, - const unsigned short *str); + const efi_string_t str); efi_status_t (EFIAPI *test_string)( struct efi_simple_text_output_protocol *this, - const unsigned short *str); + const efi_string_t str); efi_status_t(EFIAPI *query_mode)( struct efi_simple_text_output_protocol *this, unsigned long mode_number, unsigned long *columns, @@ -423,22 +535,14 @@ struct efi_console_control_protocol EFI_GUID(0x8b843e20, 0x8132, 0x4852, \ 0x90, 0xcc, 0x55, 0x1a, 0x4e, 0x4a, 0x7f, 0x1c) -struct efi_device_path_protocol -{ - uint8_t type; - uint8_t sub_type; - uint16_t length; - uint8_t data[]; -}; - struct efi_device_path_to_text_protocol { uint16_t *(EFIAPI *convert_device_node_to_text)( - struct efi_device_path_protocol *device_node, + struct efi_device_path *device_node, bool display_only, bool allow_shortcuts); uint16_t *(EFIAPI *convert_device_path_to_text)( - struct efi_device_path_protocol *device_path, + struct efi_device_path *device_path, bool display_only, bool allow_shortcuts); }; @@ -530,11 +634,21 @@ struct efi_simple_network_mode { u8 media_present; }; -#define EFI_SIMPLE_NETWORK_RECEIVE_UNICAST 0x01, -#define EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST 0x02, -#define EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST 0x04, -#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS 0x08, -#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST 0x10, +/* receive_filters bit mask */ +#define EFI_SIMPLE_NETWORK_RECEIVE_UNICAST 0x01 +#define EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST 0x02 +#define EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST 0x04 +#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS 0x08 +#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST 0x10 + +/* interrupt status bit mask */ +#define EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT 0x01 +#define EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT 0x02 +#define EFI_SIMPLE_NETWORK_COMMAND_INTERRUPT 0x04 +#define EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT 0x08 + +/* revision of the simple network protocol */ +#define EFI_SIMPLE_NETWORK_PROTOCOL_REVISION 0x00010000 struct efi_simple_network { @@ -563,14 +677,14 @@ struct efi_simple_network efi_status_t (EFIAPI *get_status)(struct efi_simple_network *this, u32 *int_status, void **txbuf); efi_status_t (EFIAPI *transmit)(struct efi_simple_network *this, - ulong header_size, ulong buffer_size, void *buffer, + size_t header_size, size_t buffer_size, void *buffer, struct efi_mac_address *src_addr, struct efi_mac_address *dest_addr, u16 *protocol); efi_status_t (EFIAPI *receive)(struct efi_simple_network *this, - ulong *header_size, ulong *buffer_size, void *buffer, + size_t *header_size, size_t *buffer_size, void *buffer, struct efi_mac_address *src_addr, struct efi_mac_address *dest_addr, u16 *protocol); - void (EFIAPI *waitforpacket)(void); + struct efi_event *wait_for_packet; struct efi_simple_network_mode *mode; }; @@ -609,4 +723,69 @@ struct efi_pxe { struct efi_pxe_mode *mode; }; +#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID \ + EFI_GUID(0x964e5b22, 0x6459, 0x11d2, \ + 0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b) +#define EFI_FILE_PROTOCOL_REVISION 0x00010000 + +struct efi_file_handle { + u64 rev; + efi_status_t (EFIAPI *open)(struct efi_file_handle *file, + struct efi_file_handle **new_handle, + s16 *file_name, u64 open_mode, u64 attributes); + efi_status_t (EFIAPI *close)(struct efi_file_handle *file); + efi_status_t (EFIAPI *delete)(struct efi_file_handle *file); + efi_status_t (EFIAPI *read)(struct efi_file_handle *file, + u64 *buffer_size, void *buffer); + efi_status_t (EFIAPI *write)(struct efi_file_handle *file, + u64 *buffer_size, void *buffer); + efi_status_t (EFIAPI *getpos)(struct efi_file_handle *file, + u64 *pos); + efi_status_t (EFIAPI *setpos)(struct efi_file_handle *file, + u64 pos); + efi_status_t (EFIAPI *getinfo)(struct efi_file_handle *file, + efi_guid_t *info_type, u64 *buffer_size, void *buffer); + efi_status_t (EFIAPI *setinfo)(struct efi_file_handle *file, + efi_guid_t *info_type, u64 buffer_size, void *buffer); + efi_status_t (EFIAPI *flush)(struct efi_file_handle *file); +}; + +#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID \ + EFI_GUID(0x964e5b22, 0x6459, 0x11d2, \ + 0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b) +#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION 0x00010000 + +struct efi_simple_file_system_protocol { + u64 rev; + efi_status_t (EFIAPI *open_volume)(struct efi_simple_file_system_protocol *this, + struct efi_file_handle **root); +}; + +#define EFI_FILE_INFO_GUID \ + EFI_GUID(0x9576e92, 0x6d3f, 0x11d2, \ + 0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b) + +#define EFI_FILE_MODE_READ 0x0000000000000001 +#define EFI_FILE_MODE_WRITE 0x0000000000000002 +#define EFI_FILE_MODE_CREATE 0x8000000000000000 + +#define EFI_FILE_READ_ONLY 0x0000000000000001 +#define EFI_FILE_HIDDEN 0x0000000000000002 +#define EFI_FILE_SYSTEM 0x0000000000000004 +#define EFI_FILE_RESERVED 0x0000000000000008 +#define EFI_FILE_DIRECTORY 0x0000000000000010 +#define EFI_FILE_ARCHIVE 0x0000000000000020 +#define EFI_FILE_VALID_ATTR 0x0000000000000037 + +struct efi_file_info { + u64 size; + u64 file_size; + u64 physical_size; + struct efi_time create_time; + struct efi_time last_access_time; + struct efi_time modification_time; + u64 attribute; + s16 file_name[0]; +}; + #endif diff --git a/include/efi_loader.h b/include/efi_loader.h index 1179234f68..1b92edbd77 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -17,6 +17,7 @@ int __efi_entry_check(void); int __efi_exit_check(void); +const char *__efi_nesting(void); const char *__efi_nesting_inc(void); const char *__efi_nesting_dec(void); @@ -41,9 +42,22 @@ const char *__efi_nesting_dec(void); }) /* - * Callback into UEFI world from u-boot: + * Call non-void UEFI function from u-boot and retrieve return value: */ -#define EFI_CALL(exp) do { \ +#define EFI_CALL(exp) ({ \ + debug("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \ + assert(__efi_exit_check()); \ + typeof(exp) _r = exp; \ + assert(__efi_entry_check()); \ + debug("%sEFI: %lu returned by %s\n", __efi_nesting_dec(), \ + (unsigned long)((uintptr_t)_r & ~EFI_ERROR_MASK), #exp); \ + _r; \ +}) + +/* + * Call void UEFI function from u-boot: + */ +#define EFI_CALL_VOID(exp) do { \ debug("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \ assert(__efi_exit_check()); \ exp; \ @@ -51,6 +65,13 @@ const char *__efi_nesting_dec(void); debug("%sEFI: Return From: %s\n", __efi_nesting_dec(), #exp); \ } while(0) +/* + * Write GUID + */ +#define EFI_PRINT_GUID(txt, guid) ({ \ + debug("%sEFI: %s %pUl\n", __efi_nesting(), txt, guid); \ + }) + extern struct efi_runtime_services efi_runtime_services; extern struct efi_system_table systab; @@ -59,10 +80,15 @@ extern struct efi_simple_input_interface efi_con_in; extern const struct efi_console_control_protocol efi_console_control; extern const struct efi_device_path_to_text_protocol efi_device_path_to_text; +uint16_t *efi_dp_str(struct efi_device_path *dp); + +extern const efi_guid_t efi_global_variable_guid; extern const efi_guid_t efi_guid_console_control; extern const efi_guid_t efi_guid_device_path; extern const efi_guid_t efi_guid_loaded_image; extern const efi_guid_t efi_guid_device_path_to_text_protocol; +extern const efi_guid_t efi_simple_file_system_protocol_guid; +extern const efi_guid_t efi_file_info_guid; extern unsigned int __efi_runtime_start, __efi_runtime_stop; extern unsigned int __efi_runtime_rel_start, __efi_runtime_rel_stop; @@ -86,8 +112,8 @@ struct efi_handler { struct efi_object { /* Every UEFI object is part of a global object list */ struct list_head link; - /* We support up to 8 "protocols" an object can be accessed through */ - struct efi_handler protocols[8]; + /* We support up to 16 "protocols" an object can be accessed through */ + struct efi_handler protocols[16]; /* The object spawner can either use this for data or as identifier */ void *handle; }; @@ -110,7 +136,8 @@ struct efi_object { * @nofify_function: Function to call when the event is triggered * @notify_context: Data to be passed to the notify function * @trigger_type: Type of timer, see efi_set_timer - * @signaled: The notify function was already called + * @queued: The notification function is queued + * @signaled: The event occurred. The event is in the signaled state. */ struct efi_event { uint32_t type; @@ -120,7 +147,8 @@ struct efi_event { u64 trigger_next; u64 trigger_time; enum efi_timer_delay trigger_type; - int signaled; + bool is_queued; + bool is_signaled; }; @@ -134,10 +162,13 @@ int efi_disk_register(void); /* Called by bootefi to make GOP (graphical) interface available */ int efi_gop_register(void); /* Called by bootefi to make the network interface available */ -int efi_net_register(void **handle); +int efi_net_register(void); /* Called by bootefi to make SMBIOS tables available */ void efi_smbios_register(void); +struct efi_simple_file_system_protocol * +efi_fs_from_path(struct efi_device_path *fp); + /* Called by networking code to memorize the dhcp ack package */ void efi_net_set_dhcp_ack(void *pkt, int len); @@ -166,6 +197,14 @@ efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type, /* Call this to signal an event */ void efi_signal_event(struct efi_event *event); +/* open file system: */ +struct efi_simple_file_system_protocol *efi_simple_file_system( + struct blk_desc *desc, int part, struct efi_device_path *dp); + +/* open file from device-path: */ +struct efi_file_handle *efi_file_from_path(struct efi_device_path *fp); + + /* Generic EFI memory allocator, call this to get memory */ void *efi_alloc(uint64_t len, int memory_type); /* More specific EFI memory allocator, called by EFI payloads */ @@ -191,12 +230,46 @@ uint64_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type, int efi_memory_init(void); /* Adds new or overrides configuration table entry to the system table */ efi_status_t efi_install_configuration_table(const efi_guid_t *guid, void *table); +void efi_setup_loaded_image(struct efi_loaded_image *info, struct efi_object *obj, + struct efi_device_path *device_path, + struct efi_device_path *file_path); +efi_status_t efi_load_image_from_path(struct efi_device_path *file_path, + void **buffer); #ifdef CONFIG_EFI_LOADER_BOUNCE_BUFFER extern void *efi_bounce_buffer; #define EFI_LOADER_BOUNCE_BUFFER_SIZE (64 * 1024 * 1024) #endif + +struct efi_device_path *efi_dp_next(const struct efi_device_path *dp); +int efi_dp_match(struct efi_device_path *a, struct efi_device_path *b); +struct efi_object *efi_dp_find_obj(struct efi_device_path *dp, + struct efi_device_path **rem); +unsigned efi_dp_size(const struct efi_device_path *dp); +struct efi_device_path *efi_dp_dup(const struct efi_device_path *dp); +struct efi_device_path *efi_dp_append(const struct efi_device_path *dp1, + const struct efi_device_path *dp2); +struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp, + const struct efi_device_path *node); + + +struct efi_device_path *efi_dp_from_dev(struct udevice *dev); +struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part); +struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part, + const char *path); +struct efi_device_path *efi_dp_from_eth(void); +struct efi_device_path *efi_dp_from_mem(uint32_t mem_type, + uint64_t start_address, + uint64_t end_address); +void efi_dp_split_file_path(struct efi_device_path *full_path, + struct efi_device_path **device_path, + struct efi_device_path **file_path); + +#define EFI_DP_TYPE(_dp, _type, _subtype) \ + (((_dp)->type == DEVICE_PATH_TYPE_##_type) && \ + ((_dp)->sub_type == DEVICE_PATH_SUB_TYPE_##_subtype)) + /* Convert strings from normal C strings to uEFI strings */ static inline void ascii2unicode(u16 *unicode, const char *ascii) { @@ -233,6 +306,28 @@ efi_status_t __efi_runtime EFIAPI efi_get_time( struct efi_time_cap *capabilities); void efi_get_time_init(void); +#ifdef CONFIG_CMD_BOOTEFI_SELFTEST +/* + * Entry point for the tests of the EFI API. + * It is called by 'bootefi selftest' + */ +efi_status_t EFIAPI efi_selftest(efi_handle_t image_handle, + struct efi_system_table *systab); +#endif + +efi_status_t EFIAPI efi_get_variable(s16 *variable_name, + efi_guid_t *vendor, u32 *attributes, + unsigned long *data_size, void *data); +efi_status_t EFIAPI efi_get_next_variable( + unsigned long *variable_name_size, + s16 *variable_name, efi_guid_t *vendor); +efi_status_t EFIAPI efi_set_variable(s16 *variable_name, + efi_guid_t *vendor, u32 attributes, + unsigned long data_size, void *data); + +void *efi_bootmgr_load(struct efi_device_path **device_path, + struct efi_device_path **file_path); + #else /* defined(EFI_LOADER) && !defined(CONFIG_SPL_BUILD) */ /* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */ diff --git a/include/efi_selftest.h b/include/efi_selftest.h new file mode 100644 index 0000000000..7ec42a0406 --- /dev/null +++ b/include/efi_selftest.h @@ -0,0 +1,105 @@ +/* + * EFI application loader + * + * Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _EFI_SELFTEST_H +#define _EFI_SELFTEST_H + +#include <common.h> +#include <efi.h> +#include <efi_api.h> +#include <linker_lists.h> + +#define EFI_ST_SUCCESS 0 +#define EFI_ST_FAILURE 1 + +/* + * Prints an error message. + * + * @... format string followed by fields to print + */ +#define efi_st_error(...) \ + (efi_st_printf("%s(%u):\nERROR: ", __FILE__, __LINE__), \ + efi_st_printf(__VA_ARGS__)) \ + +/* + * A test may be setup and executed at boottime, + * it may be setup at boottime and executed at runtime, + * or it may be setup and executed at runtime. + */ +enum efi_test_phase { + EFI_EXECUTE_BEFORE_BOOTTIME_EXIT = 1, + EFI_SETUP_BEFORE_BOOTTIME_EXIT, + EFI_SETUP_AFTER_BOOTTIME_EXIT, +}; + +extern struct efi_simple_text_output_protocol *con_out; +extern struct efi_simple_input_interface *con_in; + +/* + * Exit the boot services. + * + * The size of the memory map is determined. + * Pool memory is allocated to copy the memory map. + * The memory amp is copied and the map key is obtained. + * The map key is used to exit the boot services. + */ +void efi_st_exit_boot_services(void); + +/* + * Print a pointer to an u16 string + * + * @pointer: pointer + * @buf: pointer to buffer address + * on return position of terminating zero word + */ +void efi_st_printf(const char *fmt, ...) + __attribute__ ((format (__printf__, 1, 2))); + +/* + * Compare memory. + * We cannot use lib/string.c due to different CFLAGS values. + * + * @buf1: first buffer + * @buf2: second buffer + * @length: number of bytes to compare + * @return: 0 if both buffers contain the same bytes + */ +int efi_st_memcmp(const void *buf1, const void *buf2, size_t length); + +/* + * Reads an Unicode character from the input device. + * + * @return: Unicode character + */ +u16 efi_st_get_key(void); + +/** + * struct efi_unit_test - EFI unit test + * + * An efi_unit_test provides a interface to an EFI unit test. + * + * @name: name of unit test + * @phase: specifies when setup and execute are executed + * @setup: set up the unit test + * @teardown: tear down the unit test + * @execute: execute the unit test + */ +struct efi_unit_test { + const char *name; + const enum efi_test_phase phase; + int (*setup)(const efi_handle_t handle, + const struct efi_system_table *systable); + int (*execute)(void); + int (*teardown)(void); +}; + +/* Declare a new EFI unit test */ +#define EFI_UNIT_TEST(__name) \ + ll_entry_declare(struct efi_unit_test, __name, efi_unit_test) + +#endif /* _EFI_SELFTEST_H */ diff --git a/include/environment.h b/include/environment.h index 03b41e0c51..7b98216389 100644 --- a/include/environment.h +++ b/include/environment.h @@ -198,7 +198,6 @@ enum env_valid { }; enum env_location { - ENVL_DATAFLASH, ENVL_EEPROM, ENVL_EXT4, ENVL_FAT, diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h index 5b1b97bafe..799d9840aa 100644 --- a/include/environment/ti/boot.h +++ b/include/environment/ti/boot.h @@ -29,7 +29,14 @@ "partitions=" PARTS_DEFAULT "\0" \ "optargs=\0" \ "dofastboot=0\0" \ + "emmc_linux_boot=" \ + "echo Trying to boot Linux from eMMC ...; " \ + "setenv mmcdev 1; " \ + "setenv bootpart 1:2; " \ + "setenv mmcroot /dev/mmcblk0p2 rw; " \ + "run mmcboot;\0" \ "emmc_android_boot=" \ + "echo Trying to boot Android from eMMC ...; " \ "setenv eval_bootargs setenv bootargs $bootargs; " \ "run eval_bootargs; " \ "setenv mmcdev 1; " \ @@ -44,7 +51,6 @@ "part size mmc ${mmcdev} ${boot_part} boot_size; " \ "mmc read ${fdtaddr} ${fdt_start} ${fdt_size}; " \ "mmc read ${loadaddr} ${boot_start} ${boot_size}; " \ - "echo Booting from eMMC ...; " \ "bootm $loadaddr $loadaddr $fdtaddr;\0" #ifdef CONFIG_OMAP54XX @@ -93,10 +99,7 @@ "run findfdt; " \ "run envboot; " \ "run mmcboot;" \ - "setenv mmcdev 1; " \ - "setenv bootpart 1:2; " \ - "setenv mmcroot /dev/mmcblk0p2 rw; " \ - "run mmcboot;" \ + "run emmc_linux_boot; " \ "run emmc_android_boot; " \ "" diff --git a/include/flash.h b/include/flash.h index f53fe91349..dc67cb2df6 100644 --- a/include/flash.h +++ b/include/flash.h @@ -42,11 +42,16 @@ typedef struct { ushort cfi_offset; /* offset for cfi query */ ulong addr_unlock1; /* unlock address 1 for AMD flash roms */ ulong addr_unlock2; /* unlock address 2 for AMD flash roms */ + uchar sr_supported; /* status register supported */ const char *name; /* human-readable name */ #endif #ifdef CONFIG_MTD struct mtd_info *mtd; #endif +#ifdef CONFIG_CFI_FLASH /* DM-specific parts */ + struct udevice *dev; + phys_addr_t base; +#endif } flash_info_t; extern flash_info_t flash_info[]; /* info for FLASH chips */ diff --git a/include/fs.h b/include/fs.h index 0869ad6e80..32fc480135 100644 --- a/include/fs.h +++ b/include/fs.h @@ -13,6 +13,7 @@ #define FS_TYPE_EXT 2 #define FS_TYPE_SANDBOX 3 #define FS_TYPE_UBIFS 4 +#define FS_TYPE_BTRFS 5 /* * Tell the fs layer which block device an partition to use for future diff --git a/include/fs_internal.h b/include/fs_internal.h new file mode 100644 index 0000000000..9d6dddd841 --- /dev/null +++ b/include/fs_internal.h @@ -0,0 +1,17 @@ +/* + * 2017 by Marek Behun <marek.behun@nic.cz> + * + * Derived from code in ext4/dev.c, which was based on reiserfs/dev.c + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __U_BOOT_FS_INTERNAL_H__ +#define __U_BOOT_FS_INTERNAL_H__ + +#include <part.h> + +int fs_devread(struct blk_desc *, disk_partition_t *, lbaint_t, int, int, + char *); + +#endif /* __U_BOOT_FS_INTERNAL_H__ */ diff --git a/include/image.h b/include/image.h index af98ed9f25..127cfc5148 100644 --- a/include/image.h +++ b/include/image.h @@ -558,7 +558,6 @@ ulong genimg_get_kernel_addr_fit(char * const img_addr, ulong genimg_get_kernel_addr(char * const img_addr); int genimg_get_format(const void *img_addr); int genimg_has_config(bootm_headers_t *images); -ulong genimg_get_image(ulong img_addr); int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images, uint8_t arch, const ulong *ld_start, ulong * const ld_len); @@ -1299,6 +1298,19 @@ void board_fit_image_post_process(void **p_image, size_t *p_size); #define FDT_ERROR ((ulong)(-1)) ulong fdt_getprop_u32(const void *fdt, int node, const char *prop); + +/** + * fit_find_config_node() - Find the node for the best DTB in a FIT image + * + * A FIT image contains one or more DTBs. This function parses the + * configurations described in the FIT images and returns the node of + * the first matching DTB. To check if a DTB matches a board, this function + * calls board_fit_config_name_match(). If no matching DTB is found, it returns + * the node described by the default configuration if it exists. + * + * @fdt: pointer to flat device tree + * @return the node if found, -ve otherwise + */ int fit_find_config_node(const void *fdt); /** diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h new file mode 100644 index 0000000000..8b9d6fff00 --- /dev/null +++ b/include/linux/bitfield.h @@ -0,0 +1,106 @@ +/* + * Copyright (C) 2014 Felix Fietkau <nbd@nbd.name> + * Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _LINUX_BITFIELD_H +#define _LINUX_BITFIELD_H + +#include <linux/bug.h> + +/* + * Bitfield access macros + * + * FIELD_{GET,PREP} macros take as first parameter shifted mask + * from which they extract the base mask and shift amount. + * Mask must be a compilation time constant. + * + * Example: + * + * #define REG_FIELD_A GENMASK(6, 0) + * #define REG_FIELD_B BIT(7) + * #define REG_FIELD_C GENMASK(15, 8) + * #define REG_FIELD_D GENMASK(31, 16) + * + * Get: + * a = FIELD_GET(REG_FIELD_A, reg); + * b = FIELD_GET(REG_FIELD_B, reg); + * + * Set: + * reg = FIELD_PREP(REG_FIELD_A, 1) | + * FIELD_PREP(REG_FIELD_B, 0) | + * FIELD_PREP(REG_FIELD_C, c) | + * FIELD_PREP(REG_FIELD_D, 0x40); + * + * Modify: + * reg &= ~REG_FIELD_C; + * reg |= FIELD_PREP(REG_FIELD_C, c); + */ + +#define __bf_shf(x) (__builtin_ffsll(x) - 1) + +#define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ + ({ \ + BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \ + _pfx "mask is not constant"); \ + BUILD_BUG_ON_MSG(!(_mask), _pfx "mask is zero"); \ + BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ + ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \ + _pfx "value too large for the field"); \ + BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \ + _pfx "type of reg too small for mask"); \ + __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \ + (1ULL << __bf_shf(_mask))); \ + }) + +/** + * FIELD_FIT() - check if value fits in the field + * @_mask: shifted mask defining the field's length and position + * @_val: value to test against the field + * + * Return: true if @_val can fit inside @_mask, false if @_val is too big. + */ +#define FIELD_FIT(_mask, _val) \ + ({ \ + __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: "); \ + !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ + }) + +/** + * FIELD_PREP() - prepare a bitfield element + * @_mask: shifted mask defining the field's length and position + * @_val: value to put in the field + * + * FIELD_PREP() masks and shifts up the value. The result should + * be combined with other fields of the bitfield using logical OR. + */ +#define FIELD_PREP(_mask, _val) \ + ({ \ + __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ + ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ + }) + +/** + * FIELD_GET() - extract a bitfield element + * @_mask: shifted mask defining the field's length and position + * @_reg: 32bit value of entire bitfield + * + * FIELD_GET() extracts the field specified by @_mask from the + * bitfield passed in as @_reg by masking and shifting it down. + */ +#define FIELD_GET(_mask, _reg) \ + ({ \ + __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ + (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ + }) + +#endif diff --git a/include/linux/bug.h b/include/linux/bug.h index 920e3796c3..f07bb716fc 100644 --- a/include/linux/bug.h +++ b/include/linux/bug.h @@ -1,55 +1,34 @@ #ifndef _LINUX_BUG_H #define _LINUX_BUG_H +#include <vsprintf.h> /* for panic() */ +#include <linux/build_bug.h> #include <linux/compiler.h> - -#ifdef __CHECKER__ -#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0) -#define BUILD_BUG_ON_ZERO(e) (0) -#define BUILD_BUG_ON_NULL(e) ((void*)0) -#define BUILD_BUG_ON_INVALID(e) (0) -#define BUILD_BUG_ON(condition) (0) -#define BUILD_BUG() (0) -#else /* __CHECKER__ */ - -/* Force a compilation error if a constant expression is not a power of 2 */ -#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ - BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0)) - -/* Force a compilation error if condition is true, but also produce a - result (of value 0 and type size_t), so the expression can be used - e.g. in a structure initializer (or where-ever else comma expressions - aren't permitted). */ -#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); })) -#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:-!!(e); })) - -/* - * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the - * expression but avoids the generation of any code, even if that expression - * has side-effects. - */ -#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e)))) - -/** - * BUILD_BUG_ON - break compile if a condition is true. - * @condition: the condition which the compiler should know is false. - * - * If you have some code which relies on certain constants being equal, or - * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to - * detect if someone changes it. - * - * The implementation uses gcc's reluctance to create a negative array, but gcc - * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to - * inline functions). Luckily, in 4.3 they added the "error" function - * attribute just for this type of case. Thus, we use a negative sized array - * (should always create an error on gcc versions older than 4.4) and then call - * an undefined function with the error attribute (should always create an - * error on gcc 4.3 and later). If for some reason, neither creates a - * compile-time error, we'll still have a link-time error, which is harder to - * track down. - */ -#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) - -#endif /* __CHECKER__ */ +#include <linux/printk.h> + +#define BUG() do { \ + printk("BUG at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \ + panic("BUG!"); \ +} while (0) + +#define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while (0) + +#define WARN_ON(condition) ({ \ + int __ret_warn_on = !!(condition); \ + if (unlikely(__ret_warn_on)) \ + printk("WARNING at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \ + unlikely(__ret_warn_on); \ +}) + +#define WARN_ON_ONCE(condition) ({ \ + static bool __warned; \ + int __ret_warn_once = !!(condition); \ + \ + if (unlikely(__ret_warn_once && !__warned)) { \ + __warned = true; \ + WARN_ON(1); \ + } \ + unlikely(__ret_warn_once); \ +}) #endif /* _LINUX_BUG_H */ diff --git a/include/linux/build_bug.h b/include/linux/build_bug.h new file mode 100644 index 0000000000..b7d22d6000 --- /dev/null +++ b/include/linux/build_bug.h @@ -0,0 +1,84 @@ +#ifndef _LINUX_BUILD_BUG_H +#define _LINUX_BUILD_BUG_H + +#include <linux/compiler.h> + +#ifdef __CHECKER__ +#define __BUILD_BUG_ON_NOT_POWER_OF_2(n) (0) +#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0) +#define BUILD_BUG_ON_ZERO(e) (0) +#define BUILD_BUG_ON_NULL(e) ((void *)0) +#define BUILD_BUG_ON_INVALID(e) (0) +#define BUILD_BUG_ON_MSG(cond, msg) (0) +#define BUILD_BUG_ON(condition) (0) +#define BUILD_BUG() (0) +#else /* __CHECKER__ */ + +/* Force a compilation error if a constant expression is not a power of 2 */ +#define __BUILD_BUG_ON_NOT_POWER_OF_2(n) \ + BUILD_BUG_ON(((n) & ((n) - 1)) != 0) +#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ + BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0)) + +/* + * Force a compilation error if condition is true, but also produce a + * result (of value 0 and type size_t), so the expression can be used + * e.g. in a structure initializer (or where-ever else comma expressions + * aren't permitted). + */ +#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); })) +#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:(-!!(e)); })) + +/* + * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the + * expression but avoids the generation of any code, even if that expression + * has side-effects. + */ +#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e)))) + +/** + * BUILD_BUG_ON_MSG - break compile if a condition is true & emit supplied + * error message. + * @condition: the condition which the compiler should know is false. + * + * See BUILD_BUG_ON for description. + */ +#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) + +/** + * BUILD_BUG_ON - break compile if a condition is true. + * @condition: the condition which the compiler should know is false. + * + * If you have some code which relies on certain constants being equal, or + * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to + * detect if someone changes it. + * + * The implementation uses gcc's reluctance to create a negative array, but gcc + * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to + * inline functions). Luckily, in 4.3 they added the "error" function + * attribute just for this type of case. Thus, we use a negative sized array + * (should always create an error on gcc versions older than 4.4) and then call + * an undefined function with the error attribute (should always create an + * error on gcc 4.3 and later). If for some reason, neither creates a + * compile-time error, we'll still have a link-time error, which is harder to + * track down. + */ +#ifndef __OPTIMIZE__ +#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) +#else +#define BUILD_BUG_ON(condition) \ + BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition) +#endif + +/** + * BUILD_BUG - break compile if used. + * + * If you have some code that you expect the compiler to eliminate at + * build time, you should use BUILD_BUG to detect if it is + * unexpectedly used. + */ +#define BUILD_BUG() BUILD_BUG_ON_MSG(1, "BUILD_BUG failed") + +#endif /* __CHECKER__ */ + +#endif /* _LINUX_BUILD_BUG_H */ diff --git a/include/linux/compat.h b/include/linux/compat.h index 2336b56cf5..8711fe2b48 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -15,6 +15,23 @@ struct p_current{ extern struct p_current *current; +/* avoid conflict with <dm/device.h> */ +#ifdef dev_dbg +#undef dev_dbg +#endif +#ifdef dev_vdbg +#undef dev_vdbg +#endif +#ifdef dev_info +#undef dev_info +#endif +#ifdef dev_err +#undef dev_err +#endif +#ifdef dev_warn +#undef dev_warn +#endif + #define dev_dbg(dev, fmt, args...) \ debug(fmt, ##args) #define dev_vdbg(dev, fmt, args...) \ @@ -25,17 +42,6 @@ extern struct p_current *current; printf(fmt, ##args) #define dev_warn(dev, fmt, args...) \ printf(fmt, ##args) -#define printk printf -#define printk_once printf - -#define KERN_EMERG -#define KERN_ALERT -#define KERN_CRIT -#define KERN_ERR -#define KERN_WARNING -#define KERN_NOTICE -#define KERN_INFO -#define KERN_DEBUG #define GFP_ATOMIC ((gfp_t) 0) #define GFP_KERNEL ((gfp_t) 0) @@ -98,21 +104,6 @@ static inline void kmem_cache_destroy(struct kmem_cache *cachep) #define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) -#ifndef BUG -#define BUG() do { \ - printf("U-Boot BUG at %s:%d!\n", __FILE__, __LINE__); \ -} while (0) - -#define BUG_ON(condition) do { if (condition) BUG(); } while(0) -#endif /* BUG */ - -#define WARN_ON(condition) ({ \ - int __ret_warn_on = !!(condition); \ - if (unlikely(__ret_warn_on)) \ - printf("WARNING in %s line %d\n", __FILE__, __LINE__); \ - unlikely(__ret_warn_on); \ -}) - #define PAGE_SIZE 4096 /* drivers/char/random.c */ diff --git a/include/linux/compiler.h b/include/linux/compiler.h index 020ad16a04..0ea6c8fcca 100644 --- a/include/linux/compiler.h +++ b/include/linux/compiler.h @@ -476,7 +476,8 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s # define __compiletime_error_fallback(condition) do { } while (0) #endif -#define __compiletime_assert(condition, msg, prefix, suffix) \ +#ifdef __OPTIMIZE__ +# define __compiletime_assert(condition, msg, prefix, suffix) \ do { \ bool __cond = !(condition); \ extern void prefix ## suffix(void) __compiletime_error(msg); \ @@ -484,6 +485,9 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s prefix ## suffix(); \ __compiletime_error_fallback(__cond); \ } while (0) +#else +# define __compiletime_assert(condition, msg, prefix, suffix) do { } while (0) +#endif #define _compiletime_assert(condition, msg, prefix, suffix) \ __compiletime_assert(condition, msg, prefix, suffix) diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 0b616713cc..87d2d9554d 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -57,6 +57,11 @@ #define FIELD_SIZEOF(t, f) (sizeof(((t*)0)->f)) #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) +#define DIV_ROUND_DOWN_ULL(ll, d) \ + ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; }) + +#define DIV_ROUND_UP_ULL(ll, d) DIV_ROUND_DOWN_ULL((ll) + (d) - 1, (d)) + #if BITS_PER_LONG == 32 # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d) #else diff --git a/include/linux/lzo.h b/include/linux/lzo.h index 88687faba1..8981d04f96 100644 --- a/include/linux/lzo.h +++ b/include/linux/lzo.h @@ -31,6 +31,9 @@ int lzo1x_decompress_safe(const unsigned char *src, size_t src_len, int lzop_decompress(const unsigned char *src, size_t src_len, unsigned char *dst, size_t *dst_len); +/* check if the header is valid (based on magic numbers) */ +bool lzop_is_valid_header(const unsigned char *src); + /* * Return values (< 0 = Error) */ diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 1fd17c303a..3e1694b3a5 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -452,28 +452,20 @@ static inline void mtd_erase_callback(struct erase_info *instr) #define MTD_DEBUG_LEVEL3 (3) /* Noisy */ #ifdef CONFIG_MTD_DEBUG -#define pr_debug(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) #define MTDDEBUG(n, args...) \ do { \ if (n <= CONFIG_MTD_DEBUG_VERBOSE) \ printk(KERN_INFO args); \ } while(0) #else /* CONFIG_MTD_DEBUG */ -#define pr_debug(args...) #define MTDDEBUG(n, args...) \ do { \ if (0) \ printk(KERN_INFO args); \ } while(0) #endif /* CONFIG_MTD_DEBUG */ -#define pr_info(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) -#define pr_warn(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) -#define pr_err(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) -#define pr_crit(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) -#define pr_cont(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) -#define pr_notice(args...) MTDDEBUG(MTD_DEBUG_LEVEL0, args) #endif - + static inline int mtd_is_bitflip(int err) { return err == -EUCLEAN; } diff --git a/include/linux/printk.h b/include/linux/printk.h new file mode 100644 index 0000000000..088513ad29 --- /dev/null +++ b/include/linux/printk.h @@ -0,0 +1,79 @@ +#ifndef __KERNEL_PRINTK__ +#define __KERNEL_PRINTK__ + +#include <stdio.h> +#include <linux/compiler.h> + +#define KERN_EMERG +#define KERN_ALERT +#define KERN_CRIT +#define KERN_ERR +#define KERN_WARNING +#define KERN_NOTICE +#define KERN_INFO +#define KERN_DEBUG +#define KERN_CONT + +#define printk(fmt, ...) \ + printf(fmt, ##__VA_ARGS__) + +/* + * Dummy printk for disabled debugging statements to use whilst maintaining + * gcc's format checking. + */ +#define no_printk(fmt, ...) \ +({ \ + if (0) \ + printk(fmt, ##__VA_ARGS__); \ + 0; \ +}) + +#define __printk(level, fmt, ...) \ +({ \ + level < CONFIG_LOGLEVEL ? printk(fmt, ##__VA_ARGS__) : 0; \ +}) + +#ifndef pr_fmt +#define pr_fmt(fmt) fmt +#endif + +#define pr_emerg(fmt, ...) \ + __printk(0, pr_fmt(fmt), ##__VA_ARGS__) +#define pr_alert(fmt, ...) \ + __printk(1, pr_fmt(fmt), ##__VA_ARGS__) +#define pr_crit(fmt, ...) \ + __printk(2, pr_fmt(fmt), ##__VA_ARGS__) +#define pr_err(fmt, ...) \ + __printk(3, pr_fmt(fmt), ##__VA_ARGS__) +#define pr_warning(fmt, ...) \ + __printk(4, pr_fmt(fmt), ##__VA_ARGS__) +#define pr_warn pr_warning +#define pr_notice(fmt, ...) \ + __printk(5, pr_fmt(fmt), ##__VA_ARGS__) +#define pr_info(fmt, ...) \ + __printk(6, pr_fmt(fmt), ##__VA_ARGS__) + +#define pr_cont(fmt, ...) \ + printk(fmt, ##__VA_ARGS__) + +/* pr_devel() should produce zero code unless DEBUG is defined */ +#ifdef DEBUG +#define pr_devel(fmt, ...) \ + __printk(7, pr_fmt(fmt), ##__VA_ARGS__) +#else +#define pr_devel(fmt, ...) \ + no_printk(pr_fmt(fmt), ##__VA_ARGS__) +#endif + +#ifdef DEBUG +#define pr_debug(fmt, ...) \ + __printk(7, pr_fmt(fmt), ##__VA_ARGS__) +#else +#define pr_debug(fmt, ...) \ + no_printk(pr_fmt(fmt), ##__VA_ARGS__) +#endif + +#define printk_once(fmt, ...) \ + printk(fmt, ##__VA_ARGS__) + +#endif diff --git a/include/linux/time.h b/include/linux/time.h index bf12b99d37..b8d298eb4d 100644 --- a/include/linux/time.h +++ b/include/linux/time.h @@ -93,11 +93,6 @@ _DEFUN (localtime_r, (tim_p, res), rem += SECSPERDAY; --days; } - while (rem >= SECSPERDAY) - { - rem -= SECSPERDAY; - ++days; - } /* compute hour, min, and sec */ res->tm_hour = (int) (rem / SECSPERHOUR); diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h index 0ad4782a36..264c9712a3 100644 --- a/include/linux/usb/ch9.h +++ b/include/linux/usb/ch9.h @@ -418,6 +418,12 @@ struct __packed usb_class_report_descriptor { #define USB_ENDPOINT_XFER_INT 3 #define USB_ENDPOINT_MAX_ADJUSTABLE 0x80 +#define USB_ENDPOINT_MAXP_MASK 0x07ff +#define USB_EP_MAXP_MULT_SHIFT 11 +#define USB_EP_MAXP_MULT_MASK (3 << USB_EP_MAXP_MULT_SHIFT) +#define USB_EP_MAXP_MULT(m) \ + (((m) & USB_EP_MAXP_MULT_MASK) >> USB_EP_MAXP_MULT_SHIFT) + /* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */ #define USB_ENDPOINT_INTRTYPE 0x30 #define USB_ENDPOINT_INTR_PERIODIC (0 << 4) @@ -625,6 +631,20 @@ static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd) return __le16_to_cpu(get_unaligned(&epd->wMaxPacketSize)); } +/** + * usb_endpoint_maxp_mult - get endpoint's transactional opportunities + * @epd: endpoint to be checked + * + * Return @epd's wMaxPacketSize[12:11] + 1 + */ +static inline int +usb_endpoint_maxp_mult(const struct usb_endpoint_descriptor *epd) +{ + int maxp = __le16_to_cpu(epd->wMaxPacketSize); + + return USB_EP_MAXP_MULT(maxp) + 1; +} + static inline int usb_endpoint_interrupt_type( const struct usb_endpoint_descriptor *epd) { diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index eade2b3614..095725a805 100644 --- a/include/mtd/cfi_flash.h +++ b/include/mtd/cfi_flash.h @@ -62,6 +62,7 @@ #define FLASH_OFFSET_MANUFACTURER_ID 0x00 #define FLASH_OFFSET_DEVICE_ID 0x01 +#define FLASH_OFFSET_LOWER_SW_BITS 0x0C #define FLASH_OFFSET_DEVICE_ID2 0x0E #define FLASH_OFFSET_DEVICE_ID3 0x0F #define FLASH_OFFSET_CFI 0x55 diff --git a/include/part.h b/include/part.h index 86117a7ce5..0caceafc5f 100644 --- a/include/part.h +++ b/include/part.h @@ -174,6 +174,21 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str, disk_partition_t *info, int allow_whole_dev); /** + * part_get_info_by_name_type() - Search for a partition by name + * for only specified partition type + * + * @param dev_desc - block device descriptor + * @param gpt_name - the specified table entry name + * @param info - returns the disk partition info + * @param part_type - only search in partitions of this type + * + * @return - the partition number on match (starting on 1), -1 on no match, + * otherwise error + */ +int part_get_info_by_name_type(struct blk_desc *dev_desc, const char *name, + disk_partition_t *info, int part_type); + +/** * part_get_info_by_name() - Search for a partition by name * among all available registered partitions * @@ -280,8 +295,9 @@ struct part_driver { #define U_BOOT_PART_TYPE(__name) \ ll_entry_declare(struct part_driver, __name, part_driver) -#if CONFIG_IS_ENABLED(EFI_PARTITION) #include <part_efi.h> + +#if CONFIG_IS_ENABLED(EFI_PARTITION) /* disk/part_efi.c */ /** * write_gpt_table() - Write the GUID Partition Table to disk diff --git a/include/part_efi.h b/include/part_efi.h index 317c044795..31e6bc6e14 100644 --- a/include/part_efi.h +++ b/include/part_efi.h @@ -58,10 +58,6 @@ /* linux/include/efi.h */ typedef u16 efi_char16_t; -typedef struct { - u8 b[16]; -} efi_guid_t; - /* based on linux/include/genhd.h */ struct partition { u8 boot_ind; /* 0x80 - active */ diff --git a/include/pci.h b/include/pci.h index c8ef997d0d..7adc04301c 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1086,6 +1086,57 @@ int pci_read_config32(pci_dev_t pcidev, int offset, u32 *valuep); int pci_read_config16(pci_dev_t pcidev, int offset, u16 *valuep); int pci_read_config8(pci_dev_t pcidev, int offset, u8 *valuep); +/** + * pci_generic_mmap_write_config() - Generic helper for writing to + * memory-mapped PCI configuration space. + * @bus: Pointer to the PCI bus + * @addr_f: Callback for calculating the config space address + * @bdf: Identifies the PCI device to access + * @offset: The offset into the device's configuration space + * @value: The value to write + * @size: Indicates the size of access to perform + * + * Write the value @value of size @size from offset @offset within the + * configuration space of the device identified by the bus, device & function + * numbers in @bdf on the PCI bus @bus. The callback function @addr_f is + * responsible for calculating the CPU address of the respective configuration + * space offset. + * + * Return: 0 on success, else -EINVAL + */ +int pci_generic_mmap_write_config( + struct udevice *bus, + int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), + pci_dev_t bdf, + uint offset, + ulong value, + enum pci_size_t size); + +/** + * pci_generic_mmap_read_config() - Generic helper for reading from + * memory-mapped PCI configuration space. + * @bus: Pointer to the PCI bus + * @addr_f: Callback for calculating the config space address + * @bdf: Identifies the PCI device to access + * @offset: The offset into the device's configuration space + * @valuep: A pointer at which to store the read value + * @size: Indicates the size of access to perform + * + * Read a value of size @size from offset @offset within the configuration + * space of the device identified by the bus, device & function numbers in @bdf + * on the PCI bus @bus. The callback function @addr_f is responsible for + * calculating the CPU address of the respective configuration space offset. + * + * Return: 0 on success, else -EINVAL + */ +int pci_generic_mmap_read_config( + struct udevice *bus, + int (*addr_f)(struct udevice *bus, pci_dev_t bdf, uint offset, void **addrp), + pci_dev_t bdf, + uint offset, + ulong *valuep, + enum pci_size_t size); + #ifdef CONFIG_DM_PCI_COMPAT /* Compatibility with old naming */ static inline int pci_write_config_dword(pci_dev_t pcidev, int offset, diff --git a/include/pe.h b/include/pe.h index deb35a0ea4..4ef3e92efa 100644 --- a/include/pe.h +++ b/include/pe.h @@ -62,6 +62,12 @@ typedef struct _IMAGE_DATA_DIRECTORY { #define IMAGE_NUMBEROF_DIRECTORY_ENTRIES 16 +/* PE32+ Subsystem type for EFI images */ +#define IMAGE_SUBSYSTEM_EFI_APPLICATION 10 +#define IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11 +#define IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12 +#define IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13 + typedef struct _IMAGE_OPTIONAL_HEADER64 { uint16_t Magic; /* 0x20b */ uint8_t MajorLinkerVersion; diff --git a/include/spl.h b/include/spl.h index ce4cf0abbe..b14a29c57c 100644 --- a/include/spl.h +++ b/include/spl.h @@ -68,6 +68,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, void preloader_console_init(void); u32 spl_boot_device(void); u32 spl_boot_mode(const u32 boot_device); +void spl_set_bd(void); /** * spl_set_header_raw_uboot() - Set up a standard SPL image structure diff --git a/include/stdio.h b/include/stdio.h new file mode 100644 index 0000000000..aedf374452 --- /dev/null +++ b/include/stdio.h @@ -0,0 +1,59 @@ +#ifndef __STDIO_H +#define __STDIO_H + +#include <stdarg.h> +#include <linux/compiler.h> + +/* stdin */ +int getc(void); +int tstc(void); + +/* stdout */ +#if !defined(CONFIG_SPL_BUILD) || \ + (defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL_SUPPORT)) || \ + (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \ + defined(CONFIG_SPL_SERIAL_SUPPORT)) +void putc(const char c); +void puts(const char *s); +int __printf(1, 2) printf(const char *fmt, ...); +int vprintf(const char *fmt, va_list args); +#else +static inline void putc(const char c) +{ +} + +static inline void puts(const char *s) +{ +} + +static inline int __printf(1, 2) printf(const char *fmt, ...) +{ + return 0; +} + +static inline int vprintf(const char *fmt, va_list args) +{ + return 0; +} +#endif + +/* + * FILE based functions (can only be used AFTER relocation!) + */ +#define stdin 0 +#define stdout 1 +#define stderr 2 +#define MAX_FILES 3 + +/* stderr */ +#define eputc(c) fputc(stderr, c) +#define eputs(s) fputs(stderr, s) +#define eprintf(fmt, args...) fprintf(stderr, fmt, ##args) + +int __printf(2, 3) fprintf(int file, const char *fmt, ...); +void fputs(int file, const char *s); +void fputc(int file, const char c); +int ftstc(int file); +int fgetc(int file); + +#endif /* __STDIO_H */ diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h index 6764d58bab..6d08f5df98 100644 --- a/include/u-boot/crc.h +++ b/include/u-boot/crc.h @@ -28,4 +28,8 @@ uint32_t crc32_no_comp (uint32_t, const unsigned char *, uint); void crc32_wd_buf(const unsigned char *input, uint ilen, unsigned char *output, uint chunk_sz); +/* lib/crc32c.c */ +void crc32c_init(uint32_t *, uint32_t); +uint32_t crc32c_cal(uint32_t, const char *, int, uint32_t *); + #endif /* _UBOOT_CRC_H */ diff --git a/include/u-boot/variadic-macro.h b/include/u-boot/variadic-macro.h new file mode 100644 index 0000000000..922beafcea --- /dev/null +++ b/include/u-boot/variadic-macro.h @@ -0,0 +1,59 @@ +/* + * Helper for work with variadic macros + * + * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __VARIADIC_MACRO_H__ +#define __VARIADIC_MACRO_H__ + +#define _VM_GET_NTH_ARG(_1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, \ + _14, _15, _16, _17, _18, _19, _20, _21, _22, _23, _24, _25, _26, _27, \ + _28, _29, _30, _31, _32, N, ...) N + +#define _VM_HELP_0(_call, ...) +#define _VM_HELP_1(_call, x, ...) _call(x) +#define _VM_HELP_2(_call, x, ...) _call(x) _VM_HELP_1(_call, __VA_ARGS__) +#define _VM_HELP_3(_call, x, ...) _call(x) _VM_HELP_2(_call, __VA_ARGS__) +#define _VM_HELP_4(_call, x, ...) _call(x) _VM_HELP_3(_call, __VA_ARGS__) +#define _VM_HELP_5(_call, x, ...) _call(x) _VM_HELP_4(_call, __VA_ARGS__) +#define _VM_HELP_6(_call, x, ...) _call(x) _VM_HELP_5(_call, __VA_ARGS__) +#define _VM_HELP_7(_call, x, ...) _call(x) _VM_HELP_6(_call, __VA_ARGS__) +#define _VM_HELP_8(_call, x, ...) _call(x) _VM_HELP_7(_call, __VA_ARGS__) +#define _VM_HELP_9(_call, x, ...) _call(x) _VM_HELP_8(_call, __VA_ARGS__) +#define _VM_HELP_10(_call, x, ...) _call(x) _VM_HELP_9(_call, __VA_ARGS__) +#define _VM_HELP_11(_call, x, ...) _call(x) _VM_HELP_10(_call, __VA_ARGS__) +#define _VM_HELP_12(_call, x, ...) _call(x) _VM_HELP_11(_call, __VA_ARGS__) +#define _VM_HELP_13(_call, x, ...) _call(x) _VM_HELP_12(_call, __VA_ARGS__) +#define _VM_HELP_14(_call, x, ...) _call(x) _VM_HELP_13(_call, __VA_ARGS__) +#define _VM_HELP_15(_call, x, ...) _call(x) _VM_HELP_14(_call, __VA_ARGS__) +#define _VM_HELP_16(_call, x, ...) _call(x) _VM_HELP_15(_call, __VA_ARGS__) +#define _VM_HELP_17(_call, x, ...) _call(x) _VM_HELP_16(_call, __VA_ARGS__) +#define _VM_HELP_18(_call, x, ...) _call(x) _VM_HELP_17(_call, __VA_ARGS__) +#define _VM_HELP_19(_call, x, ...) _call(x) _VM_HELP_18(_call, __VA_ARGS__) +#define _VM_HELP_20(_call, x, ...) _call(x) _VM_HELP_19(_call, __VA_ARGS__) +#define _VM_HELP_21(_call, x, ...) _call(x) _VM_HELP_20(_call, __VA_ARGS__) +#define _VM_HELP_22(_call, x, ...) _call(x) _VM_HELP_21(_call, __VA_ARGS__) +#define _VM_HELP_23(_call, x, ...) _call(x) _VM_HELP_22(_call, __VA_ARGS__) +#define _VM_HELP_24(_call, x, ...) _call(x) _VM_HELP_23(_call, __VA_ARGS__) +#define _VM_HELP_25(_call, x, ...) _call(x) _VM_HELP_24(_call, __VA_ARGS__) +#define _VM_HELP_26(_call, x, ...) _call(x) _VM_HELP_25(_call, __VA_ARGS__) +#define _VM_HELP_27(_call, x, ...) _call(x) _VM_HELP_26(_call, __VA_ARGS__) +#define _VM_HELP_28(_call, x, ...) _call(x) _VM_HELP_27(_call, __VA_ARGS__) +#define _VM_HELP_29(_call, x, ...) _call(x) _VM_HELP_28(_call, __VA_ARGS__) +#define _VM_HELP_30(_call, x, ...) _call(x) _VM_HELP_29(_call, __VA_ARGS__) +#define _VM_HELP_31(_call, x, ...) _call(x) _VM_HELP_30(_call, __VA_ARGS__) + +#define CALL_MACRO_FOR_EACH(x, ...) \ + _VM_GET_NTH_ARG("", ##__VA_ARGS__, _VM_HELP_31, _VM_HELP_30, \ + _VM_HELP_29, _VM_HELP_28, _VM_HELP_27, _VM_HELP_26, _VM_HELP_25, \ + _VM_HELP_24, _VM_HELP_23, _VM_HELP_22, _VM_HELP_21, _VM_HELP_20, \ + _VM_HELP_19, _VM_HELP_18, _VM_HELP_17, _VM_HELP_16, _VM_HELP_15, \ + _VM_HELP_14, _VM_HELP_13, _VM_HELP_12, _VM_HELP_11, _VM_HELP_10, \ + _VM_HELP_9, _VM_HELP_8, _VM_HELP_7, _VM_HELP_6, _VM_HELP_5, \ + _VM_HELP_4, _VM_HELP_3, _VM_HELP_2, _VM_HELP_1, \ + _VM_HELP_0)(x, __VA_ARGS__) + +#endif /* __VARIADIC_MACRO_H__ */ diff --git a/include/usb.h b/include/usb.h index fad04016a3..57a7d8d0ea 100644 --- a/include/usb.h +++ b/include/usb.h @@ -653,6 +653,18 @@ struct usb_bus_priv { }; /** + * struct usb_emul_platdata - platform data about the USB emulator + * + * Given a USB emulator (UCLASS_USB_EMUL) 'dev', this is + * dev_get_uclass_platdata(dev). + * + * @port1: USB emulator device port number on the parent hub + */ +struct usb_emul_platdata { + int port1; /* Port number (numbered from 1) */ +}; + +/** * struct dm_usb_ops - USB controller operations * * This defines the operations supoorted on a USB controller. Common @@ -766,6 +778,14 @@ struct dm_usb_ops { * representation of this hub can be updated (xHCI) */ int (*update_hub_device)(struct udevice *bus, struct usb_device *udev); + + /** + * get_max_xfer_size() - Get HCD's maximum transfer bytes + * + * The HCD may have limitation on the maximum bytes to be transferred + * in a USB transfer. USB class driver needs to be aware of this. + */ + int (*get_max_xfer_size)(struct udevice *bus, size_t *size); }; #define usb_get_ops(dev) ((struct dm_usb_ops *)(dev)->driver->ops) @@ -939,7 +959,7 @@ int usb_new_device(struct usb_device *dev); int usb_alloc_device(struct usb_device *dev); /** - * update_hub_device() - Update HCD's internal representation of hub + * usb_update_hub_device() - Update HCD's internal representation of hub * * After a hub descriptor is fetched, notify HCD so that its internal * representation of this hub can be updated. @@ -950,13 +970,24 @@ int usb_alloc_device(struct usb_device *dev); int usb_update_hub_device(struct usb_device *dev); /** + * usb_get_max_xfer_size() - Get HCD's maximum transfer bytes + * + * The HCD may have limitation on the maximum bytes to be transferred + * in a USB transfer. USB class driver needs to be aware of this. + * + * @dev: USB device + * @size: maximum transfer bytes + * @return 0 if OK, -ve on error + */ +int usb_get_max_xfer_size(struct usb_device *dev, size_t *size); + +/** * usb_emul_setup_device() - Set up a new USB device emulation * * This is normally called when a new emulation device is bound. It tells * the USB emulation uclass about the features of the emulator. * * @dev: Emulation device - * @maxpacketsize: Maximum packet size (e.g. PACKET_SIZE_64) * @strings: List of USB string descriptors, terminated by a NULL * entry * @desc_list: List of points or USB descriptors, terminated by NULL. @@ -964,8 +995,8 @@ int usb_update_hub_device(struct usb_device *dev); * and others follow on after that. * @return 0 if OK, -ENOSYS if not implemented, other -ve on error */ -int usb_emul_setup_device(struct udevice *dev, int maxpacketsize, - struct usb_string *strings, void **desc_list); +int usb_emul_setup_device(struct udevice *dev, struct usb_string *strings, + void **desc_list); /** * usb_emul_control() - Send a control packet to an emulator @@ -1004,19 +1035,20 @@ int usb_emul_int(struct udevice *emul, struct usb_device *udev, /** * usb_emul_find() - Find an emulator for a particular device * - * Check @pipe to find a device number on bus @bus and return it. + * Check @pipe and @port1 to find a device number on bus @bus and return it. * * @bus: USB bus (controller) * @pipe: Describes pipe being used, and includes the device number + * @port1: Describes port number on the parent hub * @emulp: Returns pointer to emulator, or NULL if not found * @return 0 if found, -ve on error */ -int usb_emul_find(struct udevice *bus, ulong pipe, struct udevice **emulp); +int usb_emul_find(struct udevice *bus, ulong pipe, int port1, + struct udevice **emulp); /** * usb_emul_find_for_dev() - Find an emulator for a particular device * - * @bus: USB bus (controller) * @dev: USB device to check * @emulp: Returns pointer to emulator, or NULL if not found * @return 0 if found, -ve on error @@ -1024,12 +1056,15 @@ int usb_emul_find(struct udevice *bus, ulong pipe, struct udevice **emulp); int usb_emul_find_for_dev(struct udevice *dev, struct udevice **emulp); /** - * usb_emul_reset() - Reset all emulators ready for use + * usb_emul_find_descriptor() - Find a USB descriptor of a particular device * - * Clear out any address information in the emulators and make then ready for - * a new USB scan + * @ptr: a pointer to a list of USB descriptor pointers + * @type: type of USB descriptor to find + * @index: if @type is USB_DT_CONFIG, this is the configuration value + * @return a pointer to the USB descriptor found, NULL if not found */ -void usb_emul_reset(struct udevice *dev); +struct usb_generic_descriptor **usb_emul_find_descriptor( + struct usb_generic_descriptor **ptr, int type, int index); /** * usb_show_tree() - show the USB device tree diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 59bfc14df6..4853cb2c71 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -280,6 +280,7 @@ struct usb_ehci { int usb_phy_mode(int port); /* Board-specific initialization */ int board_ehci_hcd_init(int port); +int board_ehci_power(int port, int on); int board_usb_phy_mode(int port); #endif /* _EHCI_CI_H */ diff --git a/include/video.h b/include/video.h index 5b4e78b182..61ff653121 100644 --- a/include/video.h +++ b/include/video.h @@ -115,6 +115,13 @@ struct video_ops { int video_reserve(ulong *addrp); /** + * video_clear() - Clear a device's frame buffer to background color. + * + * @dev: Device to clear + */ +void video_clear(struct udevice *dev); + +/** * video_sync() - Sync a device's frame buffer with its hardware * * Some frame buffers are cached or have a secondary frame buffer. This diff --git a/include/video_console.h b/include/video_console.h index 26047934da..9dce234bd9 100644 --- a/include/video_console.h +++ b/include/video_console.h @@ -29,6 +29,9 @@ * @xsize_frac: Width of the display in fractional units * @xstart_frac: Left margin for the text console in fractional units * @last_ch: Last character written to the text console on this line + * @escape: TRUE if currently accumulating an ANSI escape sequence + * @escape_len: Length of accumulated escape sequence so far + * @escape_buf: Buffer to accumulate escape sequence */ struct vidconsole_priv { struct stdio_dev sdev; @@ -42,6 +45,14 @@ struct vidconsole_priv { int xsize_frac; int xstart_frac; int last_ch; + /* + * ANSI escape sequences are accumulated character by character, + * starting after the ESC char (0x1b) until the entire sequence + * is consumed at which point it is acted upon. + */ + int escape; + int escape_len; + char escape_buf[32]; }; /** diff --git a/include/vsprintf.h b/include/vsprintf.h index 490c96ca6d..33d05aa0c6 100644 --- a/include/vsprintf.h +++ b/include/vsprintf.h @@ -9,6 +9,7 @@ #define __VSPRINTF_H #include <stdarg.h> +#include <linux/types.h> ulong simple_strtoul(const char *cp, char **endp, unsigned int base); diff --git a/lib/Kconfig b/lib/Kconfig index 628ef8ddb6..18663badb2 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -146,6 +146,9 @@ config SHA_PROG_HW_ACCEL config MD5 bool +config CRC32C + bool + endmenu menu "Compression Support" @@ -177,6 +180,11 @@ config LZO help This enables support for LZO compression algorithm.r +config SPL_LZO + bool "Enable LZO decompression support in SPL" + help + This enables support for LZO compression algorithm in the SPL. + config SPL_GZIP bool "Enable gzip decompression support for SPL build" select SPL_ZLIB diff --git a/lib/Makefile b/lib/Makefile index faf4538fb5..8cd779f8ca 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -9,8 +9,8 @@ ifndef CONFIG_SPL_BUILD obj-$(CONFIG_EFI) += efi/ obj-$(CONFIG_EFI_LOADER) += efi_loader/ +obj-$(CONFIG_EFI_LOADER) += efi_selftest/ obj-$(CONFIG_LZMA) += lzma/ -obj-$(CONFIG_LZO) += lzo/ obj-$(CONFIG_BZIP2) += bzip2/ obj-$(CONFIG_TIZEN) += tizen/ obj-$(CONFIG_FIT) += libfdt/ @@ -51,6 +51,8 @@ obj-$(CONFIG_SHA256) += sha256.o obj-$(CONFIG_$(SPL_)ZLIB) += zlib/ obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o +obj-$(CONFIG_$(SPL_)LZO) += lzo/ + obj-$(CONFIG_$(SPL_TPL_)SAVEENV) += qsort.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/ @@ -70,6 +72,7 @@ obj-y += display_options.o CFLAGS_display_options.o := $(if $(BUILD_TAG),-DBUILD_TAG='"$(BUILD_TAG)"') obj-$(CONFIG_BCH) += bch.o obj-y += crc32.o +obj-$(CONFIG_CRC32C) += crc32c.o obj-y += ctype.o obj-y += div64.o obj-y += hang.o diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c index b04f7c6297..f4f1bb8ffd 100644 --- a/lib/asm-offsets.c +++ b/lib/asm-offsets.c @@ -38,5 +38,7 @@ int main(void) DEFINE(GD_START_ADDR_SP, offsetof(struct global_data, start_addr_sp)); + DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd)); + return 0; } diff --git a/lib/crc32c.c b/lib/crc32c.c new file mode 100644 index 0000000000..322c08ff5d --- /dev/null +++ b/lib/crc32c.c @@ -0,0 +1,38 @@ +/* + * Copied from Linux kernel crypto/crc32c.c + * Copyright (c) 2004 Cisco Systems, Inc. + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <compiler.h> + +uint32_t crc32c_cal(uint32_t crc, const char *data, int length, + uint32_t *crc32c_table) +{ + while (length--) + crc = crc32c_table[(u8)(crc ^ *data++)] ^ (crc >> 8); + + return crc; +} + +void crc32c_init(uint32_t *crc32c_table, uint32_t pol) +{ + int i, j; + uint32_t v; + const uint32_t poly = pol; /* Bit-reflected CRC32C polynomial */ + + for (i = 0; i < 256; i++) { + v = i; + for (j = 0; j < 8; j++) + v = (v >> 1) ^ ((v & 1) ? poly : 0); + + crc32c_table[i] = v; + } +} diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile index 30bf343a36..ddb978f650 100644 --- a/lib/efi_loader/Makefile +++ b/lib/efi_loader/Makefile @@ -10,12 +10,14 @@ CFLAGS_helloworld.o := $(CFLAGS_EFI) CFLAGS_REMOVE_helloworld.o := $(CFLAGS_NON_EFI) -efiprogs-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += helloworld.efi -always := $(efiprogs-y) +ifneq ($(CONFIG_CMD_BOOTEFI_HELLO_COMPILE),) +always += helloworld.efi +endif obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o obj-y += efi_image_loader.o efi_boottime.o efi_runtime.o efi_console.o -obj-y += efi_memory.o efi_device_path_to_text.o +obj-y += efi_memory.o efi_device_path_to_text.o efi_device_path.o +obj-y += efi_file.o efi_variable.o efi_bootmgr.o obj-$(CONFIG_LCD) += efi_gop.o obj-$(CONFIG_DM_VIDEO) += efi_gop.o obj-$(CONFIG_PARTITIONS) += efi_disk.o diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c new file mode 100644 index 0000000000..857d88a879 --- /dev/null +++ b/lib/efi_loader/efi_bootmgr.c @@ -0,0 +1,180 @@ +/* + * EFI utils + * + * Copyright (c) 2017 Rob Clark + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <charset.h> +#include <malloc.h> +#include <efi_loader.h> + +static const struct efi_boot_services *bs; +static const struct efi_runtime_services *rs; + +#define LOAD_OPTION_ACTIVE 0x00000001 +#define LOAD_OPTION_FORCE_RECONNECT 0x00000002 +#define LOAD_OPTION_HIDDEN 0x00000008 + +/* + * bootmgr implements the logic of trying to find a payload to boot + * based on the BootOrder + BootXXXX variables, and then loading it. + * + * TODO detecting a special key held (f9?) and displaying a boot menu + * like you would get on a PC would be clever. + * + * TODO if we had a way to write and persist variables after the OS + * has started, we'd also want to check OsIndications to see if we + * should do normal or recovery boot. + */ + + +/* + * See section 3.1.3 in the v2.7 UEFI spec for more details on + * the layout of EFI_LOAD_OPTION. In short it is: + * + * typedef struct _EFI_LOAD_OPTION { + * UINT32 Attributes; + * UINT16 FilePathListLength; + * // CHAR16 Description[]; <-- variable length, NULL terminated + * // EFI_DEVICE_PATH_PROTOCOL FilePathList[]; <-- FilePathListLength bytes + * // UINT8 OptionalData[]; + * } EFI_LOAD_OPTION; + */ +struct load_option { + u32 attributes; + u16 file_path_length; + u16 *label; + struct efi_device_path *file_path; + u8 *optional_data; +}; + +/* parse an EFI_LOAD_OPTION, as described above */ +static void parse_load_option(struct load_option *lo, void *ptr) +{ + lo->attributes = *(u32 *)ptr; + ptr += sizeof(u32); + + lo->file_path_length = *(u16 *)ptr; + ptr += sizeof(u16); + + lo->label = ptr; + ptr += (utf16_strlen(lo->label) + 1) * 2; + + lo->file_path = ptr; + ptr += lo->file_path_length; + + lo->optional_data = ptr; +} + +/* free() the result */ +static void *get_var(u16 *name, const efi_guid_t *vendor, + unsigned long *size) +{ + efi_guid_t *v = (efi_guid_t *)vendor; + efi_status_t ret; + void *buf = NULL; + + *size = 0; + EFI_CALL(ret = rs->get_variable((s16 *)name, v, NULL, size, buf)); + if (ret == EFI_BUFFER_TOO_SMALL) { + buf = malloc(*size); + EFI_CALL(ret = rs->get_variable((s16 *)name, v, NULL, size, buf)); + } + + if (ret != EFI_SUCCESS) { + free(buf); + *size = 0; + return NULL; + } + + return buf; +} + +/* + * Attempt to load load-option number 'n', returning device_path and file_path + * if successful. This checks that the EFI_LOAD_OPTION is active (enabled) + * and that the specified file to boot exists. + */ +static void *try_load_entry(uint16_t n, struct efi_device_path **device_path, + struct efi_device_path **file_path) +{ + struct load_option lo; + u16 varname[] = L"Boot0000"; + u16 hexmap[] = L"0123456789ABCDEF"; + void *load_option, *image = NULL; + unsigned long size; + + varname[4] = hexmap[(n & 0xf000) >> 12]; + varname[5] = hexmap[(n & 0x0f00) >> 8]; + varname[6] = hexmap[(n & 0x00f0) >> 4]; + varname[7] = hexmap[(n & 0x000f) >> 0]; + + load_option = get_var(varname, &efi_global_variable_guid, &size); + if (!load_option) + return NULL; + + parse_load_option(&lo, load_option); + + if (lo.attributes & LOAD_OPTION_ACTIVE) { + efi_status_t ret; + u16 *str = NULL; + + debug("%s: trying to load \"%ls\" from: %ls\n", __func__, + lo.label, (str = efi_dp_str(lo.file_path))); + efi_free_pool(str); + + ret = efi_load_image_from_path(lo.file_path, &image); + + if (ret != EFI_SUCCESS) + goto error; + + printf("Booting: %ls\n", lo.label); + efi_dp_split_file_path(lo.file_path, device_path, file_path); + } + +error: + free(load_option); + + return image; +} + +/* + * Attempt to load, in the order specified by BootOrder EFI variable, the + * available load-options, finding and returning the first one that can + * be loaded successfully. + */ +void *efi_bootmgr_load(struct efi_device_path **device_path, + struct efi_device_path **file_path) +{ + uint16_t *bootorder; + unsigned long size; + void *image = NULL; + int i, num; + + __efi_entry_check(); + + bs = systab.boottime; + rs = systab.runtime; + + bootorder = get_var(L"BootOrder", &efi_global_variable_guid, &size); + if (!bootorder) + goto error; + + num = size / sizeof(uint16_t); + for (i = 0; i < num; i++) { + debug("%s: trying to load Boot%04X\n", __func__, bootorder[i]); + image = try_load_entry(bootorder[i], device_path, file_path); + if (image) + break; + } + + free(bootorder); + +error: + __efi_exit_check(); + + return image; +} diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 43f32385fa..f627340de4 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -7,7 +7,9 @@ */ #include <common.h> +#include <div64.h> #include <efi_loader.h> +#include <environment.h> #include <malloc.h> #include <asm/global_data.h> #include <libfdt_env.h> @@ -18,6 +20,9 @@ DECLARE_GLOBAL_DATA_PTR; +/* Task priority level */ +static UINTN efi_tpl = TPL_APPLICATION; + /* This list contains all the EFI objects our payload has access to */ LIST_HEAD(efi_obj_list); @@ -109,6 +114,11 @@ static const char *indent_string(int level) return &indent[max - level]; } +const char *__efi_nesting(void) +{ + return indent_string(nesting_level); +} + const char *__efi_nesting_inc(void) { return indent_string(nesting_level++); @@ -119,67 +129,105 @@ const char *__efi_nesting_dec(void) return indent_string(--nesting_level); } -/* Low 32 bit */ -#define EFI_LOW32(a) (a & 0xFFFFFFFFULL) -/* High 32 bit */ -#define EFI_HIGH32(a) (a >> 32) - /* - * 64bit division by 10 implemented as multiplication by 1 / 10 + * Queue an EFI event. * - * Decimals of one tenth: 0x1 / 0xA = 0x0.19999... + * This function queues the notification function of the event for future + * execution. + * + * The notification function is called if the task priority level of the + * event is higher than the current task priority level. + * + * For the SignalEvent service see efi_signal_event_ext. + * + * @event event to signal */ -#define EFI_TENTH 0x199999999999999A -static u64 efi_div10(u64 a) -{ - u64 prod; - u64 rem; - u64 ret; - - ret = EFI_HIGH32(a) * EFI_HIGH32(EFI_TENTH); - prod = EFI_HIGH32(a) * EFI_LOW32(EFI_TENTH); - rem = EFI_LOW32(prod); - ret += EFI_HIGH32(prod); - prod = EFI_LOW32(a) * EFI_HIGH32(EFI_TENTH); - rem += EFI_LOW32(prod); - ret += EFI_HIGH32(prod); - prod = EFI_LOW32(a) * EFI_LOW32(EFI_TENTH); - rem += EFI_HIGH32(prod); - ret += EFI_HIGH32(rem); - /* Round to nearest integer */ - if (rem >= (1 << 31)) - ++ret; - return ret; -} - void efi_signal_event(struct efi_event *event) { - if (event->signaled) - return; - event->signaled = 1; - if (event->type & EVT_NOTIFY_SIGNAL) { - EFI_CALL(event->notify_function(event, event->notify_context)); + if (event->notify_function) { + event->is_queued = true; + /* Check TPL */ + if (efi_tpl >= event->notify_tpl) + return; + EFI_CALL_VOID(event->notify_function(event, + event->notify_context)); } + event->is_queued = false; } +/* + * Write a debug message for an EPI API service that is not implemented yet. + * + * @funcname function that is not yet implemented + * @return EFI_UNSUPPORTED + */ static efi_status_t efi_unsupported(const char *funcname) { debug("EFI: App called into unimplemented function %s\n", funcname); return EFI_EXIT(EFI_UNSUPPORTED); } +/* + * Raise the task priority level. + * + * This function implements the RaiseTpl service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @new_tpl new value of the task priority level + * @return old value of the task priority level + */ static unsigned long EFIAPI efi_raise_tpl(UINTN new_tpl) { + UINTN old_tpl = efi_tpl; + EFI_ENTRY("0x%zx", new_tpl); - return EFI_EXIT(0); + + if (new_tpl < efi_tpl) + debug("WARNING: new_tpl < current_tpl in %s\n", __func__); + efi_tpl = new_tpl; + if (efi_tpl > TPL_HIGH_LEVEL) + efi_tpl = TPL_HIGH_LEVEL; + + EFI_EXIT(EFI_SUCCESS); + return old_tpl; } +/* + * Lower the task priority level. + * + * This function implements the RestoreTpl service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @old_tpl value of the task priority level to be restored + */ static void EFIAPI efi_restore_tpl(UINTN old_tpl) { EFI_ENTRY("0x%zx", old_tpl); - efi_unsupported(__func__); + + if (old_tpl > efi_tpl) + debug("WARNING: old_tpl > current_tpl in %s\n", __func__); + efi_tpl = old_tpl; + if (efi_tpl > TPL_HIGH_LEVEL) + efi_tpl = TPL_HIGH_LEVEL; + + EFI_EXIT(EFI_SUCCESS); } +/* + * Allocate memory pages. + * + * This function implements the AllocatePages service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @type type of allocation to be performed + * @memory_type usage type of the allocated memory + * @pages number of pages to be allocated + * @memory allocated memory + * @return status code + */ static efi_status_t EFIAPI efi_allocate_pages_ext(int type, int memory_type, unsigned long pages, uint64_t *memory) @@ -191,6 +239,17 @@ static efi_status_t EFIAPI efi_allocate_pages_ext(int type, int memory_type, return EFI_EXIT(r); } +/* + * Free memory pages. + * + * This function implements the FreePages service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @memory start of the memory area to be freed + * @pages number of pages to be freed + * @return status code + */ static efi_status_t EFIAPI efi_free_pages_ext(uint64_t memory, unsigned long pages) { @@ -201,6 +260,21 @@ static efi_status_t EFIAPI efi_free_pages_ext(uint64_t memory, return EFI_EXIT(r); } +/* + * Get map describing memory usage. + * + * This function implements the GetMemoryMap service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @memory_map_size on entry the size, in bytes, of the memory map buffer, + * on exit the size of the copied memory map + * @memory_map buffer to which the memory map is written + * @map_key key for the memory map + * @descriptor_size size of an individual memory descriptor + * @descriptor_version version number of the memory descriptor structure + * @return status code + */ static efi_status_t EFIAPI efi_get_memory_map_ext( unsigned long *memory_map_size, struct efi_mem_desc *memory_map, @@ -217,6 +291,18 @@ static efi_status_t EFIAPI efi_get_memory_map_ext( return EFI_EXIT(r); } +/* + * Allocate memory from pool. + * + * This function implements the AllocatePool service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @pool_type type of the pool from which memory is to be allocated + * @size number of bytes to be allocated + * @buffer allocated memory + * @return status code + */ static efi_status_t EFIAPI efi_allocate_pool_ext(int pool_type, unsigned long size, void **buffer) @@ -228,6 +314,16 @@ static efi_status_t EFIAPI efi_allocate_pool_ext(int pool_type, return EFI_EXIT(r); } +/* + * Free memory from pool. + * + * This function implements the FreePool service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @buffer start of memory to be freed + * @return status code + */ static efi_status_t EFIAPI efi_free_pool_ext(void *buffer) { efi_status_t r; @@ -237,12 +333,44 @@ static efi_status_t EFIAPI efi_free_pool_ext(void *buffer) return EFI_EXIT(r); } +static efi_status_t efi_create_handle(void **handle) +{ + struct efi_object *obj; + efi_status_t r; + + r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, + sizeof(struct efi_object), + (void **)&obj); + if (r != EFI_SUCCESS) + return r; + memset(obj, 0, sizeof(struct efi_object)); + obj->handle = obj; + list_add_tail(&obj->link, &efi_obj_list); + *handle = obj; + return r; +} + /* * Our event capabilities are very limited. Only a small limited * number of events is allowed to coexist. */ static struct efi_event efi_events[16]; +/* + * Create an event. + * + * This function is used inside U-Boot code to create an event. + * + * For the API function implementing the CreateEvent service see + * efi_create_event_ext. + * + * @type type of the event to create + * @notify_tpl task priority level of the event + * @notify_function notification function of the event + * @notify_context pointer passed to the notification function + * @event created event + * @return status code + */ efi_status_t efi_create_event(uint32_t type, UINTN notify_tpl, void (EFIAPI *notify_function) ( struct efi_event *event, @@ -270,13 +398,28 @@ efi_status_t efi_create_event(uint32_t type, UINTN notify_tpl, efi_events[i].notify_context = notify_context; /* Disable timers on bootup */ efi_events[i].trigger_next = -1ULL; - efi_events[i].signaled = 0; + efi_events[i].is_queued = false; + efi_events[i].is_signaled = false; *event = &efi_events[i]; return EFI_SUCCESS; } return EFI_OUT_OF_RESOURCES; } +/* + * Create an event. + * + * This function implements the CreateEvent service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @type type of the event to create + * @notify_tpl task priority level of the event + * @notify_function notification function of the event + * @notify_context pointer passed to the notification function + * @event created event + * @return status code + */ static efi_status_t EFIAPI efi_create_event_ext( uint32_t type, UINTN notify_tpl, void (EFIAPI *notify_function) ( @@ -292,8 +435,11 @@ static efi_status_t EFIAPI efi_create_event_ext( /* + * Check if a timer event has occurred or a queued notification function should + * be called. + * * Our timers have to work without interrupts, so we check whenever keyboard - * input or disk accesses happen if enough time elapsed for it to fire. + * input or disk accesses happen if enough time elapsed for them to fire. */ void efi_timer_check(void) { @@ -301,21 +447,41 @@ void efi_timer_check(void) u64 now = timer_get_us(); for (i = 0; i < ARRAY_SIZE(efi_events); ++i) { - if (!efi_events[i].type || - !(efi_events[i].type & EVT_TIMER) || - efi_events[i].trigger_type == EFI_TIMER_STOP || + if (!efi_events[i].type) + continue; + if (efi_events[i].is_queued) + efi_signal_event(&efi_events[i]); + if (!(efi_events[i].type & EVT_TIMER) || now < efi_events[i].trigger_next) continue; - if (efi_events[i].trigger_type == EFI_TIMER_PERIODIC) { + switch (efi_events[i].trigger_type) { + case EFI_TIMER_RELATIVE: + efi_events[i].trigger_type = EFI_TIMER_STOP; + break; + case EFI_TIMER_PERIODIC: efi_events[i].trigger_next += efi_events[i].trigger_time; - efi_events[i].signaled = 0; + break; + default: + continue; } + efi_events[i].is_signaled = true; efi_signal_event(&efi_events[i]); } WATCHDOG_RESET(); } +/* + * Set the trigger time for a timer event or stop the event. + * + * This is the function for internal usage in U-Boot. For the API function + * implementing the SetTimer service see efi_set_timer_ext. + * + * @event event for which the timer is set + * @type type of the timer + * @trigger_time trigger period in multiples of 100ns + * @return status code + */ efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type, uint64_t trigger_time) { @@ -325,7 +491,7 @@ efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type, * The parameter defines a multiple of 100ns. * We use multiples of 1000ns. So divide by 10. */ - trigger_time = efi_div10(trigger_time); + do_div(trigger_time, 10); for (i = 0; i < ARRAY_SIZE(efi_events); ++i) { if (event != &efi_events[i]) @@ -347,11 +513,24 @@ efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type, } event->trigger_type = type; event->trigger_time = trigger_time; + event->is_signaled = false; return EFI_SUCCESS; } return EFI_INVALID_PARAMETER; } +/* + * Set the trigger time for a timer event or stop the event. + * + * This function implements the SetTimer service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @event event for which the timer is set + * @type type of the timer + * @trigger_time trigger period in multiples of 100ns + * @return status code + */ static efi_status_t EFIAPI efi_set_timer_ext(struct efi_event *event, enum efi_timer_delay type, uint64_t trigger_time) @@ -360,9 +539,21 @@ static efi_status_t EFIAPI efi_set_timer_ext(struct efi_event *event, return EFI_EXIT(efi_set_timer(event, type, trigger_time)); } +/* + * Wait for events to be signaled. + * + * This function implements the WaitForEvent service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @num_events number of events to be waited for + * @events events to be waited for + * @index index of the event that was signaled + * @return status code + */ static efi_status_t EFIAPI efi_wait_for_event(unsigned long num_events, struct efi_event **event, - unsigned long *index) + size_t *index) { int i, j; @@ -371,6 +562,9 @@ static efi_status_t EFIAPI efi_wait_for_event(unsigned long num_events, /* Check parameters */ if (!num_events || !event) return EFI_EXIT(EFI_INVALID_PARAMETER); + /* Check TPL */ + if (efi_tpl != TPL_APPLICATION) + return EFI_EXIT(EFI_UNSUPPORTED); for (i = 0; i < num_events; ++i) { for (j = 0; j < ARRAY_SIZE(efi_events); ++j) { if (event[i] == &efi_events[j]) @@ -380,12 +574,14 @@ static efi_status_t EFIAPI efi_wait_for_event(unsigned long num_events, known_event: if (!event[i]->type || event[i]->type & EVT_NOTIFY_SIGNAL) return EFI_EXIT(EFI_INVALID_PARAMETER); + if (!event[i]->is_signaled) + efi_signal_event(event[i]); } /* Wait for signal */ for (;;) { for (i = 0; i < num_events; ++i) { - if (event[i]->signaled) + if (event[i]->is_signaled) goto out; } /* Allow events to occur. */ @@ -397,13 +593,26 @@ out: * Reset the signal which is passed to the caller to allow periodic * events to occur. */ - event[i]->signaled = 0; + event[i]->is_signaled = false; if (index) *index = i; return EFI_EXIT(EFI_SUCCESS); } +/* + * Signal an EFI event. + * + * This function implements the SignalEvent service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * This functions sets the signaled state of the event and queues the + * notification function for execution. + * + * @event event to signal + * @return status code + */ static efi_status_t EFIAPI efi_signal_event_ext(struct efi_event *event) { int i; @@ -412,12 +621,26 @@ static efi_status_t EFIAPI efi_signal_event_ext(struct efi_event *event) for (i = 0; i < ARRAY_SIZE(efi_events); ++i) { if (event != &efi_events[i]) continue; - efi_signal_event(event); + if (event->is_signaled) + break; + event->is_signaled = true; + if (event->type & EVT_NOTIFY_SIGNAL) + efi_signal_event(event); break; } return EFI_EXIT(EFI_SUCCESS); } +/* + * Close an EFI event. + * + * This function implements the CloseEvent service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @event event to close + * @return status code + */ static efi_status_t EFIAPI efi_close_event(struct efi_event *event) { int i; @@ -427,13 +650,26 @@ static efi_status_t EFIAPI efi_close_event(struct efi_event *event) if (event == &efi_events[i]) { event->type = 0; event->trigger_next = -1ULL; - event->signaled = 0; + event->is_queued = false; + event->is_signaled = false; return EFI_EXIT(EFI_SUCCESS); } } return EFI_EXIT(EFI_INVALID_PARAMETER); } +/* + * Check if an event is signaled. + * + * This function implements the CheckEvent service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * If an event is not signaled yet the notification function is queued. + * + * @event event to check + * @return status code + */ static efi_status_t EFIAPI efi_check_event(struct efi_event *event) { int i; @@ -445,15 +681,31 @@ static efi_status_t EFIAPI efi_check_event(struct efi_event *event) continue; if (!event->type || event->type & EVT_NOTIFY_SIGNAL) break; - if (event->signaled) + if (!event->is_signaled) + efi_signal_event(event); + if (event->is_signaled) return EFI_EXIT(EFI_SUCCESS); return EFI_EXIT(EFI_NOT_READY); } return EFI_EXIT(EFI_INVALID_PARAMETER); } +/* + * Install protocol interface. + * + * This is the function for internal calls. For the API implementation of the + * InstallProtocolInterface service see function + * efi_install_protocol_interface_ext. + * + * @handle handle on which the protocol shall be installed + * @protocol GUID of the protocol to be installed + * @protocol_interface_type type of the interface to be installed, + * always EFI_NATIVE_INTERFACE + * @protocol_interface interface of the protocol implementation + * @return status code + */ static efi_status_t EFIAPI efi_install_protocol_interface(void **handle, - efi_guid_t *protocol, int protocol_interface_type, + const efi_guid_t *protocol, int protocol_interface_type, void *protocol_interface) { struct list_head *lhandle; @@ -468,8 +720,9 @@ static efi_status_t EFIAPI efi_install_protocol_interface(void **handle, /* Create new handle if requested. */ if (!*handle) { - r = EFI_OUT_OF_RESOURCES; - goto out; + r = efi_create_handle(handle); + if (r != EFI_SUCCESS) + goto out; } /* Find object. */ list_for_each(lhandle, &efi_obj_list) { @@ -509,11 +762,25 @@ out: return r; } +/* + * Install protocol interface. + * + * This function implements the InstallProtocolInterface service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle on which the protocol shall be installed + * @protocol GUID of the protocol to be installed + * @protocol_interface_type type of the interface to be installed, + * always EFI_NATIVE_INTERFACE + * @protocol_interface interface of the protocol implementation + * @return status code + */ static efi_status_t EFIAPI efi_install_protocol_interface_ext(void **handle, - efi_guid_t *protocol, int protocol_interface_type, + const efi_guid_t *protocol, int protocol_interface_type, void *protocol_interface) { - EFI_ENTRY("%p, %p, %d, %p", handle, protocol, protocol_interface_type, + EFI_ENTRY("%p, %pUl, %d, %p", handle, protocol, protocol_interface_type, protocol_interface); return EFI_EXIT(efi_install_protocol_interface(handle, protocol, @@ -521,17 +788,43 @@ static efi_status_t EFIAPI efi_install_protocol_interface_ext(void **handle, protocol_interface)); } +/* + * Reinstall protocol interface. + * + * This function implements the ReinstallProtocolInterface service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle on which the protocol shall be + * reinstalled + * @protocol GUID of the protocol to be installed + * @old_interface interface to be removed + * @new_interface interface to be installed + * @return status code + */ static efi_status_t EFIAPI efi_reinstall_protocol_interface(void *handle, - efi_guid_t *protocol, void *old_interface, + const efi_guid_t *protocol, void *old_interface, void *new_interface) { - EFI_ENTRY("%p, %p, %p, %p", handle, protocol, old_interface, + EFI_ENTRY("%p, %pUl, %p, %p", handle, protocol, old_interface, new_interface); return EFI_EXIT(EFI_ACCESS_DENIED); } +/* + * Uninstall protocol interface. + * + * This is the function for internal calls. For the API implementation of the + * UninstallProtocolInterface service see function + * efi_uninstall_protocol_interface_ext. + * + * @handle handle from which the protocol shall be removed + * @protocol GUID of the protocol to be removed + * @protocol_interface interface to be removed + * @return status code + */ static efi_status_t EFIAPI efi_uninstall_protocol_interface(void *handle, - efi_guid_t *protocol, void *protocol_interface) + const efi_guid_t *protocol, void *protocol_interface) { struct list_head *lhandle; int i; @@ -571,25 +864,62 @@ out: return r; } +/* + * Uninstall protocol interface. + * + * This function implements the UninstallProtocolInterface service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle from which the protocol shall be removed + * @protocol GUID of the protocol to be removed + * @protocol_interface interface to be removed + * @return status code + */ static efi_status_t EFIAPI efi_uninstall_protocol_interface_ext(void *handle, - efi_guid_t *protocol, void *protocol_interface) + const efi_guid_t *protocol, void *protocol_interface) { - EFI_ENTRY("%p, %p, %p", handle, protocol, protocol_interface); + EFI_ENTRY("%p, %pUl, %p", handle, protocol, protocol_interface); return EFI_EXIT(efi_uninstall_protocol_interface(handle, protocol, protocol_interface)); } -static efi_status_t EFIAPI efi_register_protocol_notify(efi_guid_t *protocol, - struct efi_event *event, - void **registration) +/* + * Register an event for notification when a protocol is installed. + * + * This function implements the RegisterProtocolNotify service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @protocol GUID of the protocol whose installation shall be + * notified + * @event event to be signaled upon installation of the protocol + * @registration key for retrieving the registration information + * @return status code + */ +static efi_status_t EFIAPI efi_register_protocol_notify( + const efi_guid_t *protocol, + struct efi_event *event, + void **registration) { - EFI_ENTRY("%p, %p, %p", protocol, event, registration); + EFI_ENTRY("%pUl, %p, %p", protocol, event, registration); return EFI_EXIT(EFI_OUT_OF_RESOURCES); } +/* + * Determine if an EFI handle implements a protocol. + * + * See the documentation of the LocateHandle service in the UEFI specification. + * + * @search_type selection criterion + * @protocol GUID of the protocol + * @search_key registration key + * @efiobj handle + * @return 0 if the handle implements the protocol + */ static int efi_search(enum efi_locate_search_type search_type, - efi_guid_t *protocol, void *search_key, + const efi_guid_t *protocol, void *search_key, struct efi_object *efiobj) { int i; @@ -611,9 +941,22 @@ static int efi_search(enum efi_locate_search_type search_type, return -1; } +/* + * Locate handles implementing a protocol. + * + * This function is meant for U-Boot internal calls. For the API implementation + * of the LocateHandle service see efi_locate_handle_ext. + * + * @search_type selection criterion + * @protocol GUID of the protocol + * @search_key registration key + * @buffer_size size of the buffer to receive the handles in bytes + * @buffer buffer to receive the relevant handles + * @return status code + */ static efi_status_t efi_locate_handle( enum efi_locate_search_type search_type, - efi_guid_t *protocol, void *search_key, + const efi_guid_t *protocol, void *search_key, unsigned long *buffer_size, efi_handle_t *buffer) { struct list_head *lhandle; @@ -649,24 +992,60 @@ static efi_status_t efi_locate_handle( return EFI_SUCCESS; } +/* + * Locate handles implementing a protocol. + * + * This function implements the LocateHandle service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @search_type selection criterion + * @protocol GUID of the protocol + * @search_key registration key + * @buffer_size size of the buffer to receive the handles in bytes + * @buffer buffer to receive the relevant handles + * @return 0 if the handle implements the protocol + */ static efi_status_t EFIAPI efi_locate_handle_ext( enum efi_locate_search_type search_type, - efi_guid_t *protocol, void *search_key, + const efi_guid_t *protocol, void *search_key, unsigned long *buffer_size, efi_handle_t *buffer) { - EFI_ENTRY("%d, %p, %p, %p, %p", search_type, protocol, search_key, + EFI_ENTRY("%d, %pUl, %p, %p, %p", search_type, protocol, search_key, buffer_size, buffer); return EFI_EXIT(efi_locate_handle(search_type, protocol, search_key, buffer_size, buffer)); } -static efi_status_t EFIAPI efi_locate_device_path(efi_guid_t *protocol, +/* + * Get the device path and handle of an device implementing a protocol. + * + * This function implements the LocateDevicePath service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @protocol GUID of the protocol + * @device_path device path + * @device handle of the device + * @return status code + */ +static efi_status_t EFIAPI efi_locate_device_path( + const efi_guid_t *protocol, struct efi_device_path **device_path, efi_handle_t *device) { - EFI_ENTRY("%p, %p, %p", protocol, device_path, device); - return EFI_EXIT(EFI_NOT_FOUND); + struct efi_object *efiobj; + + EFI_ENTRY("%pUl, %p, %p", protocol, device_path, device); + + efiobj = efi_dp_find_obj(*device_path, device_path); + if (!efiobj) + return EFI_EXIT(EFI_NOT_FOUND); + + *device = efiobj->handle; + + return EFI_EXIT(EFI_SUCCESS); } /* Collapses configuration table entries, removing index i */ @@ -680,6 +1059,16 @@ static void efi_remove_configuration_table(int i) systab.nr_tables--; } +/* + * Adds, updates, or removes a configuration table. + * + * This function is used for internal calls. For the API implementation of the + * InstallConfigurationTable service see efi_install_configuration_table_ext. + * + * @guid GUID of the installed table + * @table table to be installed + * @return status code + */ efi_status_t efi_install_configuration_table(const efi_guid_t *guid, void *table) { int i; @@ -710,13 +1099,132 @@ efi_status_t efi_install_configuration_table(const efi_guid_t *guid, void *table return EFI_SUCCESS; } +/* + * Adds, updates, or removes a configuration table. + * + * This function implements the InstallConfigurationTable service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @guid GUID of the installed table + * @table table to be installed + * @return status code + */ static efi_status_t EFIAPI efi_install_configuration_table_ext(efi_guid_t *guid, void *table) { - EFI_ENTRY("%p, %p", guid, table); + EFI_ENTRY("%pUl, %p", guid, table); return EFI_EXIT(efi_install_configuration_table(guid, table)); } +/* + * Initialize a loaded_image_info + loaded_image_info object with correct + * protocols, boot-device, etc. + * + * @info loaded image info to be passed to the entry point of the + * image + * @obj internal object associated with the loaded image + * @device_path device path of the loaded image + * @file_path file path of the loaded image + */ +void efi_setup_loaded_image(struct efi_loaded_image *info, struct efi_object *obj, + struct efi_device_path *device_path, + struct efi_device_path *file_path) +{ + obj->handle = info; + + /* + * When asking for the device path interface, return + * bootefi_device_path + */ + obj->protocols[0].guid = &efi_guid_device_path; + obj->protocols[0].protocol_interface = device_path; + + /* + * When asking for the loaded_image interface, just + * return handle which points to loaded_image_info + */ + obj->protocols[1].guid = &efi_guid_loaded_image; + obj->protocols[1].protocol_interface = info; + + obj->protocols[2].guid = &efi_guid_console_control; + obj->protocols[2].protocol_interface = (void *)&efi_console_control; + + obj->protocols[3].guid = &efi_guid_device_path_to_text_protocol; + obj->protocols[3].protocol_interface = + (void *)&efi_device_path_to_text; + + info->file_path = file_path; + if (device_path) + info->device_handle = efi_dp_find_obj(device_path, NULL); + + list_add_tail(&obj->link, &efi_obj_list); +} + +/* + * Load an image using a file path. + * + * @file_path the path of the image to load + * @buffer buffer containing the loaded image + * @return status code + */ +efi_status_t efi_load_image_from_path(struct efi_device_path *file_path, + void **buffer) +{ + struct efi_file_info *info = NULL; + struct efi_file_handle *f; + static efi_status_t ret; + uint64_t bs; + + f = efi_file_from_path(file_path); + if (!f) + return EFI_DEVICE_ERROR; + + bs = 0; + EFI_CALL(ret = f->getinfo(f, (efi_guid_t *)&efi_file_info_guid, + &bs, info)); + if (ret == EFI_BUFFER_TOO_SMALL) { + info = malloc(bs); + EFI_CALL(ret = f->getinfo(f, (efi_guid_t *)&efi_file_info_guid, + &bs, info)); + } + if (ret != EFI_SUCCESS) + goto error; + + ret = efi_allocate_pool(EFI_LOADER_DATA, info->file_size, buffer); + if (ret) + goto error; + + EFI_CALL(ret = f->read(f, &info->file_size, *buffer)); + +error: + free(info); + EFI_CALL(f->close(f)); + + if (ret != EFI_SUCCESS) { + efi_free_pool(*buffer); + *buffer = NULL; + } + + return ret; +} + +/* + * Load an EFI image into memory. + * + * This function implements the LoadImage service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @boot_policy true for request originating from the boot manager + * @parent_image the calles's image handle + * @file_path the path of the image to load + * @source_buffer memory location from which the image is installed + * @source_size size of the memory area from which the image is + * installed + * @image_handle handle for the newly installed image + * @return status code + */ static efi_status_t EFIAPI efi_load_image(bool boot_policy, efi_handle_t parent_image, struct efi_device_path *file_path, @@ -724,25 +1232,40 @@ static efi_status_t EFIAPI efi_load_image(bool boot_policy, unsigned long source_size, efi_handle_t *image_handle) { - static struct efi_object loaded_image_info_obj = { - .protocols = { - { - .guid = &efi_guid_loaded_image, - }, - }, - }; struct efi_loaded_image *info; struct efi_object *obj; EFI_ENTRY("%d, %p, %p, %p, %ld, %p", boot_policy, parent_image, file_path, source_buffer, source_size, image_handle); - info = malloc(sizeof(*info)); - loaded_image_info_obj.protocols[0].protocol_interface = info; - obj = malloc(sizeof(loaded_image_info_obj)); - memset(info, 0, sizeof(*info)); - memcpy(obj, &loaded_image_info_obj, sizeof(loaded_image_info_obj)); - obj->handle = info; - info->file_path = file_path; + + info = calloc(1, sizeof(*info)); + obj = calloc(1, sizeof(*obj)); + + if (!source_buffer) { + struct efi_device_path *dp, *fp; + efi_status_t ret; + + ret = efi_load_image_from_path(file_path, &source_buffer); + if (ret != EFI_SUCCESS) { + free(info); + free(obj); + return EFI_EXIT(ret); + } + + /* + * split file_path which contains both the device and + * file parts: + */ + efi_dp_split_file_path(file_path, &dp, &fp); + + efi_setup_loaded_image(info, obj, dp, fp); + } else { + /* In this case, file_path is the "device" path, ie. + * something like a HARDWARE_DEVICE:MEMORY_MAPPED + */ + efi_setup_loaded_image(info, obj, file_path, NULL); + } + info->reserved = efi_load_pe(source_buffer, info); if (!info->reserved) { free(info); @@ -751,11 +1274,22 @@ static efi_status_t EFIAPI efi_load_image(bool boot_policy, } *image_handle = info; - list_add_tail(&obj->link, &efi_obj_list); return EFI_EXIT(EFI_SUCCESS); } +/* + * Call the entry point of an image. + * + * This function implements the StartImage service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @image_handle handle of the image + * @exit_data_size size of the buffer + * @exit_data buffer to receive the exit data of the called image + * @return status code + */ static efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, unsigned long *exit_data_size, s16 **exit_data) @@ -784,6 +1318,19 @@ static efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, return EFI_EXIT(EFI_SUCCESS); } +/* + * Leave an EFI application or driver. + * + * This function implements the Exit service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @image_handle handle of the application or driver that is exiting + * @exit_status status code + * @exit_data_size size of the buffer in bytes + * @exit_data buffer with data describing an error + * @return status code + */ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle, efi_status_t exit_status, unsigned long exit_data_size, int16_t *exit_data) @@ -793,12 +1340,27 @@ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle, EFI_ENTRY("%p, %ld, %ld, %p", image_handle, exit_status, exit_data_size, exit_data); + /* Make sure entry/exit counts for EFI world cross-overs match */ + __efi_exit_check(); + + /* + * But longjmp out with the U-Boot gd, not the application's, as + * the other end is a setjmp call inside EFI context. + */ + efi_restore_gd(); + loaded_image_info->exit_status = exit_status; longjmp(&loaded_image_info->exit_jmp, 1); panic("EFI application exited"); } +/* + * Find the internal EFI object for a handle. + * + * @handle handle to find + * @return EFI object + */ static struct efi_object *efi_search_obj(void *handle) { struct list_head *lhandle; @@ -813,6 +1375,16 @@ static struct efi_object *efi_search_obj(void *handle) return NULL; } +/* + * Unload an EFI image. + * + * This function implements the UnloadImage service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @image_handle handle of the image to be unloaded + * @return status code + */ static efi_status_t EFIAPI efi_unload_image(void *image_handle) { struct efi_object *efiobj; @@ -825,6 +1397,9 @@ static efi_status_t EFIAPI efi_unload_image(void *image_handle) return EFI_EXIT(EFI_SUCCESS); } +/* + * Fix up caches for EFI payloads if necessary. + */ static void efi_exit_caches(void) { #if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) @@ -837,11 +1412,38 @@ static void efi_exit_caches(void) #endif } +/* + * Stop boot services. + * + * This function implements the ExitBootServices service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @image_handle handle of the loaded image + * @map_key key of the memory map + * @return status code + */ static efi_status_t EFIAPI efi_exit_boot_services(void *image_handle, unsigned long map_key) { + int i; + EFI_ENTRY("%p, %ld", image_handle, map_key); + /* Notify that ExitBootServices is invoked. */ + for (i = 0; i < ARRAY_SIZE(efi_events); ++i) { + if (efi_events[i].type != EVT_SIGNAL_EXIT_BOOT_SERVICES) + continue; + efi_signal_event(&efi_events[i]); + } + /* Make sure that notification functions are not called anymore */ + efi_tpl = TPL_HIGH_LEVEL; + +#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE) + /* save any EFI variables that have been written: */ + env_save(); +#endif + board_quiesce_devices(); /* Fix up caches for EFI payloads if necessary */ @@ -856,6 +1458,16 @@ static efi_status_t EFIAPI efi_exit_boot_services(void *image_handle, return EFI_EXIT(EFI_SUCCESS); } +/* + * Get next value of the counter. + * + * This function implements the NextMonotonicCount service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @count returned value of the counter + * @return status code + */ static efi_status_t EFIAPI efi_get_next_monotonic_count(uint64_t *count) { static uint64_t mono = 0; @@ -864,6 +1476,16 @@ static efi_status_t EFIAPI efi_get_next_monotonic_count(uint64_t *count) return EFI_EXIT(EFI_SUCCESS); } +/* + * Sleep. + * + * This function implements the Stall sercive. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @microseconds period to sleep in microseconds + * @return status code + */ static efi_status_t EFIAPI efi_stall(unsigned long microseconds) { EFI_ENTRY("%ld", microseconds); @@ -871,6 +1493,19 @@ static efi_status_t EFIAPI efi_stall(unsigned long microseconds) return EFI_EXIT(EFI_SUCCESS); } +/* + * Reset the watchdog timer. + * + * This function implements the WatchdogTimer service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @timeout seconds before reset by watchdog + * @watchdog_code code to be logged when resetting + * @data_size size of buffer in bytes + * @watchdog_data buffer with data describing the reset reason + * @return status code + */ static efi_status_t EFIAPI efi_set_watchdog_timer(unsigned long timeout, uint64_t watchdog_code, unsigned long data_size, @@ -881,6 +1516,19 @@ static efi_status_t EFIAPI efi_set_watchdog_timer(unsigned long timeout, return efi_unsupported(__func__); } +/* + * Connect a controller to a driver. + * + * This function implements the ConnectController service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @controller_handle handle of the controller + * @driver_image_handle handle of the driver + * @remain_device_path device path of a child controller + * @recursive true to connect all child controllers + * @return status code + */ static efi_status_t EFIAPI efi_connect_controller( efi_handle_t controller_handle, efi_handle_t *driver_image_handle, @@ -892,6 +1540,18 @@ static efi_status_t EFIAPI efi_connect_controller( return EFI_EXIT(EFI_NOT_FOUND); } +/* + * Disconnect a controller from a driver. + * + * This function implements the DisconnectController service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @controller_handle handle of the controller + * @driver_image_handle handle of the driver + * @child_handle handle of the child to destroy + * @return status code + */ static efi_status_t EFIAPI efi_disconnect_controller(void *controller_handle, void *driver_image_handle, void *child_handle) @@ -901,26 +1561,64 @@ static efi_status_t EFIAPI efi_disconnect_controller(void *controller_handle, return EFI_EXIT(EFI_INVALID_PARAMETER); } +/* + * Close a protocol. + * + * This function implements the CloseProtocol service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle on which the protocol shall be closed + * @protocol GUID of the protocol to close + * @agent_handle handle of the driver + * @controller_handle handle of the controller + * @return status code + */ static efi_status_t EFIAPI efi_close_protocol(void *handle, - efi_guid_t *protocol, + const efi_guid_t *protocol, void *agent_handle, void *controller_handle) { - EFI_ENTRY("%p, %p, %p, %p", handle, protocol, agent_handle, + EFI_ENTRY("%p, %pUl, %p, %p", handle, protocol, agent_handle, controller_handle); return EFI_EXIT(EFI_NOT_FOUND); } +/* + * Provide information about then open status of a protocol on a handle + * + * This function implements the OpenProtocolInformation service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle for which the information shall be retrieved + * @protocol GUID of the protocol + * @entry_buffer buffer to receive the open protocol information + * @entry_count number of entries available in the buffer + * @return status code + */ static efi_status_t EFIAPI efi_open_protocol_information(efi_handle_t handle, - efi_guid_t *protocol, + const efi_guid_t *protocol, struct efi_open_protocol_info_entry **entry_buffer, unsigned long *entry_count) { - EFI_ENTRY("%p, %p, %p, %p", handle, protocol, entry_buffer, + EFI_ENTRY("%p, %pUl, %p, %p", handle, protocol, entry_buffer, entry_count); return EFI_EXIT(EFI_NOT_FOUND); } +/* + * Get protocols installed on a handle. + * + * This function implements the ProtocolsPerHandleService. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle for which the information is retrieved + * @protocol_buffer buffer with protocol GUIDs + * @protocol_buffer_count number of entries in the buffer + * @return status code + */ static efi_status_t EFIAPI efi_protocols_per_handle(void *handle, efi_guid_t ***protocol_buffer, unsigned long *protocol_buffer_count) @@ -974,15 +1672,29 @@ static efi_status_t EFIAPI efi_protocols_per_handle(void *handle, return EFI_EXIT(EFI_SUCCESS); } +/* + * Locate handles implementing a protocol. + * + * This function implements the LocateHandleBuffer service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @search_type selection criterion + * @protocol GUID of the protocol + * @search_key registration key + * @no_handles number of returned handles + * @buffer buffer with the returned handles + * @return status code + */ static efi_status_t EFIAPI efi_locate_handle_buffer( enum efi_locate_search_type search_type, - efi_guid_t *protocol, void *search_key, + const efi_guid_t *protocol, void *search_key, unsigned long *no_handles, efi_handle_t **buffer) { efi_status_t r; unsigned long buffer_size = 0; - EFI_ENTRY("%d, %p, %p, %p, %p", search_type, protocol, search_key, + EFI_ENTRY("%d, %pUl, %p, %p, %p", search_type, protocol, search_key, no_handles, buffer); if (!no_handles || !buffer) { @@ -1007,18 +1719,32 @@ out: return EFI_EXIT(r); } -static efi_status_t EFIAPI efi_locate_protocol(efi_guid_t *protocol, +/* + * Find an interface implementing a protocol. + * + * This function implements the LocateProtocol service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @protocol GUID of the protocol + * @registration registration key passed to the notification function + * @protocol_interface interface implementing the protocol + * @return status code + */ +static efi_status_t EFIAPI efi_locate_protocol(const efi_guid_t *protocol, void *registration, void **protocol_interface) { struct list_head *lhandle; int i; - EFI_ENTRY("%p, %p, %p", protocol, registration, protocol_interface); + EFI_ENTRY("%pUl, %p, %p", protocol, registration, protocol_interface); if (!protocol || !protocol_interface) return EFI_EXIT(EFI_INVALID_PARAMETER); + EFI_PRINT_GUID("protocol", protocol); + list_for_each(lhandle, &efi_obj_list) { struct efi_object *efiobj; @@ -1040,13 +1766,25 @@ static efi_status_t EFIAPI efi_locate_protocol(efi_guid_t *protocol, return EFI_EXIT(EFI_NOT_FOUND); } +/* + * Install multiple protocol interfaces. + * + * This function implements the MultipleProtocolInterfaces service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle on which the protocol interfaces shall be installed + * @... NULL terminated argument list with pairs of protocol GUIDS and + * interfaces + * @return status code + */ static efi_status_t EFIAPI efi_install_multiple_protocol_interfaces( void **handle, ...) { EFI_ENTRY("%p", handle); va_list argptr; - efi_guid_t *protocol; + const efi_guid_t *protocol; void *protocol_interface; efi_status_t r = EFI_SUCCESS; int i = 0; @@ -1084,6 +1822,18 @@ static efi_status_t EFIAPI efi_install_multiple_protocol_interfaces( return EFI_EXIT(r); } +/* + * Uninstall multiple protocol interfaces. + * + * This function implements the UninstallMultipleProtocolInterfaces service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle from which the protocol interfaces shall be removed + * @... NULL terminated argument list with pairs of protocol GUIDS and + * interfaces + * @return status code + */ static efi_status_t EFIAPI efi_uninstall_multiple_protocol_interfaces( void *handle, ...) { @@ -1091,6 +1841,18 @@ static efi_status_t EFIAPI efi_uninstall_multiple_protocol_interfaces( return EFI_EXIT(EFI_INVALID_PARAMETER); } +/* + * Calculate cyclic redundancy code. + * + * This function implements the CalculateCrc32 service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @data buffer with data + * @data_size size of buffer in bytes + * @crc32_p cyclic redundancy code + * @return status code + */ static efi_status_t EFIAPI efi_calculate_crc32(void *data, unsigned long data_size, uint32_t *crc32_p) @@ -1100,21 +1862,60 @@ static efi_status_t EFIAPI efi_calculate_crc32(void *data, return EFI_EXIT(EFI_SUCCESS); } -static void EFIAPI efi_copy_mem(void *destination, void *source, - unsigned long length) +/* + * Copy memory. + * + * This function implements the CopyMem service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @destination destination of the copy operation + * @source source of the copy operation + * @length number of bytes to copy + */ +static void EFIAPI efi_copy_mem(void *destination, const void *source, + size_t length) { - EFI_ENTRY("%p, %p, %ld", destination, source, length); + EFI_ENTRY("%p, %p, %ld", destination, source, (unsigned long)length); memcpy(destination, source, length); + EFI_EXIT(EFI_SUCCESS); } -static void EFIAPI efi_set_mem(void *buffer, unsigned long size, uint8_t value) +/* + * Fill memory with a byte value. + * + * This function implements the SetMem service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @buffer buffer to fill + * @size size of buffer in bytes + * @value byte to copy to the buffer + */ +static void EFIAPI efi_set_mem(void *buffer, size_t size, uint8_t value) { - EFI_ENTRY("%p, %ld, 0x%x", buffer, size, value); + EFI_ENTRY("%p, %ld, 0x%x", buffer, (unsigned long)size, value); memset(buffer, value, size); + EFI_EXIT(EFI_SUCCESS); } +/* + * Open protocol interface on a handle. + * + * This function implements the OpenProtocol interface. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle on which the protocol shall be opened + * @protocol GUID of the protocol + * @protocol_interface interface implementing the protocol + * @agent_handle handle of the driver + * @controller_handle handle of the controller + * @attributes attributes indicating how to open the protocol + * @return status code + */ static efi_status_t EFIAPI efi_open_protocol( - void *handle, efi_guid_t *protocol, + void *handle, const efi_guid_t *protocol, void **protocol_interface, void *agent_handle, void *controller_handle, uint32_t attributes) { @@ -1122,7 +1923,7 @@ static efi_status_t EFIAPI efi_open_protocol( int i; efi_status_t r = EFI_INVALID_PARAMETER; - EFI_ENTRY("%p, %p, %p, %p, %p, 0x%x", handle, protocol, + EFI_ENTRY("%p, %pUl, %p, %p, %p, 0x%x", handle, protocol, protocol_interface, agent_handle, controller_handle, attributes); @@ -1132,6 +1933,8 @@ static efi_status_t EFIAPI efi_open_protocol( goto out; } + EFI_PRINT_GUID("protocol", protocol); + switch (attributes) { case EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL: case EFI_OPEN_PROTOCOL_GET_PROTOCOL: @@ -1183,8 +1986,20 @@ out: return EFI_EXIT(r); } +/* + * Get interface of a protocol on a handle. + * + * This function implements the HandleProtocol service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * @handle handle on which the protocol shall be opened + * @protocol GUID of the protocol + * @protocol_interface interface implementing the protocol + * @return status code + */ static efi_status_t EFIAPI efi_handle_protocol(void *handle, - efi_guid_t *protocol, + const efi_guid_t *protocol, void **protocol_interface) { return efi_open_protocol(handle, protocol, protocol_interface, NULL, diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c index 3fc82b8726..01732aafea 100644 --- a/lib/efi_loader/efi_console.c +++ b/lib/efi_loader/efi_console.c @@ -8,7 +8,10 @@ #include <common.h> #include <charset.h> +#include <dm/device.h> #include <efi_loader.h> +#include <stdio_dev.h> +#include <video_console.h> static bool console_size_queried; @@ -137,34 +140,46 @@ static efi_status_t EFIAPI efi_cout_reset( return EFI_EXIT(EFI_UNSUPPORTED); } -static void print_unicode_in_utf8(u16 c) -{ - char utf8[MAX_UTF8_PER_UTF16] = { 0 }; - utf16_to_utf8((u8 *)utf8, &c, 1); - puts(utf8); -} - static efi_status_t EFIAPI efi_cout_output_string( struct efi_simple_text_output_protocol *this, - const unsigned short *string) + const efi_string_t string) { - struct cout_mode *mode; - u16 ch; + struct simple_text_output_mode *con = &efi_con_mode; + struct cout_mode *mode = &efi_cout_modes[con->mode]; - mode = &efi_cout_modes[efi_con_mode.mode]; EFI_ENTRY("%p, %p", this, string); - for (;(ch = *string); string++) { - print_unicode_in_utf8(ch); - efi_con_mode.cursor_column++; - if (ch == '\n') { - efi_con_mode.cursor_column = 1; - efi_con_mode.cursor_row++; - } else if (efi_con_mode.cursor_column > mode->columns) { - efi_con_mode.cursor_column = 1; - efi_con_mode.cursor_row++; + + unsigned int n16 = utf16_strlen(string); + char buf[MAX_UTF8_PER_UTF16 * n16 + 1]; + char *p; + + *utf16_to_utf8((u8 *)buf, string, n16) = '\0'; + + fputs(stdout, buf); + + for (p = buf; *p; p++) { + switch (*p) { + case '\r': /* carriage-return */ + con->cursor_column = 0; + break; + case '\n': /* newline */ + con->cursor_column = 0; + con->cursor_row++; + break; + case '\t': /* tab, assume 8 char align */ + break; + case '\b': /* backspace */ + con->cursor_column = max(0, con->cursor_column - 1); + break; + default: + con->cursor_column++; + break; } - if (efi_con_mode.cursor_row > mode->rows) - efi_con_mode.cursor_row = mode->rows; + if (con->cursor_column >= mode->columns) { + con->cursor_column = 0; + con->cursor_row++; + } + con->cursor_row = min(con->cursor_row, (s32)mode->rows - 1); } return EFI_EXIT(EFI_SUCCESS); @@ -172,7 +187,7 @@ static efi_status_t EFIAPI efi_cout_output_string( static efi_status_t EFIAPI efi_cout_test_string( struct efi_simple_text_output_protocol *this, - const unsigned short *string) + const efi_string_t string) { EFI_ENTRY("%p, %p", this, string); return EFI_EXIT(EFI_SUCCESS); @@ -186,6 +201,34 @@ static bool cout_mode_matches(struct cout_mode *mode, int rows, int cols) return (mode->rows == rows) && (mode->columns == cols); } +static int query_console_serial(int *rows, int *cols) +{ + /* Ask the terminal about its size */ + int n[3]; + u64 timeout; + + /* Empty input buffer */ + while (tstc()) + getc(); + + printf(ESC"[18t"); + + /* Check if we have a terminal that understands */ + timeout = timer_get_us() + 1000000; + while (!tstc()) + if (timer_get_us() > timeout) + return -1; + + /* Read {depth,rows,cols} */ + if (term_read_reply(n, 3, 't')) + return -1; + + *cols = n[2]; + *rows = n[1]; + + return 0; +} + static efi_status_t EFIAPI efi_cout_query_mode( struct efi_simple_text_output_protocol *this, unsigned long mode_number, unsigned long *columns, @@ -194,34 +237,24 @@ static efi_status_t EFIAPI efi_cout_query_mode( EFI_ENTRY("%p, %ld, %p, %p", this, mode_number, columns, rows); if (!console_size_queried) { - /* Ask the terminal about its size */ - int n[3]; - int cols; - int rows; - u64 timeout; + const char *stdout_name = env_get("stdout"); + int rows, cols; console_size_queried = true; - /* Empty input buffer */ - while (tstc()) - getc(); - - printf(ESC"[18t"); - - /* Check if we have a terminal that understands */ - timeout = timer_get_us() + 1000000; - while (!tstc()) - if (timer_get_us() > timeout) - goto out; - - /* Read {depth,rows,cols} */ - if (term_read_reply(n, 3, 't')) { + if (stdout_name && !strcmp(stdout_name, "vidconsole") && + IS_ENABLED(CONFIG_DM_VIDEO)) { + struct stdio_dev *stdout_dev = + stdio_get_by_name("vidconsole"); + struct udevice *dev = stdout_dev->priv; + struct vidconsole_priv *priv = + dev_get_uclass_priv(dev); + rows = priv->rows; + cols = priv->cols; + } else if (query_console_serial(&rows, &cols)) { goto out; } - cols = n[2]; - rows = n[1]; - /* Test if we can have Mode 1 */ if (cols >= 80 && rows >= 50) { efi_cout_modes[1].present = 1; @@ -274,14 +307,37 @@ static efi_status_t EFIAPI efi_cout_set_mode( return EFI_EXIT(EFI_SUCCESS); } +static const struct { + unsigned int fg; + unsigned int bg; +} color[] = { + { 30, 40 }, /* 0: black */ + { 34, 44 }, /* 1: blue */ + { 32, 42 }, /* 2: green */ + { 36, 46 }, /* 3: cyan */ + { 31, 41 }, /* 4: red */ + { 35, 45 }, /* 5: magenta */ + { 33, 43 }, /* 6: brown, map to yellow as edk2 does*/ + { 37, 47 }, /* 7: light grey, map to white */ +}; + +/* See EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.SetAttribute(). */ static efi_status_t EFIAPI efi_cout_set_attribute( struct efi_simple_text_output_protocol *this, unsigned long attribute) { + unsigned int bold = EFI_ATTR_BOLD(attribute); + unsigned int fg = EFI_ATTR_FG(attribute); + unsigned int bg = EFI_ATTR_BG(attribute); + EFI_ENTRY("%p, %lx", this, attribute); - /* Just ignore attributes (colors) for now */ - return EFI_EXIT(EFI_UNSUPPORTED); + if (attribute) + printf(ESC"[%u;%u;%um", bold, color[fg].fg, color[bg].bg); + else + printf(ESC"[0;37;40m"); + + return EFI_EXIT(EFI_SUCCESS); } static efi_status_t EFIAPI efi_cout_clear_screen( @@ -426,8 +482,10 @@ static void EFIAPI efi_console_timer_notify(struct efi_event *event, void *context) { EFI_ENTRY("%p, %p", event, context); - if (tstc()) + if (tstc()) { + efi_con_in.wait_for_key->is_signaled = true; efi_signal_event(efi_con_in.wait_for_key); + } EFI_EXIT(EFI_SUCCESS); } diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c new file mode 100644 index 0000000000..f6e368e029 --- /dev/null +++ b/lib/efi_loader/efi_device_path.c @@ -0,0 +1,587 @@ +/* + * EFI device path from u-boot device-model mapping + * + * (C) Copyright 2017 Rob Clark + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <blk.h> +#include <dm.h> +#include <usb.h> +#include <mmc.h> +#include <efi_loader.h> +#include <inttypes.h> +#include <part.h> + +/* template END node: */ +static const struct efi_device_path END = { + .type = DEVICE_PATH_TYPE_END, + .sub_type = DEVICE_PATH_SUB_TYPE_END, + .length = sizeof(END), +}; + +#define U_BOOT_GUID \ + EFI_GUID(0xe61d73b9, 0xa384, 0x4acc, \ + 0xae, 0xab, 0x82, 0xe8, 0x28, 0xf3, 0x62, 0x8b) + +/* template ROOT node: */ +static const struct efi_device_path_vendor ROOT = { + .dp = { + .type = DEVICE_PATH_TYPE_HARDWARE_DEVICE, + .sub_type = DEVICE_PATH_SUB_TYPE_VENDOR, + .length = sizeof(ROOT), + }, + .guid = U_BOOT_GUID, +}; + +static void *dp_alloc(size_t sz) +{ + void *buf; + + if (efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, sz, &buf) != EFI_SUCCESS) + return NULL; + + return buf; +} + +/* + * Iterate to next block in device-path, terminating (returning NULL) + * at /End* node. + */ +struct efi_device_path *efi_dp_next(const struct efi_device_path *dp) +{ + if (dp == NULL) + return NULL; + if (dp->type == DEVICE_PATH_TYPE_END) + return NULL; + dp = ((void *)dp) + dp->length; + if (dp->type == DEVICE_PATH_TYPE_END) + return NULL; + return (struct efi_device_path *)dp; +} + +/* + * Compare two device-paths, stopping when the shorter of the two hits + * an End* node. This is useful to, for example, compare a device-path + * representing a device with one representing a file on the device, or + * a device with a parent device. + */ +int efi_dp_match(struct efi_device_path *a, struct efi_device_path *b) +{ + while (1) { + int ret; + + ret = memcmp(&a->length, &b->length, sizeof(a->length)); + if (ret) + return ret; + + ret = memcmp(a, b, a->length); + if (ret) + return ret; + + a = efi_dp_next(a); + b = efi_dp_next(b); + + if (!a || !b) + return 0; + } +} + + +/* + * See UEFI spec (section 3.1.2, about short-form device-paths.. + * tl;dr: we can have a device-path that starts with a USB WWID + * or USB Class node, and a few other cases which don't encode + * the full device path with bus hierarchy: + * + * - MESSAGING:USB_WWID + * - MESSAGING:USB_CLASS + * - MEDIA:FILE_PATH + * - MEDIA:HARD_DRIVE + * - MESSAGING:URI + */ +static struct efi_device_path *shorten_path(struct efi_device_path *dp) +{ + while (dp) { + /* + * TODO: Add MESSAGING:USB_WWID and MESSAGING:URI.. + * in practice fallback.efi just uses MEDIA:HARD_DRIVE + * so not sure when we would see these other cases. + */ + if (EFI_DP_TYPE(dp, MESSAGING_DEVICE, MSG_USB_CLASS) || + EFI_DP_TYPE(dp, MEDIA_DEVICE, HARD_DRIVE_PATH) || + EFI_DP_TYPE(dp, MEDIA_DEVICE, FILE_PATH)) + return dp; + + dp = efi_dp_next(dp); + } + + return dp; +} + +static struct efi_object *find_obj(struct efi_device_path *dp, bool short_path, + struct efi_device_path **rem) +{ + struct efi_object *efiobj; + + list_for_each_entry(efiobj, &efi_obj_list, link) { + int i; + + for (i = 0; i < ARRAY_SIZE(efiobj->protocols); i++) { + struct efi_handler *handler = &efiobj->protocols[i]; + struct efi_device_path *obj_dp; + + if (!handler->guid) + break; + + if (guidcmp(handler->guid, &efi_guid_device_path)) + continue; + + obj_dp = handler->protocol_interface; + + do { + if (efi_dp_match(dp, obj_dp) == 0) { + if (rem) { + *rem = ((void *)dp) + + efi_dp_size(obj_dp); + } + return efiobj; + } + + obj_dp = shorten_path(efi_dp_next(obj_dp)); + } while (short_path && obj_dp); + } + } + + return NULL; +} + + +/* + * Find an efiobj from device-path, if 'rem' is not NULL, returns the + * remaining part of the device path after the matched object. + */ +struct efi_object *efi_dp_find_obj(struct efi_device_path *dp, + struct efi_device_path **rem) +{ + struct efi_object *efiobj; + + efiobj = find_obj(dp, false, rem); + + if (!efiobj) + efiobj = find_obj(dp, true, rem); + + return efiobj; +} + +/* return size not including End node: */ +unsigned efi_dp_size(const struct efi_device_path *dp) +{ + unsigned sz = 0; + + while (dp) { + sz += dp->length; + dp = efi_dp_next(dp); + } + + return sz; +} + +struct efi_device_path *efi_dp_dup(const struct efi_device_path *dp) +{ + struct efi_device_path *ndp; + unsigned sz = efi_dp_size(dp) + sizeof(END); + + if (!dp) + return NULL; + + ndp = dp_alloc(sz); + memcpy(ndp, dp, sz); + + return ndp; +} + +struct efi_device_path *efi_dp_append(const struct efi_device_path *dp1, + const struct efi_device_path *dp2) +{ + struct efi_device_path *ret; + + if (!dp1) { + ret = efi_dp_dup(dp2); + } else if (!dp2) { + ret = efi_dp_dup(dp1); + } else { + /* both dp1 and dp2 are non-null */ + unsigned sz1 = efi_dp_size(dp1); + unsigned sz2 = efi_dp_size(dp2); + void *p = dp_alloc(sz1 + sz2 + sizeof(END)); + memcpy(p, dp1, sz1); + memcpy(p + sz1, dp2, sz2); + memcpy(p + sz1 + sz2, &END, sizeof(END)); + ret = p; + } + + return ret; +} + +struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp, + const struct efi_device_path *node) +{ + struct efi_device_path *ret; + + if (!node && !dp) { + ret = efi_dp_dup(&END); + } else if (!node) { + ret = efi_dp_dup(dp); + } else if (!dp) { + unsigned sz = node->length; + void *p = dp_alloc(sz + sizeof(END)); + memcpy(p, node, sz); + memcpy(p + sz, &END, sizeof(END)); + ret = p; + } else { + /* both dp and node are non-null */ + unsigned sz = efi_dp_size(dp); + void *p = dp_alloc(sz + node->length + sizeof(END)); + memcpy(p, dp, sz); + memcpy(p + sz, node, node->length); + memcpy(p + sz + node->length, &END, sizeof(END)); + ret = p; + } + + return ret; +} + +#ifdef CONFIG_DM +/* size of device-path not including END node for device and all parents + * up to the root device. + */ +static unsigned dp_size(struct udevice *dev) +{ + if (!dev || !dev->driver) + return sizeof(ROOT); + + switch (dev->driver->id) { + case UCLASS_ROOT: + case UCLASS_SIMPLE_BUS: + /* stop traversing parents at this point: */ + return sizeof(ROOT); + case UCLASS_MMC: + return dp_size(dev->parent) + + sizeof(struct efi_device_path_sd_mmc_path); + case UCLASS_MASS_STORAGE: + case UCLASS_USB_HUB: + return dp_size(dev->parent) + + sizeof(struct efi_device_path_usb_class); + default: + /* just skip over unknown classes: */ + return dp_size(dev->parent); + } +} + +static void *dp_fill(void *buf, struct udevice *dev) +{ + if (!dev || !dev->driver) + return buf; + + switch (dev->driver->id) { + case UCLASS_ROOT: + case UCLASS_SIMPLE_BUS: { + /* stop traversing parents at this point: */ + struct efi_device_path_vendor *vdp = buf; + *vdp = ROOT; + return &vdp[1]; + } +#if defined(CONFIG_DM_MMC) && defined(CONFIG_MMC) + case UCLASS_MMC: { + struct efi_device_path_sd_mmc_path *sddp = + dp_fill(buf, dev->parent); + struct mmc *mmc = mmc_get_mmc_dev(dev); + struct blk_desc *desc = mmc_get_blk_desc(mmc); + + sddp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE; + sddp->dp.sub_type = (desc->if_type == IF_TYPE_MMC) ? + DEVICE_PATH_SUB_TYPE_MSG_MMC : + DEVICE_PATH_SUB_TYPE_MSG_SD; + sddp->dp.length = sizeof(*sddp); + sddp->slot_number = dev->seq; + + return &sddp[1]; + } +#endif + case UCLASS_MASS_STORAGE: + case UCLASS_USB_HUB: { + struct efi_device_path_usb_class *udp = + dp_fill(buf, dev->parent); + struct usb_device *udev = dev_get_parent_priv(dev); + struct usb_device_descriptor *desc = &udev->descriptor; + + udp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE; + udp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS; + udp->dp.length = sizeof(*udp); + udp->vendor_id = desc->idVendor; + udp->product_id = desc->idProduct; + udp->device_class = desc->bDeviceClass; + udp->device_subclass = desc->bDeviceSubClass; + udp->device_protocol = desc->bDeviceProtocol; + + return &udp[1]; + } + default: + debug("unhandled device class: %s (%u)\n", + dev->name, dev->driver->id); + return dp_fill(buf, dev->parent); + } +} + +/* Construct a device-path from a device: */ +struct efi_device_path *efi_dp_from_dev(struct udevice *dev) +{ + void *buf, *start; + + start = buf = dp_alloc(dp_size(dev) + sizeof(END)); + buf = dp_fill(buf, dev); + *((struct efi_device_path *)buf) = END; + + return start; +} +#endif + +static unsigned dp_part_size(struct blk_desc *desc, int part) +{ + unsigned dpsize; + +#ifdef CONFIG_BLK + dpsize = dp_size(desc->bdev->parent); +#else + dpsize = sizeof(ROOT) + sizeof(struct efi_device_path_usb); +#endif + + if (part == 0) /* the actual disk, not a partition */ + return dpsize; + + if (desc->part_type == PART_TYPE_ISO) + dpsize += sizeof(struct efi_device_path_cdrom_path); + else + dpsize += sizeof(struct efi_device_path_hard_drive_path); + + return dpsize; +} + +static void *dp_part_fill(void *buf, struct blk_desc *desc, int part) +{ + disk_partition_t info; + +#ifdef CONFIG_BLK + buf = dp_fill(buf, desc->bdev->parent); +#else + /* + * We *could* make a more accurate path, by looking at if_type + * and handling all the different cases like we do for non- + * legacy (ie CONFIG_BLK=y) case. But most important thing + * is just to have a unique device-path for if_type+devnum. + * So map things to a fictional USB device: + */ + struct efi_device_path_usb *udp; + + memcpy(buf, &ROOT, sizeof(ROOT)); + buf += sizeof(ROOT); + + udp = buf; + udp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE; + udp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_USB; + udp->dp.length = sizeof(*udp); + udp->parent_port_number = desc->if_type; + udp->usb_interface = desc->devnum; + buf = &udp[1]; +#endif + + if (part == 0) /* the actual disk, not a partition */ + return buf; + + part_get_info(desc, part, &info); + + if (desc->part_type == PART_TYPE_ISO) { + struct efi_device_path_cdrom_path *cddp = buf; + + cddp->boot_entry = part - 1; + cddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; + cddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_CDROM_PATH; + cddp->dp.length = sizeof(*cddp); + cddp->partition_start = info.start; + cddp->partition_end = info.size; + + buf = &cddp[1]; + } else { + struct efi_device_path_hard_drive_path *hddp = buf; + + hddp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; + hddp->dp.sub_type = DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH; + hddp->dp.length = sizeof(*hddp); + hddp->partition_number = part - 1; + hddp->partition_start = info.start; + hddp->partition_end = info.size; + if (desc->part_type == PART_TYPE_EFI) + hddp->partmap_type = 2; + else + hddp->partmap_type = 1; + hddp->signature_type = desc->sig_type; + if (hddp->signature_type != 0) + memcpy(hddp->partition_signature, &desc->guid_sig, + sizeof(hddp->partition_signature)); + + buf = &hddp[1]; + } + + return buf; +} + + +/* Construct a device-path from a partition on a blk device: */ +struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part) +{ + void *buf, *start; + + start = buf = dp_alloc(dp_part_size(desc, part) + sizeof(END)); + + buf = dp_part_fill(buf, desc, part); + + *((struct efi_device_path *)buf) = END; + + return start; +} + +/* convert path to an UEFI style path (ie. DOS style backslashes and utf16) */ +static void path_to_uefi(u16 *uefi, const char *path) +{ + while (*path) { + char c = *(path++); + if (c == '/') + c = '\\'; + *(uefi++) = c; + } + *uefi = '\0'; +} + +/* + * If desc is NULL, this creates a path with only the file component, + * otherwise it creates a full path with both device and file components + */ +struct efi_device_path *efi_dp_from_file(struct blk_desc *desc, int part, + const char *path) +{ + struct efi_device_path_file_path *fp; + void *buf, *start; + unsigned dpsize = 0, fpsize; + + if (desc) + dpsize = dp_part_size(desc, part); + + fpsize = sizeof(struct efi_device_path) + 2 * (strlen(path) + 1); + dpsize += fpsize; + + start = buf = dp_alloc(dpsize + sizeof(END)); + + if (desc) + buf = dp_part_fill(buf, desc, part); + + /* add file-path: */ + fp = buf; + fp->dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; + fp->dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH; + fp->dp.length = fpsize; + path_to_uefi(fp->str, path); + buf += fpsize; + + *((struct efi_device_path *)buf) = END; + + return start; +} + +#ifdef CONFIG_NET +struct efi_device_path *efi_dp_from_eth(void) +{ + struct efi_device_path_mac_addr *ndp; + void *buf, *start; + unsigned dpsize = 0; + + assert(eth_get_dev()); + +#ifdef CONFIG_DM_ETH + dpsize += dp_size(eth_get_dev()); +#else + dpsize += sizeof(ROOT); +#endif + dpsize += sizeof(*ndp); + + start = buf = dp_alloc(dpsize + sizeof(END)); + +#ifdef CONFIG_DM_ETH + buf = dp_fill(buf, eth_get_dev()); +#else + memcpy(buf, &ROOT, sizeof(ROOT)); + buf += sizeof(ROOT); +#endif + + ndp = buf; + ndp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE; + ndp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR; + ndp->dp.length = sizeof(*ndp); + memcpy(ndp->mac.addr, eth_get_ethaddr(), ARP_HLEN); + buf = &ndp[1]; + + *((struct efi_device_path *)buf) = END; + + return start; +} +#endif + +/* Construct a device-path for memory-mapped image */ +struct efi_device_path *efi_dp_from_mem(uint32_t memory_type, + uint64_t start_address, + uint64_t end_address) +{ + struct efi_device_path_memory *mdp; + void *buf, *start; + + start = buf = dp_alloc(sizeof(*mdp) + sizeof(END)); + + mdp = buf; + mdp->dp.type = DEVICE_PATH_TYPE_HARDWARE_DEVICE; + mdp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MEMORY; + mdp->dp.length = sizeof(*mdp); + mdp->memory_type = memory_type; + mdp->start_address = start_address; + mdp->end_address = end_address; + buf = &mdp[1]; + + *((struct efi_device_path *)buf) = END; + + return start; +} + +/* + * Helper to split a full device path (containing both device and file + * parts) into it's constituent parts. + */ +void efi_dp_split_file_path(struct efi_device_path *full_path, + struct efi_device_path **device_path, + struct efi_device_path **file_path) +{ + struct efi_device_path *p, *dp, *fp; + + dp = efi_dp_dup(full_path); + p = dp; + while (!EFI_DP_TYPE(p, MEDIA_DEVICE, FILE_PATH)) + p = efi_dp_next(p); + fp = efi_dp_dup(p); + + p->type = DEVICE_PATH_TYPE_END; + p->sub_type = DEVICE_PATH_SUB_TYPE_END; + p->length = sizeof(*p); + + *device_path = dp; + *file_path = fp; +} diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c index 4b2f43f0c8..62771338f0 100644 --- a/lib/efi_loader/efi_device_path_to_text.c +++ b/lib/efi_loader/efi_device_path_to_text.c @@ -15,81 +15,208 @@ const efi_guid_t efi_guid_device_path_to_text_protocol = EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID; +static char *dp_unknown(char *s, struct efi_device_path *dp) +{ + s += sprintf(s, "/UNKNOWN(%04x,%04x)", dp->type, dp->sub_type); + return s; +} + +static char *dp_hardware(char *s, struct efi_device_path *dp) +{ + switch (dp->sub_type) { + case DEVICE_PATH_SUB_TYPE_MEMORY: { + struct efi_device_path_memory *mdp = + (struct efi_device_path_memory *)dp; + s += sprintf(s, "/MemoryMapped(0x%x,0x%llx,0x%llx)", + mdp->memory_type, + mdp->start_address, + mdp->end_address); + break; + } + case DEVICE_PATH_SUB_TYPE_VENDOR: { + struct efi_device_path_vendor *vdp = + (struct efi_device_path_vendor *)dp; + s += sprintf(s, "/VenHw(%pUl)", &vdp->guid); + break; + } + default: + s = dp_unknown(s, dp); + break; + } + return s; +} + +static char *dp_acpi(char *s, struct efi_device_path *dp) +{ + switch (dp->sub_type) { + case DEVICE_PATH_SUB_TYPE_ACPI_DEVICE: { + struct efi_device_path_acpi_path *adp = + (struct efi_device_path_acpi_path *)dp; + s += sprintf(s, "/Acpi(PNP%04x", EISA_PNP_NUM(adp->hid)); + if (adp->uid) + s += sprintf(s, ",%d", adp->uid); + s += sprintf(s, ")"); + break; + } + default: + s = dp_unknown(s, dp); + break; + } + return s; +} + +static char *dp_msging(char *s, struct efi_device_path *dp) +{ + switch (dp->sub_type) { + case DEVICE_PATH_SUB_TYPE_MSG_USB: { + struct efi_device_path_usb *udp = + (struct efi_device_path_usb *)dp; + s += sprintf(s, "/Usb(0x%x,0x%x)", udp->parent_port_number, + udp->usb_interface); + break; + } + case DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR: { + struct efi_device_path_mac_addr *mdp = + (struct efi_device_path_mac_addr *)dp; + + if (mdp->if_type != 0 && mdp->if_type != 1) + break; + + s += sprintf(s, "/MAC(%02x%02x%02x%02x%02x%02x,0x%1x)", + mdp->mac.addr[0], mdp->mac.addr[1], + mdp->mac.addr[2], mdp->mac.addr[3], + mdp->mac.addr[4], mdp->mac.addr[5], + mdp->if_type); + + break; + } + case DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS: { + struct efi_device_path_usb_class *ucdp = + (struct efi_device_path_usb_class *)dp; + + s += sprintf(s, "/USBClass(%x,%x,%x,%x,%x)", + ucdp->vendor_id, ucdp->product_id, + ucdp->device_class, ucdp->device_subclass, + ucdp->device_protocol); + + break; + } + case DEVICE_PATH_SUB_TYPE_MSG_SD: + case DEVICE_PATH_SUB_TYPE_MSG_MMC: { + const char *typename = + (dp->sub_type == DEVICE_PATH_SUB_TYPE_MSG_SD) ? + "SDCard" : "MMC"; + struct efi_device_path_sd_mmc_path *sddp = + (struct efi_device_path_sd_mmc_path *)dp; + s += sprintf(s, "/%s(Slot%u)", typename, sddp->slot_number); + break; + } + default: + s = dp_unknown(s, dp); + break; + } + return s; +} + +static char *dp_media(char *s, struct efi_device_path *dp) +{ + switch (dp->sub_type) { + case DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH: { + struct efi_device_path_hard_drive_path *hddp = + (struct efi_device_path_hard_drive_path *)dp; + void *sig = hddp->partition_signature; + + switch (hddp->signature_type) { + case SIG_TYPE_MBR: + s += sprintf(s, "/HD(Part%d,Sig%08x)", + hddp->partition_number, + *(uint32_t *)sig); + break; + case SIG_TYPE_GUID: + s += sprintf(s, "/HD(Part%d,Sig%pUl)", + hddp->partition_number, sig); + default: + s += sprintf(s, "/HD(Part%d,MBRType=%02x,SigType=%02x)", + hddp->partition_number, hddp->partmap_type, + hddp->signature_type); + } + + break; + } + case DEVICE_PATH_SUB_TYPE_CDROM_PATH: { + struct efi_device_path_cdrom_path *cddp = + (struct efi_device_path_cdrom_path *)dp; + s += sprintf(s, "/CDROM(0x%x)", cddp->boot_entry); + break; + } + case DEVICE_PATH_SUB_TYPE_FILE_PATH: { + struct efi_device_path_file_path *fp = + (struct efi_device_path_file_path *)dp; + int slen = (dp->length - sizeof(*dp)) / 2; + s += sprintf(s, "/%-*ls", slen, fp->str); + break; + } + default: + s = dp_unknown(s, dp); + break; + } + return s; +} + static uint16_t *efi_convert_device_node_to_text( - struct efi_device_path_protocol *device_node, + struct efi_device_path *dp, bool display_only, bool allow_shortcuts) { - unsigned long buffer_size; + unsigned long len; efi_status_t r; - uint16_t *buffer = NULL; - int i; + char buf[512]; /* this ought be be big enough for worst case */ + char *str = buf; + uint16_t *out; - switch (device_node->type) { - case DEVICE_PATH_TYPE_END: - return NULL; - case DEVICE_PATH_TYPE_MESSAGING_DEVICE: - switch (device_node->sub_type) { - case DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR: { - struct efi_device_path_mac_addr *dp = - (struct efi_device_path_mac_addr *)device_node; - - if (dp->if_type != 0 && dp->if_type != 1) - break; - r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, - 2 * MAC_OUTPUT_LEN, - (void **)&buffer); - if (r != EFI_SUCCESS) - return NULL; - sprintf((char *)buffer, - "MAC(%02x%02x%02x%02x%02x%02x,0x%1x)", - dp->mac.addr[0], dp->mac.addr[1], - dp->mac.addr[2], dp->mac.addr[3], - dp->mac.addr[4], dp->mac.addr[5], - dp->if_type); - for (i = MAC_OUTPUT_LEN - 1; i >= 0; --i) - buffer[i] = ((uint8_t *)buffer)[i]; + while (dp) { + switch (dp->type) { + case DEVICE_PATH_TYPE_HARDWARE_DEVICE: + str = dp_hardware(str, dp); break; - } - } - break; - case DEVICE_PATH_TYPE_MEDIA_DEVICE: - switch (device_node->sub_type) { - case DEVICE_PATH_SUB_TYPE_FILE_PATH: - buffer_size = device_node->length - 4; - r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, - buffer_size, (void **) &buffer); - if (r != EFI_SUCCESS) - return NULL; - memcpy(buffer, device_node->data, buffer_size); + case DEVICE_PATH_TYPE_ACPI_DEVICE: + str = dp_acpi(str, dp); + break; + case DEVICE_PATH_TYPE_MESSAGING_DEVICE: + str = dp_msging(str, dp); break; + case DEVICE_PATH_TYPE_MEDIA_DEVICE: + str = dp_media(str, dp); + break; + default: + str = dp_unknown(str, dp); } - break; - } - /* - * For all node types that we do not yet support return - * 'UNKNOWN(type,subtype)'. - */ - if (!buffer) { - r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, - 2 * UNKNOWN_OUTPUT_LEN, - (void **)&buffer); - if (r != EFI_SUCCESS) - return NULL; - sprintf((char *)buffer, - "UNKNOWN(%04x,%04x)", - device_node->type, - device_node->sub_type); - for (i = UNKNOWN_OUTPUT_LEN - 1; i >= 0; --i) - buffer[i] = ((uint8_t *)buffer)[i]; + dp = efi_dp_next(dp); } - return buffer; + *str++ = '\0'; + + len = str - buf; + r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, 2 * len, (void **)&out); + if (r != EFI_SUCCESS) + return NULL; + + ascii2unicode(out, buf); + out[len - 1] = 0; + + return out; } +/* helper for debug prints.. efi_free_pool() the result. */ +uint16_t *efi_dp_str(struct efi_device_path *dp) +{ + return efi_convert_device_node_to_text(dp, true, true); +} + + static uint16_t EFIAPI *efi_convert_device_node_to_text_ext( - struct efi_device_path_protocol *device_node, + struct efi_device_path *device_node, bool display_only, bool allow_shortcuts) { @@ -105,7 +232,7 @@ static uint16_t EFIAPI *efi_convert_device_node_to_text_ext( } static uint16_t EFIAPI *efi_convert_device_path_to_text( - struct efi_device_path_protocol *device_path, + struct efi_device_path *device_path, bool display_only, bool allow_shortcuts) { diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c index ed06485e33..e61dbc8058 100644 --- a/lib/efi_loader/efi_disk.c +++ b/lib/efi_loader/efi_disk.c @@ -28,11 +28,15 @@ struct efi_disk_obj { /* EFI Interface Media descriptor struct, referenced by ops */ struct efi_block_io_media media; /* EFI device path to this block device */ - struct efi_device_path_file_path *dp; + struct efi_device_path *dp; + /* partition # */ + unsigned int part; + /* handle to filesys proto (for partition objects) */ + struct efi_simple_file_system_protocol *volume; /* Offset into disk for simple partitions */ lbaint_t offset; /* Internal block device */ - const struct blk_desc *desc; + struct blk_desc *desc; }; static efi_status_t EFIAPI efi_disk_reset(struct efi_block_io *this, @@ -47,7 +51,7 @@ enum efi_disk_direction { EFI_DISK_WRITE, }; -static efi_status_t EFIAPI efi_disk_rw_blocks(struct efi_block_io *this, +static efi_status_t efi_disk_rw_blocks(struct efi_block_io *this, u32 media_id, u64 lba, unsigned long buffer_size, void *buffer, enum efi_disk_direction direction) { @@ -170,28 +174,58 @@ static const struct efi_block_io block_io_disk_template = { .flush_blocks = &efi_disk_flush_blocks, }; +/* + * Find filesystem from a device-path. The passed in path 'p' probably + * contains one or more /File(name) nodes, so the comparison stops at + * the first /File() node, and returns the pointer to that via 'rp'. + * This is mostly intended to be a helper to map a device-path to an + * efi_file_handle object. + */ +struct efi_simple_file_system_protocol * +efi_fs_from_path(struct efi_device_path *fp) +{ + struct efi_object *efiobj; + struct efi_disk_obj *diskobj; + + efiobj = efi_dp_find_obj(fp, NULL); + if (!efiobj) + return NULL; + + diskobj = container_of(efiobj, struct efi_disk_obj, parent); + + return diskobj->volume; +} + static void efi_disk_add_dev(const char *name, const char *if_typename, - const struct blk_desc *desc, + struct blk_desc *desc, int dev_index, - lbaint_t offset) + lbaint_t offset, + unsigned int part) { struct efi_disk_obj *diskobj; - struct efi_device_path_file_path *dp; - int objlen = sizeof(*diskobj) + (sizeof(*dp) * 2); /* Don't add empty devices */ if (!desc->lba) return; - diskobj = calloc(1, objlen); + diskobj = calloc(1, sizeof(*diskobj)); /* Fill in object data */ - dp = (void *)&diskobj[1]; + diskobj->dp = efi_dp_from_part(desc, part); + diskobj->part = part; diskobj->parent.protocols[0].guid = &efi_block_io_guid; diskobj->parent.protocols[0].protocol_interface = &diskobj->ops; diskobj->parent.protocols[1].guid = &efi_guid_device_path; - diskobj->parent.protocols[1].protocol_interface = dp; + diskobj->parent.protocols[1].protocol_interface = diskobj->dp; + if (part >= 1) { + diskobj->volume = efi_simple_file_system(desc, part, + diskobj->dp); + diskobj->parent.protocols[2].guid = + &efi_simple_file_system_protocol_guid; + diskobj->parent.protocols[2].protocol_interface = + diskobj->volume; + } diskobj->parent.handle = diskobj; diskobj->ops = block_io_disk_template; diskobj->ifname = if_typename; @@ -207,17 +241,6 @@ static void efi_disk_add_dev(const char *name, diskobj->media.last_block = desc->lba - offset; diskobj->ops.media = &diskobj->media; - /* Fill in device path */ - diskobj->dp = dp; - dp[0].dp.type = DEVICE_PATH_TYPE_MEDIA_DEVICE; - dp[0].dp.sub_type = DEVICE_PATH_SUB_TYPE_FILE_PATH; - dp[0].dp.length = sizeof(*dp); - ascii2unicode(dp[0].str, name); - - dp[1].dp.type = DEVICE_PATH_TYPE_END; - dp[1].dp.sub_type = DEVICE_PATH_SUB_TYPE_END; - dp[1].dp.length = sizeof(*dp); - /* Hook up to the device list */ list_add_tail(&diskobj->parent.link, &efi_obj_list); } @@ -231,19 +254,24 @@ static int efi_disk_create_eltorito(struct blk_desc *desc, #if CONFIG_IS_ENABLED(ISO_PARTITION) char devname[32] = { 0 }; /* dp->str is u16[32] long */ disk_partition_t info; - int part = 1; + int part; if (desc->part_type != PART_TYPE_ISO) return 0; - while (!part_get_info(desc, part, &info)) { + /* and devices for each partition: */ + for (part = 1; part <= MAX_SEARCH_PARTITIONS; part++) { + if (part_get_info(desc, part, &info)) + continue; snprintf(devname, sizeof(devname), "%s:%d", pdevname, part); efi_disk_add_dev(devname, if_typename, desc, diskid, - info.start); - part++; + info.start, part); disks++; } + + /* ... and add block device: */ + efi_disk_add_dev(devname, if_typename, desc, diskid, 0, 0); #endif return disks; @@ -271,9 +299,23 @@ int efi_disk_register(void) uclass_next_device_check(&dev)) { struct blk_desc *desc = dev_get_uclass_platdata(dev); const char *if_typename = dev->driver->name; + disk_partition_t info; + int part; printf("Scanning disk %s...\n", dev->name); - efi_disk_add_dev(dev->name, if_typename, desc, desc->devnum, 0); + + /* add devices for each partition: */ + for (part = 1; part <= MAX_SEARCH_PARTITIONS; part++) { + if (part_get_info(desc, part, &info)) + continue; + efi_disk_add_dev(dev->name, if_typename, desc, + desc->devnum, 0, part); + } + + /* ... and add block device: */ + efi_disk_add_dev(dev->name, if_typename, desc, + desc->devnum, 0, 0); + disks++; /* @@ -300,6 +342,8 @@ int efi_disk_register(void) for (i = 0; i < 4; i++) { struct blk_desc *desc; char devname[32] = { 0 }; /* dp->str is u16[32] long */ + disk_partition_t info; + int part; desc = blk_get_devnum_by_type(if_type, i); if (!desc) @@ -309,7 +353,17 @@ int efi_disk_register(void) snprintf(devname, sizeof(devname), "%s%d", if_typename, i); - efi_disk_add_dev(devname, if_typename, desc, i, 0); + + /* add devices for each partition: */ + for (part = 1; part <= MAX_SEARCH_PARTITIONS; part++) { + if (part_get_info(desc, part, &info)) + continue; + efi_disk_add_dev(devname, if_typename, desc, + i, 0, part); + } + + /* ... and add block device: */ + efi_disk_add_dev(devname, if_typename, desc, i, 0, 0); disks++; /* diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c new file mode 100644 index 0000000000..52a4e7438e --- /dev/null +++ b/lib/efi_loader/efi_file.c @@ -0,0 +1,560 @@ +/* + * EFI utils + * + * Copyright (c) 2017 Rob Clark + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <charset.h> +#include <efi_loader.h> +#include <malloc.h> +#include <fs.h> + +struct file_system { + struct efi_simple_file_system_protocol base; + struct efi_device_path *dp; + struct blk_desc *desc; + int part; +}; +#define to_fs(x) container_of(x, struct file_system, base) + +struct file_handle { + struct efi_file_handle base; + struct file_system *fs; + loff_t offset; /* current file position/cursor */ + int isdir; + + /* for reading a directory: */ + struct fs_dir_stream *dirs; + struct fs_dirent *dent; + + char path[0]; +}; +#define to_fh(x) container_of(x, struct file_handle, base) + +static const struct efi_file_handle efi_file_handle_protocol; + +static char *basename(struct file_handle *fh) +{ + char *s = strrchr(fh->path, '/'); + if (s) + return s + 1; + return fh->path; +} + +static int set_blk_dev(struct file_handle *fh) +{ + return fs_set_blk_dev_with_part(fh->fs->desc, fh->fs->part); +} + +static int is_dir(struct file_handle *fh) +{ + struct fs_dir_stream *dirs; + + set_blk_dev(fh); + dirs = fs_opendir(fh->path); + if (!dirs) + return 0; + + fs_closedir(dirs); + + return 1; +} + +/* + * Normalize a path which may include either back or fwd slashes, + * double slashes, . or .. entries in the path, etc. + */ +static int sanitize_path(char *path) +{ + char *p; + + /* backslash to slash: */ + p = path; + while ((p = strchr(p, '\\'))) + *p++ = '/'; + + /* handle double-slashes: */ + p = path; + while ((p = strstr(p, "//"))) { + char *src = p + 1; + memmove(p, src, strlen(src) + 1); + } + + /* handle extra /.'s */ + p = path; + while ((p = strstr(p, "/."))) { + /* + * You'd be tempted to do this *after* handling ".."s + * below to avoid having to check if "/." is start of + * a "/..", but that won't have the correct results.. + * for example, "/foo/./../bar" would get resolved to + * "/foo/bar" if you did these two passes in the other + * order + */ + if (p[2] == '.') { + p += 2; + continue; + } + char *src = p + 2; + memmove(p, src, strlen(src) + 1); + } + + /* handle extra /..'s: */ + p = path; + while ((p = strstr(p, "/.."))) { + char *src = p + 3; + + p--; + + /* find beginning of previous path entry: */ + while (true) { + if (p < path) + return -1; + if (*p == '/') + break; + p--; + } + + memmove(p, src, strlen(src) + 1); + } + + return 0; +} + +/* NOTE: despite what you would expect, 'file_name' is actually a path. + * With windoze style backlashes, ofc. + */ +static struct efi_file_handle *file_open(struct file_system *fs, + struct file_handle *parent, s16 *file_name, u64 mode) +{ + struct file_handle *fh; + char f0[MAX_UTF8_PER_UTF16] = {0}; + int plen = 0; + int flen = 0; + + if (file_name) { + utf16_to_utf8((u8 *)f0, (u16 *)file_name, 1); + flen = utf16_strlen((u16 *)file_name); + } + + /* we could have a parent, but also an absolute path: */ + if (f0[0] == '\\') { + plen = 0; + } else if (parent) { + plen = strlen(parent->path) + 1; + } + + /* +2 is for null and '/' */ + fh = calloc(1, sizeof(*fh) + plen + (flen * MAX_UTF8_PER_UTF16) + 2); + + fh->base = efi_file_handle_protocol; + fh->fs = fs; + + if (parent) { + char *p = fh->path; + + if (plen > 0) { + strcpy(p, parent->path); + p += plen - 1; + *p++ = '/'; + } + + utf16_to_utf8((u8 *)p, (u16 *)file_name, flen); + + if (sanitize_path(fh->path)) + goto error; + + /* check if file exists: */ + if (set_blk_dev(fh)) + goto error; + + if (!((mode & EFI_FILE_MODE_CREATE) || fs_exists(fh->path))) + goto error; + + /* figure out if file is a directory: */ + fh->isdir = is_dir(fh); + } else { + fh->isdir = 1; + strcpy(fh->path, ""); + } + + return &fh->base; + +error: + free(fh); + return NULL; +} + +static efi_status_t EFIAPI efi_file_open(struct efi_file_handle *file, + struct efi_file_handle **new_handle, + s16 *file_name, u64 open_mode, u64 attributes) +{ + struct file_handle *fh = to_fh(file); + + EFI_ENTRY("%p, %p, \"%ls\", %llx, %llu", file, new_handle, file_name, + open_mode, attributes); + + *new_handle = file_open(fh->fs, fh, file_name, open_mode); + if (!*new_handle) + return EFI_EXIT(EFI_NOT_FOUND); + + return EFI_EXIT(EFI_SUCCESS); +} + +static efi_status_t file_close(struct file_handle *fh) +{ + fs_closedir(fh->dirs); + free(fh); + return EFI_SUCCESS; +} + +static efi_status_t EFIAPI efi_file_close(struct efi_file_handle *file) +{ + struct file_handle *fh = to_fh(file); + EFI_ENTRY("%p", file); + return EFI_EXIT(file_close(fh)); +} + +static efi_status_t EFIAPI efi_file_delete(struct efi_file_handle *file) +{ + struct file_handle *fh = to_fh(file); + EFI_ENTRY("%p", file); + file_close(fh); + return EFI_EXIT(EFI_WARN_DELETE_FAILURE); +} + +static efi_status_t file_read(struct file_handle *fh, u64 *buffer_size, + void *buffer) +{ + loff_t actread; + + if (fs_read(fh->path, (ulong)buffer, fh->offset, + *buffer_size, &actread)) + return EFI_DEVICE_ERROR; + + *buffer_size = actread; + fh->offset += actread; + + return EFI_SUCCESS; +} + +static efi_status_t dir_read(struct file_handle *fh, u64 *buffer_size, + void *buffer) +{ + struct efi_file_info *info = buffer; + struct fs_dirent *dent; + unsigned int required_size; + + if (!fh->dirs) { + assert(fh->offset == 0); + fh->dirs = fs_opendir(fh->path); + if (!fh->dirs) + return EFI_DEVICE_ERROR; + } + + /* + * So this is a bit awkward. Since fs layer is stateful and we + * can't rewind an entry, in the EFI_BUFFER_TOO_SMALL case below + * we might have to return without consuming the dent.. so we + * have to stash it for next call. + */ + if (fh->dent) { + dent = fh->dent; + fh->dent = NULL; + } else { + dent = fs_readdir(fh->dirs); + } + + + if (!dent) { + /* no more files in directory: */ + /* workaround shim.efi bug/quirk.. as find_boot_csv() + * loops through directory contents, it initially calls + * read w/ zero length buffer to find out how much mem + * to allocate for the EFI_FILE_INFO, then allocates, + * and then calls a 2nd time. If we return size of + * zero the first time, it happily passes that to + * AllocateZeroPool(), and when that returns NULL it + * thinks it is EFI_OUT_OF_RESOURCES. So on first + * call return a non-zero size: + */ + if (*buffer_size == 0) + *buffer_size = sizeof(*info); + else + *buffer_size = 0; + return EFI_SUCCESS; + } + + /* check buffer size: */ + required_size = sizeof(*info) + 2 * (strlen(dent->name) + 1); + if (*buffer_size < required_size) { + *buffer_size = required_size; + fh->dent = dent; + return EFI_BUFFER_TOO_SMALL; + } + + *buffer_size = required_size; + memset(info, 0, required_size); + + info->size = required_size; + info->file_size = dent->size; + info->physical_size = dent->size; + + if (dent->type == FS_DT_DIR) + info->attribute |= EFI_FILE_DIRECTORY; + + ascii2unicode((u16 *)info->file_name, dent->name); + + fh->offset++; + + return EFI_SUCCESS; +} + +static efi_status_t EFIAPI efi_file_read(struct efi_file_handle *file, + u64 *buffer_size, void *buffer) +{ + struct file_handle *fh = to_fh(file); + efi_status_t ret = EFI_SUCCESS; + + EFI_ENTRY("%p, %p, %p", file, buffer_size, buffer); + + if (set_blk_dev(fh)) { + ret = EFI_DEVICE_ERROR; + goto error; + } + + if (fh->isdir) + ret = dir_read(fh, buffer_size, buffer); + else + ret = file_read(fh, buffer_size, buffer); + +error: + return EFI_EXIT(ret); +} + +static efi_status_t EFIAPI efi_file_write(struct efi_file_handle *file, + u64 *buffer_size, void *buffer) +{ + struct file_handle *fh = to_fh(file); + efi_status_t ret = EFI_SUCCESS; + loff_t actwrite; + + EFI_ENTRY("%p, %p, %p", file, buffer_size, buffer); + + if (set_blk_dev(fh)) { + ret = EFI_DEVICE_ERROR; + goto error; + } + + if (fs_write(fh->path, (ulong)buffer, fh->offset, *buffer_size, + &actwrite)) { + ret = EFI_DEVICE_ERROR; + goto error; + } + + *buffer_size = actwrite; + fh->offset += actwrite; + +error: + return EFI_EXIT(ret); +} + +static efi_status_t EFIAPI efi_file_getpos(struct efi_file_handle *file, + u64 *pos) +{ + struct file_handle *fh = to_fh(file); + EFI_ENTRY("%p, %p", file, pos); + *pos = fh->offset; + return EFI_EXIT(EFI_SUCCESS); +} + +static efi_status_t EFIAPI efi_file_setpos(struct efi_file_handle *file, + u64 pos) +{ + struct file_handle *fh = to_fh(file); + efi_status_t ret = EFI_SUCCESS; + + EFI_ENTRY("%p, %llu", file, pos); + + if (fh->isdir) { + if (pos != 0) { + ret = EFI_UNSUPPORTED; + goto error; + } + fs_closedir(fh->dirs); + fh->dirs = NULL; + } + + if (pos == ~0ULL) { + loff_t file_size; + + if (set_blk_dev(fh)) { + ret = EFI_DEVICE_ERROR; + goto error; + } + + if (fs_size(fh->path, &file_size)) { + ret = EFI_DEVICE_ERROR; + goto error; + } + + pos = file_size; + } + + fh->offset = pos; + +error: + return EFI_EXIT(ret); +} + +static efi_status_t EFIAPI efi_file_getinfo(struct efi_file_handle *file, + efi_guid_t *info_type, u64 *buffer_size, void *buffer) +{ + struct file_handle *fh = to_fh(file); + efi_status_t ret = EFI_SUCCESS; + + EFI_ENTRY("%p, %p, %p, %p", file, info_type, buffer_size, buffer); + + if (!guidcmp(info_type, &efi_file_info_guid)) { + struct efi_file_info *info = buffer; + char *filename = basename(fh); + unsigned int required_size; + loff_t file_size; + + /* check buffer size: */ + required_size = sizeof(*info) + 2 * (strlen(filename) + 1); + if (*buffer_size < required_size) { + *buffer_size = required_size; + ret = EFI_BUFFER_TOO_SMALL; + goto error; + } + + if (set_blk_dev(fh)) { + ret = EFI_DEVICE_ERROR; + goto error; + } + + if (fs_size(fh->path, &file_size)) { + ret = EFI_DEVICE_ERROR; + goto error; + } + + memset(info, 0, required_size); + + info->size = required_size; + info->file_size = file_size; + info->physical_size = file_size; + + if (fh->isdir) + info->attribute |= EFI_FILE_DIRECTORY; + + ascii2unicode((u16 *)info->file_name, filename); + } else { + ret = EFI_UNSUPPORTED; + } + +error: + return EFI_EXIT(ret); +} + +static efi_status_t EFIAPI efi_file_setinfo(struct efi_file_handle *file, + efi_guid_t *info_type, u64 buffer_size, void *buffer) +{ + EFI_ENTRY("%p, %p, %llu, %p", file, info_type, buffer_size, buffer); + return EFI_EXIT(EFI_UNSUPPORTED); +} + +static efi_status_t EFIAPI efi_file_flush(struct efi_file_handle *file) +{ + EFI_ENTRY("%p", file); + return EFI_EXIT(EFI_SUCCESS); +} + +static const struct efi_file_handle efi_file_handle_protocol = { + .rev = EFI_FILE_PROTOCOL_REVISION, + .open = efi_file_open, + .close = efi_file_close, + .delete = efi_file_delete, + .read = efi_file_read, + .write = efi_file_write, + .getpos = efi_file_getpos, + .setpos = efi_file_setpos, + .getinfo = efi_file_getinfo, + .setinfo = efi_file_setinfo, + .flush = efi_file_flush, +}; + +struct efi_file_handle *efi_file_from_path(struct efi_device_path *fp) +{ + struct efi_simple_file_system_protocol *v; + struct efi_file_handle *f; + efi_status_t ret; + + v = efi_fs_from_path(fp); + if (!v) + return NULL; + + EFI_CALL(ret = v->open_volume(v, &f)); + if (ret != EFI_SUCCESS) + return NULL; + + /* skip over device-path nodes before the file path: */ + while (fp && !EFI_DP_TYPE(fp, MEDIA_DEVICE, FILE_PATH)) + fp = efi_dp_next(fp); + + while (fp) { + struct efi_device_path_file_path *fdp = + container_of(fp, struct efi_device_path_file_path, dp); + struct efi_file_handle *f2; + + if (!EFI_DP_TYPE(fp, MEDIA_DEVICE, FILE_PATH)) { + printf("bad file path!\n"); + f->close(f); + return NULL; + } + + EFI_CALL(ret = f->open(f, &f2, (s16 *)fdp->str, + EFI_FILE_MODE_READ, 0)); + if (ret != EFI_SUCCESS) + return NULL; + + fp = efi_dp_next(fp); + + EFI_CALL(f->close(f)); + f = f2; + } + + return f; +} + +static efi_status_t EFIAPI +efi_open_volume(struct efi_simple_file_system_protocol *this, + struct efi_file_handle **root) +{ + struct file_system *fs = to_fs(this); + + EFI_ENTRY("%p, %p", this, root); + + *root = file_open(fs, NULL, NULL, 0); + + return EFI_EXIT(EFI_SUCCESS); +} + +struct efi_simple_file_system_protocol * +efi_simple_file_system(struct blk_desc *desc, int part, + struct efi_device_path *dp) +{ + struct file_system *fs; + + fs = calloc(1, sizeof(*fs)); + fs->base.rev = EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION; + fs->base.open_volume = efi_open_volume; + fs->desc = desc; + fs->part = part; + fs->dp = dp; + + return &fs->base; +} diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index f961407f50..af29cc4f04 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -15,8 +15,12 @@ DECLARE_GLOBAL_DATA_PTR; +const efi_guid_t efi_global_variable_guid = EFI_GLOBAL_VARIABLE_GUID; const efi_guid_t efi_guid_device_path = DEVICE_PATH_GUID; const efi_guid_t efi_guid_loaded_image = LOADED_IMAGE_GUID; +const efi_guid_t efi_simple_file_system_protocol_guid = + EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID; +const efi_guid_t efi_file_info_guid = EFI_FILE_INFO_GUID; static efi_status_t efi_loader_relocate(const IMAGE_BASE_RELOCATION *rel, unsigned long rel_size, void *efi_reloc) @@ -90,6 +94,7 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) unsigned long virt_size = 0; bool can_run_nt64 = true; bool can_run_nt32 = true; + uint16_t image_type; #if defined(CONFIG_ARM64) can_run_nt32 = false; @@ -135,6 +140,7 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) entry = efi_reloc + opt->AddressOfEntryPoint; rel_size = opt->DataDirectory[rel_idx].Size; rel = efi_reloc + opt->DataDirectory[rel_idx].VirtualAddress; + image_type = opt->Subsystem; } else if (can_run_nt32 && (nt->OptionalHeader.Magic == IMAGE_NT_OPTIONAL_HDR32_MAGIC)) { IMAGE_OPTIONAL_HEADER32 *opt = &nt->OptionalHeader; @@ -148,12 +154,32 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) entry = efi_reloc + opt->AddressOfEntryPoint; rel_size = opt->DataDirectory[rel_idx].Size; rel = efi_reloc + opt->DataDirectory[rel_idx].VirtualAddress; + image_type = opt->Subsystem; } else { printf("%s: Invalid optional header magic %x\n", __func__, nt->OptionalHeader.Magic); return NULL; } + switch (image_type) { + case IMAGE_SUBSYSTEM_EFI_APPLICATION: + loaded_image_info->image_code_type = EFI_LOADER_CODE; + loaded_image_info->image_data_type = EFI_LOADER_DATA; + break; + case IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER: + loaded_image_info->image_code_type = EFI_BOOT_SERVICES_CODE; + loaded_image_info->image_data_type = EFI_BOOT_SERVICES_DATA; + break; + case IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER: + case IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER: + loaded_image_info->image_code_type = EFI_RUNTIME_SERVICES_CODE; + loaded_image_info->image_data_type = EFI_RUNTIME_SERVICES_DATA; + break; + default: + printf("%s: invalid image type: %u\n", __func__, image_type); + break; + } + /* Load sections into RAM */ for (i = num_sections - 1; i >= 0; i--) { IMAGE_SECTION_HEADER *sec = §ions[i]; diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c index 9e079f1fa3..d47759e08e 100644 --- a/lib/efi_loader/efi_memory.c +++ b/lib/efi_loader/efi_memory.c @@ -43,7 +43,7 @@ void *efi_bounce_buffer; */ struct efi_pool_allocation { u64 num_pages; - char data[]; + char data[] __aligned(ARCH_DMA_MINALIGN); }; /* @@ -356,7 +356,8 @@ efi_status_t efi_allocate_pool(int pool_type, unsigned long size, { efi_status_t r; efi_physical_addr_t t; - u64 num_pages = (size + sizeof(u64) + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT; + u64 num_pages = (size + sizeof(struct efi_pool_allocation) + + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT; if (size == 0) { *buffer = NULL; diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index 0b949d86e8..432d9a99a2 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -19,6 +19,15 @@ static const efi_guid_t efi_pxe_guid = EFI_PXE_GUID; static struct efi_pxe_packet *dhcp_ack; static bool new_rx_packet; static void *new_tx_packet; +/* + * The notification function of this event is called in every timer cycle + * to check if a new network packet has been received. + */ +static struct efi_event *network_timer_event; +/* + * This event is signaled when a packet has been received. + */ +static struct efi_event *wait_for_packet; struct efi_net_obj { /* Generic EFI object parent class data */ @@ -26,9 +35,6 @@ struct efi_net_obj { /* EFI Interface callback struct for network */ struct efi_simple_network net; struct efi_simple_network_mode net_mode; - /* Device path to the network adapter */ - struct efi_device_path_mac_addr dp_mac; - struct efi_device_path_file_path dp_end; /* PXE struct to transmit dhcp data */ struct efi_pxe pxe; struct efi_pxe_mode pxe_mode; @@ -81,9 +87,7 @@ static efi_status_t EFIAPI efi_net_receive_filters( EFI_ENTRY("%p, %x, %x, %x, %lx, %p", this, enable, disable, reset_mcast_filter, mcast_filter_count, mcast_filter); - /* XXX Do we care? */ - - return EFI_EXIT(EFI_SUCCESS); + return EFI_EXIT(EFI_UNSUPPORTED); } static efi_status_t EFIAPI efi_net_station_address( @@ -92,7 +96,7 @@ static efi_status_t EFIAPI efi_net_station_address( { EFI_ENTRY("%p, %x, %p", this, reset, new_mac); - return EFI_EXIT(EFI_INVALID_PARAMETER); + return EFI_EXIT(EFI_UNSUPPORTED); } static efi_status_t EFIAPI efi_net_statistics(struct efi_simple_network *this, @@ -101,7 +105,7 @@ static efi_status_t EFIAPI efi_net_statistics(struct efi_simple_network *this, { EFI_ENTRY("%p, %x, %p, %p", this, reset, stat_size, stat_table); - return EFI_EXIT(EFI_INVALID_PARAMETER); + return EFI_EXIT(EFI_UNSUPPORTED); } static efi_status_t EFIAPI efi_net_mcastiptomac(struct efi_simple_network *this, @@ -121,7 +125,7 @@ static efi_status_t EFIAPI efi_net_nvdata(struct efi_simple_network *this, EFI_ENTRY("%p, %x, %lx, %lx, %p", this, read_write, offset, buffer_size, buffer); - return EFI_EXIT(EFI_INVALID_PARAMETER); + return EFI_EXIT(EFI_UNSUPPORTED); } static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this, @@ -129,9 +133,14 @@ static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this, { EFI_ENTRY("%p, %p, %p", this, int_status, txbuf); - /* We send packets synchronously, so nothing is outstanding */ - if (int_status) - *int_status = 0; + efi_timer_check(); + + if (int_status) { + /* We send packets synchronously, so nothing is outstanding */ + *int_status = EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT; + if (new_rx_packet) + *int_status |= EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT; + } if (txbuf) *txbuf = new_tx_packet; @@ -141,12 +150,15 @@ static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this, } static efi_status_t EFIAPI efi_net_transmit(struct efi_simple_network *this, - ulong header_size, ulong buffer_size, void *buffer, + size_t header_size, size_t buffer_size, void *buffer, struct efi_mac_address *src_addr, struct efi_mac_address *dest_addr, u16 *protocol) { - EFI_ENTRY("%p, %lx, %lx, %p, %p, %p, %p", this, header_size, - buffer_size, buffer, src_addr, dest_addr, protocol); + EFI_ENTRY("%p, %lu, %lu, %p, %p, %p, %p", this, + (unsigned long)header_size, (unsigned long)buffer_size, + buffer, src_addr, dest_addr, protocol); + + efi_timer_check(); if (header_size) { /* We would need to create the header if header_size != 0 */ @@ -169,29 +181,66 @@ static efi_status_t EFIAPI efi_net_transmit(struct efi_simple_network *this, static void efi_net_push(void *pkt, int len) { new_rx_packet = true; + wait_for_packet->is_signaled = true; } +/* + * Receive a packet from a network interface. + * + * This function implements the Receive service of the Simple Network Protocol. + * See the UEFI spec for details. + * + * @this the instance of the Simple Network Protocol + * @header_size size of the media header + * @buffer_size size of the buffer to receive the packet + * @buffer buffer to receive the packet + * @src_addr source MAC address + * @dest_addr destination MAC address + * @protocol protocol + * @return status code + */ static efi_status_t EFIAPI efi_net_receive(struct efi_simple_network *this, - ulong *header_size, ulong *buffer_size, void *buffer, + size_t *header_size, size_t *buffer_size, void *buffer, struct efi_mac_address *src_addr, struct efi_mac_address *dest_addr, u16 *protocol) { + struct ethernet_hdr *eth_hdr; + size_t hdr_size = sizeof(struct ethernet_hdr); + u16 protlen; + EFI_ENTRY("%p, %p, %p, %p, %p, %p, %p", this, header_size, buffer_size, buffer, src_addr, dest_addr, protocol); - push_packet = efi_net_push; - eth_rx(); - push_packet = NULL; + efi_timer_check(); if (!new_rx_packet) return EFI_EXIT(EFI_NOT_READY); - + /* Check that we at least received an Ethernet header */ + if (net_rx_packet_len < sizeof(struct ethernet_hdr)) { + new_rx_packet = false; + return EFI_EXIT(EFI_NOT_READY); + } + /* Fill export parameters */ + eth_hdr = (struct ethernet_hdr *)net_rx_packet; + protlen = ntohs(eth_hdr->et_protlen); + if (protlen == 0x8100) { + hdr_size += 4; + protlen = ntohs(*(u16 *)&net_rx_packet[hdr_size - 2]); + } + if (header_size) + *header_size = hdr_size; + if (dest_addr) + memcpy(dest_addr, eth_hdr->et_dest, ARP_HLEN); + if (src_addr) + memcpy(src_addr, eth_hdr->et_src, ARP_HLEN); + if (protocol) + *protocol = protlen; if (*buffer_size < net_rx_packet_len) { /* Packet doesn't fit, try again with bigger buf */ *buffer_size = net_rx_packet_len; return EFI_EXIT(EFI_BUFFER_TOO_SMALL); } - + /* Copy packet */ memcpy(buffer, net_rx_packet, net_rx_packet_len); *buffer_size = net_rx_packet_len; new_rx_packet = false; @@ -209,20 +258,32 @@ void efi_net_set_dhcp_ack(void *pkt, int len) memcpy(dhcp_ack, pkt, min(len, maxsize)); } +/* + * Check if a new network packet has been received. + * + * This notification function is called in every timer cycle. + * + * @event the event for which this notification function is registered + * @context event context - not used in this function + */ +static void EFIAPI efi_network_timer_notify(struct efi_event *event, + void *context) +{ + EFI_ENTRY("%p, %p", event, context); + + if (!new_rx_packet) { + push_packet = efi_net_push; + eth_rx(); + push_packet = NULL; + } + EFI_EXIT(EFI_SUCCESS); +} + /* This gets called from do_bootefi_exec(). */ -int efi_net_register(void **handle) +int efi_net_register(void) { struct efi_net_obj *netobj; - struct efi_device_path_mac_addr dp_net = { - .dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE, - .dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR, - .dp.length = sizeof(dp_net), - }; - struct efi_device_path_file_path dp_end = { - .dp.type = DEVICE_PATH_TYPE_END, - .dp.sub_type = DEVICE_PATH_SUB_TYPE_END, - .dp.length = sizeof(dp_end), - }; + efi_status_t r; if (!eth_get_dev()) { /* No eth device active, don't expose any */ @@ -236,10 +297,12 @@ int efi_net_register(void **handle) netobj->parent.protocols[0].guid = &efi_net_guid; netobj->parent.protocols[0].protocol_interface = &netobj->net; netobj->parent.protocols[1].guid = &efi_guid_device_path; - netobj->parent.protocols[1].protocol_interface = &netobj->dp_mac; + netobj->parent.protocols[1].protocol_interface = + efi_dp_from_eth(); netobj->parent.protocols[2].guid = &efi_pxe_guid; netobj->parent.protocols[2].protocol_interface = &netobj->pxe; netobj->parent.handle = &netobj->net; + netobj->net.revision = EFI_SIMPLE_NETWORK_PROTOCOL_REVISION; netobj->net.start = efi_net_start; netobj->net.stop = efi_net_stop; netobj->net.initialize = efi_net_initialize; @@ -255,10 +318,8 @@ int efi_net_register(void **handle) netobj->net.receive = efi_net_receive; netobj->net.mode = &netobj->net_mode; netobj->net_mode.state = EFI_NETWORK_STARTED; - netobj->dp_mac = dp_net; - netobj->dp_end = dp_end; - memcpy(netobj->dp_mac.mac.addr, eth_get_ethaddr(), 6); memcpy(netobj->net_mode.current_address.mac_addr, eth_get_ethaddr(), 6); + netobj->net_mode.hwaddr_size = ARP_HLEN; netobj->net_mode.max_packet_size = PKTSIZE; netobj->pxe.mode = &netobj->pxe_mode; @@ -268,8 +329,36 @@ int efi_net_register(void **handle) /* Hook net up to the device list */ list_add_tail(&netobj->parent.link, &efi_obj_list); - if (handle) - *handle = &netobj->net; + /* + * Create WaitForPacket event. + */ + r = efi_create_event(EVT_NOTIFY_WAIT, TPL_CALLBACK, + efi_network_timer_notify, NULL, + &wait_for_packet); + if (r != EFI_SUCCESS) { + printf("ERROR: Failed to register network event\n"); + return r; + } + netobj->net.wait_for_packet = wait_for_packet; + /* + * Create a timer event. + * + * The notification function is used to check if a new network packet + * has been received. + */ + r = efi_create_event(EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_CALLBACK, + efi_network_timer_notify, NULL, + &network_timer_event); + if (r != EFI_SUCCESS) { + printf("ERROR: Failed to register network event\n"); + return r; + } + /* Network is time critical, create event in every timer cyle */ + r = efi_set_timer(network_timer_event, EFI_TIMER_PERIODIC, 0); + if (r != EFI_SUCCESS) { + printf("ERROR: Failed to set network timer\n"); + return r; + } return 0; } diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index ad7f3754bd..8104e08c46 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -184,7 +184,16 @@ static const struct efi_runtime_detach_list_struct efi_runtime_detach_list[] = { /* Clean up system table */ .ptr = &systab.boottime, .patchto = NULL, - }, + }, { + .ptr = &efi_runtime_services.get_variable, + .patchto = &efi_device_error, + }, { + .ptr = &efi_runtime_services.get_next_variable, + .patchto = &efi_device_error, + }, { + .ptr = &efi_runtime_services.set_variable, + .patchto = &efi_device_error, + } }; static bool efi_runtime_tobedetached(void *p) @@ -243,7 +252,8 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) /* Check if the relocation is inside bounds */ if (map && ((newaddr < map->virtual_start) || - newaddr > (map->virtual_start + (map->num_pages << 12)))) { + newaddr > (map->virtual_start + + (map->num_pages << EFI_PAGE_SHIFT)))) { if (!efi_runtime_tobedetached(p)) printf("U-Boot EFI: Relocation at %p is out of " "range (%lx)\n", p, newaddr); @@ -269,7 +279,8 @@ static efi_status_t EFIAPI efi_set_virtual_address_map( uint32_t descriptor_version, struct efi_mem_desc *virtmap) { - ulong runtime_start = (ulong)&__efi_runtime_start & ~0xfffULL; + ulong runtime_start = (ulong)&__efi_runtime_start & + ~(ulong)EFI_PAGE_MASK; int n = memory_map_size / descriptor_size; int i; @@ -382,9 +393,9 @@ struct efi_runtime_services __efi_runtime_data efi_runtime_services = { .set_wakeup_time = (void *)&efi_unimplemented, .set_virtual_address_map = &efi_set_virtual_address_map, .convert_pointer = (void *)&efi_invalid_parameter, - .get_variable = (void *)&efi_device_error, - .get_next_variable = (void *)&efi_device_error, - .set_variable = (void *)&efi_device_error, + .get_variable = efi_get_variable, + .get_next_variable = efi_get_next_variable, + .set_variable = efi_set_variable, .get_next_high_mono_count = (void *)&efi_device_error, .reset_system = &efi_reset_system_boottime, }; diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c new file mode 100644 index 0000000000..6c177da3a6 --- /dev/null +++ b/lib/efi_loader/efi_variable.c @@ -0,0 +1,335 @@ +/* + * EFI utils + * + * Copyright (c) 2017 Rob Clark + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <malloc.h> +#include <charset.h> +#include <efi_loader.h> + +#define READ_ONLY BIT(31) + +/* + * Mapping between EFI variables and u-boot variables: + * + * efi_$guid_$varname = {attributes}(type)value + * + * For example: + * + * efi_8be4df61-93ca-11d2-aa0d-00e098032b8c_OsIndicationsSupported= + * "{ro,boot,run}(blob)0000000000000000" + * efi_8be4df61-93ca-11d2-aa0d-00e098032b8c_BootOrder= + * "(blob)00010000" + * + * The attributes are a comma separated list of these possible + * attributes: + * + * + ro - read-only + * + boot - boot-services access + * + run - runtime access + * + * NOTE: with current implementation, no variables are available after + * ExitBootServices, and all are persisted (if possible). + * + * If not specified, the attributes default to "{boot}". + * + * The required type is one of: + * + * + utf8 - raw utf8 string + * + blob - arbitrary length hex string + * + * Maybe a utf16 type would be useful to for a string value to be auto + * converted to utf16? + */ + +#define MAX_VAR_NAME 31 +#define MAX_NATIVE_VAR_NAME \ + (strlen("efi_xxxxxxxx-xxxx-xxxx-xxxxxxxxxxxxxxxx_") + \ + (MAX_VAR_NAME * MAX_UTF8_PER_UTF16)) + +static int hex(unsigned char ch) +{ + if (ch >= 'a' && ch <= 'f') + return ch-'a'+10; + if (ch >= '0' && ch <= '9') + return ch-'0'; + if (ch >= 'A' && ch <= 'F') + return ch-'A'+10; + return -1; +} + +static const char *hex2mem(u8 *mem, const char *hexstr, int count) +{ + memset(mem, 0, count/2); + + do { + int nibble; + + *mem = 0; + + if (!count || !*hexstr) + break; + + nibble = hex(*hexstr); + if (nibble < 0) + break; + + *mem = nibble; + count--; + hexstr++; + + if (!count || !*hexstr) + break; + + nibble = hex(*hexstr); + if (nibble < 0) + break; + + *mem = (*mem << 4) | nibble; + count--; + hexstr++; + mem++; + + } while (1); + + if (*hexstr) + return hexstr; + + return NULL; +} + +static char *mem2hex(char *hexstr, const u8 *mem, int count) +{ + static const char hexchars[] = "0123456789abcdef"; + + while (count-- > 0) { + u8 ch = *mem++; + *hexstr++ = hexchars[ch >> 4]; + *hexstr++ = hexchars[ch & 0xf]; + } + + return hexstr; +} + +static efi_status_t efi_to_native(char *native, s16 *variable_name, + efi_guid_t *vendor) +{ + size_t len; + + len = utf16_strlen((u16 *)variable_name); + if (len >= MAX_VAR_NAME) + return EFI_DEVICE_ERROR; + + native += sprintf(native, "efi_%pUl_", vendor); + native = (char *)utf16_to_utf8((u8 *)native, (u16 *)variable_name, len); + *native = '\0'; + + return EFI_SUCCESS; +} + +static const char *prefix(const char *str, const char *prefix) +{ + size_t n = strlen(prefix); + if (!strncmp(prefix, str, n)) + return str + n; + return NULL; +} + +/* parse attributes part of variable value, if present: */ +static const char *parse_attr(const char *str, u32 *attrp) +{ + u32 attr = 0; + char sep = '{'; + + if (*str != '{') { + *attrp = EFI_VARIABLE_BOOTSERVICE_ACCESS; + return str; + } + + while (*str == sep) { + const char *s; + + str++; + + if ((s = prefix(str, "ro"))) { + attr |= READ_ONLY; + } else if ((s = prefix(str, "boot"))) { + attr |= EFI_VARIABLE_BOOTSERVICE_ACCESS; + } else if ((s = prefix(str, "run"))) { + attr |= EFI_VARIABLE_RUNTIME_ACCESS; + } else { + printf("invalid attribute: %s\n", str); + break; + } + + str = s; + sep = ','; + } + + str++; + + *attrp = attr; + + return str; +} + +/* http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#GetVariable.28.29 */ +efi_status_t EFIAPI efi_get_variable(s16 *variable_name, + efi_guid_t *vendor, u32 *attributes, + unsigned long *data_size, void *data) +{ + char native_name[MAX_NATIVE_VAR_NAME + 1]; + efi_status_t ret; + unsigned long in_size; + const char *val, *s; + u32 attr; + + EFI_ENTRY("\"%ls\" %pUl %p %p %p", variable_name, vendor, attributes, + data_size, data); + + if (!variable_name || !vendor || !data_size) + return EFI_EXIT(EFI_INVALID_PARAMETER); + + ret = efi_to_native(native_name, variable_name, vendor); + if (ret) + return EFI_EXIT(ret); + + debug("%s: get '%s'\n", __func__, native_name); + + val = env_get(native_name); + if (!val) + return EFI_EXIT(EFI_NOT_FOUND); + + val = parse_attr(val, &attr); + + in_size = *data_size; + + if ((s = prefix(val, "(blob)"))) { + unsigned len = strlen(s); + + /* two characters per byte: */ + len = DIV_ROUND_UP(len, 2); + *data_size = len; + + if (in_size < len) + return EFI_EXIT(EFI_BUFFER_TOO_SMALL); + + if (!data) + return EFI_EXIT(EFI_INVALID_PARAMETER); + + if (hex2mem(data, s, len * 2)) + return EFI_EXIT(EFI_DEVICE_ERROR); + + debug("%s: got value: \"%s\"\n", __func__, s); + } else if ((s = prefix(val, "(utf8)"))) { + unsigned len = strlen(s) + 1; + + *data_size = len; + + if (in_size < len) + return EFI_EXIT(EFI_BUFFER_TOO_SMALL); + + if (!data) + return EFI_EXIT(EFI_INVALID_PARAMETER); + + memcpy(data, s, len); + ((char *)data)[len] = '\0'; + + debug("%s: got value: \"%s\"\n", __func__, (char *)data); + } else { + debug("%s: invalid value: '%s'\n", __func__, val); + return EFI_EXIT(EFI_DEVICE_ERROR); + } + + if (attributes) + *attributes = attr & EFI_VARIABLE_MASK; + + return EFI_EXIT(EFI_SUCCESS); +} + +/* http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#GetNextVariableName.28.29 */ +efi_status_t EFIAPI efi_get_next_variable( + unsigned long *variable_name_size, + s16 *variable_name, efi_guid_t *vendor) +{ + EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, vendor); + + return EFI_EXIT(EFI_DEVICE_ERROR); +} + +/* http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#SetVariable.28.29 */ +efi_status_t EFIAPI efi_set_variable(s16 *variable_name, + efi_guid_t *vendor, u32 attributes, + unsigned long data_size, void *data) +{ + char native_name[MAX_NATIVE_VAR_NAME + 1]; + efi_status_t ret = EFI_SUCCESS; + char *val, *s; + u32 attr; + + EFI_ENTRY("\"%ls\" %pUl %x %lu %p", variable_name, vendor, attributes, + data_size, data); + + if (!variable_name || !vendor) + return EFI_EXIT(EFI_INVALID_PARAMETER); + + ret = efi_to_native(native_name, variable_name, vendor); + if (ret) + return EFI_EXIT(ret); + +#define ACCESS_ATTR (EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_BOOTSERVICE_ACCESS) + + if ((data_size == 0) || !(attributes & ACCESS_ATTR)) { + /* delete the variable: */ + env_set(native_name, NULL); + return EFI_EXIT(EFI_SUCCESS); + } + + val = env_get(native_name); + if (val) { + parse_attr(val, &attr); + + if (attr & READ_ONLY) + return EFI_EXIT(EFI_WRITE_PROTECTED); + } + + val = malloc(2 * data_size + strlen("{ro,run,boot}(blob)") + 1); + if (!val) + return EFI_EXIT(EFI_OUT_OF_RESOURCES); + + s = val; + + /* store attributes: */ + attributes &= (EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS); + s += sprintf(s, "{"); + while (attributes) { + u32 attr = 1 << (ffs(attributes) - 1); + + if (attr == EFI_VARIABLE_BOOTSERVICE_ACCESS) + s += sprintf(s, "boot"); + else if (attr == EFI_VARIABLE_RUNTIME_ACCESS) + s += sprintf(s, "run"); + + attributes &= ~attr; + if (attributes) + s += sprintf(s, ","); + } + s += sprintf(s, "}"); + + /* store payload: */ + s += sprintf(s, "(blob)"); + s = mem2hex(s, data, data_size); + *s = '\0'; + + debug("%s: setting: %s=%s\n", __func__, native_name, val); + + if (env_set(native_name, val)) + ret = EFI_DEVICE_ERROR; + + free(val); + + return EFI_EXIT(ret); +} diff --git a/lib/efi_selftest/Kconfig b/lib/efi_selftest/Kconfig new file mode 100644 index 0000000000..3b5f3a1230 --- /dev/null +++ b/lib/efi_selftest/Kconfig @@ -0,0 +1,7 @@ +config CMD_BOOTEFI_SELFTEST + bool "Allow booting an EFI efi_selftest" + depends on CMD_BOOTEFI + help + This adds an EFI test application to U-Boot that can be executed + with the 'bootefi selftest' command. It provides extended tests of + the EFI API implementation. diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile new file mode 100644 index 0000000000..e446046e02 --- /dev/null +++ b/lib/efi_selftest/Makefile @@ -0,0 +1,32 @@ +: +# (C) Copyright 2017, Heinrich Schuchardt <xypron.glpk@gmx.de> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# This file only gets included with CONFIG_EFI_LOADER set, so all +# object inclusion implicitly depends on it + +CFLAGS_efi_selftest.o := $(CFLAGS_EFI) +CFLAGS_REMOVE_efi_selftest.o := $(CFLAGS_NON_EFI) +CFLAGS_efi_selftest_console.o := $(CFLAGS_EFI) +CFLAGS_REMOVE_efi_selftest_console.o := $(CFLAGS_NON_EFI) +CFLAGS_efi_selftest_events.o := $(CFLAGS_EFI) +CFLAGS_REMOVE_efi_selftest_events.o := $(CFLAGS_NON_EFI) +CFLAGS_efi_selftest_exitbootservices.o := $(CFLAGS_EFI) +CFLAGS_REMOVE_efi_selftest_exitbootservices.o := $(CFLAGS_NON_EFI) +CFLAGS_efi_selftest_snp.o := $(CFLAGS_EFI) +CFLAGS_REMOVE_efi_selftest_snp.o := $(CFLAGS_NON_EFI) +CFLAGS_efi_selftest_tpl.o := $(CFLAGS_EFI) +CFLAGS_REMOVE_efi_selftest_tpl.o := $(CFLAGS_NON_EFI) +CFLAGS_efi_selftest_util.o := $(CFLAGS_EFI) +CFLAGS_REMOVE_efi_selftest_util.o := $(CFLAGS_NON_EFI) + +obj-$(CONFIG_CMD_BOOTEFI_SELFTEST) += \ +efi_selftest.o \ +efi_selftest_console.o \ +efi_selftest_events.o \ +efi_selftest_exitbootservices.o \ +efi_selftest_snp.o \ +efi_selftest_tpl.o \ +efi_selftest_util.o diff --git a/lib/efi_selftest/efi_selftest.c b/lib/efi_selftest/efi_selftest.c new file mode 100644 index 0000000000..45d8d3d384 --- /dev/null +++ b/lib/efi_selftest/efi_selftest.c @@ -0,0 +1,220 @@ +/* + * EFI efi_selftest + * + * Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <efi_selftest.h> +#include <vsprintf.h> + +static const struct efi_system_table *systable; +static const struct efi_boot_services *boottime; +static const struct efi_runtime_services *runtime; +static efi_handle_t handle; +static u16 reset_message[] = L"Selftest completed"; + +/* + * Exit the boot services. + * + * The size of the memory map is determined. + * Pool memory is allocated to copy the memory map. + * The memory amp is copied and the map key is obtained. + * The map key is used to exit the boot services. + */ +void efi_st_exit_boot_services(void) +{ + unsigned long map_size = 0; + unsigned long map_key; + unsigned long desc_size; + u32 desc_version; + efi_status_t ret; + struct efi_mem_desc *memory_map; + + ret = boottime->get_memory_map(&map_size, NULL, &map_key, &desc_size, + &desc_version); + if (ret != EFI_BUFFER_TOO_SMALL) { + efi_st_error( + "GetMemoryMap did not return EFI_BUFFER_TOO_SMALL\n"); + return; + } + /* Allocate extra space for newly allocated memory */ + map_size += sizeof(struct efi_mem_desc); + ret = boottime->allocate_pool(EFI_BOOT_SERVICES_DATA, map_size, + (void **)&memory_map); + if (ret != EFI_SUCCESS) { + efi_st_error("AllocatePool did not return EFI_SUCCESS\n"); + return; + } + ret = boottime->get_memory_map(&map_size, memory_map, &map_key, + &desc_size, &desc_version); + if (ret != EFI_SUCCESS) { + efi_st_error("GetMemoryMap did not return EFI_SUCCESS\n"); + return; + } + ret = boottime->exit_boot_services(handle, map_key); + if (ret != EFI_SUCCESS) { + efi_st_error("ExitBootServices did not return EFI_SUCCESS\n"); + return; + } + efi_st_printf("\nBoot services terminated\n"); +} + +/* + * Set up a test. + * + * @test the test to be executed + * @failures counter that will be incremented if a failure occurs + * @return EFI_ST_SUCCESS for success + */ +static int setup(struct efi_unit_test *test, unsigned int *failures) +{ + int ret; + + if (!test->setup) + return EFI_ST_SUCCESS; + efi_st_printf("\nSetting up '%s'\n", test->name); + ret = test->setup(handle, systable); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("Setting up '%s' failed\n", test->name); + ++*failures; + } else { + efi_st_printf("Setting up '%s' succeeded\n", test->name); + } + return ret; +} + +/* + * Execute a test. + * + * @test the test to be executed + * @failures counter that will be incremented if a failure occurs + * @return EFI_ST_SUCCESS for success + */ +static int execute(struct efi_unit_test *test, unsigned int *failures) +{ + int ret; + + if (!test->execute) + return EFI_ST_SUCCESS; + efi_st_printf("\nExecuting '%s'\n", test->name); + ret = test->execute(); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("Executing '%s' failed\n", test->name); + ++*failures; + } else { + efi_st_printf("Executing '%s' succeeded\n", test->name); + } + return ret; +} + +/* + * Tear down a test. + * + * @test the test to be torn down + * @failures counter that will be incremented if a failure occurs + * @return EFI_ST_SUCCESS for success + */ +static int teardown(struct efi_unit_test *test, unsigned int *failures) +{ + int ret; + + if (!test->teardown) + return EFI_ST_SUCCESS; + efi_st_printf("\nTearing down '%s'\n", test->name); + ret = test->teardown(); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("Tearing down '%s' failed\n", test->name); + ++*failures; + } else { + efi_st_printf("Tearing down '%s' succeeded\n", test->name); + } + return ret; +} + +/* + * Execute selftest of the EFI API + * + * This is the main entry point of the EFI selftest application. + * + * All tests use a driver model and are run in three phases: + * setup, execute, teardown. + * + * A test may be setup and executed at boottime, + * it may be setup at boottime and executed at runtime, + * or it may be setup and executed at runtime. + * + * After executing all tests the system is reset. + * + * @image_handle: handle of the loaded EFI image + * @systab: EFI system table + */ +efi_status_t EFIAPI efi_selftest(efi_handle_t image_handle, + struct efi_system_table *systab) +{ + struct efi_unit_test *test; + unsigned int failures = 0; + + systable = systab; + boottime = systable->boottime; + runtime = systable->runtime; + handle = image_handle; + con_out = systable->con_out; + con_in = systable->con_in; + + efi_st_printf("\nTesting EFI API implementation\n"); + + efi_st_printf("\nNumber of tests to execute: %u\n", + ll_entry_count(struct efi_unit_test, efi_unit_test)); + + /* Execute boottime tests */ + for (test = ll_entry_start(struct efi_unit_test, efi_unit_test); + test < ll_entry_end(struct efi_unit_test, efi_unit_test); ++test) { + if (test->phase == EFI_EXECUTE_BEFORE_BOOTTIME_EXIT) { + setup(test, &failures); + execute(test, &failures); + teardown(test, &failures); + } + } + + /* Execute mixed tests */ + for (test = ll_entry_start(struct efi_unit_test, efi_unit_test); + test < ll_entry_end(struct efi_unit_test, efi_unit_test); ++test) { + if (test->phase == EFI_SETUP_BEFORE_BOOTTIME_EXIT) + setup(test, &failures); + } + + efi_st_exit_boot_services(); + + for (test = ll_entry_start(struct efi_unit_test, efi_unit_test); + test < ll_entry_end(struct efi_unit_test, efi_unit_test); ++test) { + if (test->phase == EFI_SETUP_BEFORE_BOOTTIME_EXIT) { + execute(test, &failures); + teardown(test, &failures); + } + } + + /* Execute runtime tests */ + for (test = ll_entry_start(struct efi_unit_test, efi_unit_test); + test < ll_entry_end(struct efi_unit_test, efi_unit_test); ++test) { + if (test->phase == EFI_SETUP_AFTER_BOOTTIME_EXIT) { + setup(test, &failures); + execute(test, &failures); + teardown(test, &failures); + } + } + + /* Give feedback */ + efi_st_printf("\nSummary: %u failures\n\n", failures); + + /* Reset system */ + efi_st_printf("Preparing for reset. Press any key.\n"); + efi_st_get_key(); + runtime->reset_system(EFI_RESET_WARM, EFI_NOT_READY, + sizeof(reset_message), reset_message); + efi_st_printf("\n"); + efi_st_error("Reset failed.\n"); + + return EFI_UNSUPPORTED; +} diff --git a/lib/efi_selftest/efi_selftest_console.c b/lib/efi_selftest/efi_selftest_console.c new file mode 100644 index 0000000000..840e2290c6 --- /dev/null +++ b/lib/efi_selftest/efi_selftest_console.c @@ -0,0 +1,226 @@ +/* + * EFI efi_selftest + * + * Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <efi_selftest.h> +#include <vsprintf.h> + +struct efi_simple_text_output_protocol *con_out; +struct efi_simple_input_interface *con_in; + +/* + * Print a MAC address to an u16 string + * + * @pointer: mac address + * @buf: pointer to buffer address + * on return position of terminating zero word + */ +static void mac(void *pointer, u16 **buf) +{ + int i, j; + u16 c; + u8 *p = (u8 *)pointer; + u8 byte; + u16 *pos = *buf; + + for (i = 0; i < ARP_HLEN; ++i) { + if (i) + *pos++ = ':'; + byte = p[i]; + for (j = 4; j >= 0; j -= 4) { + c = (byte >> j) & 0x0f; + c += '0'; + if (c > '9') + c += 'a' - '9' - 1; + *pos++ = c; + } + } + *pos = 0; + *buf = pos; +} + +/* + * Print a pointer to an u16 string + * + * @pointer: pointer + * @buf: pointer to buffer address + * on return position of terminating zero word + */ +static void pointer(void *pointer, u16 **buf) +{ + int i; + u16 c; + uintptr_t p = (uintptr_t)pointer; + u16 *pos = *buf; + + for (i = 8 * sizeof(p) - 4; i >= 0; i -= 4) { + c = (p >> i) & 0x0f; + c += '0'; + if (c > '9') + c += 'a' - '9' - 1; + *pos++ = c; + } + *pos = 0; + *buf = pos; +} + +/* + * Print an unsigned 32bit value as decimal number to an u16 string + * + * @value: value to be printed + * @buf: pointer to buffer address + * on return position of terminating zero word + */ +static void uint2dec(u32 value, u16 **buf) +{ + u16 *pos = *buf; + int i; + u16 c; + u64 f; + + /* + * Increment by .5 and multiply with + * (2 << 60) / 1,000,000,000 = 0x44B82FA0.9B5A52CC + * to move the first digit to bit 60-63. + */ + f = 0x225C17D0; + f += (0x9B5A52DULL * value) >> 28; + f += 0x44B82FA0ULL * value; + + for (i = 0; i < 10; ++i) { + /* Write current digit */ + c = f >> 60; + if (c || pos != *buf) + *pos++ = c + '0'; + /* Eliminate current digit */ + f &= 0xfffffffffffffff; + /* Get next digit */ + f *= 0xaULL; + } + if (pos == *buf) + *pos++ = '0'; + *pos = 0; + *buf = pos; +} + +/* + * Print a signed 32bit value as decimal number to an u16 string + * + * @value: value to be printed + * @buf: pointer to buffer address + * on return position of terminating zero word + */ +static void int2dec(s32 value, u16 **buf) +{ + u32 u; + u16 *pos = *buf; + + if (value < 0) { + *pos++ = '-'; + u = -value; + } else { + u = value; + } + uint2dec(u, &pos); + *buf = pos; +} + +/* + * Print a formatted string to the EFI console + * + * @fmt: format string + * @...: optional arguments + */ +void efi_st_printf(const char *fmt, ...) +{ + va_list args; + u16 buf[160]; + const char *c; + u16 *pos = buf; + const char *s; + + va_start(args, fmt); + + c = fmt; + for (; *c; ++c) { + switch (*c) { + case '\\': + ++c; + switch (*c) { + case '\0': + --c; + break; + case 'n': + *pos++ = '\n'; + break; + case 'r': + *pos++ = '\r'; + break; + case 't': + *pos++ = '\t'; + break; + default: + *pos++ = *c; + } + break; + case '%': + ++c; + switch (*c) { + case '\0': + --c; + break; + case 'd': + int2dec(va_arg(args, s32), &pos); + break; + case 'p': + ++c; + switch (*c) { + case 'm': + mac(va_arg(args, void*), &pos); + break; + default: + --c; + pointer(va_arg(args, void*), &pos); + } + break; + case 's': + s = va_arg(args, const char *); + for (; *s; ++s) + *pos++ = *s; + break; + case 'u': + uint2dec(va_arg(args, u32), &pos); + break; + default: + break; + } + break; + default: + *pos++ = *c; + } + } + va_end(args); + *pos = 0; + con_out->output_string(con_out, buf); +} + +/* + * Reads an Unicode character from the input device. + * + * @return: Unicode character + */ +u16 efi_st_get_key(void) +{ + struct efi_input_key input_key; + efi_status_t ret; + + /* Wait for next key */ + do { + ret = con_in->read_key_stroke(con_in, &input_key); + } while (ret == EFI_NOT_READY); + return input_key.unicode_char; +} diff --git a/lib/efi_selftest/efi_selftest_events.c b/lib/efi_selftest/efi_selftest_events.c new file mode 100644 index 0000000000..081f31257f --- /dev/null +++ b/lib/efi_selftest/efi_selftest_events.c @@ -0,0 +1,203 @@ +/* + * efi_selftest_events + * + * Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * This unit test uses timer events to check the implementation + * of the following boottime services: + * CreateEvent, CloseEvent, WaitForEvent, CheckEvent, SetTimer. + */ + +#include <efi_selftest.h> + +static struct efi_event *event_notify; +static struct efi_event *event_wait; +static unsigned int timer_ticks; +static struct efi_boot_services *boottime; + +/* + * Notification function, increments the notfication count if parameter + * context is provided. + * + * @event notified event + * @context pointer to the notification count + */ +static void EFIAPI notify(struct efi_event *event, void *context) +{ + unsigned int *count = context; + + if (count) + ++*count; +} + +/* + * Setup unit test. + * + * Create two timer events. + * One with EVT_NOTIFY_SIGNAL, the other with EVT_NOTIFY_WAIT. + * + * @handle: handle of the loaded image + * @systable: system table + * @return: EFI_ST_SUCCESS for success + */ +static int setup(const efi_handle_t handle, + const struct efi_system_table *systable) +{ + efi_status_t ret; + + boottime = systable->boottime; + + ret = boottime->create_event(EVT_TIMER | EVT_NOTIFY_SIGNAL, + TPL_CALLBACK, notify, (void *)&timer_ticks, + &event_notify); + if (ret != EFI_SUCCESS) { + efi_st_error("could not create event\n"); + return EFI_ST_FAILURE; + } + ret = boottime->create_event(EVT_TIMER | EVT_NOTIFY_WAIT, + TPL_CALLBACK, notify, NULL, &event_wait); + if (ret != EFI_SUCCESS) { + efi_st_error("could not create event\n"); + return EFI_ST_FAILURE; + } + return EFI_ST_SUCCESS; +} + +/* + * Tear down unit test. + * + * Close the events created in setup. + * + * @return: EFI_ST_SUCCESS for success + */ +static int teardown(void) +{ + efi_status_t ret; + + if (event_notify) { + ret = boottime->close_event(event_notify); + event_notify = NULL; + if (ret != EFI_SUCCESS) { + efi_st_error("could not close event\n"); + return EFI_ST_FAILURE; + } + } + if (event_wait) { + ret = boottime->close_event(event_wait); + event_wait = NULL; + if (ret != EFI_SUCCESS) { + efi_st_error("could not close event\n"); + return EFI_ST_FAILURE; + } + } + return EFI_ST_SUCCESS; +} + +/* + * Execute unit test. + * + * Run a 10 ms periodic timer and check that it is called 10 times + * while waiting for 100 ms single shot timer. + * + * Run a 100 ms single shot timer and check that it is called once + * while waiting for 100 ms periodic timer for two periods. + * + * @return: EFI_ST_SUCCESS for success + */ +static int execute(void) +{ + size_t index; + efi_status_t ret; + + /* Set 10 ms timer */ + timer_ticks = 0; + ret = boottime->set_timer(event_notify, EFI_TIMER_PERIODIC, 100000); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + /* Set 100 ms timer */ + ret = boottime->set_timer(event_wait, EFI_TIMER_RELATIVE, 1000000); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + + /* Set some arbitrary non-zero value to make change detectable. */ + index = 5; + ret = boottime->wait_for_event(1, &event_wait, &index); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not wait for event\n"); + return EFI_ST_FAILURE; + } + ret = boottime->check_event(event_wait); + if (ret != EFI_NOT_READY) { + efi_st_error("Signaled state was not cleared.\n"); + efi_st_printf("ret = %u\n", (unsigned int)ret); + return EFI_ST_FAILURE; + } + if (index != 0) { + efi_st_error("WaitForEvent returned wrong index\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("Notification count periodic: %u\n", timer_ticks); + if (timer_ticks < 8 || timer_ticks > 12) { + efi_st_error("Incorrect timing of events\n"); + return EFI_ST_FAILURE; + } + ret = boottime->set_timer(event_notify, EFI_TIMER_STOP, 0); + if (index != 0) { + efi_st_error("Could not cancel timer\n"); + return EFI_ST_FAILURE; + } + /* Set 10 ms timer */ + timer_ticks = 0; + ret = boottime->set_timer(event_notify, EFI_TIMER_RELATIVE, 100000); + if (index != 0) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + /* Set 100 ms timer */ + ret = boottime->set_timer(event_wait, EFI_TIMER_PERIODIC, 1000000); + if (index != 0) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + ret = boottime->wait_for_event(1, &event_wait, &index); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not wait for event\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("Notification count single shot: %u\n", timer_ticks); + if (timer_ticks != 1) { + efi_st_error("Single shot timer failed\n"); + return EFI_ST_FAILURE; + } + ret = boottime->wait_for_event(1, &event_wait, &index); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not wait for event\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("Notification count stopped timer: %u\n", timer_ticks); + if (timer_ticks != 1) { + efi_st_error("Stopped timer fired\n"); + return EFI_ST_FAILURE; + } + ret = boottime->set_timer(event_wait, EFI_TIMER_STOP, 0); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not cancel timer\n"); + return EFI_ST_FAILURE; + } + + return EFI_ST_SUCCESS; +} + +EFI_UNIT_TEST(events) = { + .name = "event services", + .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT, + .setup = setup, + .execute = execute, + .teardown = teardown, +}; diff --git a/lib/efi_selftest/efi_selftest_exitbootservices.c b/lib/efi_selftest/efi_selftest_exitbootservices.c new file mode 100644 index 0000000000..cddd11d52b --- /dev/null +++ b/lib/efi_selftest/efi_selftest_exitbootservices.c @@ -0,0 +1,112 @@ +/* + * efi_selftest_exitbootservices + * + * Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * This unit test checks that the notification function of an + * EVT_SIGNAL_EXIT_BOOT_SERVICES event is called exactly once. + */ + +#include <efi_selftest.h> + +static struct efi_boot_services *boottime; +static struct efi_event *event_notify; +static unsigned int notification_count; + +/* + * Notification function, increments the notification count. + * + * @event notified event + * @context pointer to the notification count + */ +static void EFIAPI notify(struct efi_event *event, void *context) +{ + unsigned int *count = context; + + ++*count; +} + +/* + * Setup unit test. + * + * Create an EVT_SIGNAL_EXIT_BOOT_SERVICES event. + * + * @handle: handle of the loaded image + * @systable: system table + * @return: EFI_ST_SUCCESS for success + */ +static int setup(const efi_handle_t handle, + const struct efi_system_table *systable) +{ + efi_status_t ret; + + boottime = systable->boottime; + + notification_count = 0; + ret = boottime->create_event(EVT_SIGNAL_EXIT_BOOT_SERVICES, + TPL_CALLBACK, notify, + (void *)¬ification_count, + &event_notify); + if (ret != EFI_SUCCESS) { + efi_st_error("could not create event\n"); + return EFI_ST_FAILURE; + } + return EFI_ST_SUCCESS; +} + +/* + * Tear down unit test. + * + * Close the event created in setup. + * + * @return: EFI_ST_SUCCESS for success + */ +static int teardown(void) +{ + efi_status_t ret; + + if (event_notify) { + ret = boottime->close_event(event_notify); + event_notify = NULL; + if (ret != EFI_SUCCESS) { + efi_st_error("could not close event\n"); + return EFI_ST_FAILURE; + } + } + return EFI_ST_SUCCESS; +} + +/* + * Execute unit test. + * + * Check that the notification function of the EVT_SIGNAL_EXIT_BOOT_SERVICES + * event has been called. + * + * Call ExitBootServices again and check that the notification function is + * not called again. + * + * @return: EFI_ST_SUCCESS for success + */ +static int execute(void) +{ + if (notification_count != 1) { + efi_st_error("ExitBootServices was not notified\n"); + return EFI_ST_FAILURE; + } + efi_st_exit_boot_services(); + if (notification_count != 1) { + efi_st_error("ExitBootServices was notified twice\n"); + return EFI_ST_FAILURE; + } + return EFI_ST_SUCCESS; +} + +EFI_UNIT_TEST(exitbootservices) = { + .name = "ExitBootServices", + .phase = EFI_SETUP_BEFORE_BOOTTIME_EXIT, + .setup = setup, + .execute = execute, + .teardown = teardown, +}; diff --git a/lib/efi_selftest/efi_selftest_snp.c b/lib/efi_selftest/efi_selftest_snp.c new file mode 100644 index 0000000000..bdd6ce20da --- /dev/null +++ b/lib/efi_selftest/efi_selftest_snp.c @@ -0,0 +1,431 @@ +/* + * efi_selftest_snp + * + * Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * This unit test covers the Simple Network Protocol as well as + * the CopyMem and SetMem boottime services. + * + * A DHCP discover message is sent. The test is successful if a + * DHCP reply is received. + * + * TODO: Once ConnectController and DisconnectController are implemented + * we should connect our code as controller. + */ + +#include <efi_selftest.h> + +/* + * MAC address for broadcasts + */ +static const u8 BROADCAST_MAC[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + +struct dhcp_hdr { + u8 op; +#define BOOTREQUEST 1 +#define BOOTREPLY 2 + u8 htype; +# define HWT_ETHER 1 + u8 hlen; +# define HWL_ETHER 6 + u8 hops; + u32 xid; + u16 secs; + u16 flags; +#define DHCP_FLAGS_UNICAST 0x0000 +#define DHCP_FLAGS_BROADCAST 0x0080 + u32 ciaddr; + u32 yiaddr; + u32 siaddr; + u32 giaddr; + u8 chaddr[16]; + u8 sname[64]; + u8 file[128]; +}; + +/* + * Message type option. + */ +#define DHCP_MESSAGE_TYPE 0x35 +#define DHCPDISCOVER 1 +#define DHCPOFFER 2 +#define DHCPREQUEST 3 +#define DHCPDECLINE 4 +#define DHCPACK 5 +#define DHCPNAK 6 +#define DHCPRELEASE 7 + +struct dhcp { + struct ethernet_hdr eth_hdr; + struct ip_udp_hdr ip_udp; + struct dhcp_hdr dhcp_hdr; + u8 opt[128]; +} __packed; + +static struct efi_boot_services *boottime; +static struct efi_simple_network *net; +static struct efi_event *timer; +static const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_GUID; +/* IP packet ID */ +static unsigned int net_ip_id; + +/* + * Compute the checksum of the IP header. We cover even values of length only. + * We cannot use net/checksum.c due to different CFLAGS values. + * + * @buf: IP header + * @len: length of header in bytes + * @return: checksum + */ +static unsigned int efi_ip_checksum(const void *buf, size_t len) +{ + size_t i; + u32 sum = 0; + const u16 *pos = buf; + + for (i = 0; i < len; i += 2) + sum += *pos++; + + sum = (sum >> 16) + (sum & 0xffff); + sum += sum >> 16; + sum = ~sum & 0xffff; + + return sum; +} + +/* + * Transmit a DHCPDISCOVER message. + */ +static efi_status_t send_dhcp_discover(void) +{ + efi_status_t ret; + struct dhcp p = {}; + + /* + * Fill ethernet header + */ + boottime->copy_mem(p.eth_hdr.et_dest, (void *)BROADCAST_MAC, ARP_HLEN); + boottime->copy_mem(p.eth_hdr.et_src, &net->mode->current_address, + ARP_HLEN); + p.eth_hdr.et_protlen = htons(PROT_IP); + /* + * Fill IP header + */ + p.ip_udp.ip_hl_v = 0x45; + p.ip_udp.ip_len = htons(sizeof(struct dhcp) - + sizeof(struct ethernet_hdr)); + p.ip_udp.ip_id = htons(++net_ip_id); + p.ip_udp.ip_off = htons(IP_FLAGS_DFRAG); + p.ip_udp.ip_ttl = 0xff; /* time to live */ + p.ip_udp.ip_p = IPPROTO_UDP; + boottime->set_mem(&p.ip_udp.ip_dst, 4, 0xff); + p.ip_udp.ip_sum = efi_ip_checksum(&p.ip_udp, IP_HDR_SIZE); + + /* + * Fill UDP header + */ + p.ip_udp.udp_src = htons(68); + p.ip_udp.udp_dst = htons(67); + p.ip_udp.udp_len = htons(sizeof(struct dhcp) - + sizeof(struct ethernet_hdr) - + sizeof(struct ip_hdr)); + /* + * Fill DHCP header + */ + p.dhcp_hdr.op = BOOTREQUEST; + p.dhcp_hdr.htype = HWT_ETHER; + p.dhcp_hdr.hlen = HWL_ETHER; + p.dhcp_hdr.flags = htons(DHCP_FLAGS_UNICAST); + boottime->copy_mem(&p.dhcp_hdr.chaddr, + &net->mode->current_address, ARP_HLEN); + /* + * Fill options + */ + p.opt[0] = 0x63; /* DHCP magic cookie */ + p.opt[1] = 0x82; + p.opt[2] = 0x53; + p.opt[3] = 0x63; + p.opt[4] = DHCP_MESSAGE_TYPE; + p.opt[5] = 0x01; /* length */ + p.opt[6] = DHCPDISCOVER; + p.opt[7] = 0x39; /* maximum message size */ + p.opt[8] = 0x02; /* length */ + p.opt[9] = 0x02; /* 576 bytes */ + p.opt[10] = 0x40; + p.opt[11] = 0xff; /* end of options */ + + /* + * Transmit DHCPDISCOVER message. + */ + ret = net->transmit(net, 0, sizeof(struct dhcp), &p, NULL, NULL, 0); + if (ret != EFI_SUCCESS) + efi_st_error("Sending a DHCP request failed\n"); + else + efi_st_printf("DHCP Discover\n"); + return ret; +} + +/* + * Setup unit test. + * + * Create a 1 s periodic timer. + * Start the network driver. + * + * @handle: handle of the loaded image + * @systable: system table + * @return: EFI_ST_SUCCESS for success + */ +static int setup(const efi_handle_t handle, + const struct efi_system_table *systable) +{ + efi_status_t ret; + + boottime = systable->boottime; + + /* + * Create a timer event. + */ + ret = boottime->create_event(EVT_TIMER, TPL_CALLBACK, NULL, NULL, + &timer); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to create event\n"); + return EFI_ST_FAILURE; + } + /* + * Set timer period to 1s. + */ + ret = boottime->set_timer(timer, EFI_TIMER_PERIODIC, 10000000); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to set timer\n"); + return EFI_ST_FAILURE; + } + /* + * Find an interface implementing the SNP protocol. + */ + ret = boottime->locate_protocol(&efi_net_guid, NULL, (void **)&net); + if (ret != EFI_SUCCESS) { + net = NULL; + efi_st_error("Failed to locate simple network protocol\n"); + return EFI_ST_FAILURE; + } + /* + * Check hardware address size. + */ + if (!net->mode) { + efi_st_error("Mode not provided\n"); + return EFI_ST_FAILURE; + } + if (net->mode->hwaddr_size != ARP_HLEN) { + efi_st_error("HwAddressSize = %u, expected %u\n", + net->mode->hwaddr_size, ARP_HLEN); + return EFI_ST_FAILURE; + } + /* + * Check that WaitForPacket event exists. + */ + if (!net->wait_for_packet) { + efi_st_error("WaitForPacket event missing\n"); + return EFI_ST_FAILURE; + } + /* + * Initialize network adapter. + */ + ret = net->initialize(net, 0, 0); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to initialize network adapter\n"); + return EFI_ST_FAILURE; + } + /* + * Start network adapter. + */ + ret = net->start(net); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to start network adapter\n"); + return EFI_ST_FAILURE; + } + return EFI_ST_SUCCESS; +} + +/* + * Execute unit test. + * + * A DHCP discover message is sent. The test is successful if a + * DHCP reply is received within 10 seconds. + * + * @return: EFI_ST_SUCCESS for success + */ +static int execute(void) +{ + efi_status_t ret; + struct efi_event *events[2]; + size_t index; + union { + struct dhcp p; + u8 b[PKTSIZE]; + } buffer; + struct efi_mac_address srcaddr; + struct efi_mac_address destaddr; + size_t buffer_size; + u8 *addr; + /* + * The timeout is to occur after 10 s. + */ + unsigned int timeout = 10; + + /* Setup may have failed */ + if (!net || !timer) { + efi_st_error("Cannot execute test after setup failure\n"); + return EFI_ST_FAILURE; + } + + /* + * Send DHCP discover message + */ + ret = send_dhcp_discover(); + if (ret != EFI_SUCCESS) + return EFI_ST_FAILURE; + + /* + * If we would call WaitForEvent only with the WaitForPacket event, + * our code would block until a packet is received which might never + * occur. By calling WaitFor event with both a timer event and the + * WaitForPacket event we can escape this blocking situation. + * + * If the timer event occurs before we have received a DHCP reply + * a further DHCP discover message is sent. + */ + events[0] = timer; + events[1] = net->wait_for_packet; + for (;;) { + /* + * Wait for packet to be received or timer event. + */ + boottime->wait_for_event(2, events, &index); + if (index == 0) { + /* + * The timer event occurred. Check for timeout. + */ + --timeout; + if (!timeout) { + efi_st_error("Timeout occurred\n"); + return EFI_ST_FAILURE; + } + /* + * Send further DHCP discover message + */ + ret = send_dhcp_discover(); + if (ret != EFI_SUCCESS) + return EFI_ST_FAILURE; + continue; + } + /* + * Receive packet + */ + buffer_size = sizeof(buffer); + net->receive(net, NULL, &buffer_size, &buffer, + &srcaddr, &destaddr, NULL); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to receive packet"); + return EFI_ST_FAILURE; + } + /* + * Check the packet is meant for this system. + * Unfortunately QEMU ignores the broadcast flag. + * So we have to check for broadcasts too. + */ + if (efi_st_memcmp(&destaddr, &net->mode->current_address, + ARP_HLEN) && + efi_st_memcmp(&destaddr, BROADCAST_MAC, ARP_HLEN)) + continue; + /* + * Check this is a DHCP reply + */ + if (buffer.p.eth_hdr.et_protlen != ntohs(PROT_IP) || + buffer.p.ip_udp.ip_hl_v != 0x45 || + buffer.p.ip_udp.ip_p != IPPROTO_UDP || + buffer.p.ip_udp.udp_src != ntohs(67) || + buffer.p.ip_udp.udp_dst != ntohs(68) || + buffer.p.dhcp_hdr.op != BOOTREPLY) + continue; + /* + * We successfully received a DHCP reply. + */ + break; + } + + /* + * Write a log message. + */ + addr = (u8 *)&buffer.p.ip_udp.ip_src; + efi_st_printf("DHCP reply received from %u.%u.%u.%u (%pm) ", + addr[0], addr[1], addr[2], addr[3], &srcaddr); + if (!efi_st_memcmp(&destaddr, BROADCAST_MAC, ARP_HLEN)) + efi_st_printf("as broadcast message.\n"); + else + efi_st_printf("as unicast message.\n"); + + return EFI_ST_SUCCESS; +} + +/* + * Tear down unit test. + * + * Close the timer event created in setup. + * Shut down the network adapter. + * + * @return: EFI_ST_SUCCESS for success + */ +static int teardown(void) +{ + efi_status_t ret; + int exit_status = EFI_ST_SUCCESS; + + if (timer) { + /* + * Stop timer. + */ + ret = boottime->set_timer(timer, EFI_TIMER_STOP, 0); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to stop timer"); + exit_status = EFI_ST_FAILURE; + } + /* + * Close timer event. + */ + ret = boottime->close_event(timer); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to close event"); + exit_status = EFI_ST_FAILURE; + } + } + if (net) { + /* + * Stop network adapter. + */ + ret = net->stop(net); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to stop network adapter\n"); + exit_status = EFI_ST_FAILURE; + } + /* + * Shut down network adapter. + */ + ret = net->shutdown(net); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to shut down network adapter\n"); + exit_status = EFI_ST_FAILURE; + } + } + + return exit_status; +} + +EFI_UNIT_TEST(snp) = { + .name = "simple network protocol", + .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT, + .setup = setup, + .execute = execute, + .teardown = teardown, +}; diff --git a/lib/efi_selftest/efi_selftest_tpl.c b/lib/efi_selftest/efi_selftest_tpl.c new file mode 100644 index 0000000000..ddb67ed268 --- /dev/null +++ b/lib/efi_selftest/efi_selftest_tpl.c @@ -0,0 +1,224 @@ +/* + * efi_selftest_events + * + * Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * This unit test uses timer events to check the handling of + * task priority levels. + */ + +#include <efi_selftest.h> + +static struct efi_event *event_notify; +static struct efi_event *event_wait; +static unsigned int notification_count; +static struct efi_boot_services *boottime; + +/* + * Notification function, increments the notification count. + * + * @event notified event + * @context pointer to the notification count + */ +static void EFIAPI notify(struct efi_event *event, void *context) +{ + unsigned int *count = context; + + if (count) + ++*count; +} + +/* + * Setup unit test. + * + * Create two timer events. + * One with EVT_NOTIFY_SIGNAL, the other with EVT_NOTIFY_WAIT. + * + * @handle: handle of the loaded image + * @systable: system table + * @return: EFI_ST_SUCCESS for success + */ +static int setup(const efi_handle_t handle, + const struct efi_system_table *systable) +{ + efi_status_t ret; + + boottime = systable->boottime; + + ret = boottime->create_event(EVT_TIMER | EVT_NOTIFY_SIGNAL, + TPL_CALLBACK, notify, + (void *)¬ification_count, + &event_notify); + if (ret != EFI_SUCCESS) { + efi_st_error("could not create event\n"); + return EFI_ST_FAILURE; + } + ret = boottime->create_event(EVT_TIMER | EVT_NOTIFY_WAIT, + TPL_HIGH_LEVEL, notify, NULL, &event_wait); + if (ret != EFI_SUCCESS) { + efi_st_error("could not create event\n"); + return EFI_ST_FAILURE; + } + return EFI_ST_SUCCESS; +} + +/* + * Tear down unit test. + * + * Close the events created in setup. + * + * @return: EFI_ST_SUCCESS for success + */ +static int teardown(void) +{ + efi_status_t ret; + + if (event_notify) { + ret = boottime->close_event(event_notify); + event_notify = NULL; + if (ret != EFI_SUCCESS) { + efi_st_error("could not close event\n"); + return EFI_ST_FAILURE; + } + } + if (event_wait) { + ret = boottime->close_event(event_wait); + event_wait = NULL; + if (ret != EFI_SUCCESS) { + efi_st_error("could not close event\n"); + return EFI_ST_FAILURE; + } + } + boottime->restore_tpl(TPL_APPLICATION); + return EFI_ST_SUCCESS; +} + +/* + * Execute unit test. + * + * Run a 10 ms periodic timer and check that it is called 10 times + * while waiting for 100 ms single shot timer. + * + * Raise the TPL level to the level of the 10 ms timer and observe + * that the notification function is not called again. + * + * Lower the TPL level and check that the queued notification + * function is called. + * + * @return: EFI_ST_SUCCESS for success + */ +static int execute(void) +{ + size_t index; + efi_status_t ret; + UINTN old_tpl; + + /* Set 10 ms timer */ + notification_count = 0; + ret = boottime->set_timer(event_notify, EFI_TIMER_PERIODIC, 100000); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + /* Set 100 ms timer */ + ret = boottime->set_timer(event_wait, EFI_TIMER_RELATIVE, 1000000); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + index = 5; + ret = boottime->wait_for_event(1, &event_wait, &index); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not wait for event\n"); + return EFI_ST_FAILURE; + } + ret = boottime->check_event(event_wait); + if (ret != EFI_NOT_READY) { + efi_st_error("Signaled state was not cleared.\n"); + efi_st_printf("ret = %u\n", (unsigned int)ret); + return EFI_ST_FAILURE; + } + if (index != 0) { + efi_st_error("WaitForEvent returned wrong index\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("Notification count with TPL level TPL_APPLICATION: %u\n", + notification_count); + if (notification_count < 8 || notification_count > 12) { + efi_st_error("Incorrect timing of events\n"); + return EFI_ST_FAILURE; + } + ret = boottime->set_timer(event_notify, EFI_TIMER_STOP, 0); + if (index != 0) { + efi_st_error("Could not cancel timer\n"); + return EFI_ST_FAILURE; + } + /* Raise TPL level */ + old_tpl = boottime->raise_tpl(TPL_CALLBACK); + if (old_tpl != TPL_APPLICATION) { + efi_st_error("Initial TPL level was not TPL_APPLICATION"); + return EFI_ST_FAILURE; + } + /* Set 10 ms timer */ + notification_count = 0; + ret = boottime->set_timer(event_notify, EFI_TIMER_PERIODIC, 100000); + if (index != 0) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + /* Set 100 ms timer */ + ret = boottime->set_timer(event_wait, EFI_TIMER_RELATIVE, 1000000); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + do { + ret = boottime->check_event(event_wait); + } while (ret == EFI_NOT_READY); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not check event\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("Notification count with TPL level TPL_CALLBACK: %u\n", + notification_count); + if (notification_count != 0) { + efi_st_error("Suppressed timer fired\n"); + return EFI_ST_FAILURE; + } + /* Set 1 ms timer */ + ret = boottime->set_timer(event_wait, EFI_TIMER_RELATIVE, 1000); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not set timer\n"); + return EFI_ST_FAILURE; + } + /* Restore the old TPL level */ + boottime->restore_tpl(TPL_APPLICATION); + ret = boottime->wait_for_event(1, &event_wait, &index); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not wait for event\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("Notification count with TPL level TPL_APPLICATION: %u\n", + notification_count); + if (notification_count < 1) { + efi_st_error("Queued timer event did not fire\n"); + return EFI_ST_FAILURE; + } + ret = boottime->set_timer(event_wait, EFI_TIMER_STOP, 0); + if (ret != EFI_SUCCESS) { + efi_st_error("Could not cancel timer\n"); + return EFI_ST_FAILURE; + } + + return EFI_ST_SUCCESS; +} + +EFI_UNIT_TEST(tpl) = { + .name = "task priority levels", + .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT, + .setup = setup, + .execute = execute, + .teardown = teardown, +}; diff --git a/lib/efi_selftest/efi_selftest_util.c b/lib/efi_selftest/efi_selftest_util.c new file mode 100644 index 0000000000..5cffe383d8 --- /dev/null +++ b/lib/efi_selftest/efi_selftest_util.c @@ -0,0 +1,25 @@ +/* + * efi_selftest_util + * + * Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Utility functions + */ + +#include <efi_selftest.h> + +int efi_st_memcmp(const void *buf1, const void *buf2, size_t length) +{ + const u8 *pos1 = buf1; + const u8 *pos2 = buf2; + + for (; length; --length) { + if (*pos1 != *pos2) + return *pos1 - *pos2; + ++pos1; + ++pos2; + } + return EFI_ST_SUCCESS; +} diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 107a892e79..45f3fe7baf 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -4,17 +4,18 @@ */ #ifndef USE_HOSTCC -#include <boot_fit.h> #include <common.h> +#include <boot_fit.h> #include <dm.h> +#include <dm/of_extra.h> #include <errno.h> -#include <serial.h> -#include <libfdt.h> -#include <fdt_support.h> #include <fdtdec.h> +#include <fdt_support.h> +#include <libfdt.h> +#include <serial.h> #include <asm/sections.h> -#include <dm/of_extra.h> #include <linux/ctype.h> +#include <linux/lzo.h> DECLARE_GLOBAL_DATA_PTR; @@ -1203,9 +1204,66 @@ int fdtdec_setup_memory_banksize(void) } #endif +#if CONFIG_IS_ENABLED(MULTI_DTB_FIT) +# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\ + CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO) +static int uncompress_blob(const void *src, ulong sz_src, void **dstp) +{ + size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ; + ulong sz_in = sz_src; + void *dst; + int rc; + + if (CONFIG_IS_ENABLED(GZIP)) + if (gzip_parse_header(src, sz_in) < 0) + return -1; + if (CONFIG_IS_ENABLED(LZO)) + if (!lzop_is_valid_header(src)) + return -EBADMSG; + + if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) { + dst = malloc(sz_out); + if (!dst) { + puts("uncompress_blob: Unable to allocate memory\n"); + return -ENOMEM; + } + } else { +# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA) + dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR); +# else + return -ENOTSUPP; +# endif + } + + if (CONFIG_IS_ENABLED(GZIP)) + rc = gunzip(dst, sz_out, (u8 *)src, &sz_in); + else if (CONFIG_IS_ENABLED(LZO)) + rc = lzop_decompress(src, sz_in, dst, &sz_out); + + if (rc < 0) { + /* not a valid compressed blob */ + puts("uncompress_blob: Unable to uncompress\n"); + if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) + free(dst); + return -EBADMSG; + } + *dstp = dst; + return 0; +} +# else +static int uncompress_blob(const void *src, ulong sz_src, void **dstp) +{ + return -ENOTSUPP; +} +# endif +#endif + int fdtdec_setup(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) +# if CONFIG_IS_ENABLED(MULTI_DTB_FIT) + void *fdt_blob; +# endif # ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ gd->fdt_blob = __dtb_dt_begin; @@ -1216,15 +1274,6 @@ int fdtdec_setup(void) gd->fdt_blob = (ulong *)&_image_binary_end; else gd->fdt_blob = (ulong *)&__bss_end; - -# elif defined CONFIG_FIT_EMBED - gd->fdt_blob = locate_dtb_in_fit(&_end); - - if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) { - puts("Failed to find proper dtb in embedded FIT Image\n"); - return -1; - } - # else /* FDT is at end of image */ gd->fdt_blob = (ulong *)&_end; @@ -1243,7 +1292,27 @@ int fdtdec_setup(void) gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16, (uintptr_t)gd->fdt_blob); # endif + +# if CONFIG_IS_ENABLED(MULTI_DTB_FIT) + /* + * Try and uncompress the blob. + * Unfortunately there is no way to know how big the input blob really + * is. So let us set the maximum input size arbitrarily high. 16MB + * ought to be more than enough for packed DTBs. + */ + if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0) + gd->fdt_blob = fdt_blob; + + /* + * Check if blob is a FIT images containings DTBs. + * If so, pick the most relevant + */ + fdt_blob = locate_dtb_in_fit(gd->fdt_blob); + if (fdt_blob) + gd->fdt_blob = fdt_blob; +# endif #endif + return fdtdec_prepare_fdt(); } diff --git a/lib/gunzip.c b/lib/gunzip.c index 832b3064e7..adb86c7550 100644 --- a/lib/gunzip.c +++ b/lib/gunzip.c @@ -42,7 +42,7 @@ void gzfree(void *x, void *addr, unsigned nb) free (addr); } -int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) +int gzip_parse_header(const unsigned char *src, unsigned long len) { int i, flags; @@ -63,12 +63,21 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) ; if ((flags & HEAD_CRC) != 0) i += 2; - if (i >= *lenp) { + if (i >= len) { puts ("Error: gunzip out of data in header\n"); return (-1); } + return i; +} + +int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) +{ + int offset = gzip_parse_header(src, *lenp); + + if (offset < 0) + return offset; - return zunzip(dst, dstlen, src, lenp, 1, i); + return zunzip(dst, dstlen, src, lenp, 1, offset); } #ifdef CONFIG_CMD_UNZIP diff --git a/lib/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c index ccc90b8ee5..65fef0b0eb 100644 --- a/lib/lzo/lzo1x_decompress.c +++ b/lib/lzo/lzo1x_decompress.c @@ -30,16 +30,29 @@ static const unsigned char lzop_magic[] = { #define HEADER_HAS_FILTER 0x00000800L -static inline const unsigned char *parse_header(const unsigned char *src) + +bool lzop_is_valid_header(const unsigned char *src) { - u16 version; int i; - /* read magic: 9 first bytes */ for (i = 0; i < ARRAY_SIZE(lzop_magic); i++) { if (*src++ != lzop_magic[i]) - return NULL; + return false; } + return true; +} + +static inline const unsigned char *parse_header(const unsigned char *src) +{ + u16 version; + int i; + + if (!lzop_is_valid_header(src)) + return NULL; + + /* skip header */ + src += 9; + /* get version (2bytes), skip library version (2), * 'need to be extracted' version (2) and * method (1) */ diff --git a/scripts/Kconfig b/scripts/Kconfig deleted file mode 100644 index 2a2c18e96e..0000000000 --- a/scripts/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -config BUILD_BIN2C - bool diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 2a7ed70cf2..0d5c5291a1 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -175,7 +175,7 @@ u_boot_dtsi_options = $(wildcard $(dir $<)$(basename $(notdir $<))-u-boot.dtsi) # $(warning u_boot_dtsi_options: $(u_boot_dtsi_options)) # We use the first match -u_boot_dtsi = $(firstword $(u_boot_dtsi_options)) +u_boot_dtsi = $(notdir $(firstword $(u_boot_dtsi_options))) # Modified for U-Boot dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc \ @@ -308,9 +308,8 @@ quiet_cmd_dtc = DTC $@ # Modified for U-Boot # Bring in any U-Boot-specific include at the end of the file cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ - cat $< $(if $(u_boot_dtsi),\ - | sed "$$ a\#include \"$(u_boot_dtsi)\"") | \ - $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \ + (cat $<; $(if $(u_boot_dtsi),echo '\#include "$(u_boot_dtsi)"')) > $(pre-tmp); \ + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \ $(DTC) -O dtb -o $@ -b 0 \ -i $(dir $<) $(DTC_FLAGS) \ -d $(depfile).dtc.tmp $(dtc-tmp) ; \ @@ -319,6 +318,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ $(obj)/%.dtb: $(src)/%.dts FORCE $(call if_changed_dep,dtc) +pre-tmp = $(subst $(comma),_,$(dot-target).pre.tmp) dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp) # DTCO @@ -359,20 +359,22 @@ cmd_S_ttf= \ $(obj)/%.S: $(src)/%.ttf $(call cmd,S_ttf) -# EFI Hello World application +# EFI applications +# A Makefile target *.efi is built as EFI application. +# A Makefile target *_efi.S wraps *.efi as built-in EFI application. # --------------------------------------------------------------------------- # Generate an assembly file to wrap the EFI app -cmd_S_efi= \ -( \ - echo '.section .rodata.efi.init,"a"'; \ - echo '.balign 16'; \ - echo '.global __efi_hello_world_begin'; \ - echo '__efi_hello_world_begin:'; \ - echo '.incbin "$<" '; \ - echo '__efi_hello_world_end:'; \ - echo '.global __efi_hello_world_end'; \ - echo '.balign 16'; \ +cmd_S_efi= \ +( \ + echo '.section .rodata.$*.init,"a"'; \ + echo '.balign 16'; \ + echo '.global __efi_$*_begin'; \ + echo '__efi_$*_begin:'; \ + echo '.incbin "$<" '; \ + echo '__efi_$*_end:'; \ + echo '.global __efi_$*_end'; \ + echo '.balign 16'; \ ) > $@ $(obj)/%_efi.S: $(obj)/%.efi @@ -383,7 +385,7 @@ cmd_efi_objcopy = $(OBJCOPY) -j .header -j .text -j .sdata -j .data -j \ .dynamic -j .dynsym -j .rel* -j .rela* -j .reloc \ $(if $(EFI_TARGET),$(EFI_TARGET),-O binary) $^ $@ -$(obj)/%.efi: $(obj)/%.so +$(obj)/%.efi: $(obj)/%_efi.so $(call cmd,efi_objcopy) quiet_cmd_efi_ld = LD $@ @@ -392,9 +394,7 @@ cmd_efi_ld = $(LD) -nostdlib -znocombreloc -T $(EFI_LDS_PATH) -shared \ EFI_LDS_PATH = $(srctree)/arch/$(ARCH)/lib/$(EFI_LDS) -$(obj)/helloworld.so: $(EFI_LDS_PATH) - -$(obj)/helloworld.so: $(obj)/helloworld.o arch/$(ARCH)/lib/$(EFI_CRT0) \ +$(obj)/%_efi.so: $(obj)/%.o arch/$(ARCH)/lib/$(EFI_CRT0) \ arch/$(ARCH)/lib/$(EFI_RELOC) $(call cmd,efi_ld) diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index b86ea76bab..49b27ac926 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -209,10 +209,21 @@ cmd_cat = cat $(filter-out $(PHONY), $^) > $@ quiet_cmd_copy = COPY $@ cmd_copy = cp $< $@ +ifneq ($(CONFIG_SPL_MULTI_DTB_FIT),y) +FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).dtb +else ifeq ($(CONFIG_SPL_MULTI_DTB_FIT_LZO),y) +FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit.lzo +else ifeq ($(CONFIG_SPL_MULTI_DTB_FIT_GZIP),y) +FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit.gz +else +FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit +endif + + ifeq ($(CONFIG_$(SPL_TPL_)OF_CONTROL)$(CONFIG_OF_SEPARATE)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy) $(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \ $(if $(CONFIG_SPL_SEPARATE_BSS),,$(obj)/$(SPL_BIN)-pad.bin) \ - $(obj)/$(SPL_BIN).dtb FORCE + $(FINAL_DTB_CONTAINER) FORCE $(call if_changed,cat) $(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-dtb.bin FORCE @@ -383,6 +394,28 @@ checkdtoc: tools PHONY += FORCE FORCE: +PHONY += dtbs +dtbs: + $(Q)$(MAKE) $(build)=dts dtbs + # Declare the contents of the .PHONY variable as phony. We keep that # information in a variable so we can use it in if_changed and friends. .PHONY: $(PHONY) + +SHRUNK_ARCH_DTB = $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST))) +.SECONDEXPANSION: +$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, arch/$(ARCH)/dts/%, $$@) + $(call if_changed,fdtgrep) + +MKIMAGEFLAGS_$(SPL_BIN).multidtb.fit = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ + -n "Multi DTB fit image for $(SPL_BIN)" -E \ + $(patsubst %,-b %,$(SHRUNK_ARCH_DTB)) + +$(obj)/$(SPL_BIN).multidtb.fit: /dev/null $(SHRUNK_ARCH_DTB) FORCE + $(call if_changed,mkimage) + +$(obj)/$(SPL_BIN).multidtb.fit.gz: $(obj)/$(SPL_BIN).multidtb.fit + @gzip -kf9 $< > $@ + +$(obj)/$(SPL_BIN).multidtb.fit.lzo: $(obj)/$(SPL_BIN).multidtb.fit + @lzop -f9 $< > $@ diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c index 9bd0de2490..da7fb2cd4d 100644 --- a/scripts/basic/fixdep.c +++ b/scripts/basic/fixdep.c @@ -249,10 +249,17 @@ static void parse_config_file(const char *map, size_t len) if (q - p < 0) continue; - /* U-Boot also handles CONFIG_IS_{ENABLED/BUILTIN/MODULE} */ + /* + * U-Boot also handles + * CONFIG_IS_ENABLED(...) + * CONFIG_IS_BUILTIN(...) + * CONFIG_IS_MODULE(...) + * CONFIG_VAL(...) + */ if ((q - p == 10 && !memcmp(p, "IS_ENABLED(", 11)) || (q - p == 10 && !memcmp(p, "IS_BUILTIN(", 11)) || - (q - p == 9 && !memcmp(p, "IS_MODULE(", 10))) { + (q - p == 9 && !memcmp(p, "IS_MODULE(", 10)) || + (q - p == 3 && !memcmp(p, "VAL(", 4))) { p = q + 1; for (q = p; q < map + len; q++) if (*q == ')') diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 56bb639091..3037d6125b 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -73,7 +73,6 @@ CONFIG_ARMADA100 CONFIG_ARMADA100_FEC CONFIG_ARMADA168 CONFIG_ARMADA_39X -CONFIG_ARMCORTEXA9 CONFIG_ARMV7_PSCI_1_0 CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_MAX_SIZE @@ -95,32 +94,20 @@ CONFIG_ASTRO_V512 CONFIG_ASTRO_V532 CONFIG_ASTRO_V912 CONFIG_AT91C_PQFP_UHPBUG -CONFIG_AT91FAMILY CONFIG_AT91RESET_EXTRST CONFIG_AT91RM9200 CONFIG_AT91RM9200EK -CONFIG_AT91SAM9260 CONFIG_AT91SAM9260EK -CONFIG_AT91SAM9261 CONFIG_AT91SAM9261EK -CONFIG_AT91SAM9263 CONFIG_AT91SAM9263EK CONFIG_AT91SAM9G10 CONFIG_AT91SAM9G10EK -CONFIG_AT91SAM9G20 CONFIG_AT91SAM9G20EK CONFIG_AT91SAM9G20EK_2MMC -CONFIG_AT91SAM9G45 CONFIG_AT91SAM9G45EKES CONFIG_AT91SAM9G45_LCD_BASE -CONFIG_AT91SAM9M10G45 CONFIG_AT91SAM9M10G45EK -CONFIG_AT91SAM9N12 -CONFIG_AT91SAM9RL CONFIG_AT91SAM9RLEK -CONFIG_AT91SAM9X5 -CONFIG_AT91SAM9X5EK -CONFIG_AT91SAM9XE CONFIG_AT91SAM9_WATCHDOG CONFIG_AT91_CAN CONFIG_AT91_EFLASH @@ -876,7 +863,6 @@ CONFIG_G_DNL_UMS_VENDOR_NUM CONFIG_H264_FREQ CONFIG_H8300 CONFIG_HARD_SPI -CONFIG_HAS_DATAFLASH CONFIG_HAS_ETH0 CONFIG_HAS_ETH1 CONFIG_HAS_ETH2 @@ -1497,7 +1483,6 @@ CONFIG_MVEBU_MMC CONFIG_MVGBE CONFIG_MVGBE_PORTS CONFIG_MVMFP_V2 -CONFIG_MVNETA CONFIG_MVS CONFIG_MVSATA_IDE CONFIG_MVSATA_IDE_USE_PORT0 @@ -1848,7 +1833,6 @@ CONFIG_RAMDISK_ADDR CONFIG_RAMDISK_BOOT CONFIG_RAM_BOOT CONFIG_RAM_BOOT_PHYS -CONFIG_RANDOM_UUID CONFIG_RCAR_BOARD_STRING CONFIG_RD_LVL CONFIG_REALMODE_DEBUG @@ -1939,10 +1923,7 @@ CONFIG_S5P_PA_SYSRAM CONFIG_S6E63D6 CONFIG_S6E8AX0 CONFIG_SABRELITE -CONFIG_SAMA5D2 -CONFIG_SAMA5D3 CONFIG_SAMA5D3_LCD_BASE -CONFIG_SAMA5D4 CONFIG_SAMSUNG CONFIG_SAMSUNG_ONENAND CONFIG_SANDBOX_ARCH @@ -2612,9 +2593,6 @@ CONFIG_SYS_DA850_PLL1_PLLDIV3 CONFIG_SYS_DA850_PLL1_PLLM CONFIG_SYS_DA850_PLL1_POSTDIV CONFIG_SYS_DA850_SYSCFG_SUSPSRC -CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 -CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2 -CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT CONFIG_SYS_DAVINCI_I2C_SLAVE CONFIG_SYS_DAVINCI_I2C_SLAVE1 @@ -3724,7 +3702,6 @@ CONFIG_SYS_MATRIX_EBI0CSA_VAL CONFIG_SYS_MATRIX_EBICSA_VAL CONFIG_SYS_MATRIX_MCFG_REMAP CONFIG_SYS_MAXARGS -CONFIG_SYS_MAX_DATAFLASH_BANKS CONFIG_SYS_MAX_DDR_BAT_SIZE CONFIG_SYS_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT @@ -3789,7 +3766,6 @@ CONFIG_SYS_MMC_CD_PIN CONFIG_SYS_MMC_CLK_OD CONFIG_SYS_MMC_ENV_DEV CONFIG_SYS_MMC_ENV_PART -CONFIG_SYS_MMC_IMG_LOAD_PART CONFIG_SYS_MMC_MAX_BLK_COUNT CONFIG_SYS_MMC_MAX_DEVICE CONFIG_SYS_MMC_U_BOOT_DST @@ -4785,7 +4761,6 @@ CONFIG_SYS_USE_NANDFLASH CONFIG_SYS_USE_NOR CONFIG_SYS_USE_NORFLASH CONFIG_SYS_USE_SERIALFLASH -CONFIG_SYS_USE_SPIFLASH CONFIG_SYS_USR_EXCEP CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR @@ -4974,8 +4949,6 @@ CONFIG_USBD_SERIAL_OUT_PKTSIZE CONFIG_USBD_VENDORID CONFIG_USBID_ADDR CONFIG_USBNET_DEV_ADDR -CONFIG_USBNET_HOST_ADDR -CONFIG_USBNET_MANUFACTURER CONFIG_USBTTY CONFIG_USB_AM35X CONFIG_USB_ATMEL @@ -5005,10 +4978,7 @@ CONFIG_USB_EHCI_TEGRA CONFIG_USB_EHCI_TXFIFO_THRESH CONFIG_USB_EHCI_VCT CONFIG_USB_EHCI_VF -CONFIG_USB_ETHER -CONFIG_USB_ETH_CDC CONFIG_USB_ETH_QMULT -CONFIG_USB_ETH_RNDIS CONFIG_USB_ETH_SUBSET CONFIG_USB_EXT2_BOOT CONFIG_USB_FAT_BOOT diff --git a/scripts/dtc/.gitignore b/scripts/dtc/.gitignore new file mode 100644 index 0000000000..d807c081a2 --- /dev/null +++ b/scripts/dtc/.gitignore @@ -0,0 +1,4 @@ +/dtc +/dtc-lexer.lex.c +/dtc-parser.tab.c +/dtc-parser.tab.h diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl index 83a4e5bad2..8b6037b73f 100755 --- a/scripts/get_maintainer.pl +++ b/scripts/get_maintainer.pl @@ -1,4 +1,4 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # (c) 2007, Joe Perches <joe@perches.com> # created from checkpatch.pl # @@ -10,18 +10,22 @@ # # Licensed under the terms of the GNU GPL License version 2 +use warnings; use strict; my $P = $0; my $V = '0.26'; use Getopt::Long qw(:config no_auto_abbrev); +use Cwd; use File::Find; +my $cur_path = fastgetcwd() . '/'; my $lk_path = "./"; my $email = 1; my $email_usename = 1; my $email_maintainer = 1; +my $email_reviewer = 1; my $email_list = 1; my $email_subscriber_list = 0; my $email_git_penguin_chiefs = 0; @@ -42,10 +46,12 @@ my $output_multiline = 1; my $output_separator = ", "; my $output_roles = 0; my $output_rolestats = 1; +my $output_section_maxlen = 50; my $scm = 0; my $web = 0; my $subsystem = 0; my $status = 0; +my $letters = ""; my $keywords = 1; my $sections = 0; my $file_emails = 0; @@ -53,6 +59,7 @@ my $from_filename = 0; my $pattern_depth = 0; my $version = 0; my $help = 0; +my $find_maintainer_files = 0; my $vcs_used = 0; @@ -128,6 +135,7 @@ my %VCS_cmds_git = ( "author_pattern" => "^GitAuthor: (.*)", "subject_pattern" => "^GitSubject: (.*)", "stat_pattern" => "^(\\d+)\\t(\\d+)\\t\$file\$", + "file_exists_cmd" => "git ls-files \$file", ); my %VCS_cmds_hg = ( @@ -156,6 +164,7 @@ my %VCS_cmds_hg = ( "author_pattern" => "^HgAuthor: (.*)", "subject_pattern" => "^HgSubject: (.*)", "stat_pattern" => "^(\\d+)\t(\\d+)\t\$file\$", + "file_exists_cmd" => "hg files \$file", ); my $conf = which_conf(".get_maintainer.conf"); @@ -184,6 +193,27 @@ if (-f $conf) { unshift(@ARGV, @conf_args) if @conf_args; } +my @ignore_emails = (); +my $ignore_file = which_conf(".get_maintainer.ignore"); +if (-f $ignore_file) { + open(my $ignore, '<', "$ignore_file") + or warn "$P: Can't find a readable .get_maintainer.ignore file $!\n"; + while (<$ignore>) { + my $line = $_; + + $line =~ s/\s*\n?$//; + $line =~ s/^\s*//; + $line =~ s/\s+$//; + $line =~ s/#.*$//; + + next if ($line =~ m/^\s*$/); + if (rfc822_valid($line)) { + push(@ignore_emails, $line); + } + } + close($ignore); +} + if (!GetOptions( 'email!' => \$email, 'git!' => \$email_git, @@ -201,6 +231,7 @@ if (!GetOptions( 'remove-duplicates!' => \$email_remove_duplicates, 'mailmap!' => \$email_use_mailmap, 'm!' => \$email_maintainer, + 'r!' => \$email_reviewer, 'n!' => \$email_usename, 'l!' => \$email_list, 's!' => \$email_subscriber_list, @@ -212,11 +243,13 @@ if (!GetOptions( 'status!' => \$status, 'scm!' => \$scm, 'web!' => \$web, + 'letters=s' => \$letters, 'pattern-depth=i' => \$pattern_depth, 'k|keywords!' => \$keywords, 'sections!' => \$sections, 'fe|file-emails!' => \$file_emails, 'f|file' => \$from_filename, + 'find-maintainer-files' => \$find_maintainer_files, 'v|version' => \$version, 'h|help|usage' => \$help, )) { @@ -242,7 +275,8 @@ $output_multiline = 0 if ($output_separator ne ", "); $output_rolestats = 1 if ($interactive); $output_roles = 1 if ($output_rolestats); -if ($sections) { +if ($sections || $letters ne "") { + $sections = 1; $email = 0; $email_list = 0; $scm = 0; @@ -259,42 +293,28 @@ if ($sections) { } if ($email && - ($email_maintainer + $email_list + $email_subscriber_list + + ($email_maintainer + $email_reviewer + + $email_list + $email_subscriber_list + $email_git + $email_git_penguin_chiefs + $email_git_blame) == 0) { die "$P: Please select at least 1 email option\n"; } if (!top_of_kernel_tree($lk_path)) { die "$P: The current directory does not appear to be " - . "a linux kernel source tree.\n"; + . "a U-Boot source tree.\n"; } ## Read MAINTAINERS for type/value pairs my @typevalue = (); my %keyword_hash; +my @mfiles = (); -my @maint_files = (); -push(@maint_files, "${lk_path}MAINTAINERS"); - -sub maint_wanted { - return unless $_ =~ /^MAINTAINERS/; - push(@maint_files, "$File::Find::name"); -} - -File::Find::find(\&maint_wanted, "${lk_path}board"); - -foreach my $maint_file (@maint_files) { - my $maint; - open ($maint, '<', "$maint_file") - or die "$P: Can't open $maint_file: $!\n"; - read_maintainers($maint); - close($maint); -} - -sub read_maintainers { - my ($maint) = @_; +sub read_maintainer_file { + my ($file) = @_; + open (my $maint, '<', "$file") + or die "$P: Can't open MAINTAINERS file '$file': $!\n"; while (<$maint>) { my $line = $_; @@ -315,13 +335,47 @@ sub read_maintainers { $keyword_hash{@typevalue} = $value; } push(@typevalue, "$type:$value"); - } elsif (!/^(\s)*$/) { + } elsif (!(/^\s*$/ || /^\s*\#/)) { $line =~ s/\n$//g; push(@typevalue, $line); } } + close($maint); +} + +sub find_is_maintainer_file { + my ($file) = $_; + return if ($file !~ m@/MAINTAINERS$@); + $file = $File::Find::name; + return if (! -f $file); + push(@mfiles, $file); +} + +sub find_ignore_git { + return grep { $_ !~ /^\.git$/; } @_; +} + +if (-d "${lk_path}MAINTAINERS") { + opendir(DIR, "${lk_path}MAINTAINERS") or die $!; + my @files = readdir(DIR); + closedir(DIR); + foreach my $file (@files) { + push(@mfiles, "${lk_path}MAINTAINERS/$file") if ($file !~ /^\./); + } } +if ($find_maintainer_files) { + find( { wanted => \&find_is_maintainer_file, + preprocess => \&find_ignore_git, + no_chdir => 1, + }, "${lk_path}"); +} else { + push(@mfiles, "${lk_path}MAINTAINERS") if -f "${lk_path}MAINTAINERS"; +} + +foreach my $file (@mfiles) { + read_maintainer_file("$file"); +} # # Read mail address map @@ -421,7 +475,9 @@ foreach my $file (@ARGV) { die "$P: file '${file}' not found\n"; } } - if ($from_filename) { + if ($from_filename || ($file ne "&STDIN" && vcs_file_exists($file))) { + $file =~ s/^\Q${cur_path}\E//; #strip any absolute path + $file =~ s/^\Q${lk_path}\E//; #or the path to the lk tree push(@files, $file); if ($file ne "MAINTAINERS" && -f $file && ($keywords || $file_emails)) { open(my $f, '<', $file) @@ -528,6 +584,16 @@ if ($web) { exit($exit); +sub ignore_email_address { + my ($address) = @_; + + foreach my $ignore (@ignore_emails) { + return 1 if ($ignore eq $address); + } + + return 0; +} + sub range_is_maintained { my ($start, $end) = @_; @@ -659,8 +725,10 @@ sub get_maintainers { $line =~ s/\\\./\./g; ##Convert \. to . $line =~ s/\.\*/\*/g; ##Convert .* to * } - $line =~ s/^([A-Z]):/$1:\t/g; - print("$line\n"); + my $count = $line =~ s/^([A-Z]):/$1:\t/g; + if ($letters eq "" || (!$count || $letters =~ /$1/i)) { + print("$line\n"); + } } print("\n"); } @@ -764,10 +832,12 @@ MAINTAINER field selection options: --git-max-maintainers => maximum maintainers to add (default: $email_git_max_maintainers) --git-min-percent => minimum percentage of commits required (default: $email_git_min_percent) --git-blame => use git blame to find modified commits for patch or file + --git-blame-signatures => when used with --git-blame, also include all commit signers --git-since => git history to use (default: $email_git_since) --hg-since => hg history to use (default: $email_hg_since) --interactive => display a menu (mostly useful if used with the --git option) --m => include maintainer(s) if any + --r => include reviewer(s) if any --n => include name 'Full Name <addr\@domain.tld>' --l => include list(s) if any --s => include subscriber only list(s) if any @@ -789,12 +859,13 @@ Other options: --pattern-depth => Number of pattern directory traversals (default: 0 (all)) --keywords => scan patch for keywords (default: $keywords) --sections => print all of the subsystem sections with pattern matches + --letters => print all matching 'letter' types from all matching sections --mailmap => use .mailmap file (default: $email_use_mailmap) --version => show version --help => show this help information Default options: - [--email --nogit --git-fallback --m --n --l --multiline -pattern-depth=0 + [--email --nogit --git-fallback --m --r --n --l --multiline --pattern-depth=0 --remove-duplicates --rolestats] Notes: @@ -826,6 +897,9 @@ Notes: Entries in this file can be any command line argument. This file is prepended to any additional command line arguments. Multiple lines and # comments are allowed. + Most options have both positive and negative forms. + The negative forms for --<foo> are --no<foo> and --no-<foo>. + EOT } @@ -836,7 +910,7 @@ sub top_of_kernel_tree { $lk_path .= "/"; } if ( (-f "${lk_path}Kbuild") - && (-f "${lk_path}MAINTAINERS") + && (-e "${lk_path}MAINTAINERS") && (-f "${lk_path}Makefile") && (-f "${lk_path}README") && (-d "${lk_path}arch") @@ -954,20 +1028,29 @@ sub find_ending_index { return $index; } -sub get_maintainer_role { +sub get_subsystem_name { my ($index) = @_; - my $i; my $start = find_starting_index($index); - my $end = find_ending_index($index); - my $role = "unknown"; my $subsystem = $typevalue[$start]; - if (length($subsystem) > 20) { - $subsystem = substr($subsystem, 0, 17); + if ($output_section_maxlen && length($subsystem) > $output_section_maxlen) { + $subsystem = substr($subsystem, 0, $output_section_maxlen - 3); $subsystem =~ s/\s*$//; $subsystem = $subsystem . "..."; } + return $subsystem; +} + +sub get_maintainer_role { + my ($index) = @_; + + my $i; + my $start = find_starting_index($index); + my $end = find_ending_index($index); + + my $role = "unknown"; + my $subsystem = get_subsystem_name($index); for ($i = $start + 1; $i < $end; $i++) { my $tv = $typevalue[$i]; @@ -1001,16 +1084,7 @@ sub get_maintainer_role { sub get_list_role { my ($index) = @_; - my $i; - my $start = find_starting_index($index); - my $end = find_ending_index($index); - - my $subsystem = $typevalue[$start]; - if (length($subsystem) > 20) { - $subsystem = substr($subsystem, 0, 17); - $subsystem =~ s/\s*$//; - $subsystem = $subsystem . "..."; - } + my $subsystem = get_subsystem_name($index); if ($subsystem eq "THE REST") { $subsystem = ""; @@ -1084,6 +1158,23 @@ sub add_categories { my $role = get_maintainer_role($i); push_email_addresses($pvalue, $role); } + } elsif ($ptype eq "R") { + my ($name, $address) = parse_email($pvalue); + if ($name eq "") { + if ($i > 0) { + my $tv = $typevalue[$i - 1]; + if ($tv =~ m/^([A-Z]):\s*(.*)/) { + if ($1 eq "P") { + $name = $2; + $pvalue = format_email($name, $address, $email_usename); + } + } + } + } + if ($email_reviewer) { + my $subsystem = get_subsystem_name($i); + push_email_addresses($pvalue, "reviewer:$subsystem"); + } } elsif ($ptype eq "T") { push(@scm, $pvalue); } elsif ($ptype eq "W") { @@ -1868,6 +1959,7 @@ sub vcs_assign { my $percent = $sign_offs * 100 / $divisor; $percent = 100 if ($percent > 100); + next if (ignore_email_address($line)); $count++; last if ($sign_offs < $email_git_min_signatures || $count > $email_git_max_maintainers || @@ -2082,6 +2174,24 @@ sub vcs_file_blame { } } +sub vcs_file_exists { + my ($file) = @_; + + my $exists; + + my $vcs_used = vcs_exists(); + return 0 if (!$vcs_used); + + my $cmd = $VCS_cmds{"file_exists_cmd"}; + $cmd =~ s/(\$\w+)/$1/eeg; # interpolate $cmd + $cmd .= " 2>&1"; + $exists = &{$VCS_cmds{"execute_cmd"}}($cmd); + + return 0 if ($? != 0); + + return $exists; +} + sub uniq { my (@parms) = @_; diff --git a/scripts/spelling.txt b/scripts/spelling.txt new file mode 100644 index 0000000000..400ef35169 --- /dev/null +++ b/scripts/spelling.txt @@ -0,0 +1,1217 @@ +# Originally from Debian's Lintian tool. Various false positives have been +# removed, and various additions have been made as they've been discovered +# in the kernel source. +# +# License: GPLv2 +# +# The format of each line is: +# mistake||correction +# +abandonning||abandoning +abigious||ambiguous +abitrate||arbitrate +abov||above +abreviated||abbreviated +absense||absence +absolut||absolute +absoulte||absolute +acccess||access +acceess||access +acceleratoin||acceleration +accelleration||acceleration +accesing||accessing +accesnt||accent +accessable||accessible +accesss||access +accidentaly||accidentally +accidentually||accidentally +accoding||according +accomodate||accommodate +accomodates||accommodates +accordign||according +accoring||according +accout||account +accquire||acquire +accquired||acquired +accross||across +acessable||accessible +acess||access +achitecture||architecture +acient||ancient +acitions||actions +acitve||active +acknowldegement||acknowledgment +acknowledgement||acknowledgment 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+unkmown||unknown +unknonw||unknown +unknow||unknown +unkown||unknown +unneded||unneeded +unneedingly||unnecessarily +unnsupported||unsupported +unmached||unmatched +unregester||unregister +unresgister||unregister +unrgesiter||unregister +unsinged||unsigned +unstabel||unstable +unsolicitied||unsolicited +unsuccessfull||unsuccessful +unsuported||unsupported +untill||until +unuseful||useless +upate||update +usefule||useful +usefull||useful +usege||usage +usera||users +usualy||usually +utilites||utilities +utillities||utilities +utilties||utilities +utiltity||utility +utitity||utility +utitlty||utility +vaid||valid +vaild||valid +valide||valid +variantions||variations +varible||variable +varient||variant +vaule||value +verbse||verbose +verisons||versions +verison||version +verson||version +vicefersa||vice-versa +virtal||virtual +virtaul||virtual +virtiual||virtual +visiters||visitors +vitual||virtual +wakeus||wakeups +wating||waiting +wether||whether +whataver||whatever +whcih||which +whenver||whenever +wheter||whether +whe||when +wierd||weird +wiil||will +wirte||write +withing||within +wnat||want +workarould||workaround +writeing||writing +writting||writing +zombe||zombie +zomebie||zombie diff --git a/test/dm/eth.c b/test/dm/eth.c index 122fab924d..67fd660ee4 100644 --- a/test/dm/eth.c +++ b/test/dm/eth.c @@ -110,6 +110,7 @@ static int dm_test_eth_act(struct unit_test_state *uts) char ethaddr[DM_TEST_ETH_NUM][18]; int i; + memset(ethaddr, '\0', sizeof(ethaddr)); net_ping_ip = string_to_ip("1.1.2.2"); /* Prepare the test scenario */ @@ -119,7 +120,7 @@ static int dm_test_eth_act(struct unit_test_state *uts) ut_assertok(device_remove(dev[i], DM_REMOVE_NORMAL)); /* Invalidate MAC address */ - strcpy(ethaddr[i], env_get(addrname[i])); + strncpy(ethaddr[i], env_get(addrname[i]), 17); /* Must disable access protection for ethaddr before clearing */ env_set(".flags", addrname[i]); env_set(addrname[i], NULL); @@ -187,7 +188,8 @@ static int dm_test_eth_rotate(struct unit_test_state *uts) net_ping_ip = string_to_ip("1.1.2.2"); /* Invalidate eth1's MAC address */ - strcpy(ethaddr, env_get("eth1addr")); + memset(ethaddr, '\0', sizeof(ethaddr)); + strncpy(ethaddr, env_get("eth1addr"), 17); /* Must disable access protection for eth1addr before clearing */ env_set(".flags", "eth1addr"); env_set("eth1addr", NULL); @@ -200,7 +202,7 @@ static int dm_test_eth_rotate(struct unit_test_state *uts) if (!retval) { /* Invalidate eth0's MAC address */ - strcpy(ethaddr, env_get("ethaddr")); + strncpy(ethaddr, env_get("ethaddr"), 17); /* Must disable access protection for ethaddr before clearing */ env_set(".flags", "ethaddr"); env_set("ethaddr", NULL); diff --git a/test/dm/usb.c b/test/dm/usb.c index b46ae60602..4fd249bf64 100644 --- a/test/dm/usb.c +++ b/test/dm/usb.c @@ -99,10 +99,10 @@ static int count_usb_devices(void) return count; } -/* test that we can remove an emulated device and it is then not found */ -static int dm_test_usb_remove(struct unit_test_state *uts) +/* test that no USB devices are found after we stop the stack */ +static int dm_test_usb_stop(struct unit_test_state *uts) { - struct udevice *dev, *emul; + struct udevice *dev; /* Scan and check that all devices are present */ state_set_skip_delays(true); @@ -112,164 +112,11 @@ static int dm_test_usb_remove(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_MASS_STORAGE, 2, &dev)); ut_asserteq(6, count_usb_devices()); ut_assertok(usb_stop()); - ut_asserteq(6, count_usb_devices()); - - /* Remove the second emulation device */ - ut_assertok(uclass_find_device_by_name(UCLASS_USB_EMUL, "flash-stick@1", - &dev)); - ut_assertok(device_unbind(dev)); - - /* Rescan - only the first and third should be present */ - ut_assertok(usb_init()); - ut_assertok(uclass_get_device(UCLASS_MASS_STORAGE, 0, &dev)); - ut_assertok(usb_emul_find_for_dev(dev, &emul)); - ut_asserteq_str("flash-stick@0", emul->name); - ut_assertok(uclass_get_device(UCLASS_MASS_STORAGE, 1, &dev)); - ut_assertok(usb_emul_find_for_dev(dev, &emul)); - ut_asserteq_str("flash-stick@2", emul->name); - - ut_asserteq(-ENODEV, uclass_get_device(UCLASS_MASS_STORAGE, 2, &dev)); - - ut_asserteq(5, count_usb_devices()); - ut_assertok(usb_stop()); - ut_asserteq(5, count_usb_devices()); - - return 0; -} -DM_TEST(dm_test_usb_remove, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); - -const char usb_tree_base[] = -" 1 Hub (12 Mb/s, 100mA)\n" -" | sandbox hub 2345\n" -" |\n" -" |\b+-2 Mass Storage (12 Mb/s, 100mA)\n" -" | sandbox flash flash-stick@0\n" -" | \n" -" |\b+-3 Mass Storage (12 Mb/s, 100mA)\n" -" | sandbox flash flash-stick@1\n" -" | \n" -" |\b+-4 Mass Storage (12 Mb/s, 100mA)\n" -" | sandbox flash flash-stick@2\n" -" | \n" -" |\b+-5 Human Interface (12 Mb/s, 100mA)\n" -" sandbox keyboard keyb@3\n" -" \n"; - -/* test that the 'usb tree' command output looks correct */ -static int dm_test_usb_tree(struct unit_test_state *uts) -{ - char *data; - int len; - - state_set_skip_delays(true); - ut_assertok(usb_init()); - console_record_reset_enable(); - usb_show_tree(); - len = membuff_getraw(&gd->console_out, -1, true, &data); - if (len) - data[len] = '\0'; - ut_asserteq_str(usb_tree_base, data); - ut_assertok(usb_stop()); - - return 0; -} -DM_TEST(dm_test_usb_tree, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); - -const char usb_tree_remove[] = -" 1 Hub (12 Mb/s, 100mA)\n" -" | sandbox hub 2345\n" -" |\n" -" |\b+-2 Mass Storage (12 Mb/s, 100mA)\n" -" | sandbox flash flash-stick@0\n" -" | \n" -" |\b+-3 Mass Storage (12 Mb/s, 100mA)\n" -" | sandbox flash flash-stick@2\n" -" | \n" -" |\b+-4 Human Interface (12 Mb/s, 100mA)\n" -" sandbox keyboard keyb@3\n" -" \n"; - -/* - * test that the 'usb tree' command output looks correct when we remove a - * device - */ -static int dm_test_usb_tree_remove(struct unit_test_state *uts) -{ - struct udevice *dev; - char *data; - int len; - - /* Remove the second emulation device */ - ut_assertok(uclass_find_device_by_name(UCLASS_USB_EMUL, "flash-stick@1", - &dev)); - ut_assertok(device_unbind(dev)); - - state_set_skip_delays(true); - ut_assertok(usb_init()); - console_record_reset_enable(); - usb_show_tree(); - len = membuff_getraw(&gd->console_out, -1, true, &data); - if (len) - data[len] = '\0'; - ut_asserteq_str(usb_tree_remove, data); - ut_assertok(usb_stop()); - - return 0; -} -DM_TEST(dm_test_usb_tree_remove, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); - -const char usb_tree_reorder[] = -" 1 Hub (12 Mb/s, 100mA)\n" -" | sandbox hub 2345\n" -" |\n" -" |\b+-2 Mass Storage (12 Mb/s, 100mA)\n" -" | sandbox flash flash-stick@0\n" -" | \n" -" |\b+-3 Mass Storage (12 Mb/s, 100mA)\n" -" | sandbox flash flash-stick@2\n" -" | \n" -" |\b+-4 Human Interface (12 Mb/s, 100mA)\n" -" | sandbox keyboard keyb@3\n" -" | \n" -" |\b+-5 Mass Storage (12 Mb/s, 100mA)\n" -" sandbox flash flash-stick@1\n" -" \n"; - -/* - * test that the 'usb tree' command output looks correct when we reorder two - * devices. - */ -static int dm_test_usb_tree_reorder(struct unit_test_state *uts) -{ - struct udevice *dev, *parent; - char *data; - int len; - - /* Remove the second emulation device */ - ut_assertok(uclass_find_device_by_name(UCLASS_USB_EMUL, "flash-stick@1", - &dev)); - parent = dev->parent; - - /* Reorder the devices in the parent list and uclass list */ - list_del(&dev->sibling_node); - list_add_tail(&dev->sibling_node, &parent->child_head); - - list_del(&dev->uclass_node); - list_add_tail(&dev->uclass_node, &dev->uclass->dev_head); - - state_set_skip_delays(true); - ut_assertok(usb_init()); - console_record_reset_enable(); - usb_show_tree(); - len = membuff_getraw(&gd->console_out, -1, true, &data); - if (len) - data[len] = '\0'; - ut_asserteq_str(usb_tree_reorder, data); - ut_assertok(usb_stop()); + ut_asserteq(0, count_usb_devices()); return 0; } -DM_TEST(dm_test_usb_tree_reorder, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); +DM_TEST(dm_test_usb_stop, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); static int dm_test_usb_keyb(struct unit_test_state *uts) { diff --git a/test/dm/video.c b/test/dm/video.c index 4d000fa1be..29917d0c2d 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -100,6 +100,14 @@ static int select_vidconsole(struct unit_test_state *uts, const char *drv_name) return 0; } +static void vidconsole_put_string(struct udevice *dev, const char *str) +{ + const char *s; + + for (s = str; *s; s++) + vidconsole_put_char(dev, *s); +} + /* Test text output works on the video console */ static int dm_test_video_text(struct unit_test_state *uts) { @@ -140,19 +148,51 @@ static int dm_test_video_chars(struct unit_test_state *uts) { struct udevice *dev, *con; const char *test_string = "Well\b\b\b\bxhe is\r \n\ta very \amodest \bman\n\t\tand Has much to\b\bto be modest about."; - const char *s; ut_assertok(select_vidconsole(uts, "vidconsole0")); ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); - for (s = test_string; *s; s++) - vidconsole_put_char(con, *s); + vidconsole_put_string(con, test_string); ut_asserteq(466, compress_frame_buffer(dev)); return 0; } DM_TEST(dm_test_video_chars, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); +#ifdef CONFIG_VIDEO_ANSI +#define ANSI_ESC "\x1b" +/* Test handling of ANSI escape sequences */ +static int dm_test_video_ansi(struct unit_test_state *uts) +{ + struct udevice *dev, *con; + + ut_assertok(select_vidconsole(uts, "vidconsole0")); + ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); + ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); + + /* reference clear: */ + video_clear(con->parent); + video_sync(con->parent); + ut_asserteq(46, compress_frame_buffer(dev)); + + /* test clear escape sequence: [2J */ + vidconsole_put_string(con, "A\tB\tC"ANSI_ESC"[2J"); + ut_asserteq(46, compress_frame_buffer(dev)); + + /* test set-cursor: [%d;%df */ + vidconsole_put_string(con, "abc"ANSI_ESC"[2;2fab"ANSI_ESC"[4;4fcd"); + ut_asserteq(142, compress_frame_buffer(dev)); + + /* test colors (30-37 fg color, 40-47 bg color) */ + vidconsole_put_string(con, ANSI_ESC"[30;41mfoo"); /* black on red */ + vidconsole_put_string(con, ANSI_ESC"[33;44mbar"); /* yellow on blue */ + ut_asserteq(268, compress_frame_buffer(dev)); + + return 0; +} +DM_TEST(dm_test_video_ansi, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); +#endif + /** * check_vidconsole_output() - Run a text console test * @@ -294,12 +334,10 @@ static int dm_test_video_truetype(struct unit_test_state *uts) { struct udevice *dev, *con; const char *test_string = "Criticism may not be agreeable, but it is necessary. It fulfils the same function as pain in the human body. It calls attention to an unhealthy state of things. Some see private enterprise as a predatory target to be shot, others as a cow to be milked, but few are those who see it as a sturdy horse pulling the wagon. The \aprice OF\b\bof greatness\n\tis responsibility.\n\nBye"; - const char *s; ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); - for (s = test_string; *s; s++) - vidconsole_put_char(con, *s); + vidconsole_put_string(con, test_string); ut_asserteq(12619, compress_frame_buffer(dev)); return 0; @@ -312,7 +350,6 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) struct sandbox_sdl_plat *plat; struct udevice *dev, *con; const char *test_string = "Criticism may not be agreeable, but it is necessary. It fulfils the same function as pain in the human body. It calls attention to an unhealthy state of things. Some see private enterprise as a predatory target to be shot, others as a cow to be milked, but few are those who see it as a sturdy horse pulling the wagon. The \aprice OF\b\bof greatness\n\tis responsibility.\n\nBye"; - const char *s; ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev)); ut_assert(!device_active(dev)); @@ -321,8 +358,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); - for (s = test_string; *s; s++) - vidconsole_put_char(con, *s); + vidconsole_put_string(con, test_string); ut_asserteq(33849, compress_frame_buffer(dev)); return 0; @@ -335,7 +371,6 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) struct sandbox_sdl_plat *plat; struct udevice *dev, *con; const char *test_string = "...Criticism may or may\b\b\b\b\b\bnot be agreeable, but seldom it is necessary\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\bit is necessary. It fulfils the same function as pain in the human body. It calls attention to an unhealthy state of things."; - const char *s; ut_assertok(uclass_find_device(UCLASS_VIDEO, 0, &dev)); ut_assert(!device_active(dev)); @@ -344,8 +379,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) ut_assertok(uclass_get_device(UCLASS_VIDEO, 0, &dev)); ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con)); - for (s = test_string; *s; s++) - vidconsole_put_char(con, *s); + vidconsole_put_string(con, test_string); ut_asserteq(34871, compress_frame_buffer(dev)); return 0; diff --git a/test/fs/fs-test.sh b/test/fs/fs-test.sh index b19486419e..20d5dd8a47 100755 --- a/test/fs/fs-test.sh +++ b/test/fs/fs-test.sh @@ -9,14 +9,18 @@ # It currently tests the fs/sb and native commands for ext4 and fat partitions # Expected results are as follows: # EXT4 tests: -# fs-test.sb.ext4.out: Summary: PASS: 23 FAIL: 0 -# fs-test.ext4.out: Summary: PASS: 23 FAIL: 0 -# fs-test.fs.ext4.out: Summary: PASS: 23 FAIL: 0 -# FAT tests: -# fs-test.sb.fat.out: Summary: PASS: 23 FAIL: 0 -# fs-test.fat.out: Summary: PASS: 20 FAIL: 3 -# fs-test.fs.fat.out: Summary: PASS: 20 FAIL: 3 -# Total Summary: TOTAL PASS: 132 TOTAL FAIL: 6 +# fs-test.sb.ext4.out: Summary: PASS: 24 FAIL: 0 +# fs-test.ext4.out: Summary: PASS: 24 FAIL: 0 +# fs-test.fs.ext4.out: Summary: PASS: 24 FAIL: 0 +# FAT16 tests: +# fs-test.sb.fat16.out: Summary: PASS: 24 FAIL: 0 +# fs-test.fat16.out: Summary: PASS: 21 FAIL: 3 +# fs-test.fs.fat16.out: Summary: PASS: 21 FAIL: 3 +# FAT32 tests: +# fs-test.sb.fat32.out: Summary: PASS: 24 FAIL: 0 +# fs-test.fat32.out: Summary: PASS: 21 FAIL: 3 +# fs-test.fs.fat32.out: Summary: PASS: 21 FAIL: 3 +# Total Summary: TOTAL PASS: 204 TOTAL FAIL: 12 # pre-requisite binaries list. PREREQ_BINS="md5sum mkfs mount umount dd fallocate mkdir" @@ -41,7 +45,7 @@ SMALL_FILE="1MB.file" BIG_FILE="2.5GB.file" # $MD5_FILE will have the expected md5s when we do the test -# They shall have a suffix which represents their file system (ext4/fat) +# They shall have a suffix which represents their file system (ext4/fat16/...) MD5_FILE="${OUT_DIR}/md5s.list" # $OUT shall be the prefix of the test output. Their suffix will be .out @@ -104,15 +108,25 @@ function prepare_env() { } # 1st parameter is the name of the image file to be created -# 2nd parameter is the filesystem - fat ext4 etc +# 2nd parameter is the filesystem - fat16 ext4 etc # -F cant be used with fat as it means something else. function create_image() { # Create image if not already present - saves time, while debugging - if [ "$2" = "ext4" ]; then + case "$2" in + fat16) + MKFS_OPTION="-F 16" + FS_TYPE="fat" + ;; + fat32) + MKFS_OPTION="-F 32" + FS_TYPE="fat" + ;; + ext4) MKFS_OPTION="-F" - else - MKFS_OPTION="" - fi + FS_TYPE="ext4" + ;; + esac + if [ ! -f "$1" ]; then fallocate -l 3G "$1" &> /dev/null if [ $? -ne 0 ]; then @@ -123,8 +137,8 @@ function create_image() { exit $? fi fi - mkfs -t "$2" $MKFS_OPTION "$1" &> /dev/null - if [ $? -ne 0 -a "$2" = "fat" ]; then + mkfs -t "$FS_TYPE" $MKFS_OPTION "$1" &> /dev/null + if [ $? -ne 0 -a "$FS_TYPE" = "fat" ]; then # If we fail and we did fat, try vfat. mkfs -t vfat $MKFS_OPTION "$1" &> /dev/null fi @@ -136,7 +150,7 @@ function create_image() { } # 1st parameter is image file -# 2nd parameter is file system type - fat/ext4 +# 2nd parameter is file system type - fat16/ext4/... # 3rd parameter is name of small file # 4th parameter is name of big file # 5th parameter is fs/nonfs/sb - to dictate generic fs commands or @@ -149,7 +163,7 @@ function test_image() { length="0x00100000" case "$2" in - fat) + fat*) FPATH="" PREFIX="fat" WRITE="write" @@ -215,10 +229,14 @@ ${PREFIX}ls host${SUFFIX} $6 # We want ${PREFIX}size host 0:0 $3 for host commands and # sb size hostfs - $3 for hostfs commands. # 1MB is 0x0010 0000 -# Test Case 2 - size of small file +# Test Case 2a - size of small file ${PREFIX}size host${SUFFIX} ${FPATH}$FILE_SMALL printenv filesize setenv filesize +# Test Case 2b - size of small file via a path using '..' +${PREFIX}size host${SUFFIX} ${FPATH}SUBDIR/../$FILE_SMALL +printenv filesize +setenv filesize # 2.5GB (1024*1024*2500) is 0x9C40 0000 # Test Case 3 - size of big file @@ -333,6 +351,9 @@ function create_files() { mkdir -p "$MOUNT_DIR" sudo mount -o loop,rw "$1" "$MOUNT_DIR" + # Create a subdirectory. + sudo mkdir -p "$MOUNT_DIR/SUBDIR" + # Create big file in this image. # Note that we work only on the start 1MB, couple MBs in the 2GB range # and the last 1 MB of the huge 2.5GB file. @@ -439,16 +460,19 @@ function check_results() { FAIL=0 # Check if the ls is showing correct results for 2.5 gb file - grep -A6 "Test Case 1 " "$1" | egrep -iq "2621440000 *$4" + grep -A7 "Test Case 1 " "$1" | egrep -iq "2621440000 *$4" pass_fail "TC1: ls of $4" # Check if the ls is showing correct results for 1 mb file - grep -A6 "Test Case 1 " "$1" | egrep -iq "1048576 *$3" + grep -A7 "Test Case 1 " "$1" | egrep -iq "1048576 *$3" pass_fail "TC1: ls of $3" # Check size command on 1MB.file - egrep -A3 "Test Case 2 " "$1" | grep -q "filesize=100000" + egrep -A3 "Test Case 2a " "$1" | grep -q "filesize=100000" pass_fail "TC2: size of $3" + # Check size command on 1MB.file via a path using '..' + egrep -A3 "Test Case 2b " "$1" | grep -q "filesize=100000" + pass_fail "TC2: size of $3 via a path using '..'" # Check size command on 2.5GB.file egrep -A3 "Test Case 3 " "$1" | grep -q "filesize=9c400000" @@ -550,7 +574,7 @@ TOTAL_PASS=0 # In each loop, for a given file system image, we test both the # fs command, like load/size/write, the file system specific command # like: ext4load/ext4size/ext4write and the sb load/ls/save commands. -for fs in ext4 fat; do +for fs in ext4 fat16 fat32; do echo "Creating $fs image if not already present." IMAGE=${IMG}.${fs}.img @@ -563,11 +587,14 @@ for fs in ext4 fat; do # Lets mount the image and test sb hostfs commands mkdir -p "$MOUNT_DIR" - if [ "$fs" = "fat" ]; then + case "$fs" in + fat*) uid="uid=`id -u`" - else + ;; + *) uid="" - fi + ;; + esac sudo mount -o loop,rw,$uid "$IMAGE" "$MOUNT_DIR" sudo chmod 777 "$MOUNT_DIR" diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c index 24891ee829..c730a11f51 100644 --- a/test/overlay/cmd_ut_overlay.c +++ b/test/overlay/cmd_ut_overlay.c @@ -226,6 +226,7 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) void *fdt_overlay = &__dtb_test_fdt_overlay_begin; void *fdt_overlay_stacked = &__dtb_test_fdt_overlay_stacked_begin; void *fdt_base_copy, *fdt_overlay_copy, *fdt_overlay_stacked_copy; + int ret = -ENOMEM; uts = calloc(1, sizeof(*uts)); if (!uts) @@ -236,16 +237,16 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) fdt_base_copy = malloc(FDT_COPY_SIZE); if (!fdt_base_copy) - return -ENOMEM; + goto err1; uts->priv = fdt_base_copy; fdt_overlay_copy = malloc(FDT_COPY_SIZE); if (!fdt_overlay_copy) - return -ENOMEM; + goto err2; fdt_overlay_stacked_copy = malloc(FDT_COPY_SIZE); if (!fdt_overlay_stacked_copy) - return -ENOMEM; + goto err3; /* * Resize the FDT to 4k so that we have room to operate on @@ -293,11 +294,18 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } printf("Failures: %d\n", uts->fail_count); + if (!uts->fail_count) + ret = 0; + else + ret = CMD_RET_FAILURE; free(fdt_overlay_stacked_copy); +err3: free(fdt_overlay_copy); +err2: free(fdt_base_copy); +err1: free(uts); - return uts->fail_count ? CMD_RET_FAILURE : 0; + return ret; } diff --git a/test/print_ut.c b/test/print_ut.c index baad289972..a42c554bef 100644 --- a/test/print_ut.c +++ b/test/print_ut.c @@ -36,6 +36,9 @@ static int do_ut_print(cmd_tbl_t *cmdtp, int flag, int argc, snprintf(str, 0, "testing none"); assert(*str == 'x'); + sprintf(big_str, "_%ls_", L"foo"); + assert(!strcmp("_foo_", big_str)); + /* Test the banner function */ s = display_options_get_banner(true, str, sizeof(str)); assert(s == str); diff --git a/test/py/README.md b/test/py/README.md index 829c7efbb2..ea4b66a41c 100644 --- a/test/py/README.md +++ b/test/py/README.md @@ -22,12 +22,17 @@ need to implement various "hook" scripts that are called by the test suite at the appropriate time. On Debian or Debian-like distributions, the following packages are required. -Similar package names should exist in other distributions. +Some packages are required to execute any test, and others only for specific +tests. Similar package names should exist in other distributions. | Package | Version tested (Ubuntu 14.04) | | -------------- | ----------------------------- | | python | 2.7.5-5ubuntu3 | | python-pytest | 2.5.1-1 | +| gdisk | 0.8.8-1ubuntu0.1 | +| dfu-util | 0.5-1 | +| dtc | 1.4.0+dfsg-1 | +| openssl | 1.0.1f-1ubuntu2.22 | The test script supports either: diff --git a/test/py/conftest.py b/test/py/conftest.py index 65e1d75626..6e66a48c15 100644 --- a/test/py/conftest.py +++ b/test/py/conftest.py @@ -429,12 +429,12 @@ def setup_boardspec(item): for board in mark.args: if board.startswith('!'): if ubconfig.board_type == board[1:]: - pytest.skip('board not supported') + pytest.skip('board "%s" not supported' % ubconfig.board_type) return else: required_boards.append(board) if required_boards and ubconfig.board_type not in required_boards: - pytest.skip('board not supported') + pytest.skip('board "%s" not supported' % ubconfig.board_type) def setup_buildconfigspec(item): """Process any 'buildconfigspec' marker for a test. @@ -455,7 +455,35 @@ def setup_buildconfigspec(item): return for option in mark.args: if not ubconfig.buildconfig.get('config_' + option.lower(), None): - pytest.skip('.config feature not enabled') + pytest.skip('.config feature "%s" not enabled' % option.lower()) + +def tool_is_in_path(tool): + for path in os.environ["PATH"].split(os.pathsep): + fn = os.path.join(path, tool) + if os.path.isfile(fn) and os.access(fn, os.X_OK): + return True + return False + +def setup_requiredtool(item): + """Process any 'requiredtool' marker for a test. + + Such a marker lists some external tool (binary, executable, application) + that the test requires. If tests are being executed on a system that + doesn't have the required tool, the test is marked to be skipped. + + Args: + item: The pytest test item. + + Returns: + Nothing. + """ + + mark = item.get_marker('requiredtool') + if not mark: + return + for tool in mark.args: + if not tool_is_in_path(tool): + pytest.skip('tool "%s" not in $PATH' % tool) def start_test_section(item): anchors[item.name] = log.start_section(item.name) @@ -476,6 +504,7 @@ def pytest_runtest_setup(item): start_test_section(item) setup_boardspec(item) setup_buildconfigspec(item) + setup_requiredtool(item) def pytest_runtest_protocol(item, nextitem): """pytest hook: Called to execute a test. diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py index bf926c3e77..5bc1bc49d4 100644 --- a/test/py/multiplexed_log.py +++ b/test/py/multiplexed_log.py @@ -365,13 +365,13 @@ $(document).ready(function () { self._terminate_stream() self.f.write('<div class="' + note_type + '">\n') - if anchor: - self.f.write('<a href="#%s">\n' % anchor) self.f.write('<pre>') + if anchor: + self.f.write('<a href="#%s">' % anchor) self.f.write(self._escape(msg)) - self.f.write('\n</pre>\n') if anchor: - self.f.write('</a>\n') + self.f.write('</a>') + self.f.write('\n</pre>\n') self.f.write('</div>\n') def start_section(self, marker, anchor=None): diff --git a/test/py/tests/test_dfu.py b/test/py/tests/test_dfu.py index fba67d585b..8f6877c5c2 100644 --- a/test/py/tests/test_dfu.py +++ b/test/py/tests/test_dfu.py @@ -113,6 +113,7 @@ test_sizes_default = ( first_usb_dev_port = None @pytest.mark.buildconfigspec('cmd_dfu') +@pytest.mark.requiredtool('dfu-util') def test_dfu(u_boot_console, env__usb_dev_port, env__dfu_config): """Test the "dfu" command; the host system must be able to enumerate a USB device when "dfu" is running, various DFU transfers are tested, and the diff --git a/test/py/tests/test_efi_selftest.py b/test/py/tests/test_efi_selftest.py new file mode 100644 index 0000000000..76e282a6c7 --- /dev/null +++ b/test/py/tests/test_efi_selftest.py @@ -0,0 +1,25 @@ +# Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2017, Heinrich Schuchardt <xypron.glpk@gmx.de> +# +# SPDX-License-Identifier: GPL-2.0 + +# Test efi API implementation + +import pytest +import u_boot_utils + +@pytest.mark.buildconfigspec('cmd_bootefi_selftest') +def test_efi_selftest(u_boot_console): + """ + Run bootefi selftest + """ + + u_boot_console.run_command(cmd='bootefi selftest', wait_for_prompt=False) + m = u_boot_console.p.expect(['Summary: 0 failures', 'Press any key']) + if m != 0: + raise Exception('Failures occured during the EFI selftest') + u_boot_console.run_command(cmd='', wait_for_echo=False, wait_for_prompt=False); + m = u_boot_console.p.expect(['resetting', 'U-Boot']) + if m != 0: + raise Exception('Reset failed during the EFI selftest') + u_boot_console.restart_uboot(); diff --git a/test/py/tests/test_fit.py b/test/py/tests/test_fit.py index 7e6b96dae4..4b32bb18b8 100755 --- a/test/py/tests/test_fit.py +++ b/test/py/tests/test_fit.py @@ -111,6 +111,7 @@ sb save hostfs 0 %(loadables2_addr)x %(loadables2_out)s %(loadables2_size)x @pytest.mark.boardspec('sandbox') @pytest.mark.buildconfigspec('fit_signature') +@pytest.mark.requiredtool('dtc') def test_fit(u_boot_console): def make_fname(leaf): """Make a temporary filename diff --git a/test/py/tests/test_gpt.py b/test/py/tests/test_gpt.py index e2bbd08e6d..ec25fbbc5a 100644 --- a/test/py/tests/test_gpt.py +++ b/test/py/tests/test_gpt.py @@ -38,15 +38,14 @@ class GptTestDiskImage(object): fd = os.open(self.path, os.O_RDWR | os.O_CREAT) os.ftruncate(fd, 4194304) os.close(fd) - sgdisk = '/sbin/sgdisk' - cmd = (sgdisk, '-U', '375a56f7-d6c9-4e81-b5f0-09d41ca89efe', + cmd = ('sgdisk', '-U', '375a56f7-d6c9-4e81-b5f0-09d41ca89efe', self.path) u_boot_utils.run_and_log(u_boot_console, cmd) - cmd = (sgdisk, '--new=1:2048:2560', self.path) + cmd = ('sgdisk', '--new=1:2048:2560', self.path) u_boot_utils.run_and_log(u_boot_console, cmd) - cmd = (sgdisk, '--new=2:4096:4608', self.path) + cmd = ('sgdisk', '--new=2:4096:4608', self.path) u_boot_utils.run_and_log(u_boot_console, cmd) - cmd = (sgdisk, '-l', self.path) + cmd = ('sgdisk', '-l', self.path) u_boot_utils.run_and_log(u_boot_console, cmd) gtdi = None @@ -64,6 +63,7 @@ def state_disk_image(u_boot_console): @pytest.mark.boardspec('sandbox') @pytest.mark.buildconfigspec('cmd_gpt') +@pytest.mark.requiredtool('sgdisk') def test_gpt_guid(state_disk_image, u_boot_console): """Test the gpt guid command.""" @@ -73,6 +73,7 @@ def test_gpt_guid(state_disk_image, u_boot_console): @pytest.mark.boardspec('sandbox') @pytest.mark.buildconfigspec('cmd_gpt') +@pytest.mark.requiredtool('sgdisk') def test_gpt_save_guid(state_disk_image, u_boot_console): """Test the gpt guid command to save GUID into a string.""" @@ -86,6 +87,7 @@ def test_gpt_save_guid(state_disk_image, u_boot_console): @pytest.mark.boardspec('sandbox') @pytest.mark.buildconfigspec('cmd_gpt') @pytest.mark.buildconfigspec('cmd_gpt_rename') +@pytest.mark.requiredtool('sgdisk') def test_gpt_rename_partition(state_disk_image, u_boot_console): """Test the gpt rename command to write partition names.""" @@ -101,6 +103,7 @@ def test_gpt_rename_partition(state_disk_image, u_boot_console): @pytest.mark.buildconfigspec('cmd_gpt') @pytest.mark.buildconfigspec('cmd_gpt_rename') @pytest.mark.buildconfigspec('cmd_part') +@pytest.mark.requiredtool('sgdisk') def test_gpt_swap_partitions(state_disk_image, u_boot_console): """Test the gpt swap command to exchange two partition names.""" diff --git a/test/py/tests/test_sleep.py b/test/py/tests/test_sleep.py index b59a4cfc0f..64e0571326 100644 --- a/test/py/tests/test_sleep.py +++ b/test/py/tests/test_sleep.py @@ -17,7 +17,7 @@ def test_sleep(u_boot_console): u_boot_console.run_command('sleep %d' % sleep_time) tend = time.time() elapsed = tend - tstart - assert elapsed >= sleep_time + assert elapsed >= (sleep_time - 0.01) if not u_boot_console.config.gdbserver: # 0.25s margin is hopefully enough to account for any system overhead. assert elapsed < (sleep_time + 0.25) diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py index 6e62820743..c4da79d114 100644 --- a/test/py/tests/test_vboot.py +++ b/test/py/tests/test_vboot.py @@ -31,6 +31,10 @@ import u_boot_utils as util @pytest.mark.boardspec('sandbox') @pytest.mark.buildconfigspec('fit_signature') +@pytest.mark.requiredtool('dtc') +@pytest.mark.requiredtool('fdtget') +@pytest.mark.requiredtool('fdtput') +@pytest.mark.requiredtool('openssl') def test_vboot(u_boot_console): """Test verified boot signing with mkimage and verification with 'bootm'. diff --git a/tools/Makefile b/tools/Makefile index c16477459d..5db2a54225 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -21,7 +21,6 @@ subdir-$(HOST_TOOLS_ALL) += gdb # Merge all the different vars for envcrc into one ENVCRC-$(CONFIG_ENV_IS_EMBEDDED) = y -ENVCRC-$(CONFIG_ENV_IS_IN_DATAFLASH) = y ENVCRC-$(CONFIG_ENV_IS_IN_EEPROM) = y ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND) = y diff --git a/tools/bmp_logo.c b/tools/bmp_logo.c index 2247adcc82..55f833fb9b 100644 --- a/tools/bmp_logo.c +++ b/tools/bmp_logo.c @@ -76,7 +76,7 @@ int main (int argc, char *argv[]) FILE *fp; bitmap_t bmp; bitmap_t *b = &bmp; - uint16_t data_offset, n_colors; + uint16_t data_offset, n_colors, hdr_size; if (argc < 3) { usage(argv[0]); @@ -108,7 +108,12 @@ int main (int argc, char *argv[]) skip_bytes (fp, 8); if (fread (&data_offset, sizeof (uint16_t), 1, fp) != 1) error ("Couldn't read bitmap data offset", fp); - skip_bytes (fp, 6); + skip_bytes(fp, 2); + if (fread(&hdr_size, sizeof(uint16_t), 1, fp) != 1) + error("Couldn't read bitmap header size", fp); + if (hdr_size < 40) + error("Invalid bitmap header", fp); + skip_bytes(fp, 2); if (fread (&b->width, sizeof (uint16_t), 1, fp) != 1) error ("Couldn't read bitmap width", fp); skip_bytes (fp, 2); @@ -117,7 +122,7 @@ int main (int argc, char *argv[]) skip_bytes (fp, 22); if (fread (&n_colors, sizeof (uint16_t), 1, fp) != 1) error ("Couldn't read bitmap colors", fp); - skip_bytes (fp, 6); + skip_bytes(fp, hdr_size - 34); /* * Repair endianess. diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py index 352ad438ee..68b470a3a7 100644 --- a/tools/buildman/kconfiglib.py +++ b/tools/buildman/kconfiglib.py @@ -73,6 +73,7 @@ email service. Don't wrestle with internal APIs. Tell me what you need and I might add it in a safe way as a client API instead.""" import os +import platform import re import sys @@ -137,10 +138,8 @@ class Config(object): # The set of all symbols, indexed by name (a string) self.syms = {} # Python 2/3 compatibility hack. This is the only one needed. - if sys.version_info[0] >= 3: - self.syms_iter = self.syms.values - else: - self.syms_iter = self.syms.itervalues + self.syms_iter = self.syms.values if sys.version_info[0] >= 3 else \ + self.syms.itervalues # The set of all defined symbols in the configuration in the order they # appear in the Kconfig files. This excludes the special symbols n, m, @@ -173,7 +172,7 @@ class Config(object): self.m = register_special_symbol(TRISTATE, "m", "m") self.y = register_special_symbol(TRISTATE, "y", "y") # DEFCONFIG_LIST uses this - register_special_symbol(STRING, "UNAME_RELEASE", os.uname()[2]) + register_special_symbol(STRING, "UNAME_RELEASE", platform.uname()[2]) # The symbol with "option defconfig_list" set, containing a list of # default .config files @@ -183,16 +182,20 @@ class Config(object): self.arch = os.environ.get("ARCH") self.srcarch = os.environ.get("SRCARCH") + # If you set CONFIG_ in the environment, Kconfig will prefix all symbols + # with its value when saving the configuration, instead of using the default, "CONFIG_". + self.config_prefix = os.environ.get("CONFIG_") + if self.config_prefix is None: + self.config_prefix = "CONFIG_" + # See Config.__init__(). We need this for get_defconfig_filename(). self.srctree = os.environ.get("srctree") if self.srctree is None: self.srctree = "." self.filename = filename - if base_dir is None: - self.base_dir = self.srctree - else: - self.base_dir = os.path.expandvars(base_dir) + self.base_dir = self.srctree if base_dir is None else \ + os.path.expandvars(base_dir) # The 'mainmenu' text self.mainmenu_text = None @@ -222,7 +225,8 @@ class Config(object): self._transform_m = None # Parse the Kconfig files - self.top_block = self._parse_file(filename, None, None, None) + self.top_block = [] + self._parse_file(filename, None, None, None, self.top_block) # Build Symbol.dep for all symbols self._build_dep() @@ -405,6 +409,10 @@ class Config(object): """ self._warnings = [] + # Regular expressions for parsing .config files + _set_re_match = re.compile(r"{}(\w+)=(.*)".format(self.config_prefix)).match + _unset_re_match = re.compile(r"# {}(\w+) is not set".format(self.config_prefix)).match + # Put this first so that a missing file doesn't screw up our state filename = os.path.expandvars(filename) line_feeder = _FileFeed(filename) @@ -524,14 +532,12 @@ class Config(object): with open(filename, "w") as f: # Write header if header is not None: - f.write(_comment(header)) - f.write("\n") + f.write(_comment(header) + "\n") # Build and write configuration conf_strings = [] _make_block_conf(self.top_block, conf_strings.append) - f.write("\n".join(conf_strings)) - f.write("\n") + f.write("\n".join(conf_strings) + "\n") def eval(self, s): """Returns the value of the expression 's' -- where 's' is represented @@ -609,16 +615,18 @@ class Config(object): # Kconfig parsing # - def _parse_file(self, filename, parent, deps, visible_if_deps, res=None): - """Parses the Kconfig file 'filename'. Returns a list with the Items in - the file. See _parse_block() for the meaning of the parameters.""" - return self._parse_block(_FileFeed(filename), None, parent, deps, - visible_if_deps, res) + def _parse_file(self, filename, parent, deps, visible_if_deps, block): + """Parses the Kconfig file 'filename'. Appends the Items in the file + (and any file it sources) to the list passed in the 'block' parameter. + See _parse_block() for the meaning of the parameters.""" + self._parse_block(_FileFeed(filename), None, parent, deps, + visible_if_deps, block) def _parse_block(self, line_feeder, end_marker, parent, deps, - visible_if_deps, res=None): + visible_if_deps, block): """Parses a block, which is the contents of either a file or an if, - menu, or choice statement. Returns a list with the Items in the block. + menu, or choice statement. Appends the Items to the list passed in the + 'block' parameter. line_feeder: A _FileFeed instance feeding lines from a file. The Kconfig language is line-based in practice. @@ -634,10 +642,7 @@ class Config(object): visible_if_deps (default: None): 'visible if' dependencies from enclosing menus. - res (default: None): The list to add items to. If None, a new list is - created to hold the items.""" - - block = [] if res is None else res + block: The list to add items to.""" while 1: # Do we already have a tokenized line that we determined wasn't @@ -656,7 +661,7 @@ class Config(object): if end_marker is not None: raise Kconfig_Syntax_Error("Unexpected end of file {0}" .format(line_feeder.filename)) - return block + return tokens = self._tokenize(line, False, line_feeder.filename, line_feeder.linenr) @@ -679,14 +684,13 @@ class Config(object): # choice statements, the choice statement takes precedence. if not sym.is_defined_ or isinstance(parent, Choice): sym.parent = parent - sym.is_defined_ = True + self._parse_properties(line_feeder, sym, deps, visible_if_deps) + self.kconfig_syms.append(sym) block.append(sym) - self._parse_properties(line_feeder, sym, deps, visible_if_deps) - elif t0 == T_SOURCE: kconfig_file = tokens.get_next() exp_kconfig_file = self._expand_sym_refs(kconfig_file) @@ -705,7 +709,7 @@ class Config(object): elif t0 == end_marker: # We have reached the end of the block - return block + return elif t0 == T_IF: # If statements are treated as syntactic sugar for adding @@ -722,38 +726,39 @@ class Config(object): elif t0 == T_COMMENT: comment = Comment() - comment.config = self comment.parent = parent comment.filename = line_feeder.filename comment.linenr = line_feeder.linenr comment.text = tokens.get_next() - self.comments.append(comment) - block.append(comment) - self._parse_properties(line_feeder, comment, deps, visible_if_deps) + self.comments.append(comment) + block.append(comment) + elif t0 == T_MENU: menu = Menu() - menu.config = self menu.parent = parent menu.filename = line_feeder.filename menu.linenr = line_feeder.linenr menu.title = tokens.get_next() - self.menus.append(menu) - block.append(menu) - - # Parse properties and contents self._parse_properties(line_feeder, menu, deps, visible_if_deps) - menu.block = self._parse_block(line_feeder, T_ENDMENU, menu, - menu.dep_expr, - _make_and(visible_if_deps, - menu.visible_if_expr)) + + # This needs to go before _parse_block() so that we get the + # proper menu ordering in the case of nested functions + self.menus.append(menu) + # Parse contents and put Items in menu.block + self._parse_block(line_feeder, T_ENDMENU, menu, menu.dep_expr, + _make_and(visible_if_deps, + menu.visible_if_expr), + menu.block) + + block.append(menu) elif t0 == T_CHOICE: name = tokens.get_next() @@ -775,11 +780,12 @@ class Config(object): choice.def_locations.append((line_feeder.filename, line_feeder.linenr)) - # Parse properties and contents self._parse_properties(line_feeder, choice, deps, visible_if_deps) - choice.block = self._parse_block(line_feeder, T_ENDCHOICE, - choice, deps, visible_if_deps) + + # Parse contents and put Items in choice.block + self._parse_block(line_feeder, T_ENDCHOICE, choice, deps, + visible_if_deps, choice.block) choice._determine_actual_symbols() @@ -819,19 +825,19 @@ class Config(object): """Parses '<expr1> if <expr2>' constructs, where the 'if' part is optional. Returns a tuple containing the parsed expressions, with None as the second element if the 'if' part is missing.""" - val = self._parse_expr(tokens, stmt, line, filename, linenr, False) - if tokens.check(T_IF): - return (val, self._parse_expr(tokens, stmt, line, filename, - linenr)) - return (val, None) + return (self._parse_expr(tokens, stmt, line, filename, linenr, + False), + self._parse_expr(tokens, stmt, line, filename, linenr) + if tokens.check(T_IF) else None) # In case the symbol is defined in multiple locations, we need to - # remember what prompts, defaults, and selects are new for this - # definition, as "depends on" should only apply to the local + # remember what prompts, defaults, selects, and implies are new for + # this definition, as "depends on" should only apply to the local # definition. new_prompt = None new_def_exprs = [] new_selects = [] + new_implies = [] # Dependencies from 'depends on' statements depends_on_expr = None @@ -897,18 +903,27 @@ class Config(object): line_feeder.unget() - elif t0 == T_SELECT or t0 == T_IMPLY: + elif t0 == T_SELECT: target = tokens.get_next() stmt.referenced_syms.add(target) stmt.selected_syms.add(target) - if tokens.check(T_IF): - new_selects.append((target, - self._parse_expr(tokens, stmt, line, - filename, linenr))) - else: - new_selects.append((target, None)) + new_selects.append( + (target, + self._parse_expr(tokens, stmt, line, filename, linenr) + if tokens.check(T_IF) else None)) + + elif t0 == T_IMPLY: + target = tokens.get_next() + + stmt.referenced_syms.add(target) + stmt.implied_syms.add(target) + + new_implies.append( + (target, + self._parse_expr(tokens, stmt, line, filename, linenr) + if tokens.check(T_IF) else None)) elif t0 in (T_BOOL, T_TRISTATE, T_INT, T_HEX, T_STRING): stmt.type = TOKEN_TO_TYPE[t0] @@ -939,12 +954,10 @@ class Config(object): stmt.referenced_syms.add(low) stmt.referenced_syms.add(high) - if tokens.check(T_IF): - stmt.ranges.append((low, high, - self._parse_expr(tokens, stmt, line, - filename, linenr))) - else: - stmt.ranges.append((low, high, None)) + stmt.ranges.append( + (low, high, + self._parse_expr(tokens, stmt, line, filename, linenr) + if tokens.check(T_IF) else None)) elif t0 == T_DEF_TRISTATE: stmt.type = TRISTATE @@ -1051,21 +1064,20 @@ class Config(object): # Symbol or Choice # See comment for 'menu_dep' - stmt.menu_dep = depends_on_expr + stmt.menu_dep = _make_and(deps, depends_on_expr) # Propagate dependencies to prompts if new_prompt is not None: - # Propagate 'visible if' dependencies from enclosing menus prompt, cond_expr = new_prompt - cond_expr = _make_and(cond_expr, visible_if_deps) - # Propagate 'depends on' dependencies - new_prompt = (prompt, _make_and(cond_expr, depends_on_expr)) + # Propagate 'visible if' dependencies from menus and local + # 'depends on' dependencies + cond_expr = _make_and(_make_and(cond_expr, visible_if_deps), + depends_on_expr) # Save original - stmt.orig_prompts.append(new_prompt) + stmt.orig_prompts.append((prompt, cond_expr)) # Finalize with dependencies from enclosing menus and ifs - stmt.prompts.append((new_prompt[0], - _make_and(new_prompt[1], deps))) + stmt.prompts.append((prompt, _make_and(cond_expr, deps))) # Propagate dependencies to defaults @@ -1078,20 +1090,27 @@ class Config(object): stmt.def_exprs.extend([(val_expr, _make_and(cond_expr, deps)) for val_expr, cond_expr in new_def_exprs]) - # Propagate dependencies to selects + # Propagate dependencies to selects and implies - # Only symbols can select + # Only symbols can select and imply if isinstance(stmt, Symbol): # Propagate 'depends on' dependencies new_selects = [(target, _make_and(cond_expr, depends_on_expr)) for target, cond_expr in new_selects] + new_implies = [(target, _make_and(cond_expr, depends_on_expr)) + for target, cond_expr in new_implies] # Save original stmt.orig_selects.extend(new_selects) + stmt.orig_implies.extend(new_implies) # Finalize with dependencies from enclosing menus and ifs for target, cond in new_selects: - target.rev_dep = _make_or(target.rev_dep, - _make_and(stmt, - _make_and(cond, deps))) + target.rev_dep = \ + _make_or(target.rev_dep, + _make_and(stmt, _make_and(cond, deps))) + for target, cond in new_implies: + target.weak_rev_dep = \ + _make_or(target.weak_rev_dep, + _make_and(stmt, _make_and(cond, deps))) def _parse_expr(self, feed, cur_item, line, filename=None, linenr=None, transform_m=True): @@ -1483,7 +1502,8 @@ class Config(object): # The directly dependent symbols of a symbol are: # - Any symbols whose prompts, default values, rev_dep (select - # condition), or ranges depend on the symbol + # condition), weak_rev_dep (imply condition) or ranges depend on the + # symbol # - Any symbols that belong to the same choice statement as the symbol # (these won't be included in 'dep' as that makes the dependency # graph unwieldy, but Symbol._get_dependent() will include them) @@ -1497,6 +1517,7 @@ class Config(object): add_expr_deps(e, sym) add_expr_deps(sym.rev_dep, sym) + add_expr_deps(sym.weak_rev_dep, sym) for l, u, e in sym.ranges: add_expr_deps(l, sym) @@ -1625,20 +1646,16 @@ class Config(object): else: prompts_str_rows = [] for prompt, cond_expr in sc.orig_prompts: - if cond_expr is None: - prompts_str_rows.append(' "{0}"'.format(prompt)) - else: - prompts_str_rows.append( - ' "{0}" if {1}'.format(prompt, - self._expr_val_str(cond_expr))) + prompts_str_rows.append( + ' "{0}"'.format(prompt) if cond_expr is None else + ' "{0}" if {1}'.format(prompt, + self._expr_val_str(cond_expr))) prompts_str = "\n".join(prompts_str_rows) # Build locations string - if not sc.def_locations: - locations_str = "(no locations)" - else: - locations_str = " ".join(["{0}:{1}".format(filename, linenr) for - (filename, linenr) in sc.def_locations]) + locations_str = "(no locations)" if not sc.def_locations else \ + " ".join(["{0}:{1}".format(filename, linenr) for + filename, linenr in sc.def_locations]) # Build additional-dependencies-from-menus-and-ifs string additional_deps_str = " " + \ @@ -1657,13 +1674,11 @@ class Config(object): else: ranges_str_rows = [] for l, u, cond_expr in sc.ranges: - if cond_expr is None: - ranges_str_rows.append(" [{0}, {1}]".format(s(l), - s(u))) - else: - ranges_str_rows.append(" [{0}, {1}] if {2}" - .format(s(l), s(u), - self._expr_val_str(cond_expr))) + ranges_str_rows.append( + " [{0}, {1}]".format(s(l), s(u)) + if cond_expr is None else + " [{0}, {1}] if {2}" + .format(s(l), s(u), self._expr_val_str(cond_expr))) ranges_str = "\n".join(ranges_str_rows) # Build default values string @@ -1685,14 +1700,24 @@ class Config(object): else: selects_str_rows = [] for target, cond_expr in sc.orig_selects: - if cond_expr is None: - selects_str_rows.append(" {0}".format(target.name)) - else: - selects_str_rows.append( - " {0} if {1}".format(target.name, - self._expr_val_str(cond_expr))) + selects_str_rows.append( + " {0}".format(target.name) if cond_expr is None else + " {0} if {1}".format(target.name, + self._expr_val_str(cond_expr))) selects_str = "\n".join(selects_str_rows) + # Build implies string + if not sc.orig_implies: + implies_str = " (no implies)" + else: + implies_str_rows = [] + for target, cond_expr in sc.orig_implies: + implies_str_rows.append( + " {0}".format(target.name) if cond_expr is None else + " {0} if {1}".format(target.name, + self._expr_val_str(cond_expr))) + implies_str = "\n".join(implies_str_rows) + res = _lines("Symbol " + ("(no name)" if sc.name is None else sc.name), "Type : " + TYPENAME[sc.type], @@ -1711,9 +1736,16 @@ class Config(object): defaults_str, "Selects:", selects_str, + "Implies:", + implies_str, "Reverse (select-related) dependencies:", - " (no reverse dependencies)" if sc.rev_dep == "n" - else " " + self._expr_val_str(sc.rev_dep), + " (no reverse dependencies)" + if sc.rev_dep == "n" + else " " + self._expr_val_str(sc.rev_dep), + "Weak reverse (imply-related) dependencies:", + " (no weak reverse dependencies)" + if sc.weak_rev_dep == "n" + else " " + self._expr_val_str(sc.weak_rev_dep), "Additional dependencies from enclosing menus " "and ifs:", additional_deps_str, @@ -1735,11 +1767,10 @@ class Config(object): else: defaults_str_rows = [] for sym, cond_expr in sc.orig_def_exprs: - if cond_expr is None: - defaults_str_rows.append(" {0}".format(sym.name)) - else: - defaults_str_rows.append(" {0} if {1}".format(sym.name, - self._expr_val_str(cond_expr))) + defaults_str_rows.append( + " {0}".format(sym.name) if cond_expr is None else + " {0} if {1}".format(sym.name, + self._expr_val_str(cond_expr))) defaults_str = "\n".join(defaults_str_rows) # Build contained symbols string @@ -1919,26 +1950,25 @@ class Symbol(Item): self.write_to_conf = (mode != "n") if mode == "y": - if choice.get_selection() is self: - new_val = "y" - else: - new_val = "n" + new_val = "y" if choice.get_selection() is self \ + else "n" elif mode == "m": if self.user_val == "m" or self.user_val == "y": new_val = "m" else: # If the symbol is visible and has a user value, use that. - # Otherwise, look at defaults. - use_defaults = True + # Otherwise, look at defaults and weak reverse dependencies + # (implies). + use_defaults_and_weak_rev_deps = True if vis != "n": self.write_to_conf = True if self.user_val is not None: new_val = self.config._eval_min(self.user_val, vis) - use_defaults = False + use_defaults_and_weak_rev_deps = False - if use_defaults: + if use_defaults_and_weak_rev_deps: for val_expr, cond_expr in self.def_exprs: cond_eval = self.config._eval_expr(cond_expr) if cond_eval != "n": @@ -1947,14 +1977,25 @@ class Symbol(Item): cond_eval) break + weak_rev_dep_val = \ + self.config._eval_expr(self.weak_rev_dep) + if weak_rev_dep_val != "n": + self.write_to_conf = True + new_val = self.config._eval_max(new_val, + weak_rev_dep_val) + # Reverse (select-related) dependencies take precedence rev_dep_val = self.config._eval_expr(self.rev_dep) if rev_dep_val != "n": self.write_to_conf = True new_val = self.config._eval_max(new_val, rev_dep_val) - # Promote "m" to "y" for booleans - if new_val == "m" and self.type == BOOL: + # We need to promote "m" to "y" in two circumstances: + # 1) If our type is boolean + # 2) If our weak_rev_dep (from IMPLY) is "y" + if new_val == "m" and \ + (self.type == BOOL or + self.config._eval_expr(self.weak_rev_dep) == "y"): new_val = "y" elif self.type == INT or self.type == HEX: @@ -2189,6 +2230,13 @@ class Symbol(Item): get_referenced_symbols().""" return self.selected_syms + def get_implied_symbols(self): + """Returns the set() of all symbols X for which this symbol has an + 'imply X' or 'imply X if Y' (regardless of whether Y is satisfied or + not). This is a subset of the symbols returned by + get_referenced_symbols().""" + return self.implied_syms + def set_user_value(self, v): """Sets the user value of the symbol. @@ -2304,16 +2352,18 @@ class Symbol(Item): self.ranges = [] # 'range' properties (for int and hex) self.help = None # Help text self.rev_dep = "n" # Reverse (select-related) dependencies + self.weak_rev_dep = "n" # Weak reverse (imply-related) dependencies self.config = None self.parent = None self.user_val = None # Value set by user - # The prompt, default value and select conditions without any + # The prompt, default value, select, and imply conditions without any # dependencies from menus and ifs propagated to them self.orig_prompts = [] self.orig_def_exprs = [] self.orig_selects = [] + self.orig_implies = [] # Dependencies inherited from containing menus and ifs self.deps_from_containing = None @@ -2323,13 +2373,15 @@ class Symbol(Item): # The set of symbols selected by this symbol (see # get_selected_symbols()) self.selected_syms = set() + # The set of symbols implied by this symbol (see get_implied_symbols()) + self.implied_syms = set() # Like 'referenced_syms', but includes symbols from # dependencies inherited from enclosing menus and ifs self.all_referenced_syms = set() - # This records only dependencies specified with 'depends on'. Needed - # when determining actual choice items (hrrrr...). See also - # Choice._determine_actual_symbols(). + # This records only dependencies from enclosing ifs and menus together + # with local 'depends on' dependencies. Needed when determining actual + # choice items (hrrrr...). See Choice._determine_actual_symbols(). self.menu_dep = None # See Symbol.get_ref/def_locations(). @@ -2470,18 +2522,17 @@ class Symbol(Item): return if self.type == BOOL or self.type == TRISTATE: - if val == "y" or val == "m": - append_fn("CONFIG_{0}={1}".format(self.name, val)) - else: - append_fn("# CONFIG_{0} is not set".format(self.name)) + append_fn("{0}{1}={2}".format(self.config.config_prefix, self.name, val) + if val == "y" or val == "m" else + "# {0}{1} is not set".format(self.config.config_prefix, self.name)) elif self.type == INT or self.type == HEX: - append_fn("CONFIG_{0}={1}".format(self.name, val)) + append_fn("{0}{1}={2}".format(self.config.config_prefix, self.name, val)) elif self.type == STRING: # Escape \ and " - append_fn('CONFIG_{0}="{1}"' - .format(self.name, + append_fn('{0}{1}="{2}"' + .format(self.config.config_prefix, self.name, val.replace("\\", "\\\\").replace('"', '\\"'))) else: @@ -2635,7 +2686,7 @@ class Menu(Item): self.title = None self.dep_expr = None self.visible_if_expr = None - self.block = None + self.block = [] # List of contained items self.config = None self.parent = None @@ -2852,7 +2903,7 @@ class Choice(Item): self.prompts = [] self.def_exprs = [] # 'default' properties self.help = None # Help text - self.block = None # List of contained items + self.block = [] # List of contained items self.config = None self.parent = None @@ -3177,7 +3228,13 @@ def _get_visibility(sc): vis = sc.config._eval_max(vis, cond_expr) if isinstance(sc, Symbol) and sc.is_choice_sym: - vis = sc.config._eval_min(vis, _get_visibility(sc.parent)) + if sc.type == TRISTATE and vis == "m" and \ + sc.parent.get_mode() == "y": + # Choice symbols with visibility "m" are not visible if the + # choice has mode "y" + vis = "n" + else: + vis = sc.config._eval_min(vis, _get_visibility(sc.parent)) # Promote "m" to "y" if we're dealing with a non-tristate if vis == "m" and sc.type != TRISTATE: @@ -3434,7 +3491,7 @@ _get_keyword = \ "prompt": T_PROMPT, "default": T_DEFAULT, "bool": T_BOOL, "boolean": T_BOOL, "tristate": T_TRISTATE, "int": T_INT, "hex": T_HEX, "def_bool": T_DEF_BOOL, "def_tristate": T_DEF_TRISTATE, "string": T_STRING, "select": T_SELECT, - "imply": T_IMPLY, "range": T_RANGE, "option": T_OPTION, + "imply" : T_IMPLY, "range": T_RANGE, "option": T_OPTION, "allnoconfig_y": T_ALLNOCONFIG_Y, "env": T_ENV, "defconfig_list": T_DEFCONFIG_LIST, "modules": T_MODULES, "visible": T_VISIBLE}.get @@ -3455,10 +3512,6 @@ _initial_token_re_match = re.compile(r"[^\w]*(\w+)\s*").match # trailing whitespace as an optimization. _id_keyword_re_match = re.compile(r"\s*([\w./-]+)\s*").match -# Regular expressions for parsing .config files -_set_re_match = re.compile(r"CONFIG_(\w+)=(.*)").match -_unset_re_match = re.compile(r"# CONFIG_(\w+) is not set").match - # Regular expression for finding $-references to symbols in strings _sym_ref_re_search = re.compile(r"\$[A-Za-z0-9_]+").search diff --git a/tools/env/.gitignore b/tools/env/.gitignore index 804abacc6e..8d28b2b70b 100644 --- a/tools/env/.gitignore +++ b/tools/env/.gitignore @@ -1,2 +1,3 @@ +embedded.c fw_printenv fw_printenv_unstripped diff --git a/tools/fit_image.c b/tools/fit_image.c index 4dc8bd8862..6dcc88bae0 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -372,7 +372,7 @@ static int fit_build(struct image_tool_params *params, const char *fname) if (fd < 0) { fprintf(stderr, "%s: Can't open %s: %s\n", params->cmdname, fname, strerror(errno)); - goto err; + goto err_buf; } ret = write(fd, buf, size); if (ret != size) { @@ -501,6 +501,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) ret = -EIO; goto err; } + free(buf); close(fd); return 0; @@ -536,21 +537,21 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) fprintf(stderr, "%s: Failed to allocate memory (%d bytes)\n", __func__, size); ret = -ENOMEM; - goto err; + goto err_has_fd; } ret = fdt_open_into(old_fdt, fdt, size); if (ret) { debug("%s: Failed to expand FIT: %s\n", __func__, fdt_strerror(errno)); ret = -EINVAL; - goto err; + goto err_has_fd; } images = fdt_path_offset(fdt, FIT_IMAGES_PATH); if (images < 0) { debug("%s: Cannot find /images node: %d\n", __func__, images); ret = -EINVAL; - goto err; + goto err_has_fd; } for (node = fdt_first_subnode(fdt, images); @@ -571,11 +572,11 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) debug("%s: Failed to write property: %s\n", __func__, fdt_strerror(ret)); ret = -EINVAL; - goto err; + goto err_has_fd; } } - munmap(old_fdt, sbuf.st_size); + /* Close the old fd so we can re-use it. */ close(fd); /* Pack the FDT and place the data after it */ @@ -588,21 +589,23 @@ static int fit_import_data(struct image_tool_params *params, const char *fname) if (fd < 0) { fprintf(stderr, "%s: Can't open %s: %s\n", params->cmdname, fname, strerror(errno)); - free(fdt); - return -EIO; + ret = -EIO; + goto err_no_fd; } if (write(fd, fdt, new_size) != new_size) { debug("%s: Failed to write external data to file %s\n", __func__, strerror(errno)); ret = -EIO; - goto err; + goto err_has_fd; } ret = 0; -err: - free(fdt); +err_has_fd: close(fd); +err_no_fd: + munmap(old_fdt, sbuf.st_size); + free(fdt); return ret; } @@ -648,11 +651,11 @@ static int fit_handle_file(struct image_tool_params *params) *cmd = '\0'; } else if (params->datafile) { /* dtc -I dts -O dtb -p 500 datafile > tmpfile */ - snprintf(cmd, sizeof(cmd), "%s %s %s > %s", + snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"", MKIMAGE_DTC, params->dtc, params->datafile, tmpfile); debug("Trying to execute \"%s\"\n", cmd); } else { - snprintf(cmd, sizeof(cmd), "cp %s %s", + snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"", params->imagefile, tmpfile); } if (*cmd && system(cmd) == -1) { diff --git a/tools/moveconfig.py b/tools/moveconfig.py index 6f549a51c1..bdd4899fcd 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -1170,7 +1170,7 @@ class Slot: toolchain = self.toolchains.Select(arch) except ValueError: self.log += color_text(self.options.color, COLOR_YELLOW, - "Tool chain for '%s' is missing. Do nothing.\n % arch") + "Tool chain for '%s' is missing. Do nothing.\n" % arch) self.finish(False) return env = toolchain.MakeEnvironment(False) @@ -1472,7 +1472,7 @@ def find_kconfig_rules(kconf, config, imply_config): """ sym = kconf.get_symbol(imply_config) if sym: - for sel in sym.get_selected_symbols(): + for sel in sym.get_selected_symbols() | sym.get_implied_symbols(): if sel.get_name() == config: return sym return None diff --git a/tools/rkcommon.c b/tools/rkcommon.c index 04e8272fd5..1a24e16589 100644 --- a/tools/rkcommon.c +++ b/tools/rkcommon.c @@ -73,6 +73,7 @@ struct spl_info { static struct spl_info spl_infos[] = { { "rk3036", "RK30", 0x1000, false, false }, + { "rk3128", "RK31", 0x1800, false, false }, { "rk3188", "RK31", 0x8000 - 0x800, true, false }, { "rk322x", "RK32", 0x8000 - 0x1000, false, false }, { "rk3288", "RK32", 0x8000, false, false }, |