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-rw-r--r--Kconfig1
-rw-r--r--README1
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/cpu/armv7/Kconfig19
-rw-r--r--arch/arm/cpu/armv7/mx7/Kconfig1
-rw-r--r--arch/arm/cpu/u-boot.lds4
-rw-r--r--arch/arm/dts/Makefile5
-rw-r--r--arch/arm/dts/dra72-evm.dts2
-rw-r--r--arch/arm/dts/meson-gxbb-odroidc2.dts19
-rw-r--r--arch/arm/dts/meson-gxbb.dtsi170
-rw-r--r--arch/arm/dts/sun8i-a33-inet-d978-rev2.dts88
-rw-r--r--arch/arm/dts/sun8i-a33-olinuxino.dts226
-rw-r--r--arch/arm/dts/sun8i-h3-orangepi-2.dts11
-rw-r--r--arch/arm/dts/sun8i-h3-orangepi-pc.dts1
-rw-r--r--arch/arm/dts/sun8i-h3-orangepi-plus.dts72
-rw-r--r--arch/arm/dts/sun8i-h3-orangepi-plus2e.dts83
-rw-r--r--arch/arm/dts/sun8i-h3.dtsi5
-rw-r--r--arch/arm/include/asm/arch-am33xx/omap.h13
-rw-r--r--arch/arm/include/asm/arch-meson/gxbb.h3
-rw-r--r--arch/arm/include/asm/arch-omap3/omap.h5
-rw-r--r--arch/arm/include/asm/arch-omap4/omap.h5
-rw-r--r--arch/arm/include/asm/arch-omap5/omap.h6
-rw-r--r--arch/arm/mach-bcm283x/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-tegra/tegra124/Kconfig5
-rw-r--r--arch/arm/mach-uniphier/Kconfig1
-rw-r--r--board/amlogic/odroid-c2/odroid-c2.c13
-rw-r--r--board/logicpd/omap3som/omap3logic.c12
-rw-r--r--board/raspberrypi/rpi/rpi.c34
-rw-r--r--board/sunxi/Kconfig7
-rw-r--r--board/sunxi/MAINTAINERS11
-rw-r--r--board/sunxi/board.c2
-rw-r--r--board/tcl/sl50/Kconfig6
-rw-r--r--board/ti/am57xx/MAINTAINERS3
-rw-r--r--board/ti/am57xx/board.c4
-rw-r--r--board/ti/ks2_evm/README40
-rw-r--r--cmd/nand.c8
-rw-r--r--cmd/pxe.c9
-rw-r--r--common/Kconfig22
-rw-r--r--common/image-fit.c5
-rw-r--r--common/spl/spl.c11
-rw-r--r--configs/A33-OLinuXino_defconfig43
-rw-r--r--configs/am43xx_hs_evm_defconfig3
-rw-r--r--configs/am57xx_hs_evm_defconfig1
-rw-r--r--configs/clearfog_defconfig1
-rw-r--r--configs/db-88f6720_defconfig1
-rw-r--r--configs/db-88f6820-gp_defconfig1
-rw-r--r--configs/db-mv784mp-gp_defconfig1
-rw-r--r--configs/dra7xx_hs_evm_defconfig1
-rw-r--r--configs/ds414_defconfig1
-rw-r--r--configs/iNet_D978_rev2_defconfig26
-rw-r--r--configs/maxbcm_defconfig1
-rw-r--r--configs/odroid-c2_defconfig3
-rw-r--r--configs/orangepi_2_defconfig1
-rw-r--r--configs/orangepi_plus2e_defconfig19
-rw-r--r--configs/orangepi_plus_defconfig3
-rw-r--r--configs/rpi_3_32b_defconfig2
-rw-r--r--configs/rpi_3_defconfig2
-rw-r--r--configs/sandbox_spl_defconfig1
-rw-r--r--configs/socfpga_arria5_defconfig1
-rw-r--r--configs/socfpga_cyclone5_defconfig1
-rw-r--r--configs/socfpga_de0_nano_soc_defconfig1
-rw-r--r--configs/socfpga_is1_defconfig1
-rw-r--r--configs/socfpga_mcvevk_defconfig1
-rw-r--r--configs/socfpga_sockit_defconfig1
-rw-r--r--configs/socfpga_socrates_defconfig1
-rw-r--r--configs/socfpga_sr1500_defconfig1
-rw-r--r--configs/socfpga_vining_fpga_defconfig1
-rw-r--r--configs/theadorable_debug_defconfig1
-rw-r--r--configs/theadorable_defconfig1
-rw-r--r--configs/uniphier_ld11_defconfig1
-rw-r--r--configs/uniphier_ld20_defconfig1
-rw-r--r--configs/uniphier_ld4_sld8_defconfig1
-rw-r--r--configs/uniphier_pro4_defconfig1
-rw-r--r--configs/uniphier_pxs2_ld6b_defconfig1
-rw-r--r--configs/uniphier_sld3_defconfig1
-rw-r--r--doc/README.pxe12
-rw-r--r--doc/device-tree-bindings/regulator/fixed.txt1
-rw-r--r--drivers/dfu/dfu_nand.c4
-rw-r--r--drivers/gpio/bcm2835_gpio.c31
-rw-r--r--drivers/mtd/nand/omap_gpmc.c2
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c1
-rw-r--r--drivers/net/designware.c1
-rw-r--r--drivers/pinctrl/Kconfig1
-rw-r--r--drivers/pinctrl/Makefile1
-rw-r--r--drivers/pinctrl/meson/Kconfig11
-rw-r--r--drivers/pinctrl/meson/Makefile6
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson-gxbb.c432
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.c179
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.h74
-rw-r--r--drivers/pinctrl/pinctrl-generic.c6
-rw-r--r--drivers/power/regulator/fixed.c10
-rw-r--r--drivers/serial/serial_bcm283x_mu.c3
-rw-r--r--include/asm-generic/global_data.h35
-rw-r--r--include/compiler.h19
-rw-r--r--include/configs/am3517_crane.h3
-rw-r--r--include/configs/am3517_evm.h3
-rw-r--r--include/configs/am43xx_evm.h3
-rw-r--r--include/configs/am57xx_evm.h2
-rw-r--r--include/configs/arndale.h1
-rw-r--r--include/configs/bcm_ep_board.h1
-rw-r--r--include/configs/bur_am335x_common.h6
-rw-r--r--include/configs/bur_cfg_common.h2
-rw-r--r--include/configs/cm_t35.h3
-rw-r--r--include/configs/cm_t43.h1
-rw-r--r--include/configs/dra7xx_evm.h2
-rw-r--r--include/configs/jetson-tk1.h2
-rw-r--r--include/configs/kc1.h3
-rw-r--r--include/configs/ls1021aqds.h2
-rw-r--r--include/configs/ls1021atwr.h2
-rw-r--r--include/configs/mx7_common.h2
-rw-r--r--include/configs/omap3_evm.h3
-rw-r--r--include/configs/omap3_igep00x0.h8
-rw-r--r--include/configs/omap3_logic.h10
-rw-r--r--include/configs/omap3_overo.h8
-rw-r--r--include/configs/omap3_pandora.h24
-rw-r--r--include/configs/rpi.h1
-rw-r--r--include/configs/siemens-am33x-common.h3
-rw-r--r--include/configs/sniper.h3
-rw-r--r--include/configs/sun6i.h2
-rw-r--r--include/configs/sun7i.h2
-rw-r--r--include/configs/sun8i.h13
-rw-r--r--include/configs/sunxi-common.h5
-rw-r--r--include/configs/tam3517-common.h3
-rw-r--r--include/configs/tao3530.h3
-rw-r--r--include/configs/ti814x_evm.h3
-rw-r--r--include/configs/ti816x_evm.h3
-rw-r--r--include/configs/ti_am335x_common.h1
-rw-r--r--include/configs/ti_armv7_common.h21
-rw-r--r--include/configs/ti_omap3_common.h1
-rw-r--r--include/configs/ti_omap4_common.h1
-rw-r--r--include/configs/ti_omap5_common.h7
-rw-r--r--include/configs/tricorder.h3
-rw-r--r--include/configs/uniphier.h2
-rw-r--r--include/configs/vexpress_ca15_tc2.h1
-rw-r--r--include/dm/platform_data/serial_bcm283x_mu.h1
-rw-r--r--include/dt-bindings/gpio/meson-gxbb-gpio.h154
-rw-r--r--include/dt-bindings/reset/amlogic,meson-gxbb-reset.h210
-rw-r--r--include/efi.h2
-rw-r--r--lib/efi_loader/efi_memory.c3
-rwxr-xr-xtools/moveconfig.py102
140 files changed, 2203 insertions, 334 deletions
diff --git a/Kconfig b/Kconfig
index 45a06696a1..fdea71efaa 100644
--- a/Kconfig
+++ b/Kconfig
@@ -83,6 +83,7 @@ config SYS_MALLOC_F
config SYS_MALLOC_F_LEN
hex "Size of malloc() pool before relocation"
depends on SYS_MALLOC_F
+ default 0x2000 if SPL_DM && SPL_OF_CONTROL
default 0x400
help
Before relocation, memory is very limited on many platforms. Still,
diff --git a/README b/README
index 30d7ee3970..f41a6afc34 100644
--- a/README
+++ b/README
@@ -151,6 +151,7 @@ Directory Hierarchy:
/x86 Files generic to x86 architecture
/api Machine/arch independent API for external apps
/board Board dependent files
+/cmd U-Boot commands functions
/common Misc architecture independent functions
/configs Board default configuration files
/disk Code for disk drive partition handling
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c871eaf4e3..e63309ae9b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -459,6 +459,7 @@ config TARGET_AM335X_SL50
select CPU_V7
select SUPPORT_SPL
select DM
+ select DM_GPIO
select DM_SERIAL
config TARGET_BAV335X
@@ -816,10 +817,13 @@ config TARGET_LS1021AQDS
bool "Support ls1021aqds"
select CPU_V7
select SUPPORT_SPL
+ select ARCH_SUPPORT_PSCI
+
config TARGET_LS1021ATWR
bool "Support ls1021atwr"
select CPU_V7
select SUPPORT_SPL
+ select ARCH_SUPPORT_PSCI
config TARGET_LS1043AQDS
bool "Support ls1043aqds"
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 41c6639c13..b9c4f4e79b 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -6,6 +6,9 @@ config CPU_V7_HAS_NONSEC
config CPU_V7_HAS_VIRT
bool
+config ARCH_SUPPORT_PSCI
+ bool
+
config ARMV7_NONSEC
bool "Enable support for booting in non-secure mode" if EXPERT
depends on CPU_V7_HAS_NONSEC
@@ -31,6 +34,22 @@ config ARMV7_VIRT
---help---
Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
+config ARMV7_PSCI
+ bool "Enable PSCI support" if EXPERT
+ depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI
+ default y
+ help
+ Say Y here to enable PSCI support.
+
+config ARMV7_PSCI_NR_CPUS
+ int "Maximum supported CPUs for PSCI"
+ depends on ARMV7_NONSEC
+ default 4
+ help
+ The maximum number of CPUs supported in the PSCI firmware.
+ It is no problem to set a larger value than the number of
+ CPUs in the actual hardware implementation.
+
config ARMV7_LPAE
bool "Use LPAE page table format" if EXPERT
depends on CPU_V7
diff --git a/arch/arm/cpu/armv7/mx7/Kconfig b/arch/arm/cpu/armv7/mx7/Kconfig
index 5fdc8dd583..fb00b8c67c 100644
--- a/arch/arm/cpu/armv7/mx7/Kconfig
+++ b/arch/arm/cpu/armv7/mx7/Kconfig
@@ -5,6 +5,7 @@ config MX7
select ROM_UNIFIED_SECTIONS
select CPU_V7_HAS_VIRT
select CPU_V7_HAS_NONSEC
+ select ARCH_SUPPORT_PSCI
default y
config MX7D
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 36c9fd0bd0..0a5fae6efc 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -83,10 +83,10 @@ SECTIONS
#endif
{
KEEP(*(.__secure_stack_start))
-
+#ifdef CONFIG_ARMV7_PSCI
/* Skip addreses for stack */
. = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE;
-
+#endif
/* Align end of stack section to page boundary */
. = ALIGN(CONSTANT(COMMONPAGESIZE));
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 756535b75e..a4ab06964e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -244,6 +244,8 @@ dtb-$(CONFIG_MACH_SUN8I_A23) += \
sun8i-a23-q8-tablet.dtb
dtb-$(CONFIG_MACH_SUN8I_A33) += \
sun8i-a33-ga10h-v1.1.dtb \
+ sun8i-a33-inet-d978-rev2.dtb \
+ sun8i-a33-olinuxino.dtb \
sun8i-a33-q8-tablet.dtb \
sun8i-a33-sinlinx-sina33.dtb \
sun8i-r16-parrot.dtb
@@ -258,7 +260,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h3-orangepi-one.dtb \
sun8i-h3-orangepi-pc.dtb \
sun8i-h3-orangepi-pc-plus.dtb \
- sun8i-h3-orangepi-plus.dtb
+ sun8i-h3-orangepi-plus.dtb \
+ sun8i-h3-orangepi-plus2e.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb
diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts
index 4ca37faa09..e7c5db2f93 100644
--- a/arch/arm/dts/dra72-evm.dts
+++ b/arch/arm/dts/dra72-evm.dts
@@ -591,7 +591,7 @@
mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
};
-&cpsw_emac1 {
+&cpsw_emac0 {
phy_id = <&davinci_mdio>, <3>;
phy-mode = "rgmii";
};
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts
index 653c2fa785..79bee64c98 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2.dts
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -45,6 +45,7 @@
/dts-v1/;
#include "meson-gxbb.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
@@ -62,8 +63,26 @@
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
+
+ leds {
+ compatible = "gpio-leds";
+ blue {
+ label = "c2:blue:alive";
+ gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+ };
};
&uart_AO {
status = "okay";
+ pinctrl-0 = <&uart_ao_a_pins>;
+ pinctrl-names = "default";
+};
+
+&ethmac {
+ status = "okay";
+ pinctrl-0 = <&eth_pins>;
+ pinctrl-names = "default";
};
diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi
index 832815d804..e502c24b0a 100644
--- a/arch/arm/dts/meson-gxbb.dtsi
+++ b/arch/arm/dts/meson-gxbb.dtsi
@@ -43,6 +43,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/meson-gxbb-gpio.h>
+#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
/ {
compatible = "amlogic,meson-gxbb";
@@ -129,13 +131,35 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
+ reset: reset-controller@4404 {
+ compatible = "amlogic,meson-gxbb-reset";
+ reg = <0x0 0x04404 0x0 0x20>;
+ #reset-cells = <1>;
+ };
+
uart_A: serial@84c0 {
compatible = "amlogic,meson-uart";
- reg = <0x0 0x084c0 0x0 0x14>;
+ reg = <0x0 0x84c0 0x0 0x14>;
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>;
status = "disabled";
};
+
+ uart_B: serial@84dc {
+ compatible = "amlogic,meson-uart";
+ reg = <0x0 0x84dc 0x0 0x14>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>;
+ status = "disabled";
+ };
+
+ uart_C: serial@8700 {
+ compatible = "amlogic,meson-uart";
+ reg = <0x0 0x8700 0x0 0x14>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>;
+ status = "disabled";
+ };
};
gic: interrupt-controller@c4301000 {
@@ -158,6 +182,29 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
+ pinctrl_aobus: pinctrl@14 {
+ compatible = "amlogic,meson-gxbb-aobus-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio_ao: bank@14 {
+ reg = <0x0 0x00014 0x0 0x8>,
+ <0x0 0x0002c 0x0 0x4>,
+ <0x0 0x00024 0x0 0x8>;
+ reg-names = "mux", "pull", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ uart_ao_a_pins: uart_ao_a {
+ mux {
+ groups = "uart_tx_ao_a", "uart_rx_ao_a";
+ function = "uart_ao";
+ };
+ };
+ };
+
uart_AO: serial@4c0 {
compatible = "amlogic,meson-uart";
reg = <0x0 0x004c0 0x0 0x14>;
@@ -167,6 +214,115 @@
};
};
+ periphs: periphs@c8834000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xc8834000 0x0 0x2000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
+
+ rng {
+ compatible = "amlogic,meson-rng";
+ reg = <0x0 0x0 0x0 0x4>;
+ };
+
+ pinctrl_periphs: pinctrl@4b0 {
+ compatible = "amlogic,meson-gxbb-periphs-pinctrl";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gpio: bank@4b0 {
+ reg = <0x0 0x004b0 0x0 0x28>,
+ <0x0 0x004e8 0x0 0x14>,
+ <0x0 0x00120 0x0 0x14>,
+ <0x0 0x00430 0x0 0x40>;
+ reg-names = "mux", "pull", "pull-enable", "gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ emmc_pins: emmc {
+ mux {
+ groups = "emmc_nand_d07",
+ "emmc_cmd",
+ "emmc_clk";
+ function = "emmc";
+ };
+ };
+
+ sdcard_pins: sdcard {
+ mux {
+ groups = "sdcard_d0",
+ "sdcard_d1",
+ "sdcard_d2",
+ "sdcard_d3",
+ "sdcard_cmd",
+ "sdcard_clk";
+ function = "sdcard";
+ };
+ };
+
+ uart_a_pins: uart_a {
+ mux {
+ groups = "uart_tx_a",
+ "uart_rx_a";
+ function = "uart_a";
+ };
+ };
+
+ uart_b_pins: uart_b {
+ mux {
+ groups = "uart_tx_b",
+ "uart_rx_b";
+ function = "uart_b";
+ };
+ };
+
+ uart_c_pins: uart_c {
+ mux {
+ groups = "uart_tx_c",
+ "uart_rx_c";
+ function = "uart_c";
+ };
+ };
+
+ eth_pins: eth_c {
+ mux {
+ groups = "eth_mdio",
+ "eth_mdc",
+ "eth_clk_rx_clk",
+ "eth_rx_dv",
+ "eth_rxd0",
+ "eth_rxd1",
+ "eth_rxd2",
+ "eth_rxd3",
+ "eth_rgmii_tx_clk",
+ "eth_tx_en",
+ "eth_txd0",
+ "eth_txd1",
+ "eth_txd2",
+ "eth_txd3";
+ function = "eth";
+ };
+ };
+ };
+ };
+
+ hiubus: hiubus@c883c000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xc883c000 0x0 0x2000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
+
+ clkc: clock-controller@0 {
+ compatible = "amlogic,gxbb-clkc";
+ #clock-cells = <1>;
+ reg = <0x0 0x0 0x0 0x3db>;
+ };
+ };
+
apb: apb@d0000000 {
compatible = "simple-bus";
reg = <0x0 0xd0000000 0x0 0x200000>;
@@ -174,5 +330,17 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
};
+
+ ethmac: ethernet@c9410000 {
+ compatible = "amlogic,meson6-dwmac", "snps,dwmac";
+ reg = <0x0 0xc9410000 0x0 0x10000
+ 0x0 0xc8834540 0x0 0x4>;
+ interrupts = <0 8 1>;
+ interrupt-names = "macirq";
+ clocks = <&xtal>;
+ clock-names = "stmmaceth";
+ phy-mode = "rgmii";
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
new file mode 100644
index 0000000000..0f52cd9dfa
--- /dev/null
+++ b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
@@ -0,0 +1,88 @@
+/*
+ * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ * Copyright 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+#include "sun8i-reference-design-tablet.dtsi"
+
+/ {
+ model = "INet-D978 Rev 02";
+ compatible = "primux,inet-d978-rev2", "allwinner,sun8i-a33";
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pin_d978>;
+
+ home {
+ label = "d978:blue:home";
+ gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ };
+ };
+};
+
+&mmc1_pins_a {
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <&reg_dldo1>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723bs: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+&r_pio {
+ led_pin_d978: led_pin_d978@0 {
+ allwinner,pins = "PL5";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_20_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
diff --git a/arch/arm/dts/sun8i-a33-olinuxino.dts b/arch/arm/dts/sun8i-a33-olinuxino.dts
new file mode 100644
index 0000000000..9ea637e82b
--- /dev/null
+++ b/arch/arm/dts/sun8i-a33-olinuxino.dts
@@ -0,0 +1,226 @@
+/*
+ * Copyright 2016 - Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
+ * Olimex LTD. <support@olimex.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Olimex A33-OLinuXino";
+ compatible = "olimex,a33-olinuxino","allwinner,sun8i-a33";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pin_olinuxino>;
+
+ green {
+ label = "a33-olinuxino:green:usr";
+ gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>;
+ vmmc-supply = <&reg_dcdc1>;
+ bus-width = <4>;
+ cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+ cd-inverted;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&pio {
+ led_pin_olinuxino: led_pins@0 {
+ allwinner,pins = "PB7";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {
+ allwinner,pins = "PB4";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ usb0_id_detect_pin: usb0_id_detect_pin@0 {
+ allwinner,pins = "PB3";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp22x: pmic@3a3 {
+ compatible = "x-powers,axp223";
+ reg = <0x3a3>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ eldoin-supply = <&reg_dcdc1>;
+ x-powers,drive-vbus-en;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&reg_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-io";
+};
+
+&reg_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <2350000>;
+ regulator-max-microvolt = <2650000>;
+ regulator-name = "vdd-dll";
+};
+
+&reg_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-avcc";
+};
+
+&reg_dc1sw {
+ regulator-name = "vcc-lcd";
+};
+
+&reg_dc5ldo {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-cpus";
+};
+
+&reg_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-sys";
+};
+
+&reg_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+&reg_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+&reg_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&simplefb_lcd {
+ vcc-lcd-supply = <&reg_dc1sw>;
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_b>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usb_power_supply {
+ status = "okay";
+};
+
+&usbphy {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_id_detect_pin>;
+ usb0_id_det-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
+ usb0_vbus_power-supply = <&usb_power_supply>;
+ usb0_vbus-supply = <&reg_drivevbus>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts b/arch/arm/dts/sun8i-h3-orangepi-2.dts
index f89fe00dde..caa1a6959c 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts
@@ -109,6 +109,17 @@
status = "okay";
};
+&emac {
+ phy = <&phy1>;
+ phy-mode = "mii";
+ allwinner,use-internal-phy;
+ allwinner,leds-active-low;
+ status = "okay";
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
index 24f8e974c4..b8340f74e7 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
@@ -169,6 +169,7 @@
&emac {
phy = <&phy1>;
phy-mode = "mii";
+ allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
phy1: ethernet-phy@1 {
diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
index 4f4bb0f3c0..e7079b26bc 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
@@ -44,21 +44,9 @@
#include "sun8i-h3-orangepi-2.dts"
/ {
- model = "Xunlong Orange Pi Plus / Plus 2 / Plus 2E";
+ model = "Xunlong Orange Pi Plus / Plus 2";
compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
- reg_usb3_vbus: usb3-vbus {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&usb3_vbus_pin_a>;
- regulator-name = "usb3-vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-boot-on;
- enable-active-high;
- gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
- };
-
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
@@ -70,16 +58,33 @@
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
-};
-&ehci2 {
- status = "okay";
+ reg_usb3_vbus: usb3-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb3_vbus_pin_a>;
+ regulator-name = "usb3-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ };
};
&ehci3 {
status = "okay";
};
+&emac {
+ /* The Orange Pi Plus uses an external phy */
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-mode = "rgmii";
+ /delete-property/allwinner,use-internal-phy;
+};
+
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
@@ -97,28 +102,16 @@
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
-&ohci1 {
- status = "okay";
-};
-
-&ohci2 {
- status = "okay";
-};
-
-&ohci3 {
- status = "okay";
-};
-
&pio {
- usb3_vbus_pin_a: usb3_vbus_pin@0 {
- allwinner,pins = "PG11";
+ gmac_power_pin_orangepi: gmac_power_pin@0 {
+ allwinner,pins = "PD6";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
- gmac_power_pin_orangepi: gmac_power_pin@0 {
- allwinner,pins = "PD6";
+ usb3_vbus_pin_a: usb3_vbus_pin@0 {
+ allwinner,pins = "PG11";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
@@ -128,18 +121,3 @@
&usbphy {
usb3_vbus-supply = <&reg_usb3_vbus>;
};
-
-&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <&reg_gmac_3v3>;
- phy = <&phy1>;
- phy-mode = "rgmii";
-
- allwinner,leds-active-low;
- status = "okay";
-
- phy1: ethernet-phy@1 {
- reg = <0>;
- };
-};
diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
new file mode 100644
index 0000000000..f97b040b35
--- /dev/null
+++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2016 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * The Orange Pi Plus 2E is an extended version of the Orange Pi PC Plus,
+ * with 2G RAM and an external gbit ethernet phy.
+ */
+
+#include "sun8i-h3-orangepi-pc-plus.dts"
+
+/ {
+ model = "Xunlong Orange Pi Plus 2E";
+ compatible = "xunlong,orangepi-plus2e", "allwinner,sun8i-h3";
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_orangepi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&emac {
+ /* The Orange Pi Plus 2E uses an external gbit phy */
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-mode = "rgmii";
+ /delete-property/allwinner,use-internal-phy;
+};
+
+&pio {
+ gmac_power_pin_orangepi: gmac_power_pin@0 {
+ allwinner,pins = "PD6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi
index 6babaf3717..afa60793a2 100644
--- a/arch/arm/dts/sun8i-h3.dtsi
+++ b/arch/arm/dts/sun8i-h3.dtsi
@@ -466,9 +466,8 @@
emac: ethernet@1c30000 {
compatible = "allwinner,sun8i-h3-emac";
- syscon = <&syscon>;
- reg = <0x01c30000 0x104>;
- reg-names = "emac";
+ reg = <0x01c30000 0x104>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
reset-names = "ahb", "ephy";
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h
index 47962dadf5..3293caaca4 100644
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -15,24 +15,23 @@
#ifndef _OMAP_H_
#define _OMAP_H_
+#include <linux/sizes.h>
+
#ifdef CONFIG_AM33XX
#define NON_SECURE_SRAM_START 0x402F0400
#define NON_SECURE_SRAM_END 0x40310000
-#define SRAM_SCRATCH_SPACE_ADDR 0x4030B800
+#define NON_SECURE_SRAM_IMG_END 0x4030B800
#elif defined(CONFIG_TI81XX)
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40320000
-#define SRAM_SCRATCH_SPACE_ADDR 0x4031B800
+#define NON_SECURE_SRAM_IMG_END 0x4031B800
#elif defined(CONFIG_AM43XX)
#define NON_SECURE_SRAM_START 0x402F0400
#define NON_SECURE_SRAM_END 0x40340000
-#define SRAM_SCRATCH_SPACE_ADDR 0x40337C00
-#define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR
-#define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC
-#define AM4372_BOARD_VERSION_START SRAM_SCRATCH_SPACE_ADDR + 0xD
-#define AM4372_BOARD_VERSION_END SRAM_SCRATCH_SPACE_ADDR + 0x14
+#define NON_SECURE_SRAM_IMG_END 0x40337DE0
#define QSPI_BASE 0x47900000
#endif
+#define SRAM_SCRATCH_SPACE_ADDR (NON_SECURE_SRAM_IMG_END - SZ_1K)
/* Boot parameters */
#ifndef __ASSEMBLY__
diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h
index f90f632daf..ce41349792 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -20,9 +20,6 @@
#define GXBB_GPIO_IN(n) GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 1)
#define GXBB_GPIO_OUT(n) GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 2)
-/* Pinmux registers 0 to 12 */
-#define GXBB_PINMUX(n) GXBB_PERIPHS_ADDR(0x2c + (n))
-
#define GXBB_ETH_REG_0 GXBB_PERIPHS_ADDR(0x50)
#define GXBB_ETH_REG_1 GXBB_PERIPHS_ADDR(0x51)
diff --git a/arch/arm/include/asm/arch-omap3/omap.h b/arch/arm/include/asm/arch-omap3/omap.h
index bc0e02a200..417ff895f1 100644
--- a/arch/arm/include/asm/arch-omap3/omap.h
+++ b/arch/arm/include/asm/arch-omap3/omap.h
@@ -10,6 +10,8 @@
#ifndef _OMAP3_H_
#define _OMAP3_H_
+#include <linux/sizes.h>
+
/* Stuff on L3 Interconnect */
#define SMX_APE_BASE 0x68000000
@@ -145,7 +147,8 @@ struct gpio {
#define NON_SECURE_SRAM_START 0x40208000 /* Works for GP & EMU */
#define NON_SECURE_SRAM_END 0x40210000
-#define SRAM_SCRATCH_SPACE_ADDR 0x4020E000
+#define NON_SECURE_SRAM_IMG_END 0x4020F000
+#define SRAM_SCRATCH_SPACE_ADDR (NON_SECURE_SRAM_IMG_END - SZ_1K)
#define LOW_LEVEL_SRAM_STACK 0x4020FFFC
diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 5ccda6ee94..b86a776840 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -19,6 +19,8 @@
#include <asm/types.h>
#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
+#include <linux/sizes.h>
+
/*
* L4 Peripherals - L4 Wakeup and L4 Core now
*/
@@ -109,7 +111,8 @@ struct s32ktimer {
*/
#define NON_SECURE_SRAM_START 0x40304000
#define NON_SECURE_SRAM_END 0x4030E000 /* Not inclusive */
-#define SRAM_SCRATCH_SPACE_ADDR 0x4030C000
+#define NON_SECURE_SRAM_IMG_END 0x4030C000
+#define SRAM_SCRATCH_SPACE_ADDR (NON_SECURE_SRAM_IMG_END - SZ_1K)
/* base address for indirect vectors (internal boot mode) */
#define SRAM_ROM_VECT_BASE 0x4030D000
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 2fd5cda623..ef8e975245 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -16,6 +16,8 @@
#include <asm/types.h>
#endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
+#include <linux/sizes.h>
+
/*
* L4 Peripherals - L4 Wakeup and L4 Core now
*/
@@ -186,11 +188,13 @@ struct s32ktimer {
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
+#define NON_SECURE_SRAM_IMG_END 0x4037E000
#else
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40320000 /* Not inclusive */
+#define NON_SECURE_SRAM_IMG_END 0x4031E000
#endif
-#define SRAM_SCRATCH_SPACE_ADDR 0x4031E000
+#define SRAM_SCRATCH_SPACE_ADDR (NON_SECURE_SRAM_IMG_END - SZ_1K)
/* base address for indirect vectors (internal boot mode) */
#define SRAM_ROM_VECT_BASE 0x4031F000
diff --git a/arch/arm/mach-bcm283x/include/mach/gpio.h b/arch/arm/mach-bcm283x/include/mach/gpio.h
index e6e5d1605d..b2df75ad3f 100644
--- a/arch/arm/mach-bcm283x/include/mach/gpio.h
+++ b/arch/arm/mach-bcm283x/include/mach/gpio.h
@@ -66,4 +66,6 @@ struct bcm2835_gpio_platdata {
unsigned long base;
};
+int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio);
+
#endif /* _BCM2835_GPIO_H_ */
diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig
index 9e21e3099d..df77462283 100644
--- a/arch/arm/mach-tegra/tegra124/Kconfig
+++ b/arch/arm/mach-tegra/tegra124/Kconfig
@@ -6,8 +6,9 @@ choice
config TARGET_JETSON_TK1
bool "NVIDIA Tegra124 Jetson TK1 board"
- select CPU_V7_HAS_NONSEC if !SPL_BUILD
- select CPU_V7_HAS_VIRT if !SPL_BUILD
+ select CPU_V7_HAS_NONSEC
+ select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
config TARGET_CEI_TK1_SOM
bool "Colorado Engineering Inc Tegra124 TK1-som board"
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 89614581bb..7bee6c7a29 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -8,6 +8,7 @@ config ARCH_UNIPHIER_32BIT
select CPU_V7
select CPU_V7_HAS_NONSEC
select ARMV7_NONSEC
+ select ARCH_SUPPORT_PSCI
config ARCH_UNIPHIER_64BIT
bool
diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c
index bd72100e09..b61daaa4a7 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -21,24 +21,11 @@ int board_init(void)
return 0;
}
-static const struct eth_pdata gxbb_eth_pdata = {
- .iobase = GXBB_ETH_BASE,
- .phy_interface = PHY_INTERFACE_MODE_RGMII,
-};
-
-U_BOOT_DEVICE(meson_eth) = {
- .name = "eth_designware",
- .platdata = &gxbb_eth_pdata,
-};
-
int misc_init_r(void)
{
u8 mac_addr[EFUSE_MAC_SIZE];
ssize_t len;
- /* Select Ethernet function */
- setbits_le32(GXBB_PINMUX(6), 0x3fff);
-
/* Set RGMII mode */
setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
GXBB_ETH_REG_0_TX_PHASE(1) |
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index 51d2987566..c2bb730e97 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -144,20 +144,8 @@ static struct musb_hdrc_platform_data musb_plat = {
*/
int misc_init_r(void)
{
- t2_t *t2_base = (t2_t *)T2_BASE;
- u32 pbias_lite;
- /* set up dual-voltage GPIOs to 1.8V */
- pbias_lite = readl(&t2_base->pbias_lite);
- pbias_lite &= ~PBIASLITEVMODE1;
- pbias_lite |= PBIASLITEPWRDNZ1;
- writel(pbias_lite, &t2_base->pbias_lite);
- if (get_cpu_family() == CPU_OMAP36XX)
- writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ,
- CONTROL_WKUP_CTRL);
twl4030_power_init();
-
omap_die_id_display();
- putc('\n');
#ifdef CONFIG_USB_MUSB_OMAP2PLUS
musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index fbfbf6cbbc..6245b3678f 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -50,7 +50,7 @@ U_BOOT_DEVICE(bcm2835_serials) = {
.platdata = &serial_platdata,
};
#else
-static const struct bcm283x_mu_serial_platdata serial_platdata = {
+static struct bcm283x_mu_serial_platdata serial_platdata = {
.base = 0x3f215040,
.clock = 250000000,
.skip_init = true,
@@ -452,6 +452,38 @@ int board_init(void)
return power_on_module(BCM2835_MBOX_POWER_DEVID_USB_HCD);
}
+#ifndef CONFIG_PL01X_SERIAL
+static bool rpi_is_serial_active(void)
+{
+ int serial_gpio = 15;
+ struct udevice *dev;
+
+ /*
+ * The RPi3 disables the mini uart by default. The easiest way to find
+ * out whether it is available is to check if the RX pin is muxed.
+ */
+
+ if (uclass_first_device(UCLASS_GPIO, &dev) || !dev)
+ return true;
+
+ if (bcm2835_gpio_get_func_id(dev, serial_gpio) != BCM2835_GPIO_ALT5)
+ return false;
+
+ return true;
+}
+#endif
+
+int board_early_init_f(void)
+{
+#ifndef CONFIG_PL01X_SERIAL
+ /* Disable mini-UART I/O if it's not pinmuxed to our pins */
+ if (!rpi_is_serial_active())
+ serial_platdata.disabled = true;
+#endif
+
+ return 0;
+}
+
int board_mmc_init(bd_t *bis)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1);
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 1b30669230..68443c9931 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -37,6 +37,7 @@ config MACH_SUN6I
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -46,6 +47,7 @@ config MACH_SUN7I
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN4I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -55,6 +57,7 @@ config MACH_SUN8I_A23
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -64,6 +67,7 @@ config MACH_SUN8I_A33
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -79,6 +83,7 @@ config MACH_SUN8I_H3
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
+ select ARCH_SUPPORT_PSCI
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -426,7 +431,7 @@ config AXP_GPIO
config VIDEO
bool "Enable graphical uboot console on HDMI, LCD or VGA"
- depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I_A64
+ depends on !MACH_SUN8I_A83T && !MACH_SUN8I_H3 && !MACH_SUN9I && !MACH_SUN50I
default y
---help---
Say Y here to add support for using a cfb console on the HDMI, LCD
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 7072bd8525..6f13cf68df 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -63,6 +63,7 @@ F: configs/orangepi_one_defconfig
F: configs/orangepi_pc_defconfig
F: configs/orangepi_pc_plus_defconfig
F: configs/orangepi_plus_defconfig
+F: configs/orangepi_plus2e_defconfig
F: configs/polaroid_mid2407pxe03_defconfig
F: configs/polaroid_mid2809pxe04_defconfig
F: configs/q8_a23_tablet_800x480_defconfig
@@ -88,6 +89,11 @@ M: Iain Paton <ipaton0@gmail.com>
S: Maintained
F: configs/A20-OLinuXino-Lime2_defconfig
+A33-OLINUXINO BOARD
+M: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
+S: Maintained
+F: configs/A33-OLinuXino_defconfig
+
AINOL AW1 BOARD
M: Paul Kocialkowski <contact@paulk.fr>
S: Maintained
@@ -156,6 +162,11 @@ M: Michal Suchanek <hramrach@gmail.com>
S: Maintained
F: configs/iNet_86VS_defconfig
+INET D978 BOARD
+M: Icenowy Zheng <icenowy@aosc.xyz>
+S: Maintained
+F: configs/iNet_D978_rev2_defconfig
+
LAMOBO-R1 BOARD
M: Jelle de Jong <jelledejong@powercraft.nl>
S: Maintained
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 209fb1cfd8..6281c9d703 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -602,7 +602,7 @@ static void parse_spl_header(const uint32_t spl_addr)
* data is expected in uEnv.txt compatible format, so "env
* import -t" the string(s) at fel_script_address right away.
*/
- himport_r(&env_htab, (char *)spl->fel_script_address,
+ himport_r(&env_htab, (char *)(uintptr_t)spl->fel_script_address,
spl->fel_uEnv_length, '\n', H_NOCLEAR, 0, 0, NULL);
return;
}
diff --git a/board/tcl/sl50/Kconfig b/board/tcl/sl50/Kconfig
index 390a47631e..d0068d9324 100644
--- a/board/tcl/sl50/Kconfig
+++ b/board/tcl/sl50/Kconfig
@@ -22,10 +22,4 @@ config CONS_INDEX
board you may want something other than UART0 as for example the IDK
uses UART3 so enter 4 here.
-config DM_GPIO
- default y
-
-config DM_SERIAL
- default y
-
endif
diff --git a/board/ti/am57xx/MAINTAINERS b/board/ti/am57xx/MAINTAINERS
index b8ae0199e3..500bb7a612 100644
--- a/board/ti/am57xx/MAINTAINERS
+++ b/board/ti/am57xx/MAINTAINERS
@@ -1,7 +1,8 @@
AM57XX EVM
-M: Felipe Balbi <balbi@ti.com>
+M: Lokesh Vutla <lokeshvutla@ti.com>
S: Maintained
F: board/ti/am57xx/
F: include/configs/am57xx_evm.h
F: configs/am57xx_evm_defconfig
F: configs/am57xx_evm_nodt_defconfig
+F: configs/am57xx_hs_evm_defconfig
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 927d1364fe..64de602541 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -338,7 +338,9 @@ static void setup_board_eeprom_env(void)
if (rc)
goto invalid_eeprom;
- if (board_is_am572x_evm())
+ if (board_is_x15())
+ name = "beagle_x15";
+ else if (board_is_am572x_evm())
name = "am57xx_evm";
else if (board_is_am572x_idk())
name = "am572x_idk";
diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README
index 05baff6e33..5430c7daf2 100644
--- a/board/ti/ks2_evm/README
+++ b/board/ti/ks2_evm/README
@@ -20,6 +20,9 @@ The K2E SoC details are available at
The K2L SoC details are available at
http://www.ti.com/lit/ds/symlink/tci6630k2l.pdf
+The K2G SoC details are available at
+ http://www.ti.com/lit/ds/symlink/66ak2g02.pdf
+
Board configuration:
====================
@@ -30,6 +33,7 @@ Some of the peripherals that are configured by U-Boot
|K2HK |2 |512MB |6MB |4(2) |2 |3 |3 |
|K2E |4 |512MB |2MB |8(2) |2 |3 |3 |
|K2L |2 |512MB |2MB |4(2) |4 |3 |3 |
+|K2G |2 |256MB |1MB |1 |1 |1 |1 |
+------+-------+-------+-----------+-----------+-------+-------+----+
There are only 2 eth port installed on the boards.
@@ -47,44 +51,48 @@ Board configuration files:
include/configs/k2hk_evm.h
include/configs/k2e_evm.h
include/configs/k2l_evm.h
+include/configs/k2g_evm.h
As U-Boot is migrating to Kconfig there is also board defconfig files
configs/k2e_evm_defconfig
configs/k2hk_evm_defconfig
configs/k2l_evm_defconfig
+configs/k2g_evm_defconfig
Supported boot modes:
- SPI NOR boot
- AEMIF NAND boot
- UART boot
+ - MMC boot (Only on K2G)
Supported image formats:
- - u-boot-dtb.bin: for loading and running u-boot-dtb.bin through
+ - u-boot.bin: for loading and running u-boot.bin through
Texas Instruments code composure studio (CCS) and for UART boot.
- u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
- - MLO: gpimage for programming AEMIF NAND flash for NAND boot
+ - MLO: gpimage for programming AEMIF NAND flash for NAND boot, MMC boot.
Build instructions:
===================
-Examples for k2hk, for k2e and k2l just replace k2hk prefix accordingly.
+Examples for k2hk, for k2e, k2l and k2g just replace k2hk prefix accordingly.
Don't forget to add ARCH=arm and CROSS_COMPILE.
-To build u-boot-dtb.bin, u-boot-spi.gph, MLO:
+To build u-boot.bin, u-boot-spi.gph, MLO:
>make k2hk_evm_defconfig
>make
Load and Run U-Boot on keystone EVMs using CCS
=========================================
-Need Code Composer Studio (CCS) installed on a PC to load and run u-boot-dtb.bin
+Need Code Composer Studio (CCS) installed on a PC to load and run u-boot.bin
on EVM. See instructions at below link for installing CCS on a Windows PC.
http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started#
Installing_Code_Composer_Studio
-Use u-boot-dtb.bin from the build folder for loading and running U-Boot binary
+Use u-boot.bin from the build folder for loading and running U-Boot binary
on EVM. Follow instructions at
K2HK http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup
K2E http://processors.wiki.ti.com/index.php/EVMK2E_Hardware_Setup
K2L http://processors.wiki.ti.com/index.php/TCIEVMK2L_Hardware_Setup
+K2G http://processors.wiki.ti.com/index.php/66AK2G02_GP_EVM_Hardware_Setup
to configure SW1 dip switch to use "No Boot/JTAG DSP Little Endian Boot Mode"
and Power ON the EVM. Follow instructions to connect serial port of EVM to
@@ -100,13 +108,13 @@ loading the U-Boot binary on the target EVM. Instead do the following:-
is connected: Unknown)" at the debug window (This is created once Target
configuration is launched) and select "Connect Target".
2. Once target connect is successful, choose Tools->Load Memory option from the
- top level menu. At the Load Memory window, choose the file u-boot-dtb.bin
+ top level menu. At the Load Memory window, choose the file u-boot.bin
through "Browse" button and click "next >" button. In the next window, enter
- Start address as 0xc001000, choose Type-size "32 bits" and click "Finish"
+ Start address as 0xc000000, choose Type-size "32 bits" and click "Finish"
button.
3. Click View -> Registers from the top level menu to view registers window.
4. From Registers, window expand "Core Registers" to view PC. Edit PC value
- to be 0xc001000. From the "Run" top level menu, select "Free Run"
+ to be 0xc000000. From the "Run" top level menu, select "Free Run"
5. The U-Boot prompt is shown at the Tera Term/ Hyper terminal console as
below and type any key to stop autoboot as instructed :=
@@ -167,8 +175,20 @@ Load and Run U-Boot on keystone EVMs using UART download
Open BMC and regular UART terminals.
-1. On the regular UART port start xmodem transfer of the u-boot-dtb.bin
+1. On the regular UART port start xmodem transfer of the u-boot.bin
2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM
BMC> bootmode #4
MBC> reboot
3. When xmodem is complete you should see the U-Boot starts on the UART port
+
+Load and Run U-Boot on K2G EVMs using MMC
+========================================================
+
+Open BMC and regular UART terminals.
+
+1. Set the SW3 dip switch to "ARM MMC Boot mode" as per instruction at
+ http://processors.wiki.ti.com/index.php/66AK2G02_GP_EVM_Hardware_Setup
+2. Create SD card partitions as per steps given in Hardware Setup Guide.
+3. Copy MLO to Boot Partition.
+4. Insert SD card and Power on the EVM.
+ The EVM now boots with U-Boot image from SD card.
diff --git a/cmd/nand.c b/cmd/nand.c
index 97f1619ffd..c16ec77ed4 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c
@@ -191,7 +191,7 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const argv[])
struct mtd_info *mtd = nand_info[0];
char *cmd = argv[1];
- if (CONFIG_SYS_MAX_NAND_DEVICE == 0 || !mtd->name) {
+ if (CONFIG_SYS_MAX_NAND_DEVICE == 0 || !mtd) {
puts("no devices available\n");
return 1;
}
@@ -398,7 +398,7 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
putc('\n');
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) {
- if (nand_info[i]->name)
+ if (nand_info[i])
nand_print_and_set_info(i);
}
return 0;
@@ -433,7 +433,7 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
* for another device is to be used.
*/
if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE ||
- !nand_info[dev]->name) {
+ !nand_info[dev]) {
puts("\nno devices available\n");
return 1;
}
@@ -991,7 +991,7 @@ usage:
idx = simple_strtoul(boot_device, NULL, 16);
- if (idx < 0 || idx >= CONFIG_SYS_MAX_NAND_DEVICE || !nand_info[idx]->name) {
+ if (idx < 0 || idx >= CONFIG_SYS_MAX_NAND_DEVICE || !nand_info[idx]) {
printf("\n** Device %d not available\n", idx);
bootstage_error(BOOTSTAGE_ID_NAND_AVAILABLE);
return 1;
diff --git a/cmd/pxe.c b/cmd/pxe.c
index 9434a18177..0a07f14ca8 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -620,7 +620,7 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
char initrd_str[22];
char mac_str[29] = "";
char ip_str[68] = "";
- int bootm_argc = 3;
+ int bootm_argc = 2;
int len = 0;
ulong kernel_addr;
void *buf;
@@ -652,8 +652,6 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
strcpy(bootm_argv[2], getenv("ramdisk_addr_r"));
strcat(bootm_argv[2], ":");
strcat(bootm_argv[2], getenv("filesize"));
- } else {
- bootm_argv[2] = "-";
}
if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
@@ -785,8 +783,11 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
if (!bootm_argv[3])
bootm_argv[3] = getenv("fdt_addr");
- if (bootm_argv[3])
+ if (bootm_argv[3]) {
+ if (!bootm_argv[2])
+ bootm_argv[2] = "-";
bootm_argc = 4;
+ }
kernel_addr = genimg_get_kernel_addr(bootm_argv[1]);
buf = map_sysmem(kernel_addr, 0);
diff --git a/common/Kconfig b/common/Kconfig
index 46e7173c7c..4494112744 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -9,13 +9,13 @@ config BOOTSTAGE
give the entry a name with bootstage_mark_name(). You can also
record elapsed time in a particular stage using bootstage_start()
before starting and bootstage_accum() when finished. Bootstage will
- add up all the accumated time and report it.
+ add up all the accumulated time and report it.
Normally, IDs are defined in bootstage.h but a small number of
- additional 'user' IDs can be used but passing BOOTSTAGE_ID_ALLOC
+ additional 'user' IDs can be used by passing BOOTSTAGE_ID_ALLOC
as the ID.
- Calls to show_boot_progress() wil also result in log entries but
+ Calls to show_boot_progress() will also result in log entries but
these will not have names.
config BOOTSTAGE_REPORT
@@ -53,7 +53,7 @@ config BOOTSTAGE_FDT
Stash the bootstage information in the FDT. A root 'bootstage'
node is created with each bootstage id as a child. Each child
has a 'name' property and either 'mark' containing the
- mark time in microsecond, or 'accum' containing the
+ mark time in microseconds, or 'accum' containing the
accumulated time for that bootstage id in microseconds.
For example:
@@ -114,7 +114,7 @@ config NAND_BOOT
help
Enabling this will make a U-Boot binary that is capable of being
booted via NAND flash. This is not a must, some SoCs need this,
- somes not.
+ some not.
config ONENAND_BOOT
bool "Support for booting from ONENAND"
@@ -122,7 +122,7 @@ config ONENAND_BOOT
help
Enabling this will make a U-Boot binary that is capable of being
booted via ONENAND. This is not a must, some SoCs need this,
- somes not.
+ some not.
config QSPI_BOOT
bool "Support for booting from QSPI flash"
@@ -130,7 +130,7 @@ config QSPI_BOOT
help
Enabling this will make a U-Boot binary that is capable of being
booted via QSPI flash. This is not a must, some SoCs need this,
- somes not.
+ some not.
config SATA_BOOT
bool "Support for booting from SATA"
@@ -138,7 +138,7 @@ config SATA_BOOT
help
Enabling this will make a U-Boot binary that is capable of being
booted via SATA. This is not a must, some SoCs need this,
- somes not.
+ some not.
config SD_BOOT
bool "Support for booting from SD/EMMC"
@@ -146,7 +146,7 @@ config SD_BOOT
help
Enabling this will make a U-Boot binary that is capable of being
booted via SD/EMMC. This is not a must, some SoCs need this,
- somes not.
+ some not.
config SPI_BOOT
bool "Support for booting from SPI flash"
@@ -154,7 +154,7 @@ config SPI_BOOT
help
Enabling this will make a U-Boot binary that is capable of being
booted via SPI flash. This is not a must, some SoCs need this,
- somes not.
+ some not.
endmenu
@@ -174,7 +174,7 @@ config CONSOLE_RECORD
bool "Console recording"
help
This provides a way to record console output (and provide console
- input) through cirular buffers. This is mostly useful for testing.
+ input) through circular buffers. This is mostly useful for testing.
Console output is recorded even when the console is silent.
To enable console recording, call console_record_reset_enable()
from your code.
diff --git a/common/image-fit.c b/common/image-fit.c
index d8d4e95030..9ce68f1c21 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1566,7 +1566,7 @@ int fit_get_node_from_config(bootm_headers_t *images, const char *prop_name,
noffset = fit_conf_get_prop_node(fit_hdr, cfg_noffset, prop_name);
if (noffset < 0) {
debug("* %s: no '%s' in config\n", prop_name, prop_name);
- return -ENOLINK;
+ return -ENOENT;
}
return noffset;
@@ -1712,7 +1712,8 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
(image_type == IH_TYPE_KERNEL &&
fit_image_check_type(fit, noffset, IH_TYPE_KERNEL_NOLOAD));
- os_ok = image_type == IH_TYPE_FLATDT || IH_TYPE_FPGA ||
+ os_ok = image_type == IH_TYPE_FLATDT ||
+ image_type == IH_TYPE_FPGA ||
fit_image_check_os(fit, noffset, IH_OS_LINUX) ||
fit_image_check_os(fit, noffset, IH_OS_U_BOOT) ||
fit_image_check_os(fit, noffset, IH_OS_OPENRTOS);
diff --git a/common/spl/spl.c b/common/spl/spl.c
index b7ec333c8a..e14ec8052e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -129,10 +129,8 @@ int spl_parse_image_header(const struct image_header *header)
* is bad, and thus should be skipped silently.
*/
panic("** no mkimage signature but raw image not supported");
-#elif defined(CONFIG_SPL_ABORT_ON_RAW_IMAGE)
- /* Signature not found, proceed to other boot methods. */
- return -EINVAL;
-#else
+#endif
+
#ifdef CONFIG_SPL_OS_BOOT
ulong start, end;
@@ -147,6 +145,11 @@ int spl_parse_image_header(const struct image_header *header)
return 0;
}
#endif
+
+#ifdef CONFIG_SPL_ABORT_ON_RAW_IMAGE
+ /* Signature not found, proceed to other boot methods. */
+ return -EINVAL;
+#else
/* Signature not found - assume u-boot.bin */
debug("mkimage signature not found - ih_magic = %x\n",
header->ih_magic);
diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig
new file mode 100644
index 0000000000..a175a40bad
--- /dev/null
+++ b/configs/A33-OLinuXino_defconfig
@@ -0,0 +1,43 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_A33=y
+
+CONFIG_DRAM_CLK=432
+CONFIG_DRAM_ZQ=15291
+CONFIG_DRAM_ODT_EN=y
+
+CONFIG_MMC0_CD_PIN="PB4"
+CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
+CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
+CONFIG_AXP_GPIO=y
+CONFIG_USB0_ID_DET="PB3"
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_VGA_VIA_LCD is not set
+CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0"
+CONFIG_VIDEO_LCD_DCLK_PHASE=0
+CONFIG_VIDEO_LCD_POWER=""
+CONFIG_VIDEO_LCD_RESET=""
+CONFIG_VIDEO_LCD_BL_EN="PB2"
+CONFIG_VIDEO_LCD_BL_PWM="PH0"
+CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW=y
+
+CONFIG_AXP_DCDC1_VOLT=3300
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 1553196a1f..7861035993 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -8,12 +8,13 @@ CONFIG_SPL_STACK_R_ADDR=0x82000000
# Device tree file can be same on HS evm
CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_SPL=y
-CONFIG_ISW_ENTRY_ADDR=0x40302ae0
+CONFIG_ISW_ENTRY_ADDR=0x403018e0
CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND"
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index a4bfdd594e..afd37d4344 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -41,6 +41,7 @@ CONFIG_FIT=y
CONFIG_SPL_OF_LIBFDT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_OF_LIST="am57xx-beagle-x15"
CONFIG_DM_I2C=y
CONFIG_DM_SPI=y
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 3bf538891b..778cf06a8a 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_CLEARFOG=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
CONFIG_SPL=y
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index f06f27f9c5..b6df9610e0 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DB_88F6720=y
CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 123e7fccd7..7ac7457d5e 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DB_88F6820_GP=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
CONFIG_SPL=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index f2c4a9ee6a..510554e341 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DB_MV784MP_GP=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index ae08e6d7dd..d6e4e07ad6 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -65,3 +65,4 @@ CONFIG_PCF8575_GPIO=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_CMD_REGULATOR=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index a21473255c..ec23c77932 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_DS414=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
CONFIG_SPL=y
diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig
new file mode 100644
index 0000000000..d87a61ce93
--- /dev/null
+++ b/configs/iNet_D978_rev2_defconfig
@@ -0,0 +1,26 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_A33=y
+CONFIG_DRAM_CLK=456
+CONFIG_DRAM_ZQ=15291
+CONFIG_MMC0_CD_PIN="PB4"
+CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
+CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
+CONFIG_USB0_ID_DET="PH8"
+CONFIG_AXP_GPIO=y
+CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:65000,le:120,ri:180,up:22,lo:13,hs:20,vs:3,sync:3,vmode:0"
+CONFIG_VIDEO_LCD_DCLK_PHASE=0
+CONFIG_VIDEO_LCD_POWER="PH7"
+CONFIG_VIDEO_LCD_BL_EN="PH6"
+CONFIG_VIDEO_LCD_BL_PWM="PH0"
+CONFIG_VIDEO_LCD_PANEL_LVDS=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_AXP_DLDO1_VOLT=3300
+CONFIG_USB_MUSB_HOST=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index b67bc51fe1..22186c3337 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_MAXBCM=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
CONFIG_SPL=y
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 808bbc2b89..3e9ef68204 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -14,6 +14,9 @@ CONFIG_HUSH_PARSER=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXBB=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_MESON=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig
index 8b1082cd3e..e2f6a83d24 100644
--- a/configs/orangepi_2_defconfig
+++ b/configs/orangepi_2_defconfig
@@ -15,3 +15,4 @@ CONFIG_SPL=y
# CONFIG_CMD_FPGA is not set
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
+CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig
new file mode 100644
index 0000000000..c900fe2f21
--- /dev/null
+++ b/configs/orangepi_plus2e_defconfig
@@ -0,0 +1,19 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC0_CD_PIN="PF6"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+# CONFIG_VIDEO is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPD(6)"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_SY8106A_POWER=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
index 9ff433286f..5bb3bba89b 100644
--- a/configs/orangepi_plus_defconfig
+++ b/configs/orangepi_plus_defconfig
@@ -11,9 +11,10 @@ CONFIG_USB1_VBUS_PIN="PG13"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPG(11)"
+CONFIG_SYS_EXTRA_OPTIONS="SATAPWR=SUNXI_GPG(11),MACPWR=SUNXI_GPD(6)"
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
+CONFIG_SUN8I_EMAC=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index 922e01bfcb..c59474cdf0 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -20,3 +20,5 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_PHYS_TO_BUS=y
CONFIG_OF_LIBFDT=y
+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_SYS_MALLOC_F_LEN=0x2000
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index bff92df9d9..67c4a0cbe6 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -19,3 +19,5 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_PHYS_TO_BUS=y
CONFIG_OF_LIBFDT=y
+# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
+CONFIG_SYS_MALLOC_F_LEN=0x2000
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 0f6dda8c7e..ccb31e3c5c 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -1,4 +1,3 @@
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_MMC=y
CONFIG_SANDBOX_SPL=y
CONFIG_PCI=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index 1bec9696fa..a3797af7a9 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 0437cbe009..5798662c39 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 7c05e6aed0..9bba2de161 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 58661c0b2f..b1d7fffe9b 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_SOCFPGA_IS1=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 517a6de809..f60b4d82ef 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 9bd333151e..391398426b 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 53470323cb..bc9e894119 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index 81a3fc19fe..8d4791d0bb 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 80552a5be2..901721f71d 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_DM=y
CONFIG_DM_GPIO=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index 05368bdfa0..25ca2b0c88 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_THEADORABLE=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig
index 17bf8cd78e..89b00f234c 100644
--- a/configs/theadorable_defconfig
+++ b/configs/theadorable_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MVEBU=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_THEADORABLE=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
diff --git a/configs/uniphier_ld11_defconfig b/configs/uniphier_ld11_defconfig
index d593f1bfac..703d8711ea 100644
--- a/configs/uniphier_ld11_defconfig
+++ b/configs/uniphier_ld11_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARCH_UNIPHIER_LD11=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
diff --git a/configs/uniphier_ld20_defconfig b/configs/uniphier_ld20_defconfig
index d6443fd04b..c4a8547074 100644
--- a/configs/uniphier_ld20_defconfig
+++ b/configs/uniphier_ld20_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARCH_UNIPHIER_LD20=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index 6c9f0f4146..e3ad160e3b 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARCH_UNIPHIER_LD4_SLD8=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
diff --git a/configs/uniphier_pro4_defconfig b/configs/uniphier_pro4_defconfig
index d65da62828..a7dcc56002 100644
--- a/configs/uniphier_pro4_defconfig
+++ b/configs/uniphier_pro4_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref"
diff --git a/configs/uniphier_pxs2_ld6b_defconfig b/configs/uniphier_pxs2_ld6b_defconfig
index e07a9ba09a..131c416580 100644
--- a/configs/uniphier_pxs2_ld6b_defconfig
+++ b/configs/uniphier_pxs2_ld6b_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARCH_UNIPHIER_PRO5_PXS2_LD6B=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig
index 6ce26bfacf..1c5cece5e0 100644
--- a/configs/uniphier_sld3_defconfig
+++ b/configs/uniphier_sld3_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARCH_UNIPHIER_SLD3=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_TEXT_BASE=0x84000000
diff --git a/doc/README.pxe b/doc/README.pxe
index cc182c972d..db1165838c 100644
--- a/doc/README.pxe
+++ b/doc/README.pxe
@@ -78,9 +78,9 @@ pxe boot
address of the tftp server from which other files will be retrieved.
kernel_addr_r, initrd_addr_r - locations in RAM at which 'pxe boot' will
- store the kernel and initrd it retrieves from tftp. These locations will
- be passed to the bootm command to boot the kernel. These environment
- variables are required to be set.
+ store the kernel(or FIT image) and initrd it retrieves from tftp. These
+ locations will be passed to the bootm command to boot the kernel. These
+ environment variables are required to be set.
fdt_addr_r - location in RAM at which 'pxe boot' will store the fdt blob it
retrieves from tftp. The retrieval is possible if 'fdt' label is defined in
@@ -138,9 +138,9 @@ menu default - set this label as the default label to boot; this is
specified in a different way
kernel <path> - if this label is chosen, use tftp to retrieve the kernel
- at <path>. it will be stored at the address indicated in
- the kernel_addr_r environment variable, and that address
- will be passed to bootm to boot this kernel.
+ (or FIT image) at <path>. it will be stored at the address
+ indicated in the kernel_addr_r environment variable, and
+ that address will be passed to bootm to boot this kernel.
append <string> - use <string> as the kernel command line when booting this
label.
diff --git a/doc/device-tree-bindings/regulator/fixed.txt b/doc/device-tree-bindings/regulator/fixed.txt
index 4ff39b8f51..8a0d002688 100644
--- a/doc/device-tree-bindings/regulator/fixed.txt
+++ b/doc/device-tree-bindings/regulator/fixed.txt
@@ -10,6 +10,7 @@ Required properties:
Optional properties:
- gpio: GPIO to use for enable control
+- startup-delay-us: startup time in microseconds
- regulator constraints (binding info: regulator.txt)
Other kernel-style properties, are currently not used.
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 9fb874c0bc..23f15716e0 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -39,7 +39,7 @@ static int nand_block_op(enum dfu_op op, struct dfu_entity *dfu,
if (nand_curr_device < 0 ||
nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
- !nand_info[nand_curr_device]->name) {
+ !nand_info[nand_curr_device]) {
printf("%s: invalid nand device\n", __func__);
return -1;
}
@@ -148,7 +148,7 @@ static int dfu_flush_medium_nand(struct dfu_entity *dfu)
if (nand_curr_device < 0 ||
nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
- !nand_info[nand_curr_device]->name) {
+ !nand_info[nand_curr_device]) {
printf("%s: invalid nand device\n", __func__);
return -1;
}
diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
index fbc641d662..8dd7a28e26 100644
--- a/drivers/gpio/bcm2835_gpio.c
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -44,15 +44,6 @@ static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned gpio,
return 0;
}
-static bool bcm2835_gpio_is_output(const struct bcm2835_gpios *gpios, int gpio)
-{
- u32 val;
-
- val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
- val &= BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio);
- return val ? true : false;
-}
-
static int bcm2835_get_value(const struct bcm2835_gpios *gpios, unsigned gpio)
{
unsigned val;
@@ -81,15 +72,28 @@ static int bcm2835_gpio_set_value(struct udevice *dev, unsigned gpio,
return 0;
}
-static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)
+int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio)
{
struct bcm2835_gpios *gpios = dev_get_priv(dev);
+ u32 val;
+
+ val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+
+ return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK);
+}
+
+static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)
+{
+ int funcid = bcm2835_gpio_get_func_id(dev, offset);
- /* GPIOF_FUNC is not implemented yet */
- if (bcm2835_gpio_is_output(gpios, offset))
+ switch (funcid) {
+ case BCM2835_GPIO_OUTPUT:
return GPIOF_OUTPUT;
- else
+ case BCM2835_GPIO_INPUT:
return GPIOF_INPUT;
+ default:
+ return GPIOF_FUNC;
+ }
}
@@ -119,5 +123,6 @@ U_BOOT_DRIVER(gpio_bcm2835) = {
.id = UCLASS_GPIO,
.ops = &gpio_bcm2835_ops,
.probe = bcm2835_gpio_probe,
+ .flags = DM_FLAG_PRE_RELOC,
.priv_auto_alloc_size = sizeof(struct bcm2835_gpios),
};
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 6e201d68e5..af618fc044 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -899,7 +899,7 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength)
if (nand_curr_device < 0 ||
nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
- !nand_info[nand_curr_device]->name) {
+ !nand_info[nand_curr_device]) {
printf("nand: error: no NAND devices found\n");
return -ENODEV;
}
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index d3ac5391f1..b1d58e036a 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -1496,6 +1496,7 @@ static int alloc_nand_resource(struct pxa3xx_nand_info *info)
host->read_id_bytes = 4;
mtd->owner = THIS_MODULE;
+ nand_set_controller_data(chip, host);
chip->ecc.read_page = pxa3xx_nand_read_page_hwecc;
chip->ecc.write_page = pxa3xx_nand_write_page_hwecc;
chip->controller = &info->controller;
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 8ba72e30b1..9e6d726184 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -737,6 +737,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev)
static const struct udevice_id designware_eth_ids[] = {
{ .compatible = "allwinner,sun7i-a20-gmac" },
{ .compatible = "altr,socfpga-stmmac" },
+ { .compatible = "amlogic,meson6-dwmac" },
{ }
};
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 44b53b9abd..f8cfd4bb24 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -168,6 +168,7 @@ config PIC32_PINCTRL
endif
+source "drivers/pinctrl/meson/Kconfig"
source "drivers/pinctrl/nxp/Kconfig"
source "drivers/pinctrl/uniphier/Kconfig"
source "drivers/pinctrl/exynos/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index c92ab8c341..f28b5c18f6 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
obj-$(CONFIG_PIC32_PINCTRL) += pinctrl_pic32.o
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
+obj-$(CONFIG_PINCTRL_MESON) += meson/
diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig
new file mode 100644
index 0000000000..c3e6901b9a
--- /dev/null
+++ b/drivers/pinctrl/meson/Kconfig
@@ -0,0 +1,11 @@
+if ARCH_MESON
+
+config PINCTRL_MESON
+ depends on PINCTRL_GENERIC
+ bool
+
+config PINCTRL_MESON_GXBB
+ bool "Amlogic Meson GXBB SoC pinctrl driver"
+ select PINCTRL_MESON
+
+endif
diff --git a/drivers/pinctrl/meson/Makefile b/drivers/pinctrl/meson/Makefile
new file mode 100644
index 0000000000..6dde4bcb68
--- /dev/null
+++ b/drivers/pinctrl/meson/Makefile
@@ -0,0 +1,6 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += pinctrl-meson.o
+obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
new file mode 100644
index 0000000000..a0a7de5f0f
--- /dev/null
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -0,0 +1,432 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * Based on code from Linux kernel:
+ * Copyright (C) 2016 Endless Mobile, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+#include <dt-bindings/gpio/meson-gxbb-gpio.h>
+
+#include "pinctrl-meson.h"
+
+#define EE_OFF 14
+
+static const unsigned int emmc_nand_d07_pins[] = {
+ PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF),
+ PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF),
+ PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF),
+};
+static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
+static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
+static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
+
+static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };
+static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };
+static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };
+static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) };
+static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) };
+static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) };
+
+static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) };
+static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) };
+static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_14, EE_OFF) };
+static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_15, EE_OFF) };
+
+static const unsigned int uart_tx_b_pins[] = { PIN(GPIODV_24, EE_OFF) };
+static const unsigned int uart_rx_b_pins[] = { PIN(GPIODV_25, EE_OFF) };
+static const unsigned int uart_cts_b_pins[] = { PIN(GPIODV_26, EE_OFF) };
+static const unsigned int uart_rts_b_pins[] = { PIN(GPIODV_27, EE_OFF) };
+
+static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_13, EE_OFF) };
+static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_14, EE_OFF) };
+static const unsigned int uart_cts_c_pins[] = { PIN(GPIOX_11, EE_OFF) };
+static const unsigned int uart_rts_c_pins[] = { PIN(GPIOX_12, EE_OFF) };
+
+static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) };
+static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) };
+static const unsigned int eth_clk_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) };
+static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_3, EE_OFF) };
+static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_4, EE_OFF) };
+static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_5, EE_OFF) };
+static const unsigned int eth_rxd2_pins[] = { PIN(GPIOZ_6, EE_OFF) };
+static const unsigned int eth_rxd3_pins[] = { PIN(GPIOZ_7, EE_OFF) };
+static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOZ_8, EE_OFF) };
+static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_9, EE_OFF) };
+static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_10, EE_OFF) };
+static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) };
+static const unsigned int eth_txd2_pins[] = { PIN(GPIOZ_12, EE_OFF) };
+static const unsigned int eth_txd3_pins[] = { PIN(GPIOZ_13, EE_OFF) };
+
+static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, 0) };
+static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, 0) };
+static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, 0) };
+static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, 0) };
+static const unsigned int uart_tx_ao_b_pins[] = { PIN(GPIOAO_0, 0) };
+static const unsigned int uart_rx_ao_b_pins[] = { PIN(GPIOAO_1, 0),
+ PIN(GPIOAO_5, 0) };
+static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, 0) };
+static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, 0) };
+
+static const unsigned int i2c_sck_ao_pins[] = {PIN(GPIOAO_4, 0) };
+static const unsigned int i2c_sda_ao_pins[] = {PIN(GPIOAO_5, 0) };
+static const unsigned int i2c_slave_sck_ao_pins[] = {PIN(GPIOAO_4, 0) };
+static const unsigned int i2c_slave_sda_ao_pins[] = {PIN(GPIOAO_5, 0) };
+
+static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
+ GPIO_GROUP(GPIOZ_0, EE_OFF),
+ GPIO_GROUP(GPIOZ_1, EE_OFF),
+ GPIO_GROUP(GPIOZ_2, EE_OFF),
+ GPIO_GROUP(GPIOZ_3, EE_OFF),
+ GPIO_GROUP(GPIOZ_4, EE_OFF),
+ GPIO_GROUP(GPIOZ_5, EE_OFF),
+ GPIO_GROUP(GPIOZ_6, EE_OFF),
+ GPIO_GROUP(GPIOZ_7, EE_OFF),
+ GPIO_GROUP(GPIOZ_8, EE_OFF),
+ GPIO_GROUP(GPIOZ_9, EE_OFF),
+ GPIO_GROUP(GPIOZ_10, EE_OFF),
+ GPIO_GROUP(GPIOZ_11, EE_OFF),
+ GPIO_GROUP(GPIOZ_12, EE_OFF),
+ GPIO_GROUP(GPIOZ_13, EE_OFF),
+ GPIO_GROUP(GPIOZ_14, EE_OFF),
+ GPIO_GROUP(GPIOZ_15, EE_OFF),
+
+ GPIO_GROUP(GPIOH_0, EE_OFF),
+ GPIO_GROUP(GPIOH_1, EE_OFF),
+ GPIO_GROUP(GPIOH_2, EE_OFF),
+ GPIO_GROUP(GPIOH_3, EE_OFF),
+
+ GPIO_GROUP(BOOT_0, EE_OFF),
+ GPIO_GROUP(BOOT_1, EE_OFF),
+ GPIO_GROUP(BOOT_2, EE_OFF),
+ GPIO_GROUP(BOOT_3, EE_OFF),
+ GPIO_GROUP(BOOT_4, EE_OFF),
+ GPIO_GROUP(BOOT_5, EE_OFF),
+ GPIO_GROUP(BOOT_6, EE_OFF),
+ GPIO_GROUP(BOOT_7, EE_OFF),
+ GPIO_GROUP(BOOT_8, EE_OFF),
+ GPIO_GROUP(BOOT_9, EE_OFF),
+ GPIO_GROUP(BOOT_10, EE_OFF),
+ GPIO_GROUP(BOOT_11, EE_OFF),
+ GPIO_GROUP(BOOT_12, EE_OFF),
+ GPIO_GROUP(BOOT_13, EE_OFF),
+ GPIO_GROUP(BOOT_14, EE_OFF),
+ GPIO_GROUP(BOOT_15, EE_OFF),
+ GPIO_GROUP(BOOT_16, EE_OFF),
+ GPIO_GROUP(BOOT_17, EE_OFF),
+
+ GPIO_GROUP(CARD_0, EE_OFF),
+ GPIO_GROUP(CARD_1, EE_OFF),
+ GPIO_GROUP(CARD_2, EE_OFF),
+ GPIO_GROUP(CARD_3, EE_OFF),
+ GPIO_GROUP(CARD_4, EE_OFF),
+ GPIO_GROUP(CARD_5, EE_OFF),
+ GPIO_GROUP(CARD_6, EE_OFF),
+
+ GPIO_GROUP(GPIODV_0, EE_OFF),
+ GPIO_GROUP(GPIODV_1, EE_OFF),
+ GPIO_GROUP(GPIODV_2, EE_OFF),
+ GPIO_GROUP(GPIODV_3, EE_OFF),
+ GPIO_GROUP(GPIODV_4, EE_OFF),
+ GPIO_GROUP(GPIODV_5, EE_OFF),
+ GPIO_GROUP(GPIODV_6, EE_OFF),
+ GPIO_GROUP(GPIODV_7, EE_OFF),
+ GPIO_GROUP(GPIODV_8, EE_OFF),
+ GPIO_GROUP(GPIODV_9, EE_OFF),
+ GPIO_GROUP(GPIODV_10, EE_OFF),
+ GPIO_GROUP(GPIODV_11, EE_OFF),
+ GPIO_GROUP(GPIODV_12, EE_OFF),
+ GPIO_GROUP(GPIODV_13, EE_OFF),
+ GPIO_GROUP(GPIODV_14, EE_OFF),
+ GPIO_GROUP(GPIODV_15, EE_OFF),
+ GPIO_GROUP(GPIODV_16, EE_OFF),
+ GPIO_GROUP(GPIODV_17, EE_OFF),
+ GPIO_GROUP(GPIODV_19, EE_OFF),
+ GPIO_GROUP(GPIODV_20, EE_OFF),
+ GPIO_GROUP(GPIODV_21, EE_OFF),
+ GPIO_GROUP(GPIODV_22, EE_OFF),
+ GPIO_GROUP(GPIODV_23, EE_OFF),
+ GPIO_GROUP(GPIODV_24, EE_OFF),
+ GPIO_GROUP(GPIODV_25, EE_OFF),
+ GPIO_GROUP(GPIODV_26, EE_OFF),
+ GPIO_GROUP(GPIODV_27, EE_OFF),
+ GPIO_GROUP(GPIODV_28, EE_OFF),
+ GPIO_GROUP(GPIODV_29, EE_OFF),
+
+ GPIO_GROUP(GPIOY_0, EE_OFF),
+ GPIO_GROUP(GPIOY_1, EE_OFF),
+ GPIO_GROUP(GPIOY_2, EE_OFF),
+ GPIO_GROUP(GPIOY_3, EE_OFF),
+ GPIO_GROUP(GPIOY_4, EE_OFF),
+ GPIO_GROUP(GPIOY_5, EE_OFF),
+ GPIO_GROUP(GPIOY_6, EE_OFF),
+ GPIO_GROUP(GPIOY_7, EE_OFF),
+ GPIO_GROUP(GPIOY_8, EE_OFF),
+ GPIO_GROUP(GPIOY_9, EE_OFF),
+ GPIO_GROUP(GPIOY_10, EE_OFF),
+ GPIO_GROUP(GPIOY_11, EE_OFF),
+ GPIO_GROUP(GPIOY_12, EE_OFF),
+ GPIO_GROUP(GPIOY_13, EE_OFF),
+ GPIO_GROUP(GPIOY_14, EE_OFF),
+ GPIO_GROUP(GPIOY_15, EE_OFF),
+ GPIO_GROUP(GPIOY_16, EE_OFF),
+
+ GPIO_GROUP(GPIOX_0, EE_OFF),
+ GPIO_GROUP(GPIOX_1, EE_OFF),
+ GPIO_GROUP(GPIOX_2, EE_OFF),
+ GPIO_GROUP(GPIOX_3, EE_OFF),
+ GPIO_GROUP(GPIOX_4, EE_OFF),
+ GPIO_GROUP(GPIOX_5, EE_OFF),
+ GPIO_GROUP(GPIOX_6, EE_OFF),
+ GPIO_GROUP(GPIOX_7, EE_OFF),
+ GPIO_GROUP(GPIOX_8, EE_OFF),
+ GPIO_GROUP(GPIOX_9, EE_OFF),
+ GPIO_GROUP(GPIOX_10, EE_OFF),
+ GPIO_GROUP(GPIOX_11, EE_OFF),
+ GPIO_GROUP(GPIOX_12, EE_OFF),
+ GPIO_GROUP(GPIOX_13, EE_OFF),
+ GPIO_GROUP(GPIOX_14, EE_OFF),
+ GPIO_GROUP(GPIOX_15, EE_OFF),
+ GPIO_GROUP(GPIOX_16, EE_OFF),
+ GPIO_GROUP(GPIOX_17, EE_OFF),
+ GPIO_GROUP(GPIOX_18, EE_OFF),
+ GPIO_GROUP(GPIOX_19, EE_OFF),
+ GPIO_GROUP(GPIOX_20, EE_OFF),
+ GPIO_GROUP(GPIOX_21, EE_OFF),
+ GPIO_GROUP(GPIOX_22, EE_OFF),
+
+ GPIO_GROUP(GPIOCLK_0, EE_OFF),
+ GPIO_GROUP(GPIOCLK_1, EE_OFF),
+ GPIO_GROUP(GPIOCLK_2, EE_OFF),
+ GPIO_GROUP(GPIOCLK_3, EE_OFF),
+
+ GPIO_GROUP(GPIO_TEST_N, EE_OFF),
+
+ /* Bank X */
+ GROUP(uart_tx_a, 4, 13),
+ GROUP(uart_rx_a, 4, 12),
+ GROUP(uart_cts_a, 4, 11),
+ GROUP(uart_rts_a, 4, 10),
+
+ /* Bank Y */
+ GROUP(uart_cts_c, 1, 19),
+ GROUP(uart_rts_c, 1, 18),
+ GROUP(uart_tx_c, 1, 17),
+ GROUP(uart_rx_c, 1, 16),
+
+ /* Bank Z */
+ GROUP(eth_mdio, 6, 1),
+ GROUP(eth_mdc, 6, 0),
+ GROUP(eth_clk_rx_clk, 6, 13),
+ GROUP(eth_rx_dv, 6, 12),
+ GROUP(eth_rxd0, 6, 11),
+ GROUP(eth_rxd1, 6, 10),
+ GROUP(eth_rxd2, 6, 9),
+ GROUP(eth_rxd3, 6, 8),
+ GROUP(eth_rgmii_tx_clk, 6, 7),
+ GROUP(eth_tx_en, 6, 6),
+ GROUP(eth_txd0, 6, 5),
+ GROUP(eth_txd1, 6, 4),
+ GROUP(eth_txd2, 6, 3),
+ GROUP(eth_txd3, 6, 2),
+
+ /* Bank DV */
+ GROUP(uart_tx_b, 2, 29),
+ GROUP(uart_rx_b, 2, 28),
+ GROUP(uart_cts_b, 2, 27),
+ GROUP(uart_rts_b, 2, 26),
+
+ /* Bank BOOT */
+ GROUP(emmc_nand_d07, 4, 30),
+ GROUP(emmc_clk, 4, 18),
+ GROUP(emmc_cmd, 4, 19),
+ GROUP(emmc_ds, 4, 31),
+
+ /* Bank CARD */
+ GROUP(sdcard_d1, 2, 14),
+ GROUP(sdcard_d0, 2, 15),
+ GROUP(sdcard_d3, 2, 12),
+ GROUP(sdcard_d2, 2, 13),
+ GROUP(sdcard_cmd, 2, 10),
+ GROUP(sdcard_clk, 2, 11),
+};
+
+static struct meson_pmx_group meson_gxbb_aobus_groups[] = {
+ GPIO_GROUP(GPIOAO_0, 0),
+ GPIO_GROUP(GPIOAO_1, 0),
+ GPIO_GROUP(GPIOAO_2, 0),
+ GPIO_GROUP(GPIOAO_3, 0),
+ GPIO_GROUP(GPIOAO_4, 0),
+ GPIO_GROUP(GPIOAO_5, 0),
+ GPIO_GROUP(GPIOAO_6, 0),
+ GPIO_GROUP(GPIOAO_7, 0),
+ GPIO_GROUP(GPIOAO_8, 0),
+ GPIO_GROUP(GPIOAO_9, 0),
+ GPIO_GROUP(GPIOAO_10, 0),
+ GPIO_GROUP(GPIOAO_11, 0),
+ GPIO_GROUP(GPIOAO_12, 0),
+ GPIO_GROUP(GPIOAO_13, 0),
+
+ /* bank AO */
+ GROUP(uart_tx_ao_b, 0, 26),
+ GROUP(uart_rx_ao_b, 0, 25),
+ GROUP(uart_tx_ao_a, 0, 12),
+ GROUP(uart_rx_ao_a, 0, 11),
+ GROUP(uart_cts_ao_a, 0, 10),
+ GROUP(uart_rts_ao_a, 0, 9),
+ GROUP(uart_cts_ao_b, 0, 8),
+ GROUP(uart_rts_ao_b, 0, 7),
+ GROUP(i2c_sck_ao, 0, 6),
+ GROUP(i2c_sda_ao, 0, 5),
+ GROUP(i2c_slave_sck_ao, 0, 2),
+ GROUP(i2c_slave_sda_ao, 0, 1),
+};
+
+static const char * const gpio_periphs_groups[] = {
+ "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
+ "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
+ "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
+ "GPIOZ_15",
+
+ "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3",
+
+ "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
+ "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
+ "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
+ "BOOT_15", "BOOT_16", "BOOT_17",
+
+ "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
+ "CARD_5", "CARD_6",
+
+ "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4",
+ "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9",
+ "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14",
+ "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19",
+ "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24",
+ "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29",
+
+ "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
+ "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
+ "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
+ "GPIOY_15", "GPIOY_16",
+
+ "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
+ "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
+ "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
+ "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
+ "GPIOX_20", "GPIOX_21", "GPIOX_22",
+
+ "GPIO_TEST_N",
+};
+
+static const char * const emmc_groups[] = {
+ "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",
+};
+
+static const char * const sdcard_groups[] = {
+ "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3",
+ "sdcard_cmd", "sdcard_clk",
+};
+
+static const char * const uart_a_groups[] = {
+ "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
+};
+
+static const char * const uart_b_groups[] = {
+ "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b",
+};
+
+static const char * const uart_c_groups[] = {
+ "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c",
+};
+
+static const char * const eth_groups[] = {
+ "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv",
+ "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3",
+ "eth_rgmii_tx_clk", "eth_tx_en",
+ "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3",
+};
+
+static const char * const gpio_aobus_groups[] = {
+ "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
+ "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
+ "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13",
+};
+
+static const char * const uart_ao_groups[] = {
+ "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a",
+};
+
+static const char * const uart_ao_b_groups[] = {
+ "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b",
+};
+
+static const char * const i2c_ao_groups[] = {
+ "i2c_sdk_ao", "i2c_sda_ao",
+};
+
+static const char * const i2c_slave_ao_groups[] = {
+ "i2c_slave_sdk_ao", "i2c_slave_sda_ao",
+};
+
+static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
+ FUNCTION(gpio_periphs),
+ FUNCTION(emmc),
+ FUNCTION(sdcard),
+ FUNCTION(uart_a),
+ FUNCTION(uart_b),
+ FUNCTION(uart_c),
+ FUNCTION(eth),
+};
+
+static struct meson_pmx_func meson_gxbb_aobus_functions[] = {
+ FUNCTION(gpio_aobus),
+ FUNCTION(uart_ao),
+ FUNCTION(uart_ao_b),
+ FUNCTION(i2c_ao),
+ FUNCTION(i2c_slave_ao),
+};
+
+struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
+ .name = "periphs-banks",
+ .pin_base = 14,
+ .groups = meson_gxbb_periphs_groups,
+ .funcs = meson_gxbb_periphs_functions,
+ .num_pins = 120,
+ .num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups),
+ .num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions),
+};
+
+struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
+ .name = "aobus-banks",
+ .pin_base = 0,
+ .groups = meson_gxbb_aobus_groups,
+ .funcs = meson_gxbb_aobus_functions,
+ .num_pins = 14,
+ .num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups),
+ .num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions),
+};
+
+static const struct udevice_id meson_gxbb_pinctrl_match[] = {
+ {
+ .compatible = "amlogic,meson-gxbb-periphs-pinctrl",
+ .data = (ulong)&meson_gxbb_periphs_pinctrl_data,
+ },
+ {
+ .compatible = "amlogic,meson-gxbb-aobus-pinctrl",
+ .data = (ulong)&meson_gxbb_aobus_pinctrl_data,
+ },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(meson_gxbb_pinctrl) = {
+ .name = "meson-gxbb-pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = of_match_ptr(meson_gxbb_pinctrl_match),
+ .probe = meson_pinctrl_probe,
+ .priv_auto_alloc_size = sizeof(struct meson_pinctrl),
+ .ops = &meson_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
new file mode 100644
index 0000000000..d21a3dd755
--- /dev/null
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -0,0 +1,179 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+#include <fdt_support.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/sizes.h>
+
+#include "pinctrl-meson.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const char *meson_pinctrl_dummy_name = "_dummy";
+
+static int meson_pinctrl_get_groups_count(struct udevice *dev)
+{
+ struct meson_pinctrl *priv = dev_get_priv(dev);
+
+ return priv->data->num_groups;
+}
+
+static const char *meson_pinctrl_get_group_name(struct udevice *dev,
+ unsigned selector)
+{
+ struct meson_pinctrl *priv = dev_get_priv(dev);
+
+ if (!priv->data->groups[selector].name)
+ return meson_pinctrl_dummy_name;
+
+ return priv->data->groups[selector].name;
+}
+
+static int meson_pinmux_get_functions_count(struct udevice *dev)
+{
+ struct meson_pinctrl *priv = dev_get_priv(dev);
+
+ return priv->data->num_funcs;
+}
+
+static const char *meson_pinmux_get_function_name(struct udevice *dev,
+ unsigned selector)
+{
+ struct meson_pinctrl *priv = dev_get_priv(dev);
+
+ return priv->data->funcs[selector].name;
+}
+
+static void meson_pinmux_disable_other_groups(struct meson_pinctrl *priv,
+ unsigned int pin, int sel_group)
+{
+ struct meson_pmx_group *group;
+ void __iomem *addr;
+ int i, j;
+
+ for (i = 0; i < priv->data->num_groups; i++) {
+ group = &priv->data->groups[i];
+ if (group->is_gpio || i == sel_group)
+ continue;
+
+ for (j = 0; j < group->num_pins; j++) {
+ if (group->pins[j] == pin) {
+ /* We have found a group using the pin */
+ debug("pinmux: disabling %s\n", group->name);
+ addr = priv->reg_mux + group->reg * 4;
+ writel(readl(addr) & ~BIT(group->bit), addr);
+ }
+ }
+ }
+}
+
+static int meson_pinmux_group_set(struct udevice *dev,
+ unsigned group_selector,
+ unsigned func_selector)
+{
+ struct meson_pinctrl *priv = dev_get_priv(dev);
+ const struct meson_pmx_group *group;
+ const struct meson_pmx_func *func;
+ void __iomem *addr;
+ int i;
+
+ group = &priv->data->groups[group_selector];
+ func = &priv->data->funcs[func_selector];
+
+ debug("pinmux: set group %s func %s\n", group->name, func->name);
+
+ /*
+ * Disable groups using the same pins.
+ * The selected group is not disabled to avoid glitches.
+ */
+ for (i = 0; i < group->num_pins; i++) {
+ meson_pinmux_disable_other_groups(priv,
+ group->pins[i],
+ group_selector);
+ }
+
+ /* Function 0 (GPIO) doesn't need any additional setting */
+ if (func_selector) {
+ addr = priv->reg_mux + group->reg * 4;
+ writel(readl(addr) | BIT(group->bit), addr);
+ }
+
+ return 0;
+}
+
+const struct pinctrl_ops meson_pinctrl_ops = {
+ .get_groups_count = meson_pinctrl_get_groups_count,
+ .get_group_name = meson_pinctrl_get_group_name,
+ .get_functions_count = meson_pinmux_get_functions_count,
+ .get_function_name = meson_pinmux_get_function_name,
+ .pinmux_group_set = meson_pinmux_group_set,
+ .set_state = pinctrl_generic_set_state,
+};
+
+static fdt_addr_t parse_address(int offset, const char *name, int na, int ns)
+{
+ int index, len = 0;
+ const fdt32_t *reg;
+
+ index = fdt_find_string(gd->fdt_blob, offset, "reg-names", name);
+ if (index < 0)
+ return FDT_ADDR_T_NONE;
+
+ reg = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
+ if (!reg || (len <= (index * sizeof(fdt32_t) * (na + ns))))
+ return FDT_ADDR_T_NONE;
+
+ reg += index * (na + ns);
+
+ return fdt_translate_address((void *)gd->fdt_blob, offset, reg);
+}
+
+int meson_pinctrl_probe(struct udevice *dev)
+{
+ struct meson_pinctrl *priv = dev_get_priv(dev);
+ fdt_addr_t addr;
+ int node, gpio = -1, len;
+ int na, ns;
+
+ na = fdt_address_cells(gd->fdt_blob, dev->parent->of_offset);
+ if (na < 1) {
+ debug("bad #address-cells\n");
+ return -EINVAL;
+ }
+
+ ns = fdt_size_cells(gd->fdt_blob, dev->parent->of_offset);
+ if (ns < 1) {
+ debug("bad #size-cells\n");
+ return -EINVAL;
+ }
+
+ fdt_for_each_subnode(gd->fdt_blob, node, dev->of_offset) {
+ if (fdt_getprop(gd->fdt_blob, node, "gpio-controller", &len)) {
+ gpio = node;
+ break;
+ }
+ }
+
+ if (!gpio) {
+ debug("gpio node not found\n");
+ return -EINVAL;
+ }
+
+ addr = parse_address(gpio, "mux", na, ns);
+ if (addr == FDT_ADDR_T_NONE) {
+ debug("mux not found\n");
+ return -EINVAL;
+ }
+
+ priv->reg_mux = (void __iomem *)addr;
+ priv->data = (struct meson_pinctrl_data *)dev_get_driver_data(dev);
+
+ return 0;
+}
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
new file mode 100644
index 0000000000..4127a60f48
--- /dev/null
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -0,0 +1,74 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __PINCTRL_MESON_H__
+#define __PINCTRL_MESON_H__
+
+#include <linux/types.h>
+
+struct meson_pmx_group {
+ const char *name;
+ const unsigned int *pins;
+ unsigned int num_pins;
+ bool is_gpio;
+ unsigned int reg;
+ unsigned int bit;
+};
+
+struct meson_pmx_func {
+ const char *name;
+ const char * const *groups;
+ unsigned int num_groups;
+};
+
+struct meson_pinctrl_data {
+ const char *name;
+ struct meson_pmx_group *groups;
+ struct meson_pmx_func *funcs;
+ unsigned int pin_base;
+ unsigned int num_pins;
+ unsigned int num_groups;
+ unsigned int num_funcs;
+};
+
+struct meson_pinctrl {
+ struct meson_pinctrl_data *data;
+ void __iomem *reg_mux;
+};
+
+#define PIN(x, b) (b + x)
+
+#define GROUP(grp, r, b) \
+ { \
+ .name = #grp, \
+ .pins = grp ## _pins, \
+ .num_pins = ARRAY_SIZE(grp ## _pins), \
+ .reg = r, \
+ .bit = b, \
+ }
+
+#define GPIO_GROUP(gpio, b) \
+ { \
+ .name = #gpio, \
+ .pins = (const unsigned int[]){ PIN(gpio, b) }, \
+ .num_pins = 1, \
+ .is_gpio = true, \
+ }
+
+#define FUNCTION(fn) \
+ { \
+ .name = #fn, \
+ .groups = fn ## _groups, \
+ .num_groups = ARRAY_SIZE(fn ## _groups), \
+ }
+
+#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
+
+extern const struct pinctrl_ops meson_pinctrl_ops;
+
+int meson_pinctrl_probe(struct udevice *dev);
+
+#endif /* __PINCTRL_MESON_H__ */
diff --git a/drivers/pinctrl/pinctrl-generic.c b/drivers/pinctrl/pinctrl-generic.c
index e86b72a8de..baff40f1f0 100644
--- a/drivers/pinctrl/pinctrl-generic.c
+++ b/drivers/pinctrl/pinctrl-generic.c
@@ -312,8 +312,10 @@ static int pinctrl_generic_set_state_subnode(struct udevice *dev,
is_group = true;
strings_count = fdt_count_strings(fdt, node,
subnode_target_type);
- if (strings_count < 0)
- return -EINVAL;
+ if (strings_count < 0) {
+ /* skip this node; may contain config child nodes */
+ return 0;
+ }
}
for (i = 0; i < strings_count; i++) {
diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index d053817fc2..37b8400903 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -19,6 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct fixed_regulator_platdata {
struct gpio_desc gpio; /* GPIO for regulator enable control */
+ unsigned int startup_delay_us;
};
static int fixed_regulator_ofdata_to_platdata(struct udevice *dev)
@@ -42,6 +43,11 @@ static int fixed_regulator_ofdata_to_platdata(struct udevice *dev)
if (ret)
debug("Fixed regulator gpio - not found! Error: %d", ret);
+ /* Get optional ramp up delay */
+ dev_pdata->startup_delay_us = fdtdec_get_uint(gd->fdt_blob,
+ dev->of_offset,
+ "startup-delay-us", 0);
+
return 0;
}
@@ -101,6 +107,10 @@ static int fixed_regulator_set_enable(struct udevice *dev, bool enable)
enable);
return ret;
}
+
+ if (enable && dev_pdata->startup_delay_us)
+ udelay(dev_pdata->startup_delay_us);
+
return 0;
}
diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c
index 7357bbfb26..f4e062f0c4 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -73,6 +73,9 @@ static int bcm283x_mu_serial_probe(struct udevice *dev)
struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
struct bcm283x_mu_priv *priv = dev_get_priv(dev);
+ if (plat->disabled)
+ return -ENODEV;
+
priv->regs = (struct bcm283x_mu_regs *)plat->base;
return 0;
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index a6d1d2ab3f..dc4cbdb673 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -28,18 +28,18 @@ typedef struct global_data {
bd_t *bd;
unsigned long flags;
unsigned int baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
+ unsigned long cpu_clk; /* CPU clock in Hz! */
unsigned long bus_clk;
/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
unsigned long pci_clk;
unsigned long mem_clk;
#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
- unsigned long fb_base; /* Base address of framebuffer mem */
+ unsigned long fb_base; /* Base address of framebuffer mem */
#endif
#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
+ unsigned long post_log_word; /* Record POST activities */
+ unsigned long post_log_res; /* success of POST test */
+ unsigned long post_init_f_time; /* When post_init_f started */
#endif
#ifdef CONFIG_BOARD_TYPES
unsigned long board_type;
@@ -48,14 +48,13 @@ typedef struct global_data {
#ifdef CONFIG_PRE_CONSOLE_BUFFER
unsigned long precon_buf_idx; /* Pre-Console buffer index */
#endif
- unsigned long env_addr; /* Address of Environment struct */
+ unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long ram_top; /* Top address of RAM used by U-Boot */
-
+ unsigned long ram_top; /* Top address of RAM used by U-Boot */
unsigned long relocaddr; /* Start address of U-Boot in RAM */
- phys_size_t ram_size; /* RAM size */
- unsigned long mon_len; /* monitor len */
+ phys_size_t ram_size; /* RAM size */
+ unsigned long mon_len; /* monitor len */
unsigned long irq_sp; /* irq stack pointer */
unsigned long start_addr_sp; /* start_addr_stackpointer */
unsigned long reloc_off;
@@ -67,14 +66,14 @@ typedef struct global_data {
struct list_head uclass_root; /* Head of core tree */
#endif
#ifdef CONFIG_TIMER
- struct udevice *timer; /* Timer instance for Driver Model */
+ struct udevice *timer; /* Timer instance for Driver Model */
#endif
- const void *fdt_blob; /* Our device tree, NULL if none */
- void *new_fdt; /* Relocated FDT */
- unsigned long fdt_size; /* Space reserved for relocated FDT */
+ const void *fdt_blob; /* Our device tree, NULL if none */
+ void *new_fdt; /* Relocated FDT */
+ unsigned long fdt_size; /* Space reserved for relocated FDT */
struct jt_funcs *jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
+ char env_buf[32]; /* buffer for getenv() before reloc. */
#ifdef CONFIG_TRACE
void *trace_buff; /* The trace buffer */
#endif
@@ -125,8 +124,8 @@ typedef struct global_data {
#define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */
#define GD_FLG_FULL_MALLOC_INIT 0x00200 /* Full malloc() is ready */
#define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */
-#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */
-#define GD_FLG_RECORD 0x01000 /* Record console */
-#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */
+#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */
+#define GD_FLG_RECORD 0x01000 /* Record console */
+#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */
#endif /* __ASM_GENERIC_GBL_DATA_H */
diff --git a/include/compiler.h b/include/compiler.h
index 47c296e202..65b826e4d1 100644
--- a/include/compiler.h
+++ b/include/compiler.h
@@ -15,7 +15,7 @@
defined(__sun__) || \
defined(__APPLE__)
# include <inttypes.h>
-#elif defined(__linux__) || defined(__WIN32__) || defined(__MINGW32__)
+#elif defined(__linux__) || defined(__WIN32__) || defined(__MINGW32__) || defined(__OpenBSD__)
# include <stdint.h>
#endif
@@ -50,6 +50,8 @@ typedef unsigned long ulong;
#endif
#ifdef __FreeBSD__
# include <sys/endian.h> /* htole32 and friends */
+#elif defined(__OpenBSD__)
+# include <endian.h>
#endif
#include <time.h>
@@ -82,7 +84,20 @@ typedef unsigned int uint;
# define uswap_64(x) _uswap_64(x, )
#endif
-#if __BYTE_ORDER == __LITTLE_ENDIAN
+#if defined(__OpenBSD__)
+#define cpu_to_le16(x) htole16(x)
+#define cpu_to_le32(x) htole32(x)
+#define cpu_to_le64(x) htole64(x)
+#define le16_to_cpu(x) letoh16(x)
+#define le32_to_cpu(x) letoh32(x)
+#define le64_to_cpu(x) letoh64(x)
+#define cpu_to_be16(x) htobe16(x)
+#define cpu_to_be32(x) htobe32(x)
+#define cpu_to_be64(x) htobe64(x)
+#define be16_to_cpu(x) betoh16(x)
+#define be32_to_cpu(x) betoh32(x)
+#define be64_to_cpu(x) betoh64(x)
+#elif __BYTE_ORDER == __LITTLE_ENDIAN
# define cpu_to_le16(x) (x)
# define cpu_to_le32(x) (x)
# define cpu_to_le64(x) (x)
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 30c42781ca..56a63b4944 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -277,7 +277,8 @@
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index ef4a8baf43..c9bc0930e0 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -335,7 +335,8 @@
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_TEXT_BASE 0x40200000
-#define CONFIG_SPL_MAX_SIZE (64 * 1024)
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 518b904807..fe2c65ffb9 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -37,9 +37,6 @@
/* SPL defines. */
#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
-#define CONFIG_SPL_MAX_SIZE (NON_SECURE_SRAM_END - \
- CONFIG_PUB_ROM_DATA_SIZE - \
- CONFIG_SPL_TEXT_BASE)
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
#define CONFIG_SPL_POWER_SUPPORT
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index 46e8d4cfd7..cf74dbe740 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -102,8 +102,6 @@
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_SPI
#undef CONFIG_DM_SPI_FLASH
-#undef CONFIG_SPL_MAX_SIZE
-#define CONFIG_SPL_MAX_SIZE (256 << 10) /* 256 KiB */
#endif
/* SPI SPL */
diff --git a/include/configs/arndale.h b/include/configs/arndale.h
index 18e59fc73a..b08f341227 100644
--- a/include/configs/arndale.h
+++ b/include/configs/arndale.h
@@ -45,7 +45,6 @@
#define CONFIG_S5P_PA_SYSRAM 0x02020000
#define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h
index b5e5029217..4b255d8d77 100644
--- a/include/configs/bcm_ep_board.h
+++ b/include/configs/bcm_ep_board.h
@@ -91,6 +91,5 @@
/* Misc utility code */
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CRC32_VERIFY
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif /* __BCM_EP_BOARD_H */
diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h
index 04da877db5..1de5edc301 100644
--- a/include/configs/bur_am335x_common.h
+++ b/include/configs/bur_am335x_common.h
@@ -46,10 +46,12 @@
* area between 0x402F0400 and 0x4030B800 as a download area and
* 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
* supports X-MODEM loading via UART, and we leverage this and then use
- * Y-MODEM to load u-boot.img, when booted over UART.
+ * Y-MODEM to load u-boot.img, when booted over UART. We must also include
+ * the scratch space that U-Boot uses in SRAM.
*/
#define CONFIG_SPL_TEXT_BASE 0x402F0400
-#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
/*
* Since SPL did pll and ddr initialization for us,
diff --git a/include/configs/bur_cfg_common.h b/include/configs/bur_cfg_common.h
index f1837752ca..22c32496aa 100644
--- a/include/configs/bur_cfg_common.h
+++ b/include/configs/bur_cfg_common.h
@@ -33,7 +33,7 @@
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_NET_RETRY_COUNT 2
+#define CONFIG_NET_RETRY_COUNT 10
/* Network console */
#define CONFIG_NETCONSOLE 1
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 03dc3cc0d9..5d717a4a52 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -344,7 +344,8 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
/*
* Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index b896d4d79a..bdfb168f2c 100644
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -153,7 +153,6 @@
/* SPL defines. */
#define CONFIG_SPL_TEXT_BASE 0x40300350
-#define CONFIG_SPL_MAX_SIZE (64 * 1024)
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024)
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index b66949f415..ed1ee5453f 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -185,8 +185,6 @@
/* In SPL, use the environment and discard MMC support for space. */
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_SPL_MMC_SUPPORT
-#undef CONFIG_SPL_MAX_SIZE
-#define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */
#endif
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_ENV_IS_IN_SPI_FLASH
diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h
index 2b172a5073..7c597904e6 100644
--- a/include/configs/jetson-tk1.h
+++ b/include/configs/jetson-tk1.h
@@ -60,8 +60,6 @@
#include "tegra-common-usb-gadget.h"
#include "tegra-common-post.h"
-#define CONFIG_ARMV7_PSCI 1
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
/* Reserve top 1M for secure RAM */
#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
diff --git a/include/configs/kc1.h b/include/configs/kc1.h
index 8b957996a7..c1a9e643ec 100644
--- a/include/configs/kc1.h
+++ b/include/configs/kc1.h
@@ -119,7 +119,8 @@
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40300000
-#define CONFIG_SPL_MAX_SIZE (48 * 1024)
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 47180f9ce8..abbd1c4623 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -9,9 +9,7 @@
#define CONFIG_LS102XA
-#define CONFIG_ARMV7_PSCI
#define CONFIG_ARMV7_PSCI_1_0
-#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 2f19950dff..511b0b3f0f 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -9,9 +9,7 @@
#define CONFIG_LS102XA
-#define CONFIG_ARMV7_PSCI
#define CONFIG_ARMV7_PSCI_1_0
-#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 7295fa6199..4b1077c02b 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -72,8 +72,6 @@
#define CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
-#define CONFIG_ARMV7_PSCI
-#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_ARMV7_SECURE_BASE 0x00900000
#endif
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index e87b4c0118..2397b5e6a4 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -343,7 +343,8 @@
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index e0d25937f7..3389bf3164 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -16,11 +16,11 @@
#include <configs/ti_omap3_common.h>
#include <asm/mach-types.h>
-/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
-#undef CONFIG_SPL_MAX_SIZE
+/*
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
+ */
#undef CONFIG_SPL_TEXT_BASE
-
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_TEXT_BASE 0x40200000
/*
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 05a43610e5..496da17b39 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -30,11 +30,13 @@
#include <configs/ti_omap3_common.h>
-/* Override default SPL info to minimize empty space and allow BCH8 in SPL */
+/*
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
+ * order to allow for BCH8 to fit in.
+ */
#undef CONFIG_SPL_TEXT_BASE
-#undef CONFIG_SPL_MAX_SIZE
-#define CONFIG_SPL_TEXT_BASE 0x40200000
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_TEXT_BASE 0x40200000
/* Display CPU and Board information */
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 618a546ded..841e4bdcc4 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -11,10 +11,12 @@
#define CONFIG_NAND
#include <configs/ti_omap3_common.h>
-#undef CONFIG_SPL_MAX_SIZE
+/*
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
+ */
#undef CONFIG_SPL_TEXT_BASE
-#define CONFIG_SPL_TEXT_BASE 0x40200000
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_TEXT_BASE 0x40200000
#define CONFIG_BCH
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 9e7bd88adb..b66431929c 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -85,21 +85,29 @@
#define MTDPARTS_DEFAULT
#endif
-#define CONFIG_EXTRA_ENV_SETTINGS \
- DEFAULT_LINUX_BOOT_ENV \
- "usbtty=cdc_acm\0" \
- "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
- "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
- "mtdparts=" MTDPARTS_DEFAULT "\0" \
#define CONFIG_BOOTCOMMAND \
- "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \
- "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
+ "run distro_bootcmd; " \
+ "setenv bootargs ${bootargs_ubi}; " \
+ "if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \
"source ${loadaddr}; " \
"fi; " \
"ubi part boot && ubifsmount ubi:boot && " \
"ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
+ "usbtty=cdc_acm\0" \
+ "bootargs_ubi=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
+ "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ BOOTENV \
+
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 752cc319fc..e34814bd5e 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -16,6 +16,7 @@
/* Architecture, CPU, etc.*/
#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
/* Use SoC timer for AArch32, but architected timer for AArch64 */
#ifndef CONFIG_ARM64
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index 3d25e3db3e..1f9b3905b4 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -124,7 +124,8 @@
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x402F0400
-#define CONFIG_SPL_MAX_SIZE (101 * 1024)
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
diff --git a/include/configs/sniper.h b/include/configs/sniper.h
index e2f5e60b2a..5062cd0e44 100644
--- a/include/configs/sniper.h
+++ b/include/configs/sniper.h
@@ -126,7 +126,8 @@
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40200000
-#define CONFIG_SPL_MAX_SIZE (54 * 1024)
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h
index 0625502f44..67a26c2e45 100644
--- a/include/configs/sun6i.h
+++ b/include/configs/sun6i.h
@@ -22,8 +22,6 @@
#define CONFIG_SUNXI_USB_PHYS 3
-#define CONFIG_ARMV7_PSCI 1
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index e9074d5dfb..d8e6e20795 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -20,8 +20,6 @@
#define CONFIG_SUNXI_USB_PHYS 3
-#define CONFIG_ARMV7_PSCI 1
-#define CONFIG_ARMV7_PSCI_NR_CPUS 2
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index b9a8731ee8..011d70f367 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -26,19 +26,6 @@
#define CONFIG_SUNXI_USB_PHYS 2
#endif
-#ifndef CONFIG_MACH_SUN8I_A83T
-#define CONFIG_ARMV7_PSCI 1
-#if defined(CONFIG_MACH_SUN8I_A23)
-#define CONFIG_ARMV7_PSCI_NR_CPUS 2
-#elif defined(CONFIG_MACH_SUN8I_A33)
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
-#elif defined(CONFIG_MACH_SUN8I_H3)
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
-#else
-#error Unsupported sun8i variant
-#endif
-#endif
-
/*
* Include common sunxi configuration where most the settings are
*/
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index f64edd4b0f..708ab1793e 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -99,7 +99,7 @@
* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
-#define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */
+#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
#else
#define CONFIG_SYS_INIT_RAM_ADDR 0x0
#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
@@ -220,7 +220,8 @@
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
-#define LOW_LEVEL_SRAM_STACK 0x0001A000
+/* FIXME: 40 KiB instead of 32 KiB ? */
+#define LOW_LEVEL_SRAM_STACK 0x00018000
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
#else
/* end of 32 KiB in sram */
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index 5213065095..35030fe874 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -218,7 +218,8 @@
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 52bd8370a0..7b6ebdaff5 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -326,7 +326,8 @@
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
/*
* Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 732854eb30..198f649326 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -157,7 +157,8 @@
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40300000
-#define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024)
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index 17f12a898a..071511cff5 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -123,7 +123,8 @@
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40400000
-#define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024)
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index a9b10d0532..9a671de730 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -58,7 +58,6 @@
* Y-MODEM to load u-boot.img, when booted over UART.
*/
#define CONFIG_SPL_TEXT_BASE 0x402F0400
-#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index 9f947eeb87..d60d213d54 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -212,14 +212,14 @@
/*
* Place the image at the start of the ROM defined image space (per
* CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
- * downloaded image area. We initalize DRAM as soon as we can so that
- * we can place stack, malloc and BSS there. We load U-Boot itself into
- * memory at 0x80800000 for legacy reasons (to not conflict with older
- * SPLs). We have our BSS be placed 2MiB after this, to allow for the
- * default Linux kernel address of 0x80008000 to work with most sized
- * kernels, in the Falcon Mode case. We have the SPL malloc pool at the
- * end of the BSS area. We suggest that the stack be placed at 32MiB after
- * the start of DRAM to allow room for all of the above (handled in Kconfig).
+ * downloaded image area minus 1KiB for scratch space. We initalize DRAM as
+ * soon as we can so that we can place stack, malloc and BSS there. We load
+ * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
+ * with older SPLs). We have our BSS be placed 2MiB after this, to allow for
+ * the default Linux kernel address of 0x80008000 to work with most sized
+ * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end
+ * of the BSS area. We suggest that the stack be placed at 32MiB after the
+ * start of DRAM to allow room for all of the above (handled in Kconfig).
*/
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0x80800000
@@ -233,6 +233,11 @@
CONFIG_SPL_BSS_MAX_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
#endif
+#ifndef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
+#endif
+
/* RAW SD card / eMMC locations. */
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index c54b7b55c4..33426c89bb 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -68,7 +68,6 @@
/* SPL */
#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (54 * 1024)
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h
index e6e88c5282..8c88ebf2f0 100644
--- a/include/configs/ti_omap4_common.h
+++ b/include/configs/ti_omap4_common.h
@@ -151,7 +151,6 @@
* So moving TEXT_BASE down to non-HS limit.
*/
#define CONFIG_SPL_TEXT_BASE 0x40300000
-#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_DISPLAY_PRINT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
index e42c88e3b9..cbdf0bc0db 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -154,13 +154,6 @@
#define CONFIG_SPL_TEXT_BASE 0x40300000
#endif
-/* DRA7xx/AM57xx have 512K of SRAM, OMAP5 only 128K */
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
-#define TI_ROM_BOOT_LOAD_END 0x4037E000
-#else
-#define TI_ROM_BOOT_LOAD_END 0x4031E000
-#endif
-#define CONFIG_SPL_MAX_SIZE (TI_ROM_BOOT_LOAD_END - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_DISPLAY_PRINT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index ae0e89c594..e5d321ac6a 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -338,7 +338,8 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
+ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 55ba99c691..b3ca46be67 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -11,9 +11,7 @@
#ifndef __CONFIG_UNIPHIER_COMMON_H__
#define __CONFIG_UNIPHIER_COMMON_H__
-#define CONFIG_ARMV7_PSCI
#define CONFIG_ARMV7_PSCI_1_0
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h
index 9583e8c081..b509a9cfd4 100644
--- a/include/configs/vexpress_ca15_tc2.h
+++ b/include/configs/vexpress_ca15_tc2.h
@@ -16,6 +16,5 @@
#define CONFIG_SYSFLAGS_ADDR 0x1c010030
#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
-#define CONFIG_ARMV7_PSCI_NR_CPUS 4
#endif
diff --git a/include/dm/platform_data/serial_bcm283x_mu.h b/include/dm/platform_data/serial_bcm283x_mu.h
index 57ae6adc05..c47d3c0e60 100644
--- a/include/dm/platform_data/serial_bcm283x_mu.h
+++ b/include/dm/platform_data/serial_bcm283x_mu.h
@@ -19,6 +19,7 @@ struct bcm283x_mu_serial_platdata {
unsigned long base;
unsigned int clock;
bool skip_init;
+ bool disabled;
};
#endif
diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h
new file mode 100644
index 0000000000..58654fd7aa
--- /dev/null
+++ b/include/dt-bindings/gpio/meson-gxbb-gpio.h
@@ -0,0 +1,154 @@
+/*
+ * GPIO definitions for Amlogic Meson GXBB SoCs
+ *
+ * Copyright (C) 2016 Endless Mobile, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H
+#define _DT_BINDINGS_MESON_GXBB_GPIO_H
+
+#define GPIOAO_0 0
+#define GPIOAO_1 1
+#define GPIOAO_2 2
+#define GPIOAO_3 3
+#define GPIOAO_4 4
+#define GPIOAO_5 5
+#define GPIOAO_6 6
+#define GPIOAO_7 7
+#define GPIOAO_8 8
+#define GPIOAO_9 9
+#define GPIOAO_10 10
+#define GPIOAO_11 11
+#define GPIOAO_12 12
+#define GPIOAO_13 13
+
+#define GPIOZ_0 0
+#define GPIOZ_1 1
+#define GPIOZ_2 2
+#define GPIOZ_3 3
+#define GPIOZ_4 4
+#define GPIOZ_5 5
+#define GPIOZ_6 6
+#define GPIOZ_7 7
+#define GPIOZ_8 8
+#define GPIOZ_9 9
+#define GPIOZ_10 10
+#define GPIOZ_11 11
+#define GPIOZ_12 12
+#define GPIOZ_13 13
+#define GPIOZ_14 14
+#define GPIOZ_15 15
+#define GPIOH_0 16
+#define GPIOH_1 17
+#define GPIOH_2 18
+#define GPIOH_3 19
+#define BOOT_0 20
+#define BOOT_1 21
+#define BOOT_2 22
+#define BOOT_3 23
+#define BOOT_4 24
+#define BOOT_5 25
+#define BOOT_6 26
+#define BOOT_7 27
+#define BOOT_8 28
+#define BOOT_9 29
+#define BOOT_10 30
+#define BOOT_11 31
+#define BOOT_12 32
+#define BOOT_13 33
+#define BOOT_14 34
+#define BOOT_15 35
+#define BOOT_16 36
+#define BOOT_17 37
+#define CARD_0 38
+#define CARD_1 39
+#define CARD_2 40
+#define CARD_3 41
+#define CARD_4 42
+#define CARD_5 43
+#define CARD_6 44
+#define GPIODV_0 45
+#define GPIODV_1 46
+#define GPIODV_2 47
+#define GPIODV_3 48
+#define GPIODV_4 49
+#define GPIODV_5 50
+#define GPIODV_6 51
+#define GPIODV_7 52
+#define GPIODV_8 53
+#define GPIODV_9 54
+#define GPIODV_10 55
+#define GPIODV_11 56
+#define GPIODV_12 57
+#define GPIODV_13 58
+#define GPIODV_14 59
+#define GPIODV_15 60
+#define GPIODV_16 61
+#define GPIODV_17 62
+#define GPIODV_18 63
+#define GPIODV_19 64
+#define GPIODV_20 65
+#define GPIODV_21 66
+#define GPIODV_22 67
+#define GPIODV_23 68
+#define GPIODV_24 69
+#define GPIODV_25 70
+#define GPIODV_26 71
+#define GPIODV_27 72
+#define GPIODV_28 73
+#define GPIODV_29 74
+#define GPIOY_0 75
+#define GPIOY_1 76
+#define GPIOY_2 77
+#define GPIOY_3 78
+#define GPIOY_4 79
+#define GPIOY_5 80
+#define GPIOY_6 81
+#define GPIOY_7 82
+#define GPIOY_8 83
+#define GPIOY_9 84
+#define GPIOY_10 85
+#define GPIOY_11 86
+#define GPIOY_12 87
+#define GPIOY_13 88
+#define GPIOY_14 89
+#define GPIOY_15 90
+#define GPIOY_16 91
+#define GPIOX_0 92
+#define GPIOX_1 93
+#define GPIOX_2 94
+#define GPIOX_3 95
+#define GPIOX_4 96
+#define GPIOX_5 97
+#define GPIOX_6 98
+#define GPIOX_7 99
+#define GPIOX_8 100
+#define GPIOX_9 101
+#define GPIOX_10 102
+#define GPIOX_11 103
+#define GPIOX_12 104
+#define GPIOX_13 105
+#define GPIOX_14 106
+#define GPIOX_15 107
+#define GPIOX_16 108
+#define GPIOX_17 109
+#define GPIOX_18 110
+#define GPIOX_19 111
+#define GPIOX_20 112
+#define GPIOX_21 113
+#define GPIOX_22 114
+#define GPIOCLK_0 115
+#define GPIOCLK_1 116
+#define GPIOCLK_2 117
+#define GPIOCLK_3 118
+#define GPIO_TEST_N 119
+
+#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
new file mode 100644
index 0000000000..524d6077ac
--- /dev/null
+++ b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
@@ -0,0 +1,210 @@
+/*
+ * This file is provided under a dual BSD/GPLv2 license. When using or
+ * redistributing this file, you may do so under either license.
+ *
+ * GPL LICENSE SUMMARY
+ *
+ * Copyright (c) 2016 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ * The full GNU General Public License is included in this distribution
+ * in the file called COPYING.
+ *
+ * BSD LICENSE
+ *
+ * Copyright (c) 2016 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
+#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
+
+/* RESET0 */
+#define RESET_HIU 0
+/* 1 */
+#define RESET_DOS_RESET 2
+#define RESET_DDR_TOP 3
+#define RESET_DCU_RESET 4
+#define RESET_VIU 5
+#define RESET_AIU 6
+#define RESET_VID_PLL_DIV 7
+/* 8 */
+#define RESET_PMUX 9
+#define RESET_VENC 10
+#define RESET_ASSIST 11
+#define RESET_AFIFO2 12
+#define RESET_VCBUS 13
+/* 14 */
+/* 15 */
+#define RESET_GIC 16
+#define RESET_CAPB3_DECODE 17
+#define RESET_NAND_CAPB3 18
+#define RESET_HDMITX_CAPB3 19
+#define RESET_MALI_CAPB3 20
+#define RESET_DOS_CAPB3 21
+#define RESET_SYS_CPU_CAPB3 22
+#define RESET_CBUS_CAPB3 23
+#define RESET_AHB_CNTL 24
+#define RESET_AHB_DATA 25
+#define RESET_VCBUS_CLK81 26
+#define RESET_MMC 27
+#define RESET_MIPI_0 28
+#define RESET_MIPI_1 29
+#define RESET_MIPI_2 30
+#define RESET_MIPI_3 31
+/* RESET1 */
+#define RESET_CPPM 32
+#define RESET_DEMUX 33
+#define RESET_USB_OTG 34
+#define RESET_DDR 35
+#define RESET_AO_RESET 36
+#define RESET_BT656 37
+#define RESET_AHB_SRAM 38
+/* 39 */
+#define RESET_PARSER 40
+#define RESET_BLKMV 41
+#define RESET_ISA 42
+#define RESET_ETHERNET 43
+#define RESET_SD_EMMC_A 44
+#define RESET_SD_EMMC_B 45
+#define RESET_SD_EMMC_C 46
+#define RESET_ROM_BOOT 47
+#define RESET_SYS_CPU_0 48
+#define RESET_SYS_CPU_1 49
+#define RESET_SYS_CPU_2 50
+#define RESET_SYS_CPU_3 51
+#define RESET_SYS_CPU_CORE_0 52
+#define RESET_SYS_CPU_CORE_1 53
+#define RESET_SYS_CPU_CORE_2 54
+#define RESET_SYS_CPU_CORE_3 55
+#define RESET_SYS_PLL_DIV 56
+#define RESET_SYS_CPU_AXI 57
+#define RESET_SYS_CPU_L2 58
+#define RESET_SYS_CPU_P 59
+#define RESET_SYS_CPU_MBIST 60
+/* 61 */
+/* 62 */
+/* 63 */
+/* RESET2 */
+#define RESET_VD_RMEM 64
+#define RESET_AUDIN 65
+#define RESET_HDMI_TX 66
+/* 67 */
+/* 68 */
+/* 69 */
+#define RESET_GE2D 70
+#define RESET_PARSER_REG 71
+#define RESET_PARSER_FETCH 72
+#define RESET_PARSER_CTL 73
+#define RESET_PARSER_TOP 74
+/* 75 */
+/* 76 */
+#define RESET_AO_CPU_RESET 77
+#define RESET_MALI 78
+#define RESET_HDMI_SYSTEM_RESET 79
+/* 80-95 */
+/* RESET3 */
+#define RESET_RING_OSCILLATOR 96
+#define RESET_SYS_CPU 97
+#define RESET_EFUSE 98
+#define RESET_SYS_CPU_BVCI 99
+#define RESET_AIFIFO 100
+#define RESET_TVFE 101
+#define RESET_AHB_BRIDGE_CNTL 102
+/* 103 */
+#define RESET_AUDIO_DAC 104
+#define RESET_DEMUX_TOP 105
+#define RESET_DEMUX_DES 106
+#define RESET_DEMUX_S2P_0 107
+#define RESET_DEMUX_S2P_1 108
+#define RESET_DEMUX_RESET_0 109
+#define RESET_DEMUX_RESET_1 110
+#define RESET_DEMUX_RESET_2 111
+/* 112-127 */
+/* RESET4 */
+/* 128 */
+/* 129 */
+/* 130 */
+/* 131 */
+#define RESET_DVIN_RESET 132
+#define RESET_RDMA 133
+#define RESET_VENCI 134
+#define RESET_VENCP 135
+/* 136 */
+#define RESET_VDAC 137
+#define RESET_RTC 138
+/* 139 */
+#define RESET_VDI6 140
+#define RESET_VENCL 141
+#define RESET_I2C_MASTER_2 142
+#define RESET_I2C_MASTER_1 143
+/* 144-159 */
+/* RESET5 */
+/* 160-191 */
+/* RESET6 */
+#define RESET_PERIPHS_GENERAL 192
+#define RESET_PERIPHS_SPICC 193
+#define RESET_PERIPHS_SMART_CARD 194
+#define RESET_PERIPHS_SAR_ADC 195
+#define RESET_PERIPHS_I2C_MASTER_0 196
+#define RESET_SANA 197
+/* 198 */
+#define RESET_PERIPHS_STREAM_INTERFACE 199
+#define RESET_PERIPHS_SDIO 200
+#define RESET_PERIPHS_UART_0 201
+#define RESET_PERIPHS_UART_1_2 202
+#define RESET_PERIPHS_ASYNC_0 203
+#define RESET_PERIPHS_ASYNC_1 204
+#define RESET_PERIPHS_SPI_0 205
+#define RESET_PERIPHS_SDHC 206
+#define RESET_UART_SLIP 207
+/* 208-223 */
+/* RESET7 */
+#define RESET_USB_DDR_0 224
+#define RESET_USB_DDR_1 225
+#define RESET_USB_DDR_2 226
+#define RESET_USB_DDR_3 227
+/* 228 */
+#define RESET_DEVICE_MMC_ARB 229
+/* 230 */
+#define RESET_VID_LOCK 231
+#define RESET_A9_DMC_PIPEL 232
+/* 233-255 */
+
+#endif
diff --git a/include/efi.h b/include/efi.h
index 83de2d479e..5a3b8cf69a 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -159,6 +159,8 @@ struct efi_mem_desc {
u64 attribute;
};
+#define EFI_MEMORY_DESCRIPTOR_VERSION 1
+
/* Allocation types for calls to boottime->allocate_pages*/
#define EFI_ALLOCATE_ANY_PAGES 0
#define EFI_ALLOCATE_MAX_ADDRESS 1
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index df3547c47f..80e4e26e05 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -339,6 +339,9 @@ efi_status_t efi_get_memory_map(unsigned long *memory_map_size,
if (descriptor_size)
*descriptor_size = sizeof(struct efi_mem_desc);
+ if (descriptor_version)
+ *descriptor_version = EFI_MEMORY_DESCRIPTOR_VERSION;
+
if (*memory_map_size < map_size)
return EFI_BUFFER_TOO_SMALL;
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index 5283689d8e..5576b574a8 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -47,21 +47,23 @@ It looks like one of the following:
This config option was moved to the defconfig
- CONFIG_... is not defined in Kconfig. Do nothing.
- The entry for this CONFIG was not found in Kconfig.
+ The entry for this CONFIG was not found in Kconfig. The option is not
+ defined in the config header, either. So, this case can be just skipped.
+
+ - CONFIG_... is not defined in Kconfig (suspicious). Do nothing.
+ This option is defined in the config header, but its entry was not found
+ in Kconfig.
There are two common cases:
- You forgot to create an entry for the CONFIG before running
this tool, or made a typo in a CONFIG passed to this tool.
- The entry was hidden due to unmet 'depends on'.
- This is correct behavior.
+ The tool does not know if the result is reasonable, so please check it
+ manually.
- 'CONFIG_...' is the same as the define in Kconfig. Do nothing.
The define in the config header matched the one in Kconfig.
We do not need to touch it.
- - Undefined. Do nothing.
- This config option was not found in the config header.
- Nothing to do.
-
- Compiler is missing. Do nothing.
The compiler specified for this architecture was not found
in your PATH environment.
@@ -136,6 +138,12 @@ Available options
If not specified, "make savedefconfig" only occurs for cases
where at least one CONFIG was moved.
+ -S, --spl
+ Look for moved config options in spl/include/autoconf.mk instead of
+ include/autoconf.mk. This is useful for moving options for SPL build
+ because SPL related options (mostly prefixed with CONFIG_SPL_) are
+ sometimes blocked by CONFIG_SPL_BUILD ifdef conditionals.
+
-H, --headers-only
Only cleanup the headers; skip the defconfig processing
@@ -214,7 +222,8 @@ STATE_SAVEDEFCONFIG = 3
ACTION_MOVE = 0
ACTION_NO_ENTRY = 1
-ACTION_NO_CHANGE = 2
+ACTION_NO_ENTRY_WARN = 2
+ACTION_NO_CHANGE = 3
COLOR_BLACK = '0;30'
COLOR_RED = '0;31'
@@ -611,6 +620,8 @@ class KconfigParser:
self.options = options
self.dotconfig = os.path.join(build_dir, '.config')
self.autoconf = os.path.join(build_dir, 'include', 'autoconf.mk')
+ self.spl_autoconf = os.path.join(build_dir, 'spl', 'include',
+ 'autoconf.mk')
self.config_autoconf = os.path.join(build_dir, 'include', 'config',
'auto.conf')
self.defconfig = os.path.join(build_dir, 'defconfig')
@@ -663,14 +674,6 @@ class KconfigParser:
"""
not_set = '# %s is not set' % config
- for line in dotconfig_lines:
- line = line.rstrip()
- if line.startswith(config + '=') or line == not_set:
- old_val = line
- break
- else:
- return (ACTION_NO_ENTRY, config)
-
for line in autoconf_lines:
line = line.rstrip()
if line.startswith(config + '='):
@@ -679,6 +682,17 @@ class KconfigParser:
else:
new_val = not_set
+ for line in dotconfig_lines:
+ line = line.rstrip()
+ if line.startswith(config + '=') or line == not_set:
+ old_val = line
+ break
+ else:
+ if new_val == not_set:
+ return (ACTION_NO_ENTRY, config)
+ else:
+ return (ACTION_NO_ENTRY_WARN, config)
+
# If this CONFIG is neither bool nor trisate
if old_val[-2:] != '=y' and old_val[-2:] != '=m' and old_val != not_set:
# tools/scripts/define2mk.sed changes '1' to 'y'.
@@ -708,11 +722,26 @@ class KconfigParser:
results = []
updated = False
+ suspicious = False
+ rm_files = [self.config_autoconf, self.autoconf]
+
+ if self.options.spl:
+ if os.path.exists(self.spl_autoconf):
+ autoconf_path = self.spl_autoconf
+ rm_files.append(self.spl_autoconf)
+ else:
+ for f in rm_files:
+ os.remove(f)
+ return (updated, suspicious,
+ color_text(self.options.color, COLOR_BROWN,
+ "SPL is not enabled. Skipped.") + '\n')
+ else:
+ autoconf_path = self.autoconf
with open(self.dotconfig) as f:
dotconfig_lines = f.readlines()
- with open(self.autoconf) as f:
+ with open(autoconf_path) as f:
autoconf_lines = f.readlines()
for config in self.configs:
@@ -729,10 +758,17 @@ class KconfigParser:
elif action == ACTION_NO_ENTRY:
actlog = "%s is not defined in Kconfig. Do nothing." % value
log_color = COLOR_LIGHT_BLUE
+ elif action == ACTION_NO_ENTRY_WARN:
+ actlog = "%s is not defined in Kconfig (suspicious). Do nothing." % value
+ log_color = COLOR_YELLOW
+ suspicious = True
elif action == ACTION_NO_CHANGE:
actlog = "'%s' is the same as the define in Kconfig. Do nothing." \
% value
log_color = COLOR_LIGHT_PURPLE
+ elif action == ACTION_SPL_NOT_EXIST:
+ actlog = "SPL is not enabled for this defconfig. Skip."
+ log_color = COLOR_PURPLE
else:
sys.exit("Internal Error. This should not happen.")
@@ -745,10 +781,10 @@ class KconfigParser:
updated = True
self.results = results
- os.remove(self.config_autoconf)
- os.remove(self.autoconf)
+ for f in rm_files:
+ os.remove(f)
- return (updated, log)
+ return (updated, suspicious, log)
def check_defconfig(self):
"""Check the defconfig after savedefconfig
@@ -802,8 +838,8 @@ class Slot:
self.reference_src_dir = reference_src_dir
self.parser = KconfigParser(configs, options, self.build_dir)
self.state = STATE_IDLE
- self.failed_boards = []
- self.suspicious_boards = []
+ self.failed_boards = set()
+ self.suspicious_boards = set()
def __del__(self):
"""Delete the working directory
@@ -927,7 +963,9 @@ class Slot:
def do_savedefconfig(self):
"""Update the .config and run 'make savedefconfig'."""
- (updated, log) = self.parser.update_dotconfig()
+ (updated, suspicious, log) = self.parser.update_dotconfig()
+ if suspicious:
+ self.suspicious_boards.add(self.defconfig)
self.log += log
if not self.options.force_sync and not updated:
@@ -950,7 +988,7 @@ class Slot:
log = self.parser.check_defconfig()
if log:
- self.suspicious_boards.append(self.defconfig)
+ self.suspicious_boards.add(self.defconfig)
self.log += log
orig_defconfig = os.path.join('configs', self.defconfig)
new_defconfig = os.path.join(self.build_dir, 'defconfig')
@@ -984,21 +1022,21 @@ class Slot:
sys.exit("Exit on error.")
# If --exit-on-error flag is not set, skip this board and continue.
# Record the failed board.
- self.failed_boards.append(self.defconfig)
+ self.failed_boards.add(self.defconfig)
self.progress.inc()
self.progress.show()
self.state = STATE_IDLE
def get_failed_boards(self):
- """Returns a list of failed boards (defconfigs) in this slot.
+ """Returns a set of failed boards (defconfigs) in this slot.
"""
return self.failed_boards
def get_suspicious_boards(self):
- """Returns a list of boards (defconfigs) with possible misconversion.
+ """Returns a set of boards (defconfigs) with possible misconversion.
"""
- return self.suspicious_boards
+ return self.suspicious_boards - self.failed_boards
class Slots:
@@ -1061,11 +1099,11 @@ class Slots:
def show_failed_boards(self):
"""Display all of the failed boards (defconfigs)."""
- boards = []
+ boards = set()
output_file = 'moveconfig.failed'
for slot in self.slots:
- boards += slot.get_failed_boards()
+ boards |= slot.get_failed_boards()
if boards:
boards = '\n'.join(boards) + '\n'
@@ -1080,11 +1118,11 @@ class Slots:
def show_suspicious_boards(self):
"""Display all boards (defconfigs) with possible misconversion."""
- boards = []
+ boards = set()
output_file = 'moveconfig.suspicious'
for slot in self.slots:
- boards += slot.get_suspicious_boards()
+ boards |= slot.get_suspicious_boards()
if boards:
boards = '\n'.join(boards) + '\n'
@@ -1204,6 +1242,8 @@ def main():
help='exit immediately on any error')
parser.add_option('-s', '--force-sync', action='store_true', default=False,
help='force sync by savedefconfig')
+ parser.add_option('-S', '--spl', action='store_true', default=False,
+ help='parse config options defined for SPL build')
parser.add_option('-H', '--headers-only', dest='cleanup_headers_only',
action='store_true', default=False,
help='only cleanup the headers')