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-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index fde893e8c9..5254cdf366 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -36,6 +36,8 @@
#ifdef CONFIG_TFABOOT
#include <env_internal.h>
#endif
+#include <dm.h>
+#include <linux/err.h>
#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
DECLARE_GLOBAL_DATA_PTR;
#endif
@@ -897,6 +899,38 @@ __weak int fsl_board_late_init(void)
return 0;
}
+#define DWC3_GSBUSCFG0 0xc100
+#define DWC3_GSBUSCFG0_CACHETYPE_SHIFT 16
+#define DWC3_GSBUSCFG0_CACHETYPE(n) (((n) & 0xffff) \
+ << DWC3_GSBUSCFG0_CACHETYPE_SHIFT)
+
+void enable_dwc3_snooping(void)
+{
+ int ret;
+ u32 val;
+ struct udevice *bus;
+ struct uclass *uc;
+ fdt_addr_t dwc3_base;
+
+ ret = uclass_get(UCLASS_USB, &uc);
+ if (ret)
+ return;
+
+ uclass_foreach_dev(bus, uc) {
+ if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) {
+ dwc3_base = devfdt_get_addr(bus);
+ if (dwc3_base == FDT_ADDR_T_NONE) {
+ dev_err(bus, "dwc3 regs missing\n");
+ continue;
+ }
+ val = in_le32(dwc3_base + DWC3_GSBUSCFG0);
+ val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0);
+ val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222);
+ writel(val, dwc3_base + DWC3_GSBUSCFG0);
+ }
+ }
+}
+
int board_late_init(void)
{
#ifdef CONFIG_CHAIN_OF_TRUST
@@ -934,6 +968,9 @@ int board_late_init(void)
fspi_ahb_init();
#endif
+ if (IS_ENABLED(CONFIG_DM))
+ enable_dwc3_snooping();
+
return fsl_board_late_init();
}
#endif