diff options
| -rw-r--r-- | arch/x86/include/asm/arch-baytrail/gpio.h | 13 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-coreboot/gpio.h | 13 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-efi/gpio.h | 10 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-ivybridge/gpio.h | 13 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-qemu/gpio.h | 13 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-quark/gpio.h | 13 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-queensbay/gpio.h | 13 | ||||
| -rw-r--r-- | arch/x86/include/asm/gpio.h | 1 | ||||
| -rw-r--r-- | board/intel/galileo/galileo.c | 5 |
9 files changed, 2 insertions, 92 deletions
diff --git a/arch/x86/include/asm/arch-baytrail/gpio.h b/arch/x86/include/asm/arch-baytrail/gpio.h deleted file mode 100644 index 4e8987ce5c..0000000000 --- a/arch/x86/include/asm/arch-baytrail/gpio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _X86_ARCH_GPIO_H_ -#define _X86_ARCH_GPIO_H_ - -/* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x48 - -#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-coreboot/gpio.h b/arch/x86/include/asm/arch-coreboot/gpio.h deleted file mode 100644 index 31edef9623..0000000000 --- a/arch/x86/include/asm/arch-coreboot/gpio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (c) 2014, Google Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _X86_ARCH_GPIO_H_ -#define _X86_ARCH_GPIO_H_ - -/* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x48 - -#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-efi/gpio.h b/arch/x86/include/asm/arch-efi/gpio.h deleted file mode 100644 index f044f07537..0000000000 --- a/arch/x86/include/asm/arch-efi/gpio.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (c) 2015 Google, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _X86_ARCH_GPIO_H_ -#define _X86_ARCH_GPIO_H_ - -#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-ivybridge/gpio.h b/arch/x86/include/asm/arch-ivybridge/gpio.h deleted file mode 100644 index 31edef9623..0000000000 --- a/arch/x86/include/asm/arch-ivybridge/gpio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (c) 2014, Google Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _X86_ARCH_GPIO_H_ -#define _X86_ARCH_GPIO_H_ - -/* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x48 - -#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-qemu/gpio.h b/arch/x86/include/asm/arch-qemu/gpio.h deleted file mode 100644 index ca8cba4f97..0000000000 --- a/arch/x86/include/asm/arch-qemu/gpio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _X86_ARCH_GPIO_H_ -#define _X86_ARCH_GPIO_H_ - -/* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x44 - -#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-quark/gpio.h b/arch/x86/include/asm/arch-quark/gpio.h deleted file mode 100644 index ca8cba4f97..0000000000 --- a/arch/x86/include/asm/arch-quark/gpio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _X86_ARCH_GPIO_H_ -#define _X86_ARCH_GPIO_H_ - -/* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x44 - -#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-queensbay/gpio.h b/arch/x86/include/asm/arch-queensbay/gpio.h deleted file mode 100644 index ab4e059131..0000000000 --- a/arch/x86/include/asm/arch-queensbay/gpio.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _X86_ARCH_GPIO_H_ -#define _X86_ARCH_GPIO_H_ - -/* Where in config space is the register that points to the GPIO registers? */ -#define PCI_CFG_GPIOBASE 0x44 - -#endif /* _X86_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h index ed85b08ce7..403851b792 100644 --- a/arch/x86/include/asm/gpio.h +++ b/arch/x86/include/asm/gpio.h @@ -7,7 +7,6 @@ #define _X86_GPIO_H_ #include <linux/compiler.h> -#include <asm/arch/gpio.h> #include <asm-generic/gpio.h> struct ich6_bank_platdata { diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c index c1087acb69..212c9702d3 100644 --- a/board/intel/galileo/galileo.c +++ b/board/intel/galileo/galileo.c @@ -7,7 +7,6 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/device.h> -#include <asm/arch/gpio.h> #include <asm/arch/quark.h> int board_early_init_f(void) @@ -30,7 +29,7 @@ void board_assert_perst(void) u32 base, port, val; /* retrieve the GPIO IO base */ - qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base); + qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); base = (base & 0xffff) & ~0x7f; /* enable the pin */ @@ -57,7 +56,7 @@ void board_deassert_perst(void) u32 base, port, val; /* retrieve the GPIO IO base */ - qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, PCI_CFG_GPIOBASE, &base); + qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base); base = (base & 0xffff) & ~0x7f; /* pull it up (de-assert) */ |