diff options
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 5 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/Makefile | 2 | ||||
-rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 2 | ||||
-rw-r--r-- | arch/powerpc/include/asm/fsl_law.h | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 2 | ||||
-rw-r--r-- | board/xes/common/Makefile | 2 | ||||
-rw-r--r-- | board/xes/common/fsl_8xxx_clk.c | 4 | ||||
-rw-r--r-- | include/configs/p1_p2_rdb_pc.h | 1 | ||||
-rw-r--r-- | include/configs/xpedite550x.h | 1 | ||||
-rw-r--r-- | scripts/config_whitelist.txt | 1 |
10 files changed, 13 insertions, 11 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 90777db968..51192fe9dc 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -162,6 +162,7 @@ config TARGET_P2020RDB bool "Support P2020RDB-PC" select SUPPORT_SPL select SUPPORT_TPL + select ARCH_P2020 config TARGET_P1_TWR bool "Support p1_twr" @@ -232,6 +233,7 @@ config TARGET_XPEDITE537X config TARGET_XPEDITE550X bool "Support xpedite550x" + select ARCH_P2020 config TARGET_UCP1020 bool "Support uCP1020" @@ -306,6 +308,9 @@ config ARCH_P1024 config ARCH_P1025 bool +config ARCH_P2020 + bool + source "board/freescale/b4860qds/Kconfig" source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9132qds/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index a3fba03741..acf57b7d70 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -81,7 +81,7 @@ obj-$(CONFIG_ARCH_P1023) += p1023_serdes.o obj-$(CONFIG_ARCH_P1024) += p1021_serdes.o obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o obj-$(CONFIG_P2010) += p2020_serdes.o -obj-$(CONFIG_P2020) += p2020_serdes.o +obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o obj-$(CONFIG_PPC_P2041) += p2041_serdes.o obj-$(CONFIG_PPC_P3041) += p3041_serdes.o obj-$(CONFIG_PPC_P4080) += p4080_serdes.o diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 6874b5403a..814a9fbce6 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -295,7 +295,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A004508 #define CONFIG_SYS_FSL_ERRATUM_A005125 -#elif defined(CONFIG_P2020) +#elif defined(CONFIG_ARCH_P2020) #define CONFIG_MAX_CPUS 2 #define CONFIG_SYS_FSL_NUM_LAWS 12 #define CONFIG_SYS_PPC_E500_DEBUG_TLB 2 diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h index 4e5ea5f936..eee78c8856 100644 --- a/arch/powerpc/include/asm/fsl_law.h +++ b/arch/powerpc/include/asm/fsl_law.h @@ -85,7 +85,7 @@ enum law_trgt_if { #if defined(CONFIG_ARCH_BSC9131) || defined(CONFIG_ARCH_BSC9132) LAW_TRGT_IF_OCN_DSP = 0x03, #else -#if !defined(CONFIG_ARCH_MPC8572) && !defined(CONFIG_P2020) +#if !defined(CONFIG_ARCH_MPC8572) && !defined(CONFIG_ARCH_P2020) LAW_TRGT_IF_PCIE_3 = 0x03, #endif #endif @@ -121,7 +121,7 @@ enum law_trgt_if { #define LAW_TRGT_IF_PCIE_1 LAW_TRGT_IF_PCI #endif -#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_P2020) +#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020) #define LAW_TRGT_IF_PCIE_3 LAW_TRGT_IF_PCI #endif #endif /* CONFIG_FSL_CORENET */ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index f8a6a78049..ba0faa80ea 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2940,7 +2940,7 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_PCIX2_OFFSET 0x9000 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0xa000 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x9000 -#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_P2020) +#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020) #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000 #else #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000 diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile index 1b2ec5cadc..db1f029f96 100644 --- a/board/xes/common/Makefile +++ b/board/xes/common/Makefile @@ -8,7 +8,7 @@ obj-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o obj-$(CONFIG_ARCH_MPC8572) += fsl_8xxx_clk.o obj-$(CONFIG_MPC86xx) += fsl_8xxx_clk.o -obj-$(CONFIG_P2020) += fsl_8xxx_clk.o +obj-$(CONFIG_ARCH_P2020) += fsl_8xxx_clk.o obj-$(CONFIG_MPC85xx) += fsl_8xxx_misc.o board.o obj-$(CONFIG_MPC86xx) += fsl_8xxx_misc.o board.o obj-$(CONFIG_NAND_ACTL) += actl_nand.o diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c index 2a604d448b..e102b0cfc3 100644 --- a/board/xes/common/fsl_8xxx_clk.c +++ b/board/xes/common/fsl_8xxx_clk.c @@ -22,7 +22,7 @@ unsigned long get_board_sys_clk(ulong dummy) if (in_be32(&gur->gpporcr) & 0x10000) return 66666666; else -#ifdef CONFIG_P2020 +#ifdef CONFIG_ARCH_P2020 return 100000000; #else return 50000000; @@ -42,7 +42,7 @@ unsigned long get_board_ddr_clk(ulong dummy) if (ddr_ratio == 0x7) return get_board_sys_clk(dummy); -#ifdef CONFIG_P2020 +#ifdef CONFIG_ARCH_P2020 if (in_be32(&gur->gpporcr) & 0x20000) return 66666666; else diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 3320a7e933..77f3d81593 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -144,7 +144,6 @@ #if defined(CONFIG_TARGET_P2020RDB) #define CONFIG_BOARDNAME "P2020RDB-PC" #define CONFIG_NAND_FSL_ELBC -#define CONFIG_P2020 #define CONFIG_VSC7385_ENET #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0xc8 diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 973089b5a9..f12f8fe1d0 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -16,7 +16,6 @@ */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_P2020 1 #define CONFIG_XPEDITE550X 1 #define CONFIG_SYS_BOARD_NAME "XPedite5500" #define CONFIG_SYS_FORM_PMC_XMC 1 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e4dcd0b01b..cc4e05762e 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3383,7 +3383,6 @@ CONFIG_OS2_ENV_ADDR CONFIG_OS_ENV_ADDR CONFIG_OTHBOOTARGS CONFIG_OVERWRITE_ETHADDR_ONCE -CONFIG_P2020 CONFIG_P2041RDB CONFIG_P3041DS CONFIG_P4080DS |