diff options
111 files changed, 155 insertions, 11016 deletions
@@ -82,7 +82,6 @@ D: Port to the gw8260 board N: Curt Brune E: curt@cucy.com D: Added support for Samsung S3C4510B CPU (ARM7tdmi based SoC) -D: Added support for ESPD-Inc. EVB4510 Board W: http://www.cucy.com N: Jonathan De Bruyne @@ -134,11 +133,6 @@ N: Dave Ellis E: DGE@sixnetio.com D: EEPROM Speedup, SXNI855T port -N: Thomas Elste -E: info@elste.org -D: Port for the ModNET50 Board, NET+50 CPU Port -W: http://www.imms.de - N: Daniel Engstr?m E: daniel@omicron.se D: x86 port, Support for sc520_cdp board diff --git a/MAINTAINERS b/MAINTAINERS index 3bfe3fb6c6..2f60a60e2a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -624,18 +624,10 @@ Eric Cooper <ecc@cmu.edu> dockstar ARM926EJS (Kirkwood SoC) -George G. Davis <gdavis@mvista.com> - - gcplus SA1100 - Wolfgang Denk <wd@denx.de> imx27lite i.MX27 qong i.MX31 -Thomas Elste <info@elste.org> - - modnet50 ARM720T (NET+50) - Kristoffer Ericson <kristoffer.ericson@gmail.com> jornada SA1110 @@ -661,11 +653,6 @@ Simon Guinot <simon.guinot@sequanux.org> netspace_v2 ARM926EJS (Kirkwood SoC) netspace_max_v2 ARM926EJS (Kirkwood SoC) -Marius Gröger <mag@sysgo.de> - - impa7 ARM720T (EP7211) - ep7312 ARM720T (EP7312) - Igor Grinberg <grinberg@compulab.co.il> cm-t35 ARM ARMV7 (OMAP3xx Soc) @@ -759,10 +746,6 @@ Nagendra T S <nagendra@mistralsolutions.com> am3517_crane ARM ARMV7 (AM35x SoC) -Rolf Offermanns <rof@sysgo.de> - - shannon SA1100 - Kyungmin Park <kyungmin.park@samsung.com> apollon ARM1136EJS @@ -900,11 +883,6 @@ Richard Woodruff <r-woodruff2@ti.com> omap2420h4 ARM1136EJS -Alex Züpke <azu@sysgo.de> - - lart SA1100 - dnp1110 SA1110 - Syed Mohammed Khasim <sm.khasim@gmail.com> Sughosh Ganu <urwithsughosh@gmail.com> @@ -297,19 +297,6 @@ LIST_ppc=" \ LIST_SA="$(boards_by_cpu sa1100)" ######################################################################### -## ARM7 Systems -######################################################################### - -LIST_ARM7=" \ - ep7312 \ - evb4510 \ - impa7 \ - lpc2292sodimm \ - modnet50 \ - SMN42 \ -" - -######################################################################### ## ARM9 Systems ######################################################################### @@ -405,7 +392,6 @@ LIST_ixp="$(boards_by_cpu ixp) LIST_arm=" \ ${LIST_SA} \ - ${LIST_ARM7} \ ${LIST_ARM9} \ ${LIST_ARM10} \ ${LIST_ARM11} \ @@ -464,7 +464,8 @@ updater: # parallel sub-makes creating .depend files simultaneously. depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \ $(obj)include/autoconf.mk \ - $(obj)include/generated/generic-asm-offsets.h + $(obj)include/generated/generic-asm-offsets.h \ + $(obj)include/generated/asm-offsets.h for dir in $(SUBDIRS) $(CPUDIR) $(dir $(LDSCRIPT)) ; do \ $(MAKE) -C $$dir _depend ; done @@ -527,6 +528,21 @@ $(obj)lib/asm-offsets.s: $(obj)include/autoconf.mk.dep \ $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \ -o $@ $(src)lib/asm-offsets.c -c -S +$(obj)include/generated/asm-offsets.h: $(obj)include/autoconf.mk.dep \ + $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s + @echo Generating $@ + tools/scripts/make-asm-offsets $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s $@ + +$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s: $(obj)include/autoconf.mk.dep + @mkdir -p $(obj)$(CPUDIR)/$(SOC) + if [ -f $(src)$(CPUDIR)/$(SOC)/asm-offsets.c ];then \ + $(CC) -DDO_DEPS_ONLY \ + $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \ + -o $@ $(src)$(CPUDIR)/$(SOC)/asm-offsets.c -c -S; \ + else \ + touch $@; \ + fi + ######################################################################### else # !config.mk all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \ @@ -939,6 +955,8 @@ clean: $(obj)arch/blackfin/cpu/init.{lds,elf} @rm -f $(obj)include/bmp_logo.h @rm -f $(obj)lib/asm-offsets.s + @rm -f $(obj)include/generated/asm-offsets.h + @rm -f $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s @rm -f $(obj)nand_spl/{u-boot.lds,u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map,System.map} @rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map} @rm -f $(obj)mmc_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,u-boot-spl.bin,u-boot-mmc-spl.bin} diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index 248431b9bc..e3a4d1b808 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -85,6 +85,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk) case MXC_ARM_CLK: return mx31_get_mcu_main_clk(); case MXC_IPG_CLK: + case MXC_IPG_PERCLK: case MXC_CSPI_CLK: case MXC_UART_CLK: return mx31_get_ipg_clk(); diff --git a/arch/arm/cpu/arm1136/mx35/Makefile b/arch/arm/cpu/arm1136/mx35/Makefile index 284cdc50d1..469397ca43 100644 --- a/arch/arm/cpu/arm1136/mx35/Makefile +++ b/arch/arm/cpu/arm1136/mx35/Makefile @@ -39,8 +39,6 @@ all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) -$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h - ######################################################################### diff --git a/arch/arm/cpu/arm1136/omap24xx/timer.c b/arch/arm/cpu/arm1136/omap24xx/timer.c index 73bf4a7b4c..e929ae45bb 100644 --- a/arch/arm/cpu/arm1136/omap24xx/timer.c +++ b/arch/arm/cpu/arm1136/omap24xx/timer.c @@ -41,13 +41,6 @@ DECLARE_GLOBAL_DATA_PTR; -static void reset_timer_masked (void) -{ - /* reset time */ - gd->lastinc = READ_TIMER; /* capture current incrementer value time */ - gd->tbl = 0; /* start "advancing" time stamp from 0 */ -} - int timer_init (void) { int32_t val; @@ -57,7 +50,9 @@ int timer_init (void) val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/ *((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */ - reset_timer_masked(); /* init the timestamp and lastinc value */ + /* reset time */ + gd->lastinc = READ_TIMER; /* capture current incrementer value */ + gd->tbl = 0; /* start "advancing" time stamp */ return(0); } @@ -84,10 +79,13 @@ void __udelay (unsigned long usec) } tmp = get_timer (0); /* get current timestamp */ - if ( (tmo + tmp + 1) < tmp ) /* if setting this forward will roll time stamp */ - reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */ - else + if ((tmo + tmp + 1) < tmp) { /* if setting this forward will roll */ + /* time stamp, then reset time */ + gd->lastinc = READ_TIMER; /* capture incrementer value */ + gd->tbl = 0; /* start time stamp */ + } else { tmo += tmp; /* else, set advancing stamp wake up time */ + } while (get_timer_masked () < tmo)/* loop till event */ /*NOP*/; } diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c index ff992aac52..974f2880a4 100644 --- a/arch/arm/cpu/arm720t/cpu.c +++ b/arch/arm/cpu/arm720t/cpu.c @@ -36,10 +36,6 @@ #include <asm/hardware.h> #include <asm/system.h> -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) -static void cache_flush(void); -#endif - int cleanup_before_linux (void) { /* @@ -50,20 +46,7 @@ int cleanup_before_linux (void) * and we set the CPU-speed to 73 MHz - see start.S for details */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) - disable_interrupts (); - - /* turn off I-cache */ - icache_disable(); - dcache_disable(); - - /* flush I-cache */ - cache_flush(); -#ifdef CONFIG_ARM7_REVD - /* go to high speed */ - IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73; -#endif -#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292) +#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292) disable_interrupts (); /* Nothing more needed */ #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) @@ -73,13 +56,3 @@ int cleanup_before_linux (void) #endif return 0; } - -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) -/* flush I/D-cache */ -static void cache_flush (void) -{ - unsigned long i = 0; - - asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); -} -#endif diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c index fa9c5a20bd..464dd30466 100644 --- a/arch/arm/cpu/arm720t/interrupts.c +++ b/arch/arm/cpu/arm720t/interrupts.c @@ -149,18 +149,6 @@ int timer_init (void) /* set timer 2 counter */ lastdec = TIMER_LOAD_VAL; -#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) - /* disable all interrupts */ - IO_INTMR1 = 0; - - /* operate timer 1 in prescale mode */ - IO_SYSCON1 |= SYSCON1_TC1M; - - /* select 2kHz clock source for timer 1 */ - IO_SYSCON1 &= ~SYSCON1_TC1S; - - /* set timer 1 counter */ - lastdec = IO_TC1D = TIMER_LOAD_VAL; #elif defined(CONFIG_S3C4510B) /* configure free running timer 0 */ PUT_REG( REG_TMOD, 0x0); @@ -207,7 +195,7 @@ int timer_init (void) */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292) +#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292) ulong get_timer (ulong base) { diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index e9a094fcbd..00fa8c95ea 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -272,25 +272,7 @@ _dynsym_start_ofs: ************************************************************************* */ -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) - -/* Interrupt-Controller base addresses */ -INTMR1: .word 0x80000280 @ 32 bit size -INTMR2: .word 0x80001280 @ 16 bit size -INTMR3: .word 0x80002280 @ 8 bit size - -/* SYSCONs */ -SYSCON1: .word 0x80000100 -SYSCON2: .word 0x80001100 -SYSCON3: .word 0x80002200 - -#define CLKCTL 0x6 /* mask */ -#define CLKCTL_18 0x0 /* 18.432 MHz */ -#define CLKCTL_36 0x2 /* 36.864 MHz */ -#define CLKCTL_49 0x4 /* 49.152 MHz */ -#define CLKCTL_73 0x6 /* 73.728 MHz */ - -#elif defined(CONFIG_LPC2292) +#if defined(CONFIG_LPC2292) PLLCFG_ADR: .word PLLCFG PLLFEED_ADR: .word PLLFEED PLLCON_ADR: .word PLLCON @@ -301,35 +283,7 @@ MEMMAP_ADR: .word MEMMAP #endif cpu_init_crit: -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) - - /* - * mask all IRQs by clearing all bits in the INTMRs - */ - mov r1, #0x00 - ldr r0, INTMR1 - str r1, [r0] - ldr r0, INTMR2 - str r1, [r0] - ldr r0, INTMR3 - str r1, [r0] - - /* - * flush v4 I/D caches - */ - mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ - - /* - * disable MMU stuff and caches - */ - mrc p15,0,r0,c1,c0 - bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) - bic r0, r0, #0x0000008f @ clear bits 7, 3:0 (B--- WCAM) - orr r0, r0, #0x00000002 @ set bit 2 (A) Align - mcr p15,0,r0,c1,c0 -#elif defined(CONFIG_NETARM) +#if defined(CONFIG_NETARM) /* * prior to software reset : need to set pin PORTC4 to be *HRESET */ @@ -634,19 +588,7 @@ fiq: #endif -#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO) - .align 5 -.globl reset_cpu -reset_cpu: - mov ip, #0 - mcr p15, 0, ip, c7, c7, 0 @ invalidate cache - mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4) - mrc p15, 0, ip, c1, c0, 0 @ get ctrl register - bic ip, ip, #0x000f @ ............wcam - bic ip, ip, #0x2100 @ ..v....s........ - mcr p15, 0, ip, c1, c0, 0 @ ctrl register - mov pc, r0 -#elif defined(CONFIG_NETARM) +#if defined(CONFIG_NETARM) .align 5 .globl reset_cpu reset_cpu: diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/Makefile b/arch/arm/cpu/arm926ejs/mb86r0x/Makefile index 974d0be0bc..bab048bfd5 100644 --- a/arch/arm/cpu/arm926ejs/mb86r0x/Makefile +++ b/arch/arm/cpu/arm926ejs/mb86r0x/Makefile @@ -37,8 +37,6 @@ all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) -$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h - ######################################################################### # defines $(obj).depend target diff --git a/arch/arm/cpu/arm926ejs/mx25/Makefile b/arch/arm/cpu/arm926ejs/mx25/Makefile index 9219c062b0..3c2a65ed79 100644 --- a/arch/arm/cpu/arm926ejs/mx25/Makefile +++ b/arch/arm/cpu/arm926ejs/mx25/Makefile @@ -34,8 +34,6 @@ all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) -$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h - ######################################################################### # defines $(obj).depend target diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile b/arch/arm/cpu/arm926ejs/mx27/Makefile index 7ac1a21406..0e112b34f4 100644 --- a/arch/arm/cpu/arm926ejs/mx27/Makefile +++ b/arch/arm/cpu/arm926ejs/mx27/Makefile @@ -34,8 +34,6 @@ all: $(obj).depend $(LIB) $(LIB): $(OBJS) $(call cmd_link_o_target, $(OBJS)) -$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h - ######################################################################### # defines $(obj).depend target diff --git a/arch/arm/cpu/armv7/mx5/Makefile b/arch/arm/cpu/armv7/mx5/Makefile index 6e13cc3e84..e8be9c9fab 100644 --- a/arch/arm/cpu/armv7/mx5/Makefile +++ b/arch/arm/cpu/armv7/mx5/Makefile @@ -45,6 +45,4 @@ include $(SRCTREE)/rules.mk sinclude $(obj).depend -lowlevel_init.o : $(TOPDIR)/include/asm/arch/asm-offsets.h - ######################################################################### diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 6c66b42619..7e37221e03 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -21,7 +21,7 @@ #include <config.h> #include <asm/arch/imx-regs.h> -#include <asm/arch/asm-offsets.h> +#include <generated/asm-offsets.h> /* * L2CC Cache setup/invalidation/disable diff --git a/arch/arm/include/asm/arch-arm720t/hardware.h b/arch/arm/include/asm/arch-arm720t/hardware.h index 9bee19ffbb..0a357b1e0a 100644 --- a/arch/arm/include/asm/arch-arm720t/hardware.h +++ b/arch/arm/include/asm/arch-arm720t/hardware.h @@ -26,12 +26,6 @@ #if defined(CONFIG_NETARM) #include <asm/arch-arm720t/netarm_registers.h> -#elif defined(CONFIG_IMPA7) -/* include IMPA7 specific hardware file if there was one */ -#elif defined(CONFIG_EP7312) -/* include EP7312 specific hardware file if there was one */ -#elif defined(CONFIG_ARMADILLO) -/* include armadillo specific hardware file if there was one */ #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) /* include IntegratorCP/CM720T specific hardware file if there was one */ #else diff --git a/arch/arm/include/asm/arch-mx25/macro.h b/arch/arm/include/asm/arch-mx25/macro.h index 276c71ccd6..3b694daa19 100644 --- a/arch/arm/include/asm/arch-mx25/macro.h +++ b/arch/arm/include/asm/arch-mx25/macro.h @@ -31,7 +31,7 @@ #ifdef __ASSEMBLY__ #include <asm/arch/imx-regs.h> -#include <asm/arch/asm-offsets.h> +#include <generated/asm-offsets.h> .macro init_aips write32 IMX_AIPS1_BASE + AIPS_MPR_0_7, 0x77777777 diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h index b132676460..cc99a75e92 100644 --- a/arch/arm/include/asm/arch-mx31/clock.h +++ b/arch/arm/include/asm/arch-mx31/clock.h @@ -27,6 +27,7 @@ enum mxc_clock { MXC_ARM_CLK, MXC_IPG_CLK, + MXC_IPG_PERCLK, MXC_CSPI_CLK, MXC_UART_CLK, }; diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index 137547451b..8233f1fd7b 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -174,16 +174,6 @@ void arch_lmb_reserve(struct lmb *lmb) return ; } -static void boot_prep_linux(void) -{ -#ifdef CONFIG_MP - /* if we are MP make sure to flush the dcache() to any changes are made - * visibile to all other cores */ - flush_dcache(); -#endif - return ; -} - static int boot_cmdline_linux(bootm_headers_t *images) { ulong of_size = images->ft_len; @@ -339,17 +329,19 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima return 0; } - if (flag & BOOTM_STATE_OS_PREP) { - boot_prep_linux(); + /* + * We do nothing & report success to retain compatiablity with older + * versions of u-boot in which this use to flush the dcache on MP + * systems + */ + if (flag & BOOTM_STATE_OS_PREP) return 0; - } if (flag & BOOTM_STATE_OS_GO) { boot_jump_linux(images); return 0; } - boot_prep_linux(); ret = boot_body_linux(images); if (ret) return ret; diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 2f950e7bdf..46924d349b 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -280,12 +280,14 @@ u32 get_board_rev(void) int board_init(void) { +#ifdef CONFIG_USE_NOR u32 val; +#endif + #ifndef CONFIG_USE_IRQ irq_init(); #endif - #ifdef CONFIG_NAND_DAVINCI /* * NAND CS setup - cycle counts based on da850evm NAND timings in the diff --git a/board/dnp1110/Makefile b/board/dnp1110/Makefile deleted file mode 100644 index 8a86c0f340..0000000000 --- a/board/dnp1110/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := dnp1110.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/dnp1110/config.mk b/board/dnp1110/config.mk deleted file mode 100644 index ccf82775d4..0000000000 --- a/board/dnp1110/config.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# DNP/1110 board with SA1100 cpu -# -# http://www.dilnetpc.com -# - -# -# DILNETPC has 1 banks of 32 MB DRAM -# -# c000'0000 -# -# Linux-Kernel is expected to be at c000'8000, entry c000'8000 -# -# we load ourself to c1f8'0000, the upper 1 MB of the first (only) bank -# - -CONFIG_SYS_TEXT_BASE = 0xc1f80000 diff --git a/board/dnp1110/dnp1110.c b/board/dnp1110/dnp1110.c deleted file mode 100644 index c215f5f49b..0000000000 --- a/board/dnp1110/dnp1110.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#include <SA-1100.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* memory and cpu-speed are setup before relocation */ - /* so we do _nothing_ here */ - - /* arch number of DNP1110-Board */ - gd->bd->bi_arch_number = MACH_TYPE_DNP1110; - - /* flash vpp on */ - PPDR |= 0x80; /* assumes LCD controller is off */ - PPSR |= 0x80; - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return (0); -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC91111 - rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); -#endif - return rc; -} -#endif diff --git a/board/dnp1110/flash.c b/board/dnp1110/flash.c deleted file mode 100644 index 53f89ee7e6..0000000000 --- a/board/dnp1110/flash.c +++ /dev/null @@ -1,422 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <linux/byteorder/swab.h> - - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Board support for 1 or 2 flash devices */ -#undef FLASH_PORT_WIDTH32 -#define FLASH_PORT_WIDTH16 - -#ifdef FLASH_PORT_WIDTH16 -#define FLASH_PORT_WIDTH ushort -#define FLASH_PORT_WIDTHV vu_short -#define SWAP(x) __swab16(x) -#else -#define FLASH_PORT_WIDTH ulong -#define FLASH_PORT_WIDTHV vu_long -#define SWAP(x) __swab32(x) -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size (FPW *addr, flash_info_t *info); -static int write_data (flash_info_t *info, ulong dest, FPW data); -static void flash_get_offsets (ulong base, flash_info_t *info); -void inline spin_wheel(void); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ - int i; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) - { - switch (i) - { - case 0: - flash_get_size((FPW *)PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets(PHYS_FLASH_1, &flash_info[i]); - break; - default: - panic("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t *info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - return; - } - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t *info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: printf ("INTEL "); break; - default: printf ("Unknown Vendor "); break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F128J3A: - printf ("28F128J3A\n"); break; - default: printf ("Unknown Chip Type\n"); break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i=0; i<info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], - info->protect[i] ? " (RO)" : " " - ); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (FPW *addr, flash_info_t *info) -{ - volatile FPW value; - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = (FPW)0x00AA00AA; - addr[0x2AAA] = (FPW)0x00550055; - addr[0x5555] = (FPW)0x00900090; - - mb(); - value = addr[0]; - - switch (value) { - - case (FPW)INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = (FPW)0x00FF00FF; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb(); - value = addr[1]; /* device ID */ - switch (value) { - - case (FPW)INTEL_ID_28F128J3A: - info->flash_id += FLASH_28F128J3A; - info->sector_count = 128; - info->size = 0x02000000; - break; /* => 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = (FPW)0x00FF00FF; /* restore read mode */ - - return (info->size); -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - int flag, prot, sect; - ulong type, start; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - FPWV *addr = (FPWV *)(info->start[sect]); - FPW status; - - printf("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - *addr = (FPW)0x00500050; /* clear status register */ - *addr = (FPW)0x00200020; /* erase setup */ - *addr = (FPW)0x00D000D0; /* erase confirm */ - - while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - *addr = (FPW)0x00B000B0; /* suspend erase */ - *addr = (FPW)0x00FF00FF; /* reset to read mode */ - rcode = 1; - break; - } - } - - *addr = (FPW)0x00500050; /* clear status register cmd. */ - *addr = (FPW)0x00FF00FF; /* resest to read mode */ - - printf (" done\n"); - } - } - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) { - return 4; - } -/* get lower word aligned address */ -#ifdef FLASH_PORT_WIDTH16 - wp = (addr & ~1); - port_width = 2; -#else - wp = (addr & ~3); - port_width = 4; -#endif - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - for (; i<port_width && cnt>0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - - if ((rc = write_data(info, wp, SWAP(data))) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i=0; i<port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data(info, wp, SWAP(data))) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) - { - spin_wheel(); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<port_width && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i<port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - - return (write_data(info, wp, SWAP(data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t *info, ulong dest, FPW data) -{ - FPWV *addr = (FPWV *)dest; - ulong status; - int flag; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf("not erased at %08lx (%x)\n",(ulong)addr,*addr); - return (2); - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - *addr = (FPW)0x00400040; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((status = *addr) & (FPW)0x00800080) != (FPW)0x00800080) { - if (start = get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = (FPW)0x00FF00FF; /* restore read mode */ - return (1); - } - } - - *addr = (FPW)0x00FF00FF; /* restore read mode */ - - return (0); -} - -void inline -spin_wheel(void) -{ - static int p=0; - static char w[] = "\\/-"; - - printf("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/board/dnp1110/lowlevel_init.S b/board/dnp1110/lowlevel_init.S deleted file mode 100644 index 7730be3437..0000000000 --- a/board/dnp1110/lowlevel_init.S +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Memory Setup stuff - taken from blob memsetup.S - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include "config.h" -#include "version.h" - - -/* some parameters for the board */ - -MEM_BASE: .long 0xa0000000 -MEM_START: .long 0xc0000000 - -#define MDCNFG 0x00 -#define MDCAS00 0x04 /* CAS waveform rotate reg 0 */ -#define MDCAS01 0x08 /* CAS waveform rotate reg 1 bank */ -#define MDCAS02 0x0C /* CAS waveform rotate reg 2 bank */ -#define MDREFR 0x1C /* DRAM refresh control reg */ -#define MDCAS20 0x20 /* CAS waveform rotate reg 0 bank */ -#define MDCAS21 0x24 /* CAS waveform rotate reg 1 bank */ -#define MDCAS22 0x28 /* CAS waveform rotate reg 2 bank */ -#define MECR 0x18 /* Expansion memory (PCMCIA) bus configuration register */ -#define MSC0 0x10 /* static memory control reg 0 */ -#define MSC1 0x14 /* static memory control reg 1 */ -#define MSC2 0x2C /* static memory control reg 2 */ -#define SMCNFG 0x30 /* SMROM configuration reg */ - -mdcas00: .long 0x5555557F -mdcas01: .long 0x55555555 -mdcas02: .long 0x55555555 -mdcas20: .long 0x5555557F -mdcas21: .long 0x55555555 -mdcas22: .long 0x55555555 -mdcnfg: .long 0x0000B25C -mdrefr: .long 0x007000C1 -mecr: .long 0x10841084 -msc0: .long 0x00004774 -msc1: .long 0x00000000 -msc2: .long 0x00000000 -smcnfg: .long 0x00000000 - -/* setting up the memory */ - -.globl lowlevel_init -lowlevel_init: - - ldr r0, MEM_BASE - - /* Set up the DRAM */ - - /* MDCAS00 */ - ldr r1, mdcas00 - str r1, [r0, #MDCAS00] - - /* MDCAS01 */ - ldr r1, mdcas01 - str r1, [r0, #MDCAS01] - - /* MDCAS02 */ - ldr r1, mdcas02 - str r1, [r0, #MDCAS02] - - /* MDCAS20 */ - ldr r1, mdcas20 - str r1, [r0, #MDCAS20] - - /* MDCAS21 */ - ldr r1, mdcas21 - str r1, [r0, #MDCAS21] - - /* MDCAS22 */ - ldr r1, mdcas22 - str r1, [r0, #MDCAS22] - - /* MDREFR */ - ldr r1, mdrefr - str r1, [r0, #MDREFR] - - /* Set up PCMCIA space */ - ldr r1, mecr - str r1, [r0, #MECR] - - /* Setup the flash memory and other */ - ldr r1, msc0 - str r1, [r0, #MSC0] - - ldr r1, msc1 - str r1, [r0, #MSC1] - - ldr r1, msc2 - str r1, [r0, #MSC2] - - ldr r1, smcnfg - str r1, [r0, #SMCNFG] - - /* MDCNFG */ - ldr r1, mdcnfg - bic r1, r1, #0x00000001 - str r1, [r0, #MDCNFG] - - /* Load something to activate bank */ - ldr r2, MEM_START -.rept 8 - ldr r1, [r2] -.endr - - /* MDCNFG */ - ldr r1, mdcnfg - orr r1, r1, #0x00000001 - str r1, [r0, #MDCNFG] - - /* everything is fine now */ - mov pc, lr diff --git a/board/ep7312/Makefile b/board/ep7312/Makefile deleted file mode 100644 index f2d8cf5012..0000000000 --- a/board/ep7312/Makefile +++ /dev/null @@ -1,55 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2002 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := ep7312.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/ep7312/config.mk b/board/ep7312/config.mk deleted file mode 100644 index bdd08b8469..0000000000 --- a/board/ep7312/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -CONFIG_SYS_TEXT_BASE = 0xc0f80000 diff --git a/board/ep7312/ep7312.c b/board/ep7312/ep7312.c deleted file mode 100644 index 8ed14ad583..0000000000 --- a/board/ep7312/ep7312.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#include <clps7111.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* Activate LED flasher */ - IO_LEDFLSH = 0x40; - - /* arch number MACH_TYPE_EDB7312 */ - gd->bd->bi_arch_number = MACH_TYPE_EDB7312; - - /* location of boot parameters */ - gd->bd->bi_boot_params = 0xc0020100; - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return (0); -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/board/ep7312/flash.c b/board/ep7312/flash.c deleted file mode 100644 index 2ed9c9ad63..0000000000 --- a/board/ep7312/flash.c +++ /dev/null @@ -1,343 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -#define FLASH_BANK_SIZE 0x1000000 -#define MAIN_SECT_SIZE 0x20000 - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - - -/*----------------------------------------------------------------------- - */ - -ulong flash_init (void) -{ - int i, j; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - ulong flashbase = 0; - - flash_info[i].flash_id = - (INTEL_MANUFACT & FLASH_VENDMASK) | - (INTEL_ID_28F128J3 & FLASH_TYPEMASK); - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - if (i == 0) - flashbase = PHYS_FLASH_1; - else - panic ("configured too many flash banks!\n"); - for (j = 0; j < flash_info[i].sector_count; j++) { - flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect ( FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect ( FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - switch (info->flash_id & FLASH_VENDMASK) { - case (INTEL_MANUFACT & FLASH_VENDMASK): - printf ("Intel: "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): - printf ("28F128J3 (128Mbit)\n"); - break; - default: - printf ("Unknown Chip Type\n"); - goto Done; - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) { - printf ("\n "); - } - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - -Done: ; -} - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int flag, prot, sect; - int rc = ERR_OK; - ulong start; - - if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; - - if ((s_first < 0) || (s_first > s_last)) { - return ERR_INVAL; - } - - if ((info->flash_id & FLASH_VENDMASK) != - (INTEL_MANUFACT & FLASH_VENDMASK)) { - return ERR_UNKNOWN_FLASH_VENDOR; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - if (prot) - return ERR_PROTECTED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - flag = disable_interrupts (); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { - - printf ("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - if (info->protect[sect] == 0) { /* not protected */ - vu_short *addr = (vu_short *) (info->start[sect]); - - *addr = 0x20; /* erase setup */ - *addr = 0xD0; /* erase confirm */ - - while ((*addr & 0x80) != 0x80) { - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { - *addr = 0xB0; /* suspend erase */ - *addr = 0xFF; /* reset to read mode */ - rc = ERR_TIMOUT; - goto outahere; - } - } - - /* clear status register command */ - *addr = 0x50; - /* reset to read mode */ - *addr = 0xFF; - } - printf ("ok.\n"); - } - if (ctrlc ()) - printf ("User Interrupt!\n"); - - outahere: - - /* allow flash to settle - wait 10 ms */ - udelay_masked (10000); - - if (flag) - enable_interrupts (); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash - */ - -static int write_word (flash_info_t * info, ulong dest, ushort data) -{ - vu_short *addr = (vu_short *) dest, val; - int rc = ERR_OK; - int flag; - ulong start; - - /* Check if Flash is (sufficiently) erased - */ - if ((*addr & data) != data) - return ERR_NOT_ERASED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - flag = disable_interrupts (); - - /* clear status register command */ - *addr = 0x50; - - /* program set-up command */ - *addr = 0x40; - - /* latch address/data */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((val = *addr) & 0x80) != 0x80) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - rc = ERR_TIMOUT; - /* suspend program command */ - *addr = 0xB0; - goto outahere; - } - } - - if (val & 0x1A) { /* check for error */ - printf ("\nFlash write error %02x at address %08lx\n", - (int) val, (unsigned long) dest); - if (val & (1 << 3)) { - printf ("Voltage range error.\n"); - rc = ERR_PROG_ERROR; - goto outahere; - } - if (val & (1 << 1)) { - printf ("Device protect error.\n"); - rc = ERR_PROTECTED; - goto outahere; - } - if (val & (1 << 4)) { - printf ("Programming error.\n"); - rc = ERR_PROG_ERROR; - goto outahere; - } - rc = ERR_PROG_ERROR; - goto outahere; - } - - outahere: - /* read array command */ - *addr = 0xFF; - - if (flag) - enable_interrupts (); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - ushort data; - int l; - int i, rc; - - wp = (addr & ~1); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - for (; i < 2 && cnt > 0; ++i) { - data = (data >> 8) | (*src++ << 8); - --cnt; - ++cp; - } - for (; cnt == 0 && i < 2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - - if ((rc = write_word (info, wp, data)) != 0) { - return (rc); - } - wp += 2; - } - - /* - * handle word aligned part - */ - while (cnt >= 2) { - data = *((vu_short *) src); - if ((rc = write_word (info, wp, data)) != 0) { - return (rc); - } - src += 2; - wp += 2; - cnt -= 2; - } - - if (cnt == 0) { - return ERR_OK; - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 8); - --cnt; - } - for (; i < 2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - - return write_word (info, wp, data); -} diff --git a/board/ep7312/lowlevel_init.S b/board/ep7312/lowlevel_init.S deleted file mode 100644 index 5dadb313b1..0000000000 --- a/board/ep7312/lowlevel_init.S +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Memory Setup stuff - taken from ??? - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <config.h> -#include <version.h> - - -/* some parameters for the board */ - -SYSCON1: .long 0x80000100 -SYSCON2: .long 0x80001100 -SYSCON3: .long 0x80002200 -MEMCFG1: .long 0x80000180 -MEMCFG2: .long 0x800001C0 -SDCONF: .long 0x80002300 -SDRFPR: .long 0x80002340 - -syscon1_val: .long 0x00040100 -syscon2_val: .long 0x00000102 -syscon3_val: .long 0x0000020E -memcfg1_val: .long 0x1f101710 -memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits -memcfg2_val: .long 0x00001f13 @ upper 16 bits are reserved for CS7 + CS6 -sdrfpr_val: .long 0x00000240 -sdconf_val: .long 0x00000522 -/* setting up the memory */ - -.globl lowlevel_init -lowlevel_init: - /* - * SYSCON1-3 - */ - ldr r0, SYSCON1 - ldr r1, syscon1_val - str r1, [r0] - - ldr r0, SYSCON2 - ldr r1, syscon2_val - str r1, [r0] - - ldr r0, SYSCON3 - ldr r1, syscon3_val - str r1, [r0] - - /* - * MEMCFG1 - */ - ldr r0, MEMCFG1 - ldr r1, memcfg1_val - str r1, [r0] - - /* - * MEMCFG2 - */ - ldr r0, MEMCFG2 - ldr r2, [r0] - ldr r1, memcfg2_mask - bic r2, r2, r1 - ldr r1, memcfg2_val - orr r2, r2, r1 - str r2, [r0] - - /* - * SDRFPR,SDCONF - */ - ldr r0, SDCONF - ldr r1, sdconf_val - str r1, [r0] - - ldr r0, SDRFPR - ldr r1, sdrfpr_val - str r1, [r0] - - /* everything is fine now */ - mov pc, lr diff --git a/board/etx094/u-boot.lds b/board/etx094/u-boot.lds index d4cea0c27c..b00d2b3807 100644 --- a/board/etx094/u-boot.lds +++ b/board/etx094/u-boot.lds @@ -37,7 +37,6 @@ SECTIONS net/libnet.o (.text*) arch/powerpc/cpu/mpc8xx/libmpc8xx.o (.text*) *(.text.printf) - *(.text.vprintf) *(.text.vsprintf) . = env_offset; diff --git a/board/evb4510/Makefile b/board/evb4510/Makefile deleted file mode 100644 index 102eaded4c..0000000000 --- a/board/evb4510/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := evb4510.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/evb4510/config.mk b/board/evb4510/config.mk deleted file mode 100644 index 140c98943a..0000000000 --- a/board/evb4510/config.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright (c) 2004 Cucy Systems (http://www.cucy.com) -# Curt Brune <curt@cucy.com> -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -CONFIG_SYS_TEXT_BASE = 0x007d0000 diff --git a/board/evb4510/evb4510.c b/board/evb4510/evb4510.c deleted file mode 100644 index 13abbb7013..0000000000 --- a/board/evb4510/evb4510.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune <curt@cucy.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/hardware.h> -#include <command.h> - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_EVB4510 - -/* ------------------------------------------------------------------------- */ - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - icache_enable(); - - /* address for the kernel command line */ - gd->bd->bi_boot_params = 0x800; - - /* enable board LEDs for output */ - PUT_REG( REG_IOPDATA, 0x0); - PUT_REG( REG_IOPMODE, 0xFFFF); - PUT_REG( REG_IOPDATA, 0xFF); - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -#if CONFIG_NR_DRAM_BANKS == 2 - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif - return 0; -} - -#endif diff --git a/board/evb4510/flash.c b/board/evb4510/flash.c deleted file mode 100644 index c9c6e024c4..0000000000 --- a/board/evb4510/flash.c +++ /dev/null @@ -1,539 +0,0 @@ -/* - * - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune <curt@cucy.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/hardware.h> -#include <flash.h> - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -typedef enum { - FLASH_DEV_U9_512KB = 0, - FLASH_DEV_U7_2MB = 1 -} FLASH_DEV; - -#define FLASH_DQ7 (0x80) -#define FLASH_DQ5 (0x20) - -#define PROG_ADDR (0xAAA) -#define SETUP_ADDR (0xAAA) -#define ID_ADDR (0xAAA) -#define UNLOCK_ADDR1 (0xAAA) -#define UNLOCK_ADDR2 (0x555) - -#define UNLOCK_CMD1 (0xAA) -#define UNLOCK_CMD2 (0x55) -#define ERASE_SUSPEND_CMD (0xB0) -#define ERASE_RESUME_CMD (0x30) -#define RESET_CMD (0xF0) -#define ID_CMD (0x90) -#define SELECT_CMD (0x90) -#define CHIPERASE_CMD (0x10) -#define BYPASS_CMD (0x20) -#define SECERASE_CMD (0x30) -#define PROG_CMD (0xa0) -#define SETUP_CMD (0x80) - -#if 0 -#define WRITE_UNLOCK(addr) { \ - PUT__U8( addr + UNLOCK_ADDR1, UNLOCK_CMD1); \ - PUT__U8( addr + UNLOCK_ADDR2, UNLOCK_CMD2); \ -} - -/* auto select command */ -#define CMD_ID(addr) WRITE_UNLOCK(addr); { \ - PUT__U8( addr + ID_ADDR, ID_CMD); \ -} - -#define CMD_RESET(addr) WRITE_UNLOCK(addr); { \ - PUT__U8( addr + ID_ADDR, RESET_CMD); \ -} - -#define CMD_ERASE_SEC(base, addr) WRITE_UNLOCK(base); \ - PUT__U8( base + SETUP_ADDR, SETUP_CMD); \ - WRITE_UNLOCK(base); \ - PUT__U8( addr, SECERASE_CMD); - -#define CMD_ERASE_CHIP(base) WRITE_UNLOCK(base); \ - PUT__U8( base + SETUP_ADDR, SETUP_CMD); \ - WRITE_UNLOCK(base); \ - PUT__U8( base + SETUP_ADDR, CHIPERASE_CMD); - -/* prepare for bypass programming */ -#define CMD_UNLOCK_BYPASS(addr) WRITE_UNLOCK(addr); { \ - PUT__U8( addr + ID_ADDR, 0x20); \ -} - -/* terminate bypass programming */ -#define CMD_BYPASS_RESET(addr) { \ - PUT__U8(addr, 0x90); \ - PUT__U8(addr, 0x00); \ -} -#endif - -inline static void FLASH_CMD_UNLOCK (FLASH_DEV dev, u32 base) -{ - switch (dev) { - case FLASH_DEV_U7_2MB: - PUT__U8 (base + 0xAAA, 0xAA); - PUT__U8 (base + 0x555, 0x55); - break; - case FLASH_DEV_U9_512KB: - PUT__U8 (base + 0x555, 0xAA); - PUT__U8 (base + 0x2AA, 0x55); - break; - } -} - -inline static void FLASH_CMD_SELECT (FLASH_DEV dev, u32 base) -{ - switch (dev) { - case FLASH_DEV_U7_2MB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0xAAA, SELECT_CMD); - break; - case FLASH_DEV_U9_512KB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0x555, SELECT_CMD); - break; - } -} - -inline static void FLASH_CMD_RESET (FLASH_DEV dev, u32 base) -{ - switch (dev) { - case FLASH_DEV_U7_2MB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0xAAA, RESET_CMD); - break; - case FLASH_DEV_U9_512KB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0x555, RESET_CMD); - break; - } -} - -inline static void FLASH_CMD_ERASE_SEC (FLASH_DEV dev, u32 base, u32 addr) -{ - switch (dev) { - case FLASH_DEV_U7_2MB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0xAAA, SETUP_CMD); - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (addr, SECERASE_CMD); - break; - case FLASH_DEV_U9_512KB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0x555, SETUP_CMD); - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (addr, SECERASE_CMD); - break; - } -} - -inline static void FLASH_CMD_ERASE_CHIP (FLASH_DEV dev, u32 base) -{ - switch (dev) { - case FLASH_DEV_U7_2MB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0xAAA, SETUP_CMD); - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base, CHIPERASE_CMD); - break; - case FLASH_DEV_U9_512KB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0x555, SETUP_CMD); - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base, CHIPERASE_CMD); - break; - } -} - -inline static void FLASH_CMD_UNLOCK_BYPASS (FLASH_DEV dev, u32 base) -{ - switch (dev) { - case FLASH_DEV_U7_2MB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0xAAA, BYPASS_CMD); - break; - case FLASH_DEV_U9_512KB: - FLASH_CMD_UNLOCK (dev, base); - PUT__U8 (base + 0x555, BYPASS_CMD); - break; - } -} - -inline static void FLASH_CMD_BYPASS_RESET (FLASH_DEV dev, u32 base) -{ - PUT__U8 (base, SELECT_CMD); - PUT__U8 (base, 0x0); -} - -/* poll for flash command completion */ -static u16 _flash_poll (FLASH_DEV dev, u32 addr, u16 data, ulong timeOut) -{ - u32 done = 0; - ulong t0; - - u16 error = 0; - volatile u16 flashData; - - data = data & 0xFF; - t0 = get_timer (0); - while (get_timer (t0) < timeOut) { - /* for( i = 0; i < POLL_LOOPS; i++) { */ - /* Read the Data */ - flashData = GET__U8 (addr); - - /* FLASH_DQ7 = Data? */ - if ((flashData & FLASH_DQ7) == (data & FLASH_DQ7)) { - done = 1; - break; - } - - /* Check Timeout (FLASH_DQ5==1) */ - if (flashData & FLASH_DQ5) { - /* Read the Data */ - flashData = GET__U8 (addr); - - /* FLASH_DQ7 = Data? */ - if (!((flashData & FLASH_DQ7) == (data & FLASH_DQ7))) { - printf ("_flash_poll(): FLASH_DQ7 & flashData not equal to write value\n"); - error = ERR_PROG_ERROR; - } - FLASH_CMD_RESET (dev, addr); - done = 1; - break; - } - /* spin delay */ - udelay (10); - } - - - /* error update */ - if (!done) { - printf ("_flash_poll(): Timeout\n"); - error = ERR_TIMOUT; - } - - /* Check the data */ - if (!error) { - /* Read the Data */ - flashData = GET__U8 (addr); - if (flashData != data) { - error = ERR_PROG_ERROR; - printf ("_flash_poll(): flashData(0x%04x) not equal to data(0x%04x)\n", - flashData, data); - } - } - - return error; -} - -/*----------------------------------------------------------------------- - */ -static int _flash_check_protection (flash_info_t * info, int s_first, int s_last) -{ - int sect, prot = 0; - - for (sect = s_first; sect <= s_last; sect++) - if (info->protect[sect]) { - printf (" Flash sector %d protected.\n", sect); - prot++; - } - return prot; -} - -static int _detectFlash (FLASH_DEV dev, u32 base, u8 venId, u8 devId) -{ - - u32 baseAddr = base | CACHE_DISABLE_MASK; - u8 vendorId, deviceId; - - /* printf(__FUNCTION__"(): detecting flash @ 0x%08x\n", base); */ - - /* Send auto select command and read manufacturer info */ - FLASH_CMD_SELECT (dev, baseAddr); - vendorId = GET__U8 (baseAddr); - FLASH_CMD_RESET (dev, baseAddr); - - /* Send auto select command and read device info */ - FLASH_CMD_SELECT (dev, baseAddr); - - if (dev == FLASH_DEV_U7_2MB) { - deviceId = GET__U8 (baseAddr + 2); - } else if (dev == FLASH_DEV_U9_512KB) { - deviceId = GET__U8 (baseAddr + 1); - } else { - return 0; - } - - FLASH_CMD_RESET (dev, baseAddr); - - /* printf (__FUNCTION__"(): found vendorId 0x%04x, deviceId 0x%04x\n", - vendorId, deviceId); - */ - - return (vendorId == venId) && (deviceId == devId); - -} - -/****************************************************************************** - * - * Public u-boot interface functions below - * - *****************************************************************************/ - -/*************************************************************************** - * - * Flash initialization - * - * This board has two banks of flash, but the base addresses depend on - * how the board is jumpered. - * - * The two flash types are: - * - * AMD Am29LV160DB (2MB) sectors layout 16KB, 2x8KB, 32KB, 31x64KB - * - * AMD Am29LV040B (512KB) sectors: 8x64KB - *****************************************************************************/ - -unsigned long flash_init (void) -{ - flash_info_t *info; - u16 i; - u32 flashtest; - s16 amd160 = -1; - u32 amd160base = 0; - -#if CONFIG_SYS_MAX_FLASH_BANKS == 2 - s16 amd040 = -1; - u32 amd040base = 0; -#endif - - /* configure PHYS_FLASH_1 */ - if (_detectFlash (FLASH_DEV_U7_2MB, PHYS_FLASH_1, 0x1, 0x49)) { - amd160 = 0; - amd160base = PHYS_FLASH_1; -#if CONFIG_SYS_MAX_FLASH_BANKS == 1 - } -#else - if (_detectFlash - (FLASH_DEV_U9_512KB, PHYS_FLASH_2, 0x1, 0x4F)) { - amd040 = 1; - amd040base = PHYS_FLASH_2; - } else { - printf (__FUNCTION__ - "(): Unable to detect PHYS_FLASH_2: 0x%08x\n", - PHYS_FLASH_2); - } - } else if (_detectFlash (FLASH_DEV_U9_512KB, PHYS_FLASH_1, 0x1, 0x4F)) { - amd040 = 0; - amd040base = PHYS_FLASH_1; - if (_detectFlash (FLASH_DEV_U7_2MB, PHYS_FLASH_2, 0x1, 0x49)) { - amd160 = 1; - amd160base = PHYS_FLASH_2; - } else { - printf (__FUNCTION__ - "(): Unable to detect PHYS_FLASH_2: 0x%08x\n", - PHYS_FLASH_2); - } - } -#endif - else { - printf ("flash_init(): Unable to detect PHYS_FLASH_1: 0x%08x\n", - PHYS_FLASH_1); - } - - /* Configure AMD Am29LV160DB (2MB) */ - info = &flash_info[amd160]; - info->flash_id = FLASH_DEV_U7_2MB; - info->sector_count = 35; - info->size = 2 * 1024 * 1024; /* 2MB */ - /* 1*16K Boot Block - 2*8K Parameter Block - 1*32K Small Main Block */ - info->start[0] = amd160base; - info->start[1] = amd160base + 0x4000; - info->start[2] = amd160base + 0x6000; - info->start[3] = amd160base + 0x8000; - for (i = 1; i < info->sector_count; i++) - info->start[3 + i] = amd160base + i * (64 * 1024); - - for (i = 0; i < info->sector_count; i++) { - /* Write auto select command sequence and query sector protection */ - FLASH_CMD_SELECT (info->flash_id, - info->start[i] | CACHE_DISABLE_MASK); - flashtest = - GET__U8 (((info->start[i] + 4) | CACHE_DISABLE_MASK)); - FLASH_CMD_RESET (info->flash_id, - amd160base | CACHE_DISABLE_MASK); - info->protect[i] = (flashtest & 0x0001); - } - - /* - * protect monitor and environment sectors in 2MB flash - */ - flash_protect (FLAG_PROTECT_SET, - amd160base, amd160base + monitor_flash_len - 1, info); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, info); - -#if CONFIG_SYS_MAX_FLASH_BANKS == 2 - /* Configure AMD Am29LV040B (512KB) */ - info = &flash_info[amd040]; - info->flash_id = FLASH_DEV_U9_512KB; - info->sector_count = 8; - info->size = 512 * 1024; /* 512KB, 8 x 64KB */ - for (i = 0; i < info->sector_count; i++) { - info->start[i] = amd040base + i * (64 * 1024); - /* Write auto select command sequence and query sector protection */ - FLASH_CMD_SELECT (info->flash_id, - info->start[i] | CACHE_DISABLE_MASK); - flashtest = - GET__U8 (((info->start[i] + 2) | CACHE_DISABLE_MASK)); - FLASH_CMD_RESET (info->flash_id, - amd040base | CACHE_DISABLE_MASK); - info->protect[i] = (flashtest & 0x0001); - } -#endif - - return flash_info[0].size -#if CONFIG_SYS_MAX_FLASH_BANKS == 2 - + flash_info[1].size -#endif - ; -} - -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_DEV_U7_2MB) { - printf ("AMD Am29LV160DB (2MB) 16KB,2x8KB,32KB,31x64KB\n"); - } else if (info->flash_id == FLASH_DEV_U9_512KB) { - printf ("AMD Am29LV040B (512KB) 8x64KB\n"); - } else { - printf ("Unknown flash_id ...\n"); - return; - } - - printf (" Size: %ld KB in %d Sectors\n", - info->size >> 10, info->sector_count); - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) { - if ((i % 4) == 0) - printf ("\n "); - printf (" S%02d @ 0x%08lX%s", i, - info->start[i], info->protect[i] ? " !" : " "); - } - printf ("\n"); -} - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - u16 i, error = 0; - - printf ("\n"); - - /* check flash protection bits */ - if (_flash_check_protection (info, s_first, s_last)) { - printf (" Flash erase aborted due to protected sectors\n"); - return ERR_PROTECTED; - } - - if ((s_first < info->sector_count) && (s_first <= s_last)) { - for (i = s_first; i <= s_last && !error; i++) { - printf (" Erasing Sector %d @ 0x%08lx ... ", i, - info->start[i]); - /* bypass the cache to access the flash memory */ - FLASH_CMD_ERASE_SEC (info->flash_id, - (info-> - start[0] | CACHE_DISABLE_MASK), - (info-> - start[i] | CACHE_DISABLE_MASK)); - /* look for sector to become 0xFF after erase */ - error = _flash_poll (info->flash_id, - info-> - start[i] | CACHE_DISABLE_MASK, - 0xFF, CONFIG_SYS_FLASH_ERASE_TOUT); - FLASH_CMD_RESET (info->flash_id, - (info-> - start[0] | CACHE_DISABLE_MASK)); - printf ("done\n"); - if (error) { - break; - } - } - } else - error = ERR_INVAL; - - return error; -} - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - u16 error = 0, i; - u32 n; - u8 *bp, *bps; - - /* Write Setup */ - /* bypass the cache to access the flash memory */ - FLASH_CMD_UNLOCK_BYPASS (info->flash_id, - (info->start[0] | CACHE_DISABLE_MASK)); - - /* Write the Data to Flash */ - - bp = (u8 *) (addr | CACHE_DISABLE_MASK); - bps = (u8 *) src; - - for (n = 0; n < cnt && !error; n++, bp++, bps++) { - - if (!(n % (cnt / 15))) { - printf ("."); - } - - /* write the flash command for flash memory */ - *bp = 0xA0; - - /* Write the data */ - *bp = *bps; - - /* Check if the write is done */ - for (i = 0; i < 0xff; i++); - error = _flash_poll (info->flash_id, (u32) bp, *bps, - CONFIG_SYS_FLASH_WRITE_TOUT); - if (error) { - return error; - } - } - - /* Reset the Flash Mode to read */ - FLASH_CMD_BYPASS_RESET (info->flash_id, info->start[0]); - - printf (" "); - - return error; -} diff --git a/board/evb4510/lowlevel_init.S b/board/evb4510/lowlevel_init.S deleted file mode 100644 index 7184d7259a..0000000000 --- a/board/evb4510/lowlevel_init.S +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune <curt@cucy.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <config.h> -#include <version.h> -#include <asm/hardware.h> - -/*********************************************************************** - * Configure Memory Map - * - * This memory map allows us to relocate from FLASH to SRAM. After - * power-on reset the CPU only knows about the FLASH memory at address - * 0x00000000. After lowlevel_init completes the memory map will be: - * - * Memory Addr - * 0x00000000 - * to 8MB SRAM (U5) -- 8MB Map - * 0x00800000 - * - * 0x01000000 - * to 2MB Flash @ 0x00000000 (U7) -- 2MB Map - * 0x01200000 - * - * 0x02000000 - * to 512KB Flash @ 0x02000000 (U9) -- 2MB Map - * 0x02080000 - * - * Load all 12 memory registers with the STMIA instruction since - * memory access is disabled once these registers are written. The - * last register written re-enables memory access. For more info see - * the user's manual for the S3C4510B, available from Samsung's web - * site. Search for part number "S3C4510B". - * - ***********************************************************************/ - -.globl lowlevel_init -lowlevel_init: - - /* preserve the temp register (r12 AKA ip) and remap it. */ - ldr r1, =SRAM_BASE+0xC - add r0, r12, #0x01000000 - str r0, [r1] - - /* remap the link register for when we return */ - add lr, lr, #0x01000000 - - /* store a short program in the on chip SRAM, which is - * unaffected when remapping memory. Note the cache must be - * disabled for the on chip SRAM to be available. - */ - ldr r1, =SRAM_BASE - ldr r0, =0xe8801ffe /* stmia r0, {r1-r12} */ - str r0, [r1] - add r1, r1, #4 - ldr r0, =0xe59fc000 /* ldr r12, [pc, #0] */ - str r0, [r1] - add r1, r1, #4 - ldr r0, =0xe1a0f00e /* mov pc, lr */ - str r0, [r1] - - adr r0, memory_map_data - ldmia r0, {r1-r12} - ldr r0, =REG_EXTDBWTH - - ldr pc, =SRAM_BASE - -.globl reset_cpu -reset_cpu: - /* - * reset the cpu by re-mapping FLASH 0 to 0x0 and jumping to - * address 0x0. We accomplish this by storing a few - * instructions into the on chip SRAM (8KB) and run from - * there. Note the cache must be disabled for the on chip - * SRAM to be available. - * - * load r2 with REG_ROMCON0 - * load r3 with 0x12040060 configure FLASH bank 0 @ 0x00000000 - * load r4 with REG_DRAMCON0 - * load r5 with 0x08000380 configure RAM bank 0 @ 0x01000000 - * load r6 with REG_REFEXTCON - * load r7 with 0x9c218360 - * load r8 with 0x0 - * store str r3,[r2] @ SRAM_BASE - * store str r5,[r4] @ SRAM_BASE + 0x4 - * store str r7,[r6] @ SRAM_BASE + 0x8 - * store mov pc,r8 @ SRAM_BASE + 0xC - * mov pc, SRAM_BASE - * - */ - - /* disable cache */ - ldr r0, =REG_SYSCFG - ldr r1, =0x83ffffa0 /* cache-disabled */ - str r1, [r0] - - ldr r2, =REG_ROMCON0 - ldr r3, =0x02000060 /* Bank0 2MB FLASH @ 0x00000000 */ - ldr r4, =REG_DRAMCON0 - ldr r5, =0x18040380 /* DRAM0 8MB SRAM @ 0x01000000 */ - ldr r6, =REG_REFEXTCON - ldr r7, =0xce278360 - ldr r8, =0x00000000 - ldr r1, =SRAM_BASE - ldr r0, =0xe5823000 /* str r3, [r2] */ - str r0, [r1] - ldr r1, =SRAM_BASE+4 - ldr r0, =0xe5845000 /* str r5, [r4] */ - str r0, [r1] - ldr r1, =SRAM_BASE+8 - ldr r0, =0xe5867000 /* str r7, [r6] */ - str r0, [r1] - ldr r1, =SRAM_BASE+0xC - ldr r0, =0xe1a0f008 /* mov pc, r8 */ - str r0, [r1] - ldr r1, =SRAM_BASE - mov pc, r1 - - /* never return */ - -/************************************************************************ - * Below are twelve 32-bit values for the twelve memory registers of - * the system manager, starting with register REG_EXTDBWTH. - ***********************************************************************/ -memory_map_data: - .long 0x00f03005 /* memory widths */ - .long 0x12040060 /* Bank0 2MB FLASH @ 0x01000000 */ - .long 0x22080060 /* Bank1 512KB FLASH @ 0x02000000 */ - .long 0x00000000 - .long 0x00000000 - .long 0x00000000 - .long 0x00000000 - .long 0x08000380 /* DRAM0 8MB SRAM @ 0x00000000 */ - .long 0x00000000 - .long 0x00000000 - .long 0x00000000 - .long 0x9c218360 /* enable memory */ diff --git a/board/freescale/mx35pdk/lowlevel_init.S b/board/freescale/mx35pdk/lowlevel_init.S index 9fd04cbdb8..698c4cf0c5 100644 --- a/board/freescale/mx35pdk/lowlevel_init.S +++ b/board/freescale/mx35pdk/lowlevel_init.S @@ -21,7 +21,7 @@ #include <config.h> #include <asm/arch/imx-regs.h> -#include <asm/arch/asm-offsets.h> +#include <generated/asm-offsets.h> #include "mx35pdk.h" /* diff --git a/board/gcplus/Makefile b/board/gcplus/Makefile deleted file mode 100644 index e62aa1b038..0000000000 --- a/board/gcplus/Makefile +++ /dev/null @@ -1,53 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# 2003 (c) MontaVista Software, Inc. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := gcplus.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/gcplus/config.mk b/board/gcplus/config.mk deleted file mode 100644 index a9bd3ff010..0000000000 --- a/board/gcplus/config.mk +++ /dev/null @@ -1,13 +0,0 @@ -# -# ADS GCPlus board with SA1110 cpu -# -# The ADS GCPlus has 2 banks of 16 MiB SDRAM -# -# We use the ADS GCPlus Linux boot ROM to load U-Boot into SDRAM -# at c020'0000 and then move ourself to c8f0'0000. Basically, just -# install the U-Boot binary as you would the Linux zImage and then -# reap the benfits of more convenient Linux development cycles, i.e. -# bootp;tftp;bootm, repeat, etc.,. -# - -CONFIG_SYS_TEXT_BASE = 0xc8f00000 diff --git a/board/gcplus/flash.c b/board/gcplus/flash.c deleted file mode 100644 index ab567e8fa7..0000000000 --- a/board/gcplus/flash.c +++ /dev/null @@ -1,438 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * 2003 (c) MontaVista Software, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <linux/byteorder/swab.h> - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Board support for 1 or 2 flash devices */ -#define FLASH_PORT_WIDTH32 -#undef FLASH_PORT_WIDTH16 - -#ifdef FLASH_PORT_WIDTH16 -#define FLASH_PORT_WIDTH ushort -#define FLASH_PORT_WIDTHV vu_short -#define SWAP(x) __swab16(x) -#else -#define FLASH_PORT_WIDTH ulong -#define FLASH_PORT_WIDTHV vu_long -#define SWAP(x) __swab32(x) -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size(FPW * addr, flash_info_t * info); -static int write_data(flash_info_t * info, ulong dest, FPW data); -static void flash_get_offsets(ulong base, flash_info_t * info); -void inline spin_wheel(void); - -/*----------------------------------------------------------------------- - */ - -unsigned long -flash_init(void) -{ - int i; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size((FPW *) PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets(PHYS_FLASH_1, &flash_info[i]); - break; - default: - panic("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]); - - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -static void -flash_get_offsets(ulong base, flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - return; - } - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } -} - -/*----------------------------------------------------------------------- - */ -void -flash_print_info(flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf("INTEL "); - break; - default: - printf("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F128J3A: - printf("28F128J3A\n"); - break; - case FLASH_28F640J5: - printf("28F640J5\n"); - break; - default: - printf("Unknown Chip Type\n"); - break; - } - - printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf(" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf("\n "); - printf(" %08lX%s", - info->start[i], info->protect[i] ? " (RO)" : " "); - } - printf("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong -flash_get_size(FPW * addr, flash_info_t * info) -{ - volatile FPW value; - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = (FPW) 0x00AA00AA; - addr[0x2AAA] = (FPW) 0x00550055; - addr[0x5555] = (FPW) 0x00900090; - - mb(); - value = addr[0]; - - switch (value) { - - case (FPW) INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb(); - value = addr[1]; /* device ID */ - switch (value) { - case (FPW) INTEL_ID_28F128J3A: - info->flash_id += FLASH_28F128J3A; - info->sector_count = 128; - info->size = 0x02000000; - break; /* => 16 MB */ - case (FPW) INTEL_ID_28F640J5: - info->flash_id += FLASH_28F640J5; - info->sector_count = 64; - info->size = 0x01000000; - break; /* => 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - - return (info->size); -} - -/*----------------------------------------------------------------------- - */ - -int -flash_erase(flash_info_t * info, int s_first, int s_last) -{ - int flag, prot, sect; - ulong type, start; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf("- missing\n"); - } else { - printf("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf("\n"); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - FPWV *addr = (FPWV *) (info->start[sect]); - FPW status; - - printf("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - *addr = (FPW) 0x00500050; /* clear status register */ - *addr = (FPW) 0x00200020; /* erase setup */ - *addr = (FPW) 0x00D000D0; /* erase confirm */ - - while (((status = - *addr) & (FPW) 0x00800080) != - (FPW) 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf("Timeout\n"); - *addr = (FPW) 0x00B000B0; /* suspend erase */ - *addr = (FPW) 0x00FF00FF; /* reset to read mode */ - rcode = 1; - break; - } - } - - *addr = (FPW) 0x00500050; /* clear status register cmd. */ - *addr = (FPW) 0x00FF00FF; /* resest to read mode */ - - printf(" done\n"); - } - } - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int -write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) { - return 4; - } -/* get lower word aligned address */ -#ifdef FLASH_PORT_WIDTH16 - wp = (addr & ~1); - port_width = 2; -#else - wp = (addr & ~3); - port_width = 4; -#endif - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data(info, wp, SWAP(data))) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data(info, wp, SWAP(data))) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel(); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_data(info, wp, SWAP(data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int -write_data(flash_info_t * info, ulong dest, FPW data) -{ - FPWV *addr = (FPWV *) dest; - ulong status; - int flag; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf("not erased at %08lX (%lX)\n", (ulong) addr, *addr); - return (2); - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - *addr = (FPW) 0x00400040; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (1); - } - } - - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - - return (0); -} - -void inline -spin_wheel(void) -{ - static int p = 0; - static char w[] = "\\/-"; - - printf("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/board/gcplus/gcplus.c b/board/gcplus/gcplus.c deleted file mode 100644 index 71607f2223..0000000000 --- a/board/gcplus/gcplus.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * 2003-2004 (c) MontaVista Software, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#include <SA-1100.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscelaneous platform dependent initialisations - */ - -int -board_init(void) -{ - gd->bd->bi_arch_number = MACH_TYPE_GRAPHICSCLIENT; - - gd->bd->bi_boot_params = 0xc000003c; /* Weird address? */ - - /* Most of the ADS GCPlus I/O is connected to Static nCS2. - * So I'm brute forcing nCS2 timiming here for worst case. - */ - MSC1 &= ~0xFFFF; - MSC1 |= 0x8649; - - /* Nothing is connected to Static nCS4 or nCS5. But I'm using - * nCS4 as a paranoia safe guard to force nCS2, nOE; nWE high - * after accessing I/O via (non-VLIO) nCS2. What can I say, I'm - * paranoid and lack decent tools to alleviate my fear. I sure - * do wish I had a logic analyzer. : ( - */ - - MSC2 = 0xfff9fff9; - - return 0; -} - -int -dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; - - return (0); -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_LAN91C96 - rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE); -#endif - return rc; -} -#endif diff --git a/board/gcplus/lowlevel_init.S b/board/gcplus/lowlevel_init.S deleted file mode 100644 index f292c4d28a..0000000000 --- a/board/gcplus/lowlevel_init.S +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Memory Setup stuff - taken from blob memsetup.S - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) - * 2003-2004 (c) MontaVista Software, Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include "config.h" -#include "version.h" - - - .globl lowlevel_init -lowlevel_init: - /* The ADS GC+ for Linux Boot Rom Ver. 1.73 does memory init for us. - * However the darn thing leaves the MMU enabled before handing control - * over to us. So we need to disable the MMU and we use lowlevel_init - * to do it. - */ - -@ The following code segment was borrowed with gratitude from: -@ linux-2.4.19-rmk7/arch/arm/boot/compressed/head-sa1100.S - - @ Data cache might be active. - @ Be sure to flush kernel binary out of the cache, - @ whatever state it is, before it is turned off. - @ This is done by fetching through currently executed - @ memory to be sure we hit the same cache. - bic r2, pc, #0x1f - add r3, r2, #0x4000 @ 16 kb is quite enough... -1: ldr r0, [r2], #32 - teq r2, r3 - bne 1b - mcr p15, 0, r0, c7, c10, 4 @ drain WB - mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches - - @ disabling MMU and caches - mrc p15, 0, r0, c1, c0, 0 @ read control reg - bic r0, r0, #0x0d @ clear WB, DC, MMU - bic r0, r0, #0x1000 @ clear Icache - mcr p15, 0, r0, c1, c0, 0 - - nop - nop - nop - nop - nop - - b 2f -2: - nop - nop - nop - nop - nop - - - mov pc, lr diff --git a/board/impa7/Makefile b/board/impa7/Makefile deleted file mode 100644 index 79b12a220c..0000000000 --- a/board/impa7/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := impa7.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/impa7/config.mk b/board/impa7/config.mk deleted file mode 100644 index 15e7f04caf..0000000000 --- a/board/impa7/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -CONFIG_SYS_TEXT_BASE = 0xc1780000 diff --git a/board/impa7/flash.c b/board/impa7/flash.c deleted file mode 100644 index 6eae428a9d..0000000000 --- a/board/impa7/flash.c +++ /dev/null @@ -1,359 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -#define FLASH_BANK_SIZE 0x800000 -#define MAIN_SECT_SIZE 0x20000 -#define PARAM_SECT_SIZE 0x4000 - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - - -/*----------------------------------------------------------------------- - */ - -ulong flash_init (void) -{ - int i, j; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - ulong flashbase = 0; - - flash_info[i].flash_id = - (INTEL_MANUFACT & FLASH_VENDMASK) | - (INTEL_ID_28F320B3T & FLASH_TYPEMASK); - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - if (i == 0) - flashbase = PHYS_FLASH_1; - else if (i == 1) - flashbase = PHYS_FLASH_2; - else - panic ("configured too many flash banks!\n"); - for (j = 0; j < flash_info[i].sector_count; j++) { - if (j <= 7) { - flash_info[i].start[j] = - flashbase + j * PARAM_SECT_SIZE; - } else { - flash_info[i].start[j] = - flashbase + (j - 7) * MAIN_SECT_SIZE; - } - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - switch (info->flash_id & FLASH_VENDMASK) { - case (INTEL_MANUFACT & FLASH_VENDMASK): - printf ("Intel: "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case (INTEL_ID_28F320B3T & FLASH_TYPEMASK): - printf ("28F320F3B (16Mbit)\n"); - break; - default: - printf ("Unknown Chip Type\n"); - goto Done; - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) { - printf ("\n "); - } - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - - Done:; -} - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int flag, prot, sect; - int rc = ERR_OK; - ulong start; - - if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; - - if ((s_first < 0) || (s_first > s_last)) { - return ERR_INVAL; - } - - if ((info->flash_id & FLASH_VENDMASK) != - (INTEL_MANUFACT & FLASH_VENDMASK)) { - return ERR_UNKNOWN_FLASH_VENDOR; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - if (prot) - return ERR_PROTECTED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - flag = disable_interrupts (); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { - - printf ("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - if (info->protect[sect] == 0) { /* not protected */ - vu_long *addr = (vu_long *) (info->start[sect]); - - *addr = 0x00200020; /* erase setup */ - *addr = 0x00D000D0; /* erase confirm */ - - while ((*addr & 0x00800080) != 0x00800080) { - if (get_timer(start) > - CONFIG_SYS_FLASH_ERASE_TOUT) { - *addr = 0x00B000B0; /* suspend erase */ - *addr = 0x00FF00FF; /* reset to read mode */ - rc = ERR_TIMOUT; - goto outahere; - } - } - - *addr = 0x00FF00FF; /* reset to read mode */ - } - printf ("ok.\n"); - } - if (ctrlc ()) - printf ("User Interrupt!\n"); - - outahere: - - /* allow flash to settle - wait 10 ms */ - udelay_masked (10000); - - if (flag) - enable_interrupts (); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash - */ - -static int write_word (flash_info_t * info, ulong dest, ulong data) -{ - vu_long *addr = (vu_long *) dest; - ulong barf; - int rc = ERR_OK; - int flag; - ulong start; - - /* Check if Flash is (sufficiently) erased - */ - if ((*addr & data) != data) - return ERR_NOT_ERASED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - flag = disable_interrupts (); - - /* clear status register command */ - *addr = 0x00500050; - - /* program set-up command */ - *addr = 0x00400040; - - /* latch address/data */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* read status register command */ - *addr = 0x00700070; - - /* wait while polling the status register */ - while ((*addr & 0x00800080) != 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - rc = ERR_TIMOUT; - /* suspend program command */ - *addr = 0x00B000B0; - goto outahere; - } - - if (*addr & 0x003A003A) { /* check for error */ - barf = *addr; - if (barf & 0x003A0000) { - barf >>= 16; - } else { - barf &= 0x0000003A; - } - printf ("\nFlash write error %02lx at address %08lx\n", barf, (unsigned long) dest); - if (barf & 0x0002) { - printf ("Block locked, not erased.\n"); - rc = ERR_NOT_ERASED; - goto outahere; - } - if (barf & 0x0010) { - printf ("Programming error.\n"); - rc = ERR_PROG_ERROR; - goto outahere; - } - if (barf & 0x0008) { - printf ("Vpp Low error.\n"); - rc = ERR_PROG_ERROR; - goto outahere; - } - rc = ERR_PROG_ERROR; - goto outahere; - } - } - - - outahere: - /* read array command */ - *addr = 0x00FF00FF; - - if (flag) - enable_interrupts (); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - */ - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp, data; - int l; - int i, rc; - - wp = (addr & ~3); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 24); - } - for (; i < 4 && cnt > 0; ++i) { - data = (data >> 8) | (*src++ << 24); - --cnt; - ++cp; - } - for (; cnt == 0 && i < 4; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 24); - } - - if ((rc = write_word (info, wp, data)) != 0) { - return (rc); - } - wp += 4; - } - - /* - * handle word aligned part - */ - while (cnt >= 4) { - data = *((vu_long *) src); - if ((rc = write_word (info, wp, data)) != 0) { - return (rc); - } - src += 4; - wp += 4; - cnt -= 4; - } - - if (cnt == 0) { - return ERR_OK; - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 24); - --cnt; - } - for (; i < 4; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 24); - } - - return write_word (info, wp, data); -} diff --git a/board/impa7/impa7.c b/board/impa7/impa7.c deleted file mode 100644 index 205b1b31dd..0000000000 --- a/board/impa7/impa7.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> -#include <clps7111.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ - - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* Activate LED flasher */ - IO_LEDFLSH = 0x40; - - /* arch number of EP7111 */ - gd->bd->bi_arch_number = MACH_TYPE_EDB7211; - - /* location of boot parameters for EP7111 */ - gd->bd->bi_boot_params = 0xc0020100; - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; - - return (0); -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/board/impa7/lowlevel_init.S b/board/impa7/lowlevel_init.S deleted file mode 100644 index 7ce10a2019..0000000000 --- a/board/impa7/lowlevel_init.S +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Memory Setup stuff - taken from ??? - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <config.h> -#include <version.h> - - -/* some parameters for the board */ - -SYSCON2: .long 0x80001100 -MEMCFG1: .long 0x80000180 -MEMCFG2: .long 0x800001C0 -DRFPR: .long 0x80000200 - -syscon2_mask: .long 0x00000004 -memcfg1_val: .long 0x160c1414 -memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits -memcfg2_val: .long 0x00000000 @ upper 16 bits are reserved for CS7 + CS6 -drfpr_val: .long 0x00000081 -/* setting up the memory */ - -.globl lowlevel_init -lowlevel_init: - /* - * DRFPR - * 64kHz DRAM refresh - */ - ldr r0, DRFPR - ldr r1, drfpr_val - str r1, [r0] - - /* - * SYSCON2: clear bit 2, DRAM is 32 bits wide - */ - ldr r0, SYSCON2 - ldr r2, [r0] - ldr r1, syscon2_mask - bic r2, r2, r1 - str r2, [r0] - - /* - * MEMCFG1 - * Setting up Keyboard at CS3, 8 Bit, 3 Waitstates - * Setting up CS8900 (Ethernet) at CS2, 32 Bit, 5 Waitstates - * Setting up flash at CS0 and CS1, 32 Bit, 3 Waitstates - */ - ldr r0, MEMCFG1 - ldr r1, memcfg1_val - str r1, [r0] - - /* - * MEMCFG2 - * Setting up ? with 0 - * - */ - ldr r0, MEMCFG2 - ldr r2, [r0] - ldr r1, memcfg2_mask - bic r2, r2, r1 - ldr r1, memcfg2_val - orr r2, r2, r1 - str r2, [r0] - - /* everything is fine now */ - mov pc, lr diff --git a/board/lart/Makefile b/board/lart/Makefile deleted file mode 100644 index 463bc0bade..0000000000 --- a/board/lart/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := lart.o flash.o -SOBJS := flashasm.o lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/lart/config.mk b/board/lart/config.mk deleted file mode 100644 index b6b5e4da32..0000000000 --- a/board/lart/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# LART board with SA1100 cpu -# -# see http://www.lart.tudelft.nl/ for more information on LART -# - -# -# LART has 4 banks of 8 MB DRAM -# -# c000'0000 -# c100'0000 -# c800'0000 -# c900'0000 -# -# Linux-Kernel is expected to be at c000'8000, entry c000'8000 -# -# we load ourself to c178'0000, the upper 1 MB of second bank -# -# download areas is c800'0000 -# - - -CONFIG_SYS_TEXT_BASE = 0xc1780000 diff --git a/board/lart/flash.c b/board/lart/flash.c deleted file mode 100644 index 408c88498e..0000000000 --- a/board/lart/flash.c +++ /dev/null @@ -1,476 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -ulong myflush(void); - - -#define FLASH_BANK_SIZE 0x800000 -#define MAIN_SECT_SIZE 0x20000 -#define PARAM_SECT_SIZE 0x4000 - -/* puzzle magic for lart - * data_*_flash are def'd in flashasm.S - */ - -extern u32 data_from_flash(u32); -extern u32 data_to_flash(u32); - -#define PUZZLE_FROM_FLASH(x) data_from_flash((x)) -#define PUZZLE_TO_FLASH(x) data_to_flash((x)) - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - - -#define CMD_READ_ARRAY 0x00FF00FF -#define CMD_IDENTIFY 0x00900090 -#define CMD_ERASE_SETUP 0x00200020 -#define CMD_ERASE_CONFIRM 0x00D000D0 -#define CMD_PROGRAM 0x00400040 -#define CMD_RESUME 0x00D000D0 -#define CMD_SUSPEND 0x00B000B0 -#define CMD_STATUS_READ 0x00700070 -#define CMD_STATUS_RESET 0x00500050 - -#define BIT_BUSY 0x00800080 -#define BIT_ERASE_SUSPEND 0x00400040 -#define BIT_ERASE_ERROR 0x00200020 -#define BIT_PROGRAM_ERROR 0x00100010 -#define BIT_VPP_RANGE_ERROR 0x00080008 -#define BIT_PROGRAM_SUSPEND 0x00040004 -#define BIT_PROTECT_ERROR 0x00020002 -#define BIT_UNDEFINED 0x00010001 - -#define BIT_SEQUENCE_ERROR 0x00300030 -#define BIT_TIMEOUT 0x80000000 - -/*----------------------------------------------------------------------- - */ - -ulong flash_init(void) -{ - int i, j; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) - { - ulong flashbase = 0; - flash_info[i].flash_id = - (INTEL_MANUFACT & FLASH_VENDMASK) | - (INTEL_ID_28F160F3B & FLASH_TYPEMASK); - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - if (i == 0) - flashbase = PHYS_FLASH_1; - else - panic("configured too many flash banks!\n"); - for (j = 0; j < flash_info[i].sector_count; j++) - { - if (j <= 7) - { - flash_info[i].start[j] = flashbase + j * PARAM_SECT_SIZE; - } - else - { - flash_info[i].start[j] = flashbase + (j - 7)*MAIN_SECT_SIZE; - } - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t *info) -{ - int i; - - switch (info->flash_id & FLASH_VENDMASK) - { - case (INTEL_MANUFACT & FLASH_VENDMASK): - printf("Intel: "); - break; - default: - printf("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) - { - case (INTEL_ID_28F160F3B & FLASH_TYPEMASK): - printf("2x 28F160F3B (16Mbit)\n"); - break; - default: - printf("Unknown Chip Type\n"); - goto Done; - break; - } - - printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf(" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) - { - if ((i % 5) == 0) - { - printf ("\n "); - } - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - -Done: - ; -} - -/*----------------------------------------------------------------------- - */ - -int flash_error (ulong code) -{ - /* Check bit patterns */ - /* SR.7=0 is busy, SR.7=1 is ready */ - /* all other flags indicate error on 1 */ - /* SR.0 is undefined */ - /* Timeout is our faked flag */ - - /* sequence is described in Intel 290644-005 document */ - - /* check Timeout */ - if (code & BIT_TIMEOUT) - { - printf ("Timeout\n"); - return ERR_TIMOUT; - } - - /* check Busy, SR.7 */ - if (~code & BIT_BUSY) - { - printf ("Busy\n"); - return ERR_PROG_ERROR; - } - - /* check Vpp low, SR.3 */ - if (code & BIT_VPP_RANGE_ERROR) - { - printf ("Vpp range error\n"); - return ERR_PROG_ERROR; - } - - /* check Device Protect Error, SR.1 */ - if (code & BIT_PROTECT_ERROR) - { - printf ("Device protect error\n"); - return ERR_PROG_ERROR; - } - - /* check Command Seq Error, SR.4 & SR.5 */ - if (code & BIT_SEQUENCE_ERROR) - { - printf ("Command seqence error\n"); - return ERR_PROG_ERROR; - } - - /* check Block Erase Error, SR.5 */ - if (code & BIT_ERASE_ERROR) - { - printf ("Block erase error\n"); - return ERR_PROG_ERROR; - } - - /* check Program Error, SR.4 */ - if (code & BIT_PROGRAM_ERROR) - { - printf ("Program error\n"); - return ERR_PROG_ERROR; - } - - /* check Block Erase Suspended, SR.6 */ - if (code & BIT_ERASE_SUSPEND) - { - printf ("Block erase suspended\n"); - return ERR_PROG_ERROR; - } - - /* check Program Suspended, SR.2 */ - if (code & BIT_PROGRAM_SUSPEND) - { - printf ("Program suspended\n"); - return ERR_PROG_ERROR; - } - - /* OK, no error */ - return ERR_OK; -} - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - ulong result; - int iflag, cflag, prot, sect; - int rc = ERR_OK; - ulong start; - - /* first look for protection bits */ - - if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; - - if ((s_first < 0) || (s_first > s_last)) { - return ERR_INVAL; - } - - if ((info->flash_id & FLASH_VENDMASK) != - (INTEL_MANUFACT & FLASH_VENDMASK)) { - return ERR_UNKNOWN_FLASH_VENDOR; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - if (prot) - return ERR_PROTECTED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - cflag = icache_status(); - icache_disable(); - iflag = disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last && !ctrlc(); sect++) - { - printf("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - if (info->protect[sect] == 0) - { /* not protected */ - vu_long *addr = (vu_long *)(info->start[sect]); - - *addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET); - *addr = PUZZLE_TO_FLASH(CMD_ERASE_SETUP); - *addr = PUZZLE_TO_FLASH(CMD_ERASE_CONFIRM); - - /* wait until flash is ready */ - do - { - /* check timeout */ - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) - { - *addr = PUZZLE_TO_FLASH(CMD_SUSPEND); - result = BIT_TIMEOUT; - break; - } - - result = PUZZLE_FROM_FLASH(*addr); - } while (~result & BIT_BUSY); - - *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY); - - if ((rc = flash_error(result)) != ERR_OK) - goto outahere; - - printf("ok.\n"); - } - else /* it was protected */ - { - printf("protected!\n"); - } - } - - if (ctrlc()) - printf("User Interrupt!\n"); - -outahere: - /* allow flash to settle - wait 10 ms */ - udelay_masked(10000); - - if (iflag) - enable_interrupts(); - - if (cflag) - icache_enable(); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash - */ - -static int write_word (flash_info_t *info, ulong dest, ulong data) -{ - vu_long *addr = (vu_long *)dest; - ulong result; - int rc = ERR_OK; - int cflag, iflag; - ulong start; - - /* Check if Flash is (sufficiently) erased - */ - result = PUZZLE_FROM_FLASH(*addr); - if ((result & data) != data) - return ERR_NOT_ERASED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - cflag = icache_status(); - icache_disable(); - iflag = disable_interrupts(); - - *addr = PUZZLE_TO_FLASH(CMD_STATUS_RESET); - *addr = PUZZLE_TO_FLASH(CMD_PROGRAM); - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait until flash is ready */ - do - { - /* check timeout */ - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) - { - *addr = PUZZLE_TO_FLASH(CMD_SUSPEND); - result = BIT_TIMEOUT; - break; - } - - result = PUZZLE_FROM_FLASH(*addr); - } while (~result & BIT_BUSY); - - *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY); - - rc = flash_error(result); - - if (iflag) - enable_interrupts(); - - if (cflag) - icache_enable(); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp, data; - int l; - int i, rc; - - wp = (addr & ~3); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 24); - } - for (; i<4 && cnt>0; ++i) { - data = (data >> 8) | (*src++ << 24); - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 24); - } - - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - } - - /* - * handle word aligned part - */ - while (cnt >= 4) { - data = *((vu_long*)src); - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - src += 4; - wp += 4; - cnt -= 4; - } - - if (cnt == 0) { - return ERR_OK; - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 24); - --cnt; - } - for (; i<4; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 24); - } - - return write_word(info, wp, data); -} diff --git a/board/lart/flashasm.S b/board/lart/flashasm.S deleted file mode 100644 index 9021972cb4..0000000000 --- a/board/lart/flashasm.S +++ /dev/null @@ -1,177 +0,0 @@ -/* - * flashasm.S: flash magic for LART - * - * Copyright (C) 1999 2000 2001 Jan-Derk bakker (J.D.Bakker@its.tudelft.nl) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -.text - - -.globl data_to_flash -.globl data_from_flash - /* Subroutine that takes data in r0 and formats it so it will be in */ - /* the correct order for the internal flash */ - /* used for LART only */ -data_to_flash: - mov r1, #0x0 - - tst r0, #0x00000001 - orrne r1, r1, #0x00001000 - tst r0, #0x00000002 - orrne r1, r1, #0x00004000 - tst r0, #0x00000004 - orrne r1, r1, #0x00000800 - tst r0, #0x00000008 - orrne r1, r1, #0x00000200 - tst r0, #0x00000010 - orrne r1, r1, #0x00000001 - tst r0, #0x00000020 - orrne r1, r1, #0x00000004 - tst r0, #0x00000040 - orrne r1, r1, #0x00000080 - tst r0, #0x00000080 - orrne r1, r1, #0x00000020 - - tst r0, #0x00000100 - orrne r1, r1, #0x00002000 - tst r0, #0x00000200 - orrne r1, r1, #0x00008000 - tst r0, #0x00000400 - orrne r1, r1, #0x00000400 - tst r0, #0x00000800 - orrne r1, r1, #0x00000100 - tst r0, #0x00001000 - orrne r1, r1, #0x00000002 - tst r0, #0x00002000 - orrne r1, r1, #0x00000008 - tst r0, #0x00004000 - orrne r1, r1, #0x00000040 - tst r0, #0x00008000 - orrne r1, r1, #0x00000010 - - tst r0, #0x00010000 - orrne r1, r1, #0x00100000 - tst r0, #0x00020000 - orrne r1, r1, #0x00400000 - tst r0, #0x00040000 - orrne r1, r1, #0x00080000 - tst r0, #0x00080000 - orrne r1, r1, #0x00020000 - tst r0, #0x00100000 - orrne r1, r1, #0x01000000 - tst r0, #0x00200000 - orrne r1, r1, #0x04000000 - tst r0, #0x00400000 - orrne r1, r1, #0x80000000 - tst r0, #0x00800000 - orrne r1, r1, #0x20000000 - - tst r0, #0x01000000 - orrne r1, r1, #0x00200000 - tst r0, #0x02000000 - orrne r1, r1, #0x00800000 - tst r0, #0x04000000 - orrne r1, r1, #0x00040000 - tst r0, #0x08000000 - orrne r1, r1, #0x00010000 - tst r0, #0x10000000 - orrne r1, r1, #0x02000000 - tst r0, #0x20000000 - orrne r1, r1, #0x08000000 - tst r0, #0x40000000 - orrne r1, r1, #0x40000000 - tst r0, #0x80000000 - orrne r1, r1, #0x10000000 - - mov r0, r1 - mov pc, lr - - /* Takes data received from the flash, and unshuffles it. */ -data_from_flash: - mov r1, #0x00 - - tst r0, #0x00000001 - orrne r1, r1, #0x00000010 - tst r0, #0x00000002 - orrne r1, r1, #0x00001000 - tst r0, #0x00000004 - orrne r1, r1, #0x00000020 - tst r0, #0x00000008 - orrne r1, r1, #0x00002000 - tst r0, #0x00000010 - orrne r1, r1, #0x00008000 - tst r0, #0x00000020 - orrne r1, r1, #0x00000080 - tst r0, #0x00000040 - orrne r1, r1, #0x00004000 - tst r0, #0x00000080 - orrne r1, r1, #0x00000040 - - tst r0, #0x00000100 - orrne r1, r1, #0x00000800 - tst r0, #0x00000200 - orrne r1, r1, #0x00000008 - tst r0, #0x00000400 - orrne r1, r1, #0x00000400 - tst r0, #0x00000800 - orrne r1, r1, #0x00000004 - tst r0, #0x00001000 - orrne r1, r1, #0x00000001 - tst r0, #0x00002000 - orrne r1, r1, #0x00000100 - tst r0, #0x00004000 - orrne r1, r1, #0x00000002 - tst r0, #0x00008000 - orrne r1, r1, #0x00000200 - - tst r0, #0x00010000 - orrne r1, r1, #0x08000000 - tst r0, #0x00020000 - orrne r1, r1, #0x00080000 - tst r0, #0x00040000 - orrne r1, r1, #0x04000000 - tst r0, #0x00080000 - orrne r1, r1, #0x00040000 - tst r0, #0x00100000 - orrne r1, r1, #0x00010000 - tst r0, #0x00200000 - orrne r1, r1, #0x01000000 - tst r0, #0x00400000 - orrne r1, r1, #0x00020000 - tst r0, #0x00800000 - orrne r1, r1, #0x02000000 - - tst r0, #0x01000000 - orrne r1, r1, #0x00100000 - tst r0, #0x02000000 - orrne r1, r1, #0x10000000 - tst r0, #0x04000000 - orrne r1, r1, #0x00200000 - tst r0, #0x08000000 - orrne r1, r1, #0x20000000 - tst r0, #0x10000000 - orrne r1, r1, #0x80000000 - tst r0, #0x20000000 - orrne r1, r1, #0x00800000 - tst r0, #0x40000000 - orrne r1, r1, #0x40000000 - tst r0, #0x80000000 - orrne r1, r1, #0x00400000 - - mov r0, r1 - mov pc, lr diff --git a/board/lart/lart.c b/board/lart/lart.c deleted file mode 100644 index a0b459f2f2..0000000000 --- a/board/lart/lart.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ - - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* memory and cpu-speed are setup before relocation */ - /* so we do _nothing_ here */ - - /* arch number of LART-Board */ - gd->bd->bi_arch_number = MACH_TYPE_LART; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0xc0000100; - - return 0; -} - -int dram_init (void) -{ - bd_t *bd = gd->bd; - - bd->bi_dram[0].start = PHYS_SDRAM_1; - bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - bd->bi_dram[1].start = PHYS_SDRAM_2; - bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; - bd->bi_dram[2].start = PHYS_SDRAM_3; - bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; - bd->bi_dram[3].start = PHYS_SDRAM_4; - bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; - - return (0); -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/board/lart/lowlevel_init.S b/board/lart/lowlevel_init.S deleted file mode 100644 index db9fd63def..0000000000 --- a/board/lart/lowlevel_init.S +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Memory Setup stuff - taken from blob memsetup.S - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <config.h> -#include <version.h> - - -/* some parameters for the board */ - -MEM_BASE: .long 0xa0000000 -MEM_START: .long 0xc0000000 - -#define MDCNFG 0x00 -#define MDCAS0 0x04 -#define MDCAS1 0x08 -#define MDCAS2 0x0c -#define MSC0 0x10 -#define MSC1 0x14 -#define MECR 0x18 - -mdcas0: .long 0xc71c703f -mdcas1: .long 0xffc71c71 -mdcas2: .long 0xffffffff -/* mdcnfg: .long 0x0bb2bcbf */ -mdcnfg: .long 0x0334b22f @ alt -/* mcs0: .long 0xfff8fff8 */ -msc0: .long 0xad8c4888 @ alt -mecr: .long 0x00060006 -/* mecr: .long 0x994a994a @ alt */ - -/* setting up the memory */ - -.globl lowlevel_init -lowlevel_init: - ldr r0, MEM_BASE - - /* Setup the flash memory */ - ldr r1, msc0 - str r1, [r0, #MSC0] - - /* Set up the DRAM */ - - /* MDCAS0 */ - ldr r1, mdcas0 - str r1, [r0, #MDCAS0] - - /* MDCAS1 */ - ldr r1, mdcas1 - str r1, [r0, #MDCAS1] - - /* MDCAS2 */ - ldr r1, mdcas2 - str r1, [r0, #MDCAS2] - - /* MDCNFG */ - ldr r1, mdcnfg - str r1, [r0, #MDCNFG] - - /* Set up PCMCIA space */ - ldr r1, mecr - str r1, [r0, #MECR] - - /* Load something to activate bank */ - ldr r1, MEM_START - -.rept 8 - ldr r0, [r1] -.endr - - /* everything is fine now */ - mov pc, lr diff --git a/board/linkstation/linkstation.c b/board/linkstation/linkstation.c index e564e505ac..764085691c 100644 --- a/board/linkstation/linkstation.c +++ b/board/linkstation/linkstation.c @@ -21,8 +21,8 @@ * MA 02111-1307 USA */ -#include <version.h> #include <common.h> +#include <version.h> #include <mpc824x.h> #include <asm/io.h> #include <ns16550.h> diff --git a/board/logicpd/imx27lite/lowlevel_init.S b/board/logicpd/imx27lite/lowlevel_init.S index e2cdecb96b..873634f1da 100644 --- a/board/logicpd/imx27lite/lowlevel_init.S +++ b/board/logicpd/imx27lite/lowlevel_init.S @@ -26,7 +26,7 @@ #include <version.h> #include <asm/macro.h> #include <asm/arch/imx-regs.h> -#include <asm/arch/asm-offsets.h> +#include <generated/asm-offsets.h> SOC_ESDCTL_BASE_W: .word IMX_ESD_BASE SOC_SI_ID_REG_W: .word IMX_SYSTEM_CTL_BASE diff --git a/board/lpc2292sodimm/Makefile b/board/lpc2292sodimm/Makefile deleted file mode 100644 index c1a5b0b37d..0000000000 --- a/board/lpc2292sodimm/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2007 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := flash.o lpc2292sodimm.o -SOBJTS := lowlevel_init.o - -SRCS := $(SOBJTS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJTS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/lpc2292sodimm/config.mk b/board/lpc2292sodimm/config.mk deleted file mode 100644 index 48917928e1..0000000000 --- a/board/lpc2292sodimm/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -#address where u-boot will be relocated -#CONFIG_SYS_TEXT_BASE = 0x0 -CONFIG_SYS_TEXT_BASE = 0x81500000 diff --git a/board/lpc2292sodimm/flash.c b/board/lpc2292sodimm/flash.c deleted file mode 100644 index fd5389fb98..0000000000 --- a/board/lpc2292sodimm/flash.c +++ /dev/null @@ -1,252 +0,0 @@ -/* - * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com> - * - * Modified to use the routines in arch/arm/cpu/arm720t/lpc2292/flash.c by - * Gary Jennejohn <garyj@denx,de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/hardware.h> - -#define SST_BASEADDR 0x80000000 -#define SST_ADDR1 ((volatile ushort*)(SST_BASEADDR + (0x5555 << 1))) -#define SST_ADDR2 ((volatile ushort*)(SST_BASEADDR + (0x2AAA << 1))) - - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -extern int lpc2292_copy_buffer_to_flash(flash_info_t *, ulong); -extern int lpc2292_flash_erase(flash_info_t *, int, int); -extern int lpc2292_write_buff (flash_info_t *, uchar *, ulong, ulong); - -/*----------------------------------------------------------------------- - * - */ -void write_word_sst(ulong addr, ushort data) -{ - ushort tmp; - - *SST_ADDR1 = 0x00AA; - *SST_ADDR2 = 0x0055; - *SST_ADDR1 = 0x00A0; - *((volatile ushort*)addr) = data; - /* do data polling */ - do { - tmp = *((volatile ushort*)addr); - } while (tmp != data); -} - -/*----------------------------------------------------------------------- - */ - -ulong flash_init (void) -{ - int j, k; - ulong size = 0; - ulong flashbase = 0; - - flash_info[0].flash_id = (PHILIPS_LPC2292 & FLASH_VENDMASK); - flash_info[0].size = 0x003E000; /* 256 - 8 KB */ - flash_info[0].sector_count = 17; - memset (flash_info[0].protect, 0, 17); - flashbase = 0x00000000; - for (j = 0, k = 0; j < 8; j++, k++) { - flash_info[0].start[k] = flashbase; - flashbase += 0x00002000; - } - for (j = 0; j < 2; j++, k++) { - flash_info[0].start[k] = flashbase; - flashbase += 0x00010000; - } - for (j = 0; j < 7; j++, k++) { - flash_info[0].start[k] = flashbase; - flashbase += 0x00002000; - } - size += flash_info[0].size; - - flash_info[1].flash_id = (SST_MANUFACT & FLASH_VENDMASK); - flash_info[1].size = 0x00200000; /* 2 MB */ - flash_info[1].sector_count = 512; - memset (flash_info[1].protect, 0, 512); - flashbase = SST_BASEADDR; - for (j=0; j<512; j++) { - flash_info[1].start[j] = flashbase; - flashbase += 0x1000; /* 4 KB sectors */ - } - size += flash_info[1].size; - - /* Protect monitor and environment sectors */ - flash_protect (FLAG_PROTECT_SET, - 0x0, - 0x0 + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - int erased = 0; - unsigned long j; - unsigned long count; - unsigned char *p; - - switch (info->flash_id & FLASH_VENDMASK) { - case (SST_MANUFACT & FLASH_VENDMASK): - printf("SST: "); - break; - case (PHILIPS_LPC2292 & FLASH_VENDMASK): - printf("Philips: "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - printf (" Size: %ld KB in %d Sectors\n", - info->size >> 10, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) { - printf ("\n "); - } - if (i < (info->sector_count - 1)) { - count = info->start[i+1] - info->start[i]; - } - else { - count = info->start[0] + info->size - info->start[i]; - } - p = (unsigned char*)(info->start[i]); - erased = 1; - for (j = 0; j < count; j++) { - if (*p != 0xFF) { - erased = 0; - break; - } - p++; - } - printf (" %08lX%s%s", info->start[i], info->protect[i] ? " RO" : " ", - erased ? " E" : " "); - } - printf ("\n"); -} - -int flash_erase_sst (flash_info_t * info, int s_first, int s_last) -{ - int i; - - for (i = s_first; i <= s_last; i++) { - *SST_ADDR1 = 0x00AA; - *SST_ADDR2 = 0x0055; - *SST_ADDR1 = 0x0080; - *SST_ADDR1 = 0x00AA; - *SST_ADDR2 = 0x0055; - *((volatile ushort*)(info->start[i])) = 0x0030; - /* wait for erase to finish */ - udelay(25000); - } - - return ERR_OK; -} - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - switch (info->flash_id & FLASH_VENDMASK) { - case (SST_MANUFACT & FLASH_VENDMASK): - return flash_erase_sst(info, s_first, s_last); - case (PHILIPS_LPC2292 & FLASH_VENDMASK): - return lpc2292_flash_erase(info, s_first, s_last); - default: - return ERR_PROTECTED; - } - return ERR_PROTECTED; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - * - * cnt is in bytes - */ - -int write_buff_sst (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ushort tmp; - ulong i; - uchar* src_org; - uchar* dst_org; - ulong cnt_org = cnt; - int ret = ERR_OK; - - src_org = src; - dst_org = (uchar*)addr; - - if (addr & 1) { /* if odd address */ - tmp = *((uchar*)(addr - 1)); /* little endian */ - tmp |= (*src << 8); - write_word_sst(addr - 1, tmp); - addr += 1; - cnt -= 1; - src++; - } - while (cnt > 1) { - tmp = ((*(src+1)) << 8) + (*src); /* little endian */ - write_word_sst(addr, tmp); - addr += 2; - src += 2; - cnt -= 2; - } - if (cnt > 0) { - tmp = (*((uchar*)(addr + 1))) << 8; - tmp |= *src; - write_word_sst(addr, tmp); - } - - for (i = 0; i < cnt_org; i++) { - if (*dst_org != *src_org) { - printf("Write failed. Byte %lX differs\n", i); - ret = ERR_PROG_ERROR; - break; - } - dst_org++; - src_org++; - } - - return ret; -} - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - switch (info->flash_id & FLASH_VENDMASK) { - case (SST_MANUFACT & FLASH_VENDMASK): - return write_buff_sst(info, src, addr, cnt); - case (PHILIPS_LPC2292 & FLASH_VENDMASK): - return lpc2292_write_buff(info, src, addr, cnt); - default: - return ERR_PROG_ERROR; - } - return ERR_PROG_ERROR; -} diff --git a/board/lpc2292sodimm/lowlevel_init.S b/board/lpc2292sodimm/lowlevel_init.S deleted file mode 100644 index f579a1a47e..0000000000 --- a/board/lpc2292sodimm/lowlevel_init.S +++ /dev/null @@ -1,87 +0,0 @@ -/* - * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <version.h> -#include <asm/arch/hardware.h> - -/* some parameters for the board */ -/* setting up the memory */ -#define SRAM_START 0x40000000 -#define SRAM_SIZE 0x00004000 -#define BCFG0_VALUE 0x1000ffef -#define BCFG1_VALUE 0x10001C61 - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE -MEMMAP_ADR: - .word MEMMAP -BCFG0_ADR: - .word BCFG0 -_BCFG0_VALUE: - .word BCFG0_VALUE -BCFG1_ADR: - .word BCFG1 -_BCFG1_VALUE: - .word BCFG1_VALUE -PINSEL2_ADR: - .word PINSEL2 -PINSEL2_MASK: - .word 0x00000000 -PINSEL2_VALUE: - .word 0x0F800914 - -.extern _start - -.globl lowlevel_init -lowlevel_init: - /* set up memory control register for bank 0 */ - ldr r0, _BCFG0_VALUE - ldr r1, BCFG0_ADR - str r0, [r1] - - /* set up memory control register for bank 1 */ - ldr r0, _BCFG1_VALUE - ldr r1, BCFG1_ADR - str r0, [r1] - - /* set up PINSEL2 for bus-pins */ - ldr r0, PINSEL2_ADR - ldr r1, [r0] - ldr r2, PINSEL2_MASK - ldr r3, PINSEL2_VALUE - and r1, r1, r2 - orr r1, r1, r3 - str r1, [r0] - - /* move vectors to beginning of SRAM */ - mov r2, #SRAM_START - mov r0, #0 /*_start*/ - ldmneia r0!, {r3-r10} - stmneia r2!, {r3-r10} - ldmneia r0, {r3-r9} - stmneia r2, {r3-r9} - - /* Set-up MEMMAP register, so vectors are taken from SRAM */ - ldr r0, MEMMAP_ADR - mov r1, #0x02 /* vectors re-mapped to static RAM */ - str r1, [r0] - - /* everything is fine now */ - mov pc, lr diff --git a/board/lpc2292sodimm/lpc2292sodimm.c b/board/lpc2292sodimm/lpc2292sodimm.c deleted file mode 100644 index 9c2d1af2fc..0000000000 --- a/board/lpc2292sodimm/lpc2292sodimm.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com> - * Armadillo board HT1070 - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <clps7111.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* Activate LED flasher */ - IO_LEDFLSH = 0x40; - - /* arch number MACH_TYPE_ARMADILLO - not official*/ - gd->bd->bi_arch_number = 83; - - /* location of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return (0); -} diff --git a/board/modnet50/Makefile b/board/modnet50/Makefile deleted file mode 100644 index d5a541fa6c..0000000000 --- a/board/modnet50/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := modnet50.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/modnet50/config.mk b/board/modnet50/config.mk deleted file mode 100644 index 4e4d3059a2..0000000000 --- a/board/modnet50/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -CONFIG_SYS_TEXT_BASE = 0x00f00000 -#CROSS_COMPILE = arm-elf- diff --git a/board/modnet50/flash.c b/board/modnet50/flash.c deleted file mode 100644 index 4834e21e62..0000000000 --- a/board/modnet50/flash.c +++ /dev/null @@ -1,538 +0,0 @@ -/* - * (C) Copyright 2002 - * MAZeT GmbH <www.mazet.de> - * Stephan Linz <linz@mazet.de>, <linz@li-pro.net> - * - * The most stuff comes from PPCBoot and Linux. - * - * IMMS gGmbH <www.imms.de> - * Thomas Elste <info@elste.org> - * - * Modifications for ModNET50 Board - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/arch/netarm_registers.h> - -#define SCR (*(volatile unsigned int *)(NETARM_GEN_MODULE_BASE + NETARM_GEN_SYSTEM_CONTROL)) - -#define ALIGN_ABORT_OFF SCR = SCR & ~NETARM_GEN_SYS_CFG_ALIGN_ABORT -#define ALIGN_ABORT_ON SCR = SCR | NETARM_GEN_SYS_CFG_ALIGN_ABORT - -#define PROG_ADDR (0x555*2) -#define SETUP_ADDR (0x555*2) -#define ID_ADDR (0x555*2) -#define UNLOCK_ADDR1 (0x555*2) -#define UNLOCK_ADDR2 (0x2AA*2) - -#define UNLOCK_CMD1 (0xAA) -#define UNLOCK_CMD2 (0x55) -#define ERASE_SUSPEND_CMD (0xB0) -#define ERASE_RESUME_CMD (0x30) -#define RESET_CMD (0xF0) -#define ID_CMD (0x90) -#define SECERASE_CMD (0x30) -#define CHIPERASE_CMD (0x10) -#define PROG_CMD (0xa0) -#define SETUP_CMD (0x80) - -#define DQ2 (0x04) -#define DQ3 (DQ2*2) -#define DQ5 (DQ3*4) -#define DQ6 (DQ5*2) - -#define WRITE_UNLOCK(addr) { \ - *(volatile __u16*)(addr + UNLOCK_ADDR1) = (__u16)UNLOCK_CMD1; \ - *(volatile __u16*)(addr + UNLOCK_ADDR2) = (__u16)UNLOCK_CMD2; \ -} - -#define CONFIG_AM29_RESERVED (0) -#define K (1024) -#define MB (4) - -#define CELL_SIZE (64*K) -#define DEVICE_SIZE (MB*K*K) -#define CELLS_PER_DEVICE (DEVICE_SIZE/CELL_SIZE) -#define RESERVED_CELLS (CONFIG_AM29_RESERVED*K)/CELL_SIZE -#define MAX_FLASH_DEVICES (1) -#define AVAIL_SIZE (DEVICE_SIZE*MAX_FLASH_DEVICES - RESERVED_CELLS*CELL_SIZE) - - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; -static __u16 toggling_bits; - - -/*----------------------------------------------------------------------- - */ -ulong flash_get_size (ulong baseaddr, flash_info_t * info) -{ - short i; - __u16 flashtest; - - /* Write auto select command sequence and test FLASH answer */ - WRITE_UNLOCK (baseaddr); - *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) ID_CMD; - flashtest /* manufacturer ID */ = *(volatile __u16 *) (baseaddr); - *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) RESET_CMD; - - switch ((__u32) ((flashtest << 16) + flashtest)) { - case AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD & FLASH_VENDMASK; - break; - case FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ & FLASH_VENDMASK; - break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ - } - - /* Write auto select command sequence and test FLASH answer */ - WRITE_UNLOCK (baseaddr); - *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) ID_CMD; - flashtest /* device ID */ = *(volatile __u16 *) (baseaddr + 2); - *(volatile __u16 *) (baseaddr + ID_ADDR) = (__u16) RESET_CMD; - - /* toggling_bits = (flashtest == TOSHIBA)?(DQ6):(DQ2|DQ6); */ - toggling_bits = (DQ2 | DQ6); - - switch ((__u32) ((flashtest << 16) + flashtest)) { - case AMD_ID_LV160B: - info->flash_id += - (FLASH_AM160LV | FLASH_AM160B) & FLASH_TYPEMASK; - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - info->size = CONFIG_SYS_FLASH_SIZE; - /* 1*16K Boot Block - 2*8K Parameter Block - 1*32K Small Main Block */ - info->start[0] = baseaddr; - info->start[1] = baseaddr + 0x4000; - info->start[2] = baseaddr + 0x6000; - info->start[3] = baseaddr + 0x8000; - for (i = 1; i < info->sector_count; i++) - info->start[3 + i] = baseaddr + i * CONFIG_SYS_MAIN_SECT_SIZE; - break; - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* no or unknown flash */ - } - - for (i = 0; i < info->sector_count; i++) { - /* Write auto select command sequence and test FLASH answer */ - WRITE_UNLOCK (info->start[i]); - *(volatile __u16 *) (info->start[i] + ID_ADDR) = (__u16) ID_CMD; - flashtest /* protected verify */ = *(volatile __u16 *) (info->start[i] + 4); - *(volatile __u16 *) (info->start[i] + ID_ADDR) = (__u16) RESET_CMD; - if (flashtest & 0x0001) { - info->protect[i] = 1; /* D0 = 1 if protected */ - } else { - info->protect[i] = 0; - } - } - return (info->size); -} - -/*----------------------------------------------------------------------- - */ -ulong flash_init (void) -{ - ulong size = 0; - int i; - - /* Init: no FLASHes known */ - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { - flash_info[i].flash_id = FLASH_UNKNOWN; - } - - /* Static FLASH Bank configuration here (only one bank) */ - size = flash_get_size (CONFIG_SYS_FLASH_BASE, &flash_info[0]); - - if (flash_info[0].flash_id == FLASH_UNKNOWN || size == 0) { - printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", - size, size >> 20); - } - - /* - * protect monitor and environment sectors - */ - flash_protect (FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]); - - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: - printf ("AMD "); - break; - case FLASH_MAN_FUJ: - printf ("Fujitsu "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AMDL323B: - printf ("29DL323B (32 M, bottom sector)\n"); - break; - case (FLASH_AM160LV | FLASH_AM160B): - printf ("29LV160BE (1M x 16, bottom sector)\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) { - if ((i % 4) == 0) - printf ("\n "); - printf (" S%02d @ 0x%08lX%s", i, - info->start[i], info->protect[i] ? " !" : " "); - } - printf ("\n"); - return; -} - -/*----------------------------------------------------------------------- - */ -int flash_check_protection (flash_info_t * info, int s_first, int s_last) -{ - int sect, prot = 0; - - for (sect = s_first; sect <= s_last; sect++) - if (info->protect[sect]) - prot++; - if (prot) - printf ("- can't erase %d protected sectors\n", prot); - return prot; -} - -/*----------------------------------------------------------------------- - */ -int flash_check_erase_amd (ulong start) -{ - __u16 v1, v2; - - v1 = *(volatile __u16 *) (start); - v2 = *(volatile __u16 *) (start); - - if (((v1 ^ v2) & toggling_bits) == toggling_bits) { - if (((v1 | v2) & DQ5) == DQ5) { - printf ("[DQ5] "); - /* OOPS: exceeded timing limits */ - - v1 = *(volatile __u16 *) (start); - v2 = *(volatile __u16 *) (start); - - if (((v1 ^ v2) & toggling_bits) == toggling_bits) { - - printf ("[%s] ", - ((toggling_bits & (DQ2 | DQ6)) == - (DQ2 | DQ6)) ? "DQ2,DQ6" : "DQ6"); - - /* OOPS: there is an erasure in progress, - * try to reset chip */ - *(volatile __u16 *) (start) = - (__u16) RESET_CMD; - - return 1; /* still busy */ - } - } - return 1; /* still busy */ - } - return 0; /* be free */ -} - -/*----------------------------------------------------------------------- - */ -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - int flag, sect, setup_offset = 0; - int rc = ERR_OK; - ulong start; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - return ERR_UNKNOWN_FLASH_TYPE; - } - - if ((s_first < 0) || (s_first > s_last)) { - printf ("- no sectors to erase\n"); - return ERR_INVAL; - } - - if (flash_check_protection (info, s_first, s_last)) - return ERR_PROTECTED; - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_FUJ: - case FLASH_MAN_AMD: - switch (info->flash_id & FLASH_TYPEMASK) { - case (FLASH_AM160LV | FLASH_AM160B): - setup_offset = UNLOCK_ADDR1; /* just the adress for setup_cmd differs */ - case FLASH_AMDL323B: - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - flag = disable_interrupts (); - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last && !ctrlc (); - sect++) { - printf ("Erasing sector %2d ... ", sect); - - if (info->protect[sect] == 0) { - /* not protected */ - /* Write sector erase command sequence */ - WRITE_UNLOCK (info->start[0]); - *(volatile __u16 *) (info->start[0] + - setup_offset) = - (__u16) SETUP_CMD; - WRITE_UNLOCK (info->start[0]); - *(volatile __u16 *) (info-> - start[sect]) = - (__u16) SECERASE_CMD; - - /* wait some time */ - start = get_timer(0); - while (get_timer(start) < 1000) { - } - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - while (flash_check_erase_amd (info->start[sect])) { - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("timeout!\n"); - /* OOPS: reach timeout, - * try to reset chip - */ - *(volatile __u16 *) (info-> start[sect]) = (__u16) RESET_CMD; - rc = ERR_TIMOUT; - goto outahere_323B; - } - } - printf ("ok.\n"); - } else { - printf ("protected!\n"); - } - } - if (ctrlc ()) - printf ("User Interrupt!\n"); -outahere_323B: - /* allow flash to settle - wait 10 ms */ - udelay_masked (10000); - if (flag) - enable_interrupts (); - return rc; - default: - printf ("- unknown chip type\n"); - return ERR_UNKNOWN_FLASH_TYPE; - } - break; - default: - printf ("- unknown vendor "); - return ERR_UNKNOWN_FLASH_VENDOR; - } -} - -/*----------------------------------------------------------------------- - */ -int flash_check_write_amd (ulong dest) -{ - __u16 v1, v2; - - v1 = *(volatile __u16 *) (dest); - v2 = *(volatile __u16 *) (dest); - - /* DQ6 toggles during write */ - if (((v1 ^ v2) & DQ6) == DQ6) { - if (((v1 | v2) & DQ5) == DQ5) { - printf ("[DQ5] @ %08lX\n", dest); - - /* OOPS: exceeded timing limits, - * try to reset chip */ - *(volatile __u16 *) (dest) = (__u16) RESET_CMD; - return 0; /* be free */ - } - return 1; /* still busy */ - } - - return 0; /* be free */ -} - -/*----------------------------------------------------------------------- - * Copy memory to flash - */ -static int write_word (flash_info_t * info, ulong dest, ushort data) -{ - int rc = ERR_OK; - int flag; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*(__u16 *) (dest) & data) != data) - return ERR_NOT_ERASED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - flag = disable_interrupts (); - - /* Write program command sequence */ - WRITE_UNLOCK (info->start[0]); - - /* Flash dependend program seqence */ - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_FUJ: - case FLASH_MAN_AMD: - switch (info->flash_id & FLASH_TYPEMASK) { - case (FLASH_AM160LV | FLASH_AM160B): - *(volatile __u16 *) (info->start[0] + UNLOCK_ADDR1) = - (__u16) PROG_CMD; - *(volatile __u16 *) (dest) = (__u16) data; - break; - case FLASH_AMDL323B: - *(volatile __u16 *) (dest) = (__u16) PROG_CMD; - *(volatile __u16 *) (dest) = (__u16) data; - break; - } - } - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - while (flash_check_write_amd (dest)) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - printf ("timeout! @ %08lX\n", dest); - /* OOPS: reach timeout, - * try to reset chip */ - *(volatile __u16 *) (dest) = (__u16) RESET_CMD; - - rc = ERR_TIMOUT; - goto outahere_323B; - } - } - - /* Check if Flash was (accurately) written */ - if (*(__u16 *) (dest) != data) - rc = ERR_PROG_ERROR; - -outahere_323B: - if (flag) - enable_interrupts (); - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - */ -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ulong cp, wp; - ushort data; - int l; - int i, rc; - - wp = (addr & ~1); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - for (; i < 2 && cnt > 0; ++i) { - data = (data >> 8) | (*src++ << 8); - --cnt; - ++cp; - } - for (; cnt == 0 && i < 2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - - if ((rc = write_word (info, wp, data)) != 0) { - return (rc); - } - wp += 2; - } - - /* - * handle word aligned part - */ - while (cnt >= 2) { - data = *((ushort *) src); - if ((rc = write_word (info, wp, data)) != 0) - return (rc); - src += 2; - wp += 2; - cnt -= 2; - } - - if (cnt == 0) - return ERR_OK; - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 8); - --cnt; - } - for (; i < 2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *) cp << 8); - } - - return write_word (info, wp, data); -} diff --git a/board/modnet50/lowlevel_init.S b/board/modnet50/lowlevel_init.S deleted file mode 100644 index 52ef2a812f..0000000000 --- a/board/modnet50/lowlevel_init.S +++ /dev/null @@ -1,204 +0,0 @@ -/* - * Memory Setup stuff - taken from Linux - * - * Copyright (c) 2002 Stephan Linz <linz@mazet.de>, <linz@li-pro.net> - * (c) 2004 IMMS gGmbH <www.imms.de>, Thomas Elste <info@elste.org> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <config.h> -#include <version.h> -#include <asm/arch/netarm_registers.h> - - -/* some parameters for the board */ -#define FLASH_90ns_WAIT_STATES ((NETARM_PLL_COUNT_VAL + 2) / 3) -#define FLASH_70ns_WAIT_STATES 4 - -#define NETARM_MMAP_CS0_BASE (PHYS_FLASH_1) -#if 1 -#define NETARM_MMAP_CS0_MASK (~(PHYS_FLASH_1_SIZE - 1)) -#else -#define NETARM_MMAP_CS0_MASK (~(1000000 - 1)) -#endif -#define NETARM_MMAP_CS1_BASE (PHYS_SDRAM_1) -#define NETARM_MMAP_CS1_MASK (~(PHYS_SDRAM_1_SIZE - 1)) -#define NETARM_MMAP_CS2_BASE (PHYS_SDRAM_2) -#define NETARM_MMAP_CS2_MASK (~(PHYS_SDRAM_2_SIZE - 1)) -#if defined(CONFIG_NETARM_EEPROM) && defined(PHYS_NVRAM_1) && defined(PHYS_NVRAM_SIZE) -#define NETARM_MMAP_CS3_BASE (PHYS_NVRAM_1) -#define NETARM_MMAP_CS3_MASK (~(PHYS_NVRAM_SIZE - 1)) -#endif -#define NETARM_MMAP_CS4_BASE (PHYS_EXT_1) -#define NETARM_MMAP_CS4_MASK (~(PHYS_EXT_SIZE - 1)) - -/* setting up the memory */ -.globl lowlevel_init -lowlevel_init: - -#if defined(CONFIG_MODNET50) - ldr pc, =(_jump_to_high + NETARM_MMAP_CS0_BASE - CONFIG_SYS_TEXT_BASE) - -_jump_to_high: - /* - * MEM Config Reg - * --------------------------------------------------- - */ - ldr r0, =NETARM_MEM_MODULE_BASE - ldr r1, =( NETARM_MEM_REFR_PERIOD_USEC(16) | \ - NETARM_MEM_CFG_REFRESH_EN | \ - NETARM_MEM_CFG_REFR_CYCLE_5CLKS ) - str r1, [r0, #+NETARM_MEM_MODULE_CONFIG] - - -memsetup_cs0: - /* - * Base Addr / Option Reg 0 (Flash) - * --------------------------------------------------- - */ - ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS0_BASE) | \ - NETARM_MEM_BAR_DRAM_FP | \ - NETARM_MEM_BAR_DRAM_MUX_INT | \ - NETARM_MEM_BAR_DRAM_MUX_BAL | \ - NETARM_MEM_BAR_VALID ) - str r1, [r0, #+NETARM_MEM_CS0_BASE_ADDR] - - /* trust that the bus size for flash was strapped correctly */ - /* this saves the bus width in r2 and then ORs it back in */ - /* it's pretty safe assumption, otherwise it wouldn't boot */ - ldr r2, [r0, #+NETARM_MEM_CS0_OPTIONS] - and r2, r2, #NETARM_MEM_OPT_BUS_SIZE_MASK - -/* just a test: assume 32 bit flash mem */ -/* mov r2, #NETARM_MEM_OPT_32BIT */ - - ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS0_MASK) | \ - NETARM_MEM_OPT_WAIT_STATES(FLASH_70ns_WAIT_STATES) | \ - NETARM_MEM_OPT_BCYC_4 | \ - NETARM_MEM_OPT_BSIZE_16 | \ - NETARM_MEM_OPT_16BIT | \ - NETARM_MEM_OPT_READ_ASYNC | \ - NETARM_MEM_OPT_WRITE_ASYNC ) - - orr r1, r1, r2 - str r1, [r0, #+NETARM_MEM_CS0_OPTIONS] - - -memsetup_cs1: - /* - * Base Addr / Option Reg 1 (DRAM #1) - * --------------------------------------------------- - */ -#ifdef CONFIG_NETARM_NET40_REV2 - /* we have to config SDRAM in burst mode */ - ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS1_MASK) | \ - NETARM_MEM_OPT_BCYC_2 | \ - NETARM_MEM_OPT_BSIZE_16 | \ - NETARM_MEM_OPT_WAIT_STATES(0) | \ - NETARM_MEM_OPT_32BIT | \ - NETARM_MEM_OPT_READ_ASYNC | \ - NETARM_MEM_OPT_WRITE_ASYNC ) - str r1, [r0, #+NETARM_MEM_CS1_OPTIONS] - - ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS1_BASE) | \ - NETARM_MEM_BAR_DRAM_SYNC | \ - NETARM_MEM_BAR_DRAM_MUX_INT | \ - NETARM_MEM_BAR_DRAM_MUX_UNBAL | \ - NETARM_MEM_BAR_DRAM_SEL | \ - NETARM_MEM_BAR_BURST_EN | \ - NETARM_MEM_BAR_VALID ) - str r1, [r0, #+NETARM_MEM_CS1_BASE_ADDR] -#else - /* we have to config FPDRAM in burst mode with smaller burst access size */ - ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS1_MASK) | \ - NETARM_MEM_OPT_BCYC_2 | \ - NETARM_MEM_OPT_BSIZE_16 | \ - NETARM_MEM_OPT_WAIT_STATES(0) | \ - NETARM_MEM_OPT_32BIT | \ - NETARM_MEM_OPT_READ_ASYNC | \ - NETARM_MEM_OPT_WRITE_ASYNC ) - str r1, [r0, #+NETARM_MEM_CS1_OPTIONS] - - ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS1_BASE) | \ - NETARM_MEM_BAR_DRAM_SYNC | \ - NETARM_MEM_BAR_DRAM_MUX_INT | \ - NETARM_MEM_BAR_DRAM_MUX_UNBAL | \ - NETARM_MEM_BAR_DRAM_SEL | \ - NETARM_MEM_BAR_BURST_EN | \ - NETARM_MEM_BAR_VALID ) - str r1, [r0, #+NETARM_MEM_CS1_BASE_ADDR] - -#endif /* CONFIG_NETARM_NET40_REV2 */ - - -memsetup_cs3: - /* - * Base Addr / Option Reg 3 (EEPROM, NVRAM) - * --------------------------------------------------- - */ -#if defined(CONFIG_NETARM_EEPROM) && defined(PHYS_NVRAM_1) && defined(PHYS_NVRAM_SIZE) - ldr r1, =( NETARM_MEM_OPT_BASE_USE(NETARM_MMAP_CS3_MASK) | \ - NETARM_MEM_OPT_BCYC_3 | \ - NETARM_MEM_OPT_BSIZE_2 | \ - NETARM_MEM_OPT_WAIT_STATES(10) | \ - NETARM_MEM_OPT_8BIT | \ - NETARM_MEM_OPT_READ_ASYNC | \ - NETARM_MEM_OPT_WRITE_ASYNC ) - str r1, [r0, #+NETARM_MEM_CS3_OPTIONS] - - ldr r1, =( NETARM_MEM_BAR_BASE(NETARM_MMAP_CS3_BASE) | \ - NETARM_MEM_BAR_DRAM_FP | \ - NETARM_MEM_BAR_DRAM_MUX_INT | \ - NETARM_MEM_BAR_DRAM_MUX_BAL | \ - NETARM_MEM_BAR_VALID ) - str r1, [r0, #+NETARM_MEM_CS3_BASE_ADDR] -#else - /* we don't need EEPROM --> no config */ - ldr r1, =( 0 ) - str r1, [r0, #+NETARM_MEM_CS3_OPTIONS] - - ldr r1, =( 0 ) - str r1, [r0, #+NETARM_MEM_CS3_BASE_ADDR] -#endif - - -#else -/* -#error "missing CONFIG_MODNET50 (see your config.h)" -*/ -#endif /* CONFIG_MODNET50 */ - - -lowlevel_init_end: - /* - * manipulate address in lr and ip to match new - * address space - */ - ldr r3, =(NETARM_MMAP_CS0_BASE) - mov r0, lr - add r0, r3, r0 - mov lr, r0 - mov r0, ip - add r0, r3, r0 - mov ip, r0 - - /* everything is fine now */ - mov pc, lr diff --git a/board/modnet50/modnet50.c b/board/modnet50/modnet50.c deleted file mode 100644 index 4544069c2f..0000000000 --- a/board/modnet50/modnet50.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* address for the kernel command line */ - gd->bd->bi_boot_params = 0x800; - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - if (CONFIG_NR_DRAM_BANKS == 2) { - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; - } - return (0); -} diff --git a/board/nvidia/harmony/Makefile b/board/nvidia/harmony/Makefile index 9fb6b575a8..ebd8e02ab9 100644 --- a/board/nvidia/harmony/Makefile +++ b/board/nvidia/harmony/Makefile @@ -24,6 +24,10 @@ include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif + LIB = $(obj)lib$(BOARD).o COBJS := $(BOARD).o diff --git a/board/nvidia/seaboard/Makefile b/board/nvidia/seaboard/Makefile index 9fb6b575a8..ebd8e02ab9 100644 --- a/board/nvidia/seaboard/Makefile +++ b/board/nvidia/seaboard/Makefile @@ -24,6 +24,10 @@ include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif + LIB = $(obj)lib$(BOARD).o COBJS := $(BOARD).o diff --git a/board/prodrive/alpr/fpga.c b/board/prodrive/alpr/fpga.c index 93f2449a1b..e7686ad27b 100644 --- a/board/prodrive/alpr/fpga.c +++ b/board/prodrive/alpr/fpga.c @@ -39,24 +39,24 @@ DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_FPGA) #ifdef FPGA_DEBUG -#define PRINTF(fmt,args...) printf (fmt ,##args) +#define PRINTF(fmt, args...) printf(fmt , ##args) #else -#define PRINTF(fmt,args...) +#define PRINTF(fmt, args...) #endif static unsigned long regval; -#define SET_GPIO_REG_0(reg, bit) { \ +#define SET_GPIO_REG_0(reg, bit) do { \ regval = in32(reg); \ regval &= ~(0x80000000 >> bit); \ out32(reg, regval); \ - } + } while (0) -#define SET_GPIO_REG_1(reg, bit) { \ +#define SET_GPIO_REG_1(reg, bit) do { \ regval = in32(reg); \ regval |= (0x80000000 >> bit); \ out32(reg, regval); \ - } + } while (0) #define SET_GPIO_0(bit) SET_GPIO_REG_0(GPIO0_OR, bit) #define SET_GPIO_1(bit) SET_GPIO_REG_1(GPIO0_OR, bit) @@ -69,19 +69,21 @@ static unsigned long regval; #define SET_FPGA(data) out32(GPIO0_OR, data) -#define FPGA_WRITE_1 { \ - SET_FPGA(OLD_VAL | 0 | FPGA_DATA); /* set data to 1 */ \ - SET_FPGA(OLD_VAL | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ +#define FPGA_WRITE_1 do { \ + SET_FPGA(OLD_VAL | 0 | FPGA_DATA); /* set data to 1 */ \ + SET_FPGA(OLD_VAL | FPGA_CLK | FPGA_DATA); /* set data to 1 */ \ +} while (0) -#define FPGA_WRITE_0 { \ - SET_FPGA(OLD_VAL | 0 | 0 ); /* set data to 0 */ \ - SET_FPGA(OLD_VAL | FPGA_CLK | 0 );} /* set data to 1 */ +#define FPGA_WRITE_0 do { \ + SET_FPGA(OLD_VAL | 0 | 0); /* set data to 0 */ \ + SET_FPGA(OLD_VAL | FPGA_CLK | 0); /* set data to 1 */ \ +} while (0) /* Plattforminitializations */ /* Here we have to set the FPGA Chain */ /* PROGRAM_PROG_EN = HIGH */ /* PROGRAM_SEL_DPR = LOW */ -int fpga_pre_fn (int cookie) +int fpga_pre_fn(int cookie) { unsigned long reg; @@ -128,23 +130,23 @@ int fpga_pre_fn (int cookie) } /* Set the state of CONFIG Pin */ -int fpga_config_fn (int assert_config, int flush, int cookie) +int fpga_config_fn(int assert_config, int flush, int cookie) { - if (assert_config) { + if (assert_config) SET_GPIO_1(CONFIG_SYS_GPIO_CONFIG); - } else { + else SET_GPIO_0(CONFIG_SYS_GPIO_CONFIG); - } + return FPGA_SUCCESS; } /* Returns the state of STATUS Pin */ -int fpga_status_fn (int cookie) +int fpga_status_fn(int cookie) { unsigned long reg; reg = in32(GPIO0_IR); - if (reg &= (0x80000000 >> CONFIG_SYS_GPIO_STATUS)) { + if (reg & (0x80000000 >> CONFIG_SYS_GPIO_STATUS)) { PRINTF("STATUS = HIGH\n"); return FPGA_FAIL; } @@ -153,11 +155,11 @@ int fpga_status_fn (int cookie) } /* Returns the state of CONF_DONE Pin */ -int fpga_done_fn (int cookie) +int fpga_done_fn(int cookie) { unsigned long reg; reg = in32(GPIO0_IR); - if (reg &= (0x80000000 >> CONFIG_SYS_GPIO_CON_DON)) { + if (reg & (0x80000000 >> CONFIG_SYS_GPIO_CON_DON)) { PRINTF("CONF_DON = HIGH\n"); return FPGA_FAIL; } @@ -168,11 +170,11 @@ int fpga_done_fn (int cookie) /* writes the complete buffer to the FPGA writing the complete buffer in one function is much faster, then calling it for every bit */ -int fpga_write_fn (void *buf, size_t len, int flush, int cookie) +int fpga_write_fn(const void *buf, size_t len, int flush, int cookie) { size_t bytecount = 0; unsigned char *data = (unsigned char *) buf; - unsigned char val=0; + unsigned char val = 0; int i; int len_40 = len / 40; @@ -180,20 +182,20 @@ int fpga_write_fn (void *buf, size_t len, int flush, int cookie) val = data[bytecount++]; i = 8; do { - if (val & 0x01) { + if (val & 0x01) FPGA_WRITE_1; - } else { + else FPGA_WRITE_0; - } + val >>= 1; - i --; + i--; } while (i > 0); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK if (bytecount % len_40 == 0) { - putc ('.'); /* let them know we are alive */ + putc('.'); /* let them know we are alive */ #ifdef CONFIG_SYS_FPGA_CHECK_CTRLC - if (ctrlc ()) + if (ctrlc()) return FPGA_FAIL; #endif } @@ -203,16 +205,16 @@ int fpga_write_fn (void *buf, size_t len, int flush, int cookie) } /* called, when programming is aborted */ -int fpga_abort_fn (int cookie) +int fpga_abort_fn(int cookie) { SET_GPIO_1((CONFIG_SYS_GPIO_SEL_DPR)); return FPGA_SUCCESS; } /* called, when programming was succesful */ -int fpga_post_fn (int cookie) +int fpga_post_fn(int cookie) { - return fpga_abort_fn (cookie); + return fpga_abort_fn(cookie); } /* Note that these are pointers to code that is in Flash. They will be @@ -240,16 +242,16 @@ Altera_desc fpga[CONFIG_FPGA_COUNT] = { /* * Initialize the fpga. Return 1 on success, 0 on failure. */ -int alpr_fpga_init (void) +int alpr_fpga_init(void) { int i; - PRINTF ("%s:%d: Initialize FPGA interface\n", __FUNCTION__, __LINE__); - fpga_init (); + PRINTF("%s:%d: Initialize FPGA interface\n", __func__, __LINE__); + fpga_init(); for (i = 0; i < CONFIG_FPGA_COUNT; i++) { - PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i); - fpga_add (fpga_altera, &fpga[i]); + PRINTF("%s:%d: Adding fpga %d\n", __func__, __LINE__, i); + fpga_add(fpga_altera, &fpga[i]); } return 1; } diff --git a/board/shannon/Makefile b/board/shannon/Makefile deleted file mode 100644 index 23ac9871c7..0000000000 --- a/board/shannon/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := shannon.o flash.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/shannon/config.mk b/board/shannon/config.mk deleted file mode 100644 index 6afa2d3c7d..0000000000 --- a/board/shannon/config.mk +++ /dev/null @@ -1,23 +0,0 @@ -# -# LART board with SA1100 cpu -# -# see http://www.lart.tudelft.nl/ for more information on LART -# - -# -# Tuxscreen has 4 banks of 4 MB DRAM each -# -# c000'0000 -# c800'0000 -# d000'0000 -# d800'0000 -# -# Linux-Kernel is expected to be at c000'8000, entry c000'8000 -# -# we load ourself to d838'0000, the upper 1 MB of the last (4th) bank -# -# download areas is c800'0000 -# - - -CONFIG_SYS_TEXT_BASE = 0xd8380000 diff --git a/board/shannon/flash.c b/board/shannon/flash.c deleted file mode 100644 index 179ec5f036..0000000000 --- a/board/shannon/flash.c +++ /dev/null @@ -1,475 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -ulong myflush(void); - - -#define FLASH_BANK_SIZE 0x400000 /* 4 MB */ -#define MAIN_SECT_SIZE 0x20000 /* 128 KB */ - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - - -#define CMD_READ_ARRAY 0x00F000F0 -#define CMD_UNLOCK1 0x00AA00AA -#define CMD_UNLOCK2 0x00550055 -#define CMD_ERASE_SETUP 0x00800080 -#define CMD_ERASE_CONFIRM 0x00300030 -#define CMD_PROGRAM 0x00A000A0 -#define CMD_UNLOCK_BYPASS 0x00200020 - -#define MEM_FLASH_ADDR1 (*(volatile u32 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 2))) -#define MEM_FLASH_ADDR2 (*(volatile u32 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 2))) - -#define BIT_ERASE_DONE 0x00800080 -#define BIT_RDY_MASK 0x00800080 -#define BIT_PROGRAM_ERROR 0x00200020 -#define BIT_TIMEOUT 0x80000000 /* our flag */ - -#define READY 1 -#define ERR 2 -#define TMO 4 - -/*----------------------------------------------------------------------- - */ - -ulong flash_init(void) -{ - int i, j; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) - { - ulong flashbase = 0; - flash_info[i].flash_id = - (AMD_MANUFACT & FLASH_VENDMASK) | - (AMD_ID_LV160B & FLASH_TYPEMASK); - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - if (i == 0) - flashbase = PHYS_FLASH_1; - else - panic("configured too many flash banks!\n"); - for (j = 0; j < flash_info[i].sector_count; j++) - { - - if (j <= 3) - { - /* 1st one is 32 KB */ - if (j == 0) - { - flash_info[i].start[j] = flashbase + 0; - } - - /* 2nd and 3rd are both 16 KB */ - if ((j == 1) || (j == 2)) - { - flash_info[i].start[j] = flashbase + 0x8000 + (j-1)*0x4000; - } - - /* 4th 64 KB */ - if (j == 3) - { - flash_info[i].start[j] = flashbase + 0x10000; - } - } - else - { - flash_info[i].start[j] = flashbase + (j - 3)*MAIN_SECT_SIZE; - } - } - size += flash_info[i].size; - } - - /* - * Protect monitor and environment sectors - * Inferno is complicated, it's hardware locked - */ -#ifdef CONFIG_INFERNO - /* first one, 0x00000 to 0x07fff */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE + 0x00000, - CONFIG_SYS_FLASH_BASE + 0x08000 - 1, - &flash_info[0]); - - /* third to 10th, 0x0c000 - 0xdffff */ - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE + 0x0c000, - CONFIG_SYS_FLASH_BASE + 0xe0000 - 1, - &flash_info[0]); -#else - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); -#endif - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t *info) -{ - int i; - - switch (info->flash_id & FLASH_VENDMASK) - { - case (AMD_MANUFACT & FLASH_VENDMASK): - printf("AMD: "); - break; - default: - printf("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) - { - case (AMD_ID_LV160B & FLASH_TYPEMASK): - printf("2x Amd29F160BB (16Mbit)\n"); - break; - default: - printf("Unknown Chip Type\n"); - goto Done; - break; - } - - printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf(" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) - { - if ((i % 5) == 0) - { - printf ("\n "); - } - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - -Done: - ; -} - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - ulong result; - int iflag, cflag, prot, sect; - int rc = ERR_OK; - int chip1, chip2; - ulong start; - - /* first look for protection bits */ - - if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; - - if ((s_first < 0) || (s_first > s_last)) { - return ERR_INVAL; - } - - if ((info->flash_id & FLASH_VENDMASK) != - (AMD_MANUFACT & FLASH_VENDMASK)) { - return ERR_UNKNOWN_FLASH_VENDOR; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - if (prot) - return ERR_PROTECTED; - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - cflag = icache_status(); - icache_disable(); - iflag = disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last && !ctrlc(); sect++) - { - printf("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - if (info->protect[sect] == 0) - { /* not protected */ - vu_long *addr = (vu_long *)(info->start[sect]); - - MEM_FLASH_ADDR1 = CMD_UNLOCK1; - MEM_FLASH_ADDR2 = CMD_UNLOCK2; - MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; - - MEM_FLASH_ADDR1 = CMD_UNLOCK1; - MEM_FLASH_ADDR2 = CMD_UNLOCK2; - *addr = CMD_ERASE_CONFIRM; - - /* wait until flash is ready */ - chip1 = chip2 = 0; - - do - { - result = *addr; - - /* check timeout */ - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) - { - MEM_FLASH_ADDR1 = CMD_READ_ARRAY; - chip1 = TMO; - break; - } - - if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE) - chip1 = READY; - - if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR) - chip1 = ERR; - - if (!chip2 && (result >> 16) & BIT_ERASE_DONE) - chip2 = READY; - - if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR) - chip2 = ERR; - - } while (!chip1 || !chip2); - - MEM_FLASH_ADDR1 = CMD_READ_ARRAY; - - if (chip1 == ERR || chip2 == ERR) - { - rc = ERR_PROG_ERROR; - goto outahere; - } - if (chip1 == TMO) - { - rc = ERR_TIMOUT; - goto outahere; - } - - printf("ok.\n"); - } - else /* it was protected */ - { - printf("protected!\n"); - } - } - - if (ctrlc()) - printf("User Interrupt!\n"); - -outahere: - /* allow flash to settle - wait 10 ms */ - udelay_masked(10000); - - if (iflag) - enable_interrupts(); - - if (cflag) - icache_enable(); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash - */ - -static int write_word (flash_info_t *info, ulong dest, ulong data) -{ - vu_long *addr = (vu_long *)dest; - ulong result; - int rc = ERR_OK; - int cflag, iflag; - int chip1, chip2; - ulong start; - - /* - * Check if Flash is (sufficiently) erased - */ - result = *addr; - if ((result & data) != data) - return ERR_NOT_ERASED; - - - /* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - cflag = icache_status(); - icache_disable(); - iflag = disable_interrupts(); - - MEM_FLASH_ADDR1 = CMD_UNLOCK1; - MEM_FLASH_ADDR2 = CMD_UNLOCK2; - MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS; - *addr = CMD_PROGRAM; - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait until flash is ready */ - chip1 = chip2 = 0; - do - { - result = *addr; - - /* check timeout */ - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) - { - chip1 = ERR | TMO; - break; - } - if (!chip1 && ((result & 0x80) == (data & 0x80))) - chip1 = READY; - - if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) - { - result = *addr; - - if ((result & 0x80) == (data & 0x80)) - chip1 = READY; - else - chip1 = ERR; - } - - if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16)))) - chip2 = READY; - - if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR)) - { - result = *addr; - - if ((result & (0x80 << 16)) == (data & (0x80 << 16))) - chip2 = READY; - else - chip2 = ERR; - } - - } while (!chip1 || !chip2); - - *addr = CMD_READ_ARRAY; - - if (chip1 == ERR || chip2 == ERR || *addr != data) - rc = ERR_PROG_ERROR; - - if (iflag) - enable_interrupts(); - - if (cflag) - icache_enable(); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp, data; - int l; - int i, rc; - - wp = (addr & ~3); /* get lower word aligned address */ - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i<l; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 24); - } - for (; i<4 && cnt>0; ++i) { - data = (data >> 8) | (*src++ << 24); - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 24); - } - - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - } - - /* - * handle word aligned part - */ - while (cnt >= 4) { - data = *((vu_long*)src); - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - src += 4; - wp += 4; - cnt -= 4; - } - - if (cnt == 0) { - return ERR_OK; - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 24); - --cnt; - } - for (; i<4; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 24); - } - - return write_word(info, wp, data); -} diff --git a/board/shannon/inferno.header b/board/shannon/inferno.header Binary files differdeleted file mode 100644 index 28ee85afd1..0000000000 --- a/board/shannon/inferno.header +++ /dev/null diff --git a/board/shannon/lowlevel_init.S b/board/shannon/lowlevel_init.S deleted file mode 100644 index 0655c42d3b..0000000000 --- a/board/shannon/lowlevel_init.S +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Memory Setup stuff - taken from blob memsetup.S - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <config.h> -#include <version.h> - - -/* some parameters for the board */ - -MEM_BASE: .long 0xa0000000 -MEM_START: .long 0xc0000000 - -#define MDCNFG 0x00 -#define MDCAS0 0x04 -#define MDCAS1 0x08 -#define MDCAS2 0x0c -#define MSC0 0x10 -#define MSC1 0x14 -#define MECR 0x18 - -mdcas0: .long 0xc71c703f @ cccccccf -mdcas1: .long 0xffc71c71 @ fffffffc -mdcas2: .long 0xffffffff @ ffffffff -mdcnfg: .long 0x0334b21f @ 9326991f -msc0: .long 0xfff84458 @ 42304230 -msc1: .long 0xffffffff @ 20182018 -mecr: .long 0x7fff7fff @ 01000000 - -/* setting up the memory */ - -.globl lowlevel_init -lowlevel_init: - ldr r0, MEM_BASE - - /* Setup the flash memory */ - ldr r1, msc0 - str r1, [r0, #MSC0] - - /* Set up the DRAM */ - - /* MDCAS0 */ - ldr r1, mdcas0 - str r1, [r0, #MDCAS0] - - /* MDCAS1 */ - ldr r1, mdcas1 - str r1, [r0, #MDCAS1] - - /* MDCAS2 */ - ldr r1, mdcas2 - str r1, [r0, #MDCAS2] - - /* MDCNFG */ - ldr r1, mdcnfg - str r1, [r0, #MDCNFG] - - /* Set up PCMCIA space */ - ldr r1, mecr - str r1, [r0, #MECR] - - /* Load something to activate bank */ - ldr r1, MEM_START - -.rept 8 - ldr r0, [r1] -.endr - - /* everything is fine now */ - mov pc, lr diff --git a/board/shannon/shannon.c b/board/shannon/shannon.c deleted file mode 100644 index 8cd1fc34c6..0000000000 --- a/board/shannon/shannon.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* memory and cpu-speed are setup before relocation */ - /* but if we use InfernoLoader, we must do some inits here */ - -#ifdef CONFIG_INFERNO - { - unsigned long temp; - __asm__ __volatile__(/* disable MMU, enable icache */ - "mrc p15, 0, %0, c1, c0\n" - "bic %0, %0, #0x00002000\n" - "bic %0, %0, #0x0000000f\n" - "orr %0, %0, #0x00001000\n" - "orr %0, %0, #0x00000002\n" - "mcr p15, 0, %0, c1, c0\n" - /* flush caches */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c7, 0\n" - "mcr p15, 0, %0, c8, c7, 0\n" - : "=r" (temp) - : - : "memory"); - /* setup PCMCIA timing */ - temp = 0xa0000018; - *(unsigned long *)temp = 0x00060006; - - } -#endif /* CONFIG_INFERNO */ - - /* arch number for shannon */ - gd->bd->bi_arch_number = MACH_TYPE_SHANNON; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0xc0000100; - - return 0; -} - -int dram_init (void) -{ -#if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \ - defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4) - bd_t *bd = gd->bd; -#endif - -#ifdef PHYS_SDRAM_1 - bd->bi_dram[0].start = PHYS_SDRAM_1; - bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -#endif - -#ifdef PHYS_SDRAM_2 - bd->bi_dram[1].start = PHYS_SDRAM_2; - bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif - -#ifdef PHYS_SDRAM_3 - bd->bi_dram[2].start = PHYS_SDRAM_3; - bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; -#endif - -#ifdef PHYS_SDRAM_4 - bd->bi_dram[3].start = PHYS_SDRAM_4; - bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; -#endif - - return (0); -} diff --git a/board/siemens/SMN42/Makefile b/board/siemens/SMN42/Makefile deleted file mode 100644 index c054a3eb07..0000000000 --- a/board/siemens/SMN42/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2007 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := flash.o smn42.o -SOBJTS := lowlevel_init.o - -SRCS := $(SOBJTS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJTS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/siemens/SMN42/config.mk b/board/siemens/SMN42/config.mk deleted file mode 100644 index 48917928e1..0000000000 --- a/board/siemens/SMN42/config.mk +++ /dev/null @@ -1,30 +0,0 @@ -# -# (C) Copyright 2000 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger@sysgo.de> -# -# (C) Copyright 2000 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -#address where u-boot will be relocated -#CONFIG_SYS_TEXT_BASE = 0x0 -CONFIG_SYS_TEXT_BASE = 0x81500000 diff --git a/board/siemens/SMN42/flash.c b/board/siemens/SMN42/flash.c deleted file mode 100644 index fc91574f85..0000000000 --- a/board/siemens/SMN42/flash.c +++ /dev/null @@ -1,475 +0,0 @@ -/* - * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com> - * - * (C) Copyright 2007 Gary Jennejohn garyj@denx.de - * Modified to use the routines in arch/arm/cpu/arm720t/lpc2292/flash.c. - * Heavily modified to support the SMN42 board from Siemens - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/byteorder.h> -#include <asm/arch/hardware.h> - -static unsigned long flash_addr_table[CONFIG_SYS_MAX_FLASH_BANKS] = CONFIG_SYS_FLASH_BANKS_LIST; -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; - -extern int lpc2292_copy_buffer_to_flash(flash_info_t *, ulong); -extern int lpc2292_flash_erase(flash_info_t *, int, int); -extern int lpc2292_write_buff (flash_info_t *, uchar *, ulong, ulong); -static unsigned long ext_flash_init(void); -static int ext_flash_erase(flash_info_t *, int, int); -static int ext_write_buff(flash_info_t *, uchar *, ulong, ulong); - -/*----------------------------------------------------------------------- - */ - -ulong flash_init (void) -{ - int j, k; - ulong size = 0; - ulong flashbase = 0; - - flash_info[0].flash_id = PHILIPS_LPC2292; - flash_info[0].size = 0x003E000; /* 256 - 8 KB */ - flash_info[0].sector_count = 17; - memset (flash_info[0].protect, 0, 17); - flashbase = 0x00000000; - for (j = 0, k = 0; j < 8; j++, k++) { - flash_info[0].start[k] = flashbase; - flashbase += 0x00002000; - } - for (j = 0; j < 2; j++, k++) { - flash_info[0].start[k] = flashbase; - flashbase += 0x00010000; - } - for (j = 0; j < 7; j++, k++) { - flash_info[0].start[k] = flashbase; - flashbase += 0x00002000; - } - size += flash_info[0].size; - - /* Protect monitor and environment sectors */ - flash_protect (FLAG_PROTECT_SET, - 0x0, - 0x0 + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect (FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); - - size += ext_flash_init(); - - return size; -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t * info) -{ - int i; - int erased = 0; - unsigned long j; - unsigned long count; - unsigned char *p; - - switch (info->flash_id & FLASH_VENDMASK) { - case (PHILIPS_LPC2292 & FLASH_VENDMASK): - printf("Philips: "); - break; - case FLASH_MAN_AMD: - printf("AMD: "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case (PHILIPS_LPC2292 & FLASH_TYPEMASK): - printf("LPC2292 internal flash\n"); - break; - case FLASH_S29GL128N: - printf ("S29GL128N (128 Mbit, uniform sector size)\n"); - break; - default: - printf("Unknown Chip Type\n"); - return; - } - - printf (" Size: %ld KB in %d Sectors\n", - info->size >> 10, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) { - printf ("\n "); - } - if (i < (info->sector_count - 1)) { - count = info->start[i+1] - info->start[i]; - } - else { - count = info->start[0] + info->size - info->start[i]; - } - p = (unsigned char*)(info->start[i]); - erased = 1; - for (j = 0; j < count; j++) { - if (*p != 0xFF) { - erased = 0; - break; - } - p++; - } - printf (" %08lX%s%s", info->start[i], info->protect[i] ? " RO" : " ", - erased ? " E" : " "); - } - printf ("\n"); -} - -int flash_erase (flash_info_t * info, int s_first, int s_last) -{ - switch (info->flash_id & FLASH_TYPEMASK) { - case (PHILIPS_LPC2292 & FLASH_TYPEMASK): - return lpc2292_flash_erase(info, s_first, s_last); - case FLASH_S29GL128N: - return ext_flash_erase(info, s_first, s_last); - default: - return ERR_PROTECTED; - } - return ERR_PROTECTED; -} - -int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - switch (info->flash_id & FLASH_TYPEMASK) { - case (PHILIPS_LPC2292 & FLASH_TYPEMASK): - return lpc2292_write_buff(info, src, addr, cnt); - case FLASH_S29GL128N: - return ext_write_buff(info, src, addr, cnt); - default: - return ERR_PROG_ERROR; - } - return ERR_PROG_ERROR; -} - -/*-------------------------------------------------------------------------- - * From here on is code for the external S29GL128N taken from cam5200_flash.c - */ - -#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short - -static int wait_for_DQ7_32(flash_info_t * info, int sect) -{ - ulong start, now, last; - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = - (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]); - - start = get_timer(0); - last = start; - while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) != - (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) { - if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf("Timeout\n"); - return -1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc('.'); - last = now; - } - } - return 0; -} - -int ext_flash_erase(flash_info_t * info, int s_first, int s_last) -{ - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]); - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2; - int flag, prot, sect, l_sect, ret; - - ret = 0; - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) - printf("- missing\n"); - else - printf("- no sectors to erase\n"); - return 1; - } - - if (info->flash_id == FLASH_UNKNOWN) { - printf("Can't erase unknown flash type - aborted\n"); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) - prot++; - } - - if (prot) - printf("- Warning: %d protected sectors will not be erased!", prot); - - printf("\n"); - - l_sect = -1; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]); - - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA; - addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055; - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080; - addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA; - addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055; - addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */ - - l_sect = sect; - /* - * Wait for each sector to complete, it's more - * reliable. According to AMD Spec, you must - * issue all erase commands within a specified - * timeout. This has been seen to fail, especially - * if printf()s are included (for debug)!! - */ - ret = wait_for_DQ7_32(info, sect); - if (ret) { - ret = ERR_PROTECTED; - break; - } - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay(1000); - - /* reset to read mode */ - addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0]; - addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */ - - if (ret) - printf(" error\n"); - else - printf(" done\n"); - return ret; -} - -static ulong flash_get_size(vu_long * addr, flash_info_t * info) -{ - short i; - CONFIG_SYS_FLASH_WORD_SIZE value; - ulong base = (ulong) addr; - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr; - - /* Write auto select command: read Manufacturer ID */ - addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA; - addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055; - addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090; - udelay(1000); - - value = addr2[0]; - - switch (value) { - case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ - } - - value = addr2[1]; /* device ID */ - - switch (value) { - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_MIRROR: - value = addr2[14]; - switch(value) { - case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_GL128N_2: - value = addr2[15]; - if (value != (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_GL128N_3) { - info->flash_id = FLASH_UNKNOWN; - } else { - info->flash_id += FLASH_S29GL128N; - info->sector_count = 128; - info->size = 0x01000000; - } - break; - default: - info->flash_id = FLASH_UNKNOWN; - return(0); - } - break; - - default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ - } - - /* set up sector start address table */ - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00020000); - - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]); - - info->protect[i] = addr2[2] & 1; - } - - /* issue bank reset to return to read mode */ - addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; - - return (info->size); -} - -static unsigned long ext_flash_init(void) -{ - unsigned long total_b = 0; - unsigned long size_b[CONFIG_SYS_MAX_FLASH_BANKS]; - int i; - - /* Init: no FLASHes known */ - for (i = 1; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { - flash_info[i].flash_id = FLASH_UNKNOWN; - flash_info[i].sector_count = -1; - flash_info[i].size = 0; - - /* call flash_get_size() to initialize sector address */ - size_b[i] = flash_get_size((vu_long *) flash_addr_table[i], - &flash_info[i]); - - flash_info[i].size = size_b[i]; - - if (flash_info[i].flash_id == FLASH_UNKNOWN) { - printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", - i+1, size_b[i], size_b[i] << 20); - flash_info[i].sector_count = -1; - flash_info[i].size = 0; - } - - total_b += flash_info[i].size; - } - - return total_b; -} - -static int write_word(flash_info_t * info, ulong dest, ushort data) -{ - volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]); - volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *) dest; - volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *) &data; - ulong start; - int flag; - - /* Check if Flash is (sufficiently) erased */ - if ((*dest2 & *data2) != *data2) { - return (2); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA; - addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055; - addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0; - *dest2 = *data2; - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* data polling for D7 */ - start = get_timer(0); - while ((*dest2 & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) != - (*data2 & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) { - - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - printf("WRITE_TOUT\n"); - return (1); - } - } - return (0); -} - -/*----------------------------------------------------------------------- - * This is taken from the original flash.c for the LPC2292 SODIMM board - * and modified to suit. - */ - -int ext_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt) -{ - ushort tmp; - ulong i; - uchar* src_org; - uchar* dst_org; - ulong cnt_org = cnt; - int ret = ERR_OK; - - src_org = src; - dst_org = (uchar*)addr; - - if (addr & 1) { /* if odd address */ - tmp = *((uchar*)(addr - 1)); /* little endian */ - tmp |= (*src << 8); - if (write_word(info, addr - 1, tmp)) - return ERR_PROG_ERROR; - addr += 1; - cnt -= 1; - src++; - } - while (cnt > 1) { - tmp = ((*(src+1)) << 8) + (*src); /* little endian */ - if (write_word(info, addr, tmp)) - return ERR_PROG_ERROR; - addr += 2; - src += 2; - cnt -= 2; - } - if (cnt > 0) { - tmp = (*((uchar*)(addr + 1))) << 8; - tmp |= *src; - if (write_word(info, addr, tmp)) - return ERR_PROG_ERROR; - } - - for (i = 0; i < cnt_org; i++) { - if (*dst_org != *src_org) { - printf("Write failed. Byte %lX differs\n", i); - ret = ERR_PROG_ERROR; - break; - } - dst_org++; - src_org++; - } - - return ret; -} diff --git a/board/siemens/SMN42/lowlevel_init.S b/board/siemens/SMN42/lowlevel_init.S deleted file mode 100644 index 44e209b5de..0000000000 --- a/board/siemens/SMN42/lowlevel_init.S +++ /dev/null @@ -1,123 +0,0 @@ -/* - * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com> - * - * Slight modifications made to support the SMN42 board from Siemens. - * 2007 Gary Jennejohn garyj@denx.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <version.h> -#include <asm/arch/hardware.h> - -/* some parameters for the board */ -/* setting up the CPU-internal memory */ -#define SRAM_START 0x40000000 -#define SRAM_SIZE 0x00004000 -#define BCFG0_VALUE 0x1000ffef -#define BCFG1_VALUE 0x10005D2F -#define BCFG2_VALUE 0x10005D2F -/* - * For P0.18 to set ZZ to the SRAMs to 1. Also set P0.2 (SCL) and P0.3 (SDA) - * for the bit-banger I2C driver correctly. - */ -#define IO0_VALUE 0x4000C - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE -MEMMAP_ADR: - .word MEMMAP -BCFG0_ADR: - .word BCFG0 -_BCFG0_VALUE: - .word BCFG0_VALUE -BCFG1_ADR: - .word BCFG1 -_BCFG1_VALUE: - .word BCFG1_VALUE -BCFG2_ADR: - .word BCFG2 -_BCFG2_VALUE: - .word BCFG2_VALUE -IO0DIR_ADR: - .word IO0DIR -_IO0DIR_VALUE: - .word IO0_VALUE -IO0SET_ADR: - .word IO0SET -_IO0SET_VALUE: - .word IO0_VALUE -PINSEL2_ADR: - .word PINSEL2 -PINSEL2_MASK: - .word 0x00000000 -PINSEL2_VALUE: - .word 0x0F804914 - -.extern _start - -.globl lowlevel_init -lowlevel_init: - /* set up memory control register for bank 0 */ - ldr r0, _BCFG0_VALUE - ldr r1, BCFG0_ADR - str r0, [r1] - - /* set up memory control register for bank 1 */ - ldr r0, _BCFG1_VALUE - ldr r1, BCFG1_ADR - str r0, [r1] - - /* set up memory control register for bank 2 */ - ldr r0, _BCFG2_VALUE - ldr r1, BCFG2_ADR - str r0, [r1] - - /* set IO0DIR to make P0.2, P0.3 and P0.18 outputs */ - ldr r0, _IO0DIR_VALUE - ldr r1, IO0DIR_ADR - str r0, [r1] - - /* set P0.18 to 1 */ - ldr r0, _IO0SET_VALUE - ldr r1, IO0SET_ADR - str r0, [r1] - - /* set up PINSEL2 for bus-pins */ - ldr r0, PINSEL2_ADR - ldr r1, [r0] - ldr r2, PINSEL2_MASK - ldr r3, PINSEL2_VALUE - and r1, r1, r2 - orr r1, r1, r3 - str r1, [r0] - - /* move vectors to beginning of SRAM */ - mov r2, #SRAM_START - mov r0, #0 /*_start*/ - ldmneia r0!, {r3-r10} - stmneia r2!, {r3-r10} - ldmneia r0, {r3-r9} - stmneia r2, {r3-r9} - - /* Set-up MEMMAP register, so vectors are taken from SRAM */ - ldr r0, MEMMAP_ADR - mov r1, #0x02 /* vectors re-mapped to static RAM */ - str r1, [r0] - - /* everything is fine now */ - mov pc, lr diff --git a/board/siemens/SMN42/smn42.c b/board/siemens/SMN42/smn42.c deleted file mode 100644 index 52d1d7e5f3..0000000000 --- a/board/siemens/SMN42/smn42.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com> - * Armadillo board HT1070 - * - * (C) Copyright 2007 Gary Jennejohn <garyj@denx.de> - * Siemens board SMN42 - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <clps7111.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscellaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* arch number MACH_TYPE_ARMADILLO - not official*/ - gd->bd->bi_arch_number = 83; - - /* location of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x00000100; - - return 0; -} - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return (0); -} diff --git a/board/syteco/jadecpu/lowlevel_init.S b/board/syteco/jadecpu/lowlevel_init.S index 5ad4dceb92..b01f087895 100644 --- a/board/syteco/jadecpu/lowlevel_init.S +++ b/board/syteco/jadecpu/lowlevel_init.S @@ -30,7 +30,7 @@ #include <version.h> #include <asm/macro.h> #include <asm/arch/mb86r0x.h> -#include <asm/arch/asm-offsets.h> +#include <generated/asm-offsets.h> /* Set up the platform, once the cpu has been initialized */ .globl lowlevel_init diff --git a/board/syteco/zmx25/lowlevel_init.S b/board/syteco/zmx25/lowlevel_init.S index 8e63de0a2d..1002674ca1 100644 --- a/board/syteco/zmx25/lowlevel_init.S +++ b/board/syteco/zmx25/lowlevel_init.S @@ -27,7 +27,7 @@ #include <asm/macro.h> #include <asm/arch/macro.h> #include <asm/arch/imx-regs.h> -#include <asm/arch/asm-offsets.h> +#include <generated/asm-offsets.h> /* * clocks diff --git a/board/zylonite/Makefile b/board/zylonite/Makefile deleted file mode 100644 index 3e57e49ba8..0000000000 --- a/board/zylonite/Makefile +++ /dev/null @@ -1,51 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := zylonite.o nand.o -SOBJS := lowlevel_init.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/zylonite/config.mk b/board/zylonite/config.mk deleted file mode 100644 index 954f46e382..0000000000 --- a/board/zylonite/config.mk +++ /dev/null @@ -1,4 +0,0 @@ -#CONFIG_SYS_TEXT_BASE = 0x0 -#CONFIG_SYS_TEXT_BASE = 0xa1700000 -#CONFIG_SYS_TEXT_BASE = 0xa3080000 -CONFIG_SYS_TEXT_BASE = 0xa3008000 diff --git a/board/zylonite/flash.c b/board/zylonite/flash.c deleted file mode 100644 index 3ee0ab8986..0000000000 --- a/board/zylonite/flash.c +++ /dev/null @@ -1,432 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <linux/byteorder/swab.h> - - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Board support for 1 or 2 flash devices */ -#define FLASH_PORT_WIDTH32 -#undef FLASH_PORT_WIDTH16 - -#ifdef FLASH_PORT_WIDTH16 -#define FLASH_PORT_WIDTH ushort -#define FLASH_PORT_WIDTHV vu_short -#define SWAP(x) __swab16(x) -#else -#define FLASH_PORT_WIDTH ulong -#define FLASH_PORT_WIDTHV vu_long -#define SWAP(x) __swab32(x) -#endif - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size (FPW *addr, flash_info_t *info); -static int write_data (flash_info_t *info, ulong dest, FPW data); -static void flash_get_offsets (ulong base, flash_info_t *info); -void inline spin_wheel (void); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ -#if 0 - int i; - ulong size = 0; - - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { - switch (i) { - case 0: - flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); - break; - case 1: - flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]); - flash_get_offsets (PHYS_FLASH_2, &flash_info[i]); - break; - default: - panic ("configured too many flash banks!\n"); - break; - } - size += flash_info[i].size; - } - - /* Protect monitor and environment sectors - */ - flash_protect ( FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0] ); - - flash_protect ( FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] ); - - return size; -#endif - return 0; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t *info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - return; - } - - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { - for (i = 0; i < info->sector_count; i++) { - info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); - info->protect[i] = 0; - } - } -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t *info) -{ - int i; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_INTEL: - printf ("INTEL "); - break; - default: - printf ("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F128J3A: - printf ("28F128J3A\n"); - break; - default: - printf ("Unknown Chip Type\n"); - break; - } - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf (" Sector Start Addresses:"); - for (i = 0; i < info->sector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], - info->protect[i] ? " (RO)" : " "); - } - printf ("\n"); - return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (FPW *addr, flash_info_t *info) -{ - volatile FPW value; - - /* Write auto select command: read Manufacturer ID */ - addr[0x5555] = (FPW) 0x00AA00AA; - addr[0x2AAA] = (FPW) 0x00550055; - addr[0x5555] = (FPW) 0x00900090; - - mb (); - value = addr[0]; - - switch (value) { - - case (FPW) INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - - default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - return (0); /* no or unknown flash */ - } - - mb (); - value = addr[1]; /* device ID */ - - switch (value) { - - case (FPW) INTEL_ID_28F128J3A: - info->flash_id += FLASH_28F128J3A; - info->sector_count = 128; - info->size = 0x02000000; - break; /* => 16 MB */ - - default: - info->flash_id = FLASH_UNKNOWN; - break; - } - - if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); - info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; - } - - addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ - - return (info->size); -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - int flag, prot, sect; - ulong type, start; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - type = (info->flash_id & FLASH_VENDMASK); - if ((type != FLASH_MAN_INTEL)) { - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - FPWV *addr = (FPWV *) (info->start[sect]); - FPW status; - - printf ("Erasing sector %2d ... ", sect); - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - *addr = (FPW) 0x00500050; /* clear status register */ - *addr = (FPW) 0x00200020; /* erase setup */ - *addr = (FPW) 0x00D000D0; /* erase confirm */ - - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - *addr = (FPW) 0x00B000B0; /* suspend erase */ - *addr = (FPW) 0x00FF00FF; /* reset to read mode */ - rcode = 1; - break; - } - } - - *addr = 0x00500050; /* clear status register cmd. */ - *addr = 0x00FF00FF; /* resest to read mode */ - - printf (" done\n"); - } - } - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, wp; - FPW data; - int count, i, l, rc, port_width; - - if (info->flash_id == FLASH_UNKNOWN) { - return 4; - } -/* get lower word aligned address */ -#ifdef FLASH_PORT_WIDTH16 - wp = (addr & ~1); - port_width = 2; -#else - wp = (addr & ~3); - port_width = 4; -#endif - - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i = 0, cp = wp; i < l; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - for (; i < port_width && cnt > 0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt == 0 && i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - } - - /* - * handle word aligned part - */ - count = 0; - while (cnt >= port_width) { - data = 0; - for (i = 0; i < port_width; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_data (info, wp, SWAP (data))) != 0) { - return (rc); - } - wp += port_width; - cnt -= port_width; - if (count++ > 0x800) { - spin_wheel (); - count = 0; - } - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i < port_width; ++i, ++cp) { - data = (data << 8) | (*(uchar *) cp); - } - - return (write_data (info, wp, SWAP (data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t *info, ulong dest, FPW data) -{ - FPWV *addr = (FPWV *) dest; - ulong status; - int flag; - ulong start; - - /* Check if Flash is (sufficiently) erased */ - if ((*addr & data) != data) { - printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr); - return (2); - } - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - *addr = (FPW) 0x00400040; /* write setup */ - *addr = data; - - /* arm simple, non interrupt dependent timer */ - start = get_timer(0); - - /* wait while polling the status register */ - while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - return (1); - } - } - - *addr = (FPW) 0x00FF00FF; /* restore read mode */ - - return (0); -} - -void inline spin_wheel (void) -{ - static int p = 0; - static char w[] = "\\/-"; - - printf ("\010%c", w[p]); - (++p == 3) ? (p = 0) : 0; -} diff --git a/board/zylonite/lowlevel_init.S b/board/zylonite/lowlevel_init.S deleted file mode 100644 index 6f2ad236dd..0000000000 --- a/board/zylonite/lowlevel_init.S +++ /dev/null @@ -1,373 +0,0 @@ -/* - * Most of this taken from Redboot hal_platform_setup.h with cleanup - * - * NOTE: I haven't clean this up considerably, just enough to get it - * running. See hal_platform_setup.h for the source. See - * board/cradle/lowlevel_init.S for another PXA250 setup that is - * much cleaner. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <version.h> -#include <asm/arch/pxa-regs.h> - -DRAM_SIZE: .long CONFIG_SYS_DRAM_SIZE - -/* wait for coprocessor write complete */ -.macro CPWAIT reg - mrc p15,0,\reg,c2,c0,0 - mov \reg,\reg - sub pc,pc,#4 -.endm - - -.macro wait time - ldr r2, =OSCR - mov r3, #0 - str r3, [r2] -0: - ldr r3, [r2] - cmp r3, \time - bls 0b -.endm - -/* - * Memory setup - */ - -.globl lowlevel_init -lowlevel_init: - /* Set up GPIO pins first ----------------------------------------- */ - mov r10, lr - - /* Configure GPIO Pins 41 - 48 as UART1 / altern. Fkt. 2 */ - ldr r0, =0x40E10438 @ GPIO41 FFRXD - ldr r1, =0x802 - str r1, [r0] - - ldr r0, =0x40E1043C @ GPIO42 FFTXD - ldr r1, =0x802 - str r1, [r0] - - ldr r0, =0x40E10440 @ GPIO43 FFCTS - ldr r1, =0x802 - str r1, [r0] - - ldr r0, =0x40E10444 @ GPIO 44 FFDCD - ldr r1, =0x802 - str r1, [r0] - - ldr r0, =0x40E10448 @ GPIO 45 FFDSR - ldr r1, =0x802 - str r1, [r0] - - ldr r0, =0x40E1044C @ GPIO 46 FFRI - ldr r1, =0x802 - str r1, [r0] - - ldr r0, =0x40E10450 @ GPIO 47 FFDTR - ldr r1, =0x802 - str r1, [r0] - - ldr r0, =0x40E10454 @ GPIO 48 - ldr r1, =0x802 - str r1, [r0] - - /* tebrandt - ASCR, clear the RDH bit */ - ldr r0, =ASCR - ldr r1, [r0] - bic r1, r1, #0x80000000 - str r1, [r0] - - /* ---------------------------------------------------------------- */ - /* Enable memory interface */ - /* */ - /* The sequence below is based on the recommended init steps */ - /* detailed in the Intel PXA250 Operating Systems Developers Guide, */ - /* Chapter 10. */ - /* ---------------------------------------------------------------- */ - - /* ---------------------------------------------------------------- */ - /* Step 1: Wait for at least 200 microsedonds to allow internal */ - /* clocks to settle. Only necessary after hard reset... */ - /* FIXME: can be optimized later */ - /* ---------------------------------------------------------------- */ - - /* mk: replaced with wait macro */ -/* ldr r3, =OSCR /\* reset the OS Timer Count to zero *\/ */ -/* mov r2, #0 */ -/* str r2, [r3] */ -/* ldr r4, =0x300 /\* really 0x2E1 is about 200usec, *\/ */ -/* /\* so 0x300 should be plenty *\/ */ -/* 1: */ -/* ldr r2, [r3] */ -/* cmp r4, r2 */ -/* bgt 1b */ - wait #0x300 - -mem_init: - - /* configure the MEMCLKCFG register */ - ldr r1, =MEMCLKCFG - ldr r2, =0x00010001 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set CSADRCFG[0] to data flash SRAM mode */ - ldr r1, =CSADRCFG0 - ldr r2, =0x00320809 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set CSADRCFG[1] to data flash SRAM mode */ - ldr r1, =CSADRCFG1 - ldr r2, =0x00320809 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set MSC 0 register for SRAM memory */ - ldr r1, =MSC0 - ldr r2, =0x11191119 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set CSADRCFG[2] to data flash SRAM mode */ - ldr r1, =CSADRCFG2 - ldr r2, =0x00320809 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set CSADRCFG[3] to VLIO mode */ - ldr r1, =CSADRCFG3 - ldr r2, =0x0032080B - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - - /* set MSC 1 register for VLIO memory */ - ldr r1, =MSC1 - ldr r2, =0x123C1119 - str r2, [r1] @ WRITE - ldr r2, [r1] @ DELAY UNTIL WRITTEN - -#if 0 - /* This does not work in Zylonite. -SC */ - ldr r0, =0x15fffff0 - ldr r1, =0xb10b - str r1, [r0] - str r1, [r0, #4] -#endif - - /* Configure ACCR Register */ - ldr r0, =ACCR @ ACCR - ldr r1, =0x0180b108 - str r1, [r0] - ldr r1, [r0] - - /* Configure MDCNFG Register */ - ldr r0, =MDCNFG @ MDCNFG - ldr r1, =0x403 - str r1, [r0] - ldr r1, [r0] - - /* Perform Resistive Compensation by configuring RCOMP register */ - ldr r1, =RCOMP @ RCOMP - ldr r2, =0x000000ff - str r2, [r1] - ldr r2, [r1] - - /* Configure MDMRS Register for SDCS0 */ - ldr r1, =MDMRS @ MDMRS - ldr r2, =0x60000023 - ldr r3, [r1] - orr r2, r2, r3 - str r2, [r1] - ldr r2, [r1] - - /* Configure MDMRS Register for SDCS1 */ - ldr r1, =MDMRS @ MDMRS - ldr r2, =0xa0000023 - ldr r3, [r1] - orr r2, r2, r3 - str r2, [r1] - ldr r2, [r1] - - /* Configure MDREFR */ - ldr r1, =MDREFR @ MDREFR - ldr r2, =0x00000006 - str r2, [r1] - ldr r2, [r1] - - /* Configure EMPI */ - ldr r1, =EMPI @ EMPI - ldr r2, =0x80000000 - str r2, [r1] - ldr r2, [r1] - - /* Hardware DDR Read-Strobe Delay Calibration */ - ldr r0, =DDR_HCAL @ DDR_HCAL - ldr r1, =0x803ffc07 @ the offset is correct? -SC - str r1, [r0] - wait #5 - ldr r1, [r0] - - /* Here we assume the hardware calibration alwasy be successful. -SC */ - /* Set DMCEN bit in MDCNFG Register */ - ldr r0, =MDCNFG @ MDCNFG - ldr r1, [r0] - orr r1, r1, #0x40000000 @ enable SDRAM for Normal Access - str r1, [r0] - -#ifndef CONFIG_SYS_SKIP_DRAM_SCRUB - /* scrub/init SDRAM if enabled/present */ -/* ldr r11, =0xa0000000 /\* base address of SDRAM (CONFIG_SYS_DRAM_BASE) *\/ */ -/* ldr r12, =0x04000000 /\* size of memory to scrub (CONFIG_SYS_DRAM_SIZE) *\/ */ -/* mov r8,r12 /\* save DRAM size (mk: why???) *\/ */ - ldr r8, =0xa0000000 /* base address of SDRAM (CONFIG_SYS_DRAM_BASE) */ - ldr r9, =0x04000000 /* size of memory to scrub (CONFIG_SYS_DRAM_SIZE) */ - mov r0, #0 /* scrub with 0x0000:0000 */ - mov r1, #0 - mov r2, #0 - mov r3, #0 - mov r4, #0 - mov r5, #0 - mov r6, #0 - mov r7, #0 -10: /* fastScrubLoop */ - subs r9, r9, #32 /* 32 bytes/line */ - stmia r8!, {r0-r7} - beq 15f - b 10b -#endif /* CONFIG_SYS_SKIP_DRAM_SCRUB */ - -15: - /* Mask all interrupts */ - mov r1, #0 - mcr p6, 0, r1, c1, c0, 0 @ ICMR - - /* Disable software and data breakpoints */ - mov r0, #0 - mcr p15,0,r0,c14,c8,0 /* ibcr0 */ - mcr p15,0,r0,c14,c9,0 /* ibcr1 */ - mcr p15,0,r0,c14,c4,0 /* dbcon */ - - /* Enable all debug functionality */ - mov r0,#0x80000000 - mcr p14,0,r0,c10,c0,0 /* dcsr */ - - /* We are finished with Intel's memory controller initialisation */ - - /* ---------------------------------------------------------------- */ - /* End lowlevel_init */ - /* ---------------------------------------------------------------- */ - -endlowlevel_init: - - mov pc, lr - -/* -@******************************************************************************** -@ DDR calibration -@ -@ This function is used to calibrate DQS delay lines. -@ Monahans supports three ways to do it. One is software -@ calibration. Two is hardware calibration. Three is hybrid -@ calibration. -@ -@ TBD -@ -SC -ddr_calibration: - - @ Case 1: Write the correct delay value once - @ Configure DDR_SCAL Register - ldr r0, =DDR_SCAL @ DDR_SCAL -q ldr r1, =0xaf2f2f2f - str r1, [r0] - ldr r1, [r0] -*/ -/* @ Case 2: Software Calibration - @ Write test pattern to memory - ldr r5, =0x0faf0faf @ Data Pattern - ldr r4, =0xa0000000 @ DDR ram - str r5, [r4] - - mov r1, =0x0 @ delay count - mov r6, =0x0 - mov r7, =0x0 -ddr_loop1: - add r1, r1, =0x1 - cmp r1, =0xf - ble end_loop - mov r3, r1 - mov r0, r1, lsl #30 - orr r3, r3, r0 - mov r0, r1, lsl #22 - orr r3, r3, r0 - mov r0, r1, lsl #14 - orr r3, r3, r0 - orr r3, r3, =0x80000000 - ldr r2, =DDR_SCAL - str r3, [r2] - - ldr r2, [r4] - cmp r2, r5 - bne ddr_loop1 - mov r6, r1 -ddr_loop2: - add r1, r1, =0x1 - cmp r1, =0xf - ble end_loop - mov r3, r1 - mov r0, r1, lsl #30 - orr r3, r3, r0 - mov r0, r1, lsl #22 - orr r3, r3, r0 - mov r0, r1, lsl #14 - orr r3, r3, r0 - orr r3, r3, =0x80000000 - ldr r2, =DDR_SCAL - str r3, [r2] - - ldr r2, [r4] - cmp r2, r5 - be ddr_loop2 - mov r7, r2 - - add r3, r6, r7 - lsr r3, r3, =0x1 - mov r0, r1, lsl #30 - orr r3, r3, r0 - mov r0, r1, lsl #22 - orr r3, r3, r0 - mov r0, r1, lsl #14 - orr r3, r3, r0 - orr r3, r3, =0x80000000 - ldr r2, =DDR_SCAL - -end_loop: - - @ Case 3: Hardware Calibratoin - ldr r0, =DDR_HCAL @ DDR_HCAL - ldr r1, =0x803ffc07 @ the offset is correct? -SC - str r1, [r0] - wait #5 - ldr r1, [r0] - mov pc, lr -*/ diff --git a/board/zylonite/nand.c b/board/zylonite/nand.c deleted file mode 100644 index 71d18a6f5f..0000000000 --- a/board/zylonite/nand.c +++ /dev/null @@ -1,562 +0,0 @@ -/* - * (C) Copyright 2006 DENX Software Engineering - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/io.h> - -#if defined(CONFIG_CMD_NAND) - -#include <nand.h> -#include <asm/arch/pxa-regs.h> - -#ifdef CONFIG_SYS_DFC_DEBUG1 -# define DFC_DEBUG1(fmt, args...) printf(fmt, ##args) -#else -# define DFC_DEBUG1(fmt, args...) -#endif - -#ifdef CONFIG_SYS_DFC_DEBUG2 -# define DFC_DEBUG2(fmt, args...) printf(fmt, ##args) -#else -# define DFC_DEBUG2(fmt, args...) -#endif - -#ifdef CONFIG_SYS_DFC_DEBUG3 -# define DFC_DEBUG3(fmt, args...) printf(fmt, ##args) -#else -# define DFC_DEBUG3(fmt, args...) -#endif - -/* These really don't belong here, as they are specific to the NAND Model */ -static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; - -static struct nand_bbt_descr delta_bbt_descr = { - .options = 0, - .offs = 0, - .len = 2, - .pattern = scan_ff_pattern -}; - -static struct nand_ecclayout delta_oob = { - .eccbytes = 6, - .eccpos = {2, 3, 4, 5, 6, 7}, - .oobfree = { {8, 2}, {12, 4} } -}; - -/* - * not required for Monahans DFC - */ -static void dfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - return; -} - -#if 0 -/* read device ready pin */ -static int dfc_device_ready(struct mtd_info *mtdinfo) -{ - if(NDSR & NDSR_RDY) - return 1; - else - return 0; - return 0; -} -#endif - -/* - * Write buf to the DFC Controller Data Buffer - */ -static void dfc_write_buf(struct mtd_info *mtd, const u_char *buf, int len) -{ - unsigned long bytes_multi = len & 0xfffffffc; - unsigned long rest = len & 0x3; - unsigned long *long_buf; - int i; - - DFC_DEBUG2("dfc_write_buf: writing %d bytes starting with 0x%x.\n", len, *((unsigned long*) buf)); - if(bytes_multi) { - for(i=0; i<bytes_multi; i+=4) { - long_buf = (unsigned long*) &buf[i]; - writel(*long_buf, NDDB); - } - } - if(rest) { - printf("dfc_write_buf: ERROR, writing non 4-byte aligned data.\n"); - } - return; -} - - -/* The original: - * static void dfc_read_buf(struct mtd_info *mtd, const u_char *buf, int len) - * - * Shouldn't this be "u_char * const buf" ? - */ -static void dfc_read_buf(struct mtd_info *mtd, u_char* const buf, int len) -{ - int i=0, j; - - /* we have to be carefull not to overflow the buffer if len is - * not a multiple of 4 */ - unsigned long bytes_multi = len & 0xfffffffc; - unsigned long rest = len & 0x3; - unsigned long *long_buf; - - DFC_DEBUG3("dfc_read_buf: reading %d bytes.\n", len); - /* if there are any, first copy multiple of 4 bytes */ - if(bytes_multi) { - for(i=0; i<bytes_multi; i+=4) { - long_buf = (unsigned long*) &buf[i]; - *long_buf = readl(NDDB); - } - } - - /* ...then the rest */ - if(rest) { - unsigned long rest_data = NDDB; - for(j=0;j<rest; j++) - buf[i+j] = (u_char) ((rest_data>>j) & 0xff); - } - - return; -} - -/* - * read a word. Not implemented as not used in NAND code. - */ -static u16 dfc_read_word(struct mtd_info *mtd) -{ - printf("dfc_read_word: UNIMPLEMENTED.\n"); - return 0; -} - -/* global var, too bad: mk@tbd: move to ->priv pointer */ -static unsigned long read_buf = 0; -static int bytes_read = -1; - -/* - * read a byte from NDDB Because we can only read 4 bytes from NDDB at - * a time, we buffer the remaining bytes. The buffer is reset when a - * new command is sent to the chip. - * - * WARNING: - * This function is currently only used to read status and id - * bytes. For these commands always 8 bytes need to be read from - * NDDB. So we read and discard these bytes right now. In case this - * function is used for anything else in the future, we must check - * what was the last command issued and read the appropriate amount of - * bytes respectively. - */ -static u_char dfc_read_byte(struct mtd_info *mtd) -{ - unsigned char byte; - unsigned long dummy; - - if(bytes_read < 0) { - read_buf = readl(NDDB); - dummy = readl(NDDB); - bytes_read = 0; - } - byte = (unsigned char) (read_buf>>(8 * bytes_read++)); - if(bytes_read >= 4) - bytes_read = -1; - - DFC_DEBUG2("dfc_read_byte: byte %u: 0x%x of (0x%x).\n", bytes_read - 1, byte, read_buf); - return byte; -} - -/* calculate delta between OSCR values start and now */ -static unsigned long get_delta(unsigned long start) -{ - unsigned long cur = readl(OSCR); - - if(cur < start) /* OSCR overflowed */ - return (cur + (start^0xffffffff)); - else - return (cur - start); -} - -/* delay function, this doesn't belong here */ -static void wait_us(unsigned long us) -{ - unsigned long start = readl(OSCR); - us = DIV_ROUND_UP(us * OSCR_CLK_FREQ, 1000); - - while (get_delta(start) < us) { - /* do nothing */ - } -} - -static void dfc_clear_nddb(void) -{ - writel(readl(NDCR) & ~NDCR_ND_RUN, NDCR); - wait_us(CONFIG_SYS_NAND_OTHER_TO); -} - -/* wait_event with timeout */ -static unsigned long dfc_wait_event(unsigned long event) -{ - unsigned long ndsr, timeout, start = readl(OSCR); - - if(!event) - return 0xff000000; - else if(event & (NDSR_CS0_CMDD | NDSR_CS0_BBD)) - timeout = DIV_ROUND_UP(CONFIG_SYS_NAND_PROG_ERASE_TO - * OSCR_CLK_FREQ, 1000); - else - timeout = DIV_ROUND_UP(CONFIG_SYS_NAND_OTHER_TO - * OSCR_CLK_FREQ, 1000); - - while(1) { - ndsr = readl(NDSR); - if(ndsr & event) { - writel(readl(NDSR) | event, NDSR); - break; - } - if(get_delta(start) > timeout) { - DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%lx.\n", event); - return 0xff000000; - } - - } - return ndsr; -} - -/* we don't always wan't to do this */ -static void dfc_new_cmd(void) -{ - int retry = 0; - unsigned long status; - - while(retry++ <= CONFIG_SYS_NAND_SENDCMD_RETRY) { - /* Clear NDSR */ - writel(0xFFF, NDSR); - - /* set NDCR[NDRUN] */ - if (!(readl(NDCR) & NDCR_ND_RUN)) - writel(readl(NDCR) | NDCR_ND_RUN, NDCR); - - status = dfc_wait_event(NDSR_WRCMDREQ); - - if(status & NDSR_WRCMDREQ) - return; - - DFC_DEBUG2("dfc_new_cmd: FAILED to get WRITECMDREQ, retry: %d.\n", retry); - dfc_clear_nddb(); - } - DFC_DEBUG1("dfc_new_cmd: giving up after %d retries.\n", retry); -} - -/* this function is called after Programm and Erase Operations to - * check for success or failure */ -static int dfc_wait(struct mtd_info *mtd, struct nand_chip *this) -{ - unsigned long ndsr=0, event=0; - int state = this->state; - - if(state == FL_WRITING) { - event = NDSR_CS0_CMDD | NDSR_CS0_BBD; - } else if(state == FL_ERASING) { - event = NDSR_CS0_CMDD | NDSR_CS0_BBD; - } - - ndsr = dfc_wait_event(event); - - if((ndsr & NDSR_CS0_BBD) || (ndsr & 0xff000000)) - return(0x1); /* Status Read error */ - return 0; -} - -/* cmdfunc send commands to the DFC */ -static void dfc_cmdfunc(struct mtd_info *mtd, unsigned command, - int column, int page_addr) -{ - /* register struct nand_chip *this = mtd->priv; */ - unsigned long ndcb0=0, ndcb1=0, ndcb2=0, event=0; - - /* clear the ugly byte read buffer */ - bytes_read = -1; - read_buf = 0; - - switch (command) { - case NAND_CMD_READ0: - DFC_DEBUG3("dfc_cmdfunc: NAND_CMD_READ0, page_addr: 0x%x, column: 0x%x.\n", page_addr, (column>>1)); - dfc_new_cmd(); - ndcb0 = (NAND_CMD_READ0 | (4<<16)); - column >>= 1; /* adjust for 16 bit bus */ - ndcb1 = (((column>>1) & 0xff) | - ((page_addr<<8) & 0xff00) | - ((page_addr<<8) & 0xff0000) | - ((page_addr<<8) & 0xff000000)); /* make this 0x01000000 ? */ - event = NDSR_RDDREQ; - goto write_cmd; - case NAND_CMD_READ1: - DFC_DEBUG2("dfc_cmdfunc: NAND_CMD_READ1 unimplemented!\n"); - goto end; - case NAND_CMD_READOOB: - DFC_DEBUG1("dfc_cmdfunc: NAND_CMD_READOOB unimplemented!\n"); - goto end; - case NAND_CMD_READID: - dfc_new_cmd(); - DFC_DEBUG2("dfc_cmdfunc: NAND_CMD_READID.\n"); - ndcb0 = (NAND_CMD_READID | (3 << 21) | (1 << 16)); /* addr cycles*/ - event = NDSR_RDDREQ; - goto write_cmd; - case NAND_CMD_PAGEPROG: - /* sent as a multicommand in NAND_CMD_SEQIN */ - DFC_DEBUG2("dfc_cmdfunc: NAND_CMD_PAGEPROG empty due to multicmd.\n"); - goto end; - case NAND_CMD_ERASE1: - DFC_DEBUG2("dfc_cmdfunc: NAND_CMD_ERASE1, page_addr: 0x%x, column: 0x%x.\n", page_addr, (column>>1)); - dfc_new_cmd(); - ndcb0 = (0xd060 | (1<<25) | (2<<21) | (1<<19) | (3<<16)); - ndcb1 = (page_addr & 0x00ffffff); - goto write_cmd; - case NAND_CMD_ERASE2: - DFC_DEBUG2("dfc_cmdfunc: NAND_CMD_ERASE2 empty due to multicmd.\n"); - goto end; - case NAND_CMD_SEQIN: - /* send PAGE_PROG command(0x1080) */ - dfc_new_cmd(); - DFC_DEBUG2("dfc_cmdfunc: NAND_CMD_SEQIN/PAGE_PROG, page_addr: 0x%x, column: 0x%x.\n", page_addr, (column>>1)); - ndcb0 = (0x1080 | (1<<25) | (1<<21) | (1<<19) | (4<<16)); - column >>= 1; /* adjust for 16 bit bus */ - ndcb1 = (((column>>1) & 0xff) | - ((page_addr<<8) & 0xff00) | - ((page_addr<<8) & 0xff0000) | - ((page_addr<<8) & 0xff000000)); /* make this 0x01000000 ? */ - event = NDSR_WRDREQ; - goto write_cmd; - case NAND_CMD_STATUS: - DFC_DEBUG2("dfc_cmdfunc: NAND_CMD_STATUS.\n"); - dfc_new_cmd(); - ndcb0 = NAND_CMD_STATUS | (4<<21); - event = NDSR_RDDREQ; - goto write_cmd; - case NAND_CMD_RESET: - DFC_DEBUG2("dfc_cmdfunc: NAND_CMD_RESET.\n"); - ndcb0 = NAND_CMD_RESET | (5<<21); - event = NDSR_CS0_CMDD; - goto write_cmd; - default: - printk("dfc_cmdfunc: error, unsupported command.\n"); - goto end; - } - - write_cmd: - writel(ndcb0, NDCB0); - writel(ndcb1, NDCB0); - writel(ndcb2, NDCB0); - - /* wait_event: */ - dfc_wait_event(event); - end: - return; -} - -static void dfc_gpio_init(void) -{ - DFC_DEBUG2("Setting up DFC GPIO's.\n"); - - /* no idea what is done here, see zylonite.c */ - writel(0x1, GPIO4); - - writel(0x00000001, DF_ALE_nWE1); - writel(0x00000001, DF_ALE_nWE2); - writel(0x00000001, DF_nCS0); - writel(0x00000001, DF_nCS1); - writel(0x00000001, DF_nWE); - writel(0x00000001, DF_nRE); - writel(0x00000001, DF_IO0); - writel(0x00000001, DF_IO8); - writel(0x00000001, DF_IO1); - writel(0x00000001, DF_IO9); - writel(0x00000001, DF_IO2); - writel(0x00000001, DF_IO10); - writel(0x00000001, DF_IO3); - writel(0x00000001, DF_IO11); - writel(0x00000001, DF_IO4); - writel(0x00000001, DF_IO12); - writel(0x00000001, DF_IO5); - writel(0x00000001, DF_IO13); - writel(0x00000001, DF_IO6); - writel(0x00000001, DF_IO14); - writel(0x00000001, DF_IO7); - writel(0x00000001, DF_IO15); - - writel(0x1901, DF_nWE); - writel(0x1901, DF_nRE); - writel(0x1900, DF_CLE_nOE); - writel(0x1901, DF_ALE_nWE1); - writel(0x1900, DF_INT_RnB); -} - -/* - * Board-specific NAND initialization. The following members of the - * argument are board-specific (per include/linux/mtd/nand_new.h): - * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device - * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device - * - cmd_ctrl: hardwarespecific function for accesing control-lines - * - dev_ready: hardwarespecific function for accesing device ready/busy line - * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must - * only be provided if a hardware ECC is available - * - ecc.mode: mode of ecc, see defines - * - chip_delay: chip dependent delay for transfering data from array to - * read regs (tR) - * - options: various chip options. They can partly be set to inform - * nand_scan about special functionality. See the defines for further - * explanation - * Members with a "?" were not set in the merged testing-NAND branch, - * so they are not set here either. - */ -int board_nand_init(struct nand_chip *nand) -{ - unsigned long tCH, tCS, tWH, tWP, tRH, tRP, tRP_high, tR, tWHR, tAR; - - /* set up GPIO Control Registers */ - dfc_gpio_init(); - - /* turn on the NAND Controller Clock (104 MHz @ D0) */ - writel(readl(CKENA) | (CKENA_4_NAND | CKENA_9_SMC), CKENA); - -#undef CONFIG_SYS_TIMING_TIGHT -#ifndef CONFIG_SYS_TIMING_TIGHT - tCH = MIN(((unsigned long) (NAND_TIMING_tCH * DFC_CLK_PER_US) + 1), - DFC_MAX_tCH); - tCS = MIN(((unsigned long) (NAND_TIMING_tCS * DFC_CLK_PER_US) + 1), - DFC_MAX_tCS); - tWH = MIN(((unsigned long) (NAND_TIMING_tWH * DFC_CLK_PER_US) + 1), - DFC_MAX_tWH); - tWP = MIN(((unsigned long) (NAND_TIMING_tWP * DFC_CLK_PER_US) + 1), - DFC_MAX_tWP); - tRH = MIN(((unsigned long) (NAND_TIMING_tRH * DFC_CLK_PER_US) + 1), - DFC_MAX_tRH); - tRP = MIN(((unsigned long) (NAND_TIMING_tRP * DFC_CLK_PER_US) + 1), - DFC_MAX_tRP); - tR = MIN(((unsigned long) (NAND_TIMING_tR * DFC_CLK_PER_US) + 1), - DFC_MAX_tR); - tWHR = MIN(((unsigned long) (NAND_TIMING_tWHR * DFC_CLK_PER_US) + 1), - DFC_MAX_tWHR); - tAR = MIN(((unsigned long) (NAND_TIMING_tAR * DFC_CLK_PER_US) + 1), - DFC_MAX_tAR); -#else /* this is the tight timing */ - - tCH = MIN(((unsigned long) (NAND_TIMING_tCH * DFC_CLK_PER_US)), - DFC_MAX_tCH); - tCS = MIN(((unsigned long) (NAND_TIMING_tCS * DFC_CLK_PER_US)), - DFC_MAX_tCS); - tWH = MIN(((unsigned long) (NAND_TIMING_tWH * DFC_CLK_PER_US)), - DFC_MAX_tWH); - tWP = MIN(((unsigned long) (NAND_TIMING_tWP * DFC_CLK_PER_US)), - DFC_MAX_tWP); - tRH = MIN(((unsigned long) (NAND_TIMING_tRH * DFC_CLK_PER_US)), - DFC_MAX_tRH); - tRP = MIN(((unsigned long) (NAND_TIMING_tRP * DFC_CLK_PER_US)), - DFC_MAX_tRP); - tR = MIN(((unsigned long) (NAND_TIMING_tR * DFC_CLK_PER_US) - tCH - 2), - DFC_MAX_tR); - tWHR = MIN(((unsigned long) (NAND_TIMING_tWHR * DFC_CLK_PER_US) - tCH - 2), - DFC_MAX_tWHR); - tAR = MIN(((unsigned long) (NAND_TIMING_tAR * DFC_CLK_PER_US) - 2), - DFC_MAX_tAR); -#endif /* CONFIG_SYS_TIMING_TIGHT */ - - - DFC_DEBUG2("tCH=%u, tCS=%u, tWH=%u, tWP=%u, tRH=%u, tRP=%u, tR=%u, tWHR=%u, tAR=%u.\n", tCH, tCS, tWH, tWP, tRH, tRP, tR, tWHR, tAR); - - /* tRP value is split in the register */ - if(tRP & (1 << 4)) { - tRP_high = 1; - tRP &= ~(1 << 4); - } else { - tRP_high = 0; - } - - writel((tCH << 19) | - (tCS << 16) | - (tWH << 11) | - (tWP << 8) | - (tRP_high << 6) | - (tRH << 3) | - (tRP << 0), - NDTR0CS0); - - writel((tR << 16) | - (tWHR << 4) | - (tAR << 0), - NDTR1CS0); - - /* If it doesn't work (unlikely) think about: - * - ecc enable - * - chip select don't care - * - read id byte count - * - * Intentionally enabled by not setting bits: - * - dma (DMA_EN) - * - page size = 512 - * - cs don't care, see if we can enable later! - * - row address start position (after second cycle) - * - pages per block = 32 - * - ND_RDY : clears command buffer - */ - /* NDCR_NCSX | /\* Chip select busy don't care *\/ */ - - writel(NDCR_SPARE_EN | /* use the spare area */ - NDCR_DWIDTH_C | /* 16bit DFC data bus width */ - NDCR_DWIDTH_M | /* 16 bit Flash device data bus width */ - (2 << 16) | /* read id count = 7 ???? mk@tbd */ - NDCR_ND_ARB_EN | /* enable bus arbiter */ - NDCR_RDYM | /* flash device ready ir masked */ - NDCR_CS0_PAGEDM | /* ND_nCSx page done ir masked */ - NDCR_CS1_PAGEDM | - NDCR_CS0_CMDDM | /* ND_CSx command done ir masked */ - NDCR_CS1_CMDDM | - NDCR_CS0_BBDM | /* ND_CSx bad block detect ir masked */ - NDCR_CS1_BBDM | - NDCR_DBERRM | /* double bit error ir masked */ - NDCR_SBERRM | /* single bit error ir masked */ - NDCR_WRDREQM | /* write data request ir masked */ - NDCR_RDDREQM | /* read data request ir masked */ - NDCR_WRCMDREQM, /* write command request ir masked */ - NDCR); - - - /* wait 10 us due to cmd buffer clear reset */ - /* wait(10); */ - - nand->cmd_ctrl = dfc_hwcontrol; -/* nand->dev_ready = dfc_device_ready; */ - nand->ecc.mode = NAND_ECC_SOFT; - nand->ecc.layout = &delta_oob; - nand->options = NAND_BUSWIDTH_16; - nand->waitfunc = dfc_wait; - nand->read_byte = dfc_read_byte; - nand->read_word = dfc_read_word; - nand->read_buf = dfc_read_buf; - nand->write_buf = dfc_write_buf; - - nand->cmdfunc = dfc_cmdfunc; - nand->badblock_pattern = &delta_bbt_descr; - return 0; -} - -#endif diff --git a/board/zylonite/zylonite.c b/board/zylonite/zylonite.c deleted file mode 100644 index 749a40f529..0000000000 --- a/board/zylonite/zylonite.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscelaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* memory and cpu-speed are setup before relocation */ - /* so we do _nothing_ here */ - - /* arch number of Lubbock-Board */ - gd->bd->bi_arch_number = MACH_TYPE_LUBBOCK; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0xa0000100; - - return 0; -} - -int board_late_init(void) -{ - setenv("stdout", "serial"); - setenv("stderr", "serial"); - return 0; -} - - -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; - gd->bd->bi_dram[2].start = PHYS_SDRAM_3; - gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; - gd->bd->bi_dram[3].start = PHYS_SDRAM_4; - gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; - - return 0; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC91111 - rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); -#endif - return rc; -} -#endif diff --git a/boards.cfg b/boards.cfg index 60723d5ebb..8a5bfc1a35 100644 --- a/boards.cfg +++ b/boards.cfg @@ -42,13 +42,7 @@ imx31_litekit arm arm1136 - logicpd mx35pdk arm arm1136 - freescale mx35 omap2420h4 arm arm1136 - ti omap24xx tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x -ep7312 arm arm720t -impa7 arm arm720t -modnet50 arm arm720t integratorap_cm720t arm arm720t integrator armltd - integratorap -lpc2292sodimm arm arm720t - - lpc2292 -SMN42 arm arm720t - siemens lpc2292 -evb4510 arm arm720t - - s3c4510b integratorap_cm920t arm arm920t integrator armltd - integratorap integratorcp_cm920t arm arm920t integrator armltd - integratorcp a320evb arm arm920t - faraday a320 @@ -221,12 +215,7 @@ vpac270_ond_256 arm pxa vpac270 - xaeniax arm pxa xm250 arm pxa zipitz2 arm pxa -zylonite arm pxa -dnp1110 arm sa1100 -gcplus arm sa1100 jornada arm sa1100 -lart arm sa1100 -shannon arm sa1100 atngw100 avr32 at32ap - atmel at32ap700x atstk1002 avr32 at32ap atstk1000 atmel at32ap700x atstk1003 avr32 at32ap atstk1000 atmel at32ap700x diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 272d879beb..8909ee703d 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -432,6 +432,9 @@ static int bootm_load_os(image_info_t os, ulong *load_end, int boot_progress) printf ("Unimplemented compression type %d\n", comp); return BOOTM_ERR_UNIMPLEMENTED; } + + flush_cache(load, (*load_end - load) * sizeof(ulong)); + puts ("OK\n"); debug (" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end); if (boot_progress) diff --git a/common/image.c b/common/image.c index 5eea2a1f55..d38ce4ad74 100644 --- a/common/image.c +++ b/common/image.c @@ -970,17 +970,6 @@ int boot_get_ramdisk (int argc, char * const argv[], bootm_headers_t *images, rd_data = rd_len = rd_load = 0; return 1; } - -#if defined(CONFIG_B2) || defined(CONFIG_EVB4510) || defined(CONFIG_ARMADILLO) - /* - * We need to copy the ramdisk to SRAM to let Linux boot - */ - if (rd_data) { - memmove ((void *)rd_load, (uchar *)rd_data, rd_len); - rd_data = rd_load; - } -#endif /* CONFIG_B2 || CONFIG_EVB4510 || CONFIG_ARMADILLO */ - } else if (images->legacy_hdr_valid && image_check_type (&images->legacy_hdr_os_copy, IH_TYPE_MULTI)) { /* diff --git a/doc/README.modnet50 b/doc/README.modnet50 deleted file mode 100644 index 2ac3c8fbe3..0000000000 --- a/doc/README.modnet50 +++ /dev/null @@ -1,62 +0,0 @@ -U-BOOT Port for FSForth ModNET50 Board --------------------------------------- - -author: Thomas Elste <info@elste.org> - IMMS gGmbH <www.imms.de> - -The port based upon an early (partial complete) -armboot-port from Stephan Linz for the ModNET50 Board. - - -Overview: - -- board with Netsilicon NET+50 ARM7TDMI CPU without MMU -- 16 MB SDRAM -- 2 MB Flash (MBL29LV160BE) -- 10/100 Ethernet PHY (LXT971A) - - -Current Configuration (include/configs/modnet50.h): - -Memory Map: 0x00000000 - 0x00FFFFFF 16M SDRAM - 0x10000000 - 0x101FFFFF 2M Flash - -The Flash uses a BB-Architectur with 35 sectors -(0:16K; 1,2:8K; 3:32K; 4-34:64K). U-Boot is located in -the first 5 sectors. - -The environment is located at the end of the 4th Flash -sector (0x1001C000-0x1001FFFF). - -Build: - -U-boot should be build by using the ELDK Toolchain (arm-linux-*). - - make modnet50_config - make - - -Status: - -Everything seems to work fine. Booting images was tested by -booting uCLinux (with and without a separate ramdisk image) from -flash. - - -Files: - -arch/arm/cpu/arm720t/serial_netarm.c .. serial I/O for the cpu - -board/modnet50/lowlevel_init.S .. memory setup for ModNET50 -board/modnet50/flash.c .. flash routines -board/modnet50/modnet50.c .. some board init stuff - -drivers/net/netarm_eth.c .. ethernet driver for the NET+50 CPU -drivers/net/netarm_eth.h .. header for ethernet driver - -include/configs/modnet50.h .. configuration file for ModNET50 - -include/netarm_*.h .. register and macro definitions for - the NETARM CPU family - -doc/README.modnet50 .. this readme diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 8da6db6a45..d68da2e431 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,34 +11,45 @@ easily if here is something they might want to dig for... Board Arch CPU removed Commit last known maintainer/contact ============================================================================= -at91rm9200dk arm arm920t - 2011-07-17 -m501sk arm arm920t - 2011-07-17 -kb9202 arm arm920t - 2011-07-17 -csb637 arm arm920t - 2011-07-17 -cmc_pu2 arm arm920t - 2011-07-17 -at91cap9adk arm arm926ejs - 2011-07-17 Stelian Pop <stelian.pop@leadtechdesign.com> -voiceblue arm arm925t - 2011-07-17 -smdk2400 arm arm920t - 2011-07-17 Gary Jennejohn <garyj@denx.de> -sbc2410x arm arm920t - 2011-07-17 -netstar arm arm925t - 2011-07-17 -mx1fs2 arm arm920t - 2011-07-17 -lpd7a404 arm lh7a40x - 2011-07-17 -edb9301 arm arm920t - 2011-07-17 -edb9302 arm arm920t - 2011-07-17 -edb9302a arm arm920t - 2011-07-17 -edb9307 arm arm920t - 2011-07-17 -edb9307a arm arm920t - 2011-07-17 -edb9312 arm arm920t - 2011-07-17 -edb9315 arm arm920t - 2011-07-17 -edb9315a arm arm920t - 2011-07-17 -B2 arm s3c44b0 - 2011-07-16 Andrea Scian <andrea.scian@dave-tech.it> -armadillo arm arm720t - 2011-07-16 Rowel Atienza <rowel@diwalabs.com> -assabet arm sa1100 - 2011-07-16 George G. Davis <gdavis@mvista.com> -trab arm S3C2400 - 2011-05-01 Gary Jennejohn <garyj@denx.de> +zylonite arm pxa - 2011-09-05 +shannon arm sa1100 - 2011-09-05 Rolf Offermanns <rof@sysgo.de> +modnet50 arm arm720t - 2011-09-05 Thomas Elste <info@elste.org> +lpc2292sodimm arm arm720t - 2011-09-05 +lart arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de> +impa7 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de> +gcplus arm sa1100 - 2011-09-05 George G. Davis <gdavis@mvista.com> +evb4510 arm arm720t - 2011-09-05 Curt Brune <curt@cucy.com> +ep7312 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de> +dnp1110 arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de> +SMN42 arm arm720t - 2011-09-05 +at91rm9200dk arm arm920t 1c85752 2011-07-17 +m501sk arm arm920t b1a2bd4 2011-07-17 +kb9202 arm arm920t 5bd3814 2011-07-17 +csb637 arm arm920t d14af08 2011-07-17 +cmc_pu2 arm arm920t 37a9b4d 2011-07-17 +at91cap9adk arm arm926ejs b550834 2011-07-17 Stelian Pop <stelian.pop@leadtechdesign.com> +voiceblue arm arm925t 1b793a4 2011-07-17 +smdk2400 arm arm920t ad218a8 2011-07-17 Gary Jennejohn <garyj@denx.de> +sbc2410x arm arm920t 1f7f0ed 2011-07-17 +netstar arm arm925t 6ea2405 2011-07-17 +mx1fs2 arm arm920t 6962419 2011-07-17 +lpd7a404 arm lh7a40x 957731e 2011-07-17 +edb9301 arm arm920t 716f7ad 2011-07-17 +edb9302 arm arm920t 716f7ad 2011-07-17 +edb9302a arm arm920t 716f7ad 2011-07-17 +edb9307 arm arm920t 716f7ad 2011-07-17 +edb9307a arm arm920t 716f7ad 2011-07-17 +edb9312 arm arm920t 716f7ad 2011-07-17 +edb9315 arm arm920t 716f7ad 2011-07-17 +edb9315a arm arm920t 716f7ad 2011-07-17 +B2 arm s3c44b0 5dcf536 2011-07-16 Andrea Scian <andrea.scian@dave-tech.it> +armadillo arm arm720t be28857 2011-07-16 Rowel Atienza <rowel@diwalabs.com> +assabet arm sa1100 c91e90d 2011-07-16 George G. Davis <gdavis@mvista.com> +trab arm S3C2400 566e5cf 2011-05-01 Gary Jennejohn <garyj@denx.de> xsengine ARM PXA2xx 4262a7c 2010-10-20 wepep250 ARM PXA2xx 7369478 2010-10-20 Peter Figuli <peposh@etc.sk> delta ARM PXA2xx 75e2035 2010-10-20 -mp2usb ARM AT91RM2900 ee986e2 2011-01-25 Eric Bénard <eric@eukrea.com> +mp2usb ARM AT91RM2900 ee986e2 2011-01-25 Eric Bénard <eric@eukrea.com> barco powerpc MPC8245 afaa27b 2010-11-23 Marc Leeman <marc.leeman@barco.com> ERIC powerpc 405GP d9ba451 2010-11-21 Swen Anderson <sand@peppercon.de> VoVPN-GW_100MHz powerpc MPC8260 26fe3d2 2010-10-24 Juergen Selent <j.selent@elmeg.de> diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c index c3b2355f94..50d9e542d7 100644 --- a/drivers/fpga/lattice.c +++ b/drivers/fpga/lattice.c @@ -34,7 +34,7 @@ #include <lattice.h> static lattice_board_specific_func *pfns; -static char *fpga_image; +static const char *fpga_image; static unsigned long read_bytes; static unsigned long bufsize; static unsigned short expectedCRC; @@ -302,7 +302,7 @@ static int lattice_validate(Lattice_desc *desc, const char *fn) return ret_val; } -int lattice_load(Lattice_desc *desc, void *buf, size_t bsize) +int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; @@ -335,7 +335,7 @@ int lattice_load(Lattice_desc *desc, void *buf, size_t bsize) return ret_val; } -int lattice_dump(Lattice_desc *desc, void *buf, size_t bsize) +int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize) { puts("Dump not supported for Lattice FPGA\n"); diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 89d1973bf5..ebde3c5ab2 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -89,14 +89,11 @@ void i2c_init(int speed, int unused) #if defined(CONFIG_MX31) struct clock_control_regs *sc_regs = (struct clock_control_regs *)CCM_BASE; - - freq = mx31_get_ipg_clk(); /* start the required I2C clock */ writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET), &sc_regs->cgr0); -#else - freq = mxc_get_clock(MXC_IPG_PERCLK); #endif + freq = mxc_get_clock(MXC_IPG_PERCLK); for (i = 0; i < 0x1f; i++) if (freq / div[i] <= speed) diff --git a/drivers/mtd/spi/winbond.c b/drivers/mtd/spi/winbond.c index 45bd1461eb..a6a66537ba 100644 --- a/drivers/mtd/spi/winbond.c +++ b/drivers/mtd/spi/winbond.c @@ -36,6 +36,14 @@ struct winbond_spi_flash_params { static const struct winbond_spi_flash_params winbond_spi_flash_table[] = { { + .id = 0x3013, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 8, + .name = "W25X40", + }, + { .id = 0x3015, .l2_page_size = 8, .pages_per_sector = 16, diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 226684ad5d..3790f91e72 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -30,21 +30,20 @@ COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o COBJS-$(CONFIG_S6E63D6) += s6e63d6.o +COBJS-$(CONFIG_SED156X) += sed156x.o COBJS-$(CONFIG_VIDEO_AMBA) += amba.o COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o COBJS-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o COBJS-$(CONFIG_VIDEO_MX5) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o +COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o videomodes.o COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o -COBJS-$(CONFIG_SED156X) += sed156x.o COBJS-$(CONFIG_VIDEO_SM501) += sm501.o COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o -COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o -COBJS-y += videomodes.o -COBJS := $(COBJS-y) +COBJS := $(sort $(COBJS-y)) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/video/mb86r0xgdc.c b/drivers/video/mb86r0xgdc.c index 5425c9dadd..345a73b088 100644 --- a/drivers/video/mb86r0xgdc.c +++ b/drivers/video/mb86r0xgdc.c @@ -57,7 +57,6 @@ static void dsp_init(struct mb86r0x_gdc_dsp *dsp, char *modestr, u16 l2dx, l2dy, l2wx, l2wy, l2ww, l2wh; unsigned long div; int bpp; - u32 i; bpp = video_get_params(&var_mode, modestr); diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h deleted file mode 100644 index 4a8acabf72..0000000000 --- a/include/configs/SMN42.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * (C) Copyright 2007 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Configuation settings for the SMN42 board from Siemens. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * If we are developing, we might want to start u-boot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ -#undef CONFIG_SKIP_LOWLEVEL_INIT - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ -#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ -#define CONFIG_LPC2292 -#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */ - -#undef CONFIG_USE_IRQ /* don't need them anymore */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ - -/* - * select serial console configuration - */ -#define CONFIG_LPC2292_SERIAL -#define CONFIG_SERIAL1 1 /* we use Serial line 1 */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 115200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE - - -/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ -/* this would be 0xAE if E0, E1 and E2 were pulled high */ -#define CONFIG_SYS_I2C_SLAVE 0xA0 -#define CONFIG_SYS_I2C_EEPROM_ADDR (0xA0 >> 1) -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 -/* not used but required by devices.c */ -#define CONFIG_SYS_I2C_SPEED 10000 - -#ifdef CONFIG_SOFT_I2C -/* - * Software (bit-bang) I2C driver configuration - */ -#define SCL 0x00000004 /* P0.2 */ -#define SDA 0x00000008 /* P0.3 */ - -#define I2C_READ ((GET32(IO0PIN) & SDA) ? 1 : 0) -#define I2C_SDA(x) { if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); } -#define I2C_SCL(x) { if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); } -#define I2C_DELAY { udelay(100); } -#define I2C_ACTIVE { unsigned int i2ctmp; \ - i2ctmp = GET32(IO0DIR); \ - i2ctmp |= SDA; \ - PUT32(IO0DIR, i2ctmp); } -#define I2C_TRISTATE { unsigned int i2ctmp; \ - i2ctmp = GET32(IO0DIR); \ - i2ctmp &= ~SDA; \ - PUT32(IO0DIR, i2ctmp); } -#endif /* CONFIG_SOFT_I2C */ - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_FAT -#define CONFIG_CMD_MMC -#define CONFIG_CMD_NET -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_PING - - -#define CONFIG_DOS_PARTITION - -#define CONFIG_BOOTDELAY 5 - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "SMN42 # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x81800000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x83000000 /* 24 MB in SRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ - /* for uClinux img is here*/ - -#define CONFIG_SYS_SYS_CLK_FREQ 58982400 /* Hz */ -#define CONFIG_SYS_HZ 2048 /* decrementer freq in Hz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SRAM */ -#define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */ - -/* This is the external flash */ -#define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* - * The first entry in CONFIG_SYS_FLASH_BANKS_LIST is a dummy, but it must be present. - */ -#define CONFIG_SYS_FLASH_BANKS_LIST { 0, PHYS_FLASH_1 } -#define CONFIG_SYS_FLASH_ADDR0 0x555 -#define CONFIG_SYS_FLASH_ADDR1 0x2AA -#define CONFIG_SYS_FLASH_ERASE_TOUT 16384 /* Timeout for Flash Erase (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */ - -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -/* The Environment Sector is in the CPU-internal flash */ -#define CONFIG_SYS_FLASH_BASE 0 -#define CONFIG_ENV_OFFSET 0x3C000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) -#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_MMC 1 -/* we use this ethernet chip */ -#define CONFIG_ENC28J60_LPC2292 - -#endif /* __CONFIG_H */ diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h deleted file mode 100644 index 7d79d57faa..0000000000 --- a/include/configs/dnp1110.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Rolf Offermanns <rof@sysgo.de> - * - * Configuation settings for the SSV DNP1110 board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * If we are developing, we might want to start armboot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ -#define CONFIG_SKIP_LOWLEVEL_INIT 1 - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SA1110 1 /* This is an SA1110 CPU */ -#define CONFIG_DNP1110 1 /* on an DNP/1110 Board */ - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -/* we will never enable dcache, because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_NET_MULTI -#define CONFIG_SMC91111 -#define CONFIG_SMC91111_BASE 0x20000300 - - -/* - * select serial console configuration - */ -#define CONFIG_SA1100_SERIAL -#define CONFIG_SERIAL1 1 /* we use SERIAL 1 */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 115200 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200" -#define CONFIG_ETHADDR 02:80:ad:20:31:b8 -#define CONFIG_NETMASK 255.255.0.0 -#define CONFIG_IPADDR 172.22.2.23 -#define CONFIG_SERVERIP 172.22.2.22 -#define CONFIG_BOOTFILE "dnp1110" -#define CONFIG_BOOTCOMMAND "tftp; bootm" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "DNP1110 # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0xc0200000 /* default load address */ - -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CONFIG_SYS_CPUSPEED 0x0b /* set core clock to 220 MHz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */ -#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ - - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ -#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 32 MB Banks */ -#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xF80000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/ep7312.h b/include/configs/ep7312.h deleted file mode 100644 index fdb98b5cbc..0000000000 --- a/include/configs/ep7312.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * (C) Copyright 2000 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * Configuation settings for the EP7312 board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ -#define CONFIG_EP7312 1 /* on an EP7312 Board */ -#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ -#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */ - -#undef CONFIG_USE_IRQ /* don't need them anymore */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_NET_MULTI -#define CONFIG_CS8900 /* we have a CS8900 on-board */ -#define CONFIG_CS8900_BASE 0x20000000 -#define CONFIG_CS8900_BUS16 -#undef CONFIG_CS8900_BUS32 - -/* - * select serial console configuration - */ -#define CONFIG_CLPS7111_SERIAL -#define CONFIG_SERIAL1 1 /* we use Serial line 1 */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 9600 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_JFFS2 - - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600" -#define CONFIG_ETHADDR 08:00:3e:21:c7:f7 -/*#define CONFIG_NETMASK 255.255.0.0 */ -/*#define CONFIG_IPADDR 172.22.2.128 */ -/*#define CONFIG_SERVERIP 172.22.2.126 */ -/*#define CONFIG_BOOTFILE "impa7" */ -#define CONFIG_BOOTCOMMAND "bootp;bootm" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "EP7312 # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0xc0500000 /* default load address */ - -#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition, whole device */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nor0" -#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF -#define CONFIG_JFFS2_PART_OFFSET 0x00000000 - -/* mtdparts command line support */ -/* Note: fake mtd_id used, no linux mtd map file */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "nor0=ep7312-0" -#define MTDPARTS_DEFAULT "mtdparts=ep7312-0:-(jffs2)" -*/ - -#endif /* __CONFIG_H */ diff --git a/include/configs/evb4510.h b/include/configs/evb4510.h deleted file mode 100644 index 23a2efa846..0000000000 --- a/include/configs/evb4510.h +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Copyright (c) 2004 Cucy Systems (http://www.cucy.com) - * Curt Brune <curt@cucy.com> - * - * Configuation settings for evb4510 board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * If we are developing, we might want to start u-boot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - * - * Also swap the flash1 and flash2 addresses during debug. - * - * #define CONFIG_SKIP_LOWLEVEL_INIT - */ - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ -#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */ -#define CONFIG_S3C4510B 1 /* it's a S3C4510B chip */ -#define CONFIG_EVB4510 1 /* on an EVB4510 Board */ -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF - -#define CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) -#define CONFIG_STACKSIZE_FIQ (4*1024) - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_DRIVER_S3C4510_ETH 1 -#define CONFIG_DRIVER_S3C4510_I2C 1 -#define CONFIG_DRIVER_S3C4510_UART 1 -#define CONFIG_DRIVER_S3C4510_FLASH 1 - -/* - * select serial console configuration - */ -#define CONFIG_SERIAL1 1 /* we use Serial line 1, could also use 2 */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 19200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_PING - - -#define CONFIG_ETHADDR 00:40:95:36:35:33 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 10.0.0.11 -#define CONFIG_SERVERIP 10.0.0.1 -#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */ - -#define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTCOMMAND "tftp 100000 uImage" -/* #define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd" */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "evb4510 # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_CMDLINE_TAG /* allow passing of command line args to linux */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG - -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x00000000 /* default load address */ - -#define CONFIG_SYS_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 KHz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below -*/ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map after relocation - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */ - -#define PHYS_FLASH_1 0x01000000 /* Flash Bank #1 */ -#define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip, 8bit access) */ - -#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */ -#define PHYS_FLASH_2_SIZE 0x00080000 /* 512KB (one chip, 8bit access) */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_SIZE PHYS_FLASH_1_SIZE - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */ -#define CONFIG_SYS_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (4*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -/* environment settings */ -#define CONFIG_ENV_IS_IN_FLASH -#undef CONFIG_ENV_IS_NOWHERE - -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x20000) /* environment start address */ -#define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */ -#define CONFIG_ENV_SIZE 0x1000 /* max size for environment */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h deleted file mode 100644 index 9412daa276..0000000000 --- a/include/configs/gcplus.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * 2003-2004 (c) MontaVista Software, Inc. - * - * Configuation settings for the ADS GraphicsClient+ board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000. - * We don't actually init RAM in this case since we're using U-Boot as - * an secondary boot loader during Linux kernel development and testing, - * e.g. bootp/tftp download of the kernel is a far more convenient - * when testing new kernels on this target. However the ADS GCPlus Linux - * boot ROM leaves the MMU enabled when it passes control to U-Boot. So - * we use lowlevel_init (!CONFIG_SKIP_LOWLEVEL_INIT) to remedy that problem. - */ -#undef CONFIG_SKIP_LOWLEVEL_INIT - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SA1110 1 /* This is an SA1100 CPU */ -#define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */ - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -/* we will never enable dcache, because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - - -/* - * Hardware drivers - */ -#define CONFIG_NET_MULTI -#define CONFIG_LAN91C96 /* we have an SMC9194 on-board */ -#define CONFIG_LAN91C96_BASE 0x100e0000 - -/* - * select serial console configuration - */ -#define CONFIG_SA1100_SERIAL -#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 38400 - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_DHCP - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH - - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp" -#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm" -#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */ - -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CONFIG_SYS_CPUSPEED 0x0a /* set core clock to 206MHz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ -#define PHYS_SDRAM_2 0xc8000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */ - - -#define PHYS_FLASH_1 0x08000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */ -#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */ -#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#if 1 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#else -/* REVISIT: This doesn't work on ADS GCPlus just yet: */ -#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */ -#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ -#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */ -/*#define CONFIG_SYS_FLASH_PROTECTION 1 /--* hardware flash protection */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#endif - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE PHYS_FLASH_SECT_SIZE - -#endif /* __CONFIG_H */ diff --git a/include/configs/impa7.h b/include/configs/impa7.h deleted file mode 100644 index 3328e639a9..0000000000 --- a/include/configs/impa7.h +++ /dev/null @@ -1,174 +0,0 @@ -/* - * (C) Copyright 2000 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * Configuation settings for the implementa impA7 board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ -#define CONFIG_IMPA7 1 /* on an impA7 Board */ -#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ -#define CONFIG_ARM7_REVD 1 /* enable ARM720 REV.D Workarounds */ - -#undef CONFIG_USE_IRQ /* don't need them anymore */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_NET_MULTI -#define CONFIG_CS8900 /* we have a CS8900 on-board */ -#define CONFIG_CS8900_BASE 0x20000000 -#define CONFIG_CS8900_BUS32 - -/* - * select serial console configuration - */ -#define CONFIG_CLPS7111_SERIAL -#define CONFIG_SERIAL1 1 /* we use Serial line 1 */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 9600 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_JFFS2 - - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600" -/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5a */ -/*#define CONFIG_NETMASK 255.255.0.0 */ -/*#define CONFIG_IPADDR 172.22.2.128 */ -/*#define CONFIG_SERVERIP 172.22.2.126 */ -/*#define CONFIG_BOOTFILE "impa7" */ -#define CONFIG_BOOTCOMMAND "bootp;bootm" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "impA7 # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* default load address */ - -#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */ -#define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */ - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_2 0x10000000 /* Flash Bank #2 */ -#define PHYS_FLASH_SIZE 0x00800000 /* 16 MB */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition, whole device */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nor0" -#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF -#define CONFIG_JFFS2_PART_OFFSET 0x00020000 - -/* mtdparts command line support */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "nor0=impA7 NOR Flash Bank #0,nor1=impA7 NOR Flash Bank #1" -#define MTDPARTS_DEFAULT "mtdparts=impA7 NOR Flash Bank #0:-(FileSystem1);impA7 NOR Flash Bank #1:-(FileSystem2)" -*/ - -#endif /* __CONFIG_H */ diff --git a/include/configs/lart.h b/include/configs/lart.h deleted file mode 100644 index 7316b23948..0000000000 --- a/include/configs/lart.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * Configuation settings for the LART board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SA1100 1 /* This is an SA1100 CPU */ -#define CONFIG_LART 1 /* on an LART Board */ - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -/* we will never enable dcache, because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_NET_MULTI -#define CONFIG_CS8900 /* we have a CS8900 on-board */ -#define CONFIG_CS8900_BASE 0x20008300 -#define CONFIG_CS8900_BUS16 - -/* - * select serial console configuration - */ -#define CONFIG_SA1100_SERIAL -#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 9600 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" -#define CONFIG_ETHADDR 08:00:3e:26:0a:5b -#define CONFIG_NETMASK 255.255.0.0 -#define CONFIG_IPADDR 172.22.2.131 -#define CONFIG_SERVERIP 172.22.2.126 -#define CONFIG_BOOTFILE "elinos-lart" -#define CONFIG_BOOTCOMMAND "tftp; bootm" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "LART # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0xc8000000 /* default load address */ - -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CONFIG_SYS_CPUSPEED 0x0b /* set core clock to 220 MHz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */ -#define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */ -#define PHYS_SDRAM_3 0xc8000000 /* SDRAM Bank #3 */ -#define PHYS_SDRAM_3_SIZE 0x00800000 /* 8 MB */ -#define PHYS_SDRAM_4 0xc9000000 /* SDRAM Bank #4 */ -#define PHYS_SDRAM_4_SIZE 0x00800000 /* 8 MB */ - - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT (31+8) /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h deleted file mode 100644 index 17972d7e6f..0000000000 --- a/include/configs/lpc2292sodimm.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * (C) Copyright 2007 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Configuation settings for the LPC2292SODIMM board from Embedded Artists. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * If we are developing, we might want to start u-boot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ -#undef CONFIG_SKIP_LOWLEVEL_INIT - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ -#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ -#define CONFIG_LPC2292 -#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */ - -#undef CONFIG_USE_IRQ /* don't need them anymore */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ - -/* - * select serial console configuration - */ -#define CONFIG_LPC2292_SERIAL -#define CONFIG_SERIAL1 1 /* we use Serial line 1 */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 115200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_FAT -#define CONFIG_CMD_MMC -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING - - -#define CONFIG_MAC_PARTITION -#define CONFIG_DOS_PARTITION - -#define CONFIG_BOOTDELAY 5 - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "LPC2292SODIMM # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x40000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x40000000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x00040000 /* default load address for */ - /* armadillo: kernel img is here*/ - -#define CONFIG_SYS_SYS_CLK_FREQ 58982400 /* Hz */ -#define CONFIG_SYS_HZ 2048 /* decrementer freq in Hz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x81000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB SDRAM */ - -#define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x00200000 /* 2 MB */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (0x0 + 0x3C000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_MMC 1 -/* we use this ethernet chip */ -#define CONFIG_ENC28J60_LPC2292 - -#endif /* __CONFIG_H */ diff --git a/include/configs/modnet50.h b/include/configs/modnet50.h deleted file mode 100644 index 57707f38e6..0000000000 --- a/include/configs/modnet50.h +++ /dev/null @@ -1,196 +0,0 @@ -/* - * (C) Copyright 2004 - * IMMS, gGmbH <www.imms.de> - * Thomas Elste <info@elste.org> - * - * Configuation settings for ModNET50 board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM7 1 /* This is a ARM7 CPU */ -#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ -#define CONFIG_NETARM /* it's a Netsiclicon NET+ARM */ -#undef CONFIG_NETARM_NET40_REV2 /* it's a Net+40 Rev. 2 */ -#undef CONFIG_NETARM_NET40_REV4 /* it's a Net+40 Rev. 4 */ -#define CONFIG_NETARM_NET50 /* it's a Net+50 */ - -#define CONFIG_MODNET50 1 /* on an ModNET50 Board */ - -#undef CONFIG_USE_IRQ /* don't need them anymore */ - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_DRIVER_NETARMETH 1 - -/* - * select serial console configuration - */ -#define CONFIG_NETARM_SERIAL -#define CONFIG_SERIAL1 1 /* we use Serial line 1 */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 38400 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_JFFS2 - - -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_IPADDR 192.168.30.2 -#define CONFIG_SERVERIP 192.168.30.122 -#define CONFIG_SYS_ETH_PHY_ADDR 0x100 -#define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */ - -/*#define CONFIG_BOOTDELAY 10*/ -/* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */ -#define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000" -#define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K " \ - "root=/dev/ram keepinitrd" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "modnet50 # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x00500000 /* default load address */ - -#define CONFIG_SYS_HZ 900 /* decrementer freq: 2 kHz */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below -*/ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ -#define PHYS_SDRAM_2 0x01000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */ - -#define PHYS_FLASH_1 0x10000000 /* Flash Bank #1 */ -#define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip only, 16bit access) */ - -#define PHYS_FLASH_2 0x10200001 -#define PHYS_FLASH_2_SIZE 0x00200000 - -#define CONFIG_NETARM_EEPROM -/* #ifdef CONFIG_NETARM_EEPROM */ -#define PHYS_NVRAM_1 0x20000000 /* EEPROM Bank #1 */ -#define PHYS_NVRAM_SIZE 0x00002000 /* 8 KB */ -/* #endif */ - -#define PHYS_EXT_1 0x30000000 /* Extensions Bank #1 */ -#define PHYS_EXT_SIZE 0x01000000 /* 32 MB memory mapped I/O */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_SIZE PHYS_FLASH_1_SIZE - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */ -#define CONFIG_SYS_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -/* environment settings */ -#define CONFIG_ENV_IS_IN_FLASH -#undef CONFIG_ENV_IS_NOWHERE - -#define CONFIG_ENV_ADDR 0x1001C000 /* environment start address */ -#define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */ -#define CONFIG_ENV_SIZE 0x4000 /* max size for environment */ - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition, whole device */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nor0" -#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF -#define CONFIG_JFFS2_PART_OFFSET 0x00080000 - -/* mtdparts command line support */ -/* Note: fake mtd_id used, no linux mtd map file */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "nor0=modnet50-0" -#define MTDPARTS_DEFAULT "mtdparts=modnet50-0:-@512k(jffs2)" -*/ - -#endif /* __CONFIG_H */ diff --git a/include/configs/shannon.h b/include/configs/shannon.h deleted file mode 100644 index fce4121450..0000000000 --- a/include/configs/shannon.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - * - * Configuation settings for the Shannon/TuxScreen/IS2630 WebPhone Board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Since we use the Inferno-Loader to bring us to live, - * we skip the lowlevel init stuff. - * But U-Boot still relocates itself into RAM - */ -#define CONFIG_INFERNO /* we are using the inferno bootldr */ -#define CONFIG_SKIP_LOWLEVEL_INIT 1 - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SA1100 1 /* This is an SA1100 CPU */ -#define CONFIG_SHANNON 1 /* on an SHANNON/TuxScreen Board */ - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -/* we will never enable dcache, because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_DRIVER_3C589 1 - -/* - * select serial console configuration - */ -#define CONFIG_SA1100_SERIAL -#define CONFIG_SERIAL3 1 /* we use SERIAL 3 */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 115200 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200" -#define CONFIG_NETMASK 255.255.0.0 -#define CONFIG_BOOTCOMMAND "help" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "TuxScreen # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0xd0000000 /* default load address */ - -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CONFIG_SYS_CPUSPEED 0x09 /* 190 MHz for Shannon */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -#define CONFIG_DOS_PARTITION 1 /* DOS partitiion support */ - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -/* BE CAREFUL */ -#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of EDORAM */ -#define PHYS_SDRAM_1 0xc0000000 /* RAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x00400000 /* 4 MB */ -#define PHYS_SDRAM_2 0xc8000000 /* RAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x00400000 /* 4 MB */ -#define PHYS_SDRAM_3 0xd0000000 /* RAM Bank #3 */ -#define PHYS_SDRAM_3_SIZE 0x00400000 /* 4 MB */ -#define PHYS_SDRAM_4 0xd8000000 /* RAM Bank #4 */ -#define PHYS_SDRAM_4_SIZE 0x00400000 /* 4 MB */ - - -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */ - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_SECT (31+4) /* max number of sectors on one chip */ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#ifdef CONFIG_INFERNO -/* we take the last sector, 128 KB in size, but we only use 16 KB of it for stack reasons */ -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x003E0000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */ -#define CONFIG_ENV_SECT_SIZE (128 << 10) /* size of environment sector */ -#else -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */ -#endif - -/*----------------------------------------------------------------------- - * PCMCIA stuff - *----------------------------------------------------------------------- - * - */ - -/* we pick the upper one */ - -#define CONFIG_PCMCIA_SLOT_A - -#define CONFIG_SYS_PCMCIA_IO_ADDR (0x20000000) -#define CONFIG_SYS_PCMCIA_IO_SIZE ( 64 << 20 ) -#define CONFIG_SYS_PCMCIA_DMA_ADDR (0x24000000) -#define CONFIG_SYS_PCMCIA_DMA_SIZE ( 64 << 20 ) -#define CONFIG_SYS_PCMCIA_ATTRB_ADDR (0x2C000000) -#define CONFIG_SYS_PCMCIA_ATTRB_SIZE ( 64 << 20 ) -#define CONFIG_SYS_PCMCIA_MEM_ADDR (0x28000000) -#define CONFIG_SYS_PCMCIA_MEM_SIZE ( 64 << 20 ) - -/* in fact, MEM and ATTRB are swapped - has to be corrected soon in cmd_pcmcia or so */ - -/*----------------------------------------------------------------------- - * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter) - *----------------------------------------------------------------------- - */ - -#define CONFIG_IDE_PCCARD 1 /* Use IDE with PC Card Adapter */ - -#undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */ -#undef CONFIG_IDE_LED /* LED for ide not supported */ -#undef CONFIG_IDE_RESET /* reset for ide not supported */ - -#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ - -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 - -/* it's simple, all regs are in I/O space */ -#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_ATTRB_ADDR - -/* Offset for data I/O */ -#define CONFIG_SYS_ATA_DATA_OFFSET 0 - -/* Offset for normal register accesses */ -#define CONFIG_SYS_ATA_REG_OFFSET 0 - -/* Offset for alternate registers */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0 - -/*----------------------------------------------------------------------- - */ - -#endif /* __CONFIG_H */ diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h deleted file mode 100644 index 5f153e3538..0000000000 --- a/include/configs/zylonite.h +++ /dev/null @@ -1,238 +0,0 @@ -/* - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * Configuation settings for the Zylonite board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_CPU_MONAHANS 1 /* Intel Monahan CPU */ -#define CONFIG_CPU_PXA320 -#define CONFIG_ZYLONITE 1 /* Zylonite board */ - -/* #define CONFIG_LCD 1 */ -#ifdef CONFIG_LCD -#define CONFIG_SHARP_LM8V31 -#endif -#undef CONFIG_MMC -#define BOARD_LATE_INIT 1 - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - -/* we will never enable dcache, because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ - -#undef TURN_ON_ETHERNET -#ifdef TURN_ON_ETHERNET -# define CONFIG_SMC91111 1 -# define CONFIG_SMC91111_BASE 0x14000300 -# define CONFIG_SMC91111_EXT_PHY -# define CONFIG_SMC_USE_32_BIT -# undef CONFIG_SMC_USE_IOFUNCS /* just for use with the kernel */ -#endif - -/* - * select serial console configuration - */ -#define CONFIG_PXA_SERIAL -#define CONFIG_FFUART 1 - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE 115200 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#ifdef TURN_ON_ETHERNET - #define CONFIG_CMD_PING -#else - #define CONFIG_CMD_SAVEENV - #define CONFIG_CMD_NAND - - #undef CONFIG_CMD_NET - #undef CONFIG_CMD_FLASH - #undef CONFIG_CMD_IMLS -#endif - - -#define CONFIG_BOOTDELAY -1 -#define CONFIG_ETHADDR 08:00:3e:26:0a:5b -#define CONFIG_NETMASK 255.255.0.0 -#define CONFIG_IPADDR 192.168.0.21 -#define CONFIG_SERVERIP 192.168.0.250 -#define CONFIG_BOOTCOMMAND "bootm 80000" -#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200" -#define CONFIG_CMDLINE_TAG -#define CONFIG_TIMESTAMP - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_HUSH_PARSER 1 -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */ -#else -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#endif -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_DEVICE_NULLDEV 1 - -#define CONFIG_SYS_MEMTEST_START 0x9c000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x9c400000 /* 4 ... 8 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ - -#define CONFIG_SYS_HZ 1000 - -/* Monahans Core Frequency */ -#define CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */ -#define CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2 */ - - /* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -#ifdef CONFIG_MMC -#define CONFIG_PXA_MMC -#define CONFIG_CMD_MMC -#define CONFIG_SYS_MMC_BASE 0xF0000000 -#endif - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ -#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */ -#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */ -#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */ -#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */ - -#define CONFIG_SYS_DRAM_BASE 0x80000000 /* at CS0 */ -#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB Ram */ - -#undef CONFIG_SYS_SKIP_DRAM_SCRUB - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) - -/* - * NAND Flash - */ -#define CONFIG_SYS_NAND0_BASE 0x0 -#undef CONFIG_SYS_NAND1_BASE - -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ - -/* nand timeout values */ -#define CONFIG_SYS_NAND_PROG_ERASE_TO 3000 -#define CONFIG_SYS_NAND_OTHER_TO 100 -#define CONFIG_SYS_NAND_SENDCMD_RETRY 3 -#undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */ - -/* NAND Timing Parameters (in ns) */ -#define NAND_TIMING_tCH 10 -#define NAND_TIMING_tCS 0 -#define NAND_TIMING_tWH 20 -#define NAND_TIMING_tWP 40 - -#define NAND_TIMING_tRH 20 -#define NAND_TIMING_tRP 40 - -#define NAND_TIMING_tR 11123 -#define NAND_TIMING_tWHR 100 -#define NAND_TIMING_tAR 10 - -/* NAND debugging */ -#define CONFIG_SYS_DFC_DEBUG1 /* usefull */ -#undef CONFIG_SYS_DFC_DEBUG2 /* noisy */ -#undef CONFIG_SYS_DFC_DEBUG3 /* extremly noisy */ - -#define CONFIG_MTD_DEBUG -#define CONFIG_MTD_DEBUG_VERBOSE 1 - -#define CONFIG_SYS_NO_FLASH 1 - -#define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_OFFSET 0x40000 -#define CONFIG_ENV_OFFSET_REDUND 0x44000 -#define CONFIG_ENV_SIZE 0x4000 - - -#endif /* __CONFIG_H */ diff --git a/include/lattice.h b/include/lattice.h index e965663579..6a2cf93db1 100755 --- a/include/lattice.h +++ b/include/lattice.h @@ -302,8 +302,8 @@ void sclock(void); void ispVMDelay(unsigned short int a_usMicroSecondDelay); void calibration(void); -int lattice_load(Lattice_desc *desc, void *buf, size_t bsize); -int lattice_dump(Lattice_desc *desc, void *buf, size_t bsize); +int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize); +int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize); int lattice_info(Lattice_desc *desc); void ispVMStart(void); @@ -304,7 +304,7 @@ int eth_initialize(bd_t *bis) if (strchr(dev->name, ' ')) puts("\nWarning: eth device name has a space!\n"); - if (eth_write_hwaddr(dev, NULL, eth_number)) + if (eth_write_hwaddr(dev, "eth", eth_number)) puts("Warning: failed to set MAC address\n"); eth_number++; @@ -42,14 +42,4 @@ $(HOSTOBJS): $(obj)%.o: %.c $(NOPEDOBJS): $(obj)%.o: %.c $(HOSTCC) $(HOSTCFLAGS_NOPED) $(HOSTCFLAGS_$(@F)) $(HOSTCFLAGS_$(BCURDIR)) -o $@ $< -c -$(TOPDIR)/include/asm/arch/asm-offsets.h: $(TOPDIR)/include/autoconf.mk.dep \ - $(TOPDIR)/$(CPUDIR)/$(SOC)/asm-offsets.s - @echo Generating $@ - $(TOPDIR)/tools/scripts/make-asm-offsets $(TOPDIR)/$(CPUDIR)/$(SOC)/asm-offsets.s $@ - -$(TOPDIR)/$(CPUDIR)/$(SOC)/asm-offsets.s: $(TOPDIR)/include/autoconf.mk.dep \ - $(TOPDIR)/$(CPUDIR)/$(SOC)/asm-offsets.c - $(CC) -DDO_DEPS_ONLY \ - $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \ - -o $@ $(TOPDIR)/$(CPUDIR)/$(SOC)/asm-offsets.c -c -S ######################################################################### |