diff options
137 files changed, 3495 insertions, 1135 deletions
diff --git a/Licenses/r8a779x_usb3.txt b/Licenses/r8a779x_usb3.txt new file mode 100644 index 0000000000..e2afcc9e81 --- /dev/null +++ b/Licenses/r8a779x_usb3.txt @@ -0,0 +1,26 @@ +Copyright (c) 2014, Renesas Electronics Corporation +All rights reserved. + +Redistribution and use in binary form, without modification, are permitted +provided that the following conditions are met: + +1. Redistribution in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. +2. The name of Renesas Electronics Corporation may not be used to endorse or + promote products derived from this software without specific prior written + permission. +3. Reverse engineering, decompilation, or disassembly of this software is + not permitted. + +THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS ELECTRONICS CORPORATION DISCLAIMS +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, AND +NONINFRINGEMENT OF THIRD PARTY RIGHTS. IN NO EVENT SHALL RENESAS ELECTRONICS +CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. diff --git a/MAINTAINERS b/MAINTAINERS index 2a20b940c3..41c881f40f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -452,6 +452,12 @@ S: Maintained T: git git://git.denx.de/u-boot-usb.git F: drivers/usb/ +USB xHCI +M: Bin Meng <bmeng.cn@gmail.com> +S: Maintained +T: git git://git.denx.de/u-boot-usb.git topic-xhci +F: drivers/usb/host/xhci* + VIDEO M: Anatolij Gustschin <agust@denx.de> S: Maintained @@ -2362,6 +2362,13 @@ The following options need to be configured: CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for the bootcounter. CONFIG_BOOTCOUNT_ALEN = address len + CONFIG_BOOTCOUNT_EXT + enable support for the bootcounter in EXT filesystem + CONFIG_SYS_BOOTCOUNT_ADDR = RAM address used for read + and write. + CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE = interface + CONFIG_SYS_BOOTCOUNT_EXT_DEVPART = device and part + CONFIG_SYS_BOOTCOUNT_EXT_NAME = filename - Show boot progress: CONFIG_SHOW_BOOT_PROGRESS diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 8b9d5b4b08..816cdce2f3 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -43,6 +43,11 @@ #include <dt-bindings/clock/imx6qdl-clock.h> / { + aliases { + mmc1 = &usdhc3; + mmc2 = &usdhc4; + }; + memory { reg = <0x10000000 0x80000000>; }; @@ -100,6 +105,7 @@ }; &usdhc3 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; @@ -165,6 +171,7 @@ }; pinctrl_usdhc3: usdhc3grp { + u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070 diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi index a485c3eb95..06d9bc3a42 100644 --- a/arch/arm/dts/imx6qdl-icore.dtsi +++ b/arch/arm/dts/imx6qdl-icore.dtsi @@ -118,6 +118,7 @@ }; &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; @@ -208,6 +209,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070 diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index b13b0b2db8..e04b57089a 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -77,6 +77,7 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; + u-boot,dm-spl; dma_apbh: dma-apbh@00110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; @@ -225,6 +226,7 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; + u-boot,dm-spl; spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -516,6 +518,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + u-boot,dm-spl; }; gpio2: gpio@020a0000 { @@ -805,6 +808,7 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; reg = <0x020e0000 0x4000>; + u-boot,dm-spl; }; ldb: ldb@020e0008 { @@ -889,6 +893,7 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; + u-boot,dm-spl; crypto: caam@2100000 { compatible = "fsl,sec-v4.0"; diff --git a/arch/arm/dts/imx6ul-geam-kit.dts b/arch/arm/dts/imx6ul-geam-kit.dts index 07c21cb0a2..15e3f94153 100644 --- a/arch/arm/dts/imx6ul-geam-kit.dts +++ b/arch/arm/dts/imx6ul-geam-kit.dts @@ -87,6 +87,7 @@ }; &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>; @@ -134,6 +135,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 @@ -145,6 +147,7 @@ }; pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 @@ -156,6 +159,7 @@ }; pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 diff --git a/arch/arm/dts/imx6ul-isiot-emmc.dts b/arch/arm/dts/imx6ul-isiot-emmc.dts index 677de96473..a611e3bba5 100644 --- a/arch/arm/dts/imx6ul-isiot-emmc.dts +++ b/arch/arm/dts/imx6ul-isiot-emmc.dts @@ -50,6 +50,7 @@ }; &usdhc2 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; @@ -60,6 +61,7 @@ &iomuxc { pinctrl_usdhc2: usdhc2grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi index 9a3c35c56a..5007a88f45 100644 --- a/arch/arm/dts/imx6ul-isiot.dtsi +++ b/arch/arm/dts/imx6ul-isiot.dtsi @@ -82,6 +82,7 @@ }; &usdhc1 { + u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; @@ -128,6 +129,7 @@ }; pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi index def5f8cac9..7affab866f 100644 --- a/arch/arm/dts/imx6ul.dtsi +++ b/arch/arm/dts/imx6ul.dtsi @@ -134,6 +134,7 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; + u-boot,dm-spl; pmu { compatible = "arm,cortex-a7-pmu"; @@ -185,6 +186,7 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; + u-boot,dm-spl; spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -415,6 +417,7 @@ #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>, <&iomuxc 16 33 16>; + u-boot,dm-spl; }; gpio2: gpio@020a0000 { @@ -451,6 +454,7 @@ interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>; + u-boot,dm-spl; }; gpio5: gpio@020ac000 { @@ -649,6 +653,7 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6ul-iomuxc"; reg = <0x020e0000 0x4000>; + u-boot,dm-spl; }; gpr: iomuxc-gpr@020e4000 { @@ -729,6 +734,7 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; + u-boot,dm-spl; usbotg1: usb@02184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h index b61c7b970a..7fea569176 100644 --- a/arch/arm/include/asm/arch-mx5/crm_regs.h +++ b/arch/arm/include/asm/arch-mx5/crm_regs.h @@ -210,6 +210,14 @@ struct mxc_ccm_reg { #define MXC_CCM_CSCMR1_SSI_EXT2_COM_CLK_SEL (0x1 << 1) #define MXC_CCM_CSCMR1_SSI_EXT1_COM_CLK_SEL 0x1 +/* Define the bits in register CSCMR2 */ +#define MXC_CCM_CSCMR2_DI0_CLK_SEL_OFFSET 26 +#define MXC_CCM_CSCMR2_DI0_CLK_SEL_MASK (0x7 << 26) +#define MXC_CCM_CSCMR2_DI0_CLK_SEL(v) (((v) & 0x7) << 26) +#define MXC_CCM_CSCMR2_DI0_CLK_SEL_RD(r) (((r) >> 26) & 0x7) + +#define MXC_CCM_CSCMR2_DI0_CLK_SEL_LDB_DI0_CLK 5 + /* Define the bits in register CSCDR2 */ #define MXC_CCM_CSCDR2_CSPI_CLK_PRED_OFFSET 25 #define MXC_CCM_CSCDR2_CSPI_CLK_PRED_MASK (0x7 << 25) diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 3e79fa3224..61c8d440f8 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -416,6 +416,39 @@ struct iomuxc { }; #endif +#define IOMUXC_GPR2_BITMAP_SPWG 0 +#define IOMUXC_GPR2_BITMAP_JEIDA 1 + +#define IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET 6 +#define IOMUXC_GPR2_BIT_MAPPING_CH0_MASK (1 << IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET) +#define IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA (IOMUXC_GPR2_BITMAP_JEIDA << \ + IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET) +#define IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG (IOMUXC_GPR2_BITMAP_SPWG << \ + IOMUXC_GPR2_BIT_MAPPING_CH0_OFFSET) + +#define IOMUXC_GPR2_DATA_WIDTH_18 0 +#define IOMUXC_GPR2_DATA_WIDTH_24 1 + +#define IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET 5 +#define IOMUXC_GPR2_DATA_WIDTH_CH0_MASK (1 << IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET) +#define IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT (IOMUXC_GPR2_DATA_WIDTH_18 << \ + IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET) +#define IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT (IOMUXC_GPR2_DATA_WIDTH_24 << \ + IOMUXC_GPR2_DATA_WIDTH_CH0_OFFSET) + +#define IOMUXC_GPR2_MODE_DISABLED 0 +#define IOMUXC_GPR2_MODE_ENABLED_DI0 1 +#define IOMUXC_GPR2_MODE_ENABLED_DI1 3 + +#define IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET 0 +#define IOMUXC_GPR2_LVDS_CH0_MODE_MASK (3 << IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) +#define IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED (IOMUXC_GPR2_MODE_DISABLED << \ + IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) +#define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 (IOMUXC_GPR2_MODE_ENABLED_DI0 << \ + IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) +#define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI1 (IOMUXC_GPR2_MODE_ENABLED_DI1 << \ + IOMUXC_GPR2_LVDS_CH0_MODE_OFFSET) + /* System Reset Controller (SRC) */ struct src { u32 scr; @@ -508,6 +541,23 @@ struct fuse_bank4_regs { }; #endif +#define PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) +#define PWMCR_DOZEEN (1 << 24) +#define PWMCR_WAITEN (1 << 23) +#define PWMCR_DBGEN (1 << 22) +#define PWMCR_CLKSRC_IPG_HIGH (2 << 16) +#define PWMCR_CLKSRC_IPG (1 << 16) +#define PWMCR_EN (1 << 0) + +struct pwm_regs { + u32 cr; + u32 sr; + u32 ir; + u32 sar; + u32 pr; + u32 cnr; +}; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MX5_IMX_REGS_H__ */ diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 624ccecfd6..7736b6a8ac 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -367,7 +367,7 @@ #include <asm/types.h> /* only for i.MX6SX/UL */ -#define WDOG3_BASE_ADDR ((is_mx6ul() ? \ +#define WDOG3_BASE_ADDR (((is_mx6ul() || is_mx6ull()) ? \ MX6UL_WDOG3_BASE_ADDR : MX6SX_WDOG3_BASE_ADDR)) #define LCDIF1_BASE_ADDR ((is_cpu_type(MXC_CPU_MX6SLL)) ? \ MX6SLL_LCDIF_BASE_ADDR : \ diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h index 8d21eb7bee..b541e2caa1 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h @@ -589,7 +589,12 @@ enum { PMUGRF_GPIO1C3_SEL_SHIFT = 6, PMUGRF_GPIO1C3_SEL_MASK = 3 << PMUGRF_GPIO1C3_SEL_SHIFT, PMUGRF_PWM_2 = 1, - + PMUGRF_GPIO1C4_SEL_SHIFT = 8, + PMUGRF_GPIO1C4_SEL_MASK = 3 << PMUGRF_GPIO1C4_SEL_SHIFT, + PMUGRF_I2C8PMU_SDA = 1, + PMUGRF_GPIO1C5_SEL_SHIFT = 10, + PMUGRF_GPIO1C5_SEL_MASK = 3 << PMUGRF_GPIO1C5_SEL_SHIFT, + PMUGRF_I2C8PMU_SCL = 1, }; /* GRF_SOC_CON5 */ diff --git a/arch/arm/include/asm/arch-rockchip/periph.h b/arch/arm/include/asm/arch-rockchip/periph.h index 9f4bc2e107..77cf5b9450 100644 --- a/arch/arm/include/asm/arch-rockchip/periph.h +++ b/arch/arm/include/asm/arch-rockchip/periph.h @@ -24,6 +24,9 @@ enum periph_id { PERIPH_ID_I2C3, PERIPH_ID_I2C4, PERIPH_ID_I2C5, + PERIPH_ID_I2C6, + PERIPH_ID_I2C7, + PERIPH_ID_I2C8, PERIPH_ID_SPI0, PERIPH_ID_SPI1, PERIPH_ID_SPI2, diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 703634334f..a80a392a73 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -105,7 +105,7 @@ void set_chipselect_size(int const); void init_aips(void); void init_src(void); -void imx_set_wdog_powerdown(bool enable); +void imx_wdog_disable_powerdown(void); int board_mmc_get_env_dev(int devno); diff --git a/arch/arm/mach-imx/init.c b/arch/arm/mach-imx/init.c index 720ad672a6..0aa8295751 100644 --- a/arch/arm/mach-imx/init.c +++ b/arch/arm/mach-imx/init.c @@ -65,7 +65,7 @@ void init_aips(void) } } -void imx_set_wdog_powerdown(bool enable) +void imx_wdog_disable_powerdown(void) { struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR; struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR; @@ -75,13 +75,13 @@ void imx_set_wdog_powerdown(bool enable) #endif /* Write to the PDE (Power Down Enable) bit */ - writew(enable, &wdog1->wmcr); - writew(enable, &wdog2->wmcr); + writew(0, &wdog1->wmcr); + writew(0, &wdog2->wmcr); - if (is_mx6sx() || is_mx6ul() || is_mx7()) - writew(enable, &wdog3->wmcr); + if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx7()) + writew(0, &wdog3->wmcr); #ifdef CONFIG_MX7D - writew(enable, &wdog4->wmcr); + writew(0, &wdog4->wmcr); #endif } diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index d96020d847..250194b623 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -46,6 +46,12 @@ config TARGET_MX53LOCO select BOARD_LATE_INIT select MX53 +config TARGET_MX53PPD + bool "Support mx53ppd" + select MX53 + help + Enable support for the GE Healthcare PPD. + config TARGET_MX53SMD bool "Support mx53smd" select MX53 @@ -70,6 +76,7 @@ source "board/freescale/mx53ard/Kconfig" source "board/freescale/mx53evk/Kconfig" source "board/freescale/mx53loco/Kconfig" source "board/freescale/mx53smd/Kconfig" +source "board/ge/mx53ppd/Kconfig" source "board/inversepath/usbarmory/Kconfig" source "board/technologic/ts4800/Kconfig" diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index fd73c67fde..bee7eabe02 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -109,6 +109,7 @@ config TARGET_ARISTAINETOS2B config TARGET_CGTQMX6EVAL bool "cgtqmx6eval" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL select DM @@ -117,6 +118,7 @@ config TARGET_CGTQMX6EVAL config TARGET_CM_FX6 bool "CM-FX6" select SUPPORT_SPL + select MX6QDL select DM select DM_SERIAL select DM_GPIO @@ -131,6 +133,7 @@ config TARGET_COLIBRI_IMX6 config TARGET_DHCOMIMX6 bool "dh_imx6" + select MX6QDL select BOARD_LATE_INIT select BOARD_EARLY_INIT_F select SUPPORT_SPL @@ -165,6 +168,7 @@ config TARGET_GE_B850V3 config TARGET_GW_VENTANA bool "gw_ventana" + select MX6QDL select SUPPORT_SPL imply CMD_SATA imply CMD_SPL @@ -176,10 +180,12 @@ config TARGET_KOSAGI_NOVENA config TARGET_MCCMON6 bool "mccmon6" + select MX6QDL select SUPPORT_SPL config TARGET_MX6CUBOXI bool "Solid-run mx6 boards" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL @@ -199,23 +205,8 @@ config TARGET_MX6LOGICPD config TARGET_MX6QARM2 bool "mx6qarm2" -config TARGET_MX6Q_ICORE - bool "Support Engicam i.Core" - select BOARD_LATE_INIT - select MX6QDL - select OF_CONTROL - select SPL_OF_LIBFDT - select DM - select DM_ETH - select DM_GPIO - select DM_I2C - select DM_MMC - select DM_THERMAL - select SUPPORT_SPL - select SPL_LOAD_FIT - -config TARGET_MX6Q_ICORE_RQS - bool "Support Engicam i.Core RQS" +config TARGET_MX6Q_ENGICAM + bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT select MX6QDL select OF_CONTROL @@ -228,9 +219,14 @@ config TARGET_MX6Q_ICORE_RQS select DM_THERMAL select SUPPORT_SPL select SPL_LOAD_FIT + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL config TARGET_MX6SABREAUTO bool "mx6sabreauto" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL select DM @@ -239,6 +235,7 @@ config TARGET_MX6SABREAUTO config TARGET_MX6SABRESD bool "mx6sabresd" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL select DM @@ -288,20 +285,8 @@ config TARGET_MX6UL_14X14_EVK select DM_THERMAL select SUPPORT_SPL -config TARGET_MX6UL_GEAM - bool "Support Engicam GEAM6UL" - select BOARD_LATE_INIT - select MX6UL - select OF_CONTROL - select DM - select DM_ETH - select DM_GPIO - select DM_I2C - select DM_MMC - select DM_THERMAL - select SUPPORT_SPL -config TARGET_MX6UL_ISIOT - bool "Support Engicam Is.IoT MX6UL" +config TARGET_MX6UL_ENGICAM + bool "Support Engicam GEAM6UL/Is.IoT" select BOARD_LATE_INIT select MX6UL select OF_CONTROL @@ -312,6 +297,10 @@ config TARGET_MX6UL_ISIOT select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL config TARGET_MX6ULL_14X14_EVK bool "Support mx6ull_14x14_evk" @@ -360,6 +349,7 @@ config TARGET_PCM058 config TARGET_PFLA02 bool "Phytec PFLA02 (PhyFlex) i.MX6 Quad" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL @@ -378,6 +368,7 @@ config TARGET_TQMA6 config TARGET_UDOO bool "udoo" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL @@ -398,6 +389,7 @@ config TARGET_SAMTEC_VINING_2000 config TARGET_WANDBOARD bool "wandboard" + select MX6QDL select BOARD_LATE_INIT select SUPPORT_SPL @@ -446,10 +438,8 @@ source "board/congatec/cgtqmx6eval/Kconfig" source "board/dhelectronics/dh_imx6/Kconfig" source "board/el/el6x/Kconfig" source "board/embest/mx6boards/Kconfig" -source "board/engicam/geam6ul/Kconfig" -source "board/engicam/icorem6/Kconfig" -source "board/engicam/icorem6_rqs/Kconfig" -source "board/engicam/isiotmx6ul/Kconfig" +source "board/engicam/imx6q/Kconfig" +source "board/engicam/imx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6sabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig" diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index ad72c12511..43cb58106b 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -436,7 +436,7 @@ int arch_cpu_init(void) if (is_mx6sl()) setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK); - imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */ + imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */ if (is_mx6sx()) setbits_le32(&ccm->cscdr1, MXC_CCM_CSCDR1_UART_CLK_SEL); diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 87bf105f38..d160e80146 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -236,7 +236,7 @@ int arch_cpu_init(void) init_csu(); /* Disable PDE bit of WMCR register */ - imx_set_wdog_powerdown(false); + imx_wdog_disable_powerdown(); imx_enet_mdio_fixup(); diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 2127f2bbe8..7e1f864383 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,9 +23,11 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) -ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0) +# Always include boot_mode.o, as we bypass it (i.e. turn it off) +# inside of boot_mode.c when CONFIG_BOOT_MODE_REG is 0. This way, +# we can have the preprocessor correctly recognise both 0x0 and 0 +# meaning "turn it off". obj-y += boot_mode.o -endif obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c index 942849f2f8..d7dd425aae 100644 --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -9,6 +9,15 @@ #include <asm/io.h> #include <asm/arch/boot_mode.h> +#if (CONFIG_ROCKCHIP_BOOT_MODE_REG == 0) + +int setup_boot_mode(void) +{ + return 0; +} + +#else + void set_back_to_bootrom_dnl_flag(void) { writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); @@ -74,3 +83,5 @@ int setup_boot_mode(void) return 0; } + +#endif diff --git a/board/compulab/cm_t54/cm_t54.c b/board/compulab/cm_t54/cm_t54.c index 31730a4d1c..3e6235a3b7 100644 --- a/board/compulab/cm_t54/cm_t54.c +++ b/board/compulab/cm_t54/cm_t54.c @@ -246,7 +246,7 @@ int ehci_hcd_stop(void) return ret; } -void usb_hub_reset_devices(int port) +void usb_hub_reset_devices(struct usb_hub_device *hub, int port) { /* The LAN9730 needs to be reset after the port power has been set. */ if (port == 3) { diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index e22ff5c8c6..bb98f39f02 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -140,40 +140,39 @@ static const struct mx6sdl_iomux_grp_regs dhcom6sdl_grp_ioregs = { }; static const struct mx6_mmdc_calibration dhcom_mmdc_calib = { - .p0_mpwldectrl0 = 0x001F001F, - .p0_mpwldectrl1 = 0x001F001F, - .p1_mpwldectrl0 = 0x00440044, - .p1_mpwldectrl1 = 0x00440044, - .p0_mpdgctrl0 = 0x434B0350, - .p0_mpdgctrl1 = 0x034C0359, - .p1_mpdgctrl0 = 0x434B0350, - .p1_mpdgctrl1 = 0x03650348, - .p0_mprddlctl = 0x4436383B, - .p1_mprddlctl = 0x39393341, - .p0_mpwrdlctl = 0x35373933, - .p1_mpwrdlctl = 0x48254A36, + .p0_mpwldectrl0 = 0x0011000E, + .p0_mpwldectrl1 = 0x000E001B, + .p1_mpwldectrl0 = 0x00190015, + .p1_mpwldectrl1 = 0x00070018, + .p0_mpdgctrl0 = 0x42720306, + .p0_mpdgctrl1 = 0x026F0266, + .p1_mpdgctrl0 = 0x4273030A, + .p1_mpdgctrl1 = 0x02740240, + .p0_mprddlctl = 0x45393B3E, + .p1_mprddlctl = 0x403A3747, + .p0_mpwrdlctl = 0x40434541, + .p1_mpwrdlctl = 0x473E4A3B, }; static const struct mx6_ddr3_cfg dhcom_mem_ddr = { .mem_speed = 1600, - .density = 4, + .density = 2, .width = 64, .banks = 8, .rowaddr = 14, .coladdr = 10, .pagesz = 2, - .trcd = 1375, - .trcmin = 4875, - .trasmin = 3500, + .trcd = 1312, + .trcmin = 5863, + .trasmin = 3750, }; static const struct mx6_ddr_sysinfo dhcom_ddr_info = { /* width of data bus:0=16,1=32,2=64 */ .dsize = 2, - /* config for full 4GB range so that get_mem_size() works */ - .cs_density = 32, /* 32Gb per CS */ + .cs_density = 16, .ncs = 1, /* single chip select */ - .cs1_mirror = 0, + .cs1_mirror = 1, .rtt_wr = 1, /* DDR3_RTT_60_OHM, RTT_Wr = RZQ/4 */ .rtt_nom = 1, /* DDR3_RTT_60_OHM, RTT_Nom = RZQ/4 */ .walat = 1, /* Write additional latency */ @@ -182,6 +181,8 @@ static const struct mx6_ddr_sysinfo dhcom_ddr_info = { .bi_on = 1, /* Bank interleaving enabled */ .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ + .refsel = 1, /* Refresh cycles at 32KHz */ + .refr = 3, /* 4 refresh commands per refresh cycle */ }; static void ccgr_init(void) @@ -388,7 +389,6 @@ void board_init_f(ulong dummy) /* Perform DDR DRAM calibration */ udelay(100); - mmdc_do_write_level_calibration(&dhcom_ddr_info); mmdc_do_dqs_calibration(&dhcom_ddr_info); /* Clear the BSS. */ diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c index c7ec55ff82..f633c71916 100644 --- a/board/engicam/common/board.c +++ b/board/engicam/common/board.c @@ -32,6 +32,30 @@ static void mmc_late_init(void) } #endif +static void setenv_fdt_file(void) +{ + const char *cmp_dtb = CONFIG_DEFAULT_DEVICE_TREE; + + if (!strcmp(cmp_dtb, "imx6q-icore")) { + if (is_mx6dq()) + env_set("fdt_file", "imx6q-icore.dtb"); + else if(is_mx6dl() || is_mx6solo()) + env_set("fdt_file", "imx6dl-icore.dtb"); + } else if (!strcmp(cmp_dtb, "imx6q-icore-rqs")) { + if (is_mx6dq()) + env_set("fdt_file", "imx6q-icore-rqs.dtb"); + else if(is_mx6dl() || is_mx6solo()) + env_set("fdt_file", "imx6dl-icore-rqs.dtb"); + } else if (!strcmp(cmp_dtb, "imx6ul-geam-kit")) + env_set("fdt_file", "imx6ul-geam-kit.dtb"); + else if (!strcmp(cmp_dtb, "imx6ul-isiot-mmc")) + env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); + else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc")) + env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); + else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand")) + env_set("fdt_file", "imx6ul-isiot-nand.dtb"); +} + int board_late_init(void) { switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >> diff --git a/board/engicam/common/board.h b/board/engicam/common/board.h index f364a23296..c720b0bcd0 100644 --- a/board/engicam/common/board.h +++ b/board/engicam/common/board.h @@ -6,7 +6,6 @@ #ifndef _BOARD_H_ #define _BOARD_H_ -void setenv_fdt_file(void); void setup_gpmi_nand(void); void setup_display(void); #endif /* _BOARD_H_ */ diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c index 8711418fb4..6e2389dd4b 100644 --- a/board/engicam/common/spl.c +++ b/board/engicam/common/spl.c @@ -39,6 +39,48 @@ static iomux_v3_cfg_t const uart_pads[] = { #endif }; +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + if (is_mx6dq() && !strcmp(name, "imx6q-icore")) + return 0; + else if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs")) + return 0; + else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore")) + return 0; + else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs")) + return 0; + else + return -1; +} +#endif + +#ifdef CONFIG_ENV_IS_IN_MMC +void board_boot_order(u32 *spl_boot_list) +{ + u32 bmode = imx6_src_get_boot_mode(); + u8 boot_dev = BOOT_DEVICE_MMC1; + + switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: + /* SD/eSD - BOOT_DEVICE_MMC1 */ + break; + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: + /* MMC/eMMC */ + boot_dev = BOOT_DEVICE_MMC2; + break; + default: + /* Default - BOOT_DEVICE_MMC1 */ + printf("Wrong board boot order\n"); + break; + } + + spl_boot_list[0] = boot_dev; +} +#endif + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { diff --git a/board/engicam/geam6ul/MAINTAINERS b/board/engicam/geam6ul/MAINTAINERS deleted file mode 100644 index 2b882d245a..0000000000 --- a/board/engicam/geam6ul/MAINTAINERS +++ /dev/null @@ -1,8 +0,0 @@ -GEAM6UL BOARD -M: Jagan Teki <jagan@amarulasolutions.com> -S: Maintained -F: board/engicam/geam6ul -F: include/configs/imx6-engicam.h -F: configs/imx6ul_geam_mmc_defconfig -F: configs/imx6ul_geam_nand_defconfig -F: arch/arm/dts/imx6ul-geam-kit.dts diff --git a/board/engicam/geam6ul/README b/board/engicam/geam6ul/README deleted file mode 100644 index 0df6ae4a8c..0000000000 --- a/board/engicam/geam6ul/README +++ /dev/null @@ -1,28 +0,0 @@ -How to use U-Boot on Engicam GEAM6UL Starter Kit: -------------------------------------------------- - -- Configure U-Boot for Engicam GEAM6UL: - -$ make mrproper -$ make imx6ul_geam_mmc_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/icorem6_rqs/Kconfig b/board/engicam/icorem6_rqs/Kconfig deleted file mode 100644 index 6dc3a076c4..0000000000 --- a/board/engicam/icorem6_rqs/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6Q_ICORE_RQS - -config SYS_BOARD - default "icorem6_rqs" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/icorem6_rqs/MAINTAINERS b/board/engicam/icorem6_rqs/MAINTAINERS deleted file mode 100644 index 9a74265eea..0000000000 --- a/board/engicam/icorem6_rqs/MAINTAINERS +++ /dev/null @@ -1,9 +0,0 @@ -ICOREM6QDL_RQS BOARD -M: Jagan Teki <jagan@amarulasolutions.com> -S: Maintained -F: board/engicam/icorem6_rqs -F: include/configs/imx6-engicam.h -F: configs/imx6qdl_icore_rqs_defconfig -F: arch/arm/dts/imx6qdl-icore-rqs.dtsi -F: arch/arm/dts/imx6q-icore-rqs.dts -F: arch/arm/dts/imx6dl-icore-rqs.dts diff --git a/board/engicam/icorem6_rqs/Makefile b/board/engicam/icorem6_rqs/Makefile deleted file mode 100644 index 2e3933c698..0000000000 --- a/board/engicam/icorem6_rqs/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := icorem6_rqs.o diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 01148894c3..a55a754bc7 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -6,129 +6,20 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> -#include <mmc.h> - -#include <asm/io.h> -#include <asm/gpio.h> -#include <linux/sizes.h> - -#include <asm/arch/clock.h> -#include <asm/arch/crm_regs.h> -#include <asm/arch/iomux.h> -#include <asm/arch/mx6-pins.h> #include <asm/arch/sys_proto.h> -#include <asm/mach-imx/iomux-v3.h> - -#include "../common/board.h" DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_ENV_IS_IN_MMC int board_mmc_get_env_dev(int devno) { - return devno; + return devno - 1; } #endif -void setenv_fdt_file(void) -{ - if (is_mx6dq()) - env_set("fdt_file", "imx6q-icore-rqs.dtb"); - else if(is_mx6dl() || is_mx6solo()) - env_set("fdt_file", "imx6dl-icore-rqs.dtb"); -} - #ifdef CONFIG_SPL_BUILD #include <spl.h> -/* MMC board initialization is needed till adding DM support in SPL */ -#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) -#include <mmc.h> -#include <fsl_esdhc.h> - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc3_pads[] = { - IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), -}; - -struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC3_BASE_ADDR, 1, 4}, - {USDHC4_BASE_ADDR, 1, 8}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC3_BASE_ADDR: - case USDHC4_BASE_ADDR: - ret = 1; - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC3 - * mmc1 USDHC4 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - SETUP_IOMUX_PADS(usdhc3_pads); - usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - break; - case 1: - SETUP_IOMUX_PADS(usdhc4_pads); - usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - break; - default: - printf("Warning - USDHC%d controller not supporting\n", - i + 1); - return 0; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -} - #ifdef CONFIG_ENV_IS_IN_MMC void board_boot_order(u32 *spl_boot_list) { @@ -154,17 +45,4 @@ void board_boot_order(u32 *spl_boot_list) spl_boot_list[0] = boot_dev; } #endif -#endif - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs")) - return 0; - else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs")) - return 0; - else - return -1; -} -#endif #endif /* CONFIG_SPL_BUILD */ diff --git a/board/engicam/geam6ul/Kconfig b/board/engicam/imx6q/Kconfig index 7f4023e1ec..48eb60c09a 100644 --- a/board/engicam/geam6ul/Kconfig +++ b/board/engicam/imx6q/Kconfig @@ -1,7 +1,7 @@ -if TARGET_MX6UL_GEAM +if TARGET_MX6Q_ENGICAM config SYS_BOARD - default "geam6ul" + default "imx6q" config SYS_VENDOR default "engicam" diff --git a/board/engicam/icorem6/MAINTAINERS b/board/engicam/imx6q/MAINTAINERS index a348bdde9e..82efb462c0 100644 --- a/board/engicam/icorem6/MAINTAINERS +++ b/board/engicam/imx6q/MAINTAINERS @@ -1,10 +1,14 @@ -ICOREM6QDL BOARD +MX6Q_ENGICAM BOARD M: Jagan Teki <jagan@amarulasolutions.com> S: Maintained -F: board/engicam/icorem6 +F: board/engicam/imx6q F: include/configs/imx6-engicam.h F: configs/imx6qdl_icore_mmc_defconfig F: configs/imx6qdl_icore_nand_defconfig +F: configs/imx6qdl_icore_rqs_defconfig F: arch/arm/dts/imx6qdl-icore.dtsi F: arch/arm/dts/imx6q-icore.dts F: arch/arm/dts/imx6dl-icore.dts +F: arch/arm/dts/imx6qdl-icore-rqs.dtsi +F: arch/arm/dts/imx6q-icore-rqs.dts +F: arch/arm/dts/imx6dl-icore-rqs.dts diff --git a/board/engicam/geam6ul/Makefile b/board/engicam/imx6q/Makefile index 0e367e2172..ef2fb6acaa 100644 --- a/board/engicam/geam6ul/Makefile +++ b/board/engicam/imx6q/Makefile @@ -3,4 +3,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := geam6ul.o +obj-y := imx6q.o diff --git a/board/engicam/icorem6_rqs/README b/board/engicam/imx6q/README index 97e978cd6f..3f3478cc89 100644 --- a/board/engicam/icorem6_rqs/README +++ b/board/engicam/imx6q/README @@ -1,9 +1,12 @@ -How to use U-Boot on Engicam i.CoreM6 RQS Solo/DualLite and Quad/Dual Starter Kit: ----------------------------------------------------------------------------------- +Hsow to use U-Boot on Engicam i.CoreM6 (RQS) Solo/DualLite/Quad/Dual Starter Kit: +-------------------------------------------------------------------------------- $ make mrproper -- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Dual/Solo/DualLite: +- Configure U-Boot for Engicam i.CoreM6 Quad/Duali/Solo/DualLite: +$ make imx6qdl_icore_mmc_defconfig + +- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Duali/Solo/DualLite: $ make imx6qdl_icore_rqs_defconfig - Build U-Boot diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/imx6q/imx6q.c index 3d4f713c3e..fe37088b49 100644 --- a/board/engicam/icorem6/icorem6.c +++ b/board/engicam/imx6q/imx6q.c @@ -7,7 +7,6 @@ */ #include <common.h> -#include <mmc.h> #include <asm/io.h> #include <asm/gpio.h> @@ -26,13 +25,12 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_NAND_MXS - #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) #define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ PAD_CTL_SRE_FAST) #define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) -iomux_v3_cfg_t gpmi_pads[] = { +static iomux_v3_cfg_t gpmi_pads[] = { IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), IOMUX_PADS(PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), @@ -192,96 +190,10 @@ void setup_display(void) } #endif /* CONFIG_VIDEO_IPUV3 */ -void setenv_fdt_file(void) -{ - if (is_mx6dq()) - env_set("fdt_file", "imx6q-icore.dtb"); - else if(is_mx6dl() || is_mx6solo()) - env_set("fdt_file", "imx6dl-icore.dtb"); -} - -#ifdef CONFIG_SPL_BUILD -/* MMC board initialization is needed till adding DM support in SPL */ -#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) -#include <mmc.h> -#include <fsl_esdhc.h> - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc1_pads[] = { - IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL)),/* CD */ -}; - -#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1) - -struct fsl_esdhc_cfg usdhc_cfg[1] = { - {USDHC1_BASE_ADDR, 0, 4}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC1_BASE_ADDR: - ret = !gpio_get_value(USDHC1_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC1 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - SETUP_IOMUX_PADS(usdhc1_pads); - gpio_direction_input(USDHC1_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - break; - default: - printf("Warning - USDHC%d controller not supporting\n", - i + 1); - return 0; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -} -#endif - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) +#ifdef CONFIG_ENV_IS_IN_MMC +int board_mmc_get_env_dev(int devno) { - if (is_mx6dq() && !strcmp(name, "imx6q-icore")) - return 0; - else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore")) - return 0; - else - return -1; + /* i.CoreM6 RQS has USDHC3 for SD and USDHC4 for eMMC */ + return (devno == 0) ? 0: (devno - 1); } #endif -#endif /* CONFIG_SPL_BUILD */ diff --git a/board/engicam/icorem6/Kconfig b/board/engicam/imx6ul/Kconfig index 4a1c9ac436..e91dd15970 100644 --- a/board/engicam/icorem6/Kconfig +++ b/board/engicam/imx6ul/Kconfig @@ -1,7 +1,7 @@ -if TARGET_MX6Q_ICORE +if TARGET_MX6UL_ENGICAM config SYS_BOARD - default "icorem6" + default "imx6ul" config SYS_VENDOR default "engicam" diff --git a/board/engicam/isiotmx6ul/MAINTAINERS b/board/engicam/imx6ul/MAINTAINERS index 9b66c8db39..37f84f8cc0 100644 --- a/board/engicam/isiotmx6ul/MAINTAINERS +++ b/board/engicam/imx6ul/MAINTAINERS @@ -1,11 +1,14 @@ -ISIOTMX6UL BOARD +MX6UL_ENGICAM BOARD M: Jagan Teki <jagan@amarulasolutions.com> S: Maintained -F: board/engicam/isiotmx6ul +F: board/engicam/imx6ul F: include/configs/imx6-engicam.h -F: configs/imx6ul_isiot_mmc_defconfig +F: configs/imx6ul_geam_mmc_defconfig +F: configs/imx6ul_geam_nand_defconfig F: configs/imx6ul_isiot_emmc_defconfig +F: configs/imx6ul_isiot_mmc_defconfig F: configs/imx6ul_isiot_nand_defconfig +F: arch/arm/dts/imx6ul-geam-kit.dts F: arch/arm/dts/imx6ul-isiot.dtsi F: arch/arm/dts/imx6ul-isiot-mmc.dts F: arch/arm/dts/imx6ul-isiot-emmc.dts diff --git a/board/engicam/icorem6/Makefile b/board/engicam/imx6ul/Makefile index 9ec9ecdafb..c78c7e40fb 100644 --- a/board/engicam/icorem6/Makefile +++ b/board/engicam/imx6ul/Makefile @@ -3,4 +3,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := icorem6.o +obj-y := imx6ul.o diff --git a/board/engicam/icorem6/README b/board/engicam/imx6ul/README index 3779e9665d..1e85f618f1 100644 --- a/board/engicam/icorem6/README +++ b/board/engicam/imx6ul/README @@ -1,10 +1,13 @@ -How to use U-Boot on Engicam i.CoreM6 Solo/DualLite and Quad/Dual Starter Kit: ------------------------------------------------------------------------------ +Hsow to use U-Boot on Engicam GEAM6UL and Is.IoT MX6UL Starter Kit: +------------------------------------------------------------------- $ make mrproper -- Configure U-Boot for Engicam i.CoreM6 Quad/Dual/Solo/DualLite: -$ make imx6qdl_icore_mmc_defconfig +- Configure U-Boot for Engicam GEAM6UL: +$ make imx6ul_geam_mmc_defconfig + +- Configure U-Boot for Engicam Is.IoT MX6UL: +$ make imx6ul_isiot_mmc_defconfig - Build U-Boot $ make diff --git a/board/engicam/geam6ul/geam6ul.c b/board/engicam/imx6ul/imx6ul.c index ffd383a0ee..a903a3603b 100644 --- a/board/engicam/geam6ul/geam6ul.c +++ b/board/engicam/imx6ul/imx6ul.c @@ -90,88 +90,10 @@ void setup_gpmi_nand(void) } #endif /* CONFIG_NAND_MXS */ -void setenv_fdt_file(void) +#ifdef CONFIG_ENV_IS_IN_MMC +int board_mmc_get_env_dev(int devno) { - if (is_mx6ul()) - env_set("fdt_file", "imx6ul-geam-kit.dtb"); + /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ + return (devno == 0) ? 0 : 1; } - -#ifdef CONFIG_SPL_BUILD -/* MMC board initialization is needed till adding DM support in SPL */ -#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) -#include <mmc.h> -#include <fsl_esdhc.h> - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc1_pads[] = { - IOMUX_PADS(PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - - /* VSELECT */ - IOMUX_PADS(PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - /* CD */ - IOMUX_PADS(PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), - /* RST_B */ - IOMUX_PADS(PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 1) - -struct fsl_esdhc_cfg usdhc_cfg[1] = { - {USDHC1_BASE_ADDR, 0, 4}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC1_BASE_ADDR: - ret = !gpio_get_value(USDHC1_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC1 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - SETUP_IOMUX_PADS(usdhc1_pads); - gpio_direction_input(USDHC1_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - break; - default: - printf("Warning - USDHC%d controller not supporting\n", - i + 1); - return 0; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -} -#endif /* CONFIG_FSL_ESDHC */ -#endif /* CONFIG_SPL_BUILD */ +#endif diff --git a/board/engicam/isiotmx6ul/Kconfig b/board/engicam/isiotmx6ul/Kconfig deleted file mode 100644 index 10c2c50ed7..0000000000 --- a/board/engicam/isiotmx6ul/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6UL_ISIOT - -config SYS_BOARD - default "isiotmx6ul" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/isiotmx6ul/Makefile b/board/engicam/isiotmx6ul/Makefile deleted file mode 100644 index f4f8c780ae..0000000000 --- a/board/engicam/isiotmx6ul/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := isiotmx6ul.o diff --git a/board/engicam/isiotmx6ul/README b/board/engicam/isiotmx6ul/README deleted file mode 100644 index 1d177ac625..0000000000 --- a/board/engicam/isiotmx6ul/README +++ /dev/null @@ -1,28 +0,0 @@ -How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: ------------------------------------------------------ - -- Configure U-Boot for Engicam Is.IoT MX6UL - -$ make mrproper -$ make imx6ul_isiot_mmc_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c deleted file mode 100644 index fbf17242f8..0000000000 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * Author: Jagan Teki <jagan@amarulasolutions.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <mmc.h> - -#include <asm/io.h> -#include <asm/gpio.h> -#include <linux/sizes.h> - -#include <asm/arch/clock.h> -#include <asm/arch/crm_regs.h> -#include <asm/arch/iomux.h> -#include <asm/arch/mx6-pins.h> -#include <asm/arch/sys_proto.h> -#include <asm/mach-imx/iomux-v3.h> - -#include "../common/board.h" - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_NAND_MXS - -#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) -#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ - PAD_CTL_SRE_FAST) -#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) - -static iomux_v3_cfg_t const nand_pads[] = { - IOMUX_PADS(PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA03__RAWNAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA04__RAWNAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA05__RAWNAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA06__RAWNAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA07__RAWNAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CLE__RAWNAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_ALE__RAWNAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CE0_B__RAWNAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_RE_B__RAWNAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WE_B__RAWNAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WP_B__RAWNAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), -}; - -void setup_gpmi_nand(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - - /* config gpmi nand iomux */ - SETUP_IOMUX_PADS(nand_pads); - - clrbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* - * config gpmi and bch clock to 100 MHz - * bch/gpmi select PLL2 PFD2 400M - * 100M = 400M / 4 - */ - clrbits_le32(&mxc_ccm->cscmr1, - MXC_CCM_CSCMR1_BCH_CLK_SEL | - MXC_CCM_CSCMR1_GPMI_CLK_SEL); - clrsetbits_le32(&mxc_ccm->cscdr1, - MXC_CCM_CSCDR1_BCH_PODF_MASK | - MXC_CCM_CSCDR1_GPMI_PODF_MASK, - (3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | - (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); - - /* enable gpmi and bch clock gating */ - setbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* enable apbh clock gating */ - setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); -} -#endif /* CONFIG_NAND_MXS */ - -#ifdef CONFIG_ENV_IS_IN_MMC -int board_mmc_get_env_dev(int devno) -{ - /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ - return (devno == 0) ? 0 : 1; -} -#endif - -void setenv_fdt_file(void) -{ - if (is_mx6ul()) { -#ifdef CONFIG_ENV_IS_IN_MMC - env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); -#else - env_set("fdt_file", "imx6ul-isiot-nand.dtb"); -#endif - } -} - -#ifdef CONFIG_SPL_BUILD -#include <spl.h> - -/* MMC board initialization is needed till adding DM support in SPL */ -#if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC) -#include <mmc.h> -#include <fsl_esdhc.h> - -#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) - -static iomux_v3_cfg_t const usdhc1_pads[] = { - IOMUX_PADS(PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - - /* VSELECT */ - IOMUX_PADS(PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - /* CD */ - IOMUX_PADS(PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), - /* RST_B */ - IOMUX_PADS(PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - -static iomux_v3_cfg_t const usdhc2_pads[] = { - IOMUX_PADS(PAD_NAND_ALE__USDHC2_RESET_B | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), - IOMUX_PADS(PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), -}; - -#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) -#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 5) - -struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC1_BASE_ADDR, 0, 4}, - {USDHC2_BASE_ADDR, 0, 8}, -}; - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC1_BASE_ADDR: - ret = !gpio_get_value(USDHC1_CD_GPIO); - break; - case USDHC2_BASE_ADDR: - ret = !gpio_get_value(USDHC2_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-boot device node) (Physical Port) - * mmc0 USDHC1 - * mmc1 USDHC2 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - SETUP_IOMUX_PADS(usdhc1_pads); - gpio_direction_input(USDHC1_CD_GPIO); - usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - break; - case 1: - SETUP_IOMUX_PADS(usdhc2_pads); - gpio_direction_input(USDHC2_CD_GPIO); - usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - break; - default: - printf("Warning - USDHC%d controller not supporting\n", - i + 1); - return 0; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -} - -#ifdef CONFIG_ENV_IS_IN_MMC -void board_boot_order(u32 *spl_boot_list) -{ - u32 bmode = imx6_src_get_boot_mode(); - u8 boot_dev = BOOT_DEVICE_MMC1; - - switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { - case IMX6_BMODE_SD: - case IMX6_BMODE_ESD: - /* SD/eSD - BOOT_DEVICE_MMC1 */ - break; - case IMX6_BMODE_MMC: - case IMX6_BMODE_EMMC: - /* MMC/eMMC */ - boot_dev = BOOT_DEVICE_MMC2; - break; - default: - /* Default - BOOT_DEVICE_MMC1 */ - printf("Wrong board boot order\n"); - break; - } - - spl_boot_list[0] = boot_dev; -} -#endif -#endif /* CONFIG_FSL_ESDHC */ -#endif /* CONFIG_SPL_BUILD */ diff --git a/board/ge/bx50v3/Makefile b/board/ge/bx50v3/Makefile index 2fff27bc77..bcd149f5b0 100644 --- a/board/ge/bx50v3/Makefile +++ b/board/ge/bx50v3/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y := bx50v3.o vpd_reader.o +obj-y := bx50v3.o diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 2e8f394eaf..37de990176 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -28,7 +28,7 @@ #include <input.h> #include <pwm.h> #include <stdlib.h> -#include "vpd_reader.h" +#include "../common/vpd_reader.h" DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_SYS_I2C_EEPROM_ADDR diff --git a/board/ge/bx50v3/vpd_reader.c b/board/ge/bx50v3/vpd_reader.c deleted file mode 100644 index 98da893d2c..0000000000 --- a/board/ge/bx50v3/vpd_reader.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright 2016 General Electric Company - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include "vpd_reader.h" - -#include <linux/bch.h> -#include <stdlib.h> - - -/* BCH configuration */ - -const struct { - int header_ecc_capability_bits; - int data_ecc_capability_bits; - unsigned int prim_poly; - struct { - int min; - int max; - } galois_field_order; -} bch_configuration = { - .header_ecc_capability_bits = 4, - .data_ecc_capability_bits = 16, - .prim_poly = 0, - .galois_field_order = { - .min = 5, - .max = 15, - }, -}; - -static int calculate_galois_field_order(size_t source_length) -{ - int gfo = bch_configuration.galois_field_order.min; - - for (; gfo < bch_configuration.galois_field_order.max && - ((((1 << gfo) - 1) - ((int)source_length * 8)) < 0); - gfo++) { - } - - if (gfo == bch_configuration.galois_field_order.max) { - return -1; - } - - return gfo + 1; -} - -static int verify_bch(int ecc_bits, unsigned int prim_poly, - uint8_t * data, size_t data_length, - const uint8_t * ecc, size_t ecc_length) -{ - int gfo = calculate_galois_field_order(data_length); - if (gfo < 0) { - return -1; - } - - struct bch_control * bch = init_bch(gfo, ecc_bits, prim_poly); - if (!bch) { - return -1; - } - - if (bch->ecc_bytes != ecc_length) { - free_bch(bch); - return -1; - } - - unsigned * errloc = (unsigned *)calloc(data_length, sizeof(unsigned)); - int errors = decode_bch( - bch, data, data_length, ecc, NULL, NULL, errloc); - free_bch(bch); - if (errors < 0) { - free(errloc); - return -1; - } - - if (errors > 0) { - for (int n = 0; n < errors; n++) { - if (errloc[n] >= 8 * data_length) { - /* n-th error located in ecc (no need for data correction) */ - } else { - /* n-th error located in data */ - data[errloc[n] / 8] ^= 1 << (errloc[n] % 8); - } - } - } - - free(errloc); - return 0; -} - - -static const int ID = 0; -static const int LEN = 1; -static const int VER = 2; -static const int TYP = 3; -static const int BLOCK_SIZE = 4; - -static const uint8_t HEADER_BLOCK_ID = 0x00; -static const uint8_t HEADER_BLOCK_LEN = 18; -static const uint32_t HEADER_BLOCK_MAGIC = 0xca53ca53; -static const size_t HEADER_BLOCK_VERIFY_LEN = 14; -static const size_t HEADER_BLOCK_ECC_OFF = 14; -static const size_t HEADER_BLOCK_ECC_LEN = 4; - -static const uint8_t ECC_BLOCK_ID = 0xFF; - -int vpd_reader( - size_t size, - uint8_t * data, - void * userdata, - int (*fn)( - void * userdata, - uint8_t id, - uint8_t version, - uint8_t type, - size_t size, - uint8_t const * data)) -{ - if ( size < HEADER_BLOCK_LEN - || data == NULL - || fn == NULL) { - return -EINVAL; - } - - /* - * +--------------------+--------------------+--//--+--------------------+ - * | header block | data block | ... | ecc block | - * +--------------------+--------------------+--//--+--------------------+ - * : : : - * +------+-------+-----+ +------+-------------+ - * | id | magic | ecc | | ... | ecc | - * | len | off | | +------+-------------+ - * | ver | size | | : - * | type | | | : - * +------+-------+-----+ : - * : : : : - * <----- [1] ----> <----------- [2] -----------> - * - * Repair (if necessary) the contents of header block [1] by using a - * 4 byte ECC located at the end of the header block. A successful - * return value means that we can trust the header. - */ - int ret = verify_bch( - bch_configuration.header_ecc_capability_bits, - bch_configuration.prim_poly, - data, - HEADER_BLOCK_VERIFY_LEN, - &data[HEADER_BLOCK_ECC_OFF], - HEADER_BLOCK_ECC_LEN); - if (ret < 0) { - return ret; - } - - /* Validate header block { id, length, version, type }. */ - if ( data[ID] != HEADER_BLOCK_ID - || data[LEN] != HEADER_BLOCK_LEN - || data[VER] != 0 - || data[TYP] != 0 - || ntohl(*(uint32_t *)(&data[4])) != HEADER_BLOCK_MAGIC) { - return -EINVAL; - } - - uint32_t offset = ntohl(*(uint32_t *)(&data[8])); - uint16_t size_bits = ntohs(*(uint16_t *)(&data[12])); - - /* Check that ECC header fits. */ - if (offset + 3 >= size) { - return -EINVAL; - } - - /* Validate ECC block. */ - uint8_t * ecc = &data[offset]; - if ( ecc[ID] != ECC_BLOCK_ID - || ecc[LEN] < BLOCK_SIZE - || ecc[LEN] + offset > size - || ecc[LEN] - BLOCK_SIZE != size_bits / 8 - || ecc[VER] != 1 - || ecc[TYP] != 1) { - return -EINVAL; - } - - /* - * Use the header block to locate the ECC block and verify the data - * blocks [2] against the ecc block ECC. - */ - ret = verify_bch( - bch_configuration.data_ecc_capability_bits, - bch_configuration.prim_poly, - &data[data[LEN]], - offset - data[LEN], - &data[offset + BLOCK_SIZE], - ecc[LEN] - BLOCK_SIZE); - if (ret < 0) { - return ret; - } - - /* Stop after ECC. Ignore possible zero padding. */ - size = offset; - - for (;;) { - /* Move to next block. */ - size -= data[LEN]; - data += data[LEN]; - - if (size == 0) { - /* Finished iterating through blocks. */ - return 0; - } - - if ( size < BLOCK_SIZE - || data[LEN] < BLOCK_SIZE) { - /* Not enough data for a header, or short header. */ - return -EINVAL; - } - - ret = fn( - userdata, - data[ID], - data[VER], - data[TYP], - data[LEN] - BLOCK_SIZE, - &data[BLOCK_SIZE]); - if (ret) { - return ret; - } - } -} diff --git a/board/ge/common/Makefile b/board/ge/common/Makefile new file mode 100644 index 0000000000..93e6c0182b --- /dev/null +++ b/board/ge/common/Makefile @@ -0,0 +1,7 @@ +# +# Copyright 2017 General Electric Company +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := vpd_reader.o diff --git a/board/ge/common/vpd_reader.c b/board/ge/common/vpd_reader.c new file mode 100644 index 0000000000..7367427993 --- /dev/null +++ b/board/ge/common/vpd_reader.c @@ -0,0 +1,197 @@ +/* + * Copyright 2016 General Electric Company + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "vpd_reader.h" + +#include <linux/bch.h> +#include <stdlib.h> + +/* BCH configuration */ + +const struct { + int header_ecc_capability_bits; + int data_ecc_capability_bits; + unsigned int prim_poly; + struct { + int min; + int max; + } galois_field_order; +} bch_configuration = { + .header_ecc_capability_bits = 4, + .data_ecc_capability_bits = 16, + .prim_poly = 0, + .galois_field_order = { + .min = 5, + .max = 15, + }, +}; + +static int calculate_galois_field_order(size_t source_length) +{ + int gfo = bch_configuration.galois_field_order.min; + + for (; gfo < bch_configuration.galois_field_order.max && + ((((1 << gfo) - 1) - ((int)source_length * 8)) < 0); + gfo++) { + } + + if (gfo == bch_configuration.galois_field_order.max) + return -1; + + return gfo + 1; +} + +static int verify_bch(int ecc_bits, unsigned int prim_poly, u8 *data, + size_t data_length, const u8 *ecc, size_t ecc_length) +{ + int gfo = calculate_galois_field_order(data_length); + + if (gfo < 0) + return -1; + + struct bch_control *bch = init_bch(gfo, ecc_bits, prim_poly); + + if (!bch) + return -1; + + if (bch->ecc_bytes != ecc_length) { + free_bch(bch); + return -1; + } + + unsigned int *errloc = (unsigned int *)calloc(data_length, + sizeof(unsigned int)); + int errors = decode_bch(bch, data, data_length, ecc, NULL, NULL, + errloc); + + free_bch(bch); + if (errors < 0) { + free(errloc); + return -1; + } + + if (errors > 0) { + for (int n = 0; n < errors; n++) { + if (errloc[n] >= 8 * data_length) { + /* + * n-th error located in ecc (no need for data + * correction) + */ + } else { + /* n-th error located in data */ + data[errloc[n] / 8] ^= 1 << (errloc[n] % 8); + } + } + } + + free(errloc); + return 0; +} + +static const int ID; +static const int LEN = 1; +static const int VER = 2; +static const int TYP = 3; +static const int BLOCK_SIZE = 4; + +static const u8 HEADER_BLOCK_ID; +static const u8 HEADER_BLOCK_LEN = 18; +static const u32 HEADER_BLOCK_MAGIC = 0xca53ca53; +static const size_t HEADER_BLOCK_VERIFY_LEN = 14; +static const size_t HEADER_BLOCK_ECC_OFF = 14; +static const size_t HEADER_BLOCK_ECC_LEN = 4; + +static const u8 ECC_BLOCK_ID = 0xFF; + +int vpd_reader(size_t size, u8 *data, void *userdata, + int (*fn)(void *userdata, u8 id, u8 version, u8 type, + size_t size, u8 const *data)) +{ + if (size < HEADER_BLOCK_LEN || !data || !fn) + return -EINVAL; + + /* + * +--------------------+----------------+--//--+--------------------+ + * | header block | data block | ... | ecc block | + * +--------------------+----------------+--//--+--------------------+ + * : : : + * +------+-------+-----+ +------+-------------+ + * | id | magic | ecc | | ... | ecc | + * | len | off | | +------+-------------+ + * | ver | size | | : + * | type | | | : + * +------+-------+-----+ : + * : : : : + * <----- [1] ----> <--------- [2] ---------> + * + * Repair (if necessary) the contents of header block [1] by using a + * 4 byte ECC located at the end of the header block. A successful + * return value means that we can trust the header. + */ + int ret = verify_bch(bch_configuration.header_ecc_capability_bits, + bch_configuration.prim_poly, data, + HEADER_BLOCK_VERIFY_LEN, + &data[HEADER_BLOCK_ECC_OFF], HEADER_BLOCK_ECC_LEN); + if (ret < 0) + return ret; + + /* Validate header block { id, length, version, type }. */ + if (data[ID] != HEADER_BLOCK_ID || data[LEN] != HEADER_BLOCK_LEN || + data[VER] != 0 || data[TYP] != 0 || + ntohl(*(u32 *)(&data[4])) != HEADER_BLOCK_MAGIC) + return -EINVAL; + + u32 offset = ntohl(*(u32 *)(&data[8])); + u16 size_bits = ntohs(*(u16 *)(&data[12])); + + /* Check that ECC header fits. */ + if (offset + 3 >= size) + return -EINVAL; + + /* Validate ECC block. */ + u8 *ecc = &data[offset]; + + if (ecc[ID] != ECC_BLOCK_ID || ecc[LEN] < BLOCK_SIZE || + ecc[LEN] + offset > size || + ecc[LEN] - BLOCK_SIZE != size_bits / 8 || ecc[VER] != 1 || + ecc[TYP] != 1) + return -EINVAL; + + /* + * Use the header block to locate the ECC block and verify the data + * blocks [2] against the ecc block ECC. + */ + ret = verify_bch(bch_configuration.data_ecc_capability_bits, + bch_configuration.prim_poly, &data[data[LEN]], + offset - data[LEN], &data[offset + BLOCK_SIZE], + ecc[LEN] - BLOCK_SIZE); + if (ret < 0) + return ret; + + /* Stop after ECC. Ignore possible zero padding. */ + size = offset; + + for (;;) { + /* Move to next block. */ + size -= data[LEN]; + data += data[LEN]; + + if (size == 0) { + /* Finished iterating through blocks. */ + return 0; + } + + if (size < BLOCK_SIZE || data[LEN] < BLOCK_SIZE) { + /* Not enough data for a header, or short header. */ + return -EINVAL; + } + + ret = fn(userdata, data[ID], data[VER], data[TYP], + data[LEN] - BLOCK_SIZE, &data[BLOCK_SIZE]); + if (ret) + return ret; + } +} diff --git a/board/ge/bx50v3/vpd_reader.h b/board/ge/common/vpd_reader.h index efa172a915..4abba8f5de 100644 --- a/board/ge/bx50v3/vpd_reader.h +++ b/board/ge/common/vpd_reader.h @@ -12,14 +12,6 @@ * * Returns Non-zero on error. Negative numbers encode errno. */ -int vpd_reader( - size_t size, - uint8_t * data, - void * userdata, - int (*fn)( - void * userdata, - uint8_t id, - uint8_t version, - uint8_t type, - size_t size, - uint8_t const * data)); +int vpd_reader(size_t size, u8 *data, void *userdata, + int (*fn)(void *userdata, u8 id, u8 version, u8 type, + size_t size, u8 const *data)); diff --git a/board/ge/mx53ppd/Kconfig b/board/ge/mx53ppd/Kconfig new file mode 100644 index 0000000000..781c1cf59f --- /dev/null +++ b/board/ge/mx53ppd/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ + +if TARGET_MX53PPD + +config SYS_BOARD + default "mx53ppd" + +config SYS_VENDOR + default "ge" + +config SYS_SOC + default "mx5" + +config SYS_CONFIG_NAME + default "mx53ppd" + +endif diff --git a/board/ge/mx53ppd/MAINTAINERS b/board/ge/mx53ppd/MAINTAINERS new file mode 100644 index 0000000000..9b64b5d389 --- /dev/null +++ b/board/ge/mx53ppd/MAINTAINERS @@ -0,0 +1,7 @@ +MX53PPD BOARD +M: Antti Mäentausta <antti.maentausta@ge.com> +M: Martyn Welch <martyn.welch@collabora.co.uk> +S: Maintained +F: board/freescale/mx53ppd/ +F: include/configs/mx53ppd.h +F: configs/mx53ppd_defconfig diff --git a/board/ge/mx53ppd/Makefile b/board/ge/mx53ppd/Makefile new file mode 100644 index 0000000000..928edfbad6 --- /dev/null +++ b/board/ge/mx53ppd/Makefile @@ -0,0 +1,12 @@ +# Copyright 2017 General Electric Company +# +# Based on board/freescale/mx53loco/Makefile: +# +# (C) Copyright 2011 Freescale Semiconductor, Inc. +# Jason Liu <r64343@freescale.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += mx53ppd.o +obj-$(CONFIG_VIDEO) += mx53ppd_video.o diff --git a/board/ge/mx53ppd/imximage.cfg b/board/ge/mx53ppd/imximage.cfg new file mode 100644 index 0000000000..83ff4b8a8b --- /dev/null +++ b/board/ge/mx53ppd/imximage.cfg @@ -0,0 +1,87 @@ +/* + * Copyright 2017 General Electric Company + * + * Based on board/freescale/mx53loco/imximage.cfg: + * + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu <r64343@freescale.com> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x53fa8004 0x00194005 +DATA 4 0x53fa8554 0x00300000 +DATA 4 0x53fa8558 0x00300040 +DATA 4 0x53fa8560 0x00300000 +DATA 4 0x53fa8564 0x00300040 +DATA 4 0x53fa8568 0x00300040 +DATA 4 0x53fa8570 0x00300000 +DATA 4 0x53fa8574 0x00300000 +DATA 4 0x53fa8578 0x00300000 +DATA 4 0x53fa857c 0x00300040 +DATA 4 0x53fa8580 0x00300040 +DATA 4 0x53fa8584 0x00300000 +DATA 4 0x53fa8588 0x00300000 +DATA 4 0x53fa8590 0x00300040 +DATA 4 0x53fa8594 0x00300000 +DATA 4 0x53fa86f0 0x00300000 +DATA 4 0x53fa86f4 0x00000000 +DATA 4 0x53fa86fc 0x00000000 +DATA 4 0x53fa8714 0x00000000 +DATA 4 0x53fa8718 0x00300000 +DATA 4 0x53fa871c 0x00300000 +DATA 4 0x53fa8720 0x00300000 +DATA 4 0x53fa8728 0x00300000 +DATA 4 0x53fa872c 0x00300000 +DATA 4 0x63fd9088 0x35343535 +DATA 4 0x63fd9090 0x4d444c44 +DATA 4 0x63fd907c 0x01370138 +DATA 4 0x63fd9080 0x013b013c +DATA 4 0x63fd9018 0x00111740 +DATA 4 0x63fd9000 0x85190000 +DATA 4 0x63fd900c 0x8b8f52e3 +DATA 4 0x63fd9010 0xb68e8a63 +DATA 4 0x63fd9014 0x01ff00db +DATA 4 0x63fd902c 0x000026d2 +DATA 4 0x63fd9030 0x008f0e21 +DATA 4 0x63fd9008 0x09333030 +DATA 4 0x63fd9004 0x0002002d +DATA 4 0x63fd901c 0x00008032 +DATA 4 0x63fd901c 0x00008033 +DATA 4 0x63fd901c 0x00468031 +DATA 4 0x63fd901c 0x052080b0 +DATA 4 0x63fd901c 0x04008040 +DATA 4 0x63fd901c 0x0000803a +DATA 4 0x63fd901c 0x0000803b +DATA 4 0x63fd901c 0x00028039 +DATA 4 0x63fd901c 0x05208138 +DATA 4 0x63fd901c 0x04008048 +DATA 4 0x63fd9020 0x00005800 +DATA 4 0x63fd9040 0x05380003 +DATA 4 0x63fd9058 0x00011110 +DATA 4 0x63fd901c 0x00000000 diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c new file mode 100644 index 0000000000..6a8a29d7d8 --- /dev/null +++ b/board/ge/mx53ppd/mx53ppd.c @@ -0,0 +1,457 @@ +/* + * Copyright 2017 General Electric Company + * + * Based on board/freescale/mx53loco/mx53loco.c: + * + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu <r64343@freescale.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/clock.h> +#include <asm/arch/iomux-mx53.h> +#include <asm/arch/clock.h> +#include <linux/errno.h> +#include <asm/mach-imx/mxc_i2c.h> +#include <asm/mach-imx/mx5_video.h> +#include <netdev.h> +#include <i2c.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <asm/gpio.h> +#include <power/pmic.h> +#include <dialog_pmic.h> +#include <fsl_pmic.h> +#include <linux/fb.h> +#include <ipu_pixfmt.h> +#include <watchdog.h> +#include "ppd_gpio.h" +#include <stdlib.h> +#include "../../ge/common/vpd_reader.h" +#include <rtc.h> + +#define MX53PPD_LCD_POWER IMX_GPIO_NR(3, 24) + +DECLARE_GLOBAL_DATA_PTR; + +/* Index of I2C1, SEGMENT 1 (see CONFIG_SYS_I2C_BUSES). */ +#define VPD_EEPROM_BUS 2 + +/* Address of 24C08 EEPROM. */ +#define VPD_EEPROM_ADDR 0x50 +#define VPD_EEPROM_ADDR_LEN 1 + +static u32 mx53_dram_size[2]; + +phys_size_t get_effective_memsize(void) +{ + /* + * WARNING: We must override get_effective_memsize() function here + * to report only the size of the first DRAM bank. This is to make + * U-Boot relocator place U-Boot into valid memory, that is, at the + * end of the first DRAM bank. If we did not override this function + * like so, U-Boot would be placed at the address of the first DRAM + * bank + total DRAM size - sizeof(uboot), which in the setup where + * each DRAM bank contains 512MiB of DRAM would result in placing + * U-Boot into invalid memory area close to the end of the first + * DRAM bank. + */ + return mx53_dram_size[0]; +} + +int dram_init(void) +{ + mx53_dram_size[0] = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); + mx53_dram_size[1] = get_ram_size((void *)PHYS_SDRAM_2, 1 << 30); + + gd->ram_size = mx53_dram_size[0] + mx53_dram_size[1]; + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = mx53_dram_size[0]; + + gd->bd->bi_dram[1].start = PHYS_SDRAM_2; + gd->bd->bi_dram[1].size = mx53_dram_size[1]; + + return 0; +} + +u32 get_board_rev(void) +{ + return get_cpu_rev() & ~(0xF << 8); +} + +#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) + +#ifdef CONFIG_USB_EHCI_MX5 +int board_ehci_hcd_init(int port) +{ + /* request VBUS power enable pin, GPIO7_8 */ + imx_iomux_v3_setup_pad(MX53_PAD_PATA_DA_2__GPIO7_8); + gpio_direction_output(IMX_GPIO_NR(7, 8), 1); + return 0; +} +#endif + +static void setup_iomux_fec(void) +{ + static const iomux_v3_cfg_t fec_pads[] = { + NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS | + PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP | + PAD_CTL_ODE), + NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH), + NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1, + PAD_CTL_HYS | PAD_CTL_PKE), + NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0, + PAD_CTL_HYS | PAD_CTL_PKE), + NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH), + NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH), + NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH), + NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, + PAD_CTL_HYS | PAD_CTL_PKE), + NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER, + PAD_CTL_HYS | PAD_CTL_PKE), + NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV, + PAD_CTL_HYS | PAD_CTL_PKE), + }; + + imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[2] = { + {MMC_SDHC3_BASE_ADDR}, + {MMC_SDHC1_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP) +#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \ + PAD_CTL_DSE_HIGH) + +int board_mmc_init(bd_t *bis) +{ + static const iomux_v3_cfg_t sd1_pads[] = { + NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD, + SD_CMD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL), + MX53_PAD_EIM_DA11__GPIO3_11, + }; + + static const iomux_v3_cfg_t sd2_pads[] = { + NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL), + MX53_PAD_EIM_DA13__GPIO3_13, + }; + + u32 index; + int ret; + + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads(sd1_pads, + ARRAY_SIZE(sd1_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads(sd2_pads, + ARRAY_SIZE(sd2_pads)); + break; + default: + printf("Warning: you configured more ESDHC controller (%d) as supported by the board(2)\n", + CONFIG_SYS_FSL_ESDHC_NUM); + return -EINVAL; + } + ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]); + if (ret) + return ret; + } + + return 0; +} +#endif + +#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) + +static void setup_iomux_i2c(void) +{ + static const iomux_v3_cfg_t i2c1_pads[] = { + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL), + }; + + imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads)); +} + +#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) + +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX53_PAD_EIM_D21__I2C1_SCL | I2C_PAD, + .gpio_mode = MX53_PAD_EIM_D28__GPIO3_28 | I2C_PAD, + .gp = IMX_GPIO_NR(3, 28) + }, + .sda = { + .i2c_mode = MX53_PAD_EIM_D28__I2C1_SDA | I2C_PAD, + .gpio_mode = MX53_PAD_EIM_D21__GPIO3_21 | I2C_PAD, + .gp = IMX_GPIO_NR(3, 21) + } +}; + +static int clock_1GHz(void) +{ + int ret; + u32 ref_clk = MXC_HCLK; + /* + * After increasing voltage to 1.25V, we can switch + * CPU clock to 1GHz and DDR to 400MHz safely + */ + ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK); + if (ret) { + printf("CPU: Switch CPU clock to 1GHZ failed\n"); + return -1; + } + + ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK); + ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK); + if (ret) { + printf("CPU: Switch DDR clock to 400MHz failed\n"); + return -1; + } + + return 0; +} + +void ppd_gpio_init(void) +{ + int i; + + imx_iomux_v3_setup_multiple_pads(ppd_pads, ARRAY_SIZE(ppd_pads)); + for (i = 0; i < ARRAY_SIZE(ppd_gpios); ++i) + gpio_direction_output(ppd_gpios[i].gpio, ppd_gpios[i].value); +} + +int board_early_init_f(void) +{ + setup_iomux_fec(); + setup_iomux_lcd(); + ppd_gpio_init(); + + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +#define VPD_TYPE_INVALID 0x00 +#define VPD_BLOCK_NETWORK 0x20 +#define VPD_BLOCK_HWID 0x44 +#define VPD_PRODUCT_PPD 4 +#define VPD_HAS_MAC1 0x1 +#define VPD_MAC_ADDRESS_LENGTH 6 + +struct vpd_cache { + u8 product_id; + u8 has; + unsigned char mac1[VPD_MAC_ADDRESS_LENGTH]; +}; + +/* + * Extracts MAC and product information from the VPD. + */ +static int vpd_callback(void *userdata, u8 id, u8 version, u8 type, size_t size, + u8 const *data) +{ + struct vpd_cache *vpd = (struct vpd_cache *)userdata; + + if (id == VPD_BLOCK_HWID && version == 1 && type != VPD_TYPE_INVALID && + size >= 1) { + vpd->product_id = data[0]; + + } else if (id == VPD_BLOCK_NETWORK && version == 1 && + type != VPD_TYPE_INVALID) { + if (size >= 6) { + vpd->has |= VPD_HAS_MAC1; + memcpy(vpd->mac1, data, VPD_MAC_ADDRESS_LENGTH); + } + } + + return 0; +} + +static void process_vpd(struct vpd_cache *vpd) +{ + int fec_index = -1; + + if (vpd->product_id == VPD_PRODUCT_PPD) + fec_index = 0; + + if (fec_index >= 0 && (vpd->has & VPD_HAS_MAC1)) + eth_env_set_enetaddr("ethaddr", vpd->mac1); +} + +static int read_vpd(uint eeprom_bus) +{ + struct vpd_cache vpd; + int res; + int size = 1024; + u8 *data; + unsigned int current_i2c_bus = i2c_get_bus_num(); + + res = i2c_set_bus_num(eeprom_bus); + if (res < 0) + return res; + + data = malloc(size); + if (!data) + return -ENOMEM; + + res = i2c_read(VPD_EEPROM_ADDR, 0, VPD_EEPROM_ADDR_LEN, data, size); + if (res == 0) { + memset(&vpd, 0, sizeof(vpd)); + vpd_reader(size, data, &vpd, vpd_callback); + process_vpd(&vpd); + } + + free(data); + + i2c_set_bus_num(current_i2c_bus); + return res; +} + +static void check_time(void) +{ + int ret, i; + struct rtc_time tm; + u8 retry = 3; + + unsigned int current_i2c_bus = i2c_get_bus_num(); + + ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM); + if (ret < 0) + return; + + rtc_init(); + + for (i = 0; i < retry; i++) { + ret = rtc_get(&tm); + if (!ret || ret == -EINVAL) + break; + } + + if (ret < 0) + env_set("rtc_status", "RTC_ERROR"); + + if (tm.tm_year > 2037) { + tm.tm_sec = 0; + tm.tm_min = 0; + tm.tm_hour = 0; + tm.tm_mday = 1; + tm.tm_wday = 2; + tm.tm_mon = 1; + tm.tm_year = 2036; + + for (i = 0; i < retry; i++) { + ret = rtc_set(&tm); + if (!ret) + break; + } + + if (ret < 0) + env_set("rtc_status", "RTC_ERROR"); + } + + i2c_set_bus_num(current_i2c_bus); +} + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + mxc_set_sata_internal_clock(); + setup_iomux_i2c(); + + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + + return 0; +} + +int misc_init_r(void) +{ + const char *cause; + + /* We care about WDOG only, treating everything else as + * a power-on-reset. + */ + if (get_imx_reset_cause() & 0x0010) + cause = "WDOG"; + else + cause = "POR"; + + env_set("bootcause", cause); + + return 0; +} + +int board_late_init(void) +{ + int res; + + read_vpd(VPD_EEPROM_BUS); + + res = clock_1GHz(); + if (res != 0) + return res; + + print_cpuinfo(); + hw_watchdog_init(); + + check_time(); + + return 0; +} + +int checkboard(void) +{ + puts("Board: GE PPD\n"); + + return 0; +} diff --git a/board/ge/mx53ppd/mx53ppd_video.c b/board/ge/mx53ppd/mx53ppd_video.c new file mode 100644 index 0000000000..45974bccd6 --- /dev/null +++ b/board/ge/mx53ppd/mx53ppd_video.c @@ -0,0 +1,135 @@ +/* + * Copyright 2017 General Electric Company + * + * Based on board/freescale/mx53loco/mx53loco_video.c: + * + * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Fabio Estevam <fabio.estevam@freescale.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <linux/list.h> +#include <asm/gpio.h> +#include <asm/arch/iomux-mx53.h> +#include <linux/fb.h> +#include <ipu_pixfmt.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/imx-regs.h> +#include <asm/io.h> +#include <pwm.h> +#include "ppd_gpio.h" + +#define MX53PPD_LCD_POWER IMX_GPIO_NR(3, 24) + +static struct fb_videomode const nv_spwg = { + .name = "NV-SPWGRGB888", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 15384, + .left_margin = 16, + .right_margin = 210, + .upper_margin = 10, + .lower_margin = 22, + .hsync_len = 30, + .vsync_len = 13, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +}; + +void setup_iomux_lcd(void) +{ + static const iomux_v3_cfg_t lcd_pads[] = { + MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK, + MX53_PAD_DI0_PIN15__IPU_DI0_PIN15, + MX53_PAD_DI0_PIN2__IPU_DI0_PIN2, + MX53_PAD_DI0_PIN3__IPU_DI0_PIN3, + MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0, + MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1, + MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2, + MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3, + MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4, + MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5, + MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6, + MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7, + MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8, + MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9, + MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10, + MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11, + MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12, + MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13, + MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14, + MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15, + MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16, + MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17, + MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18, + MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19, + MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20, + MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21, + MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22, + MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23, + }; + + imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); +} + +static void lcd_enable(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + /* Set LDB_DI0 as clock source for IPU_DI0 */ + clrsetbits_le32(&mxc_ccm->cscmr2, + MXC_CCM_CSCMR2_DI0_CLK_SEL_MASK, + MXC_CCM_CSCMR2_DI0_CLK_SEL( + MXC_CCM_CSCMR2_DI0_CLK_SEL_LDB_DI0_CLK)); + + /* Turn on IPU LDB DI0 clocks */ + setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_LDB_DI0(3)); + + /* Turn on IPU DI0 clocks */ + setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_IPU_DI0(3)); + + /* Configure LDB */ + writel(IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | + IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, + &iomux->gpr[2]); + + /* Enable backlights */ + pwm_init(1, 0, 0); + + /* duty cycle 5000000ns, period: 5000000ns */ + pwm_config(1, 5000000, 5000000); + + /* Backlight Power */ + gpio_direction_output(BACKLIGHT_ENABLE, 1); + + pwm_enable(1); +} + +static int do_lcd_enable(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + lcd_enable(); + return 0; +} + +U_BOOT_CMD( + ppd_lcd_enable, 1, 1, do_lcd_enable, + "enable PPD LCD", + "no parameters" +); + +int board_video_skip(void) +{ + int ret; + + ret = ipuv3_fb_init(&nv_spwg, 0, IPU_PIX_FMT_RGB24); + if (ret) + printf("Display cannot be configured: %d\n", ret); + + return ret; +} diff --git a/board/ge/mx53ppd/ppd_gpio.h b/board/ge/mx53ppd/ppd_gpio.h new file mode 100644 index 0000000000..71a88a1da7 --- /dev/null +++ b/board/ge/mx53ppd/ppd_gpio.h @@ -0,0 +1,96 @@ +/* + * (C) Copyright 2015 General Electric Company + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __PPD_GPIO_H_ +#define __PPD_GPIO_H_ + +#include <asm/arch/iomux-mx53.h> +#include <asm/gpio.h> + +#define PPD_UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP) + +static const iomux_v3_cfg_t ppd_pads[] = { + /* FEC */ + MX53_PAD_EIM_A22__GPIO2_16, + /* UART */ + NEW_PAD_CTRL(MX53_PAD_PATA_DMACK__UART1_RXD_MUX, PPD_UART_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DIOW__UART1_TXD_MUX, PPD_UART_PAD_CTRL), + /* Video */ + MX53_PAD_CSI0_DATA_EN__GPIO5_20, /* LR_SCAN_CTRL */ + MX53_PAD_CSI0_VSYNC__GPIO5_21, /* UD_SCAN_CTRL */ + MX53_PAD_CSI0_DAT10__GPIO5_28, /* DATA_WIDTH_CTRL */ + MX53_PAD_CSI0_PIXCLK__GPIO5_18, /* HOST_CONTROLLED_RESET_TO_LCD_N */ + MX53_PAD_EIM_DA2__GPIO3_2, /* LVDS1_MUX_CTRL */ + MX53_PAD_EIM_DA3__GPIO3_3, /* LVDS0_MUX_CTRL */ + MX53_PAD_EIM_A21__GPIO2_17, /* ENABLE_PWR_TO_LCD_AND_UI_INTERFACE */ + MX53_PAD_CSI0_DAT11__GPIO5_29, /* BACKLIGHT_ENABLE */ + MX53_PAD_DISP0_DAT9__PWM2_PWMO, /* IMX535_PWM2_TO_LCD_CONNECTOR */ + /* I2C */ + MX53_PAD_EIM_A20__GPIO2_18, /* RESET_I2C1_BUS_SEGMENT_MUX_N */ + + /* SPI */ + MX53_PAD_DISP0_DAT23__GPIO5_17, + MX53_PAD_KEY_COL2__GPIO4_10, + MX53_PAD_KEY_ROW2__GPIO4_11, + MX53_PAD_KEY_COL3__GPIO4_12, +}; + +struct gpio_cfg { + unsigned int gpio; + int value; +}; + +#define RESET_IMX535_ETHERNET_PHY_N IMX_GPIO_NR(2, 16) +#define UD_SCAN_CTRL IMX_GPIO_NR(5, 21) +#define LR_SCAN_CTRL IMX_GPIO_NR(5, 20) +#define LVDS0_MUX_CTRL IMX_GPIO_NR(3, 3) +#define LVDS1_MUX_CTRL IMX_GPIO_NR(3, 2) +#define HOST_CONTROLLED_RESET_TO_LCD_N IMX_GPIO_NR(5, 18) +#define DATA_WIDTH_CTRL IMX_GPIO_NR(5, 28) +#define RESET_DP0_TRANSMITTER_N IMX_GPIO_NR(2, 28) +#define RESET_DP1_TRANSMITTER_N IMX_GPIO_NR(2, 29) +#define POWER_DOWN_LVDS0_DESERIALIZER_N IMX_GPIO_NR(2, 22) +#define POWER_DOWN_LVDS1_DESERIALIZER_N IMX_GPIO_NR(2, 27) +#define ENABLE_PWR_TO_LCD_AND_UI_INTERFACE IMX_GPIO_NR(2, 17) +#define BACKLIGHT_ENABLE IMX_GPIO_NR(5, 29) +#define RESET_I2C1_BUS_SEGMENT_MUX_N IMX_GPIO_NR(2, 18) +#define ECSPI1_CS0 IMX_GPIO_NR(5, 17) +#define ECSPI1_CS1 IMX_GPIO_NR(4, 10) +#define ECSPI1_CS2 IMX_GPIO_NR(4, 11) +#define ECSPI1_CS3 IMX_GPIO_NR(4, 12) + +static const struct gpio_cfg ppd_gpios[] = { + /* FEC */ + /* Drive Low as GPIO output for 25ms per Eth Phy IX spec */ + /* Then Drive High as GPIO output to bring Eth Phy IC out of reset */ + { RESET_IMX535_ETHERNET_PHY_N, 0 }, + { RESET_IMX535_ETHERNET_PHY_N, 1 }, + /* Video */ + { UD_SCAN_CTRL, 0 }, + { LR_SCAN_CTRL, 1 }, +#ifdef PROPRIETARY_CHANGES + { LVDS0_MUX_CTRL, 1 }, +#else + { LVDS0_MUX_CTRL, 0 }, +#endif + { LVDS1_MUX_CTRL, 1 }, + { HOST_CONTROLLED_RESET_TO_LCD_N, 1 }, + { DATA_WIDTH_CTRL, 0 }, + { RESET_DP0_TRANSMITTER_N, 1 }, + { RESET_DP1_TRANSMITTER_N, 1 }, + { POWER_DOWN_LVDS0_DESERIALIZER_N, 1 }, + { POWER_DOWN_LVDS1_DESERIALIZER_N, 1 }, + { ENABLE_PWR_TO_LCD_AND_UI_INTERFACE, 1 }, + { BACKLIGHT_ENABLE, 0 }, + { RESET_I2C1_BUS_SEGMENT_MUX_N, 1 }, + { ECSPI1_CS0, 1 }, + { ECSPI1_CS1, 1 }, + { ECSPI1_CS2, 1 }, + { ECSPI1_CS3, 1 }, +}; + +#endif /* __PPD_GPIO_H_ */ diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its index 60daddcc44..e3bea5ea2f 100644 --- a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its +++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its @@ -17,6 +17,7 @@ description = "U-Boot (64-bit)"; data = /incbin/("../../../u-boot-nodtb.bin"); type = "standalone"; + os = "U-Boot"; arch = "arm64"; compression = "none"; load = <0x00200000>; @@ -25,6 +26,7 @@ description = "ARM Trusted Firmware"; data = /incbin/("../../../bl31-rk3368.bin"); type = "firmware"; + os = "arm-trusted-firmware"; arch = "arm64"; compression = "none"; load = <0x00100000>; @@ -43,8 +45,8 @@ default = "conf"; conf { description = "Theobroma Systems RK3368-uQ7 (Puma) SoM"; - firmware = "uboot"; - loadables = "atf"; + firmware = "atf"; + loadables = "uboot"; fdt = "fdt"; }; }; diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its index 520f846d66..cb7d92fead 100644 --- a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its +++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its @@ -17,6 +17,7 @@ description = "U-Boot (64-bit)"; data = /incbin/("../../../u-boot-nodtb.bin"); type = "standalone"; + os = "U-Boot"; arch = "arm64"; compression = "none"; load = <0x00200000>; @@ -26,16 +27,17 @@ data = /incbin/("../../../bl31-rk3399.bin"); type = "firmware"; arch = "arm64"; + os = "arm-trusted-firmware"; compression = "none"; - load = <0x00001000>; - entry = <0x00001000>; + load = <0x1000>; + entry = <0x1000>; }; pmu { description = "Cortex-M0 firmware"; data = /incbin/("../../../rk3399m0.bin"); type = "pmu-firmware"; compression = "none"; - load = <0xff8c0000>; + load = <0x180000>; }; fdt { description = "RK3399-Q7 (Puma) flat device-tree"; @@ -49,8 +51,8 @@ default = "conf"; conf { description = "Theobroma Systems RK3399-Q7 (Puma) SoM"; - firmware = "uboot"; - loadables = "atf"; + firmware = "atf"; + loadables = "uboot", "pmu"; fdt = "fdt"; }; }; diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c index 4b25cc2d7c..67242f5cc8 100644 --- a/board/ti/omap5_uevm/evm.c +++ b/board/ti/omap5_uevm/evm.c @@ -249,7 +249,7 @@ int ehci_hcd_stop(void) return omap_ehci_hcd_stop(); } -void usb_hub_reset_devices(int port) +void usb_hub_reset_devices(struct usb_hub_device *hub, int port) { /* The LAN9730 needs to be reset after the port power has been set. */ if (port == 3) { diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index d6f568bb92..5b9622e75e 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -399,6 +399,8 @@ static void spl_dram_init(void) mx6dq_dram_iocfg(64, &mx6dq_ddr_ioregs, &mx6dq_grp_ioregs); mx6_dram_cfg(&mem_q, &mx6q_2g_mmdc_calib, &h5t04g63afr); } + + udelay(100); } void board_init_f(ulong dummy) @@ -349,6 +349,16 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre) printf(" %s", pre); #ifdef CONFIG_DM_USB has_child = device_has_active_children(dev->dev); + if (device_get_uclass_id(dev->dev) == UCLASS_MASS_STORAGE) { + struct udevice *child; + + for (device_find_first_child(dev->dev, &child); + child; + device_find_next_child(&child)) { + if (device_get_uclass_id(child) == UCLASS_BLK) + has_child = 0; + } + } #else /* check if the device has connected children */ int i; @@ -414,8 +424,12 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre) udev = dev_get_parent_priv(child); - /* Ignore emulators, we only want real devices */ - if (device_get_uclass_id(child) != UCLASS_USB_EMUL) { + /* + * Ignore emulators and block child devices, we only want + * real devices + */ + if ((device_get_uclass_id(child) != UCLASS_USB_EMUL) && + (device_get_uclass_id(child) != UCLASS_BLK)) { usb_show_tree_graph(udev, pre); pre[index] = 0; } @@ -605,7 +619,9 @@ static void usb_show_info(struct usb_device *udev) for (device_find_first_child(udev->dev, &child); child; device_find_next_child(&child)) { - if (device_active(child)) { + if (device_active(child) && + (device_get_uclass_id(child) != UCLASS_USB_EMUL) && + (device_get_uclass_id(child) != UCLASS_BLK)) { udev = dev_get_parent_priv(child); usb_show_info(udev); } diff --git a/common/fdt_support.c b/common/fdt_support.c index f4f9543d54..6896dcb285 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -410,6 +410,45 @@ static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size, return p - (char *)buf; } +int fdt_record_loadable(void *blob, u32 index, const char *name, + uintptr_t load_addr, u32 size, uintptr_t entry_point, + const char *type, const char *os) +{ + int err, node; + + err = fdt_check_header(blob); + if (err < 0) { + printf("%s: %s\n", __func__, fdt_strerror(err)); + return err; + } + + /* find or create "/fit-images" node */ + node = fdt_find_or_add_subnode(blob, 0, "fit-images"); + if (node < 0) + return node; + + /* find or create "/fit-images/<name>" node */ + node = fdt_find_or_add_subnode(blob, node, name); + if (node < 0) + return node; + + /* + * We record these as 32bit entities, possibly truncating addresses. + * However, spl_fit.c is not 64bit safe either: i.e. we should not + * have an issue here. + */ + fdt_setprop_u32(blob, node, "load-addr", load_addr); + if (entry_point != -1) + fdt_setprop_u32(blob, node, "entry-point", entry_point); + fdt_setprop_u32(blob, node, "size", size); + if (type) + fdt_setprop_string(blob, node, "type", type); + if (os) + fdt_setprop_string(blob, node, "os", os); + + return node; +} + #ifdef CONFIG_NR_DRAM_BANKS #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS #else diff --git a/common/image.c b/common/image.c index 06fdca129c..4ec4744589 100644 --- a/common/image.c +++ b/common/image.c @@ -95,6 +95,7 @@ static const table_entry_t uimage_arch[] = { static const table_entry_t uimage_os[] = { { IH_OS_INVALID, "invalid", "Invalid OS", }, + { IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted Firmware" }, { IH_OS_LINUX, "linux", "Linux", }, #if defined(CONFIG_LYNXKDI) || defined(USE_HOSTCC) { IH_OS_LYNXOS, "lynxos", "LynxOS", }, diff --git a/common/spl/Kconfig b/common/spl/Kconfig index c62b82fd68..aef0034b33 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -228,6 +228,21 @@ config SPL_SHA256_SUPPORT SHA256 variant is supported: SHA512 and others are not currently supported in U-Boot. +config SPL_FIT_IMAGE_TINY + bool "Remove functionality from SPL FIT loading to reduce size" + depends on SPL_FIT + default y if MACH_SUN50I || MACH_SUN50I_H5 + help + Enable this to reduce the size of the FIT image loading code + in SPL, if space for the SPL binary is very tight. + + This removes the detection of image types (which forces the + first image to be treated as having a U-Boot style calling + convention) and skips the recording of each loaded payload + (i.e. loadable) into the FDT (modifying the loaded FDT to + ensure this information is available to the next image + invoked). + config SPL_CPU_SUPPORT bool "Support CPU drivers" help @@ -702,7 +717,7 @@ config SPL_YMODEM_SUPPORT means of transmitting U-Boot over a serial line for using in SPL, with a checksum to ensure correctness. -config SPL_ATF_SUPPORT +config SPL_ATF bool "Support ARM Trusted Firmware" depends on ARM64 help @@ -710,12 +725,6 @@ config SPL_ATF_SUPPORT is loaded by SPL(which is considered as BL2 in ATF terminology). More detail at: https://github.com/ARM-software/arm-trusted-firmware -config SPL_ATF_TEXT_BASE - depends on SPL_ATF_SUPPORT - hex "ATF BL31 base address" - help - This is the base address in memory for ATF BL31 text and entry point. - config TPL bool depends on SUPPORT_TPL diff --git a/common/spl/Makefile b/common/spl/Makefile index e229947b53..9bf8a2d81a 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -22,7 +22,7 @@ endif obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o -obj-$(CONFIG_$(SPL_TPL_)ATF_SUPPORT) += spl_atf.o +obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o diff --git a/common/spl/spl.c b/common/spl/spl.c index d232f67ba9..3bb20c7822 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -418,6 +418,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2) case IH_OS_U_BOOT: debug("Jumping to U-Boot\n"); break; +#if CONFIG_IS_ENABLED(ATF) + case IH_OS_ARM_TRUSTED_FIRMWARE: + debug("Jumping to U-Boot via ARM Trusted Firmware\n"); + spl_invoke_atf(&spl_image); + break; +#endif #ifdef CONFIG_SPL_OS_BOOT case IH_OS_LINUX: debug("Jumping to Linux\n"); @@ -442,11 +448,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2) debug("Failed to stash bootstage: err=%d\n", ret); #endif - if (CONFIG_IS_ENABLED(ATF_SUPPORT)) { - debug("loaded - jumping to U-Boot via ATF BL31.\n"); - bl31_entry(); - } - debug("loaded - jumping to U-Boot...\n"); spl_board_prepare_for_boot(); jump_to_image_no_args(&spl_image); diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c index 6e8f928044..63557c01e8 100644 --- a/common/spl/spl_atf.c +++ b/common/spl/spl_atf.c @@ -5,6 +5,7 @@ * reserved. * Copyright (C) 2016 Rockchip Electronic Co.,Ltd * Written by Kever Yang <kever.yang@rock-chips.com> + * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH * * SPDX-License-Identifier: BSD-3-Clause */ @@ -30,7 +31,7 @@ static struct bl31_params *bl2_to_bl31_params; * * @return bl31 params structure pointer */ -struct bl31_params *bl2_plat_get_bl31_params(void) +static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry) { struct entry_point_info *bl33_ep_info; @@ -66,7 +67,7 @@ struct bl31_params *bl2_plat_get_bl31_params(void) /* BL33 expects to receive the primary CPU MPID (through x0) */ bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); - bl33_ep_info->pc = CONFIG_SYS_TEXT_BASE; + bl33_ep_info->pc = bl33_entry; bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXECPTIONS); @@ -77,21 +78,88 @@ struct bl31_params *bl2_plat_get_bl31_params(void) return bl2_to_bl31_params; } -void raw_write_daif(unsigned int daif) +static inline void raw_write_daif(unsigned int daif) { __asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory"); } -void bl31_entry(void) +typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params); + +static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry, + uintptr_t fdt_addr) { struct bl31_params *bl31_params; - void (*entry)(struct bl31_params *params, void *plat_params) = NULL; + atf_entry_t atf_entry = (atf_entry_t)bl31_entry; - bl31_params = bl2_plat_get_bl31_params(); - entry = (void *)CONFIG_SPL_ATF_TEXT_BASE; + bl31_params = bl2_plat_get_bl31_params(bl33_entry); raw_write_daif(SPSR_EXCEPTION_MASK); dcache_disable(); - entry(bl31_params, NULL); + atf_entry((void *)bl31_params, (void *)fdt_addr); +} + +static int spl_fit_images_find_uboot(void *blob) +{ + int parent, node, ndepth; + const void *data; + + if (!blob) + return -FDT_ERR_BADMAGIC; + + parent = fdt_path_offset(blob, "/fit-images"); + if (parent < 0) + return -FDT_ERR_NOTFOUND; + + for (node = fdt_next_node(blob, parent, &ndepth); + (node >= 0) && (ndepth > 0); + node = fdt_next_node(blob, node, &ndepth)) { + if (ndepth != 1) + continue; + + data = fdt_getprop(blob, node, FIT_OS_PROP, NULL); + if (!data) + continue; + + if (genimg_get_os_id(data) == IH_OS_U_BOOT) + return node; + }; + + return -FDT_ERR_NOTFOUND; +} + +uintptr_t spl_fit_images_get_entry(void *blob, int node) +{ + ulong val; + + val = fdt_getprop_u32(blob, node, "entry-point"); + if (val == FDT_ERROR) + val = fdt_getprop_u32(blob, node, "load-addr"); + + debug("%s: entry point 0x%lx\n", __func__, val); + return val; +} + +void spl_invoke_atf(struct spl_image_info *spl_image) +{ + uintptr_t bl33_entry = CONFIG_SYS_TEXT_BASE; + void *blob = spl_image->fdt_addr; + int node; + + /* + * Find the U-Boot binary (in /fit-images) load addreess or + * entry point (if different) and pass it as the BL3-3 entry + * point. + * This will need to be extended to support Falcon mode. + */ + + node = spl_fit_images_find_uboot(blob); + if (node >= 0) + bl33_entry = spl_fit_images_get_entry(blob, node); + + /* + * We don't provide a BL3-2 entry yet, but this will be possible + * using similar logic. + */ + bl31_entry(spl_image->entry_point, bl33_entry, (uintptr_t)blob); } diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index 32d9ee5901..72ae8f4c50 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -2,7 +2,7 @@ * Copyright (C) 2016 Google, Inc * Written by Simon Glass <sjg@chromium.org> * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> @@ -16,22 +16,24 @@ #endif /** - * spl_fit_get_image_node(): By using the matching configuration subnode, + * spl_fit_get_image_name(): By using the matching configuration subnode, * retrieve the name of an image, specified by a property name and an index * into that. * @fit: Pointer to the FDT blob. * @images: Offset of the /images subnode. * @type: Name of the property within the configuration subnode. * @index: Index into the list of strings in this property. + * @outname: Name of the image * - * Return: the node offset of the respective image node or a negative - * error number. + * Return: 0 on success, or a negative error number */ -static int spl_fit_get_image_node(const void *fit, int images, - const char *type, int index) +static int spl_fit_get_image_name(const void *fit, int images, + const char *type, int index, + char **outname) { const char *name, *str; - int node, conf_node; + __maybe_unused int node; + int conf_node; int len, i; conf_node = fit_find_config_node(fit); @@ -63,7 +65,35 @@ static int spl_fit_get_image_node(const void *fit, int images, } } + *outname = (char *)str; + return 0; +} + +/** + * spl_fit_get_image_node(): By using the matching configuration subnode, + * retrieve the name of an image, specified by a property name and an index + * into that. + * @fit: Pointer to the FDT blob. + * @images: Offset of the /images subnode. + * @type: Name of the property within the configuration subnode. + * @index: Index into the list of strings in this property. + * + * Return: the node offset of the respective image node or a negative + * error number. + */ +static int spl_fit_get_image_node(const void *fit, int images, + const char *type, int index) +{ + char *str; + int err; + int node; + + err = spl_fit_get_image_name(fit, images, type, index, &str); + if (err) + return err; + debug("%s: '%s'\n", type, str); + node = fdt_subnode_offset(fit, images, str); if (node < 0) { debug("cannot find image node '%s': %d\n", str, node); @@ -116,15 +146,15 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size, * @info: points to information about the device to load data from * @sector: the start sector of the FIT image on the device * @fit: points to the flattened device tree blob describing the FIT - * image + * image * @base_offset: the beginning of the data area containing the actual * image data, relative to the beginning of the FIT * @node: offset of the DT node describing the image to load (relative - * to @fit) + * to @fit) * @image_info: will be filled with information about the loaded image - * If the FIT node does not contain a "load" (address) property, - * the image gets loaded to the address pointed to by the - * load_addr member in this struct. + * If the FIT node does not contain a "load" (address) property, + * the image gets loaded to the address pointed to by the + * load_addr member in this struct. * * Return: 0 on success or a negative error number. */ @@ -218,6 +248,73 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, return 0; } +static int spl_fit_append_fdt(struct spl_image_info *spl_image, + struct spl_load_info *info, ulong sector, + void *fit, int images, ulong base_offset) +{ + struct spl_image_info image_info; + int node, ret; + + /* Figure out which device tree the board wants to use */ + node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0); + if (node < 0) { + debug("%s: cannot find FDT node\n", __func__); + return node; + } + + /* + * Read the device tree and place it after the image. + * Align the destination address to ARCH_DMA_MINALIGN. + */ + image_info.load_addr = spl_image->load_addr + spl_image->size; + ret = spl_load_fit_image(info, sector, fit, base_offset, node, + &image_info); + + if (ret < 0) + return ret; + + /* Make the load-address of the FDT available for the SPL framework */ + spl_image->fdt_addr = (void *)image_info.load_addr; +#if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY) + /* Try to make space, so we can inject details on the loadables */ + ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192); +#endif + + return ret; +} + +static int spl_fit_record_loadable(const void *fit, int images, int index, + void *blob, struct spl_image_info *image) +{ + int ret = 0; +#if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY) + char *name; + int node; + + ret = spl_fit_get_image_name(fit, images, "loadables", + index, &name); + if (ret < 0) + return ret; + + node = spl_fit_get_image_node(fit, images, "loadables", index); + + ret = fdt_record_loadable(blob, index, name, image->load_addr, + image->size, image->entry_point, + fdt_getprop(fit, node, "type", NULL), + fdt_getprop(fit, node, "os", NULL)); +#endif + return ret; +} + +static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os) +{ +#if CONFIG_IS_ENABLED(FIT_IMAGE_TINY) + return -ENOTSUPP; +#else + return fit_image_get_os(fit, noffset, os); +#endif +} + int spl_load_simple_fit(struct spl_image_info *spl_image, struct spl_load_info *info, ulong sector, void *fit) { @@ -225,7 +322,6 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, ulong size; unsigned long count; struct spl_image_info image_info; - bool boot_os = false; int node = -1; int images, ret; int base_offset, align_len = ARCH_DMA_MINALIGN - 1; @@ -273,17 +369,18 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, return -1; } + /* + * Find the U-Boot image using the following search order: + * - start at 'firmware' (e.g. an ARM Trusted Firmware) + * - fall back 'kernel' (e.g. a Falcon-mode OS boot + * - fall back to using the first 'loadables' entry + */ + if (node < 0) + node = spl_fit_get_image_node(fit, images, "firmware", 0); #ifdef CONFIG_SPL_OS_BOOT - /* Find OS image first */ - node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0); if (node < 0) - debug("No kernel image.\n"); - else - boot_os = true; + node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0); #endif - /* find the U-Boot image */ - if (node < 0) - node = spl_fit_get_image_node(fit, images, "firmware", 0); if (node < 0) { debug("could not find firmware image, trying loadables...\n"); node = spl_fit_get_image_node(fit, images, "loadables", 0); @@ -305,34 +402,29 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, if (ret) return ret; -#ifdef CONFIG_SPL_OS_BOOT - if (!fit_image_get_os(fit, node, &spl_image->os)) + /* + * For backward compatibility, we treat the first node that is + * as a U-Boot image, if no OS-type has been declared. + */ + if (!spl_fit_image_get_os(fit, node, &spl_image->os)) debug("Image OS is %s\n", genimg_get_os_name(spl_image->os)); -#else - spl_image->os = IH_OS_U_BOOT; +#if !defined(CONFIG_SPL_OS_BOOT) + else + spl_image->os = IH_OS_U_BOOT; #endif - if (!boot_os) { - /* Figure out which device tree the board wants to use */ - node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0); - if (node < 0) { - debug("%s: cannot find FDT node\n", __func__); - return node; - } - - /* - * Read the device tree and place it after the image. - * Align the destination address to ARCH_DMA_MINALIGN. - */ - image_info.load_addr = spl_image->load_addr + spl_image->size; - ret = spl_load_fit_image(info, sector, fit, base_offset, node, - &image_info); - if (ret < 0) - return ret; - } + /* + * Booting a next-stage U-Boot may require us to append the FDT. + * We allow this to fail, as the U-Boot image might embed its FDT. + */ + if (spl_image->os == IH_OS_U_BOOT) + spl_fit_append_fdt(spl_image, info, sector, fit, + images, base_offset); /* Now check if there are more images for us to load */ for (; ; index++) { + uint8_t os_type = IH_OS_INVALID; + node = spl_fit_get_image_node(fit, images, "loadables", index); if (node < 0) break; @@ -342,6 +434,15 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, if (ret < 0) continue; + if (!spl_fit_image_get_os(fit, node, &os_type)) + debug("Loadable is %s\n", genimg_get_os_name(os_type)); + + if (os_type == IH_OS_U_BOOT) { + spl_fit_append_fdt(&image_info, info, sector, + fit, images, base_offset); + spl_image->fdt_addr = image_info.fdt_addr; + } + /* * If the "firmware" image did not provide an entry point, * use the first valid entry point from the loadables. @@ -349,6 +450,12 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, if (spl_image->entry_point == FDT_ERROR && image_info.entry_point != FDT_ERROR) spl_image->entry_point = image_info.entry_point; + + /* Record our loadables into the FDT */ + if (spl_image->fdt_addr) + spl_fit_record_loadable(fit, images, index, + spl_image->fdt_addr, + &image_info); } /* diff --git a/common/usb_hub.c b/common/usb_hub.c index 325d16dfc8..024dadb277 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -57,7 +57,7 @@ struct usb_device_scan { static LIST_HEAD(usb_scan_list); -__weak void usb_hub_reset_devices(int port) +__weak void usb_hub_reset_devices(struct usb_hub_device *hub, int port) { return; } @@ -853,7 +853,7 @@ static int usb_hub_configure(struct usb_device *dev) * should occur in the board file of the device. */ for (i = 0; i < dev->maxchild; i++) - usb_hub_reset_devices(i + 1); + usb_hub_reset_devices(hub, i + 1); /* * Only add the connected USB devices, including potential hubs, diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 9bc9dc3394..48b0e85839 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set +# CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 3521500b0d..47c0b4c622 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 68ae70e554..0773aca0d4 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -13,7 +13,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_AHCI=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 175f9fa28c..814df1cd27 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index dc3cda4260..731222cdd0 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -12,8 +12,7 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -CONFIG_SPL_ATF_SUPPORT=y -CONFIG_SPL_ATF_TEXT_BASE=0x00010000 +CONFIG_SPL_ATF=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 76bfbfdc2c..5379cf3b3b 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_SYS_STDIO_DEREGISTER is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 9e6e458f8e..fe364d07ce 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_SYS_STDIO_DEREGISTER is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index c9e8b8b1d6..dd4d73ce9e 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_HDMIDETECT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_SYS_STDIO_DEREGISTER is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 6e93c49b5c..256ccb9b92 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y @@ -48,3 +48,4 @@ CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index ab8b6d20a7..21cfb85582 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index fbe96512c6..aaf9646491 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE_RQS=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y @@ -16,6 +16,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SPL=y CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " CONFIG_CRC32_VERIFY=y @@ -40,3 +41,4 @@ CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index ce7c288803..b2ac4a276c 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_GEAM=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y @@ -40,3 +40,4 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 4e51892cf8..d920af74b9 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_GEAM=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 94af53e9c7..72ae08e700 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y @@ -38,3 +38,4 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 0a990d7f75..ffd12bf48e 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y @@ -40,3 +40,4 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index dde1cc2b33..aaaf9e6b01 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 8dae75cefd..9548b961e3 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -32,8 +32,7 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 -CONFIG_SPL_ATF_SUPPORT=y -CONFIG_SPL_ATF_TEXT_BASE=0x10000 +CONFIG_SPL_ATF=y CONFIG_TPL=y CONFIG_TPL_BOOTROM_SUPPORT=y CONFIG_TPL_DRIVERS_MISC_SUPPORT=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 0f9794c9f1..7c4657922a 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MCCMON6=y CONFIG_SPL_SERIAL_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg" CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 01a20e61a6..97f7f9aa73 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -6,7 +6,7 @@ CONFIG_TARGET_MCCMON6=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg" CONFIG_SPL=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig new file mode 100644 index 0000000000..0ab19e9f3a --- /dev/null +++ b/configs/mx53ppd_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX5=y +CONFIG_TARGET_MX53PPD=y +CONFIG_FIT=y +CONFIG_BOOTCOUNT=y +CONFIG_BOOTCOUNT_EXT=y +CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE="mmc" +CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5" +CONFIG_SYS_BOOTCOUNT_EXT_NAME="/boot/failures" +CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 +CONFIG_NETDEVICES=y +CONFIG_VIDEO=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ge/mx53ppd/imximage.cfg" +CONFIG_BOOTDELAY=1 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_DISPLAY_CPUINFO=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_I2C=y +CONFIG_RTC_S35392A=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_USB=y +CONFIG_USB_STORAGE=y +# CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_OF_LIBFDT=y + +CONFIG_MMC=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index bd7917e51e..37a2f2abd3 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -12,7 +12,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_SYS_STDIO_DEREGISTER is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 7e344a1537..98c39bb22f 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 90102b349c..caed26145f 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 1ec672e5a5..2c184f6f77 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -12,6 +12,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index 456ae6581e..029c9de2ce 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -12,7 +12,7 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 09b36ccb09..f28f9b7a4e 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -12,7 +12,9 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index ebbf8a9b05..18705ed534 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -5,6 +5,8 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0 +CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 CONFIG_TARGET_PUMA_RK3399=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -23,6 +25,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_ATF=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index f064928b79..b92b181d4f 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -8,7 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index d053db743e..4b6b9d9aae 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/doc/git-mailrc b/doc/git-mailrc index 556db0a818..5a365cddd9 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -133,6 +133,7 @@ alias spi uboot, jagan alias spmi uboot, mateusz alias ubi uboot, hs alias usb uboot, marex +alias xhci uboot, bmeng alias video uboot, ag alias patman uboot, sjg alias buildman uboot, sjg diff --git a/drivers/Kconfig b/drivers/Kconfig index 613e60235d..c2e813f5ad 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -10,6 +10,8 @@ source "drivers/ata/Kconfig" source "drivers/block/Kconfig" +source "drivers/bootcount/Kconfig" + source "drivers/clk/Kconfig" source "drivers/cpu/Kconfig" diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig new file mode 100644 index 0000000000..c9d627cce2 --- /dev/null +++ b/drivers/bootcount/Kconfig @@ -0,0 +1,58 @@ +# +# Boot count configuration +# + +menu "Boot count support" + +config BOOTCOUNT + bool "Enable Boot count support" + help + Enable boot count support, which provides the ability to store the + number of times the board has booted on a number of different + persistent storage mediums. + +if BOOTCOUNT + +config BOOTCOUNT_EXT + bool "Boot counter on EXT filesystem" + help + Add support for maintaining boot count in a file on an EXT + filesystem. + +if BOOTCOUNT_EXT + +config SYS_BOOTCOUNT_EXT_INTERFACE + string "Interface on which to find boot counter EXT filesystem" + default "mmc" + depends on BOOTCOUNT_EXT + help + Set the interface to use when locating the filesystem to use for the + boot counter. + +config SYS_BOOTCOUNT_EXT_DEVPART + string "Partition of the boot counter EXT filesystem" + default "0:1" + depends on BOOTCOUNT_EXT + help + Set the partition to use when locating the filesystem to use for the + boot counter. + +config SYS_BOOTCOUNT_EXT_NAME + string "Path and filename of the EXT filesystem based boot counter" + default "/boot/failures" + depends on BOOTCOUNT_EXT + help + Set the filename and path of the file used to store the boot counter. + +config SYS_BOOTCOUNT_ADDR + hex "RAM address used for reading and writing the boot counter" + default 0x7000A000 + depends on BOOTCOUNT_EXT + help + Set the address used for reading and writing the boot counter. + +endif + +endif + +endmenu diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index ed9659ad97..45445d24bf 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_BOOTCOUNT_AM33XX) += bootcount_davinci.o obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o obj-$(CONFIG_BOOTCOUNT_ENV) += bootcount_env.o obj-$(CONFIG_BOOTCOUNT_I2C) += bootcount_i2c.o +obj-$(CONFIG_BOOTCOUNT_EXT) += bootcount_ext.o diff --git a/drivers/bootcount/bootcount_ext.c b/drivers/bootcount/bootcount_ext.c new file mode 100644 index 0000000000..e0dd21ba6a --- /dev/null +++ b/drivers/bootcount/bootcount_ext.c @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2017 General Electric Company. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <bootcount.h> +#include <fs.h> +#include <mapmem.h> + +#define BC_MAGIC 0xbc + +void bootcount_store(ulong a) +{ + u8 *buf; + loff_t len; + int ret; + + if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE, + CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) { + puts("Error selecting device\n"); + return; + } + + buf = map_sysmem(CONFIG_SYS_BOOTCOUNT_ADDR, 2); + buf[0] = BC_MAGIC; + buf[1] = (a & 0xff); + unmap_sysmem(buf); + + ret = fs_write(CONFIG_SYS_BOOTCOUNT_EXT_NAME, + CONFIG_SYS_BOOTCOUNT_ADDR, 0, 2, &len); + if (ret != 0) + puts("Error storing bootcount\n"); +} + +ulong bootcount_load(void) +{ + u8 *buf; + loff_t len_read; + int ret; + + if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE, + CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) { + puts("Error selecting device\n"); + return 0; + } + + ret = fs_read(CONFIG_SYS_BOOTCOUNT_EXT_NAME, CONFIG_SYS_BOOTCOUNT_ADDR, + 0, 2, &len_read); + if (ret != 0 || len_read != 2) { + puts("Error loading bootcount\n"); + return 0; + } + + buf = map_sysmem(CONFIG_SYS_BOOTCOUNT_ADDR, 2); + if (buf[0] == BC_MAGIC) + ret = buf[1]; + + unmap_sysmem(buf); + + return ret; +} diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index e21d056efb..2e85ac7df2 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -569,11 +569,6 @@ static const struct spi_clkreg spi_clkregs[] = { .sel_shift = CLK_SPI5_PLL_SEL_SHIFT, }, }; -static inline u32 extract_bits(u32 val, unsigned width, unsigned shift) -{ - return (val >> shift) & ((1 << width) - 1); -} - static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id) { const struct spi_clkreg *spiclk = NULL; @@ -590,7 +585,8 @@ static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id) } val = readl(&cru->clksel_con[spiclk->reg]); - div = extract_bits(val, CLK_SPI_PLL_DIV_CON_WIDTH, spiclk->div_shift); + div = bitfield_extract(val, spiclk->div_shift, + CLK_SPI_PLL_DIV_CON_WIDTH); return DIV_TO_RATE(GPLL_HZ, div); } diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index abf1da2ae3..205274e947 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -317,16 +317,19 @@ static int i2c_init_transfer_(struct mxc_i2c_bus *i2c_bus, u8 chip, temp |= I2CR_MTX | I2CR_TX_NO_AK; writeb(temp, base + (I2CR << reg_shift)); - /* write slave address */ - ret = tx_byte(i2c_bus, chip << 1); - if (ret < 0) - return ret; - - while (alen--) { - ret = tx_byte(i2c_bus, (addr >> (alen * 8)) & 0xff); + if (alen >= 0) { + /* write slave address */ + ret = tx_byte(i2c_bus, chip << 1); if (ret < 0) return ret; + + while (alen--) { + ret = tx_byte(i2c_bus, (addr >> (alen * 8)) & 0xff); + if (ret < 0) + return ret; + } } + return 0; } @@ -537,9 +540,11 @@ static int bus_i2c_read(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, if (ret < 0) return ret; - temp = readb(base + (I2CR << reg_shift)); - temp |= I2CR_RSTA; - writeb(temp, base + (I2CR << reg_shift)); + if (alen >= 0) { + temp = readb(base + (I2CR << reg_shift)); + temp |= I2CR_RSTA; + writeb(temp, base + (I2CR << reg_shift)); + } ret = tx_byte(i2c_bus, (chip << 1) | 1); if (ret < 0) { diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c b/drivers/pinctrl/nxp/pinctrl-imx6.c index 0f767d9079..cac577b40b 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx6.c +++ b/drivers/pinctrl/nxp/pinctrl-imx6.c @@ -13,6 +13,11 @@ static struct imx_pinctrl_soc_info imx6_pinctrl_soc_info; +/* FIXME Before reloaction, BSS is overlapped with DT area */ +static struct imx_pinctrl_soc_info imx6ul_pinctrl_soc_info = { + .flags = ZERO_OFFSET_VALID, +}; + static struct imx_pinctrl_soc_info imx6_snvs_pinctrl_soc_info = { .flags = ZERO_OFFSET_VALID, }; @@ -32,7 +37,7 @@ static const struct udevice_id imx6_pinctrl_match[] = { { .compatible = "fsl,imx6sll-iomuxc-snvs", .data = (ulong)&imx6_snvs_pinctrl_soc_info }, { .compatible = "fsl,imx6sll-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, { .compatible = "fsl,imx6sx-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, - { .compatible = "fsl,imx6ul-iomuxc", .data = (ulong)&imx6_pinctrl_soc_info }, + { .compatible = "fsl,imx6ul-iomuxc", .data = (ulong)&imx6ul_pinctrl_soc_info }, { .compatible = "fsl,imx6ull-iomuxc-snvs", .data = (ulong)&imx6_snvs_pinctrl_soc_info }, { /* sentinel */ } }; diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c index cab268c7d6..19a7415522 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c @@ -70,11 +70,21 @@ static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf, PMUGRF_GPIO1C0_SEL_MASK, PMUGRF_I2C0PMU_SCL << PMUGRF_GPIO1C0_SEL_SHIFT); break; + case PERIPH_ID_I2C8: + rk_clrsetreg(&pmugrf->gpio1c_iomux, + PMUGRF_GPIO1C4_SEL_MASK, + PMUGRF_I2C8PMU_SDA << PMUGRF_GPIO1C4_SEL_SHIFT); + rk_clrsetreg(&pmugrf->gpio1c_iomux, + PMUGRF_GPIO1C5_SEL_MASK, + PMUGRF_I2C8PMU_SCL << PMUGRF_GPIO1C5_SEL_SHIFT); + break; case PERIPH_ID_I2C1: case PERIPH_ID_I2C2: case PERIPH_ID_I2C3: case PERIPH_ID_I2C4: case PERIPH_ID_I2C5: + case PERIPH_ID_I2C6: + case PERIPH_ID_I2C7: default: debug("i2c id = %d iomux error!\n", i2c_id); break; @@ -301,6 +311,9 @@ static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags) case PERIPH_ID_I2C3: case PERIPH_ID_I2C4: case PERIPH_ID_I2C5: + case PERIPH_ID_I2C6: + case PERIPH_ID_I2C7: + case PERIPH_ID_I2C8: pinctrl_rk3399_i2c_config(priv->grf, priv->pmugrf, func); break; case PERIPH_ID_SPI0: @@ -375,6 +388,12 @@ static int rk3399_pinctrl_get_periph_id(struct udevice *dev, return PERIPH_ID_I2C4; case 38: return PERIPH_ID_I2C5; + case 37: + return PERIPH_ID_I2C6; + case 36: + return PERIPH_ID_I2C7; + case 58: + return PERIPH_ID_I2C8; case 65: return PERIPH_ID_SDMMC1; #if CONFIG_IS_ENABLED(GMAC_ROCKCHIP) diff --git a/drivers/pwm/pwm-imx-util.c b/drivers/pwm/pwm-imx-util.c index 534dd8eece..97ac0c8fc0 100644 --- a/drivers/pwm/pwm-imx-util.c +++ b/drivers/pwm/pwm-imx-util.c @@ -23,10 +23,12 @@ struct pwm_regs *pwm_id_to_reg(int pwm_id) return (struct pwm_regs *)PWM1_BASE_ADDR; case 1: return (struct pwm_regs *)PWM2_BASE_ADDR; +#ifdef CONFIG_MX6 case 2: return (struct pwm_regs *)PWM3_BASE_ADDR; case 3: return (struct pwm_regs *)PWM4_BASE_ADDR; +#endif #ifdef CONFIG_MX6SX case 4: return (struct pwm_regs *)PWM5_BASE_ADDR; diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index d06130c7a2..2964bb2211 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -30,4 +30,10 @@ config RTC_DS1307 Support for Dallas Semiconductor (now Maxim) DS1307 and DS1338/9 and compatible Real Time Clock devices. +config RTC_S35392A + bool "Enable S35392A driver" + select BITREVERSE + help + Enable s35392a driver which provides rtc get and set function. + endmenu diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 003e31aeba..7a8f97a05f 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -49,5 +49,6 @@ obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o obj-$(CONFIG_RTC_RV3029) += rv3029.o obj-$(CONFIG_RTC_RX8025) += rx8025.o obj-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o +obj-$(CONFIG_RTC_S35392A) += s35392a.o obj-$(CONFIG_SANDBOX) += sandbox_rtc.o obj-$(CONFIG_RTC_X1205) += x1205.o diff --git a/drivers/rtc/s35392a.c b/drivers/rtc/s35392a.c new file mode 100644 index 0000000000..9adcefc98d --- /dev/null +++ b/drivers/rtc/s35392a.c @@ -0,0 +1,365 @@ +/* + * SII Semiconductor Corporation S35392A RTC driver. + * + * Copyright (c) 2017, General Electric Company + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <command.h> +#include <common.h> +#include <dm.h> +#include <i2c.h> +#include <linux/bitrev.h> +#include <rtc.h> + +#define S35390A_CMD_STATUS1 0x30 +#define S35390A_CMD_STATUS2 0x31 +#define S35390A_CMD_TIME1 0x32 +#define S35390A_CMD_TIME2 0x33 +#define S35390A_CMD_INT2_REG1 0x35 + +#define S35390A_BYTE_YEAR 0 +#define S35390A_BYTE_MONTH 1 +#define S35390A_BYTE_DAY 2 +#define S35390A_BYTE_WDAY 3 +#define S35390A_BYTE_HOURS 4 +#define S35390A_BYTE_MINS 5 +#define S35390A_BYTE_SECS 6 + +/* flags for STATUS1 */ +#define S35390A_FLAG_POC 0x01 +#define S35390A_FLAG_BLD 0x02 +#define S35390A_FLAG_INT2 0x04 +#define S35390A_FLAG_24H 0x40 +#define S35390A_FLAG_RESET 0x80 + +/* + * If either BLD or POC is set, then the chip has lost power long enough for + * the time value to become invalid. + */ +#define S35390A_LOW_VOLTAGE (S35390A_FLAG_POC | S35390A_FLAG_BLD) + +/*---------------------------------------------------------------------*/ +#undef DEBUG_RTC + +#ifdef DEBUG_RTC +#define DEBUGR(fmt, args...) printf(fmt, ##args) +#else +#define DEBUGR(fmt, args...) +#endif +/*---------------------------------------------------------------------*/ + +#ifdef CONFIG_DM_RTC +#define DEV_TYPE struct udevice +#else +/* Local udevice */ +struct ludevice { + u8 chip; +}; + +#define DEV_TYPE struct ludevice +struct ludevice dev; + +#endif + +#define msleep(a) udelay(a * 1000) + +int lowvoltage; + +static int s35392a_rtc_reset(DEV_TYPE *dev); + +static int s35392a_rtc_read(DEV_TYPE *dev, u8 reg, u8 *buf, int len) +{ + int ret; + +#ifdef CONFIG_DM_RTC + /* TODO: we need to tweak the chip address to reg */ + ret = dm_i2c_read(dev, 0, buf, len); +#else + (void)dev; + ret = i2c_read(reg, 0, -1, buf, len); +#endif + + return ret; +} + +static int s35392a_rtc_write(DEV_TYPE *dev, u8 reg, u8 *buf, int len) +{ + int ret; + +#ifdef CONFIG_DM_RTC + /* TODO: we need to tweak the chip address to reg */ + ret = dm_i2c_write(dev, 0, buf, 1); +#else + (void)dev; + ret = i2c_write(reg, 0, 0, buf, len); +#endif + + return ret; +} + +static int s35392a_rtc_read8(DEV_TYPE *dev, unsigned int reg) +{ + u8 val; + int ret; + + ret = s35392a_rtc_read(dev, reg, &val, sizeof(val)); + return ret < 0 ? ret : val; +} + +static int s35392a_rtc_write8(DEV_TYPE *dev, unsigned int reg, int val) +{ + int ret; + u8 lval = val; + + ret = s35392a_rtc_write(dev, reg, &lval, sizeof(lval)); + return ret < 0 ? ret : 0; +} + +static int validate_time(const struct rtc_time *tm) +{ + if ((tm->tm_year < 2000) || (tm->tm_year > 2099)) + return -EINVAL; + + if ((tm->tm_mon < 1) || (tm->tm_mon > 12)) + return -EINVAL; + + if ((tm->tm_mday < 1) || (tm->tm_mday > 31)) + return -EINVAL; + + if ((tm->tm_wday < 0) || (tm->tm_wday > 6)) + return -EINVAL; + + if ((tm->tm_hour < 0) || (tm->tm_hour > 23)) + return -EINVAL; + + if ((tm->tm_min < 0) || (tm->tm_min > 59)) + return -EINVAL; + + if ((tm->tm_sec < 0) || (tm->tm_sec > 59)) + return -EINVAL; + + return 0; +} + +void s35392a_rtc_init(DEV_TYPE *dev) +{ + int status; + + status = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); + if (status < 0) + goto error; + + DEBUGR("init: S35390A_CMD_STATUS1: 0x%x\n", status); + + lowvoltage = status & S35390A_LOW_VOLTAGE ? 1 : 0; + + if (status & S35390A_FLAG_POC) + /* + * Do not communicate for 0.5 seconds since the power-on + * detection circuit is in operation. + */ + msleep(500); + + else if (!lowvoltage) + /* + * If both POC and BLD are unset everything is fine. + */ + return; + + if (lowvoltage) + printf("RTC low voltage detected\n"); + + if (!s35392a_rtc_reset(dev)) + return; + +error: + printf("Error RTC init.\n"); +} + +/* Get the current time from the RTC */ +static int s35392a_rtc_get(DEV_TYPE *dev, struct rtc_time *tm) +{ + u8 date[7]; + int ret, i; + + if (lowvoltage) { + DEBUGR("RTC low voltage detected\n"); + return -EINVAL; + } + + ret = s35392a_rtc_read(dev, S35390A_CMD_TIME1, date, sizeof(date)); + if (ret < 0) { + DEBUGR("Error reading date from RTC\n"); + return -EIO; + } + + /* This chip returns the bits of each byte in reverse order */ + for (i = 0; i < 7; ++i) + date[i] = bitrev8(date[i]); + + tm->tm_sec = bcd2bin(date[S35390A_BYTE_SECS]); + tm->tm_min = bcd2bin(date[S35390A_BYTE_MINS]); + tm->tm_hour = bcd2bin(date[S35390A_BYTE_HOURS] & ~S35390A_FLAG_24H); + tm->tm_wday = bcd2bin(date[S35390A_BYTE_WDAY]); + tm->tm_mday = bcd2bin(date[S35390A_BYTE_DAY]); + tm->tm_mon = bcd2bin(date[S35390A_BYTE_MONTH]); + tm->tm_year = bcd2bin(date[S35390A_BYTE_YEAR]) + 2000; + + DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + return 0; +} + +/* Set the RTC */ +static int s35392a_rtc_set(DEV_TYPE *dev, const struct rtc_time *tm) +{ + int i, ret; + int status; + u8 date[7]; + + DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + ret = validate_time(tm); + if (ret < 0) + return -EINVAL; + + /* We support only 24h mode */ + ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); + if (ret < 0) + return -EIO; + status = ret; + + ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, + status | S35390A_FLAG_24H); + if (ret < 0) + return -EIO; + + date[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 2000); + date[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon); + date[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday); + date[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday); + date[S35390A_BYTE_HOURS] = bin2bcd(tm->tm_hour); + date[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min); + date[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec); + + /* This chip expects the bits of each byte to be in reverse order */ + for (i = 0; i < 7; ++i) + date[i] = bitrev8(date[i]); + + ret = s35392a_rtc_write(dev, S35390A_CMD_TIME1, date, sizeof(date)); + if (ret < 0) { + DEBUGR("Error writing date to RTC\n"); + return -EIO; + } + + /* Now we have time. Reset the low voltage status */ + lowvoltage = 0; + + return 0; +} + +/* Reset the RTC. */ +static int s35392a_rtc_reset(DEV_TYPE *dev) +{ + int buf; + int ret; + unsigned int initcount = 0; + + buf = S35390A_FLAG_RESET; + +initialize: + ret = s35392a_rtc_write8(dev, S35390A_CMD_STATUS1, buf); + if (ret < 0) + return -EIO; + + ret = s35392a_rtc_read8(dev, S35390A_CMD_STATUS1); + if (ret < 0) + return -EIO; + buf = ret; + + if (!lowvoltage) + lowvoltage = buf & S35390A_LOW_VOLTAGE ? 1 : 0; + + if (buf & S35390A_LOW_VOLTAGE) { + /* Try up to five times to reset the chip */ + if (initcount < 5) { + ++initcount; + goto initialize; + } else { + return -EIO; + } + } + + return 0; +} + +#ifndef CONFIG_DM_RTC + +int rtc_get(struct rtc_time *tm) +{ + return s35392a_rtc_get(&dev, tm); +} + +int rtc_set(struct rtc_time *tm) +{ + return s35392a_rtc_set(&dev, tm); +} + +void rtc_reset(void) +{ + s35392a_rtc_reset(&dev); +} + +void rtc_init(void) +{ + s35392a_rtc_init(&dev); +} + +#else + +static int s35392a_probe(struct udevice *dev) +{ + s35392a_rtc_init(dev); + return 0; +} + +static const struct rtc_ops s35392a_rtc_ops = { + .get = s35392a_rtc_get, + .set = s35392a_rtc_set, + .read8 = s35392a_rtc_read8, + .write8 = s35392a_rtc_write8, + .reset = s35392a_rtc_reset, +}; + +static const struct udevice_id s35392a_rtc_ids[] = { + { .compatible = "sii,s35392a-rtc" }, + { } +}; + +U_BOOT_DRIVER(s35392a_rtc) = { + .name = "s35392a_rtc", + .id = UCLASS_RTC, + .probe = s35392a_probe, + .of_match = s35392a_rtc_ids, + .ops = &s35392a_rtc_ops, +}; + +#endif diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c index fd3da922a6..dd7b9cddb1 100644 --- a/drivers/usb/gadget/f_sdp.c +++ b/drivers/usb/gadget/f_sdp.c @@ -32,6 +32,7 @@ #include <spl.h> #include <image.h> #include <imximage.h> +#include <watchdog.h> #define HID_REPORT_ID_MASK 0x000000ff @@ -602,6 +603,8 @@ int sdp_init(int controller_index) puts("\rCTRL+C - Operation aborted.\n"); return 1; } + + WATCHDOG_RESET(); usb_gadget_handle_interrupts(controller_index); } @@ -712,6 +715,7 @@ void sdp_handle(int controller_index) return; } + WATCHDOG_RESET(); usb_gadget_handle_interrupts(controller_index); sdp_handle_in_ep(); diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c index b6df130a14..4d5a9a8c42 100644 --- a/drivers/usb/gadget/storage_common.c +++ b/drivers/usb/gadget/storage_common.c @@ -309,7 +309,7 @@ static struct fsg_lun *fsg_lun_from_dev(struct device *dev) #define FSG_NUM_BUFFERS 2 /* Default size of buffer length. */ -#define FSG_BUFLEN ((u32)16384) +#define FSG_BUFLEN ((u32)131072) /* Maximal number of LUNs supported in mass storage function */ #define FSG_MAX_LUNS 8 diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 5264475fa5..c79f866cf1 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -47,6 +47,14 @@ config USB_XHCI_ROCKCHIP help Enables support for the on-chip xHCI controller on Rockchip SoCs. +config USB_XHCI_RCAR + bool "Renesas RCar USB 3.0 support" + default y + depends on ARCH_RMOBILE + help + Choose this option to add support for USB 3.0 driver on Renesas + RCar Gen3 SoCs. + config USB_XHCI_STI bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller" depends on ARCH_STI diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 83903fcf99..79df888fce 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -59,6 +59,7 @@ obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o +obj-$(CONFIG_USB_XHCI_RCAR) += xhci-rcar.o obj-$(CONFIG_USB_XHCI_STI) += dwc3-sti-glue.o # designware diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index be3e842dcc..2582bf36eb 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -210,9 +210,6 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl) uint32_t cmd, reg; int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams)); - if (!ctrl || !ctrl->hcor) - return -EINVAL; - cmd = ehci_readl(&ctrl->hcor->or_usbcmd); /* If not run, directly return */ if (!(cmd & CMD_RUN)) @@ -595,8 +592,9 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, * dangerous operation, it's responsibility of the calling * code to make sure enough space is reserved. */ - invalidate_dcache_range((unsigned long)buffer, - ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN)); + if (buffer != NULL && length > 0) + invalidate_dcache_range((unsigned long)buffer, + ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN)); /* Check that the TD processing happened */ if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) @@ -1112,6 +1110,8 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor); if (rc) return rc; + if (!ctrl->hccr || !ctrl->hcor) + return -1; if (init == USB_INIT_DEVICE) goto done; @@ -1613,11 +1613,14 @@ int ehci_register(struct udevice *dev, struct ehci_hccr *hccr, { struct usb_bus_priv *priv = dev_get_uclass_priv(dev); struct ehci_ctrl *ctrl = dev_get_priv(dev); - int ret; + int ret = -1; debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__, dev->name, ctrl, hccr, hcor, init); + if (!ctrl || !hccr || !hcor) + goto err; + priv->desc_before_addr = true; ehci_setup_ops(ctrl, ops); diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index 7c39becd24..18692b732e 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h @@ -101,11 +101,11 @@ struct usb_linux_config_descriptor { } __attribute__ ((packed)); #if defined CONFIG_EHCI_DESC_BIG_ENDIAN -#define ehci_readl(x) cpu_to_be32(readl(x)) -#define ehci_writel(a, b) writel(cpu_to_be32(b), a) +#define ehci_readl(x) be32_to_cpu(__raw_readl(x)) +#define ehci_writel(a, b) __raw_writel(cpu_to_be32(b), a) #else -#define ehci_readl(x) cpu_to_le32(readl(x)) -#define ehci_writel(a, b) writel(cpu_to_le32(b), a) +#define ehci_readl(x) readl(x) +#define ehci_writel(a, b) writel(b, a) #endif #if defined CONFIG_EHCI_MMIO_BIG_ENDIAN diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index 6ef51906c2..28d2bc8454 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -82,6 +82,7 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) } } while ((tmp & USBE) != USBE); r8a66597_bclr(r8a66597, USBE, SYSCFG0); +#if !defined(CONFIG_RZA_USB) r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0); i = 0; @@ -94,6 +95,20 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) return -1; } } while ((tmp & SCKE) != SCKE); +#else + /* + * RZ/A Only: + * Bits XTAL(UCKSEL) and UPLLE in SYSCFG0 for USB0 controls both USB0 + * and USB1, so we must always set the USB0 register + */ +#if (CONFIG_R8A66597_XTAL == 1) + setbits(le16, R8A66597_BASE0, XTAL); +#endif + mdelay(1); + setbits(le16, R8A66597_BASE0, UPLLE); + mdelay(1); + r8a66597_bset(r8a66597, SUSPM, SUSPMODE0); +#endif /* CONFIG_RZA_USB */ #endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */ return 0; @@ -101,6 +116,7 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) static void r8a66597_clock_disable(struct r8a66597 *r8a66597) { +#if !defined(CONFIG_RZA_USB) r8a66597_bclr(r8a66597, SCKE, SYSCFG0); udelay(1); #if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597) @@ -108,6 +124,15 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597) r8a66597_bclr(r8a66597, XCKE, SYSCFG0); r8a66597_bclr(r8a66597, USBE, SYSCFG0); #endif +#else + r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0); + + clrbits(le16, R8A66597_BASE0, UPLLE); + mdelay(1); + r8a66597_bclr(r8a66597, USBE, SYSCFG0); + mdelay(1); + +#endif } static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port) @@ -118,7 +143,9 @@ static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port) r8a66597_bset(r8a66597, val, get_syscfg_reg(port)); r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port)); +#if !defined(CONFIG_RZA_USB) r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port)); +#endif } static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port) @@ -148,7 +175,9 @@ static int enable_controller(struct r8a66597 *r8a66597) if (ret < 0) return ret; +#if !defined(CONFIG_RZA_USB) r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG); +#endif r8a66597_bset(r8a66597, USBE, SYSCFG0); r8a66597_bset(r8a66597, INTL, SOFCFG); @@ -266,12 +295,30 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev, unsigned long setup_addr = USBREQ; u16 intsts1; int timeout = 3000; +#if defined(CONFIG_RZA_USB) + u16 dcpctr; + int timeout2 = 10000; +#endif u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum; r8a66597_write(r8a66597, make_devsel(devsel) | (8 << dev->maxpacketsize), DCPMAXP); r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1); +#if defined(CONFIG_RZA_USB) + dcpctr = r8a66597_read(r8a66597, DCPCTR); + if ((dcpctr & PID) == PID_BUF) { + timeout2 = 10000; + while (!(dcpctr & BSTS)) { + dcpctr = r8a66597_read(r8a66597, DCPCTR); + if (timeout2-- < 0) { + printf("DCPCTR clear timeout!\n"); + break; + } + } + } +#endif + for (i = 0; i < 4; i++) { r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr); setup_addr += 2; diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index 67dc3c4588..baa16605d8 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h @@ -87,8 +87,10 @@ #define DEVADD8 0xE0 #define DEVADD9 0xE2 #define DEVADDA 0xE4 +#define SUSPMODE0 0x102 /* RZ/A only */ /* System Configuration Control Register */ +#if !defined(CONFIG_RZA_USB) #define XTAL 0xC000 /* b15-14: Crystal selection */ #define XTAL48 0x8000 /* 48MHz */ #define XTAL24 0x4000 /* 24MHz */ @@ -98,10 +100,17 @@ #define SCKE 0x0400 /* b10: USB clock enable */ #define PCSDIS 0x0200 /* b9: not CS wakeup */ #define LPSME 0x0100 /* b8: Low power sleep mode */ +#endif #define HSE 0x0080 /* b7: Hi-speed enable */ #define DCFM 0x0040 /* b6: Controller function select */ #define DRPD 0x0020 /* b5: D+/- pull down control */ #define DPRPU 0x0010 /* b4: D+ pull up control */ +#if defined(CONFIG_RZA_USB) +#define XTAL 0x0004 /* b2: Crystal selection */ +#define XTAL12 0x0004 /* 12MHz */ +#define XTAL48 0x0000 /* 48MHz */ +#define UPLLE 0x0002 /* b1: internal PLL control */ +#endif #define USBE 0x0001 /* b0: USB module operation enable */ /* System Configuration Status Register */ @@ -173,10 +182,15 @@ #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) #define MBW 0x0800 #else +#if !defined(CONFIG_RZA_USB) #define MBW 0x0400 /* b10: Maximum bit width for FIFO access */ +#else +#define MBW 0x0800 /* b10: Maximum bit width for FIFO access */ +#endif #endif #define MBW_8 0x0000 /* 8bit */ #define MBW_16 0x0400 /* 16bit */ +#define MBW_32 0x0800 /* 32bit */ #define BIGEND 0x0100 /* b8: Big endian mode */ #define BYTE_LITTLE 0x0000 /* little dendian */ #define BYTE_BIG 0x0100 /* big endifan */ @@ -379,6 +393,9 @@ #define USBSPD 0x00C0 #define RTPORT 0x0001 +/* Suspend Mode Register */ +#define SUSPM 0x4000 /* b14: Suspend */ + #define R8A66597_MAX_NUM_PIPE 10 #define R8A66597_BUF_BSIZE 8 #define R8A66597_MAX_DEVICE 10 @@ -419,7 +436,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, int len) { int i; -#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) +#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB) unsigned long fifoaddr = r8a66597->reg + offset; unsigned long count; unsigned long *p = buf; @@ -453,7 +470,7 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, { int i; unsigned long fifoaddr = r8a66597->reg + offset; -#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) +#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB) unsigned long count; unsigned char *pb; unsigned long *p = buf; diff --git a/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h b/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h new file mode 100644 index 0000000000..f0f48a3354 --- /dev/null +++ b/drivers/usb/host/xhci-rcar-r8a779x_usb3_v3.h @@ -0,0 +1,643 @@ +/* + * Renesas RCar xHCI controller firmware version 3 + * + * Copyright (c) 2014, Renesas Electronics Corporation + * All rights reserved. + * + * Redistribution and use in binary form, without modification, are permitted + * provided that the following conditions are met: + * + * 1. Redistribution in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 2. The name of Renesas Electronics Corporation may not be used to endorse or + * promote products derived from this software without specific prior written + * permission. + * 3. Reverse engineering, decompilation, or disassembly of this software is + * not permitted. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS ELECTRONICS CORPORATION DISCLAIMS + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, AND + * NONINFRINGEMENT OF THIRD PARTY RIGHTS. IN NO EVENT SHALL RENESAS ELECTRONICS + * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * This file is generated from the firmware blob r8a779x_usb3_v3.dlmem + * with associated license file LICENCE.r8a779x_usb3, both taken from + * linux-firmware.git [1] as of: + * + * commit 7c3dfc0bb21bf717dc19a6b677a866aef8b70c35 + * Author: Yoshihiro Shimoda + * Date: Wed Aug 10 19:56:39 2016 +0900 + * + * usb: host: xhci-rcar: update firmware for R-Car H3 and M3-W + * + * To generate the content of the array below, use ie. the following command: + * $ hexdump -v -e '/4 "0x%08x, "' r8a779x_usb3_v3.dlmem | \ + * sed "s@\(.\{47\}\) @\1\n@g" + * + * [1] git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git + */ + +#ifndef __FIRMWARE_R8A779X_USB3_V3__ +#define __FIRMWARE_R8A779X_USB3_V3__ + +static const u32 firmware_r8a779x_usb3_v3[] = { + 0xf4c455aa, 0x00d20014, 0x00000000, 0x23dc00e8, + 0x00000000, 0x1a5c2007, 0x0001ff63, 0x001eff80, + 0x0001ff23, 0x007f1a44, 0xff631a5c, 0xff800001, + 0xff2301e2, 0x1a440001, 0x0780007f, 0x06250061, + 0x00021e74, 0x40002e05, 0x40002e05, 0x8000f625, + 0xdc90062a, 0x556f0000, 0xdd14062a, 0x17040000, + 0x5573d612, 0x15ea062a, 0x57650000, 0x16c285d5, + 0x060200f0, 0x1deaffe0, 0xe4251724, 0x05d9128d, + 0x10001620, 0xe4251764, 0xd6151724, 0x1db1129f, + 0x8625ef25, 0x0088063f, 0x32010002, 0x3200007d, + 0x0392ffbe, 0x05e251e0, 0xffbe3200, 0x51e003e4, + 0x520005ba, 0xef2515f5, 0x063f8625, 0x000200ae, + 0x007d3200, 0xd6151724, 0x05b9129d, 0x0d8cffbe, + 0xd61417c4, 0xd6179e24, 0x000037d3, 0x4ad0ffbe, + 0x06405201, 0x26e6007f, 0x0f9a0631, 0x063f0000, + 0x00000e64, 0x0782007f, 0x8f250061, 0xee248019, + 0x30030000, 0x00f4063f, 0x00710002, 0x80158725, + 0x00d00626, 0x3a010002, 0x0108063f, 0x00700002, + 0x0505f01d, 0x7e3d0501, 0x7d030008, 0x80001640, + 0x150d1511, 0xf6241509, 0x0509fd00, 0x1503121f, + 0x801d7725, 0x00013723, 0x1764121e, 0x063f5c11, + 0x0002013e, 0x0642006e, 0x0780007f, 0xe8060061, + 0x0d0cffbe, 0x0001577d, 0x007f0640, 0x0d0a07be, + 0x17201624, 0x9c00062a, 0x118a03ff, 0x17210764, + 0xffec0602, 0xf6240d89, 0x35011720, 0x12820503, + 0x1505125d, 0x1724007f, 0x11461721, 0xf6241db2, + 0x55021720, 0x12c2100a, 0x3f6211c4, 0x160a172d, + 0x15030001, 0x17295724, 0x05bb51e2, 0x17250764, + 0x17251724, 0xeeee062a, 0x12c2eeee, 0x576211c4, + 0x007f172d, 0x00610780, 0xe8060086, 0x17e0ffbe, + 0x5c591724, 0x1281580a, 0xe9e00db1, 0x17240d92, + 0x129dd605, 0x172405d9, 0x129dd605, 0x500bfdd1, + 0x007f0640, 0x3bd60631, 0x063f0000, 0x00000e64, + 0x0780007f, 0x06250061, 0x00021e74, 0x40002e05, + 0x40002e05, 0x0dd00744, 0x17441201, 0xef840dd1, + 0xea610dd1, 0x0dc205e1, 0x0dd1ea63, 0x15b50df2, + 0x0046ff80, 0x1de251e0, 0x14b6ff80, 0xff800df5, + 0x0dc50116, 0x023aff80, 0xff8005b5, 0xff800360, + 0x05c514be, 0xffbe3201, 0x3f841702, 0x39fd0dd1, + 0x0622ddf2, 0xaaaa1100, 0x32013902, 0x16d8ffbe, + 0x0640d5f5, 0x0780007f, 0xffbe0061, 0x51e00398, + 0x320105ca, 0x00eeffbe, 0x1c3affbe, 0x0386ffbe, + 0x05ca51e0, 0xffbe3201, 0xff8000dc, 0xff800438, + 0x321f04a2, 0xfebcffbf, 0x036affbe, 0x05ca51e0, + 0xffbe3201, 0x172400c0, 0x1282d60d, 0xffbe15e9, + 0xf62442ce, 0x1500d600, 0xf1ff5620, 0x1501114a, + 0xd6051724, 0x05d9128d, 0xd6019e24, 0x000087d3, + 0xd6b91724, 0x08f01764, 0x032affbe, 0x05ca51e0, + 0xffbe3201, 0xef250080, 0x063f8625, 0x000202fc, + 0x007d3201, 0x030effbe, 0x05ca51e0, 0xffbe3201, + 0xff800064, 0x062604d6, 0x000224ac, 0x1de8ffbe, + 0x15f251e0, 0x02eeffbe, 0x05ca51e0, 0xffbe3201, + 0xef250044, 0x063f8625, 0x00020338, 0x007d3200, + 0x016087e0, 0xffbe3201, 0x52011578, 0x0dd05744, + 0x007f0640, 0x30e10780, 0xd6051724, 0x128dd200, + 0x172415a9, 0x1282d60d, 0x172405d1, 0x1285d605, + 0x9e240da1, 0x17d3d600, 0xffbe0000, 0xff80440a, + 0x6dd500e2, 0x481affbe, 0xd7e91724, 0x15d11284, + 0xd60d1724, 0x15911282, 0x1e26ffbe, 0xd6011724, + 0x05b91298, 0xd602bfc4, 0xd6051724, 0x05d9129b, + 0x04001640, 0xd6051764, 0xd7e91724, 0x05a91284, + 0x1724d201, 0x128dd605, 0x17240d91, 0x1282d60d, + 0xd1e005d9, 0xffbe05ba, 0xef251eda, 0x063f82b1, + 0x000203de, 0x1724007d, 0x1282d60d, 0xd1e035a9, + 0x172435ea, 0x1281d6b9, 0x178425f9, 0x11e008f3, + 0xea0125ba, 0x80001625, 0x00c4de02, 0x301d15d5, + 0xffbe0086, 0x51e0d8a6, 0x372a0de2, 0xe73b0001, + 0x063f0001, 0x00020422, 0x51e0007c, 0x87c405ca, + 0x0da5d6b8, 0x1724ea41, 0x52025c59, 0x05a91281, + 0xe9ea5201, 0x1201e5d7, 0x08f91744, 0xd60c8fc4, + 0x05dad1e0, 0x205affbe, 0x03caff80, 0x30ff0640, + 0x00610780, 0x8625ef25, 0x046a063f, 0x32010002, + 0xffbe007d, 0xffbe1572, 0x064015de, 0x0780007f, + 0x17a40061, 0x12610dd1, 0x178415ba, 0x11e0e459, + 0xffbe0df2, 0xef2542f2, 0x063f806d, 0x0002049a, + 0x9e24007d, 0x1fd3d60f, 0x07440000, 0x17240dd1, + 0x1285d605, 0x27c405e9, 0xff80d6b2, 0x45d50092, + 0x82b9ef25, 0x04c4063f, 0x007d0002, 0x05c251e0, + 0x181effbe, 0x17243da5, 0x1282e421, 0x32000dd9, + 0x13deffbe, 0x82c1ef25, 0x04e8063f, 0x007d0002, + 0x0dd00744, 0x17242da5, 0x1288e421, 0xffbe05b9, + 0x17242250, 0x1289e425, 0xffbe05b9, 0x1724224c, + 0x128ae425, 0xffbe05b9, 0xffbe24d6, 0x51e000f8, + 0x320105ca, 0xfe4effbd, 0xe4211724, 0x0dd91281, + 0x0dd117a4, 0x05da1261, 0xd60f9e24, 0x00001fd3, + 0xd60c9fc4, 0x0026ff80, 0x007f0640, 0x00610780, + 0x8625ef25, 0x0556063f, 0x32000002, 0xffbe007d, + 0xffbe1562, 0x0640166e, 0x0782007f, 0xef250061, + 0x063f8019, 0x00020574, 0x007d3003, 0x8625ef25, + 0x0582063f, 0x32000002, 0xffbe007d, 0xffbe168c, + 0x372316b4, 0xef250001, 0x063f801d, 0x0002059a, + 0xffbe007d, 0x06421724, 0x0780007f, 0x172400e1, + 0x1281e421, 0x17240d81, 0x1284e439, 0xff8005c1, + 0x45c50090, 0x82b9ef25, 0x05c8063f, 0x007d0002, + 0x05c251e0, 0x188affbe, 0xef253d95, 0x063f82d5, + 0x000205e0, 0x007d3200, 0x8311ef25, 0x05ec063f, + 0x007d0002, 0x08f717a4, 0x05ba11e0, 0x0450ff80, + 0x02bcff80, 0x08f71784, 0x25821262, 0x08f717a4, + 0x1dca11e0, 0x456cffbe, 0xffbee00a, 0xef25313e, + 0x063f82e1, 0x00020622, 0xef25007d, 0x063f82f1, + 0x0002062e, 0xffbe007d, 0xe1e0327a, 0xffbe05f2, + 0x51e04542, 0xffbe05ba, 0x06402cf4, 0x078200ff, + 0xef250061, 0x063f8019, 0x00020658, 0x007d3003, + 0x8625ef25, 0x0666063f, 0x32010002, 0x1724007d, + 0x1281ea01, 0x07c405b1, 0xffbeea00, 0xf62416da, + 0x1558d600, 0x00105640, 0x1559110a, 0x171affbe, + 0x00013723, 0x801def25, 0x0698063f, 0x007d0002, + 0x85adef25, 0x06a4063f, 0x007d0002, 0x8019ef25, + 0x06b2063f, 0x30030002, 0xffbe007d, 0x3723174e, + 0xef250001, 0x063f801d, 0x000206c6, 0x0642007d, + 0x0780007f, 0x121f0061, 0x5c00f624, 0x15091507, + 0x150d150b, 0xfd00f624, 0x15031505, 0xe900f624, + 0x15071505, 0xd600f624, 0x15061505, 0x0d911282, + 0x1764121f, 0x0000d605, 0x00000000, 0x00000000, + 0x8001ef25, 0x0714063f, 0x007d0002, 0x8015ef25, + 0x01ec0626, 0x3a020002, 0x0728063f, 0x007d0002, + 0x8021ef25, 0x0734063f, 0x007d0002, 0x007f0640, + 0x00210780, 0xfbccffbd, 0x07d01620, 0x0fb8f624, + 0x56801480, 0x5481ffff, 0x14835482, 0x001c1620, + 0x0818f624, 0x520413b0, 0x120353b1, 0x13b313b2, + 0x5bb45a01, 0x5c8153b5, 0x00c85620, 0x5e205482, + 0x5c830190, 0x00645e20, 0x54855c84, 0x04870486, + 0x00fa5620, 0x5e205488, 0x5c89012c, 0x5e20548a, + 0x5c8b0014, 0x03c05620, 0x5205548c, 0x539b539a, + 0x639c6206, 0x6b9d6a09, 0x539f5b9e, 0x63a153a0, + 0x5ba25a0a, 0x00105e20, 0x5a025ba3, 0x5ba55ba4, + 0x13a713a6, 0x5ba913a8, 0x13ab5baa, 0x13ad13ac, + 0x5baf53ae, 0x003f0640, 0x00610780, 0xe000f624, + 0x96201544, 0x9e24f0ff, 0x1152fb75, 0x03001682, + 0xafd31545, 0xffbe0000, 0x27c41806, 0xef25d6b2, + 0x063f834d, 0x00020812, 0xffbe007d, 0x064018a0, + 0x0782007f, 0xef250061, 0x063f8019, 0x0002082c, + 0x007d3003, 0x08f317a4, 0x1d8a1261, 0xd6051724, + 0x15c9129c, 0x08001640, 0xd6051764, 0x00001200, + 0x00000000, 0x00000000, 0x12671241, 0x1724fd96, + 0x129cd605, 0x074405b1, 0xffbe08f3, 0x51e02500, + 0xffbe1dc2, 0x37232554, 0xef250001, 0x063f801d, + 0x0002087e, 0x1724007d, 0x5640d605, 0x114a0300, + 0xffbe15c2, 0x17241a1e, 0x1282fd05, 0x17240de1, + 0x1285d605, 0x0d95fd91, 0x00013723, 0x801def25, + 0x08b0063f, 0x007d0002, 0x007f0642, 0x00610782, + 0x8019ef25, 0x08c6063f, 0x30030002, 0xffbe007d, + 0x51e02650, 0xffbe05da, 0xffbe26d6, 0x37232710, + 0xef250001, 0x063f801d, 0x000208e6, 0x0642007d, + 0x0780007f, 0xffbe0021, 0x51e02906, 0xffbe05b2, + 0x06402acc, 0x0780003f, 0xef250061, 0x063f8631, + 0x0002090e, 0x51e0007d, 0xffbe05ba, 0x0640325c, + 0x0780007f, 0xd20070e1, 0x17441201, 0x16250855, + 0xce028000, 0xde020330, 0x17240334, 0xe802eab5, + 0xea9aeaca, 0x003f16c2, 0x35c2e9e2, 0x001f16dd, + 0x000c36e2, 0x170631c4, 0x362694b4, 0x12d894b0, + 0x1261129c, 0x05d21df1, 0x0da11263, 0x1da515c2, + 0x0001e739, 0x0974063f, 0x007c0002, 0xe73b15d5, + 0x063f0001, 0x00020982, 0x06aa007c, 0x0dc2ffff, + 0x0da5d201, 0x0009e73b, 0x0998063f, 0x007c0002, + 0xff8005b5, 0xea41003e, 0x003f56dd, 0xeab65744, + 0x1640c5d5, 0xf6240001, 0x1503ea00, 0xe802155a, + 0xea9aeaca, 0x003f16c2, 0xbd8ae9e2, 0x05fad261, + 0x8339ef25, 0x09d4063f, 0x007d0002, 0x70ff0640, + 0x00610780, 0x5864f006, 0x5ad81303, 0x12d85a9c, + 0x0dba1299, 0x80011724, 0x30005640, 0x25d2114a, + 0x80011724, 0x129a12ca, 0x52c25002, 0x572a51c4, + 0x66408001, 0x514c8000, 0x060b1d82, 0x15d1fff0, + 0x57eb5201, 0x5f2400c0, 0x514be435, 0x38020de2, + 0x000c16e2, 0x854def25, 0x47e211c4, 0x32440fc9, + 0x0a40063f, 0x007d0002, 0x007f0640, 0x00e10780, + 0x2200063c, 0xf624aaaa, 0xe86000a4, 0xea610384, + 0x0d8205e1, 0x0d91ea63, 0x0dd50db2, 0x4292ffbe, + 0xff800dd5, 0x0da50034, 0x0076ff80, 0xffbe05f5, + 0x05c542de, 0xffbe3202, 0x3f840ed2, 0x39fd00a5, + 0x391c05d2, 0xffbe3202, 0x17840eae, 0x11e000a9, + 0x0640ddba, 0x078000ff, 0xefa40061, 0xea6100a5, + 0x159205e1, 0x05e1ea63, 0x0da50d82, 0x430effbe, + 0xffbe0da5, 0x05f543bc, 0x4406ffbe, 0x320305c5, + 0x0e88ffbe, 0x00a53fa4, 0x0d8239fd, 0x33000622, + 0x3902aaaa, 0xffbe3204, 0x06400e5e, 0x0780007f, + 0xef8400e1, 0xe7a400a7, 0x101d00a7, 0xffed0602, + 0x00424de1, 0x00160013, 0x001c0019, 0x0022001f, + 0x00280025, 0x002e002b, 0x00340031, 0x003a0037, + 0x0040003d, 0x00490043, 0xffbe0046, 0x3da543ea, + 0x4488ffbe, 0xffbe35f5, 0x35c5448a, 0x0098ff80, + 0xff803595, 0x2de500d4, 0x0114ff80, 0xff802db5, + 0x2d8501a8, 0x01e0ff80, 0xff8025d5, 0x25a502fe, + 0x05b0ff80, 0xff801df5, 0x1dc505d4, 0x694effbe, + 0xffbe1d95, 0x15e56a22, 0x0604ff80, 0xff8015b5, + 0x1585061e, 0x6c9effbe, 0xffbe0dd5, 0x0da56cea, + 0x6d96ffbe, 0xffbe05f5, 0x05c56e5e, 0xffbe3204, + 0x3f840dba, 0x39fd00a7, 0x06220d82, 0xaaaa4400, + 0x32083902, 0x0d90ffbe, 0x00a73fa4, 0x0d9239fc, + 0x55000622, 0x3902aaaa, 0x00103620, 0x0d78ffbe, + 0x00ff0640, 0x00a717a4, 0x1dab1269, 0x000a0042, + 0x001b000c, 0x0010000e, 0x0012001b, 0x001b0014, + 0x07be0016, 0x07be4470, 0x07be4522, 0x07be458e, + 0x07be45ae, 0x07be461a, 0x07be463a, 0x32054696, + 0x0d4807be, 0x17a4007f, 0x126900a7, 0x00421dcb, + 0x001d000a, 0x0010000c, 0x0016000e, 0x00140012, + 0x0018001d, 0x46fc07be, 0x47d607be, 0x494407be, + 0x487207be, 0x4a3607be, 0x4a8a07be, 0x497a07be, + 0x4b7407be, 0x07be3206, 0x007f0d02, 0x00a717a4, + 0xffe70602, 0x004245d1, 0x00460019, 0x001d001b, + 0x0021001f, 0x00250023, 0x00290027, 0x002d002b, + 0x0031002f, 0x00350033, 0x00370046, 0x003b0039, + 0x0046003d, 0x0046003f, 0x07be0041, 0x07be4b80, + 0x07be4c5e, 0x07be4d0c, 0x07be4d72, 0x07be4dd2, + 0x07be4e8c, 0x07be4f12, 0x07be504c, 0x07be50f6, + 0x07be512c, 0x07be51c6, 0x07be5212, 0x07be5320, + 0x07be5462, 0x07be54d0, 0x07be55fa, 0x07be562e, + 0x07be5698, 0x07be56d0, 0x07be582c, 0x3207599c, + 0x0c6807be, 0x17a4007f, 0x126900a7, 0x00421d8b, + 0x0019000a, 0x000e000c, 0x00100019, 0x00120019, + 0x00140019, 0x5a3e07be, 0x5abc07be, 0x5b5407be, + 0x5bba07be, 0x5c2207be, 0x5d3c07be, 0x07be3208, + 0x007f0c2a, 0x00a717a4, 0x0d811261, 0x12631582, + 0x0dd205f1, 0x05e21264, 0x07be05f5, 0x07805d24, + 0x07be0010, 0x32095f2c, 0x0c0007be, 0x0786007f, + 0x378470e1, 0x16240811, 0xe8068284, 0xe9c2eac5, + 0xe4391724, 0xd200e200, 0x07a4de24, 0x05e91283, + 0x07b337a4, 0x6cb6ffbe, 0xffbe65e5, 0x171da9f6, + 0x12d90001, 0x1264129d, 0xf7dd0d9a, 0x05e20006, + 0x0007e79d, 0xe2d8d201, 0x17bbe29f, 0x3784000d, + 0xcf250811, 0x063f83cd, 0x00020dbc, 0x129f12de, + 0x00793802, 0xf6241201, 0x139c00ac, 0xd1e0039d, + 0xe1e02582, 0x171d0dda, 0xf6240015, 0x12ddeb54, + 0x12c3129e, 0x121ff1c2, 0x15031501, 0x120115a5, + 0x00acf624, 0x571d139c, 0x56ca000b, 0x5241001f, + 0x00c017ea, 0x139d125f, 0x07b4f624, 0x05030501, + 0x0e5497c4, 0x0e540fc4, 0x000d3f3b, 0x0e5407c4, + 0x17441203, 0x300700a7, 0x3acb3298, 0x3ac63a9b, + 0x08e0ffbe, 0x00ac3624, 0x00401620, 0x1501f003, + 0x17250503, 0x3e24839d, 0x400a0e54, 0x1505480b, + 0x05ccffbe, 0x70ff0646, 0x00210780, 0x00a717a4, + 0x0d911261, 0x126415f2, 0x15f22591, 0x1d811266, + 0x1d950de2, 0x003aff80, 0xfd191724, 0x129512c5, + 0x16c21242, 0x17440003, 0x15851714, 0x0132ff80, + 0xffbe0dd5, 0x0da55f18, 0x01a6ff80, 0xffbe05f5, + 0x05c560f8, 0xffbe320a, 0x06400ab2, 0x0780003f, + 0x5f2400e1, 0xee2407b1, 0x662407a4, 0x100b8000, + 0x50021298, 0x51cc52c2, 0x0da211e0, 0xffdf0602, + 0x172a05f1, 0x56400001, 0x51428000, 0x320b05ba, + 0x56405dc5, 0x51423000, 0x36c255e2, 0x100b00ff, + 0xe72512cb, 0x129b841d, 0x063f3802, 0x00020efa, + 0x5744007c, 0x008a0810, 0x060d680a, 0x05baff01, + 0x45b53205, 0x100d6ac5, 0x172211c4, 0x16c28299, + 0x12610007, 0x12633df2, 0x100a35ea, 0x66c21285, + 0x16ca0003, 0x5a01001f, 0x00c05fe2, 0x17196764, + 0x100c62c2, 0x172211c4, 0x5f64ea49, 0x114b171d, + 0x17241dea, 0x12c5fd19, 0x12421295, 0x000376c2, + 0xfd191724, 0x129512c5, 0x000316c2, 0xfd9a11ee, + 0x172d69c4, 0x16c28299, 0x12610007, 0x126315b2, + 0x61c40daa, 0xea49172c, 0x05d25942, 0x17441206, + 0x15c500a7, 0x00133620, 0x000f3fbd, 0x6b0effbe, + 0xef250dd5, 0x063f8625, 0x00020fa8, 0x007d3201, + 0xf6241201, 0x138400a4, 0x06401383, 0x172400ff, + 0x5e24e421, 0x128107a4, 0x172405d9, 0x1283e439, + 0x37ab05d9, 0x07be000f, 0x17846a64, 0x12c50811, + 0x172211c4, 0x16c28299, 0x12630007, 0xf62405f2, + 0x038300a4, 0x13841201, 0x172425a5, 0x57241719, + 0x12c2171d, 0x172211c4, 0x5142ea49, 0xfd191724, + 0x129512c5, 0x05f251e0, 0x16c21242, 0x17440003, + 0x0dd51714, 0x17155784, 0x000316c2, 0x05fa11ea, + 0x000f3fab, 0x00133620, 0x6a7207be, 0x0788007f, + 0x67240021, 0x62d2eab1, 0x160c629a, 0x1261ffff, + 0x126315b3, 0x12691592, 0x126b0df2, 0x126d0dd2, + 0x06020db2, 0x0d82ffef, 0xffed1602, 0x05c31261, + 0x12611259, 0x57844d9b, 0x5e240811, 0x100a8284, + 0x11cb12c5, 0x05b26261, 0x0dba6262, 0x51c452c2, + 0x8085572a, 0x05d9528e, 0x07635200, 0x05f50001, + 0xeb6d5724, 0x00015763, 0xeb715724, 0x5503f003, + 0x1b005640, 0x05075505, 0x56ca530d, 0x568a0003, + 0x538d0080, 0x57225b0e, 0x5ecb0001, 0x6eca00e0, + 0x590d001f, 0x52d45b8e, 0x538f5299, 0xffff560c, + 0x05e35261, 0x05c25269, 0xffef060a, 0x3f8205ea, + 0x3ec7000d, 0x05d5000f, 0xeab13f24, 0x3a9c3acc, + 0xffbe3003, 0x12050436, 0x00a71744, 0x003f0648, + 0x00a717a4, 0x0d811261, 0x12631582, 0x0dd205f1, + 0x05e21264, 0x07be05f5, 0x07be5eac, 0x07be5fc4, + 0x320b6022, 0x082407be, 0x17a4007f, 0x126900a7, + 0x00421dab, 0x000c000a, 0x000e001b, 0x001b0010, + 0x00140012, 0x0016001b, 0x603607be, 0x613a07be, + 0x61a607be, 0x61c607be, 0x623207be, 0x625207be, + 0x62d007be, 0x07be320c, 0x007f07e2, 0x00a717a4, + 0x05d11261, 0x12620db2, 0x05d505c2, 0x643807be, + 0x655407be, 0x07be320d, 0x007f07c2, 0x00a717a4, + 0x05d11261, 0x126205e2, 0x05f505e2, 0x654007be, + 0x65fe07be, 0x666607be, 0x07be320e, 0x0780079e, + 0x008610e1, 0xeac5e806, 0x077de9c4, 0x077d8289, + 0x077d828d, 0x077d8291, 0x077d8295, 0x077d8299, + 0x077d829d, 0xe00682a1, 0xd8070087, 0x6b06ffbe, + 0x8285171d, 0x301c381b, 0x129d12d9, 0x05ca1264, + 0x6c54ffbe, 0xffbe05b5, 0x06406c86, 0x078010ff, + 0xd80770e1, 0xd008009b, 0xc809009a, 0x009ce006, + 0xeac5e81c, 0x82841624, 0x301de9c2, 0x46203a00, + 0xffbe0020, 0x301c062a, 0x401a381b, 0xffbe4819, + 0x301c6cba, 0x0001171d, 0x401a381b, 0x12d94819, + 0x1264129d, 0xffbe158a, 0xf7dd6e9e, 0x48190006, + 0x381b401a, 0x05ca301c, 0x6f1affbe, 0xffbe05e5, + 0x05b56f4e, 0x6f54ffbe, 0x70ff0640, 0x10e10780, + 0xe8060086, 0xe9c4eac5, 0x0087e006, 0xffbed807, + 0x171d7016, 0xee3d8285, 0x301c8284, 0x12d9381b, + 0x1264129d, 0xffbe0dea, 0xf7dd7012, 0x381b0006, + 0x05ca301c, 0x7064ffbe, 0xffbe05e5, 0x05b570c6, + 0x70f8ffbe, 0x10ff0640, 0x00610780, 0xe8060086, + 0x1624eac4, 0xe9c205a4, 0x00051728, 0x008b5807, + 0x30025002, 0x529852d0, 0x00013e0a, 0x32900087, + 0x2da25a61, 0x1dc25a63, 0x35aa5a64, 0x129d12da, + 0x05e21261, 0x0d821263, 0x0da21265, 0x30080dd5, + 0x8512ffbe, 0x300825f5, 0x85f4ffbe, 0x300825b5, + 0x86d6ffbe, 0x30081df5, 0x879cffbe, 0x12da1db5, + 0x1261129d, 0x126505b2, 0xffbe05ca, 0x15a58858, + 0x8862ffbe, 0x12da0df5, 0x1261129d, 0x126505b2, + 0xffbe05ca, 0x05e58860, 0x8886ffbe, 0xffbe05b5, + 0x577d88ac, 0x06400001, 0x0780007f, 0x00860061, + 0xeac4e806, 0x05a41624, 0xefc7e9c2, 0x30070004, + 0xffbe05ca, 0x05b588c4, 0x8976ffbe, 0x0005577d, + 0x007f0640, 0xffe1078a, 0x00bc3620, 0x8cbcffbe, + 0xffbea00a, 0x57638cbe, 0xffbe0002, 0x57638cb6, + 0xffbe0004, 0x57638cb4, 0x36200006, 0xffbe00bc, + 0x57638cae, 0x36200008, 0xffbe00bc, 0x57638caa, + 0xffbe000a, 0x57638cdc, 0xffbe000c, 0x57638cd4, + 0xffbe000e, 0x57638cd2, 0x36200010, 0xffbe00bc, + 0x57638ccc, 0xaa000012, 0xb200ba00, 0xe815ca00, + 0x1624eac3, 0xe9c204a4, 0xd860f01d, 0xe063c067, + 0x0220dff4, 0xffbe3018, 0xf01d8c42, 0xe7ea1061, + 0x57e30220, 0x5fe30003, 0x17ea0005, 0x50650220, + 0x57ebe1db, 0x11dc0220, 0x5fe351c2, 0x10640007, + 0x022017eb, 0x11cad862, 0x000957e3, 0xdfeae066, + 0x30180220, 0xffbed9c2, 0xe7ea8c16, 0xf01d0220, + 0xd060e1db, 0x000b17e3, 0xd8633018, 0x0220d7e2, + 0x8c04ffbe, 0x1061f01d, 0x0220dfea, 0x000d57e3, + 0x000f5fe3, 0x022017ea, 0xd9da5065, 0x022057eb, + 0x51c211db, 0x00115fe3, 0x17eb1064, 0xd0620220, + 0x57e311ca, 0xd8660013, 0x0220d7ea, 0xd1c23018, + 0x8c0affbe, 0x0220dfea, 0xb9fcd9da, 0xb81c05a9, + 0x05a9b1fb, 0xee1db01b, 0xca410040, 0xca640099, + 0x10159dc1, 0x500212c2, 0xbf6a51c4, 0x11c403bd, + 0x03ddb762, 0x0095aa41, 0x85f1aa68, 0xffff064a, + 0x00210780, 0x00041706, 0x12da0087, 0x16c2129d, + 0x3a610003, 0x2dc255b1, 0x3dd13a63, 0x3a6415e2, + 0x12614dda, 0x0de205e1, 0x05e11263, 0x45e50d82, + 0xa402ffbe, 0xffbe45c5, 0x4595a464, 0xa546ffbe, + 0xffbe3de5, 0x3db5a602, 0x05e11261, 0x12630de2, + 0x0d8205e1, 0xffbe35b5, 0x3595a3b8, 0xa41affbe, + 0xffbe2de5, 0x2db5a4d2, 0xa58effbe, 0x12612d85, + 0x0de205e1, 0x05e11263, 0x25850d82, 0xa35cffbe, + 0xffbe1de5, 0x1db5a3d0, 0xa47cffbe, 0xffbe1d85, + 0x15d5a538, 0x05e11261, 0x12630de2, 0x0d8205e1, + 0xffbe0dd5, 0x0db5a31c, 0xa3a6ffbe, 0xffbe0d85, + 0x05d5a428, 0xa50effbe, 0x520105a5, 0x003f0640, + 0x00210780, 0x0fc11784, 0x05f211e0, 0x0fb8f624, + 0x03883069, 0xabf4ffbe, 0xfd111724, 0x05b11284, + 0xfd081fc4, 0x003f0640, 0xf0e10780, 0x8625ef25, + 0x3201d200, 0x15e4063f, 0x007d0002, 0x5c591724, + 0x1281c00a, 0x0000e7e9, 0x80001625, 0x00c0ce02, + 0x301c1db5, 0xffbe0086, 0xe80ac6b2, 0x15b2e9e0, + 0xff80301d, 0x373d00a0, 0xdf390001, 0x063f0001, + 0x0002161e, 0x5261007b, 0xcfdd05c2, 0x05b20003, + 0x0d95d201, 0x1724e241, 0x12815c59, 0x000017e9, + 0xe587e1e2, 0x8625ef25, 0x164a063f, 0x30180002, + 0x501a007d, 0xf0ff0640, 0x10e10780, 0x5c591724, + 0x1281ea02, 0xea0105a9, 0x80001625, 0x00c0de02, + 0x301d15e5, 0xffbe0086, 0xe00ac642, 0x0de2e1e0, + 0xff80301c, 0x373c0030, 0xe73b0001, 0x063f0001, + 0x0002168e, 0x5261007c, 0xea410db2, 0x5c591724, + 0x12815202, 0x520105a9, 0xe5c7e9ea, 0x06405200, + 0x1a5c10ff, 0x00011726, 0x0001062a, 0x17630012, + 0x12cb0001, 0x114a128b, 0x00125640, 0x0dea11ea, + 0x17461202, 0x00000002, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x1a440000, 0xf624007f, + 0x03800d24, 0x00dc1620, 0x12021381, 0x03831382, + 0x0d290764, 0x12011388, 0x007f1389, 0x00e10780, + 0x09e1ef84, 0x09e1e7a4, 0x1267101d, 0x0042259b, + 0x000b0008, 0x0011000e, 0x00170014, 0x001d001a, + 0x006eff80, 0xff8015d5, 0x15a501c2, 0xd03cffbe, + 0xffbe0df5, 0x0dc5d088, 0xd0f8ffbe, 0xff800d95, + 0x05e501f8, 0xd1f6ffbe, 0xffbe05b5, 0x3f84d2f4, + 0x39fd09e1, 0x06220d92, 0xaaaa6600, 0x36203902, + 0xffbe0020, 0x3fa401d2, 0x39fc09e1, 0x06220d92, + 0xaaaa7700, 0x36203902, 0xffbe0040, 0x178401ba, + 0x11e009e1, 0xff8005b2, 0x0640066c, 0x078000ff, + 0x17a40021, 0x126109e1, 0x05f205d1, 0x0d821263, + 0xff800d95, 0x05e5002c, 0x0056ff80, 0xffbe05b5, + 0xffbecdd4, 0x5784d2a8, 0x17a409e1, 0x51e209e3, + 0xf62405d2, 0x13a409bc, 0x064003a5, 0x0780003f, + 0xffbe0061, 0x1724cc88, 0x12815c59, 0xef250df1, + 0x063f8625, 0x000217f4, 0x007d3201, 0x8625ef25, + 0x1802063f, 0x300a0002, 0x0640007d, 0x0788007f, + 0x17240061, 0x12815c59, 0x17246de1, 0x5640c0a1, + 0x114a8000, 0x17240d9a, 0x129cd621, 0x962405d1, + 0x1fd2d623, 0x17240000, 0x5640c0a1, 0x114a8000, + 0x12035da2, 0xc000f624, 0x15501531, 0x55b2114a, + 0x8625ef25, 0x1856063f, 0x32010002, 0x1724007d, + 0x128efb75, 0x178415c9, 0x06025c61, 0xfdc2ffdf, + 0x5c611784, 0xffde0602, 0x172405ea, 0x06c2fb9d, + 0xf5fa000c, 0xfb759624, 0x0000afd2, 0xc0648fc4, + 0xd6239624, 0x00009fd2, 0x0dd11784, 0x05fa1262, + 0x3a013200, 0x4a024200, 0x3224ffbe, 0x17441202, + 0x172409e1, 0x1282c061, 0x074405c9, 0x1db509e1, + 0xc000f624, 0x35583d5a, 0xffbd4210, 0x1624fdf4, + 0xf00308fc, 0x16201501, 0x150300c0, 0x20001620, + 0x17251505, 0x362481ad, 0x400a09bc, 0x1507480b, + 0xfad6ffbd, 0x007f0648, 0x00210780, 0x09e117a4, + 0x05e211e0, 0x05f21264, 0x0d821265, 0xffbe0d95, + 0x05e5ccac, 0xccf2ffbe, 0xffbe05b5, 0xffbecd76, + 0x5784d14c, 0x17a409e1, 0x51e209e3, 0x12640db2, + 0x9e2405da, 0x07d3c049, 0xf6240000, 0x13a409bc, + 0x064003a5, 0x0780003f, 0xffbe0061, 0x1784cf60, + 0x126609e1, 0xef250dda, 0x063f824d, 0x0002195a, + 0xef25007d, 0x063f8251, 0x00021966, 0x0640007d, + 0x0780007f, 0xffbe0021, 0x1784d2a0, 0x12610a15, + 0x05d20de1, 0x05e11263, 0x0d950d82, 0xd30cffbe, + 0xffbe05e5, 0x05b5d3da, 0xd4b4ffbe, 0x003f0640, + 0x00210780, 0x0a0d1724, 0x00ff062b, 0x5200ffff, + 0x1262114b, 0x96400da2, 0x11f20030, 0x96400d92, + 0x11f20031, 0x0d950d82, 0xd518ffbe, 0xffbe05e5, + 0x05b5d5f8, 0xd60effbe, 0x003f0640, 0x00210780, + 0x0a0d1724, 0x5ec25200, 0x060b00ff, 0x15eaff80, + 0x12611298, 0x05f215b1, 0x0d811263, 0x126f0da2, + 0x0dc50db2, 0xd63cffbe, 0xffbe0d95, 0x05e5d64c, + 0xd65cffbe, 0xffbe05b5, 0x0640d662, 0x17a4003f, + 0x12610a0f, 0x05f21581, 0x05f11263, 0x126f0d82, + 0x0d950d82, 0xd65a07be, 0xd68007be, 0xd6a607be, + 0xd6c007be, 0x0780007f, 0x17840021, 0x52000a0d, + 0xff800602, 0x05e20df9, 0xff7e0602, 0x0d8205e9, + 0xffbe0d95, 0x05e5d6f6, 0xd706ffbe, 0xffbe05b5, + 0x0640d720, 0x1784003f, 0x06020a0d, 0x05baff80, + 0xd74607be, 0xff7f0602, 0x07be05ba, 0x07bed768, + 0x0780d76e, 0x17240021, 0x062b0a0d, 0xffff00ff, + 0x114b5200, 0x0da21262, 0x00309640, 0x0d9211f2, + 0x00319640, 0x0d8211f2, 0xffbe0d95, 0x05e5d822, + 0xd8d4ffbe, 0xffbe05b5, 0x0640d8ec, 0x1784003f, + 0x520109e1, 0x05ba1266, 0xd91a07be, 0x1784007f, + 0x520109e1, 0x05ba1266, 0xd98007be, 0x0780007f, + 0xee240061, 0x301dc500, 0xd9d6ffbe, 0x0009361d, + 0xd9e8ffbe, 0x0012361d, 0xffbe3a00, 0x361dda00, + 0x3a000019, 0xda2cffbe, 0x001f361d, 0xffbe3a01, + 0x361dd9ec, 0x3a010026, 0xda18ffbe, 0x007f0640, + 0x00610780, 0xc500ee24, 0xffbe301d, 0x361dda12, + 0xffbe0005, 0x0640da1a, 0x0780007f, 0x170400e1, + 0x16c2097c, 0x12610007, 0x126305b2, 0xffbe05ba, + 0x1724db90, 0x1285c0a1, 0x063c2dd1, 0xaaaa8800, + 0x0b71efa4, 0x0b700744, 0x0d91ea61, 0xea630db2, + 0xea650dc2, 0xea660dd2, 0x0df50de2, 0xdce8ffbe, + 0xffbe0dc5, 0x0d95dd3a, 0xdddcffbe, 0xffbe05e5, + 0x05b5de32, 0x00a6ff80, 0x0b713fa4, 0x05e239fd, + 0x3620391c, 0xffbd0080, 0x1784fd8e, 0x11e00b71, + 0x0640dd8a, 0x078000ff, 0x170400e1, 0x16c2093c, + 0x12610007, 0x126305b2, 0xffbe05ba, 0xffbedbb8, + 0x51e0eba0, 0x17243592, 0x1285c0a1, 0x063c2dd1, + 0xaaaacc00, 0x0c57efa4, 0x0c560744, 0x0d91ea61, + 0xea630db2, 0xea650dc2, 0xea660dd2, 0x0df50de2, + 0xe2dcffbe, 0xffbe0dc5, 0x0d95e32e, 0xe3e8ffbe, + 0xffbe05e5, 0x05b5e47c, 0x00feff80, 0x0c573fa4, + 0x05e239fd, 0x3620391c, 0xffbd0400, 0x1784fd0a, + 0x11e00c57, 0x0640dd8a, 0x078000ff, 0xef840061, + 0x101d0b73, 0x359b126b, 0x000c0042, 0x0012000f, + 0x00180015, 0x001e001b, 0x00240021, 0x002a0027, + 0xffbe002d, 0x2595dd88, 0x005cff80, 0xffbe1de5, + 0x1db5de12, 0xde3effbe, 0xffbe1d85, 0x15d5de94, + 0xde9cffbe, 0xffbe15a5, 0x0df5dea4, 0xdf38ffbe, + 0xffbe0dc5, 0x0d95dfaa, 0xdfe0ffbe, 0xffbe05e5, + 0x05b5dff6, 0xe054ffbe, 0x0b733f84, 0x0d9239fd, + 0x99000622, 0x3902aaaa, 0x01003620, 0xfc78ffbd, + 0x007f0640, 0x00610780, 0x0b73efa4, 0x0d81ea61, + 0xea630da2, 0x0dd20db1, 0x0de2ea65, 0xffbe0df5, + 0x0dc5e036, 0xe05cffbe, 0xffbe0d95, 0x05e5e098, + 0xe0e8ffbe, 0xffbe05b5, 0x3fa4e198, 0x39fd0b73, + 0x06220d92, 0xaaaabb00, 0x36203902, 0xffbd0200, + 0x0640fc26, 0x0780007f, 0xef840061, 0x101d0c59, + 0x359b126b, 0x000c0042, 0x0012000f, 0x00180015, + 0x001e001b, 0x00240021, 0x002a0027, 0xffbe002d, + 0x2595e3c8, 0x005cff80, 0xffbe1de5, 0x1db5e41c, + 0xe47affbe, 0xffbe1d85, 0x15d5e4e0, 0xe508ffbe, + 0xffbe15a5, 0x0df5e530, 0xe544ffbe, 0xffbe0dc5, + 0x0d95e61e, 0xe680ffbe, 0xffbe05e5, 0x05b5e696, + 0xe728ffbe, 0x0c593f84, 0x0d9239fd, 0xdd000622, + 0x3902aaaa, 0x08003620, 0xfb9cffbd, 0x007f0640, + 0x00610780, 0x0c59efa4, 0x0d81ea61, 0xea630dd2, + 0x05f20de1, 0x0de2ea65, 0xffbe0df5, 0x0dc5e70a, + 0xe734ffbe, 0xffbe0d95, 0x05e5e840, 0xe890ffbe, + 0xffbe05b5, 0x3fa4e8c4, 0x39fd0c59, 0x06220d92, + 0xaaaaee00, 0x36203902, 0xffbd1000, 0x0640fb4a, + 0x0780007f, 0x17240061, 0x1286c061, 0x16200d99, + 0x17640020, 0x3202c061, 0xffbe3a00, 0xefa4ef1c, + 0x07440cd5, 0xea610cd9, 0x0db20d91, 0x15c1ea63, + 0xea650db2, 0x0de20dc1, 0xffbe0df5, 0x0dc5eb38, + 0xeb5effbe, 0xffbe0d95, 0x05e5ebe6, 0xec4affbe, + 0xffbe05b5, 0x3fa4ecc8, 0x39fd0cd5, 0x06220d92, + 0xaaaaff00, 0x36203902, 0xffbd2000, 0x17a4fada, + 0x11e00cd9, 0x0640d5da, 0x0000007f, 0x000200de, + 0x0000102c, 0x00001064, 0x0000109e, 0x0000111c, + 0x0000115a, 0x00020142, 0x00020154, 0x000011a6, + 0x000011ee, 0x000012a6, 0x00001250, 0x000012f4, + 0x00001376, 0x0000ccc8, 0x0000ccfc, 0x0000cd72, + 0x0000cda8, 0x0000ce0a, 0x0000cecc, 0x000215d0, + 0x0000cfc4, 0x0000d018, 0x0000d062, 0x00021650, + 0x0000d12e, 0x0000d1a8, 0x0000d204, 0x0000d274, + 0x0000d2d0, 0x0000d334, 0x0000d3fe, 0x0000d462, + 0x0000d4e8, 0x0000d54a, 0x0000d5d0, 0x0000d632, + 0x0000d67a, 0x0000d6e2, 0x0000d73a, 0x0000d7b4, + 0x0000d84c, 0x0000d8c4, 0x0000d916, 0x0000d968, + 0x0000d9e4, 0x0000da36, 0x0000dab2, 0x0000db04, + 0x0000db5a, 0x0000db84, 0x0000dba4, 0x0000dbd8, + 0x0000dc22, 0x0000dc50, 0x0000dc90, 0x0000dcc6, + 0x0000dd14, 0x0000dd62, 0x0000dd86, 0x0000dda2, + 0x0000ddba, 0x0000ddce, 0x0000dde2, 0x0000ddf8, + 0x0000de12, 0x0000de28, 0x0000de3e, 0x0000de84, + 0x0000defe, 0x0000dfb2, 0x0000dfe6, 0x0000e01a, + 0x0000e050, 0x0000e086, 0x0000e0bc, 0x0000e0f2, + 0x0000e150, 0x0000e19c, 0x0000e1d0, 0x0000e212, + 0x0000e304, 0x0000e27a, 0x0000e318, 0x0000e3a4, + 0x0000e42a, 0x0000c608, 0x0000c6d8, 0x0000c74e, + 0x0000c76a, 0x0000c786, 0x0000c7d6, 0x0000c866, + 0x0000c930, 0x0000c960, 0x0000c98e, 0x0000c9c8, + 0x0000c9de, 0x0000c9fc, 0x0000ca28, 0x0000ca6c, + 0x0000ca90, 0x0000caa2, 0x0000cae4, 0x0000cb88, + 0x0000cc30, 0x0000cc52, 0x0000e578, 0x0000ea76, + 0x0000eae6, 0x0000eb6a, 0x0002196a, 0x00021998, + 0x0000eff6, 0x0000f018, 0x000219d4, 0x00021a16, + 0x0000f11e, 0x0000f146, 0x00021a3e, 0x00021a6e, + 0x0000f23e, 0x0000f268, 0x0000f29e, 0x00021a8a, + 0x0000f3c8, 0x0000f3e8, 0x00021ac6, 0x00021ad6, + 0x0000f48a, 0x00021ae6, 0x00021b28, 0x0000f57e, + 0x0000f60c, 0x0000f660, 0x0000f68a, 0x0000f6a2, + 0x0000f6b2, 0x0000f6dc, 0x00021b42, 0x00021bbe, + 0x0000f940, 0x0000f9b6, 0x0000fe5e, 0x0000ffbc, + 0x00010084, 0x000105e0, 0x000106ee, 0x00010722, + 0x00010762, 0x0001078a, 0x000107f8, 0x0001085c, + 0x0001089e, 0x000109e8, 0x00010be0, 0x00010c84, + 0x00010cf4, 0x00010d82, 0x00010da0, 0x00010e0e, + 0x00010e60, 0x00010eb4, 0x00010f18, 0x00010f66, + 0x00010f6e, 0x00010f76, 0x00010fb6, 0x00010fd4, + 0x00001ed6, 0x00002164, 0x000022bc, 0x000023ec, + 0x00002328, 0x00002530, 0x00000000, 0x000025d4, + 0x0000274c, 0x000208ea, 0x000034b4, 0x000035ca, + 0x000036ae, 0x0000372e, 0x0000382e, 0x0000385e, + 0x00003910, 0x00003960, 0x0000398e, 0x000039fc, + 0x00003a68, 0x00003a98, 0x00003ace, 0x00003b0e, + 0x00003b2e, 0x00003b60, 0x00003b6a, 0x000208fe, + 0x00003bb4, 0x00003cba, 0x00003d48, 0x00003dd4, + 0x00003e80, 0x00003f26, 0x0002091a, 0x00004030, + 0x0000408a, 0x00004116, 0x00004144, 0x000041e4, + 0x00004328, 0x00004416, 0x0000450a, 0x00004572, + 0x000045a8, 0x000045fc, 0x00004650, 0x0000468c, + 0x000046de, 0x00004790, 0x0000488c, 0x00004a8c, + 0x000048ac, 0x00004ab0, 0x00000000, 0x00000000, + 0x00000000, 0x00004c18, 0x00004ae0, 0x000022f2, + 0x00004e64, 0x00006e08, 0x00006c0e, 0x00007a08, + 0x00007a48, 0x00007aba, 0x00007ada, 0x00007af8, + 0x00007b82, 0x00007bd2, 0x00007c40, 0x00007cae, + 0x000211b6, 0x00021206, 0x00021274, 0x00008484, + 0x0000851c, 0x0000857a, 0x000085ca, 0x0000865e, + 0x00008758, 0x000087ec, 0x000088a2, 0x00008948, + 0x00008a54, 0x00008ac8, 0x00008b58, 0x00008bdc, + 0x00008bf2, 0x00008c4c, 0x00008cb4, 0x00008d5e, + 0x00008de6, 0x00008e6c, 0x00008f34, 0x00008f5e, + 0x00008ff4, 0x00009046, 0x000090da, 0x0000911c, + 0x00009146, 0x0000918e, 0x000091ae, 0x000091fa, + 0x000092e4, 0x000093a0, 0x000093e2, 0x00009424, + 0x00009458, 0x00009488, 0x000094ca, 0x0000950c, + 0x00009540, 0x00009586, 0x000096ac, 0x000097f6, + 0x000212c0, 0x00009bb2, 0x00009bde, 0x00009c12, + 0x00021362, 0x00009daa, 0x00009e20, 0x00009e7a, + 0x00009eb4, 0x00009f1a, 0x00009f7e, 0x00009fd6, + 0x0000a00a, 0x0002138c, 0x0000a0cc, 0x0000a110, + 0x0000a156, 0x0000a192, 0x0000a1e2, 0x0000a28e, + 0x0000a3ec, 0x0000a4ac, 0x0000a4d6, 0x0000a52a, + 0x0000a62c, 0x0000a662, 0x0000a77c, 0x0000a7be, + 0x0000a7e4, 0x0000a820, 0x0000a87a, 0x0000a914, + 0x0000a972, 0x0000aa32, 0x0000aaa2, 0x0000abf8, + 0x0000ad28, 0x0000ad48, 0x0000adb0, 0x0000ae52, + 0x0000ae8c, 0x0000af88, 0x0000b002, 0x0000b0ae, + 0x0000b1aa, 0x0000b2f0, 0x0000b3b0, 0x0000b442, + 0x0000b470, 0x0000b51a, 0x0000b550, 0x0000b578, + 0x0000b59a, 0x0000b5cc, 0x0000b5f6, 0x0000b648, + 0x0000b78e, 0x0000b7e6, 0x0000b894, 0x000214e8, + 0x0000bb76, 0x0000bce2, 0x0000bd04, 0x0000bd94, + 0x0000be98, 0x0000bfb0, 0x0000bfb2, 0x0000bff2, + 0x0000c060, 0x0000c0d8, 0x0000c158, 0x0000c1c6, + 0x0000c30e, 0x000215a8, 0x0000c388, 0x0000c4d0, + 0x0000c50e, 0x0000c548, 0x0000c588, 0x0000c5c8, + 0x000013e4, 0x00001436, 0x0000147e, 0x000014a6, + 0x000014de, 0x000014f2, 0x00001546, 0x000015c4, + 0x000015ea, 0x0000164c, 0x00001660, 0x0000168e, + 0x000016ca, 0x000016f0, 0x0000171e, 0x0000175e, + 0x00001798, 0x000017be, 0x000017e4, 0x0000183a, + 0x0000186a, 0x000018cc, 0x0000193a, 0x0002017e, + 0x00001966, 0x0000198e, 0x0000a1ca, 0x0000c2b4, + 0x000201bc, 0x0000cc74, 0x00011014, 0x00011076, + 0x000032dc, 0x000079cf +}; + +#endif /* __FIRMWARE_R8A779X_USB3_V3__ */ diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c new file mode 100644 index 0000000000..d47c99644d --- /dev/null +++ b/drivers/usb/host/xhci-rcar.c @@ -0,0 +1,159 @@ +/* + * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> + * + * Renesas RCar USB HOST xHCI Controller + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <fdtdec.h> +#include <usb.h> +#include <wait_bit.h> + +#include "xhci.h" +#include "xhci-rcar-r8a779x_usb3_v3.h" + +/* Register Offset */ +#define RCAR_USB3_DL_CTRL 0x250 /* FW Download Control & Status */ +#define RCAR_USB3_FW_DATA0 0x258 /* FW Data0 */ + +/* Register Settings */ +/* FW Download Control & Status */ +#define RCAR_USB3_DL_CTRL_ENABLE BIT(0) +#define RCAR_USB3_DL_CTRL_FW_SUCCESS BIT(4) +#define RCAR_USB3_DL_CTRL_FW_SET_DATA0 BIT(8) + +struct rcar_xhci_platdata { + fdt_addr_t hcd_base; + struct clk clk; +}; + +/** + * Contains pointers to register base addresses + * for the usb controller. + */ +struct rcar_xhci { + struct xhci_ctrl ctrl; /* Needs to come first in this struct! */ + struct usb_platdata usb_plat; + struct xhci_hccr *hcd; +}; + +static int xhci_rcar_download_fw(struct rcar_xhci *ctx, const u32 *fw_data, + const size_t fw_array_size) +{ + void __iomem *regs = (void __iomem *)ctx->hcd; + int i, ret; + + /* Download R-Car USB3.0 firmware */ + setbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE); + + for (i = 0; i < fw_array_size; i++) { + writel(fw_data[i], regs + RCAR_USB3_FW_DATA0); + setbits_le32(regs + RCAR_USB3_DL_CTRL, + RCAR_USB3_DL_CTRL_FW_SET_DATA0); + + ret = wait_for_bit("xhci-rcar", regs + RCAR_USB3_DL_CTRL, + RCAR_USB3_DL_CTRL_FW_SET_DATA0, false, + 10, false); + if (ret) + break; + } + + clrbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE); + + ret = wait_for_bit("xhci-rcar", regs + RCAR_USB3_DL_CTRL, + RCAR_USB3_DL_CTRL_FW_SUCCESS, true, + 10, false); + + return ret; +} + +static int xhci_rcar_probe(struct udevice *dev) +{ + struct rcar_xhci_platdata *plat = dev_get_platdata(dev); + struct rcar_xhci *ctx = dev_get_priv(dev); + struct xhci_hcor *hcor; + int len, ret; + + ret = clk_get_by_index(dev, 0, &plat->clk); + if (ret < 0) { + dev_err(dev, "Failed to get USB3 clock\n"); + return ret; + } + + ret = clk_enable(&plat->clk); + if (ret) { + dev_err(dev, "Failed to enable USB3 clock\n"); + goto err_clk; + } + + ctx->hcd = (struct xhci_hccr *)plat->hcd_base; + len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)); + hcor = (struct xhci_hcor *)((uintptr_t)ctx->hcd + len); + + ret = xhci_rcar_download_fw(ctx, firmware_r8a779x_usb3_v3, + ARRAY_SIZE(firmware_r8a779x_usb3_v3)); + if (ret) { + dev_err(dev, "Failed to download firmware\n"); + goto err_fw; + } + + ret = xhci_register(dev, ctx->hcd, hcor); + if (ret) { + dev_err(dev, "Failed to register xHCI\n"); + goto err_fw; + } + + return 0; + +err_fw: + clk_disable(&plat->clk); +err_clk: + clk_free(&plat->clk); + return ret; +} + +static int xhci_rcar_deregister(struct udevice *dev) +{ + struct rcar_xhci_platdata *plat = dev_get_platdata(dev); + + clk_disable(&plat->clk); + clk_free(&plat->clk); + + return xhci_deregister(dev); +} + +static int xhci_rcar_ofdata_to_platdata(struct udevice *dev) +{ + struct rcar_xhci_platdata *plat = dev_get_platdata(dev); + + plat->hcd_base = devfdt_get_addr(dev); + if (plat->hcd_base == FDT_ADDR_T_NONE) { + debug("Can't get the XHCI register base address\n"); + return -ENXIO; + } + + return 0; +} + +static const struct udevice_id xhci_rcar_ids[] = { + { .compatible = "renesas,xhci-r8a7795" }, + { .compatible = "renesas,xhci-r8a7796" }, + { } +}; + +U_BOOT_DRIVER(usb_xhci) = { + .name = "xhci_rcar", + .id = UCLASS_USB, + .probe = xhci_rcar_probe, + .remove = xhci_rcar_deregister, + .ops = &xhci_usb_ops, + .of_match = xhci_rcar_ids, + .ofdata_to_platdata = xhci_rcar_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct rcar_xhci_platdata), + .priv_auto_alloc_size = sizeof(struct rcar_xhci), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 31952f48b9..dac9545365 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -660,6 +660,11 @@ static int search_dir(struct ext2_inode *parent_inode, char *dirname) offset = 0; do { + if (offset & 3) { + printf("Badly aligned ext2_dirent\n"); + break; + } + dir = (struct ext2_dirent *)(block_buffer + offset); direntname = (char*)(dir) + sizeof(struct ext2_dirent); @@ -880,6 +885,11 @@ static int unlink_filename(char *filename, unsigned int blknr) offset = 0; do { + if (offset & 3) { + printf("Badly aligned ext2_dirent\n"); + break; + } + previous_dir = dir; dir = (struct ext2_dirent *)(block_buffer + offset); direntname = (char *)(dir) + sizeof(struct ext2_dirent); diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index b0c7303aa4..9ee2caf2fa 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -64,6 +64,9 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, char *delayed_buf = NULL; short status; + if (blocksize <= 0) + return -1; + /* Adjust len so it we can't read past the end of the file. */ if (len + pos > filesize) len = (filesize - pos); @@ -127,6 +130,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, (blockend >> log2blksz); } } else { + int n; if (previous_block_number != -1) { /* spill */ status = ext4fs_devread(delayed_start, @@ -137,7 +141,11 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, return -1; previous_block_number = -1; } - memset(buf, 0, blocksize - skipfirst); + /* Zero no more than `len' bytes. */ + n = blocksize - skipfirst; + if (n > len) + n = len; + memset(buf, 0, n); } buf += blocksize - skipfirst; } diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 86c1d385cf..0c45e066d8 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -215,17 +215,6 @@ # endif # include "imx6_spl.h" -# ifdef CONFIG_SPL_BUILD -# if defined(CONFIG_TARGET_MX6Q_ICORE_RQS) || defined(CONFIG_TARGET_MX6UL_ISIOT) -# define CONFIG_SYS_FSL_USDHC_NUM 2 -# else -# define CONFIG_SYS_FSL_USDHC_NUM 1 -# endif - -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 -# undef CONFIG_DM_GPIO -# undef CONFIG_DM_MMC -# endif #endif #endif /* __IMX6_ENGICAM_CONFIG_H */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h new file mode 100644 index 0000000000..92dd845c70 --- /dev/null +++ b/include/configs/mx53ppd.h @@ -0,0 +1,248 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + * Jason Liu <r64343@freescale.com> + * + * Configuration settings for Freescale MX53 low cost board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/imx-regs.h> + +#define CONSOLE_DEV "ttymxc0" + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +#define CONFIG_SYS_FSL_CLK + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +#define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000 + +#define CONFIG_MISC_INIT_R +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_MXC_GPIO +#define CONFIG_REVISION_TAG + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 2 + +#define CONFIG_SUPPORT_RAW_INITRD /* bootz raw initrd support */ + +/* Eth Configs */ +#define CONFIG_MII + +#define CONFIG_FEC_MXC +#define IMX_FEC_BASE FEC_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1F + +/* USB Configs */ +#define CONFIG_USB_EHCI_MX5 +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +#define CONFIG_SYS_RTC_BUS_NUM 2 +#define CONFIG_SYS_I2C_RTC_ADDR 0x30 + +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ + +/* PMIC Controller */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_DIALOG_POWER +#define CONFIG_POWER_FSL +#define CONFIG_POWER_FSL_MC13892 +#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 +#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#define CONFIG_SUPPORT_RAW_INITRD + +#define CONFIG_ETHPRIME "FEC0" + +#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ +#define CONFIG_SYS_TEXT_BASE 0x77800000 + +#define PPD_CONFIG_NFS \ + "nfsserver=192.168.252.95\0" \ + "gatewayip=192.168.252.95\0" \ + "netmask=255.255.255.0\0" \ + "ipaddr=192.168.252.99\0" \ + "kernsize=0x2000\0" \ + "use_dhcp=0\0" \ + "nfsroot=/opt/springdale/rd\0" \ + "bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \ + "${kern_ipconf} nfsroot=${nfsserver}:${nfsroot},v3,tcp rw\0" \ + "choose_ip=if test $use_dhcp = 1; then set kern_ipconf ip=dhcp; " \ + "set getcmd dhcp; else set kern_ipconf " \ + "ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off; " \ + "set getcmd tftp; fi\0" \ + "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \ + "${nfsserver}:${image}; bootm ${loadaddr}\0" \ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + PPD_CONFIG_NFS \ + "bootlimit=10\0" \ + "image=/boot/fitImage\0" \ + "fdt_high=0xffffffff\0" \ + "dev=mmc\0" \ + "devnum=0\0" \ + "rootdev=mmcblk0p\0" \ + "quiet=quiet loglevel=0\0" \ + "console=" CONSOLE_DEV "\0" \ + "lvds=ldb\0" \ + "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \ + "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \ + "console=${console} ${rtc_status}\0" \ + "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \ + "rootwait ${bootargs}\0" \ + "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ + "then setenv quiet; fi\0" \ + "hasfirstboot=ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \ + "/boot/bootcause/firstboot\0" \ + "swappartitions=setexpr partnum 3 - ${partnum}\0" \ + "failbootcmd=" \ + "ppd_lcd_enable; " \ + "msg=\"Monitor failed to start. " \ + "Try again, or contact GE Service for support.\"; " \ + "echo $msg; " \ + "setenv stdout vga; " \ + "echo \"\n\n\n\n \" $msg; " \ + "setenv stdout serial; " \ + "mw.b 0x7000A000 0xbc; " \ + "mw.b 0x7000A001 0x00; " \ + "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \ + "altbootcmd=" \ + "run doquiet; " \ + "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ + "run hasfirstboot || setenv partnum 0; " \ + "if test ${partnum} != 0; then " \ + "setenv bootcause REVERT; " \ + "run swappartitions loadimage doboot; " \ + "fi; " \ + "run failbootcmd\0" \ + "loadimage=" \ + "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ + "doboot=" \ + "echo Booting from ${dev}:${devnum}:${partnum} ...; " \ + "run setargs; " \ + "run bootargs_emmc; " \ + "bootm ${loadaddr}\0" \ + "tryboot=" \ + "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ + "run loadimage || run swappartitions && run loadimage || " \ + "setenv partnum 0 && echo MISSING IMAGE;" \ + "run doboot; " \ + "run failbootcmd\0" \ + "video-mode=" \ + "lcd:800x480-24@60,monitor=lcd\0" \ + +#define CONFIG_MMCBOOTCOMMAND \ + "if mmc dev ${devnum}; then " \ + "run doquiet; " \ + "run tryboot; " \ + "fi; " \ + +#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ + +#define CONFIG_SYS_MAXARGS 48 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x70000000 +#define CONFIG_SYS_MEMTEST_END 0x70010000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) +#define PHYS_SDRAM_2 CSD1_BASE_ADDR +#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) +#define PHYS_SDRAM_SIZE (gd->ram_size) + +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#define CONFIG_CMD_FUSE +#define CONFIG_FSL_IIM + +#define CONFIG_SYS_I2C_SPEED 100000 + +/* I2C1 */ +#define CONFIG_SYS_NUM_I2C_BUSES 9 +#define CONFIG_SYS_I2C_MAX_HOPS 1 +#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \ + } + +#define CONFIG_BCH + +#define CONFIG_BOOTCOUNT_LIMIT + +/* Backlight Control */ +#define CONFIG_PWM_IMX +#define CONFIG_IMX6_PWM_PER_CLK 66666000 + +/* Framebuffer and LCD */ +#ifdef CONFIG_VIDEO + #define CONFIG_VIDEO_IPUV3 +#endif + +#endif /* __CONFIG_H */ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 5ef78a75ab..f4c9c28397 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -57,9 +57,9 @@ "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \ "mmcdev=2\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "finduuid=part uuid mmc 2:2 uuid\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ + "root=PARTUUID=${uuid} rootwait rw\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ @@ -67,6 +67,7 @@ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ + "run finduuid; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 75658fd489..f821b67c72 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -47,6 +47,13 @@ #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 +#define CONFIG_DFU_ENV_SETTINGS \ + "dfu_alt_info=uboot raw 0x2 0x400 mmcpart 1;" \ + "boot part 0 1;" \ + "/zImage ext4 0 1;" \ + "/imx6ul-pico-hobbit.dtb ext4 0 1;" \ + "rootfs part 0 2\0" \ + #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -58,14 +65,19 @@ "fdt_addr=0x83000000\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ "mmcautodetect=yes\0" \ - "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ + CONFIG_DFU_ENV_SETTINGS \ + "finduuid=part uuid mmc 0:2 uuid\0" \ + "partitions=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,size=16MiB;name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \ + "setup_emmc=gpt write mmc 0 $partitions; reset;\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "root=PARTUUID=${uuid} rootwait rw\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ + "run finduuid; " \ "run mmcargs; " \ "if run loadfdt; then " \ "bootz ${loadaddr} - ${fdt_addr}; " \ @@ -144,6 +156,5 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 0 -#define CONFIG_MMCROOT "/dev/mmcblk0p2" #endif /* __PICO_IMX6UL_CONFIG_H */ diff --git a/include/fdt_support.h b/include/fdt_support.h index 2bca4d7889..e0f908636c 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -133,6 +133,24 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev); static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {} #endif +/** + * Record information about a processed loadable in /fit-images (creating + * /fit-images if necessary). + * + * @param blob FDT blob to update + * @param index index of this loadable + * @param name name of the loadable + * @param load_addr address the loadable was loaded to + * @param size number of bytes loaded + * @param entry_point entry point (if specified, otherwise pass -1) + * @param type type (if specified, otherwise pass NULL) + * @param os os-type (if specified, otherwise pass NULL) + * @return 0 if ok, or -1 or -FDT_ERR_... on error + */ +int fdt_record_loadable(void *blob, u32 index, const char *name, + uintptr_t load_addr, u32 size, uintptr_t entry_point, + const char *type, const char *os); + #ifdef CONFIG_PCI #include <pci.h> int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose); diff --git a/include/image.h b/include/image.h index 127cfc5148..e9c18ce403 100644 --- a/include/image.h +++ b/include/image.h @@ -152,6 +152,7 @@ enum { IH_OS_OSE, /* OSE */ IH_OS_PLAN9, /* Plan 9 */ IH_OS_OPENRTOS, /* OpenRTOS */ + IH_OS_ARM_TRUSTED_FIRMWARE, /* ARM Trusted Firmware */ IH_OS_COUNT, }; diff --git a/include/spl.h b/include/spl.h index b14a29c57c..308ce7b563 100644 --- a/include/spl.h +++ b/include/spl.h @@ -23,8 +23,11 @@ struct spl_image_info { const char *name; u8 os; - ulong load_addr; - ulong entry_point; + uintptr_t load_addr; + uintptr_t entry_point; +#if CONFIG_IS_ENABLED(LOAD_FIT) + void *fdt_addr; +#endif u32 size; u32 flags; void *arg; @@ -268,7 +271,10 @@ int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr); int spl_mmc_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev); -void bl31_entry(void); +/** + * spl_invoke_atf - boot using an ARM trusted firmware image + */ +void spl_invoke_atf(struct spl_image_info *spl_image); /** * board_return_to_bootrom - allow for boards to continue with the boot ROM diff --git a/lib/Kconfig b/lib/Kconfig index 18663badb2..f447c53bde 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -80,6 +80,9 @@ config TPL_TINY_MEMSET config RBTREE bool +config BITREVERSE + bool "Bit reverse library from Linux" + source lib/dhry/Kconfig menu "Security support" @@ -3,9 +3,10 @@ run_test() { $@ [ $? -ne 0 ] && result=$((result+1)) - echo "result $result" } +result=0 + # Run all tests that the standard sandbox build can support run_test ./test/py/test.py --bd sandbox --build |