diff options
| -rw-r--r-- | arch/mips/dts/brcm,bcm63268.dtsi | 88 | ||||
| -rw-r--r-- | arch/mips/mach-bmips/Kconfig | 13 | ||||
| -rw-r--r-- | include/configs/bmips_bcm63268.h | 25 |
3 files changed, 126 insertions, 0 deletions
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi new file mode 100644 index 0000000000..3d810473ec --- /dev/null +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -0,0 +1,88 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <dt-bindings/gpio/gpio.h> +#include "skeleton.dtsi" + +/ { + compatible = "brcm,bcm63268"; + + cpus { + reg = <0x10000000 0x4>; + #address-cells = <1>; + #size-cells = <0>; + u-boot,dm-pre-reloc; + + cpu@0 { + compatible = "brcm,bcm63268-cpu", "mips,mips4Kc"; + device_type = "cpu"; + reg = <0>; + u-boot,dm-pre-reloc; + }; + + cpu@1 { + compatible = "brcm,bcm63268-cpu", "mips,mips4Kc"; + device_type = "cpu"; + reg = <1>; + u-boot,dm-pre-reloc; + }; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + periph_osc: periph-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + u-boot,dm-pre-reloc; + }; + }; + + ubus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + pll_cntl: syscon@10000008 { + compatible = "syscon"; + reg = <0x10000008 0x4>; + }; + + syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&pll_cntl>; + offset = <0x0>; + mask = <0x1>; + }; + + uart0: serial@10000180 { + compatible = "brcm,bcm6345-uart"; + reg = <0x10000180 0x18>; + clocks = <&periph_osc>; + + status = "disabled"; + }; + + uart1: serial@100001a0 { + compatible = "brcm,bcm6345-uart"; + reg = <0x100001a0 0x18>; + clocks = <&periph_osc>; + + status = "disabled"; + }; + + memory-controller@10003000 { + compatible = "brcm,bcm6328-mc"; + reg = <0x10003000 0x1000>; + u-boot,dm-pre-reloc; + }; + }; +}; diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig index e3ffcb7cf5..b461b79226 100644 --- a/arch/mips/mach-bmips/Kconfig +++ b/arch/mips/mach-bmips/Kconfig @@ -4,6 +4,7 @@ menu "Broadcom MIPS platforms" config SYS_SOC default "bcm6328" if SOC_BMIPS_BCM6328 default "bcm6358" if SOC_BMIPS_BCM6358 + default "bcm63268" if SOC_BMIPS_BCM63268 choice prompt "Broadcom MIPS SoC select" @@ -30,6 +31,18 @@ config SOC_BMIPS_BCM6358 help This supports BMIPS BCM6358 family including BCM6358 and BCM6359. +config SOC_BMIPS_BCM63268 + bool "BMIPS BCM63268 family" + select SUPPORTS_BIG_ENDIAN + select SUPPORTS_CPU_MIPS32_R1 + select MIPS_TUNE_4KC + select MIPS_L1_CACHE_SHIFT_4 + select SWAP_IO_SPACE + select SYSRESET_SYSCON + help + This supports BMIPS BCM63268 family including BCM63168, BCM63169, + BCM63268 and BCM63269. + endchoice choice diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h new file mode 100644 index 0000000000..ac0a6700f7 --- /dev/null +++ b/include/configs/bmips_bcm63268.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_BMIPS_BCM63268_H +#define __CONFIG_BMIPS_BCM63268_H + +/* CPU */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000 + +/* RAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + +/* U-Boot */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 + +#if defined(CONFIG_BMIPS_BOOT_RAM) +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_INIT_SP_OFFSET 0x2000 +#endif + +#endif /* __CONFIG_BMIPS_BCM63268_H */ |