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-rw-r--r--MAINTAINERS7
-rw-r--r--Makefile7
-rw-r--r--arch/arc/dts/emsdp.dts23
-rw-r--r--arch/arc/dts/iot_devkit.dts22
-rw-r--r--arch/arm/dts/am335x-baltos.dts14
-rw-r--r--arch/arm/dts/am335x-bone-common.dtsi12
-rw-r--r--arch/arm/dts/am335x-brsmarc1.dts12
-rw-r--r--arch/arm/dts/am335x-brxre1.dts12
-rw-r--r--arch/arm/dts/am335x-chiliboard.dts6
-rw-r--r--arch/arm/dts/am335x-draco.dts2
-rw-r--r--arch/arm/dts/am335x-evm.dts14
-rw-r--r--arch/arm/dts/am335x-evmsk.dts16
-rw-r--r--arch/arm/dts/am335x-icev2.dts12
-rw-r--r--arch/arm/dts/am335x-igep0033.dtsi12
-rw-r--r--arch/arm/dts/am335x-pxm2.dtsi12
-rw-r--r--arch/arm/dts/am335x-rut.dts7
-rw-r--r--arch/arm/dts/am335x-shc.dts10
-rw-r--r--arch/arm/dts/am335x-sl50.dts13
-rw-r--r--arch/arm/dts/am437x-gp-evm.dts6
-rw-r--r--arch/arm/dts/am437x-idk-evm.dts7
-rw-r--r--arch/arm/dts/am437x-sk-evm.dts12
-rw-r--r--arch/arm/dts/am43x-epos-evm.dts12
-rw-r--r--arch/arm/dts/am57xx-idk-common.dtsi14
-rw-r--r--arch/arm/dts/dra7-evm.dts14
-rw-r--r--arch/arm/dts/dra71-evm.dts4
-rw-r--r--arch/arm/dts/dra72-evm-revc.dts4
-rw-r--r--arch/arm/dts/dra72-evm.dts8
-rw-r--r--arch/arm/dts/dra76-evm.dts4
-rw-r--r--arch/x86/cpu/i386/cpu.c8
-rw-r--r--arch/x86/cpu/start_from_spl.S1
-rw-r--r--arch/x86/include/asm/cpu.h1
-rw-r--r--arch/x86/include/asm/global_data.h1
-rw-r--r--arch/x86/include/asm/u-boot-x86.h9
-rw-r--r--arch/x86/lib/spl.c44
-rw-r--r--arch/x86/lib/tpl.c37
-rw-r--r--board/synopsys/emsdp/README2
-rw-r--r--board/synopsys/emsdp/emsdp.c29
-rw-r--r--board/synopsys/iot_devkit/iot_devkit.c32
-rw-r--r--common/spl/Kconfig8
-rw-r--r--configs/axs101_defconfig2
-rw-r--r--configs/emsdp_defconfig4
-rw-r--r--configs/iot_devkit_defconfig2
-rw-r--r--doc/driver-model/of-plat.rst2
-rw-r--r--drivers/net/ti/am65-cpsw-nuss.c2
-rw-r--r--drivers/net/ti/cpsw.c154
-rw-r--r--drivers/reset/Kconfig7
-rw-r--r--drivers/reset/Makefile1
-rw-r--r--drivers/reset/reset-hsdk.c116
-rw-r--r--drivers/spi/sandbox_spi.c11
-rw-r--r--drivers/spi/spi-uclass.c14
-rw-r--r--drivers/timer/tsc_timer.c5
-rw-r--r--include/cbfs.h6
-rw-r--r--include/cpsw.h5
-rw-r--r--include/dt-bindings/reset/snps,hsdk-reset.h17
-rw-r--r--include/spi.h27
-rw-r--r--include/spl.h4
-rw-r--r--test/dm/sf.c9
-rw-r--r--tools/binman/README.entries33
-rw-r--r--tools/binman/elf.py4
-rw-r--r--tools/binman/etype/intel_fsp_m.py2
-rw-r--r--tools/binman/etype/intel_fsp_s.py27
-rw-r--r--tools/binman/etype/intel_fsp_t.py26
-rw-r--r--tools/binman/ftest.py13
-rw-r--r--tools/binman/test/153_intel_fsp_s.dts14
-rw-r--r--tools/binman/test/154_intel_fsp_t.dts14
-rw-r--r--tools/binman/test/u_boot_binman_syms.lds2
66 files changed, 768 insertions, 225 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 42b5959d90..a310b8478f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -94,6 +94,13 @@ L: uboot-snps-arc@synopsys.com
F: doc/device-tree-bindings/gpio/snps,creg-gpio.txt
F: drivers/gpio/hsdk-creg-gpio.c
+ARC HSDK RESET
+M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
+S: Maintained
+L: uboot-snps-arc@synopsys.com
+F: include/dt-bindings/reset/snps,hsdk-reset.h
+F: drivers/reset/reset-hsdk.c
+
ARC SYNOPSYS DW MMC EXTENSIONS
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
diff --git a/Makefile b/Makefile
index a96c6ce81e..3000d30be2 100644
--- a/Makefile
+++ b/Makefile
@@ -806,6 +806,12 @@ else
SPL_SIZE_CHECK =
endif
+ifneq ($(CONFIG_TPL_SIZE_LIMIT),0)
+TPL_SIZE_CHECK = @$(call size_check,$@,$(CONFIG_TPL_SIZE_LIMIT))
+else
+TPL_SIZE_CHECK =
+endif
+
# Statically apply RELA-style relocations (currently arm64 only)
# This is useful for arm64 where static relocation needs to be performed on
# the raw binary, but certain simulators only accept an ELF file (but don't
@@ -1806,6 +1812,7 @@ spl/boot.bin: spl/u-boot-spl
tpl/u-boot-tpl.bin: tools prepare \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all
+ $(TPL_SIZE_CHECK)
TAG_SUBDIRS := $(patsubst %,$(srctree)/%,$(u-boot-dirs) include)
diff --git a/arch/arc/dts/emsdp.dts b/arch/arc/dts/emsdp.dts
index d307b95d8e..dbebdb4e76 100644
--- a/arch/arc/dts/emsdp.dts
+++ b/arch/arc/dts/emsdp.dts
@@ -32,4 +32,27 @@
reg-shift = <2>;
reg-io-width = <4>;
};
+
+ mmcclk_biu: mmcclk-biu {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ };
+
+ mmcclk_ciu: mmcclk-ciu {
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ #clock-cells = <0>;
+ };
+
+ mmc: mmc0@f0010000 {
+ compatible = "snps,dw-mshc";
+ reg = <0xf0010000 0x400>;
+ bus-width = <4>;
+ fifo-depth = <256>;
+ clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
+ clock-names = "biu", "ciu";
+ max-frequency = <25000000>;
+ };
+
};
diff --git a/arch/arc/dts/iot_devkit.dts b/arch/arc/dts/iot_devkit.dts
index ebf5a950f0..c0173fa5ab 100644
--- a/arch/arc/dts/iot_devkit.dts
+++ b/arch/arc/dts/iot_devkit.dts
@@ -42,4 +42,26 @@
compatible = "nop-phy";
#phy-cells = <0>;
};
+
+ mmcclk_biu: mmcclk-biu {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ };
+
+ mmcclk_ciu: mmcclk-ciu {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ };
+
+ mmc: mmc0@f000b000 {
+ compatible = "snps,dw-mshc";
+ reg = <0xf000b000 0x400>;
+ bus-width = <4>;
+ fifo-depth = <128>;
+ clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
+ clock-names = "biu", "ciu";
+ max-frequency = <25000000>;
+ };
};
diff --git a/arch/arm/dts/am335x-baltos.dts b/arch/arm/dts/am335x-baltos.dts
index f939cf6406..b3c13c9a9d 100644
--- a/arch/arm/dts/am335x-baltos.dts
+++ b/arch/arm/dts/am335x-baltos.dts
@@ -409,16 +409,26 @@
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy@7 {
+ reg = <7>;
+ eee-broken-100tx;
+ eee-broken-1000t;
+ };
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
+ phy-handle = <&phy0>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <7>;
+ phy-handle = <&phy1>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>;
};
diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi
index 40a3c35ff8..5b8230e281 100644
--- a/arch/arm/dts/am335x-bone-common.dtsi
+++ b/arch/arm/dts/am335x-bone-common.dtsi
@@ -360,16 +360,12 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
- phy-mode = "mii";
-};
-
-&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
+ phy-handle = <&ethphy0>;
phy-mode = "mii";
};
&mac {
+ slaves = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
@@ -381,6 +377,10 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
};
&mmc1 {
diff --git a/arch/arm/dts/am335x-brsmarc1.dts b/arch/arm/dts/am335x-brsmarc1.dts
index 1a7f9a5365..e1738b6dde 100644
--- a/arch/arm/dts/am335x-brsmarc1.dts
+++ b/arch/arm/dts/am335x-brsmarc1.dts
@@ -247,6 +247,14 @@
&davinci_mdio {
status = "okay";
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethphy1: ethernet-phy@3 {
+ reg = <3>;
+ };
};
&mac {
@@ -258,13 +266,13 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <1>;
+ phy-handle = <&ethphy0>;
phy-mode = "rmii";
ti,ledcr = <0x0480>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <3>;
+ phy-handle = <&ethphy1>;
phy-mode = "rmii";
ti,ledcr = <0x0480>;
};
diff --git a/arch/arm/dts/am335x-brxre1.dts b/arch/arm/dts/am335x-brxre1.dts
index 708407daf2..a0d046d07a 100644
--- a/arch/arm/dts/am335x-brxre1.dts
+++ b/arch/arm/dts/am335x-brxre1.dts
@@ -206,6 +206,14 @@
&davinci_mdio {
status = "okay";
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethphy1: ethernet-phy@2 {
+ reg = <2>;
+ };
};
&mac {
@@ -213,12 +221,12 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <1>;
+ phy-handle = <&ethphy0>;
phy-mode = "mii";
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <2>;
+ phy-handle = <&ethphy1>;
phy-mode = "mii";
};
diff --git a/arch/arm/dts/am335x-chiliboard.dts b/arch/arm/dts/am335x-chiliboard.dts
index 59431b2359..9c2a947aac 100644
--- a/arch/arm/dts/am335x-chiliboard.dts
+++ b/arch/arm/dts/am335x-chiliboard.dts
@@ -140,10 +140,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
+ phy-handle = <&ethphy0>;
phy-mode = "rmii";
};
diff --git a/arch/arm/dts/am335x-draco.dts b/arch/arm/dts/am335x-draco.dts
index 25d0480ecd..f8faa8f7c4 100644
--- a/arch/arm/dts/am335x-draco.dts
+++ b/arch/arm/dts/am335x-draco.dts
@@ -143,7 +143,7 @@
};
&cpsw_emac0 {
- phy_id = <&mdio0>, <0>;
+ phy-handle = <&phy0>;
phy-mode = "rmii";
};
diff --git a/arch/arm/dts/am335x-evm.dts b/arch/arm/dts/am335x-evm.dts
index fe27207588..0bda4d4429 100644
--- a/arch/arm/dts/am335x-evm.dts
+++ b/arch/arm/dts/am335x-evm.dts
@@ -675,6 +675,7 @@
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
+ slaves = <1>;
};
&davinci_mdio {
@@ -682,16 +683,15 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
-};
-&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
- phy-mode = "rgmii-txid";
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
};
-&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
- phy-mode = "rgmii-txid";
+&cpsw_emac0 {
+ phy-handle = <&ethphy0>;
+ phy-mode = "rgmii-id";
};
&tscadc {
diff --git a/arch/arm/dts/am335x-evmsk.dts b/arch/arm/dts/am335x-evmsk.dts
index 0767578aee..5762967cf7 100644
--- a/arch/arm/dts/am335x-evmsk.dts
+++ b/arch/arm/dts/am335x-evmsk.dts
@@ -630,17 +630,25 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ };
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
- phy-mode = "rgmii-txid";
+ phy-handle = <&ethphy0>;
+ phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
- phy-mode = "rgmii-txid";
+ phy-handle = <&ethphy1>;
+ phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
};
diff --git a/arch/arm/dts/am335x-icev2.dts b/arch/arm/dts/am335x-icev2.dts
index debc6f6132..37484cb6f5 100644
--- a/arch/arm/dts/am335x-icev2.dts
+++ b/arch/arm/dts/am335x-icev2.dts
@@ -397,13 +397,13 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <1>;
+ phy-handle = <&ethphy0>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <3>;
+ phy-handle = <&ethphy1>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
};
@@ -427,4 +427,12 @@
status = "okay";
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>; /* PHY datasheet states 1uS min */
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ ethphy1: ethernet-phy@3 {
+ reg = <3>;
+ };
};
diff --git a/arch/arm/dts/am335x-igep0033.dtsi b/arch/arm/dts/am335x-igep0033.dtsi
index a5769a8f5f..f102f6adad 100644
--- a/arch/arm/dts/am335x-igep0033.dtsi
+++ b/arch/arm/dts/am335x-igep0033.dtsi
@@ -102,15 +102,23 @@
&davinci_mdio {
status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ };
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
+ phy-handle = <&ethphy0>;
phy-mode = "rmii";
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
+ phy-handle = <&ethphy1>;
phy-mode = "rmii";
};
diff --git a/arch/arm/dts/am335x-pxm2.dtsi b/arch/arm/dts/am335x-pxm2.dtsi
index d9243d5d3d..19bd7e2420 100644
--- a/arch/arm/dts/am335x-pxm2.dtsi
+++ b/arch/arm/dts/am335x-pxm2.dtsi
@@ -117,12 +117,12 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
+ phy-handle = <&ethphy0>;
phy-mode = "rgmii-txid";
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
+ phy-handle = <&ethphy1>;
phy-mode = "rgmii-txid";
};
@@ -131,6 +131,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ };
};
&elm {
diff --git a/arch/arm/dts/am335x-rut.dts b/arch/arm/dts/am335x-rut.dts
index a5716a929f..145247344f 100644
--- a/arch/arm/dts/am335x-rut.dts
+++ b/arch/arm/dts/am335x-rut.dts
@@ -149,13 +149,8 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <1>;
- phy-mode = "rmii";
-};
-
-&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <0>;
phy-mode = "rmii";
+ phy-handle = <&ethernet_phy>;
};
&davinci_mdio {
diff --git a/arch/arm/dts/am335x-shc.dts b/arch/arm/dts/am335x-shc.dts
index 5cdd309b90..8e35c439e5 100644
--- a/arch/arm/dts/am335x-shc.dts
+++ b/arch/arm/dts/am335x-shc.dts
@@ -197,17 +197,17 @@
};
};
+&cpsw_emac0 {
+ phy-mode = "mii";
+ phy-handle = <&ethernetphy0>;
+};
+
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
slaves = <1>;
- cpsw_emac0: slave@4a100200 {
- phy_id = <&davinci_mdio>, <0>;
- phy-mode = "mii";
- phy-handle = <&ethernetphy0>;
- };
};
&mmc1 {
diff --git a/arch/arm/dts/am335x-sl50.dts b/arch/arm/dts/am335x-sl50.dts
index 1bcc60424e..ebb56bdaad 100644
--- a/arch/arm/dts/am335x-sl50.dts
+++ b/arch/arm/dts/am335x-sl50.dts
@@ -507,13 +507,8 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
- phy-mode = "mii";
-};
-
-&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
+ phy-handle = <&ethphy0>;
};
&mac {
@@ -528,6 +523,12 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
+ reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <100>; /* PHY datasheet states 100us min */
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
};
&sham {
diff --git a/arch/arm/dts/am437x-gp-evm.dts b/arch/arm/dts/am437x-gp-evm.dts
index 142bfc52a1..3c500d52db 100644
--- a/arch/arm/dts/am437x-gp-evm.dts
+++ b/arch/arm/dts/am437x-gp-evm.dts
@@ -645,10 +645,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
+ phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};
diff --git a/arch/arm/dts/am437x-idk-evm.dts b/arch/arm/dts/am437x-idk-evm.dts
index 19d1462d15..8f6824c198 100644
--- a/arch/arm/dts/am437x-idk-evm.dts
+++ b/arch/arm/dts/am437x-idk-evm.dts
@@ -385,6 +385,7 @@
};
&mac {
+ slaves = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
@@ -396,10 +397,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
+ phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};
diff --git a/arch/arm/dts/am437x-sk-evm.dts b/arch/arm/dts/am437x-sk-evm.dts
index dc8fcde458..66a3bd1dfa 100644
--- a/arch/arm/dts/am437x-sk-evm.dts
+++ b/arch/arm/dts/am437x-sk-evm.dts
@@ -626,16 +626,24 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
+
+ ethphy0: ethernet-phy@4 {
+ reg = <4>;
+ };
+
+ ethphy1: ethernet-phy@5 {
+ reg = <5>;
+ };
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <4>;
+ phy-handle = <&ethphy0>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <5>;
+ phy-handle = <&ethphy1>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
diff --git a/arch/arm/dts/am43x-epos-evm.dts b/arch/arm/dts/am43x-epos-evm.dts
index fa4d1e3f32..65f157ed59 100644
--- a/arch/arm/dts/am43x-epos-evm.dts
+++ b/arch/arm/dts/am43x-epos-evm.dts
@@ -389,6 +389,7 @@
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
+ slaves = <1>;
};
&davinci_mdio {
@@ -396,15 +397,14 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
-};
-&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <16>;
- phy-mode = "rmii";
+ ethphy0: ethernet-phy@16 {
+ reg = <16>;
+ };
};
-&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
+&cpsw_emac0 {
+ phy-handle = <&ethphy0>;
phy-mode = "rmii";
};
diff --git a/arch/arm/dts/am57xx-idk-common.dtsi b/arch/arm/dts/am57xx-idk-common.dtsi
index fdb4e0e47c..590fb14caf 100644
--- a/arch/arm/dts/am57xx-idk-common.dtsi
+++ b/arch/arm/dts/am57xx-idk-common.dtsi
@@ -372,17 +372,27 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
+ phy-handle = <&ethphy0>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <1>;
+ phy-handle = <&ethphy1>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
+&davinci_mdio {
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+};
+
&usb2_phy1 {
phy-supply = <&ldousb_reg>;
};
diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index aa426dabb6..43de9638e3 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -479,17 +479,27 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <2>;
+ phy-handle = <&ethphy0>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <3>;
+ phy-handle = <&ethphy1>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
+&davinci_mdio {
+ ethphy0: ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ ethphy1: ethernet-phy@3 {
+ reg = <3>;
+ };
+};
+
&dcan1 {
status = "ok";
pinctrl-names = "default", "sleep", "active";
diff --git a/arch/arm/dts/dra71-evm.dts b/arch/arm/dts/dra71-evm.dts
index 64363f75c0..9bf08294b2 100644
--- a/arch/arm/dts/dra71-evm.dts
+++ b/arch/arm/dts/dra71-evm.dts
@@ -201,13 +201,13 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <2>;
+ phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <3>;
+ phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
};
diff --git a/arch/arm/dts/dra72-evm-revc.dts b/arch/arm/dts/dra72-evm-revc.dts
index bf588d0072..fafc2a4d7b 100644
--- a/arch/arm/dts/dra72-evm-revc.dts
+++ b/arch/arm/dts/dra72-evm-revc.dts
@@ -61,13 +61,13 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <2>;
+ phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <3>;
+ phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
};
diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts
index c572693b16..154b0a0ceb 100644
--- a/arch/arm/dts/dra72-evm.dts
+++ b/arch/arm/dts/dra72-evm.dts
@@ -51,10 +51,16 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <3>;
+ phy-handle = <&ethphy0>;
phy-mode = "rgmii";
};
+&davinci_mdio {
+ ethphy0: ethernet-phy@3 {
+ reg = <3>;
+ };
+};
+
&mmc1 {
pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
pinctrl-0 = <&mmc1_pins_default>;
diff --git a/arch/arm/dts/dra76-evm.dts b/arch/arm/dts/dra76-evm.dts
index a1f289f345..e3da17ac97 100644
--- a/arch/arm/dts/dra76-evm.dts
+++ b/arch/arm/dts/dra76-evm.dts
@@ -341,13 +341,13 @@
};
&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <2>;
+ phy-handle = <&dp83867_0>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
- phy_id = <&davinci_mdio>, <3>;
+ phy-handle = <&dp83867_1>;
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
};
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index 90b546e741..31663714a0 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -385,6 +385,14 @@ static void setup_mtrr(void)
}
}
+int x86_cpu_init_tpl(void)
+{
+ setup_cpu_features();
+ setup_identity();
+
+ return 0;
+}
+
int x86_cpu_init_f(void)
{
if (ll_boot_init())
diff --git a/arch/x86/cpu/start_from_spl.S b/arch/x86/cpu/start_from_spl.S
index a73b4d7c45..22cab2dd6c 100644
--- a/arch/x86/cpu/start_from_spl.S
+++ b/arch/x86/cpu/start_from_spl.S
@@ -31,6 +31,7 @@ _start:
call board_init_f_init_reserve
+ call x86_cpu_reinit_f
xorl %eax, %eax
call board_init_f
call board_init_f_r
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index feee0f915f..21a05dab7d 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -55,6 +55,7 @@ enum {
X86_SYSCON_PINCONF, /* Intel x86 pin configuration */
X86_SYSCON_PMU, /* Power Management Unit */
X86_SYSCON_SCU, /* System Controller Unit */
+ X86_SYSCON_PUNIT, /* Power unit */
};
struct cpuid_result {
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 17a4d34491..7f3ada06f6 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -76,6 +76,7 @@ struct arch_global_data {
uint8_t x86_mask;
uint32_t x86_device;
uint64_t tsc_base; /* Initial value returned by rdtsc() */
+ bool tsc_inited; /* true if tsc is ready for use */
unsigned long clock_rate; /* Clock rate of timer in Hz */
void *new_fdt; /* Relocated FDT */
uint32_t bist; /* Built-in self test value */
diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h
index 2466ad2ad3..3e5d56d075 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -34,6 +34,15 @@ int x86_cpu_init_f(void);
*/
int x86_cpu_reinit_f(void);
+/**
+ * x86_cpu_init_tpl() - Do the minimum possible CPU init
+ *
+ * This just sets up the CPU features and figured out the identity
+ *
+ * @return 0 (indicating success, to mimic cpu_init_f())
+ */
+int x86_cpu_init_tpl(void);
+
int cpu_init_f(void);
void setup_gdt(struct global_data *id, u64 *gdt_addr);
/*
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
index 7623fc9ada..1677f80b25 100644
--- a/arch/x86/lib/spl.c
+++ b/arch/x86/lib/spl.c
@@ -5,11 +5,15 @@
#include <common.h>
#include <debug_uart.h>
+#include <dm.h>
#include <malloc.h>
#include <spl.h>
+#include <syscon.h>
#include <asm/cpu.h>
+#include <asm/cpu_common.h>
#include <asm/mrccache.h>
#include <asm/mtrr.h>
+#include <asm/pci.h>
#include <asm/processor.h>
#include <asm/spl.h>
#include <asm-generic/sections.h>
@@ -21,6 +25,32 @@ __weak int arch_cpu_init_dm(void)
return 0;
}
+#ifdef CONFIG_TPL
+
+static int set_max_freq(void)
+{
+ if (cpu_get_burst_mode_state() == BURST_MODE_UNAVAILABLE) {
+ /*
+ * Burst Mode has been factory-configured as disabled and is not
+ * available in this physical processor package
+ */
+ debug("Burst Mode is factory-disabled\n");
+ return -ENOENT;
+ }
+
+ /* Enable burst mode */
+ cpu_set_burst_mode(true);
+
+ /* Enable speed step */
+ cpu_set_eist(true);
+
+ /* Set P-State ratio */
+ cpu_set_p_state_to_turbo_ratio();
+
+ return 0;
+}
+#endif
+
static int x86_spl_init(void)
{
#ifndef CONFIG_TPL
@@ -31,10 +61,16 @@ static int x86_spl_init(void)
* place it immediately below CONFIG_SYS_TEXT_BASE.
*/
char *ptr = (char *)0x110000;
+#else
+ struct udevice *punit;
#endif
int ret;
debug("%s starting\n", __func__);
+ if (IS_ENABLED(TPL))
+ ret = x86_cpu_reinit_f();
+ else
+ ret = x86_cpu_init_f();
ret = spl_init();
if (ret) {
debug("%s: spl_init() failed\n", __func__);
@@ -101,6 +137,14 @@ static int x86_spl_init(void)
return ret;
}
mtrr_commit(true);
+#else
+ ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit);
+ if (ret)
+ debug("Could not find PUNIT (err=%d)\n", ret);
+
+ ret = set_max_freq();
+ if (ret)
+ debug("Failed to set CPU frequency (err=%d)\n", ret);
#endif
return 0;
diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c
index d70f590541..784e3a02de 100644
--- a/arch/x86/lib/tpl.c
+++ b/arch/x86/lib/tpl.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <debug_uart.h>
+#include <dm.h>
#include <spl.h>
#include <asm/cpu.h>
#include <asm/mtrr.h>
@@ -23,6 +24,11 @@ static int x86_tpl_init(void)
int ret;
debug("%s starting\n", __func__);
+ ret = x86_cpu_init_tpl();
+ if (ret) {
+ debug("%s: x86_cpu_init_tpl() failed\n", __func__);
+ return ret;
+ }
ret = spl_init();
if (ret) {
debug("%s: spl_init() failed\n", __func__);
@@ -39,11 +45,6 @@ static int x86_tpl_init(void)
return ret;
}
preloader_console_init();
- ret = print_cpuinfo();
- if (ret) {
- debug("%s: print_cpuinfo() failed\n", __func__);
- return ret;
- }
return 0;
}
@@ -106,7 +107,7 @@ int spl_spi_load_image(void)
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
- printf("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point);
+ debug("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point);
jump_to_spl(spl_image->entry_point);
hang();
}
@@ -115,3 +116,27 @@ void spl_board_init(void)
{
preloader_console_init();
}
+
+#if !CONFIG_IS_ENABLED(PCI)
+/*
+ * This is a fake PCI bus for TPL when it doesn't have proper PCI. It is enough
+ * to bind the devices on the PCI bus, some of which have early-regs properties
+ * providing fixed BARs. Individual drivers program these BARs themselves so
+ * that they can access the devices. The BARs are allocated statically in the
+ * device tree.
+ *
+ * Once SPL is running it enables PCI properly, but does not auto-assign BARs
+ * for devices, so the TPL BARs continue to be used. Once U-Boot starts it does
+ * the auto allocation (after relocation).
+ */
+static const struct udevice_id tpl_fake_pci_ids[] = {
+ { .compatible = "pci-x86" },
+ { }
+};
+
+U_BOOT_DRIVER(pci_x86) = {
+ .name = "pci_x86",
+ .id = UCLASS_SIMPLE_BUS,
+ .of_match = tpl_fake_pci_ids,
+};
+#endif
diff --git a/board/synopsys/emsdp/README b/board/synopsys/emsdp/README
index 034062e397..036554c4d5 100644
--- a/board/synopsys/emsdp/README
+++ b/board/synopsys/emsdp/README
@@ -79,5 +79,5 @@ ARC EM Software Development Platform (AKA EMSDP)
2.1. In case of proprietary MetaWare debugger run:
------------------------->8----------------------
- mdb -dll=opxdarc.so -OK -preloadexec="eval *(int*)0xf0001000=0" u-boot
+ mdb -digilent -OK -preloadexec="eval *(int*)0xf0001000=0" u-boot
------------------------->8----------------------
diff --git a/board/synopsys/emsdp/emsdp.c b/board/synopsys/emsdp/emsdp.c
index 7a3fd5b7f2..5ba9f862e1 100644
--- a/board/synopsys/emsdp/emsdp.c
+++ b/board/synopsys/emsdp/emsdp.c
@@ -85,35 +85,6 @@ int board_early_init_r(void)
return 0;
}
-int board_mmc_init(bd_t *bis)
-{
- struct dwmci_host *host = NULL;
-
- host = malloc(sizeof(struct dwmci_host));
- if (!host) {
- printf("dwmci_host malloc fail!\n");
- return 1;
- }
-
- memset(host, 0, sizeof(struct dwmci_host));
- host->name = "Synopsys Mobile storage";
- host->ioaddr = SDIO_BASE;
- host->buswidth = 4;
- host->dev_index = 0;
- host->bus_hz = 50000000;
-
- add_dwmci(host, host->bus_hz / 2, 400000);
-
- return 0;
-}
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct dwmci_host *host = mmc->priv;
-
- return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
-}
-
#define CREG_BASE 0xF0001000
#define CREG_BOOT (void *)(CREG_BASE + 0x0FF0)
#define CREG_IP_SW_RESET (void *)(CREG_BASE + 0x0FF0)
diff --git a/board/synopsys/iot_devkit/iot_devkit.c b/board/synopsys/iot_devkit/iot_devkit.c
index 8424e09bd3..9dbdc128f8 100644
--- a/board/synopsys/iot_devkit/iot_devkit.c
+++ b/board/synopsys/iot_devkit/iot_devkit.c
@@ -145,38 +145,6 @@ int mach_cpu_init(void)
return set_cpu_freq(gd->cpu_clk);
}
-#define ARC_PERIPHERAL_BASE 0xF0000000
-#define SDIO_BASE (ARC_PERIPHERAL_BASE + 0xB000)
-
-int board_mmc_init(bd_t *bis)
-{
- struct dwmci_host *host = NULL;
-
- host = malloc(sizeof(struct dwmci_host));
- if (!host) {
- printf("dwmci_host malloc fail!\n");
- return -ENOMEM;
- }
-
- memset(host, 0, sizeof(struct dwmci_host));
- host->name = "Synopsys Mobile storage";
- host->ioaddr = (void *)SDIO_BASE;
- host->buswidth = 4;
- host->dev_index = 0;
- host->bus_hz = 50000000;
-
- add_dwmci(host, host->bus_hz / 2, 400000);
-
- return 0;
-}
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct dwmci_host *host = mmc->priv;
-
- return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
-}
-
#define IOTDK_RESET_SEQ 0x55AA6699
void reset_cpu(ulong addr)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 86d7edfee1..c661809923 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1232,6 +1232,14 @@ config TPL
if TPL
+config TPL_SIZE_LIMIT
+ hex "Maximum size of TPL image"
+ depends on TPL
+ default 0
+ help
+ Specifies the maximum length of the U-Boot TPL image.
+ If this value is zero, it is ignored.
+
config TPL_HANDOFF
bool "Pass hand-off information from TPL to SPL and U-Boot proper"
depends on HANDOFF && TPL_BLOBLIST
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 0bfb532fc7..38c8ae998f 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -35,7 +35,9 @@ CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_HSDK_CREG_GPIO=y
CONFIG_MMC=y
+CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig
index 5e55e3e2b2..09fe388e58 100644
--- a/configs/emsdp_defconfig
+++ b/configs/emsdp_defconfig
@@ -24,9 +24,11 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
# CONFIG_NET is not set
CONFIG_DM=y
CONFIG_MMC=y
+CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
-CONFIG_FS_FAT_MAX_CLUSTSIZE=4096
+CONFIG_FS_FAT_MAX_CLUSTSIZE=32768
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_PANIC_HANG=y
diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig
index 24bbe3fc5d..42278d4fb1 100644
--- a/configs/iot_devkit_defconfig
+++ b/configs/iot_devkit_defconfig
@@ -29,7 +29,9 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
# CONFIG_NET is not set
CONFIG_DM=y
CONFIG_MMC=y
+CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/doc/driver-model/of-plat.rst b/doc/driver-model/of-plat.rst
index a38e58e4d2..557957d2a1 100644
--- a/doc/driver-model/of-plat.rst
+++ b/doc/driver-model/of-plat.rst
@@ -269,7 +269,7 @@ For example:
};
U_BOOT_DRIVER(mmc_drv) = {
- .name = "mmc",
+ .name = "vendor_mmc", /* matches compatible string */
.id = UCLASS_MMC,
.of_match = mmc_ids,
.ofdata_to_platdata = mmc_ofdata_to_platdata,
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index e11fbdeed3..06b0663950 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -234,11 +234,11 @@ static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv,
break;
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
mode = AM65_GMII_SEL_MODE_RGMII;
break;
case PHY_INTERFACE_MODE_RGMII_ID:
- case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
mode = AM65_GMII_SEL_MODE_RGMII;
rgmii_id = true;
diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c
index 20ddb44dd8..4a990be93e 100644
--- a/drivers/net/ti/cpsw.c
+++ b/drivers/net/ti/cpsw.c
@@ -19,12 +19,9 @@
#include <phy.h>
#include <asm/arch/cpu.h>
#include <dm.h>
-#include <fdt_support.h>
#include "cpsw_mdio.h"
-DECLARE_GLOBAL_DATA_PTR;
-
#define BITMASK(bits) (BIT(bits) - 1)
#define NUM_DESCS (PKTBUFSRX * 2)
#define PKT_MIN 60
@@ -33,6 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define GIGABITEN BIT(7)
#define FULLDUPLEXEN BIT(0)
#define MIIEN BIT(15)
+#define CTL_EXT_EN BIT(18)
/* DMA Registers */
#define CPDMA_TXCONTROL 0x004
#define CPDMA_RXCONTROL 0x014
@@ -489,6 +487,8 @@ static int cpsw_slave_update_link(struct cpsw_slave *slave,
mac_control |= FULLDUPLEXEN;
if (phy->speed == 100)
mac_control |= MIIEN;
+ if (phy->speed == 10 && phy_interface_is_rgmii(phy))
+ mac_control |= CTL_EXT_EN;
}
if (mac_control == slave->mac_control)
@@ -836,6 +836,7 @@ static int cpsw_phy_init(struct cpsw_priv *priv, struct cpsw_slave *slave)
{
struct phy_device *phydev;
u32 supported = PHY_GBIT_FEATURES;
+ int ret;
phydev = phy_connect(priv->bus,
slave->data->phy_addr,
@@ -846,11 +847,18 @@ static int cpsw_phy_init(struct cpsw_priv *priv, struct cpsw_slave *slave)
return -1;
phydev->supported &= supported;
+ if (slave->data->max_speed) {
+ ret = phy_set_supported(phydev, slave->data->max_speed);
+ if (ret)
+ return ret;
+ dev_dbg(priv->dev, "Port %u speed forced to %uMbit\n",
+ slave->slave_num + 1, slave->data->max_speed);
+ }
phydev->advertising = phydev->supported;
#ifdef CONFIG_DM_ETH
- if (slave->data->phy_of_handle)
- phydev->node = offset_to_ofnode(slave->data->phy_of_handle);
+ if (ofnode_valid(slave->data->phy_of_handle))
+ phydev->node = slave->data->phy_of_handle;
#endif
priv->phydev = phydev;
@@ -1038,12 +1046,6 @@ static const struct eth_ops cpsw_eth_ops = {
.stop = cpsw_eth_stop,
};
-static inline fdt_addr_t cpsw_get_addr_by_node(const void *fdt, int node)
-{
- return fdtdec_get_addr_size_auto_noparent(fdt, node, "reg", 0, NULL,
- false);
-}
-
static void cpsw_gmii_sel_am3352(struct cpsw_priv *priv,
phy_interface_t phy_mode)
{
@@ -1061,10 +1063,10 @@ static void cpsw_gmii_sel_am3352(struct cpsw_priv *priv,
break;
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
mode = AM33XX_GMII_SEL_MODE_RGMII;
break;
case PHY_INTERFACE_MODE_RGMII_ID:
- case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
mode = AM33XX_GMII_SEL_MODE_RGMII;
rgmii_id = true;
@@ -1176,23 +1178,53 @@ static int cpsw_eth_probe(struct udevice *dev)
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
+static void cpsw_eth_of_parse_slave(struct cpsw_platform_data *data,
+ int slave_index, ofnode subnode)
+{
+ struct ofnode_phandle_args out_args;
+ struct cpsw_slave_data *slave_data;
+ const char *phy_mode;
+ u32 phy_id[2];
+ int ret;
+
+ slave_data = &data->slave_data[slave_index];
+
+ phy_mode = ofnode_read_string(subnode, "phy-mode");
+ if (phy_mode)
+ slave_data->phy_if = phy_get_interface_by_name(phy_mode);
+
+ ret = ofnode_parse_phandle_with_args(subnode, "phy-handle",
+ NULL, 0, 0, &out_args);
+ if (!ret) {
+ slave_data->phy_of_handle = out_args.node;
+
+ ret = ofnode_read_s32(slave_data->phy_of_handle, "reg",
+ &slave_data->phy_addr);
+ if (ret)
+ printf("error: phy addr not found in dt\n");
+ } else {
+ ret = ofnode_read_u32_array(subnode, "phy_id", phy_id, 2);
+ if (ret)
+ printf("error: phy_id read failed\n");
+ }
+
+ slave_data->max_speed = ofnode_read_s32_default(subnode,
+ "max-speed", 0);
+}
+
static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);
struct cpsw_platform_data *data;
struct gpio_desc *mode_gpios;
- const char *phy_mode;
- const void *fdt = gd->fdt_blob;
- int node = dev_of_offset(dev);
- int subnode;
int slave_index = 0;
- int active_slave;
int num_mode_gpios;
+ ofnode subnode;
int ret;
data = calloc(1, sizeof(struct cpsw_platform_data));
pdata->priv_pdata = data;
- pdata->iobase = devfdt_get_addr(dev);
+ pdata->iobase = dev_read_addr(dev);
data->version = CPSW_CTRL_VERSION_2;
data->bd_ram_ofs = CPSW_BD_OFFSET;
data->ale_reg_ofs = CPSW_ALE_OFFSET;
@@ -1203,36 +1235,37 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
pdata->phy_interface = -1;
data->cpsw_base = pdata->iobase;
- data->channels = fdtdec_get_int(fdt, node, "cpdma_channels", -1);
- if (data->channels <= 0) {
+
+ ret = dev_read_s32(dev, "cpdma_channels", &data->channels);
+ if (ret) {
printf("error: cpdma_channels not found in dt\n");
- return -ENOENT;
+ return ret;
}
- data->slaves = fdtdec_get_int(fdt, node, "slaves", -1);
- if (data->slaves <= 0) {
+ ret = dev_read_s32(dev, "slaves", &data->slaves);
+ if (ret) {
printf("error: slaves not found in dt\n");
- return -ENOENT;
+ return ret;
}
data->slave_data = malloc(sizeof(struct cpsw_slave_data) *
data->slaves);
- data->ale_entries = fdtdec_get_int(fdt, node, "ale_entries", -1);
- if (data->ale_entries <= 0) {
+ ret = dev_read_s32(dev, "ale_entries", &data->ale_entries);
+ if (ret) {
printf("error: ale_entries not found in dt\n");
- return -ENOENT;
+ return ret;
}
- data->bd_ram_ofs = fdtdec_get_int(fdt, node, "bd_ram_size", -1);
- if (data->bd_ram_ofs <= 0) {
+ ret = dev_read_u32(dev, "bd_ram_size", &data->bd_ram_ofs);
+ if (ret) {
printf("error: bd_ram_size not found in dt\n");
- return -ENOENT;
+ return ret;
}
- data->mac_control = fdtdec_get_int(fdt, node, "mac_control", -1);
- if (data->mac_control <= 0) {
+ ret = dev_read_u32(dev, "mac_control", &data->mac_control);
+ if (ret) {
printf("error: ale_entries not found in dt\n");
- return -ENOENT;
+ return ret;
}
num_mode_gpios = gpio_get_list_count(dev, "mode-gpios");
@@ -1244,67 +1277,41 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
free(mode_gpios);
}
- active_slave = fdtdec_get_int(fdt, node, "active_slave", 0);
- data->active_slave = active_slave;
+ data->active_slave = dev_read_u32_default(dev, "active_slave", 0);
- fdt_for_each_subnode(subnode, fdt, node) {
- int len;
+ ofnode_for_each_subnode(subnode, dev_ofnode(dev)) {
const char *name;
- name = fdt_get_name(fdt, subnode, &len);
+ name = ofnode_get_name(subnode);
if (!strncmp(name, "mdio", 4)) {
- u32 mdio_base;
-
- mdio_base = cpsw_get_addr_by_node(fdt, subnode);
- if (mdio_base == FDT_ADDR_T_NONE) {
+ data->mdio_base = ofnode_get_addr(subnode);
+ if (data->mdio_base == FDT_ADDR_T_NONE) {
pr_err("Not able to get MDIO address space\n");
return -ENOENT;
}
- data->mdio_base = mdio_base;
}
if (!strncmp(name, "slave", 5)) {
- u32 phy_id[2];
-
if (slave_index >= data->slaves)
continue;
- phy_mode = fdt_getprop(fdt, subnode, "phy-mode", NULL);
- if (phy_mode)
- data->slave_data[slave_index].phy_if =
- phy_get_interface_by_name(phy_mode);
-
- data->slave_data[slave_index].phy_of_handle =
- fdtdec_lookup_phandle(fdt, subnode,
- "phy-handle");
-
- if (data->slave_data[slave_index].phy_of_handle >= 0) {
- data->slave_data[slave_index].phy_addr =
- fdtdec_get_int(gd->fdt_blob,
- data->slave_data[slave_index].phy_of_handle,
- "reg", -1);
- } else {
- fdtdec_get_int_array(fdt, subnode, "phy_id",
- phy_id, 2);
- data->slave_data[slave_index].phy_addr =
- phy_id[1];
- }
+
+ cpsw_eth_of_parse_slave(data, slave_index, subnode);
slave_index++;
}
if (!strncmp(name, "cpsw-phy-sel", 12)) {
- data->gmii_sel = cpsw_get_addr_by_node(fdt, subnode);
+ data->gmii_sel = ofnode_get_addr(subnode);
if (data->gmii_sel == FDT_ADDR_T_NONE) {
pr_err("Not able to get gmii_sel reg address\n");
return -ENOENT;
}
- if (fdt_get_property(fdt, subnode, "rmii-clock-ext",
- NULL))
+ if (ofnode_read_bool(subnode, "rmii-clock-ext"))
data->rmii_clock_external = true;
- data->phy_sel_compat = fdt_getprop(fdt, subnode,
- "compatible", NULL);
+ data->phy_sel_compat = ofnode_read_string(subnode,
+ "compatible");
if (!data->phy_sel_compat) {
pr_err("Not able to get gmii_sel compatible\n");
return -ENOENT;
@@ -1320,15 +1327,16 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
data->slave_data[1].sliver_reg_ofs = CPSW_SLIVER1_OFFSET;
}
- ret = ti_cm_get_macid_addr(dev, active_slave, data);
+ ret = ti_cm_get_macid_addr(dev, data->active_slave, data);
if (ret < 0) {
pr_err("cpsw read efuse mac failed\n");
return ret;
}
- pdata->phy_interface = data->slave_data[active_slave].phy_if;
+ pdata->phy_interface = data->slave_data[data->active_slave].phy_if;
if (pdata->phy_interface == -1) {
- debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode);
+ debug("%s: Invalid PHY interface '%s'\n", __func__,
+ phy_string_for_interface(pdata->phy_interface));
return -EINVAL;
}
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index cff00820e4..75ccd65799 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -91,6 +91,13 @@ config RESET_ROCKCHIP
though is that some reset signals, like I2C or MISC reset multiple
devices.
+config RESET_HSDK
+ bool "Synopsys HSDK Reset Driver"
+ depends on DM_RESET && TARGET_HSDK
+ default y
+ help
+ This enables the reset controller driver for HSDK board.
+
config RESET_MESON
bool "Reset controller driver for Amlogic Meson SoCs"
depends on DM_RESET && ARCH_MESON
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 8102d8db29..0a044d5d8c 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_STM32_RESET) += stm32-reset.o
obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o
obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
+obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o
obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
diff --git a/drivers/reset/reset-hsdk.c b/drivers/reset/reset-hsdk.c
new file mode 100644
index 0000000000..213d6c87be
--- /dev/null
+++ b/drivers/reset/reset-hsdk.c
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * HSDK SoC Reset Controller driver
+ *
+ * Copyright (C) 2019 Synopsys, Inc. All rights reserved.
+ * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
+#include <linux/iopoll.h>
+#include <reset-uclass.h>
+
+struct hsdk_rst {
+ void __iomem *regs_ctl;
+ void __iomem *regs_rst;
+};
+
+static const u32 rst_map[] = {
+ BIT(16), /* APB_RST */
+ BIT(17), /* AXI_RST */
+ BIT(18), /* ETH_RST */
+ BIT(19), /* USB_RST */
+ BIT(20), /* SDIO_RST */
+ BIT(21), /* HDMI_RST */
+ BIT(22), /* GFX_RST */
+ BIT(25), /* DMAC_RST */
+ BIT(31), /* EBI_RST */
+};
+
+#define HSDK_MAX_RESETS ARRAY_SIZE(rst_map)
+
+#define CGU_SYS_RST_CTRL 0x0
+#define CGU_IP_SW_RESET 0x0
+#define CGU_IP_SW_RESET_DELAY_SHIFT 16
+#define CGU_IP_SW_RESET_DELAY_MASK GENMASK(31, CGU_IP_SW_RESET_DELAY_SHIFT)
+#define CGU_IP_SW_RESET_DELAY 0
+#define CGU_IP_SW_RESET_RESET BIT(0)
+#define SW_RESET_TIMEOUT 10000
+
+static void hsdk_reset_config(struct hsdk_rst *rst, unsigned long id)
+{
+ writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL);
+}
+
+static int hsdk_reset_do(struct hsdk_rst *rst)
+{
+ u32 reg;
+
+ reg = readl(rst->regs_rst + CGU_IP_SW_RESET);
+ reg &= ~CGU_IP_SW_RESET_DELAY_MASK;
+ reg |= CGU_IP_SW_RESET_DELAY << CGU_IP_SW_RESET_DELAY_SHIFT;
+ reg |= CGU_IP_SW_RESET_RESET;
+ writel(reg, rst->regs_rst + CGU_IP_SW_RESET);
+
+ /* wait till reset bit is back to 0 */
+ return readl_poll_timeout(rst->regs_rst + CGU_IP_SW_RESET, reg,
+ !(reg & CGU_IP_SW_RESET_RESET), SW_RESET_TIMEOUT);
+}
+
+static int hsdk_reset_reset(struct reset_ctl *rst_ctl)
+{
+ struct udevice *dev = rst_ctl->dev;
+ struct hsdk_rst *rst = dev_get_priv(dev);
+
+ if (rst_ctl->id >= HSDK_MAX_RESETS)
+ return -EINVAL;
+
+ debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, rst_ctl,
+ rst_ctl->dev, rst_ctl->id);
+
+ hsdk_reset_config(rst, rst_ctl->id);
+ return hsdk_reset_do(rst);
+}
+
+static int hsdk_reset_noop(struct reset_ctl *rst_ctl)
+{
+ return 0;
+}
+
+static const struct reset_ops hsdk_reset_ops = {
+ .request = hsdk_reset_noop,
+ .free = hsdk_reset_noop,
+ .rst_assert = hsdk_reset_noop,
+ .rst_deassert = hsdk_reset_reset,
+};
+
+static const struct udevice_id hsdk_reset_dt_match[] = {
+ { .compatible = "snps,hsdk-reset" },
+ { },
+};
+
+static int hsdk_reset_probe(struct udevice *dev)
+{
+ struct hsdk_rst *rst = dev_get_priv(dev);
+
+ rst->regs_ctl = dev_remap_addr_index(dev, 0);
+ if (!rst->regs_ctl)
+ return -EINVAL;
+
+ rst->regs_rst = dev_remap_addr_index(dev, 1);
+ if (!rst->regs_rst)
+ return -EINVAL;
+
+ return 0;
+}
+
+U_BOOT_DRIVER(hsdk_reset) = {
+ .name = "hsdk-reset",
+ .id = UCLASS_RESET,
+ .of_match = hsdk_reset_dt_match,
+ .ops = &hsdk_reset_ops,
+ .probe = hsdk_reset_probe,
+ .priv_auto_alloc_size = sizeof(struct hsdk_rst),
+};
diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c
index 16473ec7a0..6b610ff823 100644
--- a/drivers/spi/sandbox_spi.c
+++ b/drivers/spi/sandbox_spi.c
@@ -122,11 +122,22 @@ static int sandbox_cs_info(struct udevice *bus, uint cs,
return 0;
}
+static int sandbox_spi_get_mmap(struct udevice *dev, ulong *map_basep,
+ uint *map_sizep, uint *offsetp)
+{
+ *map_basep = 0x1000;
+ *map_sizep = 0x2000;
+ *offsetp = 0x100;
+
+ return 0;
+}
+
static const struct dm_spi_ops sandbox_spi_ops = {
.xfer = sandbox_spi_xfer,
.set_speed = sandbox_spi_set_speed,
.set_mode = sandbox_spi_set_mode,
.cs_info = sandbox_cs_info,
+ .get_mmap = sandbox_spi_get_mmap,
};
static const struct udevice_id sandbox_spi_ids[] = {
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 947516073e..665611f7e2 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -92,6 +92,20 @@ int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags);
}
+int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
+ uint *offsetp)
+{
+ struct udevice *bus = dev->parent;
+ struct dm_spi_ops *ops = spi_get_ops(bus);
+
+ if (bus->uclass->uc_drv->id != UCLASS_SPI)
+ return -EOPNOTSUPP;
+ if (!ops->get_mmap)
+ return -ENOSYS;
+
+ return ops->get_mmap(dev, map_basep, map_sizep, offsetp);
+}
+
int spi_claim_bus(struct spi_slave *slave)
{
return log_ret(dm_spi_claim_bus(slave->dev));
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index 919caba8a1..637c8ff25a 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -394,7 +394,7 @@ static int tsc_timer_get_count(struct udevice *dev, u64 *count)
static void tsc_timer_ensure_setup(bool early)
{
- if (gd->arch.tsc_base)
+ if (gd->arch.tsc_inited)
return;
gd->arch.tsc_base = rdtsc();
@@ -425,6 +425,7 @@ static void tsc_timer_ensure_setup(bool early)
done:
gd->arch.clock_rate = fast_calibrate * 1000000;
}
+ gd->arch.tsc_inited = true;
}
static int tsc_timer_probe(struct udevice *dev)
@@ -461,6 +462,8 @@ unsigned long notrace timer_early_get_rate(void)
u64 notrace timer_early_get_count(void)
{
+ tsc_timer_ensure_setup(true);
+
return rdtsc() - gd->arch.tsc_base;
}
diff --git a/include/cbfs.h b/include/cbfs.h
index 6d4c4d4b06..f3bc8ca24a 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -72,13 +72,13 @@ struct cbfs_fileheader {
struct cbfs_cachenode {
struct cbfs_cachenode *next;
- u32 type;
void *data;
- u32 data_length;
char *name;
+ u32 type;
+ u32 data_length;
u32 name_length;
u32 attributes_offset;
-} __packed;
+};
extern enum cbfs_result file_cbfs_result;
diff --git a/include/cpsw.h b/include/cpsw.h
index 96ff254f98..786f8b385b 100644
--- a/include/cpsw.h
+++ b/include/cpsw.h
@@ -16,6 +16,8 @@
#ifndef _CPSW_H_
#define _CPSW_H_
+#include <dm/ofnode.h>
+
/* reg offset */
#define CPSW_HOST_PORT_OFFSET 0x108
#define CPSW_SLAVE0_OFFSET 0x208
@@ -38,7 +40,8 @@ struct cpsw_slave_data {
u32 sliver_reg_ofs;
int phy_addr;
int phy_if;
- int phy_of_handle;
+ ofnode phy_of_handle;
+ int max_speed;
};
enum {
diff --git a/include/dt-bindings/reset/snps,hsdk-reset.h b/include/dt-bindings/reset/snps,hsdk-reset.h
new file mode 100644
index 0000000000..e1a643e4bc
--- /dev/null
+++ b/include/dt-bindings/reset/snps,hsdk-reset.h
@@ -0,0 +1,17 @@
+/**
+ * This header provides index for the HSDK reset controller.
+ */
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_SNPS_HSDK
+#define _DT_BINDINGS_RESET_CONTROLLER_SNPS_HSDK
+
+#define HSDK_APB_RESET 0
+#define HSDK_AXI_RESET 1
+#define HSDK_ETH_RESET 2
+#define HSDK_USB_RESET 3
+#define HSDK_SDIO_RESET 4
+#define HSDK_HDMI_RESET 5
+#define HSDK_GFX_RESET 6
+#define HSDK_DMAC_RESET 7
+#define HSDK_EBI_RESET 8
+
+#endif /*_DT_BINDINGS_RESET_CONTROLLER_SNPS_HSDK*/
diff --git a/include/spi.h b/include/spi.h
index 3f79168df3..6fbb4336ce 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -462,6 +462,19 @@ struct dm_spi_ops {
* is invalid, other -ve value on error
*/
int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);
+
+ /**
+ * get_mmap() - Get memory-mapped SPI
+ *
+ * @dev: The SPI flash slave device
+ * @map_basep: Returns base memory address for mapped SPI
+ * @map_sizep: Returns size of mapped SPI
+ * @offsetp: Returns start offset of SPI flash where the map works
+ * correctly (offsets before this are not visible)
+ * @return 0 if OK, -EFAULT if memory mapping is not available
+ */
+ int (*get_mmap)(struct udevice *dev, ulong *map_basep,
+ uint *map_sizep, uint *offsetp);
};
struct dm_spi_emul_ops {
@@ -650,6 +663,20 @@ void dm_spi_release_bus(struct udevice *dev);
int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
const void *dout, void *din, unsigned long flags);
+/**
+ * spi_get_mmap() - Get memory-mapped SPI
+ *
+ * @dev: SPI slave device to check
+ * @map_basep: Returns base memory address for mapped SPI
+ * @map_sizep: Returns size of mapped SPI
+ * @offsetp: Returns start offset of SPI flash where the map works
+ * correctly (offsets before this are not visible)
+ * @return 0 if OK, -ENOSYS if no operation, -EFAULT if memory mapping is not
+ * available
+ */
+int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
+ uint *offsetp);
+
/* Access the operations for a SPI device */
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
diff --git a/include/spl.h b/include/spl.h
index b5387ef273..08ffddac29 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -332,14 +332,14 @@ struct spl_image_loader {
*/
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
#define SPL_LOAD_IMAGE_METHOD(_name, _priority, _boot_device, _method) \
- SPL_LOAD_IMAGE(_method ## _priority ## _boot_device) = { \
+ SPL_LOAD_IMAGE(_boot_device ## _priority ## _method) = { \
.name = _name, \
.boot_device = _boot_device, \
.load_image = _method, \
}
#else
#define SPL_LOAD_IMAGE_METHOD(_name, _priority, _boot_device, _method) \
- SPL_LOAD_IMAGE(_method ## _priority ## _boot_device) = { \
+ SPL_LOAD_IMAGE(_boot_device ## _priority ## _method) = { \
.boot_device = _boot_device, \
.load_image = _method, \
}
diff --git a/test/dm/sf.c b/test/dm/sf.c
index 3788d59052..65aab4f2e9 100644
--- a/test/dm/sf.c
+++ b/test/dm/sf.c
@@ -23,6 +23,9 @@ static int dm_test_spi_flash(struct unit_test_state *uts)
int full_size = 0x200000;
int size = 0x10000;
u8 *src, *dst;
+ uint map_size;
+ ulong map_base;
+ uint offset;
int i;
src = map_sysmem(0x20000, full_size);
@@ -54,6 +57,12 @@ static int dm_test_spi_flash(struct unit_test_state *uts)
sandbox_sf_set_block_protect(emul, 0);
ut_asserteq(0, spl_flash_get_sw_write_prot(dev));
+ /* Check mapping */
+ ut_assertok(dm_spi_get_mmap(dev, &map_base, &map_size, &offset));
+ ut_asserteq(0x1000, map_base);
+ ut_asserteq(0x2000, map_size);
+ ut_asserteq(0x100, offset);
+
/*
* Since we are about to destroy all devices, we must tell sandbox
* to forget the emulation device
diff --git a/tools/binman/README.entries b/tools/binman/README.entries
index bce2244596..1099433521 100644
--- a/tools/binman/README.entries
+++ b/tools/binman/README.entries
@@ -444,6 +444,39 @@ See README.x86 for information about x86 binary blobs.
+Entry: intel-fsp-s: Entry containing Intel Firmware Support Package (FSP) silicon init
+--------------------------------------------------------------------------------------
+
+Properties / Entry arguments:
+ - filename: Filename of file to read into entry
+
+This file contains a binary blob which is used on some devices to set up
+the silicon. U-Boot executes this code in U-Boot proper after SDRAM is
+running, so that it can make full use of memory. Documentation is typically
+not available in sufficient detail to allow U-Boot do this this itself.
+
+An example filename is 'fsp_s.bin'
+
+See README.x86 for information about x86 binary blobs.
+
+
+
+Entry: intel-fsp-t: Entry containing Intel Firmware Support Package (FSP) temp ram init
+---------------------------------------------------------------------------------------
+
+Properties / Entry arguments:
+ - filename: Filename of file to read into entry
+
+This file contains a binary blob which is used on some devices to set up
+temporary memory (Cache-as-RAM or CAR). U-Boot executes this code in TPL so
+that it has access to memory for its stack and initial storage.
+
+An example filename is 'fsp_t.bin'
+
+See README.x86 for information about x86 binary blobs.
+
+
+
Entry: intel-ifwi: Entry containing an Intel Integrated Firmware Image (IFWI) file
----------------------------------------------------------------------------------
diff --git a/tools/binman/elf.py b/tools/binman/elf.py
index 7bc7cf61b5..0c1a5b44b6 100644
--- a/tools/binman/elf.py
+++ b/tools/binman/elf.py
@@ -135,9 +135,7 @@ def LookupAndWriteSymbols(elf_fname, entry, section):
# Look up the symbol in our entry tables.
value = section.LookupSymbol(name, sym.weak, msg)
- if value is not None:
- value += base.address
- else:
+ if value is None:
value = -1
pack_string = pack_string.lower()
value_bytes = struct.pack(pack_string, value)
diff --git a/tools/binman/etype/intel_fsp_m.py b/tools/binman/etype/intel_fsp_m.py
index 2d6b2b6621..bb1de73e41 100644
--- a/tools/binman/etype/intel_fsp_m.py
+++ b/tools/binman/etype/intel_fsp_m.py
@@ -2,7 +2,7 @@
# Copyright 2019 Google LLC
# Written by Simon Glass <sjg@chromium.org>
#
-# Entry-type module for Intel Firmware Support Package binary blob (T section)
+# Entry-type module for Intel Firmware Support Package binary blob (M section)
#
from entry import Entry
diff --git a/tools/binman/etype/intel_fsp_s.py b/tools/binman/etype/intel_fsp_s.py
new file mode 100644
index 0000000000..3d6900d1fb
--- /dev/null
+++ b/tools/binman/etype/intel_fsp_s.py
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019 Google LLC
+# Written by Simon Glass <sjg@chromium.org>
+#
+# Entry-type module for Intel Firmware Support Package binary blob (S section)
+#
+
+from entry import Entry
+from blob import Entry_blob
+
+class Entry_intel_fsp_s(Entry_blob):
+ """Entry containing Intel Firmware Support Package (FSP) silicon init
+
+ Properties / Entry arguments:
+ - filename: Filename of file to read into entry
+
+ This file contains a binary blob which is used on some devices to set up
+ the silicon. U-Boot executes this code in U-Boot proper after SDRAM is
+ running, so that it can make full use of memory. Documentation is typically
+ not available in sufficient detail to allow U-Boot do this this itself.
+
+ An example filename is 'fsp_s.bin'
+
+ See README.x86 for information about x86 binary blobs.
+ """
+ def __init__(self, section, etype, node):
+ Entry_blob.__init__(self, section, etype, node)
diff --git a/tools/binman/etype/intel_fsp_t.py b/tools/binman/etype/intel_fsp_t.py
new file mode 100644
index 0000000000..813a81f2e6
--- /dev/null
+++ b/tools/binman/etype/intel_fsp_t.py
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019 Google LLC
+# Written by Simon Glass <sjg@chromium.org>
+#
+# Entry-type module for Intel Firmware Support Package binary blob (T section)
+#
+
+from entry import Entry
+from blob import Entry_blob
+
+class Entry_intel_fsp_t(Entry_blob):
+ """Entry containing Intel Firmware Support Package (FSP) temp ram init
+
+ Properties / Entry arguments:
+ - filename: Filename of file to read into entry
+
+ This file contains a binary blob which is used on some devices to set up
+ temporary memory (Cache-as-RAM or CAR). U-Boot executes this code in TPL so
+ that it has access to memory for its stack and initial storage.
+
+ An example filename is 'fsp_t.bin'
+
+ See README.x86 for information about x86 binary blobs.
+ """
+ def __init__(self, section, etype, node):
+ Entry_blob.__init__(self, section, etype, node)
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 7000de9d42..494e218cbc 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -73,6 +73,8 @@ FILES_DATA = (b"sorry I'm late\nOh, don't bother apologising, I'm " +
COMPRESS_DATA = b'compress xxxxxxxxxxxxxxxxxxxxxx data'
REFCODE_DATA = b'refcode'
FSP_M_DATA = b'fsp_m'
+FSP_S_DATA = b'fsp_s'
+FSP_T_DATA = b'fsp_t'
# The expected size for the device tree in some tests
EXTRACT_DTB_SIZE = 0x3c9
@@ -149,6 +151,8 @@ class TestFunctional(unittest.TestCase):
TestFunctional._MakeInputFile('bmpblk.bin', BMPBLK_DATA)
TestFunctional._MakeInputFile('refcode.bin', REFCODE_DATA)
TestFunctional._MakeInputFile('fsp_m.bin', FSP_M_DATA)
+ TestFunctional._MakeInputFile('fsp_s.bin', FSP_S_DATA)
+ TestFunctional._MakeInputFile('fsp_t.bin', FSP_T_DATA)
cls._elf_testdir = os.path.join(cls._indir, 'elftest')
elf_test.BuildElfTestFiles(cls._elf_testdir)
@@ -3332,6 +3336,15 @@ class TestFunctional(unittest.TestCase):
data = self._DoReadFile('152_intel_fsp_m.dts')
self.assertEqual(FSP_M_DATA, data[:len(FSP_M_DATA)])
+ def testPackFspS(self):
+ """Test that an image with a FSP silicon-init binary can be created"""
+ data = self._DoReadFile('153_intel_fsp_s.dts')
+ self.assertEqual(FSP_S_DATA, data[:len(FSP_S_DATA)])
+
+ def testPackFspT(self):
+ """Test that an image with a FSP temp-ram-init binary can be created"""
+ data = self._DoReadFile('154_intel_fsp_t.dts')
+ self.assertEqual(FSP_T_DATA, data[:len(FSP_T_DATA)])
if __name__ == "__main__":
diff --git a/tools/binman/test/153_intel_fsp_s.dts b/tools/binman/test/153_intel_fsp_s.dts
new file mode 100644
index 0000000000..579618a8fa
--- /dev/null
+++ b/tools/binman/test/153_intel_fsp_s.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ size = <16>;
+
+ intel-fsp-s {
+ filename = "fsp_s.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/154_intel_fsp_t.dts b/tools/binman/test/154_intel_fsp_t.dts
new file mode 100644
index 0000000000..8da749c157
--- /dev/null
+++ b/tools/binman/test/154_intel_fsp_t.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ size = <16>;
+
+ intel-fsp-t {
+ filename = "fsp_t.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/u_boot_binman_syms.lds b/tools/binman/test/u_boot_binman_syms.lds
index 926df873cb..825fc3f649 100644
--- a/tools/binman/test/u_boot_binman_syms.lds
+++ b/tools/binman/test/u_boot_binman_syms.lds
@@ -9,7 +9,7 @@ ENTRY(_start)
SECTIONS
{
- . = 0x00000000;
+ . = 0x00000010;
_start = .;
. = ALIGN(4);