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-rw-r--r--arch/arm/mach-bcm283x/include/mach/base.h11
-rw-r--r--arch/arm/mach-bcm283x/include/mach/mbox.h4
-rw-r--r--arch/arm/mach-bcm283x/include/mach/sdhci.h5
-rw-r--r--arch/arm/mach-bcm283x/include/mach/timer.h7
-rw-r--r--arch/arm/mach-bcm283x/include/mach/wdog.h5
-rw-r--r--arch/arm/mach-bcm283x/init.c8
-rw-r--r--arch/arm/mach-bcm283x/mbox.c1
-rw-r--r--arch/arm/mach-bcm283x/reset.c20
-rw-r--r--include/configs/rpi.h4
9 files changed, 56 insertions, 9 deletions
diff --git a/arch/arm/mach-bcm283x/include/mach/base.h b/arch/arm/mach-bcm283x/include/mach/base.h
new file mode 100644
index 0000000000..c4ae39852f
--- /dev/null
+++ b/arch/arm/mach-bcm283x/include/mach/base.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * (C) Copyright 2019 Matthias Brugger
+ */
+
+#ifndef _BCM283x_BASE_H_
+#define _BCM283x_BASE_H_
+
+extern unsigned long rpi_bcm283x_base;
+
+#endif
diff --git a/arch/arm/mach-bcm283x/include/mach/mbox.h b/arch/arm/mach-bcm283x/include/mach/mbox.h
index 0b6c2543d5..60e226ce1d 100644
--- a/arch/arm/mach-bcm283x/include/mach/mbox.h
+++ b/arch/arm/mach-bcm283x/include/mach/mbox.h
@@ -7,6 +7,7 @@
#define _BCM2835_MBOX_H
#include <linux/compiler.h>
+#include <asm/arch/base.h>
/*
* The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
@@ -37,7 +38,8 @@
/* Raw mailbox HW */
-#define BCM2835_MBOX_PHYSADDR (CONFIG_BCM283x_BASE + 0x0000b880)
+#define BCM2835_MBOX_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
+ rpi_bcm283x_base + 0x0000b880; })
struct bcm2835_mbox_regs {
u32 read;
diff --git a/arch/arm/mach-bcm283x/include/mach/sdhci.h b/arch/arm/mach-bcm283x/include/mach/sdhci.h
index b443c379d8..7323690687 100644
--- a/arch/arm/mach-bcm283x/include/mach/sdhci.h
+++ b/arch/arm/mach-bcm283x/include/mach/sdhci.h
@@ -6,7 +6,10 @@
#ifndef _BCM2835_SDHCI_H_
#define _BCM2835_SDHCI_H_
-#define BCM2835_SDHCI_BASE (CONFIG_BCM283x_BASE + 0x00300000)
+#include <asm/arch/base.h>
+
+#define BCM2835_SDHCI_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
+ rpi_bcm283x_base + 0x00300000; })
int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h
index 61beb1aba1..01c0ebad64 100644
--- a/arch/arm/mach-bcm283x/include/mach/timer.h
+++ b/arch/arm/mach-bcm283x/include/mach/timer.h
@@ -6,7 +6,12 @@
#ifndef _BCM2835_TIMER_H
#define _BCM2835_TIMER_H
-#define BCM2835_TIMER_PHYSADDR (CONFIG_BCM283x_BASE + 0x00003000)
+#ifndef __ASSEMBLY__
+#include <asm/arch/base.h>
+#endif
+
+#define BCM2835_TIMER_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
+ rpi_bcm283x_base + 0x00003000; })
#define BCM2835_TIMER_CS_M3 (1 << 3)
#define BCM2835_TIMER_CS_M2 (1 << 2)
diff --git a/arch/arm/mach-bcm283x/include/mach/wdog.h b/arch/arm/mach-bcm283x/include/mach/wdog.h
index 8292b3cf1f..9942666720 100644
--- a/arch/arm/mach-bcm283x/include/mach/wdog.h
+++ b/arch/arm/mach-bcm283x/include/mach/wdog.h
@@ -6,7 +6,10 @@
#ifndef _BCM2835_WDOG_H
#define _BCM2835_WDOG_H
-#define BCM2835_WDOG_PHYSADDR (CONFIG_BCM283x_BASE + 0x00100000)
+#include <asm/arch/base.h>
+
+#define BCM2835_WDOG_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
+ rpi_bcm283x_base + 0x00100000; })
struct bcm2835_wdog_regs {
u32 unknown0[7];
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index 97414415a6..d36017e823 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -8,6 +8,8 @@
#include <common.h>
+unsigned long rpi_bcm283x_base;
+
int arch_cpu_init(void)
{
icache_enable();
@@ -15,6 +17,12 @@ int arch_cpu_init(void)
return 0;
}
+int mach_cpu_init(void)
+{
+ rpi_bcm283x_base = CONFIG_BCM283x_BASE;
+
+ return 0;
+}
#ifdef CONFIG_ARMV7_LPAE
void enable_caches(void)
{
diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c
index 3c67f68c17..467d0d5fba 100644
--- a/arch/arm/mach-bcm283x/mbox.c
+++ b/arch/arm/mach-bcm283x/mbox.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <asm/io.h>
+#include <asm/arch/base.h>
#include <asm/arch/mbox.h>
#include <phys2bus.h>
diff --git a/arch/arm/mach-bcm283x/reset.c b/arch/arm/mach-bcm283x/reset.c
index b3da0c7cd6..cd8138d702 100644
--- a/arch/arm/mach-bcm283x/reset.c
+++ b/arch/arm/mach-bcm283x/reset.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <asm/io.h>
+#include <asm/arch/base.h>
#include <asm/arch/wdog.h>
#include <efi_loader.h>
@@ -25,10 +26,10 @@
void hw_watchdog_disable(void) {}
-__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs =
- (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
+__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs;
-void __efi_runtime reset_cpu(ulong ticks)
+static void __efi_runtime
+__reset_cpu(struct bcm2835_wdog_regs *wdog_regs, ulong ticks)
{
uint32_t rstc, timeout;
@@ -46,6 +47,14 @@ void __efi_runtime reset_cpu(ulong ticks)
writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
}
+void reset_cpu(ulong ticks)
+{
+ struct bcm2835_wdog_regs *regs =
+ (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
+
+ __reset_cpu(regs, 0);
+}
+
#ifdef CONFIG_EFI_LOADER
void __efi_runtime EFIAPI efi_reset_system(
@@ -58,7 +67,7 @@ void __efi_runtime EFIAPI efi_reset_system(
if (reset_type == EFI_RESET_COLD ||
reset_type == EFI_RESET_WARM ||
reset_type == EFI_RESET_PLATFORM_SPECIFIC) {
- reset_cpu(0);
+ __reset_cpu(wdog_regs, 0);
} else if (reset_type == EFI_RESET_SHUTDOWN) {
/*
* We set the watchdog hard reset bit here to distinguish this reset
@@ -69,7 +78,7 @@ void __efi_runtime EFIAPI efi_reset_system(
val |= BCM2835_WDOG_PASSWORD;
val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
writel(val, &wdog_regs->rsts);
- reset_cpu(0);
+ __reset_cpu(wdog_regs, 0);
}
while (1) { }
@@ -77,6 +86,7 @@ void __efi_runtime EFIAPI efi_reset_system(
efi_status_t efi_reset_system_init(void)
{
+ wdog_regs = (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
return efi_add_runtime_mmio(&wdog_regs, sizeof(*wdog_regs));
}
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 77d2d5458a..69b09f3f72 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -9,6 +9,10 @@
#include <linux/sizes.h>
#include <asm/arch/timer.h>
+#ifndef __ASSEMBLY__
+#include <asm/arch/base.h>
+#endif
+
#if defined(CONFIG_TARGET_RPI_2) || defined(CONFIG_TARGET_RPI_3_32B)
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
generated by cgit (git 2.34.1) at 2024-12-26 16:58:02 +0000