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-rw-r--r--arch/x86/cpu/broadwell/cpu.c7
-rw-r--r--arch/x86/cpu/ivybridge/cpu.c3
-rw-r--r--arch/x86/cpu/pci.c20
-rw-r--r--arch/x86/include/asm/pci.h15
-rw-r--r--drivers/pci/pci_x86.c16
5 files changed, 31 insertions, 30 deletions
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index bba8cd1e94..297f1e0b68 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -103,11 +103,8 @@ int print_cpuinfo(void)
void board_debug_uart_init(void)
{
- struct udevice *bus = NULL;
-
/* com1 / com2 decode range */
- pci_x86_write_config(bus, PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16);
+ pci_x86_write_config(PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16);
- pci_x86_write_config(bus, PCH_DEV_LPC, LPC_EN, COMA_LPC_EN,
- PCI_SIZE_16);
+ pci_x86_write_config(PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, PCI_SIZE_16);
}
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index c8b16e32c0..6db9da81b7 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -199,6 +199,5 @@ int print_cpuinfo(void)
void board_debug_uart_init(void)
{
/* This enables the debug UART */
- pci_x86_write_config(NULL, PCH_LPC_DEV, LPC_EN, COMA_LPC_EN,
- PCI_SIZE_16);
+ pci_x86_write_config(PCH_LPC_DEV, LPC_EN, COMA_LPC_EN, PCI_SIZE_16);
}
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index 0ccde194d9..e1aae158ce 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -16,12 +16,8 @@
#include <asm/io.h>
#include <asm/pci.h>
-/*
- * TODO(sjg@chromium.org): Drop the first parameter from each of these
- * functions since it is not used.
- */
-int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
- ulong *valuep, enum pci_size_t size)
+int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep,
+ enum pci_size_t size)
{
outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR);
switch (size) {
@@ -39,8 +35,8 @@ int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
return 0;
}
-int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset,
- ulong value, enum pci_size_t size)
+int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value,
+ enum pci_size_t size)
{
outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR);
switch (size) {
@@ -58,19 +54,19 @@ int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset,
return 0;
}
-int pci_x86_clrset_config(struct udevice *bus, pci_dev_t bdf, uint offset,
- ulong clr, ulong set, enum pci_size_t size)
+int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set,
+ enum pci_size_t size)
{
ulong value;
int ret;
- ret = pci_x86_read_config(bus, bdf, offset, &value, size);
+ ret = pci_x86_read_config(bdf, offset, &value, size);
if (ret)
return ret;
value &= ~clr;
value |= set;
- return pci_x86_write_config(bus, bdf, offset, value, size);
+ return pci_x86_write_config(bdf, offset, value, size);
}
void pci_assign_irqs(int bus, int device, u8 irq[4])
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index fb1edf3df7..2a72073572 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -22,30 +22,28 @@
*
* This function can be called before PCI is set up in driver model.
*
- * @bus: Bus to read from (ignored, can be NULL)
* @bdf: PCI device address: bus, device and function -see PCI_BDF()
* @offset: Register offset to read
* @valuep: Place to put the returned value
* @size: Access size
* @return 0 if OK, -ve on error
*/
-int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
- ulong *valuep, enum pci_size_t size);
+int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep,
+ enum pci_size_t size);
/**
* pci_bus_write_config() - Write a configuration value to a device
*
* This function can be called before PCI is set up in driver model.
*
- * @bus: Bus to read from (ignored, can be NULL)
* @bdf: PCI device address: bus, device and function -see PCI_BDF()
* @offset: Register offset to write
* @value: Value to write
* @size: Access size
* @return 0 if OK, -ve on error
*/
-int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset,
- ulong value, enum pci_size_t size);
+int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value,
+ enum pci_size_t size);
/**
* pci_bus_clrset_config32() - Update a configuration value for a device
@@ -53,15 +51,14 @@ int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset,
* The register at @offset is updated to (oldvalue & ~clr) | set. This function
* can be called before PCI is set up in driver model.
*
- * @bus: Bus to read from (ignored, can be NULL)
* @bdf: PCI device address: bus, device and function -see PCI_BDF()
* @offset: Register offset to update
* @clr: Bits to clear
* @set: Bits to set
* @return 0 if OK, -ve on error
*/
-int pci_x86_clrset_config(struct udevice *bus, pci_dev_t bdf, uint offset,
- ulong clr, ulong set, enum pci_size_t size);
+int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set,
+ enum pci_size_t size);
/**
* Assign IRQ number to a PCI device
diff --git a/drivers/pci/pci_x86.c b/drivers/pci/pci_x86.c
index 520ea4649e..e76a9c6e44 100644
--- a/drivers/pci/pci_x86.c
+++ b/drivers/pci/pci_x86.c
@@ -8,9 +8,21 @@
#include <pci.h>
#include <asm/pci.h>
+static int _pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset,
+ ulong *valuep, enum pci_size_t size)
+{
+ return pci_x86_read_config(bdf, offset, valuep, size);
+}
+
+static int _pci_x86_write_config(struct udevice *bus, pci_dev_t bdf,
+ uint offset, ulong value, enum pci_size_t size)
+{
+ return pci_x86_write_config(bdf, offset, value, size);
+}
+
static const struct dm_pci_ops pci_x86_ops = {
- .read_config = pci_x86_read_config,
- .write_config = pci_x86_write_config,
+ .read_config = _pci_x86_read_config,
+ .write_config = _pci_x86_write_config,
};
static const struct udevice_id pci_x86_ids[] = {