diff options
242 files changed, 5262 insertions, 1951 deletions
diff --git a/.travis.yml b/.travis.yml index 6662ca126a..c21bbbbca4 100644 --- a/.travis.yml +++ b/.travis.yml @@ -365,11 +365,13 @@ matrix: - name: "test/py sandbox" env: - TEST_PY_BD="sandbox" + TEST_PY_TEST_SPEC="not pci" BUILDMAN="^sandbox$" TOOLCHAIN="i386" - name: "test/py sandbox with clang" env: - TEST_PY_BD="sandbox" + TEST_PY_TEST_SPEC="not pci" BUILDMAN="^sandbox$" OVERRIDE="clang-7" - name: "test/py sandbox_spl" @@ -382,6 +384,7 @@ matrix: - name: "test/py sandbox_flattree" env: - TEST_PY_BD="sandbox_flattree" + TEST_PY_TEST_SPEC="not pci" BUILDMAN="^sandbox_flattree$" TOOLCHAIN="i386" - name: "test/py vexpress_ca15_tc2" @@ -874,7 +874,7 @@ ifneq ($(CONFIG_BUILD_TARGET),) ALL-y += $(CONFIG_BUILD_TARGET:"%"=%) endif -ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),) +ifdef CONFIG_INIT_SP_RELATIVE ALL-y += init_sp_bss_offset_check endif @@ -1155,7 +1155,7 @@ binary_size_check: u-boot-nodtb.bin FORCE fi \ fi -ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),) +ifdef CONFIG_INIT_SP_RELATIVE ifneq ($(CONFIG_SYS_MALLOC_F_LEN),) subtract_sys_malloc_f_len = space=$$(($${space} - $(CONFIG_SYS_MALLOC_F_LEN))) else diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6f9c2010ba..5ab9cbe832 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -20,15 +20,25 @@ config POSITION_INDEPENDENT information that is embedded into the binary to support U-Boot relocating itself to the top-of-RAM later during execution. -config SYS_INIT_SP_BSS_OFFSET - int +config INIT_SP_RELATIVE + bool "Specify the early stack pointer relative to the .bss section" help U-Boot typically uses a hard-coded value for the stack pointer - before relocation. Define this option to instead calculate the + before relocation. Enable this option to instead calculate the initial SP at run-time. This is useful to avoid hard-coding addresses into U-Boot, so that can be loaded and executed at arbitrary - addresses and thus avoid using arbitrary addresses at runtime. This - option's value is the offset added to &_bss_start in order to + addresses and thus avoid using arbitrary addresses at runtime. + + If this option is enabled, the early stack pointer is set to + &_bss_start with a offset value added. The offset is specified by + SYS_INIT_SP_BSS_OFFSET. + +config SYS_INIT_SP_BSS_OFFSET + int "Early stack offset from the .bss base address" + depends on INIT_SP_RELATIVE + default 524288 + help + This option's value is the offset added to &_bss_start in order to calculate the stack pointer. This offset should be large enough so that the early malloc region, global data (gd), and early stack usage do not overlap any appended DTB. diff --git a/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h index fa6e86d1c2..b4220e4936 100644 --- a/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h +++ b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h @@ -48,7 +48,7 @@ #define __MAX(a, b) (((a) > (b)) ? (a) : (b)) #define __CODE_DATA_SIZE (__bss_start - _start) #define __BSS_SIZE (__bss_end - __bss_start) -#ifdef CONFIG_SYS_INIT_SP_BSS_OFFSET +#ifdef CONFIG_INIT_SP_RELATIVE #define __MAX_EXTRA_RAM_USAGE __MAX(__BSS_SIZE, CONFIG_SYS_INIT_SP_BSS_OFFSET) #else #define __MAX_EXTRA_RAM_USAGE __BSS_SIZE diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 20dbc2ff84..39cf4c3b3d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -30,7 +30,8 @@ dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb dtb-$(CONFIG_ARCH_DAVINCI) += \ da850-evm.dtb \ - da850-lcdk.dtb + da850-lcdk.dtb \ + da850-lego-ev3.dtb dtb-$(CONFIG_KIRKWOOD) += \ kirkwood-atl-sbx81lifkw.dtb \ @@ -288,7 +289,8 @@ dtb-$(CONFIG_AM33XX) += \ am335x-chiliboard.dtb \ am335x-sl50.dtb \ am335x-base0033.dtb \ - am335x-guardian.dtb + am335x-guardian.dtb \ + am335x-wega-rdk.dtb dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \ am43x-epos-evm.dtb \ am437x-idk-evm.dtb \ diff --git a/arch/arm/dts/am335x-phycore-som.dtsi b/arch/arm/dts/am335x-phycore-som.dtsi new file mode 100644 index 0000000000..8d7c19e5e1 --- /dev/null +++ b/arch/arm/dts/am335x-phycore-som.dtsi @@ -0,0 +1,322 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2015 Phytec Messtechnik GmbH + * Author: Teresa Remmet <t.remmet@phytec.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "am33xx.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "Phytec AM335x phyCORE"; + compatible = "phytec,am335x-phycore-som", "ti,am33xx"; + + aliases { + rtc0 = &i2c_rtc; + rtc1 = &rtc; + }; + + cpus { + cpu@0 { + cpu0-supply = <&vdd1_reg>; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256 MB */ + }; + + regulators { + compatible = "simple-bus"; + + vcc5v: fixedregulator0 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; + }; +}; + +/* Crypto Module */ +&aes { + status = "okay"; +}; + +&sham { + status = "okay"; +}; + +/* Ethernet */ +&am33xx_pinmux { + ethernet0_pins: pinmux_ethernet0 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ + AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ + AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE1) /* mii1_txen.rmii1_txen */ + AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ + AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ + AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ + AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */ + >; + }; + + mdio_pins: pinmux_mdio { + pinctrl-single,pins = < + /* MDIO */ + AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; +}; + +&cpsw_emac0 { + phy-handle = <&phy0>; + phy-mode = "rmii"; + dual_emac_res_vlan = <1>; +}; + +&davinci_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&mac { + slaves = <1>; + pinctrl-names = "default"; + pinctrl-0 = <ðernet0_pins>; + status = "okay"; +}; + +/* I2C Busses */ +&am33xx_pinmux { + i2c0_pins: pinmux_i2c0 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + clock-frequency = <400000>; + status = "okay"; + + tps: pmic@2d { + reg = <0x2d>; + }; + + i2c_tmp102: temp@4b { + compatible = "ti,tmp102"; + reg = <0x4b>; + status = "disabled"; + }; + + i2c_eeprom: eeprom@52 { + compatible = "atmel,24c32"; + pagesize = <32>; + reg = <0x52>; + status = "disabled"; + }; + + i2c_rtc: rtc@68 { + compatible = "microcrystal,rv4162"; + reg = <0x68>; + status = "disabled"; + }; +}; + +/* NAND memory */ +&am33xx_pinmux { + nandflash_pins: pinmux_nandflash { + pinctrl-single,pins = < + AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ + AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ + AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ + AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ + AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ + AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ + AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ + AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ + AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ + AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ + AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ + AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ + AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ + AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + >; + }; +}; + +&elm { + status = "okay"; +}; + +&gpmc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&nandflash_pins>; + ranges = <0 0 0x08000000 0x1000000>; /* CS0: NAND */ + nandflash: nand@0,0 { + compatible = "ti,omap2-nand"; + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + interrupt-parent = <&gpmc>; + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ + nand-bus-width = <8>; + ti,nand-ecc-opt = "bch8"; + gpmc,device-nand = "true"; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <30>; + gpmc,cs-wr-off-ns = <30>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <30>; + gpmc,adv-wr-off-ns = <30>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <20>; + gpmc,oe-on-ns = <10>; + gpmc,oe-off-ns = <30>; + gpmc,access-ns = <30>; + gpmc,rd-cycle-ns = <30>; + gpmc,wr-cycle-ns = <30>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <50>; + gpmc,cycle2cycle-diffcsen; + gpmc,clk-activation-ns = <0>; + gpmc,wr-access-ns = <30>; + gpmc,wr-data-mux-bus-ns = <0>; + + ti,elm-id = <&elm>; + + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +/* Power */ +#include "tps65910.dtsi" + +&tps { + vcc1-supply = <&vcc5v>; + vcc2-supply = <&vcc5v>; + vcc3-supply = <&vcc5v>; + vcc4-supply = <&vcc5v>; + vcc5-supply = <&vcc5v>; + vcc6-supply = <&vcc5v>; + vcc7-supply = <&vcc5v>; + vccio-supply = <&vcc5v>; + + regulators { + vrtc_reg: regulator@0 { + regulator-always-on; + }; + + vio_reg: regulator@1 { + regulator-always-on; + }; + + vdd1_reg: regulator@2 { + /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */ + regulator-name = "vdd_mpu"; + regulator-min-microvolt = <912500>; + regulator-max-microvolt = <1378000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd2_reg: regulator@3 { + /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ + regulator-name = "vdd_core"; + regulator-min-microvolt = <912500>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd3_reg: regulator@4 { + regulator-always-on; + }; + + vdig1_reg: regulator@5 { + regulator-name = "vdig1_1p8v"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vdig2_reg: regulator@6 { + regulator-always-on; + }; + + vpll_reg: regulator@7 { + regulator-always-on; + }; + + vdac_reg: regulator@8 { + regulator-always-on; + }; + + vaux1_reg: regulator@9 { + regulator-always-on; + }; + + vaux2_reg: regulator@10 { + regulator-always-on; + }; + + vaux33_reg: regulator@11 { + regulator-always-on; + }; + + vmmc_reg: regulator@12 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +}; + +/* SPI Busses */ +&am33xx_pinmux { + spi0_pins: pinmux_spi0 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_clk.spi0_clk */ + AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d0.spi0_d0 */ + AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */ + AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ + >; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + status = "okay"; + + serial_flash: m25p80@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <48000000>; + reg = <0x0>; + m25p,fast-read; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + }; +}; diff --git a/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi b/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi new file mode 100644 index 0000000000..634f1b0712 --- /dev/null +++ b/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 DENX Software Engineering GmbH + */ + +/ { + chosen { + #address-cells = <1>; + #size-cells = <1>; + + bootargs = "console=ttyO0,115200 earlyprintk"; + stdout-path = &uart0; + }; + + ocp { + u-boot,dm-pre-reloc; + }; +}; + +&i2c0 { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&mmc1 { + u-boot,dm-pre-reloc; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm/dts/am335x-wega-rdk.dts b/arch/arm/dts/am335x-wega-rdk.dts new file mode 100644 index 0000000000..fe50f3041a --- /dev/null +++ b/arch/arm/dts/am335x-wega-rdk.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2015 Phytec Messtechnik GmbH + * Author: Teresa Remmet <t.remmet@phytec.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include "am335x-phycore-som.dtsi" +#include "am335x-wega.dtsi" + +/* SoM */ +&i2c_eeprom { + status = "okay"; +}; + +&i2c_rtc { + status = "okay"; +}; diff --git a/arch/arm/dts/am335x-wega.dtsi b/arch/arm/dts/am335x-wega.dtsi new file mode 100644 index 0000000000..f3e045dfc4 --- /dev/null +++ b/arch/arm/dts/am335x-wega.dtsi @@ -0,0 +1,230 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2015 Phytec Messtechnik GmbH + * Author: Teresa Remmet <t.remmet@phytec.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + model = "Phytec AM335x phyBOARD-WEGA"; + compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"; + + sound: sound_iface { + compatible = "ti,da830-evm-audio"; + }; + + regulators { + compatible = "simple-bus"; + + vcc3v3: fixedregulator1 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + }; +}; + +/* Audio */ +&am33xx_pinmux { + mcasp0_pins: pinmux_mcasp0 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x9AC, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */ + AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */ + AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */ + AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */ + AM33XX_IOPAD(0x9A8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */ + >; + }; +}; + +&i2c0 { + tlv320aic3007: tlv320aic3007@18 { + compatible = "ti,tlv320aic3007"; + reg = <0x18>; + AVDD-supply = <&vcc3v3>; + IOVDD-supply = <&vcc3v3>; + DRVDD-supply = <&vcc3v3>; + DVDD-supply = <&vdig1_reg>; + status = "okay"; + }; +}; + +&mcasp0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcasp0_pins>; + op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */ + tdm-slots = <2>; + serial-dir = < + 2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */ + >; + tx-num-evt = <16>; + rt-num-evt = <16>; + status = "okay"; +}; + +&sound { + ti,model = "AM335x-Wega"; + ti,audio-codec = <&tlv320aic3007>; + ti,mcasp-controller = <&mcasp0>; + ti,audio-routing = + "Line Out", "LLOUT", + "Line Out", "RLOUT", + "LINE1L", "Line In", + "LINE1R", "Line In"; + clocks = <&mcasp0_fck>; + clock-names = "mclk"; + status = "okay"; +}; + +/* CAN Busses */ +&am33xx_pinmux { + dcan1_pins: pinmux_dcan1 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */ + AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */ + >; + }; +}; + +&dcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&dcan1_pins>; + status = "okay"; +}; + +/* Ethernet */ +&am33xx_pinmux { + ethernet1_pins: pinmux_ethernet1 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1) /* gpmc_a0.mii2_txen */ + AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a1.mii2_rxdv */ + AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1) /* gpmc_a2.mii2_txd3 */ + AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1) /* gpmc_a3.mii2_txd2 */ + AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1) /* gpmc_a4.mii2_txd1 */ + AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1) /* gpmc_a5.mii2_txd0 */ + AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a6.mii2_txclk */ + AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a7.mii2_rxclk */ + AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a8.mii2_rxd3 */ + AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a9.mii2_rxd2 */ + AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a10.mii2_rxd1 */ + AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a11.mii2_rxd0 */ + AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_wpn.mii2_rxerr */ + AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_ben1.mii2_col */ + >; + }; +}; + +&cpsw_emac1 { + phy-handle = <&phy1>; + phy-mode = "mii"; + dual_emac_res_vlan = <2>; +}; + +&davinci_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&mac { + slaves = <2>; + pinctrl-names = "default"; + pinctrl-0 = <ðernet0_pins ðernet1_pins>; + dual_emac = <1>; +}; + +/* MMC */ +&am33xx_pinmux { + mmc1_pins: pinmux_mmc1 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ + AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ + AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ + AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ + AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ + AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ + AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_cs1.mmc0_sdcd */ + >; + }; +}; + +&mmc1 { + vmmc-supply = <&vcc3v3>; + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* Power */ +&vdig1_reg { + regulator-boot-on; + regulator-always-on; +}; + +/* UARTs */ +&am33xx_pinmux { + uart0_pins: pinmux_uart0 { + pinctrl-single,pins = < + AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ + AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ + AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */ + AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */ + >; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; + +/* USB */ +&cppi41dma { + status = "okay"; +}; + +&usb_ctrl_mod { + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb0_phy { + status = "okay"; +}; + +&usb1 { + dr_mode = "host"; + status = "okay"; +}; + +&usb1_phy { + status = "okay"; +}; diff --git a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi index a12694e171..cf6c08881b 100644 --- a/arch/arm/dts/armada-388-clearfog-u-boot.dtsi +++ b/arch/arm/dts/armada-388-clearfog-u-boot.dtsi @@ -11,3 +11,11 @@ &sdhci { u-boot,dm-spl; }; + +&ahci0 { + u-boot,dm-spl; +}; + +&ahci1 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/da850-lego-ev3.dts b/arch/arm/dts/da850-lego-ev3.dts new file mode 100644 index 0000000000..e281d039fd --- /dev/null +++ b/arch/arm/dts/da850-lego-ev3.dts @@ -0,0 +1,89 @@ +/* + * Device tree for LEGO MINDSTORMS EV3 + * + * Copyright (C) 2017 David Lechner <david@lechnology.com> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * This is an absolute minimum device tree instead of using the one from Linux + * because the bootloader on the EV3 is limited to 256k. This saves us >10k. + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lego,ev3", "ti,da850"; + model = "LEGO MINDSTORMS EV3"; + + aliases { + serial1 = &serial1; + spi0 = &spi0; + }; + + chosen { + stdout-path = &serial1; + }; + + memory { + device_type = "memory"; + reg = <0xc0000000 0x04000000>; + }; + + arm { + #address-cells = <1>; + #size-cells = <1>; + ranges; + intc: interrupt-controller@fffee000 { + compatible = "ti,cp-intc"; + interrupt-controller; + #interrupt-cells = <1>; + ti,intc-size = <101>; + reg = <0xfffee000 0x2000>; + }; + }; + + soc@1c00000 { + compatible = "simple-bus"; + model = "da850"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x01c00000 0x400000>; + interrupt-parent = <&intc>; + + mmc0: mmc@40000 { + compatible = "ti,da830-mmc"; + reg = <0x40000 0x1000>; + cap-sd-highspeed; + cap-mmc-highspeed; + interrupts = <16>; + max-frequency = <50000000>; + bus-width = <4>; + }; + + spi0: spi@41000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,da830-spi"; + reg = <0x41000 0x1000>; + num-cs = <6>; + ti,davinci-spi-intr-line = <1>; + interrupts = <20>; + + flash@0 { + compatible = "micron,n25q128a13", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <50000000>; + }; + }; + + serial1: serial@10c000 { + compatible = "ti,da830-uart", "ns16550a"; + reg = <0x10c000 0x100>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = <53>; + }; + }; +}; diff --git a/arch/arm/dts/da850.dtsi b/arch/arm/dts/da850.dtsi index 47aa53ba6b..559659b399 100644 --- a/arch/arm/dts/da850.dtsi +++ b/arch/arm/dts/da850.dtsi @@ -476,7 +476,7 @@ clocksource: timer@20000 { compatible = "ti,da830-timer"; reg = <0x20000 0x1000>; - interrupts = <12>, <13>; + interrupts = <21>, <22>; interrupt-names = "tint12", "tint34"; clocks = <&pll0_auxclk>; }; diff --git a/arch/arm/dts/kirkwood-km_kirkwood.dts b/arch/arm/dts/kirkwood-km_kirkwood.dts index f035eff1c1..b2c0209f5d 100644 --- a/arch/arm/dts/kirkwood-km_kirkwood.dts +++ b/arch/arm/dts/kirkwood-km_kirkwood.dts @@ -13,6 +13,10 @@ device_type = "memory"; reg = <0x00000000 0x08000000>; }; + + aliases { + spi0 = &spi0; + }; }; &mdio { @@ -29,3 +33,21 @@ phy-handle = <ðphy0>; }; }; + +&spi0 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p80", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <33000000>; + mode = <3>; + + partition@uboot { + reg = <0x000000 0x0c0000>; + label = "uboot"; + }; + }; +}; diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi index b3da8b1a73..1abd9a3887 100644 --- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi +++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi @@ -10,6 +10,11 @@ chosen { stdout-path = &uart1; }; + + aliases { + /delete-property/ serial1; + /delete-property/ serial2; + }; }; &i2c1 { @@ -20,15 +25,8 @@ clock-frequency = <400000>; }; -&mmc1 { - cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* gpio_110 */ -}; - -&mmc2 { - status = "disabled"; -}; - -&mmc3 { - status = "disabled"; -}; +/delete-node/ &uart2; +/delete-node/ &uart3; +/delete-node/ &mmc2; +/delete-node/ &mmc3; diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi index 956199a2b4..1abd9a3887 100644 --- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi +++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi @@ -10,6 +10,11 @@ chosen { stdout-path = &uart1; }; + + aliases { + /delete-property/ serial1; + /delete-property/ serial2; + }; }; &i2c1 { @@ -20,11 +25,8 @@ clock-frequency = <400000>; }; -&mmc2 { - status = "disabled"; -}; - -&mmc3 { - status = "disabled"; -}; +/delete-node/ &uart2; +/delete-node/ &uart3; +/delete-node/ &mmc2; +/delete-node/ &mmc3; diff --git a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi b/arch/arm/dts/logicpd-som-lv-baseboard.dtsi index 3524766515..4990ed90dc 100644 --- a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi +++ b/arch/arm/dts/logicpd-som-lv-baseboard.dtsi @@ -152,8 +152,8 @@ interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; - wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */ - cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* gpio_110 */ + wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */ + cd-gpios = <&gpio4 14 IRQ_TYPE_LEVEL_LOW>; /* gpio_110 */ vmmc-supply = <&vmmc1>; bus-width = <4>; cap-power-off-card; diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi index 2c599f1c51..1635e42b55 100644 --- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi +++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi @@ -6,6 +6,13 @@ #include "omap3-u-boot.dtsi" +/ { + aliases { + /delete-property/ serial1; + /delete-property/ serial2; + }; +}; + &i2c1 { clock-frequency = <400000>; }; @@ -14,11 +21,7 @@ clock-frequency = <400000>; }; -&mmc2 { - status = "disabled"; -}; - -&mmc3 { - status = "disabled"; -}; - +/delete-node/ &uart2; +/delete-node/ &uart3; +/delete-node/ &mmc2; +/delete-node/ &mmc3; diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi index 2c599f1c51..976330f897 100644 --- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi +++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi @@ -6,6 +6,13 @@ #include "omap3-u-boot.dtsi" +/ { + aliases { + /delete-property/ serial1; + /delete-property/ serial2; + }; +}; + &i2c1 { clock-frequency = <400000>; }; @@ -14,11 +21,8 @@ clock-frequency = <400000>; }; -&mmc2 { - status = "disabled"; -}; - -&mmc3 { - status = "disabled"; -}; +/delete-node/ &uart2; +/delete-node/ &uart3; +/delete-node/ &mmc2; +/delete-node/ &mmc3; diff --git a/arch/arm/dts/omap3-evm-37xx.dts b/arch/arm/dts/omap3-evm-37xx.dts index 5a4ba0aea4..a14303b09a 100644 --- a/arch/arm/dts/omap3-evm-37xx.dts +++ b/arch/arm/dts/omap3-evm-37xx.dts @@ -90,19 +90,19 @@ label = "X-Loader"; reg = <0 0x80000>; }; - partition@0x80000 { + partition@80000 { label = "U-Boot"; reg = <0x80000 0x1c0000>; }; - partition@0x1c0000 { + partition@1c0000 { label = "Environment"; reg = <0x240000 0x40000>; }; - partition@0x280000 { + partition@280000 { label = "Kernel"; reg = <0x280000 0x500000>; }; - partition@0x780000 { + partition@780000 { label = "Filesystem"; reg = <0x780000 0x1f880000>; }; diff --git a/arch/arm/dts/omap3-evm-common.dtsi b/arch/arm/dts/omap3-evm-common.dtsi index ee64191e41..17c89df6ce 100644 --- a/arch/arm/dts/omap3-evm-common.dtsi +++ b/arch/arm/dts/omap3-evm-common.dtsi @@ -122,6 +122,7 @@ }; &mmc2 { + interrupts-extended = <&intc 86 &omap3_pmx_core 0x12e>; vmmc-supply = <&wl12xx_vmmc>; non-removable; bus-width = <4>; @@ -132,8 +133,10 @@ wlcore: wlcore@2 { compatible = "ti,wl1271"; reg = <2>; - interrupt-parent = <&gpio5>; - interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 149 */ + /* gpio_149 with uart1_rts pad as wakeirq */ + interrupts-extended = <&gpio5 21 IRQ_TYPE_EDGE_RISING>, + <&omap3_pmx_core 0x14e>; + interrupt-names = "irq", "wakeup"; ref-clock-frequency = <38400000>; }; }; diff --git a/arch/arm/dts/omap3-evm-processor-common.dtsi b/arch/arm/dts/omap3-evm-processor-common.dtsi index ce7f42f944..b4109f48ec 100644 --- a/arch/arm/dts/omap3-evm-processor-common.dtsi +++ b/arch/arm/dts/omap3-evm-processor-common.dtsi @@ -86,6 +86,10 @@ OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ + OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */ + OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */ + OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */ + OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */ >; }; @@ -127,9 +131,13 @@ >; }; + /* + * Note that gpio_150 pulled high with internal pull to prevent wlcore + * reset on return from off mode in idle. + */ wl12xx_gpio: pinmux_wl12xx_gpio { pinctrl-single,pins = < - OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */ + OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE7) /* uart1_cts.gpio_150 */ OMAP3_CORE1_IOPAD(0x217e, PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */ >; }; diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index a3cd475b48..337a3537ed 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -8,8 +8,6 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h> -/memreserve/ 0x80000000 0x02000000; - / { compatible = "socionext,uniphier-ld11"; #address-cells = <2>; @@ -110,6 +108,17 @@ <1 10 4>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure-memory@81000000 { + reg = <0x0 0x81000000 0x0 0x01000000>; + no-map; + }; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index baf2326836..3721110b17 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -9,8 +9,6 @@ #include <dt-bindings/gpio/uniphier-gpio.h> #include <dt-bindings/thermal/thermal.h> -/memreserve/ 0x80000000 0x02000000; - / { compatible = "socionext,uniphier-ld20"; #address-cells = <2>; @@ -215,6 +213,17 @@ }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure-memory@81000000 { + reg = <0x0 0x81000000 0x0 0x01000000>; + no-map; + }; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index 961d4d3621..b1aff285c8 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -8,8 +8,6 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h> -/memreserve/ 0x80000000 0x02000000; - / { compatible = "socionext,uniphier-pxs3"; #address-cells = <2>; @@ -138,6 +136,17 @@ <1 10 4>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure-memory@81000000 { + reg = <0x0 0x81000000 0x0 0x01000000>; + no-map; + }; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/include/asm/arch-mvebu/spi.h b/arch/arm/include/asm/arch-mvebu/spi.h index d6f6d1ac57..58b6c32c4d 100644 --- a/arch/arm/include/asm/arch-mvebu/spi.h +++ b/arch/arm/include/asm/arch-mvebu/spi.h @@ -23,17 +23,6 @@ struct kwspi_registers { u32 dw_cfg; /* 0x10620 - Direct Write Configuration */ }; -/* They are used to define CONFIG_SYS_KW_SPI_MPP - * each of the below #defines selects which mpp is - * configured for each SPI signal in spi_claim_bus - * bit 0: selects pin for MOSI (MPP1 if 0, MPP6 if 1) - * bit 1: selects pin for SCK (MPP2 if 0, MPP10 if 1) - * bit 2: selects pin for MISO (MPP3 if 0, MPP11 if 1) - */ -#define MOSI_MPP6 (1 << 0) -#define SCK_MPP10 (1 << 1) -#define MISO_MPP11 (1 << 2) - /* Control Register */ #define KWSPI_CSN_ACT (1 << 0) /* Activates serial memory interface */ #define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */ diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index d6b632aa87..e76b25a03e 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -72,7 +72,7 @@ ENTRY(_main) ldr x0, =(CONFIG_TPL_STACK) #elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) ldr x0, =(CONFIG_SPL_STACK) -#elif defined(CONFIG_SYS_INIT_SP_BSS_OFFSET) +#elif defined(CONFIG_INIT_SP_RELATIVE) adr x0, __bss_start add x0, x0, #CONFIG_SYS_INIT_SP_BSS_OFFSET #else diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 7c4170399a..2f68092f82 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -32,11 +32,8 @@ config TARGET_ICONNECT bool "iconnect Board" config TARGET_KM_KIRKWOOD - bool "KM_KIRKWOOD Board" - select BOARD_LATE_INIT - imply CMD_CRAMFS - imply CMD_DIAG - imply FS_CRAMFS + bool "KM Kirkwood Board" + select VENDOR_KM config TARGET_NET2BIG_V2 bool "LaCie 2Big Network v2 NAS Board" @@ -82,7 +79,7 @@ source "board/buffalo/lsxl/Kconfig" source "board/cloudengines/pogo_e02/Kconfig" source "board/d-link/dns325/Kconfig" source "board/iomega/iconnect/Kconfig" -source "board/keymile/km_arm/Kconfig" +source "board/keymile/Kconfig" source "board/LaCie/net2big_v2/Kconfig" source "board/LaCie/netspace_v2/Kconfig" source "board/raidsonic/ib62x0/Kconfig" diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 495c48e6c7..fdd39685b7 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -239,6 +239,11 @@ config MVEBU_SPL_BOOT_DEVICE_MMC bool "SDIO/MMC card" select SPL_LIBDISK_SUPPORT +config MVEBU_SPL_BOOT_DEVICE_SATA + bool "SATA" + select SPL_SATA_SUPPORT + select SPL_LIBDISK_SUPPORT + config MVEBU_SPL_BOOT_DEVICE_UART bool "UART" diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 02d3ce27ee..8228a17972 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -37,6 +37,9 @@ endif ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),) KWB_CFG_BOOT_FROM=sdio endif +ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA),) + KWB_CFG_BOOT_FROM=sata +endif ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART),) KWB_CFG_BOOT_FROM=uart endif diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index f09e7b10e9..f4b7a4fa80 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -542,6 +542,10 @@ static void ahci_mvebu_mbus_config(void __iomem *base) const struct mbus_dram_target_info *dram; int i; + /* mbus is not initialized in SPL; keep the ROM settings */ + if (IS_ENABLED(CONFIG_SPL_BUILD)) + return; + dram = mvebu_mbus_dram_info(); for (i = 0; i < 4; i++) { diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index e6140d6729..2e2d72aac8 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -163,6 +163,13 @@ int serdes_phy_config(void); */ int ddr3_init(void); +/* Auto Voltage Scaling */ +#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X) +void mv_avs_init(void); +#else +static inline void mv_avs_init(void) {} +#endif + /* * get_ref_clk * diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index f666ee2424..acb9257c90 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -159,7 +159,9 @@ #define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS) #define BOOT_FROM_NAND 0x0A +#define BOOT_FROM_SATA 0x22 #define BOOT_FROM_UART 0x28 +#define BOOT_FROM_SATA_ALT 0x2A #define BOOT_FROM_UART_ALT 0x3f #define BOOT_FROM_SPI 0x32 #define BOOT_FROM_MMC 0x30 diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c index d387893af3..e9dd096ad0 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c @@ -256,3 +256,29 @@ u8 sys_env_device_rev_get(void) value = reg_read(DEV_VERSION_ID_REG); return (value & (REVISON_ID_MASK)) >> REVISON_ID_OFFS; } + +void mv_avs_init(void) +{ + u32 sar_freq; + + if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X))) + return; + + reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE); + reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE); + + sar_freq = reg_read(DEVICE_SAMPLE_AT_RESET1_REG); + sar_freq = sar_freq >> SAR_FREQ_OFFSET & SAR_FREQ_MASK; + + /* Set AVS value only for core frequency of 1600MHz or less. + * For higher frequency leave the default value. + */ + if (sar_freq <= 0xd) { + u32 avs_reg_data = reg_read(AVS_ENABLED_CONTROL); + + avs_reg_data &= ~(AVS_LOW_VDD_LIMIT_MASK + | AVS_HIGH_VDD_LIMIT_MASK); + avs_reg_data |= AVS_LOW_VDD_SLOW_VAL | AVS_HIGH_VDD_SLOW_VAL; + reg_write(AVS_ENABLED_CONTROL, avs_reg_data); + } +} diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h index 365332d2b0..1774a5b780 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h @@ -33,6 +33,8 @@ #define DEV_ID_REG_DEVICE_ID_OFFS 16 #define DEV_ID_REG_DEVICE_ID_MASK 0xffff0000 +#define SAR_FREQ_OFFSET 10 +#define SAR_FREQ_MASK 0x1f #define SAR_DEV_ID_OFFS 27 #define SAR_DEV_ID_MASK 0x7 @@ -155,10 +157,12 @@ #define AVS_LOW_VDD_LIMIT_OFFS 4 #define AVS_LOW_VDD_LIMIT_MASK (0xff << AVS_LOW_VDD_LIMIT_OFFS) #define AVS_LOW_VDD_LIMIT_VAL (0x27 << AVS_LOW_VDD_LIMIT_OFFS) +#define AVS_LOW_VDD_SLOW_VAL (0x23 << AVS_LOW_VDD_LIMIT_OFFS) #define AVS_HIGH_VDD_LIMIT_OFFS 12 #define AVS_HIGH_VDD_LIMIT_MASK (0xff << AVS_HIGH_VDD_LIMIT_OFFS) #define AVS_HIGH_VDD_LIMIT_VAL (0x27 << AVS_HIGH_VDD_LIMIT_OFFS) +#define AVS_HIGH_VDD_SLOW_VAL (0x23 << AVS_HIGH_VDD_LIMIT_OFFS) /* Board ID numbers */ #define MARVELL_BOARD_ID_MASK 0x10 diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 530b98c1aa..3cb27b7f4b 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -59,6 +59,11 @@ static u32 get_boot_device(void) case BOOT_FROM_UART_ALT: #endif return BOOT_DEVICE_UART; +#ifdef BOOT_FROM_SATA + case BOOT_FROM_SATA: + case BOOT_FROM_SATA_ALT: + return BOOT_DEVICE_SATA; +#endif case BOOT_FROM_SPI: default: return BOOT_DEVICE_SPI; @@ -121,6 +126,9 @@ void board_init_f(ulong dummy) ddr3_init(); #endif + /* Initialize Auto Voltage Scaling */ + mv_avs_init(); + /* * Return to the BootROM to continue the Marvell xmodem * UART boot protocol. As initiated by the kwboot tool. diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index d29f1ca0b5..efe89eed0b 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -11,7 +11,7 @@ config OMAP34XX select ARM_ERRATA_454179 select ARM_ERRATA_621766 select ARM_ERRATA_725233 - select USE_TINY_PRINTF + select USE_TINY_PRINTF if SPL imply NAND_OMAP_GPMC imply SPL_FS_EXT4 imply SPL_FS_FAT @@ -186,6 +186,7 @@ source "board/ti/am43xx/Kconfig" source "board/ti/am335x/Kconfig" source "board/compulab/cm_t335/Kconfig" source "board/compulab/cm_t43/Kconfig" +source "board/phytec/phycore_am335x_r2/Kconfig" config SPL_LDSCRIPT default "arch/arm/mach-omap2/u-boot-spl.lds" diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 500df1aa11..9da2a16a99 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -177,6 +177,13 @@ config TARGET_PEPPER select DM_SERIAL imply CMD_DM +config TARGET_PHYCORE_AM335X_R2 + bool "Support phyCORE AM335X R2" + select DM + select DM_GPIO + select DM_SERIAL + imply CMD_DM + config TARGET_PXM2 bool "Support pxm2" select BOARD_LATE_INIT diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index 67f669a6fc..1441c80692 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -57,7 +57,6 @@ config TARGET_BLANCHE bool "Blanche board" select DM select DM_SERIAL - select USE_TINY_PRINTF imply CMD_DM config TARGET_GOSE diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 97e22ead59..ff9f29f2d5 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -86,6 +86,7 @@ config TEGRA_ARMV7_COMMON config TEGRA_ARMV8_COMMON bool "Tegra 64-bit common options" select ARM64 + select INIT_SP_RELATIVE select LINUX_KERNEL_IMAGE_HEADER select POSITION_INDEPENDENT select TEGRA_COMMON diff --git a/arch/arm/mach-tegra/tegra186/Kconfig b/arch/arm/mach-tegra/tegra186/Kconfig index 479c0955ee..b2e53b58ca 100644 --- a/arch/arm/mach-tegra/tegra186/Kconfig +++ b/arch/arm/mach-tegra/tegra186/Kconfig @@ -21,9 +21,6 @@ endchoice config SYS_SOC default "tegra186" -config SYS_INIT_SP_BSS_OFFSET - default 524288 - source "board/nvidia/p2771-0000/Kconfig" endif diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig index 250738aed3..3637473051 100644 --- a/arch/arm/mach-tegra/tegra210/Kconfig +++ b/arch/arm/mach-tegra/tegra210/Kconfig @@ -40,9 +40,6 @@ endchoice config SYS_SOC default "tegra210" -config SYS_INIT_SP_BSS_OFFSET - default 524288 - source "board/nvidia/e2220-1170/Kconfig" source "board/nvidia/p2371-0000/Kconfig" source "board/nvidia/p2371-2180/Kconfig" diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index d0c39d4273..115af244cd 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -13,18 +13,20 @@ else obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o obj-y += dram_init.o obj-y += board_init.o +obj-$(CONFIG_ARCH_UNIPHIER_V8_MULTI) += base-address.o obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o ifndef CONFIG_SYSRESET obj-y += reset.o endif -obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o obj-y += pinctrl-glue.o obj-$(CONFIG_MMC) += mmc-first-dev.o obj-y += fdt-fixup.o endif +obj-y += sbc/ obj-y += soc-info.o obj-y += boot-device/ obj-y += clk/ diff --git a/arch/arm/mach-uniphier/arm32/debug_ll.S b/arch/arm/mach-uniphier/arm32/debug_ll.S index e56e1f679c..3fed7985fc 100644 --- a/arch/arm/mach-uniphier/arm32/debug_ll.S +++ b/arch/arm/mach-uniphier/arm32/debug_ll.S @@ -22,7 +22,7 @@ #define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d)) .macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd - ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride) + ldr \ra, =(SG_BASE + SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride) ldr \rd, [\ra] and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32)) orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32)) @@ -30,7 +30,7 @@ .endm ENTRY(debug_ll_init) - ldr r0, =SG_REVISION + ldr r0, =(SG_BASE + SG_REVISION) ldr r1, [r0] and r1, r1, #SG_REVISION_TYPE_MASK mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT @@ -40,7 +40,7 @@ ENTRY(debug_ll_init) cmp r1, #0x26 bne ld4_end - ldr r0, =SG_IECTRL + ldr r0, =(SG_BASE + SG_IECTRL) ldr r1, [r0] orr r1, r1, #1 str r1, [r0] @@ -59,11 +59,11 @@ ld4_end: sg_set_pinsel 128, 0, 4, 8, r0, r1 @ TXD0 -> TXD0 - ldr r0, =SG_LOADPINCTRL + ldr r0, =(SG_BASE + SG_LOADPINCTRL) mov r1, #1 str r1, [r0] - ldr r0, =SC_CLKCTRL + ldr r0, =(SC_BASE + SC_CLKCTRL) ldr r1, [r0] orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] @@ -78,7 +78,7 @@ pro4_end: cmp r1, #0x29 bne sld8_end - ldr r0, =SG_IECTRL + ldr r0, =(SG_BASE + SG_IECTRL) ldr r1, [r0] orr r1, r1, #1 str r1, [r0] @@ -100,11 +100,11 @@ sld8_end: sg_set_pinsel 51, 0, 4, 8, r0, r1 @ TXD2 -> TXD2 sg_set_pinsel 53, 0, 4, 8, r0, r1 @ TXD3 -> TXD3 - ldr r0, =SG_LOADPINCTRL + ldr r0, =(SG_BASE + SG_LOADPINCTRL) mov r1, #1 str r1, [r0] - ldr r0, =SC_CLKCTRL + ldr r0, =(SC_BASE + SC_CLKCTRL) ldr r1, [r0] orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] @@ -119,7 +119,7 @@ pro5_end: cmp r1, #0x2E bne pxs2_end - ldr r0, =SG_IECTRL + ldr r0, =(SG_BASE + SG_IECTRL) ldr r1, [r0] orr r1, r1, #1 str r1, [r0] @@ -129,7 +129,7 @@ pro5_end: sg_set_pinsel 113, 8, 8, 4, r0, r1 @ TXD2 -> TXD2 sg_set_pinsel 219, 8, 8, 4, r0, r1 @ TXD3 -> TXD3 - ldr r0, =SC_CLKCTRL + ldr r0, =(SC_BASE + SC_CLKCTRL) ldr r1, [r0] orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] @@ -144,7 +144,7 @@ pxs2_end: cmp r1, #0x2F bne ld6b_end - ldr r0, =SG_IECTRL + ldr r0, =(SG_BASE + SG_IECTRL) ldr r1, [r0] orr r1, r1, #1 str r1, [r0] @@ -153,7 +153,7 @@ pxs2_end: sg_set_pinsel 115, 0, 8, 4, r0, r1 @ TXD1 -> TXD1 sg_set_pinsel 113, 2, 8, 4, r0, r1 @ SBO0 -> TXD2 - ldr r0, =SC_CLKCTRL + ldr r0, =(SC_BASE + SC_CLKCTRL) ldr r1, [r0] orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] diff --git a/arch/arm/mach-uniphier/arm64/mem_map.c b/arch/arm/mach-uniphier/arm64/mem_map.c index 35e75e2ab2..7653bd2d3c 100644 --- a/arch/arm/mach-uniphier/arm64/mem_map.c +++ b/arch/arm/mach-uniphier/arm64/mem_map.c @@ -7,6 +7,8 @@ #include <linux/types.h> #include <asm/armv8/mmu.h> +#include "../init.h" + static struct mm_region uniphier_mem_map[] = { { .virt = 0x00000000, @@ -27,3 +29,11 @@ static struct mm_region uniphier_mem_map[] = { }; struct mm_region *mem_map = uniphier_mem_map; + +void uniphier_mem_map_init(unsigned long dram_base, unsigned long dram_size) +{ + uniphier_mem_map[0].size = dram_base; + uniphier_mem_map[1].virt = dram_base; + uniphier_mem_map[1].phys = dram_base; + uniphier_mem_map[1].size = dram_size; +} diff --git a/arch/arm/mach-uniphier/base-address.c b/arch/arm/mach-uniphier/base-address.c new file mode 100644 index 0000000000..5ee742e363 --- /dev/null +++ b/arch/arm/mach-uniphier/base-address.c @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright (C) 2019 Socionext Inc. +// Author: Masahiro Yamada <yamada.masahiro@socionext.com> + +#include <common.h> +#include <dm/of.h> +#include <fdt_support.h> +#include <linux/io.h> +#include <linux/libfdt.h> +#include <linux/sizes.h> +#include <asm/global_data.h> + +#include "base-address.h" +#include "sc64-regs.h" +#include "sg-regs.h" + +/* + * Dummy initializers are needed to allocate these to .data section instead of + * .bss section. The .bss section is unusable before relocation because the + * .bss section and DT share the same address. Without the initializers, + * DT would be broken. + */ +void __iomem *sc_base = (void *)0xdeadbeef; +void __iomem *sg_base = (void *)0xdeadbeef; + +static u64 uniphier_base_address_get(const char *compat_tail) +{ + DECLARE_GLOBAL_DATA_PTR; + const void *fdt = gd->fdt_blob; + int offset, len, i; + const char *str; + + for (offset = fdt_next_node(fdt, 0, NULL); + offset >= 0; + offset = fdt_next_node(fdt, offset, NULL)) { + for (i = 0; + (str = fdt_stringlist_get(fdt, offset, "compatible", i, &len)); + i++) { + if (!memcmp(compat_tail, + str + len - strlen(compat_tail), + strlen(compat_tail))) + return fdt_get_base_address(fdt, offset); + } + } + + return OF_BAD_ADDR; +} + +int uniphier_base_address_init(void) +{ + u64 base; + + base = uniphier_base_address_get("-soc-glue"); + if (base == OF_BAD_ADDR) + return -EINVAL; + + sg_base = ioremap(base, SZ_8K); + + base = uniphier_base_address_get("-sysctrl"); + if (base == OF_BAD_ADDR) + return -EINVAL; + + sc_base = ioremap(base, SZ_64K); + + return 0; +} diff --git a/arch/arm/mach-uniphier/base-address.h b/arch/arm/mach-uniphier/base-address.h new file mode 100644 index 0000000000..6158ce7d66 --- /dev/null +++ b/arch/arm/mach-uniphier/base-address.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2019 Socionext Inc. + */ + +#ifndef __UNIPHIER_BASE_ADDRESS_H +#define __UNIPHIER_BASE_ADDRESS_H + +#ifdef CONFIG_ARCH_UNIPHIER_V8_MULTI +int uniphier_base_address_init(void); +#else +static inline int uniphier_base_address_init(void) +{ + return 0; +} +#endif + +#endif /* __UNIPHIER_BASE_ADDRESS_H */ diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 972dbe8ae5..3180b24330 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -31,24 +31,25 @@ static void nand_denali_wp_disable(void) #endif } -static int uniphier_set_fdt_file(void) +static void uniphier_set_env_fdt_file(void) { DECLARE_GLOBAL_DATA_PTR; const char *compat; char dtb_name[256]; int buf_len = sizeof(dtb_name); + int ret; if (env_get("fdtfile")) - return 0; /* do nothing if it is already set */ + return; /* do nothing if it is already set */ compat = fdt_stringlist_get(gd->fdt_blob, 0, "compatible", 0, NULL); if (!compat) - return -EINVAL; + goto fail; /* rip off the vendor prefix "socionext," */ compat = strchr(compat, ','); if (!compat) - return -EINVAL; + goto fail; compat++; strncpy(dtb_name, compat, buf_len); @@ -56,7 +57,43 @@ static int uniphier_set_fdt_file(void) strncat(dtb_name, ".dtb", buf_len); - return env_set("fdtfile", dtb_name); + ret = env_set("fdtfile", dtb_name); + if (ret) + goto fail; + + return; +fail: + pr_warn("\"fdt_file\" environment variable was not set correctly\n"); +} + +static void uniphier_set_env_addr(const char *env, const char *offset_env) +{ + unsigned long offset = 0; + const char *str; + char *end; + int ret; + + if (env_get(env)) + return; /* do nothing if it is already set */ + + if (offset_env) { + str = env_get(offset_env); + if (!str) + goto fail; + + offset = simple_strtoul(str, &end, 16); + if (*end) + goto fail; + } + + ret = env_set_hex(env, gd->ram_base + offset); + if (ret) + goto fail; + + return; + +fail: + pr_warn("\"%s\" environment variable was not set correctly\n", env); } int board_late_init(void) @@ -68,6 +105,10 @@ int board_late_init(void) printf("eMMC Boot"); env_set("bootdev", "emmc"); break; + case BOOT_DEVICE_MMC2: + printf("SD Boot"); + env_set("bootdev", "sd"); + break; case BOOT_DEVICE_NAND: printf("NAND Boot"); env_set("bootdev", "nand"); @@ -92,8 +133,15 @@ int board_late_init(void) printf("\n"); - if (uniphier_set_fdt_file()) - pr_warn("fdt_file environment was not set correctly\n"); + uniphier_set_env_fdt_file(); + + uniphier_set_env_addr("dram_base", NULL); + + uniphier_set_env_addr("loadaddr", "loadaddr_offset"); + + uniphier_set_env_addr("kernel_addr_r", "kernel_addr_r_offset"); + uniphier_set_env_addr("ramdisk_addr_r", "ramdisk_addr_r_offset"); + uniphier_set_env_addr("fdt_addr_r", "fdt_addr_r_offset"); return 0; } diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c b/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c index 10093be0e4..11e70a926f 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c +++ b/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c @@ -58,11 +58,3 @@ int uniphier_ld20_boot_device_is_usb(u32 pinmon) { return !!(~pinmon & 0x00000780); } - -unsigned int uniphier_ld11_boot_device_fixup(unsigned int mode) -{ - if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB) - mode = BOOT_DEVICE_BOARD; - - return mode; -} diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c b/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c index 01a72c0350..2edf66d5c1 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c +++ b/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c @@ -36,5 +36,5 @@ const unsigned uniphier_pxs3_boot_device_count = int uniphier_pxs3_boot_device_is_usb(u32 pinmon) { - return !!(readl(SG_PINMON2) & BIT(31)); + return !!(readl(sg_base + SG_PINMON2) & BIT(31)); } diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c index 23be8cfcf0..83f8c6a428 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device.c +++ b/arch/arm/mach-uniphier/boot-device/boot-device.c @@ -7,6 +7,7 @@ #include <common.h> #include <spl.h> #include <stdio.h> +#include <linux/io.h> #include <linux/log2.h> #include "../init.h" @@ -20,9 +21,11 @@ struct uniphier_boot_device_info { unsigned int boot_device_sel_shift; const struct uniphier_boot_device *boot_device_table; const unsigned int *boot_device_count; + int (*boot_device_is_sd)(u32 pinmon); int (*boot_device_is_usb)(u32 pinmon); unsigned int (*boot_device_fixup)(unsigned int mode); - int have_internal_stm; + int (*boot_is_swapped)(void); + bool have_internal_stm; }; static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { @@ -32,7 +35,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 1, .boot_device_table = uniphier_ld4_boot_device_table, .boot_device_count = &uniphier_ld4_boot_device_count, - .have_internal_stm = 1, + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = true, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) @@ -41,7 +45,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 1, .boot_device_table = uniphier_ld4_boot_device_table, .boot_device_count = &uniphier_ld4_boot_device_count, - .have_internal_stm = 0, + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = false, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_SLD8) @@ -50,7 +55,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 1, .boot_device_table = uniphier_ld4_boot_device_table, .boot_device_count = &uniphier_ld4_boot_device_count, - .have_internal_stm = 1, + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = true, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) @@ -59,7 +65,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 1, .boot_device_table = uniphier_pro5_boot_device_table, .boot_device_count = &uniphier_pro5_boot_device_count, - .have_internal_stm = 0, + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = false, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS2) @@ -70,7 +77,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_count = &uniphier_pxs2_boot_device_count, .boot_device_is_usb = uniphier_pxs2_boot_device_is_usb, .boot_device_fixup = uniphier_pxs2_boot_device_fixup, - .have_internal_stm = 0, + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = false, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_LD6B) @@ -81,7 +89,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_count = &uniphier_pxs2_boot_device_count, .boot_device_is_usb = uniphier_pxs2_boot_device_is_usb, .boot_device_fixup = uniphier_pxs2_boot_device_fixup, - .have_internal_stm = 1, /* STM on A-chip */ + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = true, /* STM on A-chip */ }, #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) @@ -91,8 +100,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_table = uniphier_ld11_boot_device_table, .boot_device_count = &uniphier_ld11_boot_device_count, .boot_device_is_usb = uniphier_ld11_boot_device_is_usb, - .boot_device_fixup = uniphier_ld11_boot_device_fixup, - .have_internal_stm = 1, + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = true, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) @@ -102,8 +111,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_table = uniphier_ld11_boot_device_table, .boot_device_count = &uniphier_ld11_boot_device_count, .boot_device_is_usb = uniphier_ld20_boot_device_is_usb, - .boot_device_fixup = uniphier_ld11_boot_device_fixup, - .have_internal_stm = 1, + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = true, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS3) @@ -113,7 +122,8 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_table = uniphier_pxs3_boot_device_table, .boot_device_count = &uniphier_pxs3_boot_device_count, .boot_device_is_usb = uniphier_pxs3_boot_device_is_usb, - .have_internal_stm = 0, + .boot_is_swapped = uniphier_sbc_boot_is_swapped, + .have_internal_stm = false, }, #endif }; @@ -126,10 +136,13 @@ static unsigned int __uniphier_boot_device_raw( u32 pinmon; unsigned int boot_sel; - if (boot_is_swapped()) + if (info->boot_is_swapped && info->boot_is_swapped()) return BOOT_DEVICE_NOR; - pinmon = readl(SG_PINMON0); + pinmon = readl(sg_base + SG_PINMON0); + + if (info->boot_device_is_sd && info->boot_device_is_sd(pinmon)) + return BOOT_DEVICE_MMC2; if (info->boot_device_is_usb && info->boot_device_is_usb(pinmon)) return BOOT_DEVICE_USB; @@ -187,7 +200,7 @@ int uniphier_have_internal_stm(void) int uniphier_boot_from_backend(void) { - return !!(readl(SG_PINMON0) & BIT(27)); + return !!(readl(sg_base + SG_PINMON0) & BIT(27)); } #ifndef CONFIG_SPL_BUILD @@ -209,9 +222,15 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("STB Micon: %s\n", uniphier_boot_from_backend() ? "OFF" : "ON"); - printf("Boot Swap: %s\n", boot_is_swapped() ? "ON" : "OFF"); + if (info->boot_is_swapped) + printf("Boot Swap: %s\n", + info->boot_is_swapped() ? "ON" : "OFF"); + + pinmon = readl(sg_base + SG_PINMON0); - pinmon = readl(SG_PINMON0); + if (info->boot_device_is_sd) + printf("SD Boot: %s\n", + info->boot_device_is_sd(pinmon) ? "ON" : "OFF"); if (info->boot_device_is_usb) printf("USB Boot: %s\n", diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.h b/arch/arm/mach-uniphier/boot-device/boot-device.h index 44579f17d3..bbb634316b 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device.h +++ b/arch/arm/mach-uniphier/boot-device/boot-device.h @@ -30,6 +30,5 @@ int uniphier_ld20_boot_device_is_usb(u32 pinmon); int uniphier_pxs3_boot_device_is_usb(u32 pinmon); unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode); -unsigned int uniphier_ld11_boot_device_fixup(unsigned int mode); #endif /* _UNIPHIER_BOOT_DEVICE_H_ */ diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index 3d741b4c4d..d12f49e523 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -17,12 +17,8 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o pll-ld4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o -obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o pll-ld20.o -obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += clk-pxs3.o pll-pxs3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-base-ld20.o pll-ld11.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o pll-base-ld20.o pll-ld20.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += clk-pxs3.o pll-base-ld20.o pll-pxs3.o endif - -obj-$(CONFIG_ARCH_UNIPHIER_LD11) += pll-base-ld20.o -obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-base-ld20.o -obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += pll-base-ld20.o diff --git a/arch/arm/mach-uniphier/clk/clk-dram-ld4.c b/arch/arm/mach-uniphier/clk/clk-dram-ld4.c index 39cde4400b..c796d364bb 100644 --- a/arch/arm/mach-uniphier/clk/clk-dram-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-dram-ld4.c @@ -16,14 +16,14 @@ void uniphier_ld4_dram_clk_init(void) u32 tmp; /* deassert reset */ - tmp = readl(SC_RSTCTRL); + tmp = readl(sc_base + SC_RSTCTRL); tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0; - writel(tmp, SC_RSTCTRL); - readl(SC_RSTCTRL); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL); + readl(sc_base + SC_RSTCTRL); /* dummy read */ /* provide clocks */ - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_UMC; - writel(tmp, SC_CLKCTRL); - readl(SC_CLKCTRL); /* dummy read */ + writel(tmp, sc_base + SC_CLKCTRL); + readl(sc_base + SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/clk/clk-dram-pro5.c b/arch/arm/mach-uniphier/clk/clk-dram-pro5.c index 7674ceb885..808d1ebfe1 100644 --- a/arch/arm/mach-uniphier/clk/clk-dram-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-dram-pro5.c @@ -18,17 +18,17 @@ void uniphier_pro5_dram_clk_init(void) * UMCA1, UMC31: Ch0 (WIO1) * UMCA0, UMC30: Ch0 (WIO0) */ - tmp = readl(SC_RSTCTRL4); + tmp = readl(sc_base + SC_RSTCTRL4); tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30; - writel(tmp, SC_RSTCTRL4); - readl(SC_RSTCTRL4); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL4); + readl(sc_base + SC_RSTCTRL4); /* dummy read */ /* provide clocks */ - tmp = readl(SC_CLKCTRL4); + tmp = readl(sc_base + SC_CLKCTRL4); tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0; - writel(tmp, SC_CLKCTRL4); - readl(SC_CLKCTRL4); /* dummy read */ + writel(tmp, sc_base + SC_CLKCTRL4); + readl(sc_base + SC_CLKCTRL4); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c b/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c index ad4e83a84a..b78bd01672 100644 --- a/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c @@ -15,18 +15,18 @@ void uniphier_pxs2_dram_clk_init(void) u32 tmp; /* deassert reset */ - tmp = readl(SC_RSTCTRL4); + tmp = readl(sc_base + SC_RSTCTRL4); tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | SC_RSTCTRL4_NRST_UMC32 | SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30; - writel(tmp, SC_RSTCTRL4); - readl(SC_RSTCTRL4); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL4); + readl(sc_base + SC_RSTCTRL4); /* dummy read */ /* provide clocks */ - tmp = readl(SC_CLKCTRL4); + tmp = readl(sc_base + SC_CLKCTRL4); tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 | SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0; - writel(tmp, SC_CLKCTRL4); - readl(SC_CLKCTRL4); /* dummy read */ + writel(tmp, sc_base + SC_CLKCTRL4); + readl(sc_base + SC_CLKCTRL4); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld4.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c index eb36a9e7ae..f32f78dd26 100644 --- a/arch/arm/mach-uniphier/clk/clk-early-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c @@ -17,14 +17,14 @@ void uniphier_ld4_early_clk_init(void) /* deassert reset */ if (spl_boot_device() != BOOT_DEVICE_NAND) { - tmp = readl(SC_RSTCTRL); + tmp = readl(sc_base + SC_RSTCTRL); tmp &= ~SC_RSTCTRL_NRST_NAND; - writel(tmp, SC_RSTCTRL); + writel(tmp, sc_base + SC_RSTCTRL); }; /* provide clocks */ - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; - writel(tmp, SC_CLKCTRL); - readl(SC_CLKCTRL); /* dummy read */ + writel(tmp, sc_base + SC_CLKCTRL); + readl(sc_base + SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c index e997acf1b7..0917b33c25 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld11.c +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -17,16 +17,16 @@ void uniphier_ld11_clk_init(void) { /* if booted from a device other than USB, without stand-by MPU */ - if ((readl(SG_PINMON0) & BIT(27)) && + if ((readl(sg_base + SG_PINMON0) & BIT(27)) && uniphier_boot_device_raw() != BOOT_DEVICE_USB) { - writel(1, SG_ETPHYPSHUT); - writel(1, SG_ETPHYCNT); + writel(1, sg_base + SG_ETPHYPSHUT); + writel(1, sg_base + SG_ETPHYCNT); udelay(1); /* wait for regulator level 1.1V -> 2.5V */ - writel(3, SG_ETPHYCNT); - writel(3, SG_ETPHYPSHUT); - writel(7, SG_ETPHYCNT); + writel(3, sg_base + SG_ETPHYCNT); + writel(3, sg_base + SG_ETPHYPSHUT); + writel(7, sg_base + SG_ETPHYCNT); } /* TODO: use "mmc-pwrseq-emmc" */ @@ -37,7 +37,7 @@ void uniphier_ld11_clk_init(void) int ch; for (ch = 0; ch < 3; ch++) { - void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL; + void __iomem *phyctrl = sg_base + SG_USBPHYCTRL; writel(0x82280600, phyctrl + 8 * ch); writel(0x00000106, phyctrl + 8 * ch + 4); diff --git a/arch/arm/mach-uniphier/clk/clk-ld20.c b/arch/arm/mach-uniphier/clk/clk-ld20.c index 02a14ddfb8..397b2d7384 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld20.c +++ b/arch/arm/mach-uniphier/clk/clk-ld20.c @@ -15,13 +15,13 @@ void uniphier_ld20_clk_init(void) { u32 tmp; - tmp = readl(SC_RSTCTRL6); + tmp = readl(sc_base + SC_RSTCTRL6); tmp |= BIT(8); /* Mali */ - writel(tmp, SC_RSTCTRL6); + writel(tmp, sc_base + SC_RSTCTRL6); - tmp = readl(SC_CLKCTRL6); + tmp = readl(sc_base + SC_CLKCTRL6); tmp |= BIT(8); /* Mali */ - writel(tmp, SC_CLKCTRL6); + writel(tmp, sc_base + SC_CLKCTRL6); /* TODO: use "mmc-pwrseq-emmc" */ writel(1, SDCTRL_EMMC_HW_RESET); diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index 9c88cde5e2..0393942503 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c @@ -15,18 +15,18 @@ void uniphier_ld4_clk_init(void) u32 tmp; /* deassert reset */ - tmp = readl(SC_RSTCTRL); + tmp = readl(sc_base + SC_RSTCTRL); #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif - writel(tmp, SC_RSTCTRL); - readl(SC_RSTCTRL); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL); + readl(sc_base + SC_RSTCTRL); /* dummy read */ /* provide clocks */ - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif - writel(tmp, SC_CLKCTRL); - readl(SC_CLKCTRL); /* dummy read */ + writel(tmp, sc_base + SC_CLKCTRL); + readl(sc_base + SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 32d44c0b66..2b364dca41 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -15,7 +15,7 @@ void uniphier_pro4_clk_init(void) u32 tmp; /* deassert reset */ - tmp = readl(SC_RSTCTRL); + tmp = readl(sc_base + SC_RSTCTRL); #ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | SC_RSTCTRL_NRST_GIO; @@ -23,18 +23,18 @@ void uniphier_pro4_clk_init(void) #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif - writel(tmp, SC_RSTCTRL); - readl(SC_RSTCTRL); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL); + readl(sc_base + SC_RSTCTRL); /* dummy read */ #ifdef CONFIG_USB_DWC3_UNIPHIER - tmp = readl(SC_RSTCTRL2); + tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1; - writel(tmp, SC_RSTCTRL2); - readl(SC_RSTCTRL2); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL2); + readl(sc_base + SC_RSTCTRL2); /* dummy read */ #endif /* provide clocks */ - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); #ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; @@ -42,6 +42,6 @@ void uniphier_pro4_clk_init(void) #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif - writel(tmp, SC_CLKCTRL); - readl(SC_CLKCTRL); /* dummy read */ + writel(tmp, sc_base + SC_CLKCTRL); + readl(sc_base + SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/clk/clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 338d73d070..874964b2d5 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c @@ -13,25 +13,25 @@ void uniphier_pro5_clk_init(void) u32 tmp; /* deassert reset */ - tmp = readl(SC_RSTCTRL); + tmp = readl(sc_base + SC_RSTCTRL); #ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif - writel(tmp, SC_RSTCTRL); - readl(SC_RSTCTRL); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL); + readl(sc_base + SC_RSTCTRL); /* dummy read */ #ifdef CONFIG_USB_DWC3_UNIPHIER - tmp = readl(SC_RSTCTRL2); + tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; - writel(tmp, SC_RSTCTRL2); - readl(SC_RSTCTRL2); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL2); + readl(sc_base + SC_RSTCTRL2); /* dummy read */ #endif /* provide clocks */ - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); #ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; @@ -39,6 +39,6 @@ void uniphier_pro5_clk_init(void) #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif - writel(tmp, SC_CLKCTRL); - readl(SC_CLKCTRL); /* dummy read */ + writel(tmp, sc_base + SC_CLKCTRL); + readl(sc_base + SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index afa12fa071..8cb4f87ae5 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -14,29 +14,29 @@ void uniphier_pxs2_clk_init(void) u32 tmp; /* deassert reset */ - tmp = readl(SC_RSTCTRL); + tmp = readl(sc_base + SC_RSTCTRL); #ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif - writel(tmp, SC_RSTCTRL); - readl(SC_RSTCTRL); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL); + readl(sc_base + SC_RSTCTRL); /* dummy read */ #ifdef CONFIG_USB_DWC3_UNIPHIER - tmp = readl(SC_RSTCTRL2); + tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; - writel(tmp, SC_RSTCTRL2); - readl(SC_RSTCTRL2); /* dummy read */ + writel(tmp, sc_base + SC_RSTCTRL2); + readl(sc_base + SC_RSTCTRL2); /* dummy read */ - tmp = readl(SC_RSTCTRL6); + tmp = readl(sc_base + SC_RSTCTRL6); tmp |= 0x37; - writel(tmp, SC_RSTCTRL6); + writel(tmp, sc_base + SC_RSTCTRL6); #endif /* provide clocks */ - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); #ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; @@ -44,6 +44,6 @@ void uniphier_pxs2_clk_init(void) #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif - writel(tmp, SC_CLKCTRL); - readl(SC_CLKCTRL); /* dummy read */ + writel(tmp, sc_base + SC_CLKCTRL); + readl(sc_base + SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/clk/clk-pxs3.c b/arch/arm/mach-uniphier/clk/clk-pxs3.c index 73824e9ace..33b9c5b73d 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs3.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs3.c @@ -15,13 +15,13 @@ void uniphier_pxs3_clk_init(void) { u32 tmp; - tmp = readl(SC_RSTCTRL6); + tmp = readl(sc_base + SC_RSTCTRL6); tmp |= BIT(8); /* Mali */ - writel(tmp, SC_RSTCTRL6); + writel(tmp, sc_base + SC_RSTCTRL6); - tmp = readl(SC_CLKCTRL6); + tmp = readl(sc_base + SC_CLKCTRL6); tmp |= BIT(8); /* Mali */ - writel(tmp, SC_CLKCTRL6); + writel(tmp, sc_base + SC_CLKCTRL6); /* TODO: use "mmc-pwrseq-emmc" */ writel(1, SDCTRL_EMMC_HW_RESET); diff --git a/arch/arm/mach-uniphier/clk/dpll-ld4.c b/arch/arm/mach-uniphier/clk/dpll-ld4.c index 4b9ec075a8..72fe8db8dd 100644 --- a/arch/arm/mach-uniphier/clk/dpll-ld4.c +++ b/arch/arm/mach-uniphier/clk/dpll-ld4.c @@ -23,7 +23,7 @@ int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd) * Set 0xc(1600MHz)/0xd(1333MHz)/0xe(1066MHz) * to FOUT (DPLLCTRL.bit[29:20]) */ - tmp = readl(SC_DPLLCTRL); + tmp = readl(sc_base + SC_DPLLCTRL); tmp &= ~0x000f0000; switch (dram_freq) { case 1333: @@ -42,11 +42,11 @@ int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd) #else tmp |= SC_DPLLCTRL_SSC_RATE; #endif - writel(tmp, SC_DPLLCTRL); + writel(tmp, sc_base + SC_DPLLCTRL); - tmp = readl(SC_DPLLCTRL2); + tmp = readl(sc_base + SC_DPLLCTRL2); tmp |= SC_DPLLCTRL2_NRSTDS; - writel(tmp, SC_DPLLCTRL2); + writel(tmp, sc_base + SC_DPLLCTRL2); /* Wait 500 usec until dpll gets stable */ udelay(500); diff --git a/arch/arm/mach-uniphier/clk/dpll-pro4.c b/arch/arm/mach-uniphier/clk/dpll-pro4.c index 29659464b5..6259495484 100644 --- a/arch/arm/mach-uniphier/clk/dpll-pro4.c +++ b/arch/arm/mach-uniphier/clk/dpll-pro4.c @@ -23,7 +23,7 @@ int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd) * Set 0xc(1600MHz)/0xd(1333MHz)/0xe(1066MHz) * to FOUT ( DPLLCTRL.bit[29:20] ) */ - tmp = readl(SC_DPLLCTRL); + tmp = readl(sc_base + SC_DPLLCTRL); tmp &= ~(0x000f0000); switch (dram_freq) { case 1333: @@ -46,11 +46,11 @@ int uniphier_pro4_dpll_init(const struct uniphier_board_data *bd) #else tmp |= 0x00008000; #endif - writel(tmp, SC_DPLLCTRL); + writel(tmp, sc_base + SC_DPLLCTRL); - tmp = readl(SC_DPLLCTRL2); + tmp = readl(sc_base + SC_DPLLCTRL2); tmp |= SC_DPLLCTRL2_NRSTDS; - writel(tmp, SC_DPLLCTRL2); + writel(tmp, sc_base + SC_DPLLCTRL2); /* Wait until dpll gets stable */ udelay(500); diff --git a/arch/arm/mach-uniphier/clk/dpll-sld8.c b/arch/arm/mach-uniphier/clk/dpll-sld8.c index 1d7b752198..1ac52d11f3 100644 --- a/arch/arm/mach-uniphier/clk/dpll-sld8.c +++ b/arch/arm/mach-uniphier/clk/dpll-sld8.c @@ -22,10 +22,10 @@ int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd) * [4] ICPD_TEST 0x1 * [3:0] ICPD 0xb */ - tmp = readl(SC_DPLLCTRL3); + tmp = readl(sc_base + SC_DPLLCTRL3); tmp &= ~0x00ff0717; tmp |= 0x00d0061b; - writel(tmp, SC_DPLLCTRL3); + writel(tmp, sc_base + SC_DPLLCTRL3); /* * Set DPLL SSC parameters for DPLLCTRL @@ -33,14 +33,14 @@ int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd) * [29:20] SSC_UPCNT 132 (0x084) 132 (0x084) * [14:0] SSC_dK 6335(0x18bf) 12710(0x31a6) */ - tmp = readl(SC_DPLLCTRL); + tmp = readl(sc_base + SC_DPLLCTRL); tmp &= ~0x3ff07fff; #ifdef DPLL_SSC_RATE_1PER tmp |= 0x084018bf; #else tmp |= 0x084031a6; #endif - writel(tmp, SC_DPLLCTRL); + writel(tmp, sc_base + SC_DPLLCTRL); /* * Set DPLL SSC parameters for DPLLCTRL2 @@ -49,10 +49,10 @@ int uniphier_sld8_dpll_init(const struct uniphier_board_data *bd) * [26:20] SSC_M 79 (0x4f) * [19:0] SSC_K 964689 (0xeb851) */ - tmp = readl(SC_DPLLCTRL2); + tmp = readl(sc_base + SC_DPLLCTRL2); tmp &= ~0xefffffff; tmp |= 0x0cfeb851; - writel(tmp, SC_DPLLCTRL2); + writel(tmp, sc_base + SC_DPLLCTRL2); /* Wait 500 usec until dpll gets stable */ udelay(500); diff --git a/arch/arm/mach-uniphier/clk/dpll-tail.c b/arch/arm/mach-uniphier/clk/dpll-tail.c index 7f434f6696..6ba5a36727 100644 --- a/arch/arm/mach-uniphier/clk/dpll-tail.c +++ b/arch/arm/mach-uniphier/clk/dpll-tail.c @@ -14,7 +14,7 @@ void uniphier_ld4_dpll_ssc_en(void) { u32 tmp; - tmp = readl(SC_DPLLCTRL); + tmp = readl(sc_base + SC_DPLLCTRL); tmp |= SC_DPLLCTRL_SSC_EN; - writel(tmp, SC_DPLLCTRL); + writel(tmp, sc_base + SC_DPLLCTRL); } diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c index 67b8ee7c3e..ea96d739c5 100644 --- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c +++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c @@ -12,6 +12,7 @@ #include <linux/io.h> #include <linux/sizes.h> +#include "../sc64-regs.h" #include "pll.h" /* PLL type: SSC */ @@ -31,13 +32,9 @@ int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq, unsigned int ssc_rate, unsigned int divn) { - void __iomem *base; + void __iomem *base = sc_base + reg_base; u32 tmp; - base = ioremap(reg_base, SZ_16); - if (!base) - return -ENOMEM; - if (freq != UNIPHIER_PLL_FREQ_DEFAULT) { tmp = readl(base); /* SSCPLLCTRL */ tmp &= ~SC_PLLCTRL_SSC_DK_MASK; @@ -60,57 +57,39 @@ int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq, tmp |= SC_PLLCTRL2_NRSTDS; writel(tmp, base + 4); - iounmap(base); - return 0; } int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base) { - void __iomem *base; + void __iomem *base = sc_base + reg_base; u32 tmp; - base = ioremap(reg_base, SZ_16); - if (!base) - return -ENOMEM; - tmp = readl(base); /* SSCPLLCTRL */ tmp |= SC_PLLCTRL_SSC_EN; writel(tmp, base); - iounmap(base); - return 0; } int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi) { - void __iomem *base; + void __iomem *base = sc_base + reg_base; u32 tmp; - base = ioremap(reg_base, SZ_16); - if (!base) - return -ENOMEM; - tmp = readl(base + 8); /* SSCPLLCTRL3 */ tmp &= ~SC_PLLCTRL3_REGI_MASK; tmp |= FIELD_PREP(SC_PLLCTRL3_REGI_MASK, regi); writel(tmp, base + 8); - iounmap(base); - return 0; } int uniphier_ld20_vpll27_init(unsigned long reg_base) { - void __iomem *base; + void __iomem *base = sc_base + reg_base; u32 tmp; - base = ioremap(reg_base, SZ_16); - if (!base) - return -ENOMEM; - tmp = readl(base); /* VPLL27CTRL */ tmp |= SC_VPLL27CTRL_WP; /* write protect off */ writel(tmp, base); @@ -123,25 +102,17 @@ int uniphier_ld20_vpll27_init(unsigned long reg_base) tmp &= ~SC_VPLL27CTRL_WP; /* write protect on */ writel(tmp, base); - iounmap(base); - return 0; } int uniphier_ld20_dspll_init(unsigned long reg_base) { - void __iomem *base; + void __iomem *base = sc_base + reg_base; u32 tmp; - base = ioremap(reg_base, SZ_16); - if (!base) - return -ENOMEM; - tmp = readl(base + 4); /* DSPLLCTRL2 */ tmp |= SC_DSPLLCTRL2_K_LD; writel(tmp, base + 4); - iounmap(base); - return 0; } diff --git a/arch/arm/mach-uniphier/clk/pll-ld11.c b/arch/arm/mach-uniphier/clk/pll-ld11.c index fd724f3e8c..7f07e3e92b 100644 --- a/arch/arm/mach-uniphier/clk/pll-ld11.c +++ b/arch/arm/mach-uniphier/clk/pll-ld11.c @@ -11,15 +11,15 @@ #include "pll.h" /* PLL type: SSC */ -#define SC_CPLLCTRL (SC_BASE_ADDR | 0x1400) /* CPU/ARM */ -#define SC_SPLLCTRL (SC_BASE_ADDR | 0x1410) /* misc */ -#define SC_MPLLCTRL (SC_BASE_ADDR | 0x1430) /* DSP */ -#define SC_VSPLLCTRL (SC_BASE_ADDR | 0x1440) /* Video codec, VPE etc. */ -#define SC_DPLLCTRL (SC_BASE_ADDR | 0x1460) /* DDR memory */ +#define SC_CPLLCTRL 0x1400 /* CPU/ARM */ +#define SC_SPLLCTRL 0x1410 /* misc */ +#define SC_MPLLCTRL 0x1430 /* DSP */ +#define SC_VSPLLCTRL 0x1440 /* Video codec, VPE etc. */ +#define SC_DPLLCTRL 0x1460 /* DDR memory */ /* PLL type: VPLL27 */ -#define SC_VPLL27FCTRL (SC_BASE_ADDR | 0x1500) -#define SC_VPLL27ACTRL (SC_BASE_ADDR | 0x1520) +#define SC_VPLL27FCTRL 0x1500 +#define SC_VPLL27ACTRL 0x1520 void uniphier_ld11_pll_init(void) { @@ -40,6 +40,6 @@ void uniphier_ld11_pll_init(void) uniphier_ld20_vpll27_init(SC_VPLL27FCTRL); uniphier_ld20_vpll27_init(SC_VPLL27ACTRL); - writel(0, SC_CA53_GEARSET); /* Gear0: CPLL/2 */ - writel(SC_CA_GEARUPD, SC_CA53_GEARUPD); + writel(0, sc_base + SC_CA53_GEARSET); /* Gear0: CPLL/2 */ + writel(SC_CA_GEARUPD, sc_base + SC_CA53_GEARUPD); } diff --git a/arch/arm/mach-uniphier/clk/pll-ld20.c b/arch/arm/mach-uniphier/clk/pll-ld20.c index 682bd1e0c1..04b3312a2a 100644 --- a/arch/arm/mach-uniphier/clk/pll-ld20.c +++ b/arch/arm/mach-uniphier/clk/pll-ld20.c @@ -11,23 +11,23 @@ #include "pll.h" /* PLL type: SSC */ -#define SC_CPLLCTRL (SC_BASE_ADDR | 0x1400) /* CPU/ARM */ -#define SC_SPLLCTRL (SC_BASE_ADDR | 0x1410) /* misc */ -#define SC_SPLL2CTRL (SC_BASE_ADDR | 0x1420) /* DSP */ -#define SC_MPLLCTRL (SC_BASE_ADDR | 0x1430) /* Video codec */ -#define SC_VPPLLCTRL (SC_BASE_ADDR | 0x1440) /* VPE etc. */ -#define SC_GPPLLCTRL (SC_BASE_ADDR | 0x1450) /* GPU/Mali */ -#define SC_DPLL0CTRL (SC_BASE_ADDR | 0x1460) /* DDR memory 0 */ -#define SC_DPLL1CTRL (SC_BASE_ADDR | 0x1470) /* DDR memory 1 */ -#define SC_DPLL2CTRL (SC_BASE_ADDR | 0x1480) /* DDR memory 2 */ +#define SC_CPLLCTRL 0x1400 /* CPU/ARM */ +#define SC_SPLLCTRL 0x1410 /* misc */ +#define SC_SPLL2CTRL 0x1420 /* DSP */ +#define SC_MPLLCTRL 0x1430 /* Video codec */ +#define SC_VPPLLCTRL 0x1440 /* VPE etc. */ +#define SC_GPPLLCTRL 0x1450 /* GPU/Mali */ +#define SC_DPLL0CTRL 0x1460 /* DDR memory 0 */ +#define SC_DPLL1CTRL 0x1470 /* DDR memory 1 */ +#define SC_DPLL2CTRL 0x1480 /* DDR memory 2 */ /* PLL type: VPLL27 */ -#define SC_VPLL27FCTRL (SC_BASE_ADDR | 0x1500) -#define SC_VPLL27ACTRL (SC_BASE_ADDR | 0x1520) +#define SC_VPLL27FCTRL 0x1500 +#define SC_VPLL27ACTRL 0x1520 /* PLL type: DSPLL */ -#define SC_VPLL8KCTRL (SC_BASE_ADDR | 0x1540) -#define SC_A2PLLCTRL (SC_BASE_ADDR | 0x15C0) +#define SC_VPLL8KCTRL 0x1540 +#define SC_A2PLLCTRL 0x15C0 void uniphier_ld20_pll_init(void) { diff --git a/arch/arm/mach-uniphier/clk/pll-ld4.c b/arch/arm/mach-uniphier/clk/pll-ld4.c index 6a145a3baa..c66031bdd0 100644 --- a/arch/arm/mach-uniphier/clk/pll-ld4.c +++ b/arch/arm/mach-uniphier/clk/pll-ld4.c @@ -16,14 +16,14 @@ static void upll_init(void) { u32 tmp, clk_mode_upll, clk_mode_axosel; - tmp = readl(SG_PINMON0); + tmp = readl(sg_base + SG_PINMON0); clk_mode_upll = tmp & SG_PINMON0_CLK_MODE_UPLLSRC_MASK; clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK; /* set 0 to SNRT(UPLLCTRL.bit28) and K_LD(UPLLCTRL.bit[27]) */ - tmp = readl(SC_UPLLCTRL); + tmp = readl(sc_base + SC_UPLLCTRL); tmp &= ~0x18000000; - writel(tmp, SC_UPLLCTRL); + writel(tmp, sc_base + SC_UPLLCTRL); if (clk_mode_upll == SG_PINMON0_CLK_MODE_UPLLSRC_DEFAULT) { if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U || @@ -38,110 +38,110 @@ static void upll_init(void) } } - writel(tmp, SC_UPLLCTRL); + writel(tmp, sc_base + SC_UPLLCTRL); /* set 1 to K_LD(UPLLCTRL.bit[27]) */ tmp |= 0x08000000; - writel(tmp, SC_UPLLCTRL); + writel(tmp, sc_base + SC_UPLLCTRL); /* wait 10 usec */ udelay(10); /* set 1 to SNRT(UPLLCTRL.bit[28]) */ tmp |= 0x10000000; - writel(tmp, SC_UPLLCTRL); + writel(tmp, sc_base + SC_UPLLCTRL); } static void vpll_init(void) { u32 tmp, clk_mode_axosel; - tmp = readl(SG_PINMON0); + tmp = readl(sg_base + SG_PINMON0); clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK; /* set 1 to VPLA27WP and VPLA27WP */ - tmp = readl(SC_VPLL27ACTRL); + tmp = readl(sc_base + SC_VPLL27ACTRL); tmp |= 0x00000001; - writel(tmp, SC_VPLL27ACTRL); - tmp = readl(SC_VPLL27BCTRL); + writel(tmp, sc_base + SC_VPLL27ACTRL); + tmp = readl(sc_base + SC_VPLL27BCTRL); tmp |= 0x00000001; - writel(tmp, SC_VPLL27BCTRL); + writel(tmp, sc_base + SC_VPLL27BCTRL); /* Set 0 to VPLA_K_LD and VPLB_K_LD */ - tmp = readl(SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27ACTRL3); tmp &= ~0x10000000; - writel(tmp, SC_VPLL27ACTRL3); - tmp = readl(SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27BCTRL3); tmp &= ~0x10000000; - writel(tmp, SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27BCTRL3); /* Set 0 to VPLA_SNRST and VPLB_SNRST */ - tmp = readl(SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27ACTRL2); tmp &= ~0x10000000; - writel(tmp, SC_VPLL27ACTRL2); - tmp = readl(SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27BCTRL2); tmp &= ~0x10000000; - writel(tmp, SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27BCTRL2); /* Set 0x20 to VPLA_SNRST and VPLB_SNRST */ - tmp = readl(SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27ACTRL2); tmp &= ~0x0000007f; tmp |= 0x00000020; - writel(tmp, SC_VPLL27ACTRL2); - tmp = readl(SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27BCTRL2); tmp &= ~0x0000007f; tmp |= 0x00000020; - writel(tmp, SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27BCTRL2); if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U || clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_A) { /* AXO: 25MHz */ - tmp = readl(SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27ACTRL3); tmp &= ~0x000fffff; tmp |= 0x00066664; - writel(tmp, SC_VPLL27ACTRL3); - tmp = readl(SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27BCTRL3); tmp &= ~0x000fffff; tmp |= 0x00066664; - writel(tmp, SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27BCTRL3); } else { /* AXO: default 24.576MHz */ - tmp = readl(SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27ACTRL3); tmp &= ~0x000fffff; tmp |= 0x000f5800; - writel(tmp, SC_VPLL27ACTRL3); - tmp = readl(SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27BCTRL3); tmp &= ~0x000fffff; tmp |= 0x000f5800; - writel(tmp, SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27BCTRL3); } /* Set 1 to VPLA_K_LD and VPLB_K_LD */ - tmp = readl(SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27ACTRL3); tmp |= 0x10000000; - writel(tmp, SC_VPLL27ACTRL3); - tmp = readl(SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27BCTRL3); tmp |= 0x10000000; - writel(tmp, SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27BCTRL3); /* wait 10 usec */ udelay(10); /* Set 0 to VPLA_SNRST and VPLB_SNRST */ - tmp = readl(SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27ACTRL2); tmp |= 0x10000000; - writel(tmp, SC_VPLL27ACTRL2); - tmp = readl(SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27BCTRL2); tmp |= 0x10000000; - writel(tmp, SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27BCTRL2); /* set 0 to VPLA27WP and VPLA27WP */ - tmp = readl(SC_VPLL27ACTRL); + tmp = readl(sc_base + SC_VPLL27ACTRL); tmp &= ~0x00000001; - writel(tmp, SC_VPLL27ACTRL); - tmp = readl(SC_VPLL27BCTRL); + writel(tmp, sc_base + SC_VPLL27ACTRL); + tmp = readl(sc_base + SC_VPLL27BCTRL); tmp |= ~0x00000001; - writel(tmp, SC_VPLL27BCTRL); + writel(tmp, sc_base + SC_VPLL27BCTRL); } void uniphier_ld4_pll_init(void) diff --git a/arch/arm/mach-uniphier/clk/pll-pro4.c b/arch/arm/mach-uniphier/clk/pll-pro4.c index 2ee2ed6bd6..b7dc3e261f 100644 --- a/arch/arm/mach-uniphier/clk/pll-pro4.c +++ b/arch/arm/mach-uniphier/clk/pll-pro4.c @@ -17,7 +17,7 @@ static void vpll_init(void) u32 tmp, clk_mode_axosel; /* Set VPLL27A & VPLL27B */ - tmp = readl(SG_PINMON0); + tmp = readl(sg_base + SG_PINMON0); clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK; /* 25MHz or 6.25MHz is default for Pro4R, no need to set VPLLA/B */ @@ -26,80 +26,80 @@ static void vpll_init(void) return; /* Disable write protect of VPLL27ACTRL[2-7]*, VPLL27BCTRL[2-8] */ - tmp = readl(SC_VPLL27ACTRL); + tmp = readl(sc_base + SC_VPLL27ACTRL); tmp |= 0x00000001; - writel(tmp, SC_VPLL27ACTRL); - tmp = readl(SC_VPLL27BCTRL); + writel(tmp, sc_base + SC_VPLL27ACTRL); + tmp = readl(sc_base + SC_VPLL27BCTRL); tmp |= 0x00000001; - writel(tmp, SC_VPLL27BCTRL); + writel(tmp, sc_base + SC_VPLL27BCTRL); /* Unset VPLA_K_LD and VPLB_K_LD bit */ - tmp = readl(SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27ACTRL3); tmp &= ~0x10000000; - writel(tmp, SC_VPLL27ACTRL3); - tmp = readl(SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27BCTRL3); tmp &= ~0x10000000; - writel(tmp, SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27BCTRL3); /* Set VPLA_M and VPLB_M to 0x20 */ - tmp = readl(SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27ACTRL2); tmp &= ~0x0000007f; tmp |= 0x00000020; - writel(tmp, SC_VPLL27ACTRL2); - tmp = readl(SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27BCTRL2); tmp &= ~0x0000007f; tmp |= 0x00000020; - writel(tmp, SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27BCTRL2); if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ || clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_6250KHZ) { /* Set VPLA_K and VPLB_K for AXO: 25MHz */ - tmp = readl(SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27ACTRL3); tmp &= ~0x000fffff; tmp |= 0x00066666; - writel(tmp, SC_VPLL27ACTRL3); - tmp = readl(SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27BCTRL3); tmp &= ~0x000fffff; tmp |= 0x00066666; - writel(tmp, SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27BCTRL3); } else { /* Set VPLA_K and VPLB_K for AXO: 24.576 MHz */ - tmp = readl(SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27ACTRL3); tmp &= ~0x000fffff; tmp |= 0x000f5800; - writel(tmp, SC_VPLL27ACTRL3); - tmp = readl(SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27BCTRL3); tmp &= ~0x000fffff; tmp |= 0x000f5800; - writel(tmp, SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27BCTRL3); } /* wait 1 usec */ udelay(1); /* Set VPLA_K_LD and VPLB_K_LD to load K parameters */ - tmp = readl(SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27ACTRL3); tmp |= 0x10000000; - writel(tmp, SC_VPLL27ACTRL3); - tmp = readl(SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27ACTRL3); + tmp = readl(sc_base + SC_VPLL27BCTRL3); tmp |= 0x10000000; - writel(tmp, SC_VPLL27BCTRL3); + writel(tmp, sc_base + SC_VPLL27BCTRL3); /* Unset VPLA_SNRST and VPLB_SNRST bit */ - tmp = readl(SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27ACTRL2); tmp |= 0x10000000; - writel(tmp, SC_VPLL27ACTRL2); - tmp = readl(SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27ACTRL2); + tmp = readl(sc_base + SC_VPLL27BCTRL2); tmp |= 0x10000000; - writel(tmp, SC_VPLL27BCTRL2); + writel(tmp, sc_base + SC_VPLL27BCTRL2); /* Enable write protect of VPLL27ACTRL[2-7]*, VPLL27BCTRL[2-8] */ - tmp = readl(SC_VPLL27ACTRL); + tmp = readl(sc_base + SC_VPLL27ACTRL); tmp &= ~0x00000001; - writel(tmp, SC_VPLL27ACTRL); - tmp = readl(SC_VPLL27BCTRL); + writel(tmp, sc_base + SC_VPLL27ACTRL); + tmp = readl(sc_base + SC_VPLL27BCTRL); tmp &= ~0x00000001; - writel(tmp, SC_VPLL27BCTRL); + writel(tmp, sc_base + SC_VPLL27BCTRL); } void uniphier_pro4_pll_init(void) diff --git a/arch/arm/mach-uniphier/clk/pll-pxs3.c b/arch/arm/mach-uniphier/clk/pll-pxs3.c index 5a1b1d25ac..278f530ea9 100644 --- a/arch/arm/mach-uniphier/clk/pll-pxs3.c +++ b/arch/arm/mach-uniphier/clk/pll-pxs3.c @@ -10,25 +10,25 @@ #include "pll.h" /* PLL type: SSC */ -#define SC_CPLLCTRL (SC_BASE_ADDR | 0x1400) /* CPU/ARM */ -#define SC_SPLLCTRL (SC_BASE_ADDR | 0x1410) /* misc */ -#define SC_SPLL2CTRL (SC_BASE_ADDR | 0x1420) /* DSP */ -#define SC_VPPLLCTRL (SC_BASE_ADDR | 0x1430) /* VPE */ -#define SC_VGPLLCTRL (SC_BASE_ADDR | 0x1440) -#define SC_DECPLLCTRL (SC_BASE_ADDR | 0x1450) -#define SC_ENCPLLCTRL (SC_BASE_ADDR | 0x1460) -#define SC_PXFPLLCTRL (SC_BASE_ADDR | 0x1470) -#define SC_DPLL0CTRL (SC_BASE_ADDR | 0x1480) /* DDR memory 0 */ -#define SC_DPLL1CTRL (SC_BASE_ADDR | 0x1490) /* DDR memory 1 */ -#define SC_DPLL2CTRL (SC_BASE_ADDR | 0x14a0) /* DDR memory 2 */ -#define SC_VSPLLCTRL (SC_BASE_ADDR | 0x14c0) +#define SC_CPLLCTRL 0x1400 /* CPU/ARM */ +#define SC_SPLLCTRL 0x1410 /* misc */ +#define SC_SPLL2CTRL 0x1420 /* DSP */ +#define SC_VPPLLCTRL 0x1430 /* VPE */ +#define SC_VGPLLCTRL 0x1440 +#define SC_DECPLLCTRL 0x1450 +#define SC_ENCPLLCTRL 0x1460 +#define SC_PXFPLLCTRL 0x1470 +#define SC_DPLL0CTRL 0x1480 /* DDR memory 0 */ +#define SC_DPLL1CTRL 0x1490 /* DDR memory 1 */ +#define SC_DPLL2CTRL 0x14a0 /* DDR memory 2 */ +#define SC_VSPLLCTRL 0x14c0 /* PLL type: VPLL27 */ -#define SC_VPLL27FCTRL (SC_BASE_ADDR | 0x1500) -#define SC_VPLL27ACTRL (SC_BASE_ADDR | 0x1520) +#define SC_VPLL27FCTRL 0x1500 +#define SC_VPLL27ACTRL 0x1520 /* PLL type: DSPLL */ -#define SC_VPLL8KCTRL (SC_BASE_ADDR | 0x1540) +#define SC_VPLL8KCTRL 0x1540 void uniphier_pxs3_pll_init(void) { diff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c index 9f5f5051b3..6a7b203a44 100644 --- a/arch/arm/mach-uniphier/cpu-info.c +++ b/arch/arm/mach-uniphier/cpu-info.c @@ -10,11 +10,17 @@ #include <linux/io.h> #include <linux/printk.h> +#include "base-address.h" #include "soc-info.h" int print_cpuinfo(void) { unsigned int id, model, rev, required_model = 1, required_rev = 1; + int ret; + + ret = uniphier_base_address_init(); + if (ret) + return ret; id = uniphier_get_soc_id(); model = uniphier_get_soc_model(); diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c index 22d2caa109..f64ff39c9e 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c @@ -22,9 +22,9 @@ unsigned int uniphier_ld6b_debug_uart_init(void) sg_set_pinsel(115, 0, 8, 4); /* TXD1 -> TXD1 */ sg_set_pinsel(113, 2, 8, 4); /* SBO0 -> TXD2 */ - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_PERI; - writel(tmp, SC_CLKCTRL); + writel(tmp, sc_base + SC_CLKCTRL); return DIV_ROUND_CLOSEST(UNIPHIER_LD6B_UART_CLK, 16 * CONFIG_BAUDRATE); } diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c index 0d6629918a..79c6c101e2 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c @@ -20,11 +20,11 @@ unsigned int uniphier_pro4_debug_uart_init(void) sg_set_iectrl(0); sg_set_pinsel(128, 0, 4, 8); /* TXD0 -> TXD0 */ - writel(1, SG_LOADPINCTRL); + writel(1, sg_base + SG_LOADPINCTRL); - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_PERI; - writel(tmp, SC_CLKCTRL); + writel(tmp, sc_base + SC_CLKCTRL); return DIV_ROUND_CLOSEST(UNIPHIER_PRO4_UART_CLK, 16 * CONFIG_BAUDRATE); } diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c index 1a0a942f2d..ef3b383ee4 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c @@ -23,11 +23,11 @@ unsigned int uniphier_pro5_debug_uart_init(void) sg_set_pinsel(51, 0, 4, 8); /* TXD2 -> TXD2 */ sg_set_pinsel(53, 0, 4, 8); /* TXD3 -> TXD3 */ - writel(1, SG_LOADPINCTRL); + writel(1, sg_base + SG_LOADPINCTRL); - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_PERI; - writel(tmp, SC_CLKCTRL); + writel(tmp, sc_base + SC_CLKCTRL); return DIV_ROUND_CLOSEST(UNIPHIER_PRO5_UART_CLK, 16 * CONFIG_BAUDRATE); } diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c index 5d50c4fa24..ee8caad1d4 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c @@ -23,9 +23,9 @@ unsigned int uniphier_pxs2_debug_uart_init(void) sg_set_pinsel(113, 8, 8, 4); /* TXD2 -> TXD2 */ sg_set_pinsel(219, 8, 8, 4); /* TXD3 -> TXD3 */ - tmp = readl(SC_CLKCTRL); + tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_PERI; - writel(tmp, SC_CLKCTRL); + writel(tmp, sc_base + SC_CLKCTRL); return DIV_ROUND_CLOSEST(UNIPHIER_PXS2_UART_CLK, 16 * CONFIG_BAUDRATE); } diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c index bc96b2e7be..a70ce59acc 100644 --- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c @@ -32,7 +32,8 @@ void sg_set_pinsel(unsigned int pin, unsigned int muxval, unsigned int mux_bits, unsigned int reg_stride) { unsigned int shift = pin * mux_bits % 32; - unsigned long reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride; + void __iomem *reg = sg_base + SG_PINCTRL_BASE + + pin * mux_bits / 32 * reg_stride; u32 mask = (1U << mux_bits) - 1; u32 tmp; @@ -45,7 +46,7 @@ void sg_set_pinsel(unsigned int pin, unsigned int muxval, void sg_set_iectrl(unsigned int pin) { unsigned int bit = pin % 32; - unsigned long reg = SG_IECTRL + pin / 32 * 4; + void __iomem *reg = sg_base + SG_IECTRL + pin / 32 * 4; u32 tmp; tmp = readl(reg); diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index fa4b3e386b..13821a9288 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -13,82 +13,27 @@ #include <linux/sizes.h> #include <asm/global_data.h> +#include "init.h" #include "sg-regs.h" #include "soc-info.h" DECLARE_GLOBAL_DATA_PTR; -struct uniphier_memif_data { - unsigned int soc_id; - unsigned long sparse_ch1_base; - int have_ch2; -}; - -static const struct uniphier_memif_data uniphier_memif_data[] = { - { - .soc_id = UNIPHIER_LD4_ID, - .sparse_ch1_base = 0xc0000000, - }, - { - .soc_id = UNIPHIER_PRO4_ID, - .sparse_ch1_base = 0xa0000000, - }, - { - .soc_id = UNIPHIER_SLD8_ID, - .sparse_ch1_base = 0xc0000000, - }, - { - .soc_id = UNIPHIER_PRO5_ID, - .sparse_ch1_base = 0xc0000000, - }, - { - .soc_id = UNIPHIER_PXS2_ID, - .sparse_ch1_base = 0xc0000000, - .have_ch2 = 1, - }, - { - .soc_id = UNIPHIER_LD6B_ID, - .sparse_ch1_base = 0xc0000000, - .have_ch2 = 1, - }, - { - .soc_id = UNIPHIER_LD11_ID, - .sparse_ch1_base = 0xc0000000, - }, - { - .soc_id = UNIPHIER_LD20_ID, - .sparse_ch1_base = 0xc0000000, - .have_ch2 = 1, - }, - { - .soc_id = UNIPHIER_PXS3_ID, - .sparse_ch1_base = 0xc0000000, - .have_ch2 = 1, - }, -}; -UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_memif_data, uniphier_memif_data) - struct uniphier_dram_map { unsigned long base; unsigned long size; }; -static int uniphier_memconf_decode(struct uniphier_dram_map *dram_map) +static int uniphier_memconf_decode(struct uniphier_dram_map *dram_map, + unsigned long sparse_ch1_base, bool have_ch2) { - const struct uniphier_memif_data *data; unsigned long size; u32 val; - data = uniphier_get_memif_data(); - if (!data) { - pr_err("unsupported SoC\n"); - return -EINVAL; - } - - val = readl(SG_MEMCONF); + val = readl(sg_base + SG_MEMCONF); /* set up ch0 */ - dram_map[0].base = CONFIG_SYS_SDRAM_BASE; + dram_map[0].base = 0x80000000; switch (val & SG_MEMCONF_CH0_SZ_MASK) { case SG_MEMCONF_CH0_SZ_64M: @@ -120,14 +65,14 @@ static int uniphier_memconf_decode(struct uniphier_dram_map *dram_map) dram_map[1].base = dram_map[0].base + size; if (val & SG_MEMCONF_SPARSEMEM) { - if (dram_map[1].base > data->sparse_ch1_base) { + if (dram_map[1].base > sparse_ch1_base) { pr_warn("Sparse mem is enabled, but ch0 and ch1 overlap\n"); pr_warn("Only ch0 is available\n"); dram_map[1].base = 0; return 0; } - dram_map[1].base = data->sparse_ch1_base; + dram_map[1].base = sparse_ch1_base; } switch (val & SG_MEMCONF_CH1_SZ_MASK) { @@ -156,7 +101,7 @@ static int uniphier_memconf_decode(struct uniphier_dram_map *dram_map) dram_map[1].size = size; - if (!data->have_ch2 || val & SG_MEMCONF_CH2_DISABLE) + if (!have_ch2 || val & SG_MEMCONF_CH2_DISABLE) return 0; /* set up ch2 */ @@ -191,14 +136,90 @@ static int uniphier_memconf_decode(struct uniphier_dram_map *dram_map) return 0; } +static int uniphier_ld4_dram_map_get(struct uniphier_dram_map dram_map[]) +{ + return uniphier_memconf_decode(dram_map, 0xc0000000, false); +} + +static int uniphier_pro4_dram_map_get(struct uniphier_dram_map dram_map[]) +{ + return uniphier_memconf_decode(dram_map, 0xa0000000, false); +} + +static int uniphier_pxs2_dram_map_get(struct uniphier_dram_map dram_map[]) +{ + return uniphier_memconf_decode(dram_map, 0xc0000000, true); +} + +struct uniphier_dram_init_data { + unsigned int soc_id; + int (*dram_map_get)(struct uniphier_dram_map dram_map[]); +}; + +static const struct uniphier_dram_init_data uniphier_dram_init_data[] = { + { + .soc_id = UNIPHIER_LD4_ID, + .dram_map_get = uniphier_ld4_dram_map_get, + }, + { + .soc_id = UNIPHIER_PRO4_ID, + .dram_map_get = uniphier_pro4_dram_map_get, + }, + { + .soc_id = UNIPHIER_SLD8_ID, + .dram_map_get = uniphier_ld4_dram_map_get, + }, + { + .soc_id = UNIPHIER_PRO5_ID, + .dram_map_get = uniphier_ld4_dram_map_get, + }, + { + .soc_id = UNIPHIER_PXS2_ID, + .dram_map_get = uniphier_pxs2_dram_map_get, + }, + { + .soc_id = UNIPHIER_LD6B_ID, + .dram_map_get = uniphier_pxs2_dram_map_get, + }, + { + .soc_id = UNIPHIER_LD11_ID, + .dram_map_get = uniphier_ld4_dram_map_get, + }, + { + .soc_id = UNIPHIER_LD20_ID, + .dram_map_get = uniphier_pxs2_dram_map_get, + }, + { + .soc_id = UNIPHIER_PXS3_ID, + .dram_map_get = uniphier_pxs2_dram_map_get, + }, +}; +UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_dram_init_data, + uniphier_dram_init_data) + +static int uniphier_dram_map_get(struct uniphier_dram_map *dram_map) +{ + const struct uniphier_dram_init_data *data; + + data = uniphier_get_dram_init_data(); + if (!data) { + pr_err("unsupported SoC\n"); + return -ENOTSUPP; + } + + return data->dram_map_get(dram_map); +} + int dram_init(void) { struct uniphier_dram_map dram_map[3] = {}; + bool valid_bank_found = false; + unsigned long prev_top; int ret, i; gd->ram_size = 0; - ret = uniphier_memconf_decode(dram_map); + ret = uniphier_dram_map_get(dram_map); if (ret) return ret; @@ -206,15 +227,14 @@ int dram_init(void) unsigned long max_size; if (!dram_map[i].size) - break; + continue; /* * U-Boot relocates itself to the tail of the memory region, * but it does not expect sparse memory. We use the first * contiguous chunk here. */ - if (i > 0 && dram_map[i - 1].base + dram_map[i - 1].size < - dram_map[i].base) + if (valid_bank_found && prev_top < dram_map[i].base) break; /* @@ -234,6 +254,12 @@ int dram_init(void) } gd->ram_size += dram_map[i].size; + + if (!valid_bank_found) + gd->ram_base = dram_map[i].base; + + prev_top = dram_map[i].base + dram_map[i].size; + valid_bank_found = true; } /* @@ -249,17 +275,34 @@ int dram_init(void) int dram_init_banksize(void) { struct uniphier_dram_map dram_map[3] = {}; - int i; + unsigned long base, top; + bool valid_bank_found = false; + int ret, i; - uniphier_memconf_decode(dram_map); + ret = uniphier_dram_map_get(dram_map); + if (ret) + return ret; for (i = 0; i < ARRAY_SIZE(dram_map); i++) { - if (i >= ARRAY_SIZE(gd->bd->bi_dram)) - break; + if (i < ARRAY_SIZE(gd->bd->bi_dram)) { + gd->bd->bi_dram[i].start = dram_map[i].base; + gd->bd->bi_dram[i].size = dram_map[i].size; + } + + if (!dram_map[i].size) + continue; - gd->bd->bi_dram[i].start = dram_map[i].base; - gd->bd->bi_dram[i].size = dram_map[i].size; + if (!valid_bank_found) + base = dram_map[i].base; + top = dram_map[i].base + dram_map[i].size; + valid_bank_found = true; } + if (!valid_bank_found) + return -EINVAL; + + /* map all the DRAM regions */ + uniphier_mem_map_init(base, top - base); + return 0; } diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index c6b3f3656c..b37ab2fa50 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -102,5 +102,13 @@ unsigned int uniphier_boot_device_raw(void); int uniphier_have_internal_stm(void); int uniphier_boot_from_backend(void); int uniphier_pin_init(const char *pinconfig_name); +#ifdef CONFIG_ARM64 +void uniphier_mem_map_init(unsigned long dram_base, unsigned long dram_size); +#else +static inline void uniphier_mem_map_init(unsigned long dram_base, + unsigned long dram_size) +{ +} +#endif #endif /* __MACH_INIT_H */ diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c index 8105368df1..f69b489b76 100644 --- a/arch/arm/mach-uniphier/memconf.c +++ b/arch/arm/mach-uniphier/memconf.c @@ -140,7 +140,7 @@ static int __uniphier_memconf_init(const struct uniphier_board_data *bd, } out: - writel(val, SG_MEMCONF); + writel(val, sg_base + SG_MEMCONF); return 0; } diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c index 1be5685c6f..46879019fd 100644 --- a/arch/arm/mach-uniphier/micro-support-card.c +++ b/arch/arm/mach-uniphier/micro-support-card.c @@ -18,6 +18,25 @@ #define MICRO_SUPPORT_CARD_RESET ((MICRO_SUPPORT_CARD_BASE) + 0xd0034) #define MICRO_SUPPORT_CARD_REVISION ((MICRO_SUPPORT_CARD_BASE) + 0xd00E0) +static bool support_card_found; + +static void support_card_detect(void) +{ + DECLARE_GLOBAL_DATA_PTR; + const void *fdt = gd->fdt_blob; + int offset; + + offset = fdt_node_offset_by_compatible(fdt, 0, "smsc,lan9118"); + if (offset < 0) + return; + + offset = fdt_node_offset_by_compatible(fdt, 0, "ns16550a"); + if (offset < 0) + return; + + support_card_found = true; +} + /* * 0: reset deassert, 1: reset * @@ -51,6 +70,11 @@ static int support_card_show_revision(void) void support_card_init(void) { + support_card_detect(); + + if (!support_card_found) + return; + support_card_reset(); /* * After power on, we need to keep the LAN controller in reset state @@ -67,6 +91,9 @@ void support_card_init(void) int board_eth_init(bd_t *bis) { + if (!support_card_found) + return 0; + return smc911x_initialize(0, SMC911X_BASE); } #endif @@ -161,6 +188,9 @@ static void detect_num_flash_banks(void) void support_card_late_init(void) { + if (!support_card_found) + return; + detect_num_flash_banks(); } @@ -221,6 +251,9 @@ void led_puts(const char *s) int i; u32 val = 0; + if (!support_card_found) + return; + if (!s) return; diff --git a/arch/arm/mach-uniphier/reset.c b/arch/arm/mach-uniphier/reset.c index 28c95e2ce5..31685d0009 100644 --- a/arch/arm/mach-uniphier/reset.c +++ b/arch/arm/mach-uniphier/reset.c @@ -22,14 +22,14 @@ void __SECURE reset_cpu(unsigned long ignored) { u32 tmp; - writel(5, SC_IRQTIMSET); /* default value */ + writel(5, sc_base + SC_IRQTIMSET); /* default value */ - tmp = readl(SC_SLFRSTSEL); + tmp = readl(sc_base + SC_SLFRSTSEL); tmp &= ~0x3; /* mask [1:0] */ tmp |= 0x0; /* XRST reboot */ - writel(tmp, SC_SLFRSTSEL); + writel(tmp, sc_base + SC_SLFRSTSEL); - tmp = readl(SC_SLFRSTCTL); + tmp = readl(sc_base + SC_SLFRSTCTL); tmp |= 0x1; - writel(tmp, SC_SLFRSTCTL); + writel(tmp, sc_base + SC_SLFRSTCTL); } diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile index 912e05a725..6c698a3922 100644 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -1,5 +1,8 @@ # SPDX-License-Identifier: GPL-2.0+ +obj-y += sbc-boot.o + +ifndef CONFIG_SPL_BUILD obj-y += sbc.o obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-ld4.o @@ -9,3 +12,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += sbc-pxs2.o +endif diff --git a/arch/arm/mach-uniphier/sbc/sbc-boot.c b/arch/arm/mach-uniphier/sbc/sbc-boot.c new file mode 100644 index 0000000000..ec22b453e0 --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/sbc-boot.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (C) 2011-2014 Panasonic Corporation +// Copyright (C) 2015-2019 Socionext Inc. + +#include <linux/io.h> + +#include "sbc-regs.h" + +int uniphier_sbc_boot_is_swapped(void) +{ + return !(readl(SBBASE0) & SBBASE_BANK_ENABLE); +} diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld11.c b/arch/arm/mach-uniphier/sbc/sbc-ld11.c index 44d8a1e3bd..21972ac949 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-ld11.c +++ b/arch/arm/mach-uniphier/sbc/sbc-ld11.c @@ -12,6 +12,9 @@ void uniphier_ld11_sbc_init(void) { + if (!uniphier_sbc_is_enabled()) + return; + uniphier_sbc_init_savepin(); /* necessary for ROM boot ?? */ diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-ld4.c index d08b571e23..72e9743c8f 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-ld4.c +++ b/arch/arm/mach-uniphier/sbc/sbc-ld4.c @@ -13,6 +13,9 @@ void uniphier_ld4_sbc_init(void) { u32 tmp; + if (!uniphier_sbc_is_enabled()) + return; + uniphier_sbc_init_savepin(); /* system bus output enable */ diff --git a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c index 8c167ef069..3275f22ce9 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c +++ b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c @@ -10,6 +10,9 @@ void uniphier_pxs2_sbc_init(void) { + if (!uniphier_sbc_is_enabled()) + return; + uniphier_sbc_init_savepin(); /* necessary for ROM boot ?? */ diff --git a/arch/arm/mach-uniphier/sbc/sbc-regs.h b/arch/arm/mach-uniphier/sbc/sbc-regs.h index 853015acbc..1e9618653f 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-regs.h +++ b/arch/arm/mach-uniphier/sbc/sbc-regs.h @@ -76,12 +76,7 @@ #define PC0CTRL 0x598000c0 -#ifndef __ASSEMBLY__ -#include <linux/io.h> -static inline int boot_is_swapped(void) -{ - return !(readl(SBBASE0) & SBBASE_BANK_ENABLE); -} -#endif +int uniphier_sbc_boot_is_swapped(void); +int uniphier_sbc_is_enabled(void); #endif /* ARCH_SBC_REGS_H */ diff --git a/arch/arm/mach-uniphier/sbc/sbc.c b/arch/arm/mach-uniphier/sbc/sbc.c index df01e5c01d..af8d6f4f9d 100644 --- a/arch/arm/mach-uniphier/sbc/sbc.c +++ b/arch/arm/mach-uniphier/sbc/sbc.c @@ -5,7 +5,9 @@ * Author: Masahiro Yamada <yamada.masahiro@socionext.com> */ +#include <common.h> #include <linux/io.h> +#include <asm/global_data.h> #include "../init.h" #include "sbc-regs.h" @@ -31,6 +33,20 @@ #define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009 #define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210 +int uniphier_sbc_is_enabled(void) +{ + DECLARE_GLOBAL_DATA_PTR; + const void *fdt = gd->fdt_blob; + int offset; + + offset = fdt_node_offset_by_compatible(fdt, 0, + "socionext,uniphier-system-bus"); + if (offset < 0) + return 0; + + return fdtdec_get_is_enabled(fdt, offset); +} + static void __uniphier_sbc_init(int savepin) { /* @@ -48,7 +64,7 @@ static void __uniphier_sbc_init(int savepin) writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12); } - if (boot_is_swapped()) { + if (uniphier_sbc_boot_is_swapped()) { /* * Boot Swap On: boot from external NOR/SRAM * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h index 28de19c039..e43116e064 100644 --- a/arch/arm/mach-uniphier/sc-regs.h +++ b/arch/arm/mach-uniphier/sc-regs.h @@ -10,31 +10,36 @@ #ifndef ARCH_SC_REGS_H #define ARCH_SC_REGS_H -#define SC_BASE_ADDR 0x61840000 +#ifndef __ASSEMBLY__ +#include <linux/compiler.h> +#define sc_base ((void __iomem *)SC_BASE) +#endif -#define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200) +#define SC_BASE 0x61840000 + +#define SC_DPLLCTRL 0x1200 #define SC_DPLLCTRL_SSC_EN (0x1 << 31) #define SC_DPLLCTRL_FOUTMODE_MASK (0xf << 16) #define SC_DPLLCTRL_SSC_RATE (0x1 << 15) -#define SC_DPLLCTRL2 (SC_BASE_ADDR | 0x1204) +#define SC_DPLLCTRL2 0x1204 #define SC_DPLLCTRL2_NRSTDS (0x1 << 28) -#define SC_DPLLCTRL3 (SC_BASE_ADDR | 0x1208) +#define SC_DPLLCTRL3 0x1208 #define SC_DPLLCTRL3_LPFSEL_COEF2 (0x0 << 31) #define SC_DPLLCTRL3_LPFSEL_COEF3 (0x1 << 31) -#define SC_UPLLCTRL (SC_BASE_ADDR | 0x1210) +#define SC_UPLLCTRL 0x1210 -#define SC_VPLL27ACTRL (SC_BASE_ADDR | 0x1270) -#define SC_VPLL27ACTRL2 (SC_BASE_ADDR | 0x1274) -#define SC_VPLL27ACTRL3 (SC_BASE_ADDR | 0x1278) +#define SC_VPLL27ACTRL 0x1270 +#define SC_VPLL27ACTRL2 0x1274 +#define SC_VPLL27ACTRL3 0x1278 -#define SC_VPLL27BCTRL (SC_BASE_ADDR | 0x1290) -#define SC_VPLL27BCTRL2 (SC_BASE_ADDR | 0x1294) -#define SC_VPLL27BCTRL3 (SC_BASE_ADDR | 0x1298) +#define SC_VPLL27BCTRL 0x1290 +#define SC_VPLL27BCTRL2 0x1294 +#define SC_VPLL27BCTRL3 0x1298 -#define SC_RSTCTRL (SC_BASE_ADDR | 0x2000) +#define SC_RSTCTRL 0x2000 #define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */ #define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */ #define SC_RSTCTRL_NRST_ETHER (0x1 << 12) @@ -44,14 +49,14 @@ #define SC_RSTCTRL_NRST_UMC0 (0x1 << 4) #define SC_RSTCTRL_NRST_NAND (0x1 << 2) -#define SC_RSTCTRL2 (SC_BASE_ADDR | 0x2004) +#define SC_RSTCTRL2 0x2004 #define SC_RSTCTRL2_NRST_USB3B1 (0x1 << 17) /* USB3 #1 bus */ #define SC_RSTCTRL2_NRST_USB3C1 (0x1 << 16) /* USB3 #1 core */ -#define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008) +#define SC_RSTCTRL3 0x2008 /* Pro5 or newer */ -#define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c) +#define SC_RSTCTRL4 0x200c #define SC_RSTCTRL4_NRST_UMCSB (0x1 << 12) /* UMC system bus */ #define SC_RSTCTRL4_NRST_UMCA2 (0x1 << 10) /* UMC ch2 standby */ #define SC_RSTCTRL4_NRST_UMCA1 (0x1 << 9) /* UMC ch1 standby */ @@ -60,11 +65,11 @@ #define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */ #define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */ -#define SC_RSTCTRL5 (SC_BASE_ADDR | 0x2010) +#define SC_RSTCTRL5 0x2010 -#define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014) +#define SC_RSTCTRL6 0x2014 -#define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) +#define SC_CLKCTRL 0x2104 #define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */ #define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */ #define SC_CLKCTRL_CEN_ETHER (0x1 << 12) @@ -76,15 +81,15 @@ #define SC_CLKCTRL_CEN_PERI (0x1 << 0) /* Pro5 or newer */ -#define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c) +#define SC_CLKCTRL4 0x210c #define SC_CLKCTRL4_CEN_UMCSB (0x1 << 12) /* UMC system bus */ #define SC_CLKCTRL4_CEN_UMC2 (0x1 << 2) /* UMC ch2 */ #define SC_CLKCTRL4_CEN_UMC1 (0x1 << 1) /* UMC ch1 */ #define SC_CLKCTRL4_CEN_UMC0 (0x1 << 0) /* UMC ch0 */ /* System reset control register */ -#define SC_IRQTIMSET (SC_BASE_ADDR | 0x3000) -#define SC_SLFRSTSEL (SC_BASE_ADDR | 0x3010) -#define SC_SLFRSTCTL (SC_BASE_ADDR | 0x3014) +#define SC_IRQTIMSET 0x3000 +#define SC_SLFRSTSEL 0x3010 +#define SC_SLFRSTCTL 0x3014 #endif /* ARCH_SC_REGS_H */ diff --git a/arch/arm/mach-uniphier/sc64-regs.h b/arch/arm/mach-uniphier/sc64-regs.h index 83f34e3faf..fdcca232b6 100644 --- a/arch/arm/mach-uniphier/sc64-regs.h +++ b/arch/arm/mach-uniphier/sc64-regs.h @@ -9,28 +9,33 @@ #ifndef SC64_REGS_H #define SC64_REGS_H -#define SC_BASE_ADDR 0x61840000 +#ifndef __ASSEMBLY__ +#include <linux/compiler.h> +extern void __iomem *sc_base; +#endif -#define SC_RSTCTRL (SC_BASE_ADDR | 0x2000) -#define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008) -#define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c) -#define SC_RSTCTRL5 (SC_BASE_ADDR | 0x2010) -#define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014) -#define SC_RSTCTRL7 (SC_BASE_ADDR | 0x2018) +#define SC_BASE 0x61840000 -#define SC_CLKCTRL (SC_BASE_ADDR | 0x2100) -#define SC_CLKCTRL3 (SC_BASE_ADDR | 0x2108) -#define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c) -#define SC_CLKCTRL5 (SC_BASE_ADDR | 0x2110) -#define SC_CLKCTRL6 (SC_BASE_ADDR | 0x2114) -#define SC_CLKCTRL7 (SC_BASE_ADDR | 0x2118) +#define SC_RSTCTRL 0x2000 +#define SC_RSTCTRL3 0x2008 +#define SC_RSTCTRL4 0x200c +#define SC_RSTCTRL5 0x2010 +#define SC_RSTCTRL6 0x2014 +#define SC_RSTCTRL7 0x2018 -#define SC_CA72_GEARST (SC_BASE_ADDR | 0x8000) -#define SC_CA72_GEARSET (SC_BASE_ADDR | 0x8004) -#define SC_CA72_GEARUPD (SC_BASE_ADDR | 0x8008) -#define SC_CA53_GEARST (SC_BASE_ADDR | 0x8080) -#define SC_CA53_GEARSET (SC_BASE_ADDR | 0x8084) -#define SC_CA53_GEARUPD (SC_BASE_ADDR | 0x8088) +#define SC_CLKCTRL 0x2100 +#define SC_CLKCTRL3 0x2108 +#define SC_CLKCTRL4 0x210c +#define SC_CLKCTRL5 0x2110 +#define SC_CLKCTRL6 0x2114 +#define SC_CLKCTRL7 0x2118 + +#define SC_CA72_GEARST 0x8000 +#define SC_CA72_GEARSET 0x8004 +#define SC_CA72_GEARUPD 0x8008 +#define SC_CA53_GEARST 0x8080 +#define SC_CA53_GEARSET 0x8084 +#define SC_CA53_GEARUPD 0x8088 #define SC_CA_GEARUPD (1 << 0) #endif /* SC64_REGS_H */ diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h index 39ffed5885..f47d101949 100644 --- a/arch/arm/mach-uniphier/sg-regs.h +++ b/arch/arm/mach-uniphier/sg-regs.h @@ -10,15 +10,23 @@ #ifndef UNIPHIER_SG_REGS_H #define UNIPHIER_SG_REGS_H +#ifndef __ASSEMBLY__ +#include <linux/compiler.h> +#ifdef CONFIG_ARCH_UNIPHIER_V8_MULTI +extern void __iomem *sg_base; +#else +#define sg_base ((void __iomem *)SG_BASE) +#endif +#endif /* __ASSEMBLY__ */ + /* Base Address */ -#define SG_CTRL_BASE 0x5f800000 -#define SG_DBG_BASE 0x5f900000 +#define SG_BASE 0x5f800000 /* Revision */ -#define SG_REVISION (SG_CTRL_BASE | 0x0000) +#define SG_REVISION 0x0000 /* Memory Configuration */ -#define SG_MEMCONF (SG_CTRL_BASE | 0x0400) +#define SG_MEMCONF 0x0400 #define SG_MEMCONF_CH0_SZ_MASK ((0x1 << 10) | (0x03 << 0)) #define SG_MEMCONF_CH0_SZ_64M ((0x0 << 10) | (0x01 << 0)) @@ -54,22 +62,22 @@ #define SG_MEMCONF_SPARSEMEM (0x1 << 4) -#define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500) -#define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554) -#define SG_ETPHYCNT (SG_CTRL_BASE | 0x550) +#define SG_USBPHYCTRL 0x0500 +#define SG_ETPHYPSHUT 0x0554 +#define SG_ETPHYCNT 0x0550 /* Pin Control */ -#define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000) +#define SG_PINCTRL_BASE 0x1000 /* PH1-Pro4, PH1-Pro5 */ -#define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700) +#define SG_LOADPINCTRL 0x1700 /* Input Enable */ -#define SG_IECTRL (SG_CTRL_BASE | 0x1d00) +#define SG_IECTRL 0x1d00 /* Pin Monitor */ -#define SG_PINMON0 (SG_DBG_BASE | 0x0100) -#define SG_PINMON2 (SG_DBG_BASE | 0x0108) +#define SG_PINMON0 0x00100100 +#define SG_PINMON2 0x00100108 #define SG_PINMON0_CLK_MODE_UPLLSRC_MASK (0x3 << 19) #define SG_PINMON0_CLK_MODE_UPLLSRC_DEFAULT (0x0 << 19) diff --git a/arch/arm/mach-uniphier/soc-info.c b/arch/arm/mach-uniphier/soc-info.c index ce2d4b6dea..f021a8cab3 100644 --- a/arch/arm/mach-uniphier/soc-info.c +++ b/arch/arm/mach-uniphier/soc-info.c @@ -13,7 +13,7 @@ static unsigned int __uniphier_get_revision_field(unsigned int mask, unsigned int shift) { - u32 revision = readl(SG_REVISION); + u32 revision = readl(sg_base + SG_REVISION); return (revision >> shift) & mask; } diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index b99288aa83..3f68b6f645 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -100,65 +100,43 @@ config TARGET_IDS8313 config TARGET_KMETER1 bool "Support kmeter1" - select ARCH_MPC8360 - imply CMD_CRAMFS - imply CMD_DIAG - imply FS_CRAMFS + select VENDOR_KM config TARGET_KMCOGE5NE bool "Support kmcoge5ne" - select ARCH_MPC8360 - imply CMD_CRAMFS - imply CMD_DIAG - imply FS_CRAMFS + select VENDOR_KM config TARGET_SUVD3 bool "Support suvd3" - select ARCH_MPC832X - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_KMVECT1 bool "Support kmvect1" - select ARCH_MPC8309 - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_KMTEGR1 bool "Support kmtegr1" - select ARCH_MPC8309 - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_TUXX1 bool "Support tuxx1" - select ARCH_MPC832X - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_KMSUPX5 bool "Support kmsupx5" - select ARCH_MPC832X - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_TUGE1 bool "Support tuge1" - select ARCH_MPC832X - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_KMOPTI2 bool "Support kmopti2" - select ARCH_MPC832X - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_KMTEPR2 bool "Support kmtepr2" - select ARCH_MPC832X - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_TQM834X bool "Support TQM834x" @@ -354,7 +332,7 @@ source "board/freescale/mpc8349itx/Kconfig" source "board/freescale/mpc837xemds/Kconfig" source "board/freescale/mpc837xerdb/Kconfig" source "board/ids/ids8313/Kconfig" -source "board/keymile/km83xx/Kconfig" +source "board/keymile/Kconfig" source "board/mpc8308_p1m/Kconfig" source "board/sbc8349/Kconfig" source "board/tqc/tqm834x/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 7572404625..c038a6ddb0 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -412,11 +412,7 @@ config TARGET_CONTROLCENTERD config TARGET_KMP204X bool "Support kmp204x" - select ARCH_P2041 - select PHYS_64BIT - select FSL_DDR_INTERACTIVE - imply CMD_CRAMFS - imply FS_CRAMFS + select VENDOR_KM config TARGET_XPEDITE520X bool "Support xpedite520x" @@ -1620,7 +1616,7 @@ source "board/freescale/t208xrdb/Kconfig" source "board/freescale/t4qds/Kconfig" source "board/freescale/t4rdb/Kconfig" source "board/gdsys/p1022/Kconfig" -source "board/keymile/kmp204x/Kconfig" +source "board/keymile/Kconfig" source "board/sbc8548/Kconfig" source "board/socrates/Kconfig" source "board/varisys/cyrus/Kconfig" diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index 31a12db103..05fbbd7bcc 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -5,14 +5,15 @@ PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM PLATFORM_CPPFLAGS += -fPIC PLATFORM_LIBS += -lrt +SDL_CONFIG ?= sdl-config # Define this to avoid linking with SDL, which requires SDL libraries # This can solve 'sdl-config: Command not found' errors ifneq ($(NO_SDL),) PLATFORM_CPPFLAGS += -DSANDBOX_NO_SDL else -PLATFORM_LIBS += $(shell sdl-config --libs) -PLATFORM_CPPFLAGS += $(shell sdl-config --cflags) +PLATFORM_LIBS += $(shell $(SDL_CONFIG) --libs) +PLATFORM_CPPFLAGS += $(shell $(SDL_CONFIG) --cflags) endif cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds $(u-boot-init) \ diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c index 2ca4cd6e35..4f415c71d6 100644 --- a/arch/sandbox/cpu/spl.c +++ b/arch/sandbox/cpu/spl.c @@ -12,6 +12,7 @@ DECLARE_GLOBAL_DATA_PTR; +/* SPL / TPL init function */ void board_init_f(ulong flag) { struct sandbox_state *state = state_get_current(); @@ -44,7 +45,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, return 0; } -SPL_LOAD_IMAGE_METHOD("sandbox", 0, BOOT_DEVICE_BOARD, spl_board_load_image); +SPL_LOAD_IMAGE_METHOD("sandbox", 9, BOOT_DEVICE_BOARD, spl_board_load_image); void spl_board_init(void) { diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index d3b9c05985..2333240fda 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -356,6 +356,7 @@ void state_reset_for_test(struct sandbox_state *state) /* No reset yet, so mark it as such. Always allow power reset */ state->last_sysreset = SYSRESET_COUNT; state->sysreset_allowed[SYSRESET_POWER] = true; + state->sysreset_allowed[SYSRESET_POWER_OFF] = true; memset(&state->wdt, '\0', sizeof(state->wdt)); memset(state->spi, '\0', sizeof(state->spi)); diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index a41b5f052d..16a33db87d 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -1,6 +1,6 @@ /dts-v1/; -#define USB_CLASS_HUB 9 +#include <config.h> / { #address-cells = <1>; @@ -12,46 +12,17 @@ pci0 = &pci; rtc0 = &rtc_0; axi0 = &axi; + spi0 = &spi; }; - chosen { - stdout-path = "/serial"; - }; - - audio: audio-codec { - compatible = "sandbox,audio-codec"; - #sound-dai-cells = <1>; + memory { + reg = <0 CONFIG_SYS_SDRAM_SIZE>; }; cros_ec: cros-ec { reg = <0 0>; u-boot,dm-pre-reloc; compatible = "google,cros-ec-sandbox"; - - /* - * This describes the flash memory within the EC. Note - * that the STM32L flash erases to 0, not 0xff. - */ - flash { - u-boot,dm-pre-reloc; - image-pos = <0x08000000>; - size = <0x20000>; - erase-value = <0>; - - /* Information for sandbox */ - ro { - image-pos = <0>; - size = <0xf000>; - }; - wp-ro { - image-pos = <0xf000>; - size = <0x1000>; - }; - rw { - image-pos = <0x10000>; - size = <0x10000>; - }; - }; }; ethrawbus { @@ -65,30 +36,6 @@ fake-host-hwaddr = [00 00 66 44 22 00]; }; - gpio_a: gpios@0 { - u-boot,dm-pre-reloc; - gpio-controller; - compatible = "sandbox,gpio"; - #gpio-cells = <1>; - gpio-bank-name = "a"; - sandbox,gpio-count = <20>; - }; - - gpio_b: gpios@1 { - u-boot,dm-pre-reloc; - gpio-controller; - compatible = "sandbox,gpio"; - #gpio-cells = <2>; - gpio-bank-name = "b"; - sandbox,gpio-count = <10>; - }; - - hexagon { - compatible = "demo-simple"; - colour = "white"; - sides = <6>; - }; - i2c_0: i2c@0 { #address-cells = <1>; #size-cells = <0>; @@ -97,63 +44,6 @@ clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; - eeprom@2c { - reg = <0x2c>; - compatible = "i2c-eeprom"; - sandbox,emul = <&emul_eeprom>; - }; - - rtc_0: rtc@43 { - reg = <0x43>; - compatible = "sandbox-rtc"; - sandbox,emul = <&emul0>; - }; - sandbox_pmic: sandbox_pmic { - reg = <0x40>; - }; - - mc34708: pmic@41 { - reg = <0x41>; - }; - - i2c_emul: emul { - reg = <0xff>; - compatible = "sandbox,i2c-emul-parent"; - emul_eeprom: emul-eeprom { - compatible = "sandbox,i2c-eeprom"; - sandbox,filename = "i2c.bin"; - sandbox,size = <256>; - }; - emul0: emul0 { - compatible = "sandbox,i2c-rtc"; - }; - }; - }; - - i2s: i2s { - compatible = "sandbox,i2s"; - #sound-dai-cells = <1>; - }; - - lcd { - u-boot,dm-pre-reloc; - compatible = "sandbox,lcd-sdl"; - xres = <1366>; - yres = <768>; - }; - - leds { - compatible = "gpio-leds"; - - iracibble { - gpios = <&gpio_a 1 0>; - label = "sandbox:red"; - }; - - martinet { - gpios = <&gpio_a 2 0>; - label = "sandbox:green"; - }; }; pci: pci-controller { @@ -163,233 +53,19 @@ #size-cells = <2>; ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 0x01000000 0 0x20000000 0x20000000 0 0x2000>; - pci@1f,0 { - compatible = "pci-generic"; - reg = <0xf800 0 0 0 0>; - emul@1f,0 { - compatible = "sandbox,swap-case"; - }; - }; - }; - - pinctrl { - compatible = "sandbox,pinctrl"; - status = "okay"; - - pinctrl_i2c0: i2c0 { - groups = "i2c"; - function = "i2c"; - bias-pull-up; - }; - - pinctrl_serial0: uart0 { - groups = "serial_a"; - function = "serial"; - }; - - pinctrl_onewire0: onewire0 { - groups = "w1"; - function = "w1"; - bias-pull-up; - }; - }; - - reset@1 { - compatible = "sandbox,reset"; }; - sound { - compatible = "sandbox,sound"; - cpu { - sound-dai = <&i2s 0>; - }; - - codec { - sound-dai = <&audio 0>; - }; - }; - - spi@0 { + spi: spi@0 { u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <0>; reg = <0 0>; compatible = "sandbox,spi"; cs-gpios = <0>, <&gpio_a 0>; - firmware_storage_spi: flash@0 { - u-boot,dm-pre-reloc; - reg = <0>; - compatible = "spansion,m25p16", "sandbox,spi-flash"; - spi-max-frequency = <40000000>; - sandbox,filename = "spi.bin"; - }; - }; - - spl-test { - u-boot,dm-pre-reloc; - compatible = "sandbox,spl-test"; - boolval; - intval = <1>; - intarray = <2 3 4>; - byteval = [05]; - bytearray = [06]; - longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11]; - stringval = "message"; - stringarray = "multi-word", "message"; - }; - - spl-test2 { - u-boot,dm-pre-reloc; - compatible = "sandbox,spl-test"; - intval = <3>; - intarray = <5>; - byteval = [08]; - bytearray = [01 23 34]; - longbytearray = [09 0a 0b 0c]; - stringval = "message2"; - stringarray = "another", "multi-word", "message"; }; - spl-test3 { - u-boot,dm-pre-reloc; - compatible = "sandbox,spl-test"; - stringarray = "one"; - }; - - spl-test4 { - u-boot,dm-pre-reloc; - compatible = "sandbox,spl-test.2"; - }; - - square { - compatible = "demo-shape"; - colour = "blue"; - sides = <4>; - }; - - timer { - compatible = "sandbox,timer"; - clock-frequency = <1000000>; - }; - - tpm { - u-boot,dm-pre-reloc; - compatible = "google,sandbox-tpm"; - }; - - tpm2 { - compatible = "sandbox,tpm2"; - }; - - triangle { - compatible = "demo-shape"; - colour = "cyan"; - sides = <3>; - character = <83>; - light-gpios = <&gpio_a 2>, <&gpio_b 6 0>; - }; - - /* Needs to be available prior to relocation */ - uart0: serial { - u-boot,dm-spl; - compatible = "sandbox,serial"; - sandbox,text-colour = "cyan"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_serial0>; - }; - - usb@0 { - compatible = "sandbox,usb"; - status = "disabled"; - hub { - compatible = "sandbox,usb-hub"; - #address-cells = <1>; - #size-cells = <0>; - flash-stick { - reg = <0>; - compatible = "sandbox,usb-flash"; - }; - }; - }; - - usb@1 { - compatible = "sandbox,usb"; - hub { - compatible = "usb-hub"; - usb,device-class = <USB_CLASS_HUB>; - hub-emul { - compatible = "sandbox,usb-hub"; - #address-cells = <1>; - #size-cells = <0>; - flash-stick { - reg = <0>; - compatible = "sandbox,usb-flash"; - sandbox,filepath = "flash.bin"; - }; - }; - }; - }; - - usb@2 { - compatible = "sandbox,usb"; - status = "disabled"; - }; - - spmi: spmi@0 { - compatible = "sandbox,spmi"; - #address-cells = <0x1>; - #size-cells = <0x1>; - pm8916@0 { - compatible = "qcom,spmi-pmic"; - reg = <0x0 0x1>; - #address-cells = <0x1>; - #size-cells = <0x1>; - - spmi_gpios: gpios@c000 { - compatible = "qcom,pm8916-gpio"; - reg = <0xc000 0x400>; - gpio-controller; - gpio-count = <4>; - #gpio-cells = <2>; - gpio-bank-name="spmi"; - }; - }; - }; - - axi: axi@0 { - compatible = "sandbox,axi"; - #address-cells = <0x1>; - #size-cells = <0x1>; - store@0 { - compatible = "sandbox,sandbox_store"; - reg = <0x0 0x400>; - }; - }; - - onewire0: onewire { - compatible = "w1-gpio"; - gpios = <&gpio_a 8>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_onewire0>; - status = "okay"; - - sandbox_eeprom0: sandbox_eeprom@0 { - compatible = "sandbox,w1-eeprom"; - status = "okay"; - }; - }; - - sandbox_tee { - compatible = "sandbox,tee"; - }; }; +#include "sandbox.dtsi" #include "cros-ec-keyboard.dtsi" #include "sandbox_pmic.dtsi" - -&cros_ec { - u-boot,dm-pre-reloc; - keyboard-controller { - u-boot,dm-pre-reloc; - }; -}; diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi new file mode 100644 index 0000000000..c6d5650c20 --- /dev/null +++ b/arch/sandbox/dts/sandbox.dtsi @@ -0,0 +1,364 @@ +/* + * This is the common sandbox device-tree nodes. This is shared between sandbox + * and sandbox64 builds. + */ + +#define USB_CLASS_HUB 9 + +/ { + chosen { + stdout-path = "/serial"; + }; + + audio: audio-codec { + compatible = "sandbox,audio-codec"; + #sound-dai-cells = <1>; + }; + + gpio_a: gpios@0 { + u-boot,dm-pre-reloc; + gpio-controller; + compatible = "sandbox,gpio"; + #gpio-cells = <1>; + gpio-bank-name = "a"; + sandbox,gpio-count = <20>; + }; + + gpio_b: gpios@1 { + u-boot,dm-pre-reloc; + gpio-controller; + compatible = "sandbox,gpio"; + #gpio-cells = <2>; + gpio-bank-name = "b"; + sandbox,gpio-count = <10>; + }; + + hexagon { + compatible = "demo-simple"; + colour = "white"; + sides = <6>; + }; + + i2c_0: i2c@0 { + eeprom@2c { + reg = <0x2c>; + compatible = "i2c-eeprom"; + sandbox,emul = <&emul_eeprom>; + }; + + rtc_0: rtc@43 { + reg = <0x43>; + compatible = "sandbox-rtc"; + sandbox,emul = <&emul0>; + }; + sandbox_pmic: sandbox_pmic { + reg = <0x40>; + }; + + mc34708: pmic@41 { + reg = <0x41>; + }; + + i2c_emul: emul { + reg = <0xff>; + compatible = "sandbox,i2c-emul-parent"; + emul_eeprom: emul-eeprom { + compatible = "sandbox,i2c-eeprom"; + sandbox,filename = "i2c.bin"; + sandbox,size = <256>; + }; + emul0: emul0 { + compatible = "sandbox,i2c-rtc"; + }; + }; + }; + + i2s: i2s { + compatible = "sandbox,i2s"; + #sound-dai-cells = <1>; + }; + + lcd { + u-boot,dm-pre-reloc; + compatible = "sandbox,lcd-sdl"; + xres = <1366>; + yres = <768>; + }; + + leds { + compatible = "gpio-leds"; + + iracibble { + gpios = <&gpio_a 1 0>; + label = "sandbox:red"; + }; + + martinet { + gpios = <&gpio_a 2 0>; + label = "sandbox:green"; + }; + }; + + pci-controller { + pci@1f,0 { + compatible = "pci-generic"; + reg = <0xf800 0 0 0 0>; + emul@1f,0 { + compatible = "sandbox,swap-case"; + }; + }; + }; + + pinctrl { + compatible = "sandbox,pinctrl"; + status = "okay"; + + pinctrl_i2c0: i2c0 { + groups = "i2c"; + function = "i2c"; + bias-pull-up; + }; + + pinctrl_serial0: uart0 { + groups = "serial_a"; + function = "serial"; + }; + + pinctrl_onewire0: onewire0 { + groups = "w1"; + function = "w1"; + bias-pull-up; + }; + }; + + reset@1 { + compatible = "sandbox,reset"; + }; + + sound { + compatible = "sandbox,sound"; + cpu { + sound-dai = <&i2s 0>; + }; + + codec { + sound-dai = <&audio 0>; + }; + }; + + spi@0 { + firmware_storage_spi: flash@0 { + u-boot,dm-pre-reloc; + reg = <0>; + compatible = "spansion,m25p16", "jedec,spi-nor"; + spi-max-frequency = <40000000>; + sandbox,filename = "spi.bin"; + }; + }; + + spl-test { + u-boot,dm-pre-reloc; + compatible = "sandbox,spl-test"; + boolval; + intval = <1>; + intarray = <2 3 4>; + byteval = [05]; + bytearray = [06]; + longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11]; + stringval = "message"; + stringarray = "multi-word", "message"; + }; + + spl-test2 { + u-boot,dm-pre-reloc; + compatible = "sandbox,spl-test"; + intval = <3>; + intarray = <5>; + byteval = [08]; + bytearray = [01 23 34]; + longbytearray = [09 0a 0b 0c]; + stringval = "message2"; + stringarray = "another", "multi-word", "message"; + }; + + spl-test3 { + u-boot,dm-pre-reloc; + compatible = "sandbox,spl-test"; + stringarray = "one"; + }; + + spl-test4 { + u-boot,dm-pre-reloc; + compatible = "sandbox,spl-test.2"; + }; + + spl-test5 { + u-boot,dm-tpl; + compatible = "sandbox,spl-test"; + stringarray = "tpl"; + }; + + spl-test6 { + u-boot,dm-pre-proper; + compatible = "sandbox,spl-test"; + stringarray = "pre-proper"; + }; + + spl-test7 { + u-boot,dm-spl; + compatible = "sandbox,spl-test"; + stringarray = "spl"; + }; + + square { + compatible = "demo-shape"; + colour = "blue"; + sides = <4>; + }; + + timer { + compatible = "sandbox,timer"; + clock-frequency = <1000000>; + }; + + tpm { + u-boot,dm-pre-reloc; + compatible = "google,sandbox-tpm"; + }; + + tpm2 { + compatible = "sandbox,tpm2"; + }; + + triangle { + compatible = "demo-shape"; + colour = "cyan"; + sides = <3>; + character = <83>; + light-gpios = <&gpio_a 2>, <&gpio_b 6 0>; + }; + + /* Needs to be available prior to relocation */ + uart0: serial { + u-boot,dm-spl; + compatible = "sandbox,serial"; + sandbox,text-colour = "cyan"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial0>; + }; + + usb@0 { + compatible = "sandbox,usb"; + status = "disabled"; + hub { + compatible = "sandbox,usb-hub"; + #address-cells = <1>; + #size-cells = <0>; + flash-stick { + reg = <0>; + compatible = "sandbox,usb-flash"; + }; + }; + }; + + usb@1 { + compatible = "sandbox,usb"; + hub { + compatible = "usb-hub"; + usb,device-class = <USB_CLASS_HUB>; + hub-emul { + compatible = "sandbox,usb-hub"; + #address-cells = <1>; + #size-cells = <0>; + flash-stick { + reg = <0>; + compatible = "sandbox,usb-flash"; + sandbox,filepath = "flash.bin"; + }; + }; + }; + }; + + usb@2 { + compatible = "sandbox,usb"; + status = "disabled"; + }; + + spmi: spmi@0 { + compatible = "sandbox,spmi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + pm8916@0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 0x1>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + spmi_gpios: gpios@c000 { + compatible = "qcom,pm8916-gpio"; + reg = <0xc000 0x400>; + gpio-controller; + gpio-count = <4>; + #gpio-cells = <2>; + gpio-bank-name="spmi"; + }; + }; + }; + + axi: axi@0 { + compatible = "sandbox,axi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + store@0 { + compatible = "sandbox,sandbox_store"; + reg = <0x0 0x400>; + }; + }; + + onewire0: onewire { + compatible = "w1-gpio"; + gpios = <&gpio_a 8>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_onewire0>; + status = "okay"; + + sandbox_eeprom0: sandbox_eeprom@0 { + compatible = "sandbox,w1-eeprom"; + status = "okay"; + }; + }; + + sandbox_tee { + compatible = "sandbox,tee"; + }; +}; + +&cros_ec { + /* + * This describes the flash memory within the EC. Note + * that the STM32L flash erases to 0, not 0xff. + */ + flash { + image-pos = <0x08000000>; + size = <0x20000>; + erase-value = <0>; + + /* Information for sandbox */ + ro { + image-pos = <0>; + size = <0xf000>; + }; + wp-ro { + image-pos = <0xf000>; + size = <0x1000>; + }; + rw { + image-pos = <0x10000>; + size = <0x10000>; + }; + }; + + keyboard-controller { + u-boot,dm-pre-reloc; + }; +}; diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts index a3c95f2cdb..37a5539ff4 100644 --- a/arch/sandbox/dts/sandbox64.dts +++ b/arch/sandbox/dts/sandbox64.dts @@ -1,6 +1,6 @@ /dts-v1/; -#define USB_CLASS_HUB 9 +#include <config.h> / { #address-cells = <2>; @@ -11,39 +11,18 @@ i2c0 = &i2c_0; pci0 = &pci; rtc0 = &rtc_0; + axi0 = &axi; + spi0 = &spi; }; - chosen { - stdout-path = "/serial"; + memory { + reg = /bits/ 64 <0 CONFIG_SYS_SDRAM_SIZE>; }; cros_ec: cros-ec { reg = <0 0 0 0>; + u-boot,dm-pre-reloc; compatible = "google,cros-ec-sandbox"; - - /* - * This describes the flash memory within the EC. Note - * that the STM32L flash erases to 0, not 0xff. - */ - flash { - image-pos = <0x08000000>; - size = <0x20000>; - erase-value = <0>; - - /* Information for sandbox */ - ro { - image-pos = <0>; - size = <0xf000>; - }; - wp-ro { - image-pos = <0xf000>; - size = <0x1000>; - }; - rw { - image-pos = <0x10000>; - size = <0x10000>; - }; - }; }; ethrawbus { @@ -57,28 +36,6 @@ fake-host-hwaddr = [00 00 66 44 22 00]; }; - gpio_a: gpios@0 { - gpio-controller; - compatible = "sandbox,gpio"; - #gpio-cells = <1>; - gpio-bank-name = "a"; - sandbox,gpio-count = <20>; - }; - - gpio_b: gpios@1 { - gpio-controller; - compatible = "sandbox,gpio"; - #gpio-cells = <2>; - gpio-bank-name = "b"; - sandbox,gpio-count = <10>; - }; - - hexagon { - compatible = "demo-simple"; - colour = "white"; - sides = <6>; - }; - i2c_0: i2c@0 { #address-cells = <1>; #size-cells = <0>; @@ -87,58 +44,6 @@ clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; - eeprom@2c { - reg = <0x2c>; - compatible = "i2c-eeprom"; - sandbox,emul = <&emul_eeprom>; - }; - - rtc_0: rtc@43 { - reg = <0x43>; - compatible = "sandbox-rtc"; - sandbox,emul = <&emul0>; - }; - sandbox_pmic: sandbox_pmic { - reg = <0x40>; - }; - - mc34708: pmic@41 { - reg = <0x41>; - }; - - i2c_emul: emul { - reg = <0xff>; - compatible = "sandbox,i2c-emul-parent"; - emul_eeprom: emul-eeprom { - compatible = "sandbox,i2c-eeprom"; - sandbox,filename = "i2c.bin"; - sandbox,size = <256>; - }; - emul0: emul0 { - compatible = "sandbox,i2c-rtc"; - }; - }; - }; - - lcd { - u-boot,dm-pre-reloc; - compatible = "sandbox,lcd-sdl"; - xres = <1366>; - yres = <768>; - }; - - leds { - compatible = "gpio-leds"; - - iracibble { - gpios = <&gpio_a 1 0>; - label = "sandbox:red"; - }; - - martinet { - gpios = <&gpio_a 2 0>; - label = "sandbox:green"; - }; }; pci: pci-controller { @@ -148,181 +53,19 @@ #size-cells = <2>; ranges = <0x02000000 0 0x10000000 0 0x10000000 0 0x2000 0x01000000 0 0x20000000 0 0x20000000 0 0x2000>; - pci@1f,0 { - compatible = "pci-generic"; - reg = <0xf800 0 0 0 0>; - emul@1f,0 { - compatible = "sandbox,swap-case"; - }; - }; - }; - - pinctrl { - compatible = "sandbox,pinctrl"; - - pinctrl_i2c0: i2c0 { - groups = "i2c"; - function = "i2c"; - bias-pull-up; - }; - - pinctrl_serial0: uart0 { - groups = "serial_a"; - function = "serial"; - }; }; - reset@1 { - compatible = "sandbox,reset"; - }; - - spi@0 { + spi: spi@0 { + u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <0>; reg = <0 0 0 0>; compatible = "sandbox,spi"; cs-gpios = <0>, <&gpio_a 0>; - firmware_storage_spi: flash@0 { - reg = <0>; - compatible = "spansion,m25p16", "sandbox,spi-flash"; - spi-max-frequency = <40000000>; - sandbox,filename = "spi.bin"; - }; }; - spl-test { - u-boot,dm-pre-reloc; - compatible = "sandbox,spl-test"; - boolval; - intval = <1>; - intarray = <2 3 4>; - byteval = [05]; - bytearray = [06]; - longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11]; - stringval = "message"; - stringarray = "multi-word", "message"; - }; - - spl-test2 { - u-boot,dm-pre-reloc; - compatible = "sandbox,spl-test"; - intval = <3>; - intarray = <5>; - byteval = [08]; - bytearray = [01 23 34]; - longbytearray = [09 0a 0b 0c]; - stringval = "message2"; - stringarray = "another", "multi-word", "message"; - }; - - spl-test3 { - u-boot,dm-pre-reloc; - compatible = "sandbox,spl-test"; - stringarray = "one"; - }; - - spl-test4 { - u-boot,dm-pre-reloc; - compatible = "sandbox,spl-test.2"; - }; - - square { - compatible = "demo-shape"; - colour = "blue"; - sides = <4>; - }; - - timer { - compatible = "sandbox,timer"; - clock-frequency = <1000000>; - }; - - tpm { - compatible = "google,sandbox-tpm"; - }; - - tpm2 { - compatible = "sandbox,tpm2"; - }; - - triangle { - compatible = "demo-shape"; - colour = "cyan"; - sides = <3>; - character = <83>; - light-gpios = <&gpio_a 2>, <&gpio_b 6 0>; - }; - - /* Needs to be available prior to relocation */ - uart0: serial { - compatible = "sandbox,serial"; - sandbox,text-colour = "cyan"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_serial0>; - }; - - usb@0 { - compatible = "sandbox,usb"; - status = "disabled"; - hub { - compatible = "sandbox,usb-hub"; - #address-cells = <1>; - #size-cells = <0>; - flash-stick { - reg = <0>; - compatible = "sandbox,usb-flash"; - }; - }; - }; - - usb@1 { - compatible = "sandbox,usb"; - hub { - compatible = "usb-hub"; - usb,device-class = <USB_CLASS_HUB>; - hub-emul { - compatible = "sandbox,usb-hub"; - #address-cells = <1>; - #size-cells = <0>; - flash-stick { - reg = <0>; - compatible = "sandbox,usb-flash"; - sandbox,filepath = "flash.bin"; - }; - }; - }; - }; - - usb@2 { - compatible = "sandbox,usb"; - status = "disabled"; - }; - - spmi: spmi@0 { - compatible = "sandbox,spmi"; - #address-cells = <0x1>; - #size-cells = <0x1>; - pm8916@0 { - compatible = "qcom,spmi-pmic"; - reg = <0x0 0x1>; - #address-cells = <0x1>; - #size-cells = <0x1>; - - spmi_gpios: gpios@c000 { - compatible = "qcom,pm8916-gpio"; - reg = <0xc000 0x400>; - gpio-controller; - gpio-count = <4>; - #gpio-cells = <2>; - gpio-bank-name="spmi"; - }; - }; - }; - - sandbox_tee { - compatible = "sandbox,tee"; - }; }; +#include "sandbox.dtsi" #include "cros-ec-keyboard.dtsi" #include "sandbox_pmic.dtsi" diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index a7a566c0d8..8147d9781e 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -446,6 +446,14 @@ compatible = "sandbox,swap-case"; }; }; + pci@1,0 { + compatible = "pci-generic"; + reg = <0x0800 0 0 0 0>; + emul@0,0 { + compatible = "sandbox,swap-case"; + use-ea; + }; + }; pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index 7ec9b61008..cbf209693d 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -19,6 +19,7 @@ #define PCI_CAP_ID_PM_OFFSET 0x50 #define PCI_CAP_ID_EXP_OFFSET 0x60 #define PCI_CAP_ID_MSIX_OFFSET 0x70 +#define PCI_CAP_ID_EA_OFFSET 0x80 #define PCI_EXT_CAP_ID_ERR_OFFSET 0x100 #define PCI_EXT_CAP_ID_VC_OFFSET 0x200 @@ -30,6 +31,18 @@ #define SANDBOX_CLK_RATE 32768 +/* Macros used to test PCI EA capability structure */ +#define PCI_CAP_EA_BASE_LO0 0x00100000 +#define PCI_CAP_EA_BASE_LO1 0x00110000 +#define PCI_CAP_EA_BASE_LO2 0x00120000 +#define PCI_CAP_EA_BASE_LO4 0x00140000 +#define PCI_CAP_EA_BASE_HI2 0x00020000ULL +#define PCI_CAP_EA_BASE_HI4 0x00040000ULL +#define PCI_CAP_EA_SIZE_LO 0x0000ffff +#define PCI_CAP_EA_SIZE_HI 0x00000010ULL +#define PCI_EA_BAR2_MAGIC 0x72727272 +#define PCI_EA_BAR4_MAGIC 0x74747474 + /* System controller driver data */ enum { SYSCON0 = 32, diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h index c42175b94d..2c54e24e02 100644 --- a/arch/x86/include/asm/coreboot_tables.h +++ b/arch/x86/include/asm/coreboot_tables.h @@ -8,6 +8,8 @@ #ifndef _COREBOOT_TABLES_H #define _COREBOOT_TABLES_H +struct memory_area; + struct cbuint64 { u32 lo; u32 hi; diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index ad6e29021e..5f6ea35e5f 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -340,7 +340,8 @@ static int set_regdomain(void) "i2c mw 0x2a.1 0x4 0x1c 1; " \ "mw.l 0x01000000 0x00ff000c; " \ "i2c write 0x01000000 0x2a.1 0x5 4 -s; " \ - "setenv bootargs \"$bootargs omniarescue=$omnia_reset\"; " \ + "setenv bootargs \"earlyprintk console=ttyS0,115200" \ + " omniarescue=$omnia_reset\"; " \ "sf probe; " \ "sf read 0x1000000 0x100000 0x700000; " \ "bootm 0x1000000; " \ @@ -412,6 +413,7 @@ int board_late_init(void) set_regdomain(); handle_reset_button(); #endif + pci_init(); return 0; } @@ -514,17 +516,17 @@ int misc_init_r(void) mac[5] = mac1[3]; if (is_valid_ethaddr(mac)) - eth_env_set_enetaddr("ethaddr", mac); + eth_env_set_enetaddr("eth1addr", mac); increment_mac(mac); if (is_valid_ethaddr(mac)) - eth_env_set_enetaddr("eth1addr", mac); + eth_env_set_enetaddr("eth2addr", mac); increment_mac(mac); if (is_valid_ethaddr(mac)) - eth_env_set_enetaddr("eth2addr", mac); + eth_env_set_enetaddr("ethaddr", mac); out: return 0; diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index a90b7a3538..5180128db4 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -216,21 +216,29 @@ static const struct pinmux_config gpio_pins[] = { }; const struct pinmux_resource pinmuxes[] = { +#ifndef CONFIG_SPL_BUILD #ifdef CONFIG_DRIVER_TI_EMAC PINMUX_ITEM(emac_pins_mdio), #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII PINMUX_ITEM(emac_pins_rmii), #else PINMUX_ITEM(emac_pins_mii), -#endif -#endif +#endif /* CONFIG_DRIVER_TI_EMAC */ +#endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ +#endif /* CONFIG_SPL_BUILD */ #ifdef CONFIG_SPI_FLASH +#if !CONFIG_IS_ENABLED(PINCTRL) PINMUX_ITEM(spi1_pins_base), PINMUX_ITEM(spi1_pins_scs0), #endif +#endif +#if !CONFIG_IS_ENABLED(PINCTRL) PINMUX_ITEM(uart2_pins_txrx), PINMUX_ITEM(uart2_pins_rtscts), +#endif +#if !CONFIG_IS_ENABLED(PINCTRL) PINMUX_ITEM(i2c0_pins), +#endif #ifdef CONFIG_NAND_DAVINCI PINMUX_ITEM(emifa_pins_cs3), PINMUX_ITEM(emifa_pins_cs4), @@ -241,8 +249,10 @@ const struct pinmux_resource pinmuxes[] = { #endif PINMUX_ITEM(gpio_pins), #ifdef CONFIG_MMC_DAVINCI +#if !CONFIG_IS_ENABLED(PINCTRL) PINMUX_ITEM(mmc0_pins), #endif +#endif }; const int pinmuxes_size = ARRAY_SIZE(pinmuxes); diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig new file mode 100644 index 0000000000..e30d64818c --- /dev/null +++ b/board/keymile/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019, Pascal Linder <pascal.linder@edu.hefr.ch> + +config VENDOR_KM + bool + help + Selected by any KM board to have additional configurations. + +if VENDOR_KM + +source "board/keymile/km83xx/Kconfig" +source "board/keymile/kmp204x/Kconfig" +source "board/keymile/km_arm/Kconfig" + +endif diff --git a/board/keymile/km83xx/Kconfig b/board/keymile/km83xx/Kconfig index fbbbb17034..0a41be57f5 100644 --- a/board/keymile/km83xx/Kconfig +++ b/board/keymile/km83xx/Kconfig @@ -9,6 +9,13 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kmeter1" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC8360 + imply CMD_CRAMFS + imply CMD_DIAG + imply FS_CRAMFS + endif if TARGET_KMCOGE5NE @@ -22,6 +29,13 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kmcoge5ne" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC8360 + imply CMD_CRAMFS + imply CMD_DIAG + imply FS_CRAMFS + endif if TARGET_KMVECT1 @@ -35,6 +49,12 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kmvect1" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC8309 + imply CMD_CRAMFS + imply FS_CRAMFS + endif if TARGET_KMTEGR1 @@ -48,6 +68,12 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kmtegr1" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC8309 + imply CMD_CRAMFS + imply FS_CRAMFS + endif if TARGET_SUVD3 @@ -61,6 +87,12 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "suvd3" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC832X + imply CMD_CRAMFS + imply FS_CRAMFS + endif if TARGET_TUXX1 @@ -74,6 +106,12 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "tuxx1" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC832X + imply CMD_CRAMFS + imply FS_CRAMFS + endif if TARGET_KMSUPX5 @@ -87,6 +125,12 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kmsupx5" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC832X + imply CMD_CRAMFS + imply FS_CRAMFS + endif if TARGET_TUGE1 @@ -100,6 +144,12 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "tuge1" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC832X + imply CMD_CRAMFS + imply FS_CRAMFS + endif if TARGET_KMOPTI2 @@ -113,6 +163,12 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kmopti2" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC832X + imply CMD_CRAMFS + imply FS_CRAMFS + endif if TARGET_KMTEPR2 @@ -126,4 +182,10 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kmtepr2" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_MPC832X + imply CMD_CRAMFS + imply FS_CRAMFS + endif diff --git a/board/keymile/km_arm/Kconfig b/board/keymile/km_arm/Kconfig index 3476780847..19c1db3bc2 100644 --- a/board/keymile/km_arm/Kconfig +++ b/board/keymile/km_arm/Kconfig @@ -9,4 +9,14 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "km_kirkwood" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select BOARD_LATE_INIT + select DM + select DM_SPI + select DM_SPI_FLASH + imply CMD_CRAMFS + imply CMD_DIAG + imply FS_CRAMFS + endif diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index ea03be9eb3..3db80615ef 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -310,16 +310,35 @@ int board_late_init(void) return 0; } -int board_spi_claim_bus(struct spi_slave *slave) +static const u32 spi_mpp_config[] = { + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + 0 +}; + +static u32 spi_mpp_backup[4]; + +int mvebu_board_spi_claim_bus(struct udevice *dev) { + spi_mpp_backup[3] = 0; + + /* set new spi mpp config and save current one */ + kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup); + kw_gpio_set_value(KM_FLASH_GPIO_PIN, 0); return 0; } -void board_spi_release_bus(struct spi_slave *slave) +int mvebu_board_spi_release_bus(struct udevice *dev) { + /* restore saved mpp config */ + kirkwood_mpp_conf(spi_mpp_backup, NULL); + kw_gpio_set_value(KM_FLASH_GPIO_PIN, 1); + + return 0; } #if (defined(CONFIG_KM_PIGGY4_88E6061)) diff --git a/board/keymile/kmp204x/Kconfig b/board/keymile/kmp204x/Kconfig index 7b45a13cfb..f74d4295c7 100644 --- a/board/keymile/kmp204x/Kconfig +++ b/board/keymile/kmp204x/Kconfig @@ -9,4 +9,12 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kmp204x" +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_P2041 + select FSL_DDR_INTERACTIVE + select PHYS_64BIT + imply CMD_CRAMFS + imply FS_CRAMFS + endif diff --git a/board/lego/ev3/README b/board/lego/ev3/README index da62a649ba..9ad93e8205 100644 --- a/board/lego/ev3/README +++ b/board/lego/ev3/README @@ -50,3 +50,6 @@ software or a 3rd party program capable of uploading a firmware file. If you are booting from the microSD card, it is enough to just write uboot.bin to the flash. If you are not using a microSD card, you will need to create an image file using the layout described above. + +IMPORTANT: The EEPROM bootloader only copies 256k, so u-boot.img must not +exceed that size! diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c index 423c2fa44b..fa099e95f5 100644 --- a/board/lego/ev3/legoev3.c +++ b/board/lego/ev3/legoev3.c @@ -25,11 +25,6 @@ #include <asm/mach-types.h> #include <asm/setup.h> -#ifdef CONFIG_MMC_DAVINCI -#include <mmc.h> -#include <asm/arch/sdmmc_defs.h> -#endif - DECLARE_GLOBAL_DATA_PTR; u8 board_rev; @@ -38,23 +33,6 @@ u8 board_rev; #define EEPROM_REV_OFFSET 0x3F00 #define EEPROM_MAC_OFFSET 0x3F06 -#ifdef CONFIG_MMC_DAVINCI -static struct davinci_mmc mmc_sd0 = { - .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, - .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .version = MMC_CTLR_VERSION_2, -}; - -int board_mmc_init(bd_t *bis) -{ - mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); - - /* Add slot-0 to mmc subsystem */ - return davinci_mmc_init(bis, &mmc_sd0); -} -#endif - const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(spi0_pins_base), PINMUX_ITEM(spi0_pins_scs0), diff --git a/board/phytec/phycore_am335x_r2/Kconfig b/board/phytec/phycore_am335x_r2/Kconfig new file mode 100644 index 0000000000..77055e043c --- /dev/null +++ b/board/phytec/phycore_am335x_r2/Kconfig @@ -0,0 +1,15 @@ +if TARGET_PHYCORE_AM335X_R2 + +config SYS_BOARD + default "phycore_am335x_r2" + +config SYS_VENDOR + default "phytec" + +config SYS_SOC + default "am33xx" + +config SYS_CONFIG_NAME + default "phycore_am335x_r2" + +endif diff --git a/board/phytec/phycore_am335x_r2/MAINTAINERS b/board/phytec/phycore_am335x_r2/MAINTAINERS new file mode 100644 index 0000000000..e56f30fdc0 --- /dev/null +++ b/board/phytec/phycore_am335x_r2/MAINTAINERS @@ -0,0 +1,7 @@ +phyCORE AM335x R2 WEGA BOARD +M: Niel Fourie <lusus@denx.de> +M: Parthiban Nallathambi <pn@denx.de> +S: Maintained +F: board/phytec/phycore_am335x_r2 +F: include/configs/phycore_am335x_r2.h +F: configs/phycore-am335x-r2-wega_defconfig diff --git a/board/phytec/phycore_am335x_r2/Makefile b/board/phytec/phycore_am335x_r2/Makefile new file mode 100644 index 0000000000..ff6f8b4221 --- /dev/null +++ b/board/phytec/phycore_am335x_r2/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Makefile +# +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + +ifdef CONFIG_SPL_BUILD +obj-y += mux.o +endif + +obj-y += board.o diff --git a/board/phytec/phycore_am335x_r2/board.c b/board/phytec/phycore_am335x_r2/board.c new file mode 100644 index 0000000000..02d6c27cec --- /dev/null +++ b/board/phytec/phycore_am335x_r2/board.c @@ -0,0 +1,260 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * board.c + * + * Board functions for Phytec phyCORE-AM335x R2 (PCL060 / PCM060) based boards + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Lars Poeschel, Lemonage Software GmbH + * Copyright (C) 2015 Wadim Egorov, PHYTEC Messtechnik GmbH + * Copyright (C) 2019 DENX Software Engineering GmbH + */ + +#include <common.h> +#include <spl.h> +#include <asm/arch/cpu.h> +#include <asm/arch/ddr_defs.h> +#include <asm/arch/clock.h> +#include <asm/arch/sys_proto.h> +#include <power/tps65910.h> +#include <jffs2/load_kernel.h> +#include <mtd_node.h> +#include <fdt_support.h> +#include "board.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SPL_BUILD + +static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; + +/* DDR RAM defines */ +#define DDR_CLK_MHZ 400 /* DDR_DPLL_MULT value */ + +#define OSC (V_OSCK / 1000000) +const struct dpll_params dpll_ddr = { + DDR_CLK_MHZ, OSC - 1, 1, -1, -1, -1, -1}; + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + +const struct ctrl_ioregs ioregs = { + .cm0ioctl = 0x18B, + .cm1ioctl = 0x18B, + .cm2ioctl = 0x18B, + .dt0ioctl = 0x18B, + .dt1ioctl = 0x18B, +}; + +static const struct cmd_control ddr3_cmd_ctrl_data = { + .cmd0csratio = 0x80, + .cmd0iclkout = 0x0, + + .cmd1csratio = 0x80, + .cmd1iclkout = 0x0, + + .cmd2csratio = 0x80, + .cmd2iclkout = 0x0, +}; + +enum { + PHYCORE_R2_MT41K128M16JT_256MB, + PHYCORE_R2_MT41K256M16TW107IT_512MB, + PHYCORE_R2_MT41K512M16HA125IT_1024MB, +}; + +struct am335x_sdram_timings { + struct emif_regs ddr3_emif_reg_data; + struct ddr_data ddr3_data; +}; + +static struct am335x_sdram_timings physom_timings[] = { + [PHYCORE_R2_MT41K128M16JT_256MB] = { + .ddr3_emif_reg_data = { + .sdram_config = 0x61C052B2, + .ref_ctrl = 0x00000C30, + .sdram_tim1 = 0x0AAAD4DB, + .sdram_tim2 = 0x26437FDA, + .sdram_tim3 = 0x501F83FF, + .zq_config = 0x50074BE4, + .emif_ddr_phy_ctlr_1 = 0x7, + .ocp_config = 0x003d3d3d, + }, + .ddr3_data = { + .datardsratio0 = 0x36, + .datawdsratio0 = 0x38, + .datafwsratio0 = 0x99, + .datawrsratio0 = 0x73, + }, + }, + [PHYCORE_R2_MT41K256M16TW107IT_512MB] = { + .ddr3_emif_reg_data = { + .sdram_config = 0x61C05332, + .ref_ctrl = 0x00000C30, + .sdram_tim1 = 0x0AAAD4DB, + .sdram_tim2 = 0x266B7FDA, + .sdram_tim3 = 0x501F867F, + .zq_config = 0x50074BE4, + .emif_ddr_phy_ctlr_1 = 0x7, + .ocp_config = 0x003d3d3d, + }, + .ddr3_data = { + .datardsratio0 = 0x37, + .datawdsratio0 = 0x38, + .datafwsratio0 = 0x92, + .datawrsratio0 = 0x72, + }, + }, + [PHYCORE_R2_MT41K512M16HA125IT_1024MB] = { + .ddr3_emif_reg_data = { + .sdram_config = 0x61C053B2, + .ref_ctrl = 0x00000C30, + .sdram_tim1 = 0x0AAAD4DB, + .sdram_tim2 = 0x268F7FDA, + .sdram_tim3 = 0x501F88BF, + .zq_config = 0x50074BE4, + .emif_ddr_phy_ctlr_1 = 0x7, + .ocp_config = 0x003d3d3d, + }, + .ddr3_data = { + .datardsratio0 = 0x38, + .datawdsratio0 = 0x4d, + .datafwsratio0 = 0x9d, + .datawrsratio0 = 0x82, + }, + }, +}; + +void sdram_init(void) +{ + /* Configure memory to maximum supported size for detection */ + int ram_type_index = PHYCORE_R2_MT41K512M16HA125IT_1024MB; + + config_ddr(DDR_CLK_MHZ, &ioregs, + &physom_timings[ram_type_index].ddr3_data, + &ddr3_cmd_ctrl_data, + &physom_timings[ram_type_index].ddr3_emif_reg_data, + 0); + + /* Detect memory physically present */ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_MAX_RAM_BANK_SIZE); + + /* Reconfigure memory for actual detected size */ + switch (gd->ram_size) { + case SZ_1G: + ram_type_index = PHYCORE_R2_MT41K512M16HA125IT_1024MB; + break; + case SZ_512M: + ram_type_index = PHYCORE_R2_MT41K256M16TW107IT_512MB; + break; + case SZ_256M: + default: + ram_type_index = PHYCORE_R2_MT41K128M16JT_256MB; + break; + } + config_ddr(DDR_CLK_MHZ, &ioregs, + &physom_timings[ram_type_index].ddr3_data, + &ddr3_cmd_ctrl_data, + &physom_timings[ram_type_index].ddr3_emif_reg_data, + 0); +} + +const struct dpll_params *get_dpll_mpu_params(void) +{ + int ind = get_sys_clk_index(); + int freq = am335x_get_efuse_mpu_max_freq(cdev); + + switch (freq) { + case MPUPLL_M_1000: + return &dpll_mpu_opp[ind][5]; + case MPUPLL_M_800: + return &dpll_mpu_opp[ind][4]; + case MPUPLL_M_720: + return &dpll_mpu_opp[ind][3]; + case MPUPLL_M_600: + return &dpll_mpu_opp[ind][2]; + case MPUPLL_M_500: + return &dpll_mpu_opp100; + case MPUPLL_M_300: + return &dpll_mpu_opp[ind][0]; + } + + return &dpll_mpu_opp[ind][0]; +} + +static void scale_vcores_generic(int freq) +{ + int sil_rev, mpu_vdd; + + /* + * We use a TPS65910 PMIC. For all MPU frequencies we support we use a + * CORE voltage of 1.10V. For MPU voltage we need to switch based on + * the frequency we are running at. + */ + if (power_tps65910_init(0)) + return; + + /* + * Depending on MPU clock and PG we will need a different + * VDD to drive at that speed. + */ + sil_rev = readl(&cdev->deviceid) >> 28; + mpu_vdd = am335x_get_tps65910_mpu_vdd(sil_rev, freq); + + /* Tell the TPS65910 to use i2c */ + tps65910_set_i2c_control(); + + /* First update MPU voltage. */ + if (tps65910_voltage_update(MPU, mpu_vdd)) + return; + + /* Second, update the CORE voltage. */ + if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_0)) + return; +} + +void scale_vcores(void) +{ + int freq; + + freq = am335x_get_efuse_mpu_max_freq(cdev); + scale_vcores_generic(freq); +} + +void set_uart_mux_conf(void) +{ + enable_uart0_pin_mux(); +} + +void set_mux_conf_regs(void) +{ + enable_i2c0_pin_mux(); + enable_board_pin_mux(); +} +#endif + +/* + * Basic board specific setup. Pinmux has been handled already. + */ +int board_init(void) +{ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + return 0; +} + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_FDT_FIXUP_PARTITIONS + static const struct node_info nodes[] = { + { "ti,omap2-nand", MTD_DEV_TYPE_NAND, }, + }; + + fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); +#endif + return 0; +} +#endif diff --git a/board/phytec/phycore_am335x_r2/board.h b/board/phytec/phycore_am335x_r2/board.h new file mode 100644 index 0000000000..1b90861dd3 --- /dev/null +++ b/board/phytec/phycore_am335x_r2/board.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * board.h + * + * Phytec phyCORE-AM335x (PCL060 / PCM060) boards information header + * + * Copyright (C) 2013 Lars Poeschel, Lemonage Software GmbH + * Copyright (C) 2019 DENX Software Engineering GmbH + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * We have three pin mux functions that must exist. We must be able to enable + * uart0, for initial output and i2c0 to access the PMIC. We then have a main + * pinmux function that can be overridden to enable all other pinmux that + * is required on the board. + */ +void enable_uart0_pin_mux(void); +void enable_i2c0_pin_mux(void); +void enable_board_pin_mux(void); +void enable_cbmux_pin_mux(void); +#endif diff --git a/board/phytec/phycore_am335x_r2/mux.c b/board/phytec/phycore_am335x_r2/mux.c new file mode 100644 index 0000000000..5fd452e66d --- /dev/null +++ b/board/phytec/phycore_am335x_r2/mux.c @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * mux.c + * + * Copyright (C) 2013 Lars Poeschel, Lemonage Software GmbH + * Copyright (C) 2019 DENX Software Engineering GmbH + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include "board.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +#ifdef CONFIG_MMC +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ + {-1}, +}; +#endif + +static struct module_pin_mux i2c0_pin_mux[] = { + {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ + {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ + {-1}, +}; + +#ifdef CONFIG_SPI +static struct module_pin_mux spi0_pin_mux[] = { + {OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_SCLK */ + {OFFSET(spi0_d0), (MODE(0) | RXACTIVE | + PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */ + {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_D1 */ + {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE | + PULLUDEN | PULLUP_EN)}, /* SPI0_CS0 */ + {-1}, +}; +#endif + +static struct module_pin_mux rmii1_pin_mux[] = { + {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS */ + {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE}, /* RMII1_RXERR */ + {OFFSET(mii1_txen), MODE(1)}, /* RMII1_TXEN */ + {OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TXD1 */ + {OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TXD0 */ + {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RXD1 */ + {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RXD0 */ + {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */ + {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ + {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RMII1_REFCLK */ + {-1}, +}; + +static struct module_pin_mux cbmux_pin_mux[] = { + {OFFSET(uart0_ctsn), MODE(7) | RXACTIVE | PULLDOWN_EN}, /* JP3 */ + {OFFSET(uart0_rtsn), MODE(7) | RXACTIVE | PULLUP_EN}, /* JP4 */ + {-1}, +}; + +#ifdef CONFIG_NAND +static struct module_pin_mux nand_pin_mux[] = { + {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ + {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ + {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ + {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ + {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ + {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ + {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ + {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ + {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ + {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ + {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ + {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ + {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ + {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ + {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ + {-1}, +}; +#endif + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +void enable_i2c0_pin_mux(void) +{ + configure_module_pin_mux(i2c0_pin_mux); +} + +void enable_board_pin_mux(void) +{ + configure_module_pin_mux(rmii1_pin_mux); + configure_module_pin_mux(mmc0_pin_mux); + configure_module_pin_mux(cbmux_pin_mux); +#ifdef CONFIG_NAND + configure_module_pin_mux(nand_pin_mux); +#endif +#ifdef CONFIG_SPI + configure_module_pin_mux(spi0_pin_mux); +#endif +} diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index 0c7b4ee415..f1e7aab629 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -17,9 +17,6 @@ #include <asm/arch/at91_matrix.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> - -#include <lcd.h> -#include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) #include <net.h> #endif @@ -110,105 +107,6 @@ static void pm9261_dm9000_hw_init(void) } #endif -#ifdef CONFIG_LCD -vidinfo_t panel_info = { - .vl_col = 240, - .vl_row = 320, - .vl_clk = 4965000, - .vl_sync = ATMEL_LCDC_INVLINE_INVERTED | - ATMEL_LCDC_INVFRAME_INVERTED, - .vl_bpix = 3, - .vl_tft = 1, - .vl_hsync_len = 5, - .vl_left_margin = 1, - .vl_right_margin = 33, - .vl_vsync_len = 1, - .vl_upper_margin = 1, - .vl_lower_margin = 0, - .mmio = ATMEL_BASE_LCDC, -}; - -void lcd_enable(void) -{ - at91_set_pio_value(AT91_PIO_PORTA, 22, 0); /* power up */ -} - -void lcd_disable(void) -{ - at91_set_pio_value(AT91_PIO_PORTA, 22, 1); /* power down */ -} - -static void pm9261_lcd_hw_init(void) -{ - at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* LCDHSYNC */ - at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* LCDDOTCK */ - at91_set_a_periph(AT91_PIO_PORTB, 3, 0); /* LCDDEN */ - at91_set_a_periph(AT91_PIO_PORTB, 4, 0); /* LCDCC */ - at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* LCDD2 */ - at91_set_a_periph(AT91_PIO_PORTB, 8, 0); /* LCDD3 */ - at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* LCDD4 */ - at91_set_a_periph(AT91_PIO_PORTB, 10, 0); /* LCDD5 */ - at91_set_a_periph(AT91_PIO_PORTB, 11, 0); /* LCDD6 */ - at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* LCDD7 */ - at91_set_a_periph(AT91_PIO_PORTB, 15, 0); /* LCDD10 */ - at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* LCDD11 */ - at91_set_a_periph(AT91_PIO_PORTB, 17, 0); /* LCDD12 */ - at91_set_a_periph(AT91_PIO_PORTB, 18, 0); /* LCDD13 */ - at91_set_a_periph(AT91_PIO_PORTB, 19, 0); /* LCDD14 */ - at91_set_a_periph(AT91_PIO_PORTB, 20, 0); /* LCDD15 */ - at91_set_b_periph(AT91_PIO_PORTB, 23, 0); /* LCDD18 */ - at91_set_b_periph(AT91_PIO_PORTB, 24, 0); /* LCDD19 */ - at91_set_b_periph(AT91_PIO_PORTB, 25, 0); /* LCDD20 */ - at91_set_b_periph(AT91_PIO_PORTB, 26, 0); /* LCDD21 */ - at91_set_b_periph(AT91_PIO_PORTB, 27, 0); /* LCDD22 */ - at91_set_b_periph(AT91_PIO_PORTB, 28, 0); /* LCDD23 */ - - at91_system_clk_enable(AT91_PMC_HCK1); - - gd->fb_base = ATMEL_BASE_SRAM; -} - -#ifdef CONFIG_LCD_INFO -#include <nand.h> -#include <version.h> - -extern flash_info_t flash_info[]; - -void lcd_show_board_info(void) -{ - ulong dram_size, nand_size, flash_size; - int i; - char temp[32]; - - lcd_printf ("%s\n", U_BOOT_VERSION); - lcd_printf ("(C) 2009 Ronetix GmbH\n"); - lcd_printf ("support@ronetix.at\n"); - lcd_printf ("%s CPU at %s MHz", - CONFIG_SYS_AT91_CPU_NAME, - strmhz(temp, get_cpu_clk_rate())); - - dram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - dram_size += gd->bd->bi_dram[i].size; - - nand_size = 0; - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += get_nand_dev_by_index(i)->size; - - flash_size = 0; - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) - flash_size += flash_info[i].size; - - lcd_printf ("%ld MB SDRAM, %ld MB NAND\n%ld MB NOR Flash\n" - "%ld MB DataFlash\n", - dram_size >> 20, - nand_size >> 20, - flash_size >> 20); -} -#endif /* CONFIG_LCD_INFO */ - -#endif /* CONFIG_LCD */ - int board_early_init_f(void) { return 0; @@ -228,9 +126,6 @@ int board_init(void) #ifdef CONFIG_DRIVER_DM9000 pm9261_dm9000_hw_init(); #endif -#ifdef CONFIG_LCD - pm9261_lcd_hw_init(); -#endif return 0; } diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index 692288d52e..2da39c4acd 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -17,8 +17,6 @@ #include <asm/arch/at91_matrix.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> -#include <lcd.h> -#include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include <net.h> #endif @@ -109,32 +107,6 @@ static void pm9263_macb_hw_init(void) #endif #ifdef CONFIG_LCD -vidinfo_t panel_info = { - .vl_col = 240, - .vl_row = 320, - .vl_clk = 4965000, - .vl_sync = ATMEL_LCDC_INVLINE_INVERTED | - ATMEL_LCDC_INVFRAME_INVERTED, - .vl_bpix = 3, - .vl_tft = 1, - .vl_hsync_len = 5, - .vl_left_margin = 1, - .vl_right_margin = 33, - .vl_vsync_len = 1, - .vl_upper_margin = 1, - .vl_lower_margin = 0, - .mmio = ATMEL_BASE_LCDC, -}; - -void lcd_enable(void) -{ - at91_set_pio_value(AT91_PIO_PORTA, 22, 1); /* power up */ -} - -void lcd_disable(void) -{ - at91_set_pio_value(AT91_PIO_PORTA, 22, 0); /* power down */ -} #ifdef CONFIG_LCD_IN_PSRAM @@ -226,32 +198,6 @@ static int pm9263_lcd_hw_psram_init(void) static void pm9263_lcd_hw_init(void) { - at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDVSYNC */ - at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */ - at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */ - at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */ - at91_set_b_periph(AT91_PIO_PORTB, 9, 0); /* LCDCC */ - at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD2 */ - at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD3 */ - at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD4 */ - at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD5 */ - at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD6 */ - at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD7 */ - at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD10 */ - at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD11 */ - at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD12 */ - at91_set_b_periph(AT91_PIO_PORTC, 12, 0); /* LCDD13 */ - at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD14 */ - at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD15 */ - at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD18 */ - at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD19 */ - at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDD20 */ - at91_set_b_periph(AT91_PIO_PORTC, 17, 0); /* LCDD21 */ - at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */ - at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */ - - at91_periph_clk_enable(ATMEL_ID_LCDC); - /* Power Control */ at91_set_pio_output(AT91_PIO_PORTA, 22, 1); at91_set_pio_value(AT91_PIO_PORTA, 22, 0); /* power down */ @@ -267,45 +213,6 @@ static void pm9263_lcd_hw_init(void) } -#ifdef CONFIG_LCD_INFO -#include <nand.h> -#include <version.h> - -extern flash_info_t flash_info[]; - -void lcd_show_board_info(void) -{ - ulong dram_size, nand_size, flash_size; - int i; - char temp[32]; - - lcd_printf ("%s\n", U_BOOT_VERSION); - lcd_printf ("(C) 2009 Ronetix GmbH\n"); - lcd_printf ("support@ronetix.at\n"); - lcd_printf ("%s CPU at %s MHz", - CONFIG_SYS_AT91_CPU_NAME, - strmhz(temp, get_cpu_clk_rate())); - - dram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - dram_size += gd->bd->bi_dram[i].size; - - nand_size = 0; - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += get_nand_dev_by_index(i)->size; - - flash_size = 0; - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) - flash_size += flash_info[i].size; - - lcd_printf ("%ld MB SDRAM, %ld MB NAND\n%ld MB NOR Flash\n" - "4 MB PSRAM\n", - dram_size >> 20, - nand_size >> 20, - flash_size >> 20); -} -#endif /* CONFIG_LCD_INFO */ - #endif /* CONFIG_LCD */ int board_early_init_f(void) diff --git a/board/sandbox/README.sandbox b/board/sandbox/README.sandbox index 48c1e2b9e7..c10dd444df 100644 --- a/board/sandbox/README.sandbox +++ b/board/sandbox/README.sandbox @@ -435,6 +435,27 @@ board_init_f() and board_init_r(). This approach can be used on normal boards as well as sandbox. +SDL_CONFIG +---------- + +If sdl-config is on a different path from the default, set the SDL_CONFIG +environment variable to the correct pathname before building U-Boot. + + +Using valgrind / memcheck +------------------------- + +It is possible to run U-Boot under valgrind to check memory allocations: + + valgrind u-boot + +If you are running sandbox SPL or TPL, then valgrind will not by default +notice when U-Boot jumps from TPL to SPL, or from SPL to U-Boot proper. To +fix this, use: + + valgrind --trace-children=yes u-boot + + Testing ------- diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README index 0b0e98de90..6171ce66f4 100644 --- a/board/solidrun/clearfog/README +++ b/board/solidrun/clearfog/README @@ -40,6 +40,12 @@ Install U-Boot on eMMC boot partition from Linux running on Clearfog: Note that the SD card is not accessible when the Clearfog SOM has eMMC. Consider initial boot from UART (see below). +Install U-Boot on SATA: +----------------------- + +When loading the main U-Boot image from raw SATA sector, set +CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR to 0x141. + Boot selection: --------------- diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index daecb4af3e..93408047b2 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -30,11 +30,6 @@ #include <linux/usb/musb.h> #include "evm.h" -#ifdef CONFIG_USB_EHCI_HCD -#include <usb.h> -#include <asm/ehci-omap.h> -#endif - #define OMAP3EVM_GPIO_ETH_RST_GEN1 64 #define OMAP3EVM_GPIO_ETH_RST_GEN2 7 @@ -307,32 +302,6 @@ void board_mmc_power_init(void) } #endif /* CONFIG_MMC */ -#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD) -/* Call usb_stop() before starting the kernel */ -void show_boot_progress(int val) -{ - if (val == BOOTSTAGE_ID_RUN_OS) - usb_stop(); -} - -static struct omap_usbhs_board_data usbhs_bdata = { - .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED -}; - -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); -} - -int ehci_hcd_stop(int index) -{ - return omap_ehci_hcd_stop(); -} -#endif /* CONFIG_USB_EHCI_HCD */ - #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET) int board_eth_init(bd_t *bis) { diff --git a/cmd/Kconfig b/cmd/Kconfig index 3afb760a81..7f6bca81a9 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -441,6 +441,19 @@ config CMD_NVEDIT_EFI If enabled, we are allowed to set/print UEFI variables using "env" command with "-e" option without knowing details. +config CMD_NVEDIT_INFO + bool "env info - print or evaluate environment information" + help + Print environment information: + - env_valid : is environment valid + - env_ready : is environment imported into hash table + - env_use_default : is default environment used + + This command can be optionally used for evaluation in scripts: + [-d] : evaluate whether default environment is used + [-p] : evaluate whether environment can be persisted + The result of multiple evaluations will be combined with AND. + endmenu menu "Memory commands" diff --git a/cmd/nvedit.c b/cmd/nvedit.c index 49d3b5bdf4..7e468ab39d 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -1163,6 +1163,106 @@ sep_err: } #endif +#if defined(CONFIG_CMD_NVEDIT_INFO) +/* + * print_env_info - print environment information + */ +static int print_env_info(void) +{ + const char *value; + + /* print environment validity value */ + switch (gd->env_valid) { + case ENV_INVALID: + value = "invalid"; + break; + case ENV_VALID: + value = "valid"; + break; + case ENV_REDUND: + value = "redundant"; + break; + default: + value = "unknown"; + break; + } + printf("env_valid = %s\n", value); + + /* print environment ready flag */ + value = gd->flags & GD_FLG_ENV_READY ? "true" : "false"; + printf("env_ready = %s\n", value); + + /* print environment using default flag */ + value = gd->flags & GD_FLG_ENV_DEFAULT ? "true" : "false"; + printf("env_use_default = %s\n", value); + + return CMD_RET_SUCCESS; +} + +#define ENV_INFO_IS_DEFAULT BIT(0) /* default environment bit mask */ +#define ENV_INFO_IS_PERSISTED BIT(1) /* environment persistence bit mask */ + +/* + * env info - display environment information + * env info [-d] - evaluate whether default environment is used + * env info [-p] - evaluate whether environment can be persisted + */ +static int do_env_info(cmd_tbl_t *cmdtp, int flag, + int argc, char * const argv[]) +{ + int eval_flags = 0; + int eval_results = 0; + + /* display environment information */ + if (argc <= 1) + return print_env_info(); + + /* process options */ + while (--argc > 0 && **++argv == '-') { + char *arg = *argv; + + while (*++arg) { + switch (*arg) { + case 'd': + eval_flags |= ENV_INFO_IS_DEFAULT; + break; + case 'p': + eval_flags |= ENV_INFO_IS_PERSISTED; + break; + default: + return CMD_RET_USAGE; + } + } + } + + /* evaluate whether default environment is used */ + if (eval_flags & ENV_INFO_IS_DEFAULT) { + if (gd->flags & GD_FLG_ENV_DEFAULT) { + printf("Default environment is used\n"); + eval_results |= ENV_INFO_IS_DEFAULT; + } else { + printf("Environment was loaded from persistent storage\n"); + } + } + + /* evaluate whether environment can be persisted */ + if (eval_flags & ENV_INFO_IS_PERSISTED) { +#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE) + printf("Environment can be persisted\n"); + eval_results |= ENV_INFO_IS_PERSISTED; +#else + printf("Environment cannot be persisted\n"); +#endif + } + + /* The result of evaluations is combined with AND */ + if (eval_flags != eval_results) + return CMD_RET_FAILURE; + + return CMD_RET_SUCCESS; +} +#endif + #if defined(CONFIG_CMD_ENV_EXISTS) static int do_env_exists(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -1207,6 +1307,9 @@ static cmd_tbl_t cmd_env_sub[] = { #if defined(CONFIG_CMD_IMPORTENV) U_BOOT_CMD_MKENT(import, 5, 0, do_env_import, "", ""), #endif +#if defined(CONFIG_CMD_NVEDIT_INFO) + U_BOOT_CMD_MKENT(info, 2, 0, do_env_info, "", ""), +#endif U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""), #if defined(CONFIG_CMD_RUN) U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""), @@ -1279,6 +1382,11 @@ static char env_help_text[] = #if defined(CONFIG_CMD_IMPORTENV) "env import [-d] [-t [-r] | -b | -c] addr [size] [var ...] - import environment\n" #endif +#if defined(CONFIG_CMD_NVEDIT_INFO) + "env info - display environment information\n" + "env info [-d] - whether default environment is used\n" + "env info [-p] - whether environment can be persisted\n" +#endif "env print [-a | name ...] - print environment\n" #if defined(CONFIG_CMD_NVEDIT_EFI) "env print -e [name ...] - print UEFI environment\n" diff --git a/cmd/trace.c b/cmd/trace.c index 26bf0960d4..7d328f88be 100644 --- a/cmd/trace.c +++ b/cmd/trace.c @@ -30,8 +30,7 @@ static int get_args(int argc, char * const argv[], char **buff, static int create_func_list(int argc, char * const argv[]) { - size_t buff_size, avail, buff_ptr, used; - unsigned int needed; + size_t buff_size, avail, buff_ptr, needed, used; char *buff; int err; @@ -41,7 +40,7 @@ static int create_func_list(int argc, char * const argv[]) avail = buff_size - buff_ptr; err = trace_list_functions(buff + buff_ptr, avail, &needed); if (err) - printf("Error: truncated (%#x bytes needed)\n", needed); + printf("Error: truncated (%#zx bytes needed)\n", needed); used = min(avail, (size_t)needed); printf("Function trace dumped to %08lx, size %#zx\n", (ulong)map_to_sysmem(buff + buff_ptr), used); @@ -54,8 +53,7 @@ static int create_func_list(int argc, char * const argv[]) static int create_call_list(int argc, char * const argv[]) { - size_t buff_size, avail, buff_ptr, used; - unsigned int needed; + size_t buff_size, avail, buff_ptr, needed, used; char *buff; int err; @@ -65,7 +63,7 @@ static int create_call_list(int argc, char * const argv[]) avail = buff_size - buff_ptr; err = trace_list_calls(buff + buff_ptr, avail, &needed); if (err) - printf("Error: truncated (%#x bytes needed)\n", needed); + printf("Error: truncated (%#zx bytes needed)\n", needed); used = min(avail, (size_t)needed); printf("Call list dumped to %08lx, size %#zx\n", (ulong)map_to_sysmem(buff + buff_ptr), used); diff --git a/common/Kconfig b/common/Kconfig index af66496e75..4865a4dfc8 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -69,6 +69,13 @@ config SPL_BOOTSTAGE_RECORD_COUNT This is the size of the bootstage record list and is the maximum number of bootstage records that can be recorded. +config TPL_BOOTSTAGE_RECORD_COUNT + int "Number of boot stage records to store for TPL" + default 5 + help + This is the size of the bootstage record list and is the maximum + number of bootstage records that can be recorded. + config BOOTSTAGE_FDT bool "Store boot timing information in the OS device tree" depends on BOOTSTAGE diff --git a/common/board_f.c b/common/board_f.c index c25eb188fb..4760d728f3 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -442,8 +442,8 @@ static int reserve_trace(void) #ifdef CONFIG_TRACE gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); - debug("Reserving %dk for trace data at: %08lx\n", - CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); + debug("Reserving %luk for trace data at: %08lx\n", + (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); #endif return 0; @@ -839,7 +839,7 @@ static const init_fnc_t init_sequence_f[] = { #ifdef CONFIG_OF_CONTROL fdtdec_setup, #endif -#ifdef CONFIG_TRACE +#ifdef CONFIG_TRACE_EARLY trace_early_init, #endif initf_malloc, diff --git a/common/board_r.c b/common/board_r.c index df24021f2c..abc31b17b8 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -49,6 +49,9 @@ #include <linux/err.h> #include <efi_loader.h> #include <wdt.h> +#if defined(CONFIG_DM_GPIO_HOG) +#include <asm/gpio.h> +#endif DECLARE_GLOBAL_DATA_PTR; @@ -796,6 +799,9 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_CMD_NET initr_ethaddr, #endif +#if defined(CONFIG_DM_GPIO_HOG) + gpio_hog_probe_all, +#endif #ifdef CONFIG_BOARD_LATE_INIT board_late_init, #endif diff --git a/common/spl/Kconfig b/common/spl/Kconfig index a48617ddcd..126931bace 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -572,6 +572,23 @@ config SPL_MMC_SUPPORT this option to build the drivers in drivers/mmc as part of an SPL build. +config SPL_MMC_TINY + bool "Tiny MMC framework in SPL" + depends on SPL_MMC_SUPPORT + default n + help + Enable MMC framework tinification support. This option is useful if + if your SPL is extremely size constrained. Heed the warning, enable + this option if and only if you know exactly what you are doing, if + you are reading this help text, you most likely have no idea :-) + + The MMC framework is reduced to bare minimum to be useful. No malloc + support is needed for the MMC framework operation with this option + enabled. The framework supports exactly one MMC device and exactly + one MMC driver. The MMC driver can be adjusted to avoid any malloc + operations too, which can remove the need for malloc support in SPL + and thus further reduce footprint. + config SPL_MMC_WRITE bool "MMC/SD/SDIO card support for write operations in SPL" depends on SPL_MMC_SUPPORT diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c index adfce1d527..f0af9f38d1 100644 --- a/common/spl/spl_sata.c +++ b/common/spl/spl_sata.c @@ -17,13 +17,23 @@ #include <fat.h> #include <image.h> +#ifndef CONFIG_SYS_SATA_FAT_BOOT_PARTITION +#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 +#endif + +#ifndef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +#endif + static int spl_sata_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { - int err; + int err = 0; struct blk_desc *stor_dev; +#if !defined(CONFIG_DM_SCSI) && !defined(CONFIG_AHCI) err = init_sata(CONFIG_SPL_SATA_BOOT_DEVICE); +#endif if (err) { #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT printf("spl: sata init failed: err - %d\n", err); @@ -43,9 +53,13 @@ static int spl_sata_load_image(struct spl_image_info *spl_image, CONFIG_SYS_SATA_FAT_BOOT_PARTITION)) #endif { - err = spl_load_image_fat(spl_image, stor_dev, + err = -ENOSYS; + + if (IS_ENABLED(CONFIG_SPL_FS_FAT)) { + err = spl_load_image_fat(spl_image, stor_dev, CONFIG_SYS_SATA_FAT_BOOT_PARTITION, - CONFIG_SPL_FS_LOAD_PAYLOAD_NAME); + CONFIG_SPL_FS_LOAD_PAYLOAD_NAME); + } } if (err) { puts("Error loading sata device\n"); diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index 26e1c91f29..df77cb89ca 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -7,6 +7,7 @@ CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_SF=y diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index 6264df0e02..071a889cd3 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -4,6 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_XC3_24G4XG=y CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_BEST_MATCH=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 32cd52c13e..78cca8eb56 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -23,12 +23,19 @@ CONFIG_CMD_SPI=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_DIAG=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="da850-lego-ev3" +CONFIG_DM=y +# CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SYS_I2C_DAVINCI=y +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=50000000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y -CONFIG_OF_LIBFDT=y # CONFIG_EFI_LOADER is not set diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index a336dc19ae..3e2ecf414a 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -67,6 +67,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +# CONFIG_USE_TINY_PRINTF is not set CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 41b94d377f..68865fa363 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -67,4 +67,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +# CONFIG_USE_TINY_PRINTF is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 05898d8d4c..759d3703cd 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -65,6 +65,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +# CONFIG_USE_TINY_PRINTF is not set CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 71709bc446..ddfa7ca430 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -65,4 +65,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +# CONFIG_USE_TINY_PRINTF is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index a3b662db2b..26d0e65589 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -66,7 +66,10 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OMAP3=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_MUSB_OMAP2PLUS=y CONFIG_USB_GADGET=y diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig new file mode 100644 index 0000000000..ef9fdb983e --- /dev/null +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -0,0 +1,82 @@ +CONFIG_ARM=y +CONFIG_ARCH_OMAP2PLUS=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_AM33XX=y +CONFIG_SYS_MPUCLK=1000 +CONFIG_TARGET_PHYCORE_AM335X_R2=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +# CONFIG_FIT is not set +CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_DEFAULT_FDT_FILE="am335x-wega-rdk.dtb" +CONFIG_VERSION_VARIABLE=y +CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_SPL=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_NAND=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=nand.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),512k(NAND.u-boot),512k(NAND.u-boot.backup1),256k(NAND.u-boot-env),-(NAND.UBI)" +CONFIG_CMD_UBI=y +CONFIG_DOS_PARTITION=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_ENV_OFFSET=0x000a0000 +CONFIG_ENV_FAT_INTERFACE="mmc" +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DM_I2C=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_OMAP_HS=y +CONFIG_MTD=y +CONFIG_NAND=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 +CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x100000 +CONFIG_DM_SPI_FLASH=y +CONFIG_DM_ETH=y +CONFIG_MII=y +CONFIG_DRIVER_TI_CPSW=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_OMAP3_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_TI=y +CONFIG_USB_GADGET=y +CONFIG_USB_ETHER=y +# CONFIG_OMAP_WATCHDOG is not set +CONFIG_FDT_FIXUP_PARTITIONS=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index 4a749321a0..33bf85865d 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -33,6 +33,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM=y +CONFIG_BLK=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_DM_GPIO=y @@ -54,5 +55,7 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y +CONFIG_DM_VIDEO=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 1c948b2ce5..3ab535ffb0 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -33,6 +33,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM=y +CONFIG_BLK=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_DM_GPIO=y @@ -52,5 +53,7 @@ CONFIG_ATMEL_USART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_LCD=y +CONFIG_DM_VIDEO=y diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig index fa546aa994..918d27c331 100644 --- a/configs/portl2_defconfig +++ b/configs/portl2_defconfig @@ -28,6 +28,8 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -42,4 +44,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 29a9df8ab0..827b8761cd 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -163,6 +163,7 @@ CONFIG_REMOTEPROC_SANDBOX=y CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_DM_RTC=y +CONFIG_RTC_RV8803=y CONFIG_SANDBOX_SERIAL=y CONFIG_SMEM=y CONFIG_SANDBOX_SMEM=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 6894262b89..61391a7acd 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -179,6 +179,7 @@ CONFIG_REMOTEPROC_SANDBOX=y CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_DM_RTC=y +CONFIG_RTC_RV8803=y CONFIG_DEBUG_UART_SANDBOX=y CONFIG_SANDBOX_SERIAL=y CONFIG_SMEM=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index d355cc3f3b..27034cfaa9 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -191,6 +191,7 @@ CONFIG_OSD=y CONFIG_SANDBOX_OSD=y CONFIG_FS_CBFS=y CONFIG_FS_CRAMFS=y +# CONFIG_USE_TINY_PRINTF is not set CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index 83f78776b7..3908ff80d6 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -1,7 +1,9 @@ CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_INIT_SP_RELATIVE=y CONFIG_ARM_SMCCC=y CONFIG_ARCH_UNIPHIER=y -CONFIG_SYS_TEXT_BASE=0x84000000 +CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ARCH_UNIPHIER_V8_MULTI=y diff --git a/doc/README.SPL b/doc/README.SPL index 7a30fefa96..6eed83f8c5 100644 --- a/doc/README.SPL +++ b/doc/README.SPL @@ -66,6 +66,22 @@ CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o) CONFIG_SPL_RAM_DEVICE (common/spl/spl.c) CONFIG_SPL_WATCHDOG_SUPPORT (drivers/watchdog/libwatchdog.o) +Device tree +----------- +The U-Boot device tree is filtered by the fdtgrep tools during the build +process to generate a much smaller device tree used in SPL (spl/u-boot-spl.dtb) +with: +- the mandatory nodes (/alias, /chosen, /config) +- the nodes with one pre-relocation property: + 'u-boot,dm-pre-reloc' or 'u-boot,dm-spl' + +ftgrep is also used to remove: +- the properties defined in CONFIG_OF_SPL_REMOVE_PROPS +- all the pre-relocation properties + ('u-boot,dm-pre-reloc', 'u-boot,dm-spl' and 'u-boot,dm-tpl') + +All the nodes remaining in the SPL devicetree are bound +(see driver-model/README.txt). Debugging --------- diff --git a/doc/README.TPL b/doc/README.TPL index 980debe777..c94129fdc9 100644 --- a/doc/README.TPL +++ b/doc/README.TPL @@ -34,6 +34,10 @@ determine which SPL options to choose based on whether CONFIG_TPL_BUILD is set. Source files can be compiled for TPL with options choosed in the board config file. +TPL use a small device tree (u-boot-tpl.dtb), containing only the nodes with +the pre-relocation properties: 'u-boot,dm-pre-reloc' and 'u-boot,dm-tpl' +(see README.SPL for details). + For example: spl/Makefile: diff --git a/doc/device-tree-bindings/gpio/gpio.txt b/doc/device-tree-bindings/gpio/gpio.txt index f7a158d858..e774439369 100644 --- a/doc/device-tree-bindings/gpio/gpio.txt +++ b/doc/device-tree-bindings/gpio/gpio.txt @@ -210,3 +210,58 @@ Example 2: Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2 are named "foo" and "bar". + +3) GPIO hog definitions +----------------------- + +The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism +providing automatic GPIO request and configuration as part of the +gpio-controller's driver probe function. + +Each GPIO hog definition is represented as a child node of the GPIO controller. +Required properties: +- gpio-hog: A property specifying that this child node represents a GPIO hog. +- gpios: Store the GPIO information (id, flags) for the GPIO to + affect. + + ! Not yet support more than one gpio ! + +Only one of the following properties scanned in the order shown below. +- input: A property specifying to set the GPIO direction as input. +- output-low A property specifying to set the GPIO direction as output with + the value low. +- output-high A property specifying to set the GPIO direction as output with + the value high. + +Optional properties: +- line-name: The GPIO label name. If not present the node name is used. + +Example: + + tca6416@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + #gpio-cells = <2>; + gpio-controller; + + env_reset { + gpio-hog; + input; + gpios = <6 GPIO_ACTIVE_LOW>; + }; + boot_rescue { + gpio-hog; + input; + gpios = <7 GPIO_ACTIVE_LOW>; + }; + }; + +For the above Example you can than access the gpio in your boardcode +with: + + desc = gpio_hog_lookup_name("boot_rescue.gpio-hog"); + if (desc) { + if (dm_gpio_get_value(desc)) + printf("\nBooting into Rescue System\n"); + else + printf("\nBoot normal\n"); diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt index 07b120d512..532a771f68 100644 --- a/doc/driver-model/README.txt +++ b/doc/driver-model/README.txt @@ -849,6 +849,10 @@ in the device tree node. For U-Boot proper you can use 'u-boot,dm-pre-proper' which means that it will be processed (and a driver bound) in U-Boot proper prior to relocation, but will not be available in SPL or TPL. +To reduce the size of SPL and TPL, only the nodes with pre-relocation properties +('u-boot,dm-pre-reloc', 'u-boot,dm-spl' or 'u-boot,dm-tpl') are keept in their +device trees (see README.SPL for details); the remaining nodes are always bound. + Then post relocation we throw that away and re-init driver model again. For drivers which require some sort of continuity between pre- and post-relocation devices, we can provide access to the pre-relocation diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index 33f4aa2418..1e6dad8692 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -56,6 +56,13 @@ config SPL_BLOCK_CACHE help This option enables the disk-block cache in SPL +config TPL_BLOCK_CACHE + bool "Use block device cache in TPL" + depends on TPL_BLK + default n + help + This option enables the disk-block cache in TPL + config IDE bool "Support IDE controllers" select HAVE_BLOCK_DEVICE diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 487b43ebda..c627a4bf85 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -18,8 +18,8 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { #if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_SLD8) ||\ defined(CONFIG_ARCH_UNIPHIER_PRO4) || defined(CONFIG_ARCH_UNIPHIER_PRO5) ||\ defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) - UNIPHIER_LD4_SYS_CLK_NAND(2), - UNIPHIER_CLK_RATE(3, 200000000), + UNIPHIER_LD4_SYS_CLK_NAND(2), /* nand */ + UNIPHIER_CLK_RATE(3, 200000000), /* nand-4x */ UNIPHIER_CLK_GATE_SIMPLE(6, 0x2104, 12), /* ether (Pro4, PXs2) */ UNIPHIER_CLK_GATE_SIMPLE(7, 0x2104, 5), /* ether-gb (Pro4) */ UNIPHIER_CLK_GATE_SIMPLE(8, 0x2104, 10), /* stdmac */ @@ -35,8 +35,9 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) - UNIPHIER_LD11_SYS_CLK_NAND(2), - UNIPHIER_CLK_RATE(3, 200000000), + UNIPHIER_LD11_SYS_CLK_NAND(2), /* nand */ + UNIPHIER_CLK_RATE(3, 200000000), /* nand-4x */ + UNIPHIER_CLK_GATE_SIMPLE(4, 0x210c, 2), /* emmc */ UNIPHIER_CLK_GATE_SIMPLE(6, 0x210c, 6), /* ether */ UNIPHIER_CLK_GATE_SIMPLE(8, 0x210c, 8), /* stdmac */ UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 14), /* usb30 (LD20) */ @@ -48,8 +49,9 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { #if defined(CONFIG_ARCH_UNIPHIER_PXS3) - UNIPHIER_LD11_SYS_CLK_NAND(2), - UNIPHIER_CLK_RATE(3, 200000000), + UNIPHIER_LD11_SYS_CLK_NAND(2), /* nand */ + UNIPHIER_CLK_RATE(3, 200000000), /* nand-4x */ + UNIPHIER_CLK_GATE_SIMPLE(4, 0x210c, 2), /* emmc */ UNIPHIER_CLK_GATE_SIMPLE(6, 0x210c, 9), /* ether0 */ UNIPHIER_CLK_GATE_SIMPLE(7, 0x210c, 10), /* ether1 */ UNIPHIER_CLK_GATE_SIMPLE(12, 0x210c, 4), /* usb30 (gio0) */ diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index dc9eb62893..b33296542f 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -260,7 +260,7 @@ int uclass_find_device_by_name(enum uclass_id id, const char *name, return ret; uclass_foreach_dev(dev, uc) { - if (!strncmp(dev->name, name, strlen(name))) { + if (!strcmp(dev->name, name)) { *devp = dev; return 0; } diff --git a/drivers/core/util.c b/drivers/core/util.c index 96e47dc707..60b939a924 100644 --- a/drivers/core/util.c +++ b/drivers/core/util.c @@ -42,6 +42,8 @@ bool dm_ofnode_pre_reloc(ofnode node) #else if (ofnode_read_bool(node, "u-boot,dm-pre-reloc")) return true; + if (ofnode_read_bool(node, "u-boot,dm-pre-proper")) + return true; /* * In regular builds individual spl and tpl handling both diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index be073335c2..068c6d02d8 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -14,6 +14,16 @@ config DM_GPIO particular GPIOs that they provide. The uclass interface is defined in include/asm-generic/gpio.h. +config DM_GPIO_HOG + bool "Enable GPIO hog support" + depends on DM_GPIO + default n + help + Enable gpio hog support + The GPIO chip may contain GPIO hog definitions. GPIO hogging + is a mechanism providing automatic GPIO request and config- + uration as part of the gpio-controller's driver probe function. + config ALTERA_PIO bool "Altera PIO driver" depends on DM_GPIO diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index da5e9ba6e5..308d0863ad 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -5,6 +5,9 @@ #include <common.h> #include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <dm/uclass-internal.h> #include <dt-bindings/gpio/gpio.h> #include <errno.h> #include <fdtdec.h> @@ -141,6 +144,118 @@ static int gpio_find_and_xlate(struct gpio_desc *desc, return gpio_xlate_offs_flags(desc->dev, desc, args); } +#if defined(CONFIG_DM_GPIO_HOG) + +struct gpio_hog_priv { + struct gpio_desc gpiod; +}; + +struct gpio_hog_data { + int gpiod_flags; + int value; + u32 val[2]; +}; + +static int gpio_hog_ofdata_to_platdata(struct udevice *dev) +{ + struct gpio_hog_data *plat = dev_get_platdata(dev); + const char *nodename; + int ret; + + plat->value = 0; + if (dev_read_bool(dev, "input")) { + plat->gpiod_flags = GPIOD_IS_IN; + } else if (dev_read_bool(dev, "output-high")) { + plat->value = 1; + plat->gpiod_flags = GPIOD_IS_OUT; + } else if (dev_read_bool(dev, "output-low")) { + plat->gpiod_flags = GPIOD_IS_OUT; + } else { + printf("%s: missing gpio-hog state.\n", __func__); + return -EINVAL; + } + ret = dev_read_u32_array(dev, "gpios", plat->val, 2); + if (ret) { + printf("%s: wrong gpios property, 2 values needed %d\n", + __func__, ret); + return ret; + } + nodename = dev_read_string(dev, "line-name"); + if (!nodename) + nodename = dev_read_name(dev); + device_set_name(dev, nodename); + + return 0; +} + +static int gpio_hog_probe(struct udevice *dev) +{ + struct gpio_hog_data *plat = dev_get_platdata(dev); + struct gpio_hog_priv *priv = dev_get_priv(dev); + int ret; + + ret = gpio_dev_request_index(dev->parent, dev->name, "gpio-hog", + plat->val[0], plat->gpiod_flags, + plat->val[1], &priv->gpiod); + if (ret < 0) { + debug("%s: node %s could not get gpio.\n", __func__, + dev->name); + return ret; + } + dm_gpio_set_dir(&priv->gpiod); + if (plat->gpiod_flags == GPIOD_IS_OUT) + dm_gpio_set_value(&priv->gpiod, plat->value); + + return 0; +} + +int gpio_hog_probe_all(void) +{ + struct udevice *dev; + int ret; + + for (uclass_first_device(UCLASS_NOP, &dev); + dev; + uclass_find_next_device(&dev)) { + if (dev->driver == DM_GET_DRIVER(gpio_hog)) { + ret = device_probe(dev); + if (ret) + return ret; + } + } + + return 0; +} + +struct gpio_desc *gpio_hog_lookup_name(const char *name) +{ + struct udevice *dev; + + gpio_hog_probe_all(); + if (!uclass_get_device_by_name(UCLASS_NOP, name, &dev)) { + struct gpio_hog_priv *priv = dev_get_priv(dev); + + return &priv->gpiod; + } + + return NULL; +} + +U_BOOT_DRIVER(gpio_hog) = { + .name = "gpio_hog", + .id = UCLASS_NOP, + .ofdata_to_platdata = gpio_hog_ofdata_to_platdata, + .probe = gpio_hog_probe, + .priv_auto_alloc_size = sizeof(struct gpio_hog_priv), + .platdata_auto_alloc_size = sizeof(struct gpio_hog_data), +}; +#else +struct gpio_desc *gpio_hog_lookup_name(const char *name) +{ + return NULL; +} +#endif + int dm_gpio_request(struct gpio_desc *desc, const char *label) { struct udevice *dev = desc->dev; @@ -640,22 +755,25 @@ int dm_gpio_get_values_as_int(const struct gpio_desc *desc_list, int count) return vector; } -static int gpio_request_tail(int ret, ofnode node, +static int gpio_request_tail(int ret, const char *nodename, struct ofnode_phandle_args *args, const char *list_name, int index, - struct gpio_desc *desc, int flags, bool add_index) + struct gpio_desc *desc, int flags, + bool add_index, struct udevice *dev) { - desc->dev = NULL; + desc->dev = dev; desc->offset = 0; desc->flags = 0; if (ret) goto err; - ret = uclass_get_device_by_ofnode(UCLASS_GPIO, args->node, - &desc->dev); - if (ret) { - debug("%s: uclass_get_device_by_ofnode failed\n", __func__); - goto err; + if (!desc->dev) { + ret = uclass_get_device_by_ofnode(UCLASS_GPIO, args->node, + &desc->dev); + if (ret) { + debug("%s: uclass_get_device_by_ofnode failed\n", __func__); + goto err; + } } ret = gpio_find_and_xlate(desc, args); if (ret) { @@ -663,8 +781,7 @@ static int gpio_request_tail(int ret, ofnode node, goto err; } ret = dm_gpio_requestf(desc, add_index ? "%s.%s%d" : "%s.%s", - ofnode_get_name(node), - list_name, index); + nodename, list_name, index); if (ret) { debug("%s: dm_gpio_requestf failed\n", __func__); goto err; @@ -678,7 +795,7 @@ static int gpio_request_tail(int ret, ofnode node, return 0; err: debug("%s: Node '%s', property '%s', failed to request GPIO index %d: %d\n", - __func__, ofnode_get_name(node), list_name, index, ret); + __func__, nodename, list_name, index, ret); return ret; } @@ -692,8 +809,8 @@ static int _gpio_request_by_name_nodev(ofnode node, const char *list_name, ret = ofnode_parse_phandle_with_args(node, list_name, "#gpio-cells", 0, index, &args); - return gpio_request_tail(ret, node, &args, list_name, index, desc, - flags, add_index); + return gpio_request_tail(ret, ofnode_get_name(node), &args, list_name, + index, desc, flags, add_index, NULL); } int gpio_request_by_name_nodev(ofnode node, const char *list_name, int index, @@ -707,13 +824,14 @@ int gpio_request_by_name(struct udevice *dev, const char *list_name, int index, struct gpio_desc *desc, int flags) { struct ofnode_phandle_args args; + ofnode node; int ret; ret = dev_read_phandle_with_args(dev, list_name, "#gpio-cells", 0, index, &args); - - return gpio_request_tail(ret, dev_ofnode(dev), &args, list_name, - index, desc, flags, index > 0); + node = dev_ofnode(dev); + return gpio_request_tail(ret, ofnode_get_name(node), &args, list_name, + index, desc, flags, index > 0, NULL); } int gpio_request_list_by_name_nodev(ofnode node, const char *list_name, @@ -854,8 +972,28 @@ static int gpio_pre_remove(struct udevice *dev) return gpio_renumber(dev); } +int gpio_dev_request_index(struct udevice *dev, const char *nodename, + char *list_name, int index, int flags, + int dtflags, struct gpio_desc *desc) +{ + struct ofnode_phandle_args args; + + args.node = ofnode_null(); + args.args_count = 2; + args.args[0] = index; + args.args[1] = dtflags; + + return gpio_request_tail(0, nodename, &args, list_name, index, desc, + flags, 0, dev); +} + static int gpio_post_bind(struct udevice *dev) { +#if defined(CONFIG_DM_GPIO_HOG) + struct udevice *child; + ofnode node; +#endif + #if defined(CONFIG_NEEDS_MANUAL_RELOC) struct dm_gpio_ops *ops = (struct dm_gpio_ops *)device_get_ops(dev); static int reloc_done; @@ -885,6 +1023,17 @@ static int gpio_post_bind(struct udevice *dev) reloc_done++; } #endif + +#if defined(CONFIG_DM_GPIO_HOG) + dev_for_each_subnode(node, dev) { + if (ofnode_read_bool(node, "gpio-hog")) { + const char *name = ofnode_get_name(node); + + device_bind_driver_to_node(dev, "gpio_hog", name, + node, &child); + } + } +#endif return 0; } diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index fa608cec1b..6afc6d9466 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -61,11 +61,63 @@ static int sandbox_swap_case_get_devfn(struct udevice *dev) return plat->devfn; } +static int sandbox_swap_case_use_ea(struct udevice *dev) +{ + return !!ofnode_get_property(dev->node, "use-ea", NULL); +} + +/* Please keep these macros in sync with ea_regs below */ +#define PCI_CAP_ID_EA_SIZE (sizeof(ea_regs) + 4) +#define PCI_CAP_ID_EA_ENTRY_CNT 4 +/* Hardcoded EA structure, excluding 1st DW. */ +static const u32 ea_regs[] = { + /* BEI=0, ES=2, BAR0 32b Base + 32b MaxOffset, I/O space */ + (2 << 8) | 2, + PCI_CAP_EA_BASE_LO0, + 0, + /* BEI=1, ES=2, BAR1 32b Base + 32b MaxOffset */ + (1 << 4) | 2, + PCI_CAP_EA_BASE_LO1, + MEM_TEXT_SIZE - 1, + /* BEI=2, ES=3, BAR2 64b Base + 32b MaxOffset */ + (2 << 4) | 3, + PCI_CAP_EA_BASE_LO2 | PCI_EA_IS_64, + PCI_CAP_EA_SIZE_LO, + PCI_CAP_EA_BASE_HI2, + /* BEI=4, ES=4, BAR4 64b Base + 64b MaxOffset */ + (4 << 4) | 4, + PCI_CAP_EA_BASE_LO4 | PCI_EA_IS_64, + PCI_CAP_EA_SIZE_LO | PCI_EA_IS_64, + PCI_CAP_EA_BASE_HI4, + PCI_CAP_EA_SIZE_HI, +}; + +static int sandbox_swap_case_read_ea(struct udevice *emul, uint offset, + ulong *valuep, enum pci_size_t size) +{ + u32 reg; + + offset = offset - PCI_CAP_ID_EA_OFFSET - 4; + reg = ea_regs[offset >> 2]; + reg >>= (offset % 4) * 8; + + *valuep = reg; + return 0; +} + static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, ulong *valuep, enum pci_size_t size) { struct swap_case_platdata *plat = dev_get_platdata(emul); + /* + * The content of the EA capability structure is handled elsewhere to + * keep the switch/case below sane + */ + if (offset > PCI_CAP_ID_EA_OFFSET + PCI_CAP_LIST_NEXT && + offset < PCI_CAP_ID_EA_OFFSET + PCI_CAP_ID_EA_SIZE) + return sandbox_swap_case_read_ea(emul, offset, valuep, size); + switch (offset) { case PCI_COMMAND: *valuep = plat->command; @@ -134,9 +186,21 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, *valuep = PCI_CAP_ID_MSIX_OFFSET; break; case PCI_CAP_ID_MSIX_OFFSET: - *valuep = PCI_CAP_ID_MSIX; + if (sandbox_swap_case_use_ea(emul)) + *valuep = (PCI_CAP_ID_EA_OFFSET << 8) | PCI_CAP_ID_MSIX; + else + *valuep = PCI_CAP_ID_MSIX; break; case PCI_CAP_ID_MSIX_OFFSET + PCI_CAP_LIST_NEXT: + if (sandbox_swap_case_use_ea(emul)) + *valuep = PCI_CAP_ID_EA_OFFSET; + else + *valuep = 0; + break; + case PCI_CAP_ID_EA_OFFSET: + *valuep = (PCI_CAP_ID_EA_ENTRY_CNT << 16) | PCI_CAP_ID_EA; + break; + case PCI_CAP_ID_EA_OFFSET + PCI_CAP_LIST_NEXT: *valuep = 0; break; case PCI_EXT_CAP_ID_ERR_OFFSET: @@ -257,6 +321,9 @@ int sandbox_swap_case_write_io(struct udevice *dev, unsigned int addr, return 0; } +static int pci_ea_bar2_magic = PCI_EA_BAR2_MAGIC; +static int pci_ea_bar4_magic = PCI_EA_BAR4_MAGIC; + static int sandbox_swap_case_map_physmem(struct udevice *dev, phys_addr_t addr, unsigned long *lenp, void **ptrp) { @@ -265,9 +332,42 @@ static int sandbox_swap_case_map_physmem(struct udevice *dev, int barnum; int ret; + if (sandbox_swap_case_use_ea(dev)) { + /* + * only support mapping base address in EA test for now, we + * don't handle mapping an offset inside a BAR. Seems good + * enough for the current test. + */ + switch (addr) { + case (phys_addr_t)PCI_CAP_EA_BASE_LO0: + *ptrp = &priv->op; + *lenp = 4; + break; + case (phys_addr_t)PCI_CAP_EA_BASE_LO1: + *ptrp = priv->mem_text; + *lenp = barinfo[1].size - 1; + break; + case (phys_addr_t)((PCI_CAP_EA_BASE_HI2 << 32) | + PCI_CAP_EA_BASE_LO2): + *ptrp = &pci_ea_bar2_magic; + *lenp = PCI_CAP_EA_SIZE_LO; + break; + case (phys_addr_t)((PCI_CAP_EA_BASE_HI4 << 32) | + PCI_CAP_EA_BASE_LO4): + *ptrp = &pci_ea_bar4_magic; + *lenp = (PCI_CAP_EA_SIZE_HI << 32) | + PCI_CAP_EA_SIZE_LO; + break; + default: + return -ENOENT; + } + return 0; + } + ret = sandbox_swap_case_find_bar(dev, addr, &barnum, &offset); if (ret) return ret; + if (barnum == 1) { *ptrp = priv->mem_text + offset; avail = barinfo[1].size - offset; diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 93588725f2..b5180ea4a0 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -158,21 +158,6 @@ config MMC_TRACE If you need to see the MMC core message, say Y. -config SPL_MMC_TINY - bool "Tiny MMC framework in SPL" - help - Enable MMC framework tinification support. This option is useful if - if your SPL is extremely size constrained. Heed the warning, enable - this option if and only if you know exactly what you are doing, if - you are reading this help text, you most likely have no idea :-) - - The MMC framework is reduced to bare minimum to be useful. No malloc - support is needed for the MMC framework operation with this option - enabled. The framework supports exactly one MMC device and exactly - one MMC driver. The MMC driver can be adjusted to avoid any malloc - operations too, which can remove the need for malloc support in SPL - and thus further reduce footprint. - config MMC_DAVINCI bool "TI DAVINCI Multimedia Card Interface support" depends on ARCH_DAVINCI diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c index 66a7cda440..b0f5cf58a2 100644 --- a/drivers/mmc/mmc_legacy.c +++ b/drivers/mmc/mmc_legacy.c @@ -150,6 +150,15 @@ struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) { struct mmc *mmc = &mmc_static; + /* First MMC device registered, fail to register a new one. + * Given users are not expecting this to fail, instead + * of failing let's just return the only MMC device + */ + if (mmc->cfg) { + debug("Warning: MMC_TINY doesn't support multiple MMC devices\n"); + return mmc; + } + mmc->cfg = cfg; mmc->priv = priv; diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index cf1e7617ae..ab3e1310eb 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -1341,10 +1341,56 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr, return bus_addr; } +static void *dm_pci_map_ea_bar(struct udevice *dev, int bar, int flags, + int ea_off) +{ + int ea_cnt, i, entry_size; + int bar_id = (bar - PCI_BASE_ADDRESS_0) >> 2; + u32 ea_entry; + phys_addr_t addr; + + /* EA capability structure header */ + dm_pci_read_config32(dev, ea_off, &ea_entry); + ea_cnt = (ea_entry >> 16) & PCI_EA_NUM_ENT_MASK; + ea_off += PCI_EA_FIRST_ENT; + + for (i = 0; i < ea_cnt; i++, ea_off += entry_size) { + /* Entry header */ + dm_pci_read_config32(dev, ea_off, &ea_entry); + entry_size = ((ea_entry & PCI_EA_ES) + 1) << 2; + + if (((ea_entry & PCI_EA_BEI) >> 4) != bar_id) + continue; + + /* Base address, 1st DW */ + dm_pci_read_config32(dev, ea_off + 4, &ea_entry); + addr = ea_entry & PCI_EA_FIELD_MASK; + if (ea_entry & PCI_EA_IS_64) { + /* Base address, 2nd DW, skip over 4B MaxOffset */ + dm_pci_read_config32(dev, ea_off + 12, &ea_entry); + addr |= ((u64)ea_entry) << 32; + } + + /* size ignored for now */ + return map_physmem(addr, flags, 0); + } + + return 0; +} + void *dm_pci_map_bar(struct udevice *dev, int bar, int flags) { pci_addr_t pci_bus_addr; u32 bar_response; + int ea_off; + + /* + * if the function supports Enhanced Allocation use that instead of + * BARs + */ + ea_off = dm_pci_find_capability(dev, PCI_CAP_ID_EA); + if (ea_off) + return dm_pci_map_ea_bar(dev, bar, flags, ea_off); /* read BAR address */ dm_pci_read_config32(dev, bar, &bar_response); @@ -1448,6 +1494,30 @@ int dm_pci_find_ext_capability(struct udevice *dev, int cap) return dm_pci_find_next_ext_capability(dev, 0, cap); } +int dm_pci_flr(struct udevice *dev) +{ + int pcie_off; + u32 cap; + + /* look for PCI Express Capability */ + pcie_off = dm_pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pcie_off) + return -ENOENT; + + /* check FLR capability */ + dm_pci_read_config32(dev, pcie_off + PCI_EXP_DEVCAP, &cap); + if (!(cap & PCI_EXP_DEVCAP_FLR)) + return -ENOENT; + + dm_pci_clrset_config16(dev, pcie_off + PCI_EXP_DEVCTL, 0, + PCI_EXP_DEVCTL_BCR_FLR); + + /* wait 100ms, per PCI spec */ + mdelay(100); + + return 0; +} + UCLASS_DRIVER(pci) = { .id = UCLASS_PCI, .name = "pci", @@ -1502,9 +1572,9 @@ void pci_init(void) * Enumerate all known controller devices. Enumeration has the side- * effect of probing them, so PCIe devices will be enumerated too. */ - for (uclass_first_device(UCLASS_PCI, &bus); + for (uclass_first_device_check(UCLASS_PCI, &bus); bus; - uclass_next_device(&bus)) { + uclass_next_device_check(&bus)) { ; } } diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 9dec88c1aa..1dfc97dcea 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -16,6 +16,7 @@ struct single_pdata { int offset; /* index of last configuration register */ u32 mask; /* configuration-value mask bits */ int width; /* configuration register bit width */ + bool bits_per_mux; }; struct single_fdt_pin_cfg { @@ -23,6 +24,12 @@ struct single_fdt_pin_cfg { fdt32_t val; /* configuration register value */ }; +struct single_fdt_bits_cfg { + fdt32_t reg; /* configuration register offset */ + fdt32_t val; /* configuration register value */ + fdt32_t mask; /* configuration register mask */ +}; + /** * single_configure_pins() - Configure pins based on FDT data * @@ -71,15 +78,53 @@ static int single_configure_pins(struct udevice *dev, return 0; } +static int single_configure_bits(struct udevice *dev, + const struct single_fdt_bits_cfg *pins, + int size) +{ + struct single_pdata *pdata = dev->platdata; + int count = size / sizeof(struct single_fdt_bits_cfg); + phys_addr_t n, reg; + u32 val, mask; + + for (n = 0; n < count; n++, pins++) { + reg = fdt32_to_cpu(pins->reg); + if ((reg < 0) || (reg > pdata->offset)) { + dev_dbg(dev, " invalid register offset 0x%pa\n", ®); + continue; + } + reg += pdata->base; + + mask = fdt32_to_cpu(pins->mask); + val = fdt32_to_cpu(pins->val) & mask; + + switch (pdata->width) { + case 16: + writew((readw(reg) & ~mask) | val, reg); + break; + case 32: + writel((readl(reg) & ~mask) | val, reg); + break; + default: + dev_warn(dev, "unsupported register width %i\n", + pdata->width); + continue; + } + dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", ®, val); + } + return 0; +} static int single_set_state(struct udevice *dev, struct udevice *config) { const void *fdt = gd->fdt_blob; const struct single_fdt_pin_cfg *prop; + const struct single_fdt_bits_cfg *prop_bits; int len; prop = fdt_getprop(fdt, dev_of_offset(config), "pinctrl-single,pins", &len); + if (prop) { dev_dbg(dev, "configuring pins for %s\n", config->name); if (len % sizeof(struct single_fdt_pin_cfg)) { @@ -87,9 +132,24 @@ static int single_set_state(struct udevice *dev, return -FDT_ERR_BADSTRUCTURE; } single_configure_pins(dev, prop, len); - len = 0; + return 0; } + /* pinctrl-single,pins not found so check for pinctrl-single,bits */ + prop_bits = fdt_getprop(fdt, dev_of_offset(config), + "pinctrl-single,bits", + &len); + if (prop_bits) { + dev_dbg(dev, "configuring pins for %s\n", config->name); + if (len % sizeof(struct single_fdt_bits_cfg)) { + dev_dbg(dev, " invalid bits configuration in fdt\n"); + return -FDT_ERR_BADSTRUCTURE; + } + single_configure_bits(dev, prop_bits, len); + return 0; + } + + /* Neither 'pinctrl-single,pins' nor 'pinctrl-single,bits' were found */ return len; } @@ -119,6 +179,9 @@ static int single_ofdata_to_platdata(struct udevice *dev) pdata->mask = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "pinctrl-single,function-mask", 0xffffffff); + pdata->bits_per_mux = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), + "pinctrl-single,bit-per-mux"); + return 0; } diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 450935fdc1..cb1d10b2a9 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -245,3 +245,24 @@ config PMIC_STPMIC1 The STPMIC1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF and 2 power switches. It is accessed via an I2C interface. The device is used with STM32MP1 SoCs. This driver implements register read/write operations. + +config SPL_PMIC_PALMAS + bool "Enable driver for Texas Instruments PALMAS PMIC" + depends on DM_PMIC + help + The PALMAS is a PMIC containing several LDOs, SMPS. + This driver binds the pmic children in SPL. + +config SPL_PMIC_LP873X + bool "Enable driver for Texas Instruments LP873X PMIC" + depends on DM_PMIC + help + The LP873X is a PMIC containing couple of LDOs and couple of SMPS. + This driver binds the pmic children in SPL. + +config SPL_PMIC_LP87565 + bool "Enable driver for Texas Instruments LP87565 PMIC" + depends on DM_PMIC + help + The LP87565 is a PMIC containing a bunch of SMPS. + This driver binds the pmic children in SPL. diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 72dfc48981..147e68d5c9 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -258,3 +258,29 @@ config SPL_DM_REGULATOR_STPMIC1 depends on SPL_DM_REGULATOR && PMIC_STPMIC1 help Enable support for the regulator functions of the STPMIC1 PMIC in SPL. + +config SPL_DM_REGULATOR_PALMAS + bool "Enable driver for PALMAS PMIC regulators" + depends on SPL_PMIC_PALMAS + help + This enables implementation of driver-model regulator uclass + features for REGULATOR PALMAS and the family of PALMAS PMICs. + The driver implements get/set api for: value and enable in SPL. + +config SPL_DM_REGULATOR_LP87565 + bool "Enable driver for LP87565 PMIC regulators" + depends on SPL_PMIC_LP87565 + help + This enables implementation of driver-model regulator uclass + features for REGULATOR LP87565 and the family of LP87565 PMICs. + LP87565 series of PMICs have 4 single phase BUCKs that can also + be configured in multi phase modes. The driver implements + get/set api for value and enable in SPL. + +config SPL_DM_REGULATOR_LP873X + bool "Enable driver for LP873X PMIC regulators" + depends on SPL_PMIC_LP873X + help + This enables implementation of driver-model regulator uclass + features for REGULATOR LP873X and the family of LP873X PMICs. + The driver implements get/set api for: value and enable in SPL. diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c index 9118b8eb39..76be95bcd1 100644 --- a/drivers/power/regulator/regulator-uclass.c +++ b/drivers/power/regulator/regulator-uclass.c @@ -238,6 +238,9 @@ int regulator_autoset(struct udevice *dev) if (!uc_pdata->always_on && !uc_pdata->boot_on) return -EMEDIUMTYPE; + if (uc_pdata->type == REGULATOR_TYPE_FIXED) + return regulator_set_enable(dev, true); + if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) ret = regulator_set_value(dev, uc_pdata->min_uV); if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA)) diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index fd0009b2e2..532e94d337 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -70,6 +70,16 @@ config RTC_RV3029 This driver supports reading and writing the RTC/calendar and the battery-baced SRAM section. +config RTC_RV8803 + bool "Enable RV8803 driver" + depends on DM_RTC + help + The Micro Crystal RV8803 is a high accuracy, ultra-low power I2C + Real Time Clock (RTC) with temperature compensation. + + This driver supports reading and writing the RTC/calendar and + detects total power failures. + config RTC_RX8010SJ bool "Enable RX8010SJ driver" depends on DM_RTC diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 1724602f1c..915adb87fe 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_RTC_PL031) += pl031.o obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o obj-$(CONFIG_RTC_RV3029) += rv3029.o +obj-$(CONFIG_RTC_RV8803) += rv8803.o obj-$(CONFIG_RTC_RX8025) += rx8025.o obj-$(CONFIG_RTC_RX8010SJ) += rx8010sj.o obj-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c index 48220b45db..a33f47525f 100644 --- a/drivers/rtc/ds1307.c +++ b/drivers/rtc/ds1307.c @@ -23,6 +23,7 @@ enum ds_type { ds_1307, ds_1337, ds_1340, + m41t11, mcp794xx, }; @@ -260,6 +261,18 @@ read_rtc: } } + if (type == m41t11) { + /* clock halted? turn it on, so clock can tick. */ + if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) { + buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH; + dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, + MCP7941X_BIT_ST); + dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, + buf[RTC_SEC_REG_ADDR]); + goto read_rtc; + } + } + if (type == mcp794xx) { /* make sure that the backup battery is enabled */ if (!(buf[RTC_DAY_REG_ADDR] & MCP7941X_BIT_VBATEN)) { @@ -332,6 +345,7 @@ static const struct udevice_id ds1307_rtc_ids[] = { { .compatible = "dallas,ds1337", .data = ds_1337 }, { .compatible = "dallas,ds1340", .data = ds_1340 }, { .compatible = "microchip,mcp7941x", .data = mcp794xx }, + { .compatible = "st,m41t11", .data = m41t11 }, { } }; diff --git a/drivers/rtc/rv8803.c b/drivers/rtc/rv8803.c new file mode 100644 index 0000000000..2ab40f0833 --- /dev/null +++ b/drivers/rtc/rv8803.c @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Date & Time support for Micro Crystal RV-8803-C7. + * + * based on ds1307.c which is + * (C) Copyright 2001, 2002, 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * Keith Outwater, keith_outwater@mvis.com` + * Steven Scholz, steven.scholz@imc-berlin.de + * + */ + +#include <common.h> +#include <command.h> +#include <dm.h> +#include <rtc.h> +#include <i2c.h> + +/* + * RTC register addresses + */ +#define RTC_SEC_REG_ADDR 0x00 +#define RTC_MIN_REG_ADDR 0x01 +#define RTC_HR_REG_ADDR 0x02 +#define RTC_DAY_REG_ADDR 0x03 +#define RTC_DATE_REG_ADDR 0x04 +#define RTC_MON_REG_ADDR 0x05 +#define RTC_YR_REG_ADDR 0x06 + +#define RTC_FLAG_REG_ADDR 0x0E +#define RTC_FLAG_BIT_V1F BIT(0) +#define RTC_FLAG_BIT_V2F BIT(1) + +#define RTC_CTL_REG_ADDR 0x0F +#define RTC_CTL_BIT_RST BIT(0) + +static int rv8803_rtc_set(struct udevice *dev, const struct rtc_time *tm) +{ + int ret; + u8 buf[7]; + + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + if (tm->tm_year < 2000 || tm->tm_year > 2099) + printf("WARNING: year should be between 2000 and 2099!\n"); + + buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100); + buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon); + buf[RTC_DAY_REG_ADDR] = 1 << (tm->tm_wday & 0x7); + buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday); + buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour); + buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min); + buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec); + + ret = dm_i2c_write(dev, 0, buf, sizeof(buf)); + if (ret < 0) + return ret; + + return 0; +} + +static int rv8803_rtc_get(struct udevice *dev, struct rtc_time *tm) +{ + int ret; + u8 buf[7]; + int flags; + + flags = dm_i2c_reg_read(dev, RTC_FLAG_REG_ADDR); + if (flags < 0) + return flags; + debug("%s: flags=%Xh\n", __func__, flags); + + if (flags & RTC_FLAG_BIT_V1F) + printf("### Warning: temperature compensation has stopped\n"); + + if (flags & RTC_FLAG_BIT_V2F) { + printf("### Warning: Voltage low, data is invalid\n"); + return -1; + } + + ret = dm_i2c_read(dev, 0, buf, sizeof(buf)); + if (ret < 0) + return ret; + + tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F); + tm->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F); + tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F); + tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F); + tm->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F); + tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) + 2000; + tm->tm_wday = fls(buf[RTC_DAY_REG_ADDR] & 0x7F) - 1; + tm->tm_yday = 0; + tm->tm_isdst = 0; + + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, + tm->tm_hour, tm->tm_min, tm->tm_sec); + + return 0; +} + +static int rv8803_rtc_reset(struct udevice *dev) +{ + int ret; + struct rtc_time tmp = { + .tm_year = 2000, + .tm_mon = 1, + .tm_mday = 1, + .tm_hour = 0, + .tm_min = 0, + .tm_sec = 0, + }; + + /* assert reset */ + ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR, RTC_CTL_BIT_RST); + if (ret < 0) + return ret; + + /* clear all flags */ + ret = dm_i2c_reg_write(dev, RTC_FLAG_REG_ADDR, 0); + if (ret < 0) + return ret; + + ret = rv8803_rtc_set(dev, &tmp); + if (ret < 0) + return ret; + + /* clear reset */ + ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR, 0); + if (ret < 0) + return ret; + + debug("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n", + tmp.tm_year, tmp.tm_mon, tmp.tm_mday, + tmp.tm_hour, tmp.tm_min, tmp.tm_sec); + + return 0; +} + +static int rv8803_probe(struct udevice *dev) +{ + i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS | + DM_I2C_CHIP_WR_ADDRESS); + + return 0; +} + +static const struct rtc_ops rv8803_rtc_ops = { + .get = rv8803_rtc_get, + .set = rv8803_rtc_set, + .reset = rv8803_rtc_reset, +}; + +static const struct udevice_id rv8803_rtc_ids[] = { + { .compatible = "microcrystal,rv8803", }, + { } +}; + +U_BOOT_DRIVER(rtc_rv8803) = { + .name = "rtc-rv8803", + .id = UCLASS_RTC, + .probe = rv8803_probe, + .of_match = rv8803_rtc_ids, + .ops = &rv8803_rtc_ops, +}; diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index a357b00d28..57dd4a72c6 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright 2019 NXP * Copyright 2013 Freescale Semiconductor, Inc. */ @@ -502,6 +503,9 @@ static int lpuart_serial_ofdata_to_platdata(struct udevice *dev) plat->reg = (void *)addr; plat->flags = dev_get_driver_data(dev); + if (fdtdec_get_bool(blob, node, "little-endian")) + plat->flags &= ~LPUART_FLAG_REGMAP_ENDIAN_BIG; + if (!fdt_node_check_compatible(blob, node, "fsl,ls1021a-lpuart")) plat->devtype = DEV_LS1021A; else if (!fdt_node_check_compatible(blob, node, "fsl,imx7ulp-lpuart")) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index f9b282313a..cc174dd036 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -226,7 +226,7 @@ config SANDBOX_SPI cs-gpios = <0>, <&gpio_a 0>; flash@0 { reg = <0>; - compatible = "spansion,m25p16", "sandbox,spi-flash"; + compatible = "spansion,m25p16", "jedec,spi-nor"; spi-max-frequency = <40000000>; sandbox,filename = "spi.bin"; }; @@ -293,6 +293,14 @@ config TI_QSPI Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms. This driver support spi flash single, quad and memory reads. +config UNIPHIER_SPI + bool "Socionext UniPhier SPI driver" + depends on ARCH_UNIPHIER + help + Enable the Socionext UniPhier SPI driver. This driver can + be used to access SPI chips on platforms embedding this + UniPhier IP core. + config XILINX_SPI bool "Xilinx SPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 64c407e2ed..ab84122f08 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -59,6 +59,7 @@ obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o obj-$(CONFIG_TEGRA210_QSPI) += tegra210_qspi.o +obj-$(CONFIG_UNIPHIER_SPI) += uniphier_spi.o obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 5dd1ad67cf..c725625146 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -151,10 +151,6 @@ void spi_free_slave(struct spi_slave *slave) free(slave); } -#if defined(CONFIG_SYS_KW_SPI_MPP) -u32 spi_mpp_backup[4]; -#endif - __attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave) { return 0; @@ -162,34 +158,6 @@ __attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave) int spi_claim_bus(struct spi_slave *slave) { -#if defined(CONFIG_SYS_KW_SPI_MPP) - u32 config; - u32 spi_mpp_config[4]; - - config = CONFIG_SYS_KW_SPI_MPP; - - if (config & MOSI_MPP6) - spi_mpp_config[0] = MPP6_SPI_MOSI; - else - spi_mpp_config[0] = MPP1_SPI_MOSI; - - if (config & SCK_MPP10) - spi_mpp_config[1] = MPP10_SPI_SCK; - else - spi_mpp_config[1] = MPP2_SPI_SCK; - - if (config & MISO_MPP11) - spi_mpp_config[2] = MPP11_SPI_MISO; - else - spi_mpp_config[2] = MPP3_SPI_MISO; - - spi_mpp_config[3] = 0; - spi_mpp_backup[3] = 0; - - /* set new spi mpp and save current mpp config */ - kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup); -#endif - return board_spi_claim_bus(slave); } @@ -199,10 +167,6 @@ __attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave) void spi_release_bus(struct spi_slave *slave) { -#if defined(CONFIG_SYS_KW_SPI_MPP) - kirkwood_mpp_conf(spi_mpp_backup, NULL); -#endif - board_spi_release_bus(slave); } @@ -338,6 +302,11 @@ static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, return _spi_xfer(plat->spireg, bitlen, dout, din, flags); } +__attribute__((weak)) int mvebu_board_spi_claim_bus(struct udevice *dev) +{ + return 0; +} + static int mvebu_spi_claim_bus(struct udevice *dev) { struct udevice *bus = dev->parent; @@ -348,9 +317,19 @@ static int mvebu_spi_claim_bus(struct udevice *dev) KWSPI_CS_MASK << KWSPI_CS_SHIFT, spi_chip_select(dev) << KWSPI_CS_SHIFT); + return mvebu_board_spi_claim_bus(dev); +} + +__attribute__((weak)) int mvebu_board_spi_release_bus(struct udevice *dev) +{ return 0; } +static int mvebu_spi_release_bus(struct udevice *dev) +{ + return mvebu_board_spi_release_bus(dev); +} + static int mvebu_spi_probe(struct udevice *bus) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -377,6 +356,7 @@ static int mvebu_spi_ofdata_to_platdata(struct udevice *bus) static const struct dm_spi_ops mvebu_spi_ops = { .claim_bus = mvebu_spi_claim_bus, + .release_bus = mvebu_spi_release_bus, .xfer = mvebu_spi_xfer, .set_speed = mvebu_spi_set_speed, .set_mode = mvebu_spi_set_mode, diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index b86eee75bc..7aabebeff5 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -201,7 +201,6 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) unsigned int pos = 0; const u8 *tx_buf = NULL; u8 *rx_buf = NULL; - u8 *op_buf; int op_len; u32 flag; int ret; @@ -338,7 +337,17 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) } op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes; - op_buf = calloc(1, op_len); + + /* + * Avoid using malloc() here so that we can use this code in SPL where + * simple malloc may be used. That implementation does not allow free() + * so repeated calls to this code can exhaust the space. + * + * The value of op_len is small, since it does not include the actual + * data being sent, only the op-code and address. In fact, it should be + * possible to just use a small fixed value here instead of op_len. + */ + u8 op_buf[op_len]; op_buf[pos++] = op->cmd.opcode; @@ -382,8 +391,6 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]); debug("[ret %d]\n", ret); - free(op_buf); - if (ret < 0) return ret; #endif /* __UBOOT__ */ diff --git a/drivers/spi/uniphier_spi.c b/drivers/spi/uniphier_spi.c new file mode 100644 index 0000000000..ef02d07aa4 --- /dev/null +++ b/drivers/spi/uniphier_spi.c @@ -0,0 +1,413 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * uniphier_spi.c - Socionext UniPhier SPI driver + * Copyright 2019 Socionext, Inc. + */ + +#include <clk.h> +#include <common.h> +#include <dm.h> +#include <linux/bitfield.h> +#include <linux/io.h> +#include <spi.h> +#include <wait_bit.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define SSI_CTL 0x00 +#define SSI_CTL_EN BIT(0) + +#define SSI_CKS 0x04 +#define SSI_CKS_CKRAT_MASK GENMASK(7, 0) +#define SSI_CKS_CKPHS BIT(14) +#define SSI_CKS_CKINIT BIT(13) +#define SSI_CKS_CKDLY BIT(12) + +#define SSI_TXWDS 0x08 +#define SSI_TXWDS_WDLEN_MASK GENMASK(13, 8) +#define SSI_TXWDS_TDTF_MASK GENMASK(7, 6) +#define SSI_TXWDS_DTLEN_MASK GENMASK(5, 0) + +#define SSI_RXWDS 0x0c +#define SSI_RXWDS_RDTF_MASK GENMASK(7, 6) +#define SSI_RXWDS_DTLEN_MASK GENMASK(5, 0) + +#define SSI_FPS 0x10 +#define SSI_FPS_FSPOL BIT(15) +#define SSI_FPS_FSTRT BIT(14) + +#define SSI_SR 0x14 +#define SSI_SR_BUSY BIT(7) +#define SSI_SR_TNF BIT(5) +#define SSI_SR_RNE BIT(0) + +#define SSI_IE 0x18 + +#define SSI_IC 0x1c +#define SSI_IC_TCIC BIT(4) +#define SSI_IC_RCIC BIT(3) +#define SSI_IC_RORIC BIT(0) + +#define SSI_FC 0x20 +#define SSI_FC_TXFFL BIT(12) +#define SSI_FC_TXFTH_MASK GENMASK(11, 8) +#define SSI_FC_RXFFL BIT(4) +#define SSI_FC_RXFTH_MASK GENMASK(3, 0) + +#define SSI_XDR 0x24 /* TXDR for write, RXDR for read */ + +#define SSI_FIFO_DEPTH 8U + +#define SSI_REG_TIMEOUT (CONFIG_SYS_HZ / 100) /* 10 ms */ +#define SSI_XFER_TIMEOUT (CONFIG_SYS_HZ) /* 1 sec */ + +#define SSI_CLK 50000000 /* internal I/O clock: 50MHz */ + +struct uniphier_spi_platdata { + void __iomem *base; + u32 frequency; /* input frequency */ + u32 speed_hz; + uint deactivate_delay_us; /* Delay to wait after deactivate */ + uint activate_delay_us; /* Delay to wait after activate */ +}; + +struct uniphier_spi_priv { + void __iomem *base; + u8 mode; + u8 fifo_depth; + u8 bits_per_word; + ulong last_transaction_us; /* Time of last transaction end */ +}; + +static void uniphier_spi_enable(struct uniphier_spi_priv *priv, int enable) +{ + u32 val; + + val = readl(priv->base + SSI_CTL); + if (enable) + val |= SSI_CTL_EN; + else + val &= ~SSI_CTL_EN; + writel(val, priv->base + SSI_CTL); +} + +static void uniphier_spi_regdump(struct uniphier_spi_priv *priv) +{ + pr_debug("CTL %08x\n", readl(priv->base + SSI_CTL)); + pr_debug("CKS %08x\n", readl(priv->base + SSI_CKS)); + pr_debug("TXWDS %08x\n", readl(priv->base + SSI_TXWDS)); + pr_debug("RXWDS %08x\n", readl(priv->base + SSI_RXWDS)); + pr_debug("FPS %08x\n", readl(priv->base + SSI_FPS)); + pr_debug("SR %08x\n", readl(priv->base + SSI_SR)); + pr_debug("IE %08x\n", readl(priv->base + SSI_IE)); + pr_debug("IC %08x\n", readl(priv->base + SSI_IC)); + pr_debug("FC %08x\n", readl(priv->base + SSI_FC)); + pr_debug("XDR %08x\n", readl(priv->base + SSI_XDR)); +} + +static void spi_cs_activate(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct uniphier_spi_platdata *plat = bus->platdata; + struct uniphier_spi_priv *priv = dev_get_priv(bus); + ulong delay_us; /* The delay completed so far */ + u32 val; + + /* If it's too soon to do another transaction, wait */ + if (plat->deactivate_delay_us && priv->last_transaction_us) { + delay_us = timer_get_us() - priv->last_transaction_us; + if (delay_us < plat->deactivate_delay_us) + udelay(plat->deactivate_delay_us - delay_us); + } + + val = readl(priv->base + SSI_FPS); + if (priv->mode & SPI_CS_HIGH) + val |= SSI_FPS_FSPOL; + else + val &= ~SSI_FPS_FSPOL; + writel(val, priv->base + SSI_FPS); + + if (plat->activate_delay_us) + udelay(plat->activate_delay_us); +} + +static void spi_cs_deactivate(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct uniphier_spi_platdata *plat = bus->platdata; + struct uniphier_spi_priv *priv = dev_get_priv(bus); + u32 val; + + val = readl(priv->base + SSI_FPS); + if (priv->mode & SPI_CS_HIGH) + val &= ~SSI_FPS_FSPOL; + else + val |= SSI_FPS_FSPOL; + writel(val, priv->base + SSI_FPS); + + /* Remember time of this transaction so we can honour the bus delay */ + if (plat->deactivate_delay_us) + priv->last_transaction_us = timer_get_us(); +} + +static int uniphier_spi_claim_bus(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct uniphier_spi_priv *priv = dev_get_priv(bus); + u32 val, size; + + uniphier_spi_enable(priv, false); + + /* disable interrupts */ + writel(0, priv->base + SSI_IE); + + /* bits_per_word */ + size = priv->bits_per_word; + val = readl(priv->base + SSI_TXWDS); + val &= ~(SSI_TXWDS_WDLEN_MASK | SSI_TXWDS_DTLEN_MASK); + val |= FIELD_PREP(SSI_TXWDS_WDLEN_MASK, size); + val |= FIELD_PREP(SSI_TXWDS_DTLEN_MASK, size); + writel(val, priv->base + SSI_TXWDS); + + val = readl(priv->base + SSI_RXWDS); + val &= ~SSI_RXWDS_DTLEN_MASK; + val |= FIELD_PREP(SSI_RXWDS_DTLEN_MASK, size); + writel(val, priv->base + SSI_RXWDS); + + /* reset FIFOs */ + val = SSI_FC_TXFFL | SSI_FC_RXFFL; + writel(val, priv->base + SSI_FC); + + /* FIFO threthold */ + val = readl(priv->base + SSI_FC); + val &= ~(SSI_FC_TXFTH_MASK | SSI_FC_RXFTH_MASK); + val |= FIELD_PREP(SSI_FC_TXFTH_MASK, priv->fifo_depth); + val |= FIELD_PREP(SSI_FC_RXFTH_MASK, priv->fifo_depth); + writel(val, priv->base + SSI_FC); + + /* clear interrupts */ + writel(SSI_IC_TCIC | SSI_IC_RCIC | SSI_IC_RORIC, + priv->base + SSI_IC); + + uniphier_spi_enable(priv, true); + + return 0; +} + +static int uniphier_spi_release_bus(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct uniphier_spi_priv *priv = dev_get_priv(bus); + + uniphier_spi_enable(priv, false); + + return 0; +} + +static int uniphier_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *bus = dev->parent; + struct uniphier_spi_priv *priv = dev_get_priv(bus); + const u8 *tx_buf = dout; + u8 *rx_buf = din, buf; + u32 len = bitlen / 8; + u32 tx_len, rx_len; + u32 ts, status; + int ret = 0; + + if (bitlen % 8) { + dev_err(dev, "Non byte aligned SPI transfer\n"); + return -EINVAL; + } + + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(dev); + + uniphier_spi_enable(priv, true); + + ts = get_timer(0); + tx_len = len; + rx_len = len; + + uniphier_spi_regdump(priv); + + while (tx_len || rx_len) { + ret = wait_for_bit_le32(priv->base + SSI_SR, SSI_SR_BUSY, false, + SSI_REG_TIMEOUT * 1000, false); + if (ret) { + if (ret == -ETIMEDOUT) + dev_err(dev, "access timeout\n"); + break; + } + + status = readl(priv->base + SSI_SR); + /* write the data into TX */ + if (tx_len && (status & SSI_SR_TNF)) { + buf = tx_buf ? *tx_buf++ : 0; + writel(buf, priv->base + SSI_XDR); + tx_len--; + } + + /* read the data from RX */ + if (rx_len && (status & SSI_SR_RNE)) { + buf = readl(priv->base + SSI_XDR); + if (rx_buf) + *rx_buf++ = buf; + rx_len--; + } + + if (get_timer(ts) >= SSI_XFER_TIMEOUT) { + dev_err(dev, "transfer timeout\n"); + ret = -ETIMEDOUT; + break; + } + } + + if (flags & SPI_XFER_END) + spi_cs_deactivate(dev); + + uniphier_spi_enable(priv, false); + + return ret; +} + +static int uniphier_spi_set_speed(struct udevice *bus, uint speed) +{ + struct uniphier_spi_platdata *plat = bus->platdata; + struct uniphier_spi_priv *priv = dev_get_priv(bus); + u32 val, ckdiv; + + if (speed > plat->frequency) + speed = plat->frequency; + + /* baudrate */ + ckdiv = DIV_ROUND_UP(SSI_CLK, speed); + ckdiv = round_up(ckdiv, 2); + + val = readl(priv->base + SSI_CKS); + val &= ~SSI_CKS_CKRAT_MASK; + val |= ckdiv & SSI_CKS_CKRAT_MASK; + writel(val, priv->base + SSI_CKS); + + return 0; +} + +static int uniphier_spi_set_mode(struct udevice *bus, uint mode) +{ + struct uniphier_spi_priv *priv = dev_get_priv(bus); + u32 val1, val2; + + /* + * clock setting + * CKPHS capture timing. 0:rising edge, 1:falling edge + * CKINIT clock initial level. 0:low, 1:high + * CKDLY clock delay. 0:no delay, 1:delay depending on FSTRT + * (FSTRT=0: 1 clock, FSTRT=1: 0.5 clock) + * + * frame setting + * FSPOL frame signal porarity. 0: low, 1: high + * FSTRT start frame timing + * 0: rising edge of clock, 1: falling edge of clock + */ + val1 = readl(priv->base + SSI_CKS); + val2 = readl(priv->base + SSI_FPS); + + switch (mode & (SPI_CPOL | SPI_CPHA)) { + case SPI_MODE_0: + /* CKPHS=1, CKINIT=0, CKDLY=1, FSTRT=0 */ + val1 |= SSI_CKS_CKPHS | SSI_CKS_CKDLY; + val1 &= ~SSI_CKS_CKINIT; + val2 &= ~SSI_FPS_FSTRT; + break; + case SPI_MODE_1: + /* CKPHS=0, CKINIT=0, CKDLY=0, FSTRT=1 */ + val1 &= ~(SSI_CKS_CKPHS | SSI_CKS_CKINIT | SSI_CKS_CKDLY); + val2 |= SSI_FPS_FSTRT; + break; + case SPI_MODE_2: + /* CKPHS=0, CKINIT=1, CKDLY=1, FSTRT=1 */ + val1 |= SSI_CKS_CKINIT | SSI_CKS_CKDLY; + val1 &= ~SSI_CKS_CKPHS; + val2 |= SSI_FPS_FSTRT; + break; + case SPI_MODE_3: + /* CKPHS=1, CKINIT=1, CKDLY=0, FSTRT=0 */ + val1 |= SSI_CKS_CKPHS | SSI_CKS_CKINIT; + val1 &= ~SSI_CKS_CKDLY; + val2 &= ~SSI_FPS_FSTRT; + break; + } + + writel(val1, priv->base + SSI_CKS); + writel(val2, priv->base + SSI_FPS); + + /* format */ + val1 = readl(priv->base + SSI_TXWDS); + val2 = readl(priv->base + SSI_RXWDS); + if (mode & SPI_LSB_FIRST) { + val1 |= FIELD_PREP(SSI_TXWDS_TDTF_MASK, 1); + val2 |= FIELD_PREP(SSI_RXWDS_RDTF_MASK, 1); + } + writel(val1, priv->base + SSI_TXWDS); + writel(val2, priv->base + SSI_RXWDS); + + priv->mode = mode; + + return 0; +} + +static int uniphier_spi_ofdata_to_platdata(struct udevice *bus) +{ + struct uniphier_spi_platdata *plat = bus->platdata; + const void *blob = gd->fdt_blob; + int node = dev_of_offset(bus); + + plat->base = devfdt_get_addr_ptr(bus); + + plat->frequency = + fdtdec_get_int(blob, node, "spi-max-frequency", 12500000); + plat->deactivate_delay_us = + fdtdec_get_int(blob, node, "spi-deactivate-delay", 0); + plat->activate_delay_us = + fdtdec_get_int(blob, node, "spi-activate-delay", 0); + plat->speed_hz = plat->frequency / 2; + + return 0; +} + +static int uniphier_spi_probe(struct udevice *bus) +{ + struct uniphier_spi_platdata *plat = dev_get_platdata(bus); + struct uniphier_spi_priv *priv = dev_get_priv(bus); + + priv->base = plat->base; + priv->fifo_depth = SSI_FIFO_DEPTH; + priv->bits_per_word = 8; + + return 0; +} + +static const struct dm_spi_ops uniphier_spi_ops = { + .claim_bus = uniphier_spi_claim_bus, + .release_bus = uniphier_spi_release_bus, + .xfer = uniphier_spi_xfer, + .set_speed = uniphier_spi_set_speed, + .set_mode = uniphier_spi_set_mode, +}; + +static const struct udevice_id uniphier_spi_ids[] = { + { .compatible = "socionext,uniphier-scssi" }, + { /* Sentinel */ } +}; + +U_BOOT_DRIVER(uniphier_spi) = { + .name = "uniphier_spi", + .id = UCLASS_SPI, + .of_match = uniphier_spi_ids, + .ops = &uniphier_spi_ops, + .ofdata_to_platdata = uniphier_spi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct uniphier_spi_platdata), + .priv_auto_alloc_size = sizeof(struct uniphier_spi_priv), + .probe = uniphier_spi_probe, +}; diff --git a/drivers/sysreset/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c index 38e2a7e241..7dfd89460f 100644 --- a/drivers/sysreset/sysreset_sandbox.c +++ b/drivers/sysreset/sysreset_sandbox.c @@ -66,6 +66,7 @@ static int sandbox_sysreset_request(struct udevice *dev, enum sysreset_t type) case SYSRESET_POWER_OFF: if (!state->sysreset_allowed[type]) return -EACCES; + sandbox_exit(); default: return -ENOSYS; } diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c index 32743aa72c..cca1653f1e 100644 --- a/drivers/usb/musb-new/omap2430.c +++ b/drivers/usb/musb-new/omap2430.c @@ -215,11 +215,13 @@ static int omap2430_musb_probe(struct udevice *dev) { #ifdef CONFIG_USB_MUSB_HOST struct musb_host_data *host = dev_get_priv(dev); +#else + struct musb *musbp; #endif struct omap2430_musb_platdata *platdata = dev_get_platdata(dev); struct usb_bus_priv *priv = dev_get_uclass_priv(dev); struct omap_musb_board_data *otg_board_data; - int ret; + int ret = 0; void *base = dev_read_addr_ptr(dev); priv->desc_before_addr = true; @@ -236,9 +238,11 @@ static int omap2430_musb_probe(struct udevice *dev) ret = musb_lowlevel_init(host); #else - ret = musb_register(&platdata->plat, + musbp = musb_register(&platdata->plat, (struct device *)otg_board_data, platdata->base); + if (IS_ERR_OR_NULL(musbp)) + return -EINVAL; #endif return ret; } diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index b19bfb4f2f..d4071c0661 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -291,7 +291,9 @@ static int video_post_bind(struct udevice *dev) return 0; size = alloc_fb(dev, &addr); if (addr < gd->video_bottom) { - /* Device tree node may need the 'u-boot,dm-pre-reloc' tag */ + /* Device tree node may need the 'u-boot,dm-pre-reloc' or + * 'u-boot,dm-pre-proper' tag + */ printf("Video device '%s' cannot allocate frame buffer memory -ensure the device is set up before relocation\n", dev->name); return -ENOSPC; diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index d03602696f..37f71e5708 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -349,6 +349,22 @@ const char *gpio_get_bank_info(struct udevice *dev, int *offset_count); int dm_gpio_lookup_name(const char *name, struct gpio_desc *desc); /** + * gpio_hog_lookup_name() - Look up a named GPIO and return the gpio descr. + * + * @name: Name to look up + * @return: Returns gpio_desc for gpio + */ +struct gpio_desc *gpio_hog_lookup_name(const char *name); + +/** + * gpio_hog_probe_all() - probe all gpio devices with + * gpio-hog subnodes. + * + * @return: Returns return value from device_probe() + */ +int gpio_hog_probe_all(void); + +/** * gpio_lookup_name - Look up a GPIO name and return its details * * This is used to convert a named GPIO into a device, offset and GPIO @@ -504,6 +520,22 @@ int gpio_request_list_by_name_nodev(ofnode node, const char *list_name, int flags); /** + * gpio_dev_request_index() - request single GPIO from gpio device + * + * @dev: GPIO device + * @nodename: Name of node + * @list_name: Name of GPIO list (e.g. "board-id-gpios") + * @index: Index number of the GPIO in that list use request (0=first) + * @flags: GPIOD_* flags + * @dtflags: GPIO flags read from DT + * @desc: GPIO descriotor filled from this function + * @return: return value from gpio_request_tail() + */ +int gpio_dev_request_index(struct udevice *dev, const char *nodename, + char *list_name, int index, int flags, + int dtflags, struct gpio_desc *desc); + +/** * dm_gpio_free() - Free a single GPIO * * This frees a single GPIOs previously returned from gpio_request_by_name(). diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 4198ff0511..15c402b542 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -85,7 +85,7 @@ /* SPL related SPI defines */ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS -#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) +#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA) /* SPL related MMC defines */ #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10) #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS diff --git a/include/configs/crs305-1g-4s.h b/include/configs/crs305-1g-4s.h index c73cb99b1b..a2df69adc7 100644 --- a/include/configs/crs305-1g-4s.h +++ b/include/configs/crs305-1g-4s.h @@ -10,6 +10,7 @@ * High Level Configuration Options (easy to change) */ +#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */ #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg #define CONFIG_SYS_TCLK 200000000 /* 200MHz */ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index 8a00ac015a..a381a98470 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -201,11 +201,6 @@ int get_scl(void); #define CONFIG_SYS_REDUNDAND_ENVIRONMENT - -/* SPI bus claim MPP configuration */ -#define CONFIG_SYS_KW_SPI_MPP 0x0 - -#define FLASH_GPIO_PIN 0x00010000 #define KM_FLASH_GPIO_PIN 16 #define CONFIG_KM_UPDATE_UBOOT \ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 36ca3b201e..c97e6a0ebb 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -42,11 +42,8 @@ * Serial Driver info */ #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART1_BASE /* Base address of UART1 */ #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) /* diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 4ab172c06d..8e98977de8 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -52,9 +52,6 @@ #endif /* CONFIG_SPL_OS_BOOT */ #endif /* CONFIG_NAND */ -/* Environment */ -#define CONFIG_PREBOOT "usb start" - #define MEM_LAYOUT_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h new file mode 100644 index 0000000000..78d265d1d2 --- /dev/null +++ b/include/configs/phycore_am335x_r2.h @@ -0,0 +1,128 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * phycore_am335x_r2.h + * + * Phytec phyCORE-AM335x R2 (PCL060 / PCM060) boards information header + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Lars Poeschel, Lemonage Software GmbH + * Copyright (C) 2019 DENX Software Engineering GmbH + */ + +#ifndef __CONFIG_PHYCORE_AM335x_R2_H +#define __CONFIG_PHYCORE_AM335x_R2_H + +#include <configs/ti_am335x_common.h> + +#define CONFIG_MACH_TYPE MACH_TYPE_SBC_PHYCORE_AM335X +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 + +#ifdef CONFIG_NAND +#define NANDARGS \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nandroot=ubi0:root ubi.mtd=NAND.UBI\0" \ + "nandrootfstype=ubifs rootwait rw fsck.repair=yes\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "ubi part NAND.UBI; " \ + "ubi readvol ${fdtaddr} oftree; " \ + "ubi readvol ${loadaddr} kernel; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" + +#else +#define NANDARGS "" +#endif + +/* set to negative value for no autoboot */ +#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \ + "bootcmd_" #devtypel #instance "=" \ + "setenv mmcdev " #instance "; "\ + "setenv bootpart " #instance ":1 ; "\ + "setenv rootpart " #instance ":2 ; "\ + "run mmcboot\0" + +#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \ + #devtypel #instance " " + +#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \ + "bootcmd_" #devtypel #instance "=" \ + "run nandboot\0" + +#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ + #devtypel #instance " " + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(LEGACY_MMC, legacy_mmc, 0) \ + func(MMC, mmc, 1) \ + func(LEGACY_MMC, legacy_mmc, 1) \ + func(NAND, nand, 0) + +#include <config_distro_bootcmd.h> +#include <environment/ti/dfu.h> +#include <environment/ti/mmc.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_MMC_TI_ARGS \ + DEFAULT_LINUX_BOOT_ENV \ + "bootfile=zImage\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "console=ttyS0,115200\0" \ + "optargs=\0" \ + "mmcrootfstype=ext2 rootwait\0" \ + "finduuid=part uuid mmc ${rootpart} uuid\0" \ + "boot_fit=0\0" \ + NANDARGS \ + BOOTENV + +/* Clock Macros */ +#define V_OSCK 25000000 /* Clock output from T2 */ +#define V_SCLK V_OSCK + +#define CONFIG_POWER_TPS65910 + +#ifdef CONFIG_NAND +/* NAND: device related configs */ +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +/* NAND: driver related configs */ +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW + +/* NAND: SPL related configs */ +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ +#endif +#endif /* !CONFIG_NAND */ + +/* CPU */ + +#ifdef CONFIG_SPI_BOOT +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 +#elif defined(CONFIG_ENV_IS_IN_NAND) +#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#endif + +#endif /* ! __CONFIG_PHYCORE_AM335x_R2_H */ diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 50affaf1a8..5d75021ed6 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -63,7 +63,11 @@ func(HOST, host, 1) \ func(HOST, host, 0) +#ifdef __ASSEMBLY__ +#define BOOTENV +#else #include <config_distro_bootcmd.h> +#endif #define CONFIG_KEEP_SERVERADDR #define CONFIG_UDP_CHECKSUM diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 018f54428b..edd776ec70 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -22,17 +22,12 @@ #define CONFIG_EHCI_IS_TDI /* Environment in SPI NOR flash */ -#define CONFIG_ENV_OFFSET (3*(1 << 18)) /* 768KiB in */ #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ -#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ +#define CONFIG_ENV_OFFSET ((1 << 20) - CONFIG_ENV_SIZE) +#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ -/* PCIe support */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_PCI_SCAN_SHOW -#endif - /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ @@ -97,8 +92,8 @@ #define BOOT_TARGET_DEVICES(func) \ BOOT_TARGET_DEVICES_MMC(func) \ - BOOT_TARGET_DEVICES_USB(func) \ BOOT_TARGET_DEVICES_SCSI(func) \ + BOOT_TARGET_DEVICES_USB(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) @@ -122,6 +117,7 @@ LOAD_ADDRESS_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "console=ttyS0,115200\0" \ + "ethact=ethernet@34000\0" \ BOOTENV #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 5b42e0c1de..68568f4122 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -90,10 +90,6 @@ #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -/* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) - /* * Network Configuration */ @@ -102,8 +98,7 @@ #define CONFIG_GATEWAYIP 192.168.11.1 #define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_LOADADDR 0x85000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_LOAD_ADDR 0x85000000 #define CONFIG_SYS_BOOTM_LEN (32 << 20) #if defined(CONFIG_ARM64) @@ -126,8 +121,8 @@ #ifdef CONFIG_FIT #define CONFIG_BOOTFILE "fitImage" +#define KERNEL_ADDR_R_OFFSET "0x05100000" #define LINUXBOOT_ENV_SETTINGS \ - "kernel_addr_r=0x85100000\0" \ "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ "bootm $kernel_addr_r\0" \ "__nfsboot=run tftpboot\0" @@ -135,17 +130,13 @@ #ifdef CONFIG_ARM64 #define CONFIG_BOOTFILE "Image" #define LINUXBOOT_CMD "booti" -#define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0" +#define KERNEL_ADDR_R_OFFSET "0x02080000" #else #define CONFIG_BOOTFILE "zImage" #define LINUXBOOT_CMD "bootz" -#define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" +#define KERNEL_ADDR_R_OFFSET "0x00208000" #endif #define LINUXBOOT_ENV_SETTINGS \ - "fdt_addr_r=0x85100000\0" \ - KERNEL_ADDR_R \ - "ramdisk_addr_r=0x86000000\0" \ - "ramdisk_file=rootfs.cpio.gz\0" \ "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \ LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ "tftpboot=tftpboot $kernel_addr_r $bootfile && " \ @@ -160,8 +151,13 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_addr_r_offset=0x05100000\0" \ + "kernel_addr_r_offset=" KERNEL_ADDR_R_OFFSET "\0" \ + "ramdisk_addr_r_offset=0x06000000\0" \ + "ramdisk_file=rootfs.cpio.gz\0" \ "netdev=eth0\0" \ "initrd_high=0xffffffffffffffff\0" \ + "loadaddr_offset=0x05000000\0" \ "script=boot.scr\0" \ "scriptaddr=0x85000000\0" \ "nor_base=0x42000000\0" \ @@ -215,15 +211,9 @@ #define CONFIG_SYS_BOOTMAPSZ 0x20000000 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 - #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) /* only for SPL */ -#if defined(CONFIG_ARCH_UNIPHIER_LD4) || \ - defined(CONFIG_ARCH_UNIPHIER_SLD8) -#endif - #define CONFIG_SPL_STACK (0x00200000) #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 4ab2ae1ba5..704f91589a 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -676,12 +676,14 @@ int ofnode_read_simple_size_cells(ofnode node); * After relocation and jumping into the real U-Boot binary it is possible to * determine if a node was bound in one of SPL/TPL stages. * - * There are 3 settings currently in use - * - + * There are 4 settings currently in use + * - u-boot,dm-pre-proper: U-Boot proper pre-relocation only * - u-boot,dm-pre-reloc: legacy and indicates any of TPL or SPL * Existing platforms only use it to indicate nodes needed in * SPL. Should probably be replaced by u-boot,dm-spl for * new platforms. + * - u-boot,dm-spl: SPL and U-Boot pre-relocation + * - u-boot,dm-tpl: TPL and U-Boot pre-relocation * * @node: node to check * @return true if node is needed in SPL/TL, false otherwise diff --git a/include/dm/util.h b/include/dm/util.h index 60d3b93dec..348c2ace3c 100644 --- a/include/dm/util.h +++ b/include/dm/util.h @@ -52,12 +52,14 @@ static inline void dm_dump_devres(void) * it is possible to determine if a node was bound in one of * SPL/TPL stages. * - * There are 3 settings currently in use - * - + * There are 4 settings currently in use + * - u-boot,dm-pre-proper: U-Boot proper pre-relocation only * - u-boot,dm-pre-reloc: legacy and indicates any of TPL or SPL * Existing platforms only use it to indicate nodes needed in * SPL. Should probably be replaced by u-boot,dm-spl for * existing platforms. + * - u-boot,dm-spl: SPL and U-Boot pre-relocation + * - u-boot,dm-tpl: TPL and U-Boot pre-relocation * @node: of node * * Returns true if node is needed in SPL/TL, false otherwise. diff --git a/include/pci.h b/include/pci.h index 508f7bca81..298d0d4355 100644 --- a/include/pci.h +++ b/include/pci.h @@ -455,6 +455,23 @@ #define PCI_EXT_CAP_ID_PTM 0x1F /* Precision Time Measurement */ #define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PTM +/* Enhanced Allocation Registers */ +#define PCI_EA_NUM_ENT 2 /* Number of Capability Entries */ +#define PCI_EA_NUM_ENT_MASK 0x3f /* Num Entries Mask */ +#define PCI_EA_FIRST_ENT 4 /* First EA Entry in List */ +#define PCI_EA_ES 0x00000007 /* Entry Size */ +#define PCI_EA_BEI 0x000000f0 /* BAR Equivalent Indicator */ +/* Base, MaxOffset registers */ +/* bit 0 is reserved */ +#define PCI_EA_IS_64 0x00000002 /* 64-bit field flag */ +#define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */ + +/* PCI Express capabilities */ +#define PCI_EXP_DEVCAP 4 /* Device capabilities */ +#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ +#define PCI_EXP_DEVCTL 8 /* Device Control */ +#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ + /* Include the ID list */ #include <pci_ids.h> @@ -1309,12 +1326,16 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t addr, * dm_pci_map_bar() - get a virtual address associated with a BAR region * * Looks up a base address register and finds the physical memory address - * that corresponds to it + * that corresponds to it. + * Can be used for 32b BARs 0-5 on type 0 functions and for 32b BARs 0-1 on + * type 1 functions. + * Can also be used on type 0 functions that support Enhanced Allocation for + * 32b/64b BARs. Note that duplicate BEI entries are not supported. * * @dev: Device to check - * @bar: Bar number to read (numbered from 0) + * @bar: Bar register offset (PCI_BASE_ADDRESS_...) * @flags: Flags for the region type (PCI_REGION_...) - * @return: pointer to the virtual address to use + * @return: pointer to the virtual address to use or 0 on error */ void *dm_pci_map_bar(struct udevice *dev, int bar, int flags); @@ -1411,6 +1432,14 @@ int dm_pci_find_next_ext_capability(struct udevice *dev, int start, int cap); */ int dm_pci_find_ext_capability(struct udevice *dev, int cap); +/** + * dm_pci_flr() - Perform FLR if the device suppoorts it + * + * @dev: PCI device to reset + * @return: 0 if OK, -ENOENT if FLR is not supported by dev + */ +int dm_pci_flr(struct udevice *dev); + #define dm_pci_virt_to_bus(dev, addr, flags) \ dm_pci_phys_to_bus(dev, (virt_to_phys(addr)), (flags)) #define dm_pci_bus_to_virt(dev, addr, flags, len, map_flags) \ diff --git a/include/trace.h b/include/trace.h index 99f34f72bc..606dba9768 100644 --- a/include/trace.h +++ b/include/trace.h @@ -39,7 +39,7 @@ struct trace_output_func { /* A header at the start of the trace output buffer */ struct trace_output_hdr { enum trace_chunk_type type; /* Record type */ - uint32_t rec_count; /* Number of records */ + size_t rec_count; /* Number of records */ }; /* Print statistics about traced function calls */ @@ -57,7 +57,7 @@ void trace_print_stats(void); * @param needed Returns number of bytes used / needed * @return 0 if ok, -1 on error (buffer exhausted) */ -int trace_list_functions(void *buff, int buff_size, unsigned *needed); +int trace_list_functions(void *buff, size_t buff_size, size_t *needed); /* Flags for ftrace_record */ enum ftrace_flags { @@ -77,7 +77,7 @@ struct trace_call { uint32_t flags; /* Flags and timestamp */ }; -int trace_list_calls(void *buff, int buff_size, unsigned int *needed); +int trace_list_calls(void *buff, size_t buff_size, size_t *needed); /** * Turn function tracing on and off diff --git a/lib/Kconfig b/lib/Kconfig index 416e63c1c7..3da45a5ec3 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -97,6 +97,8 @@ config SYS_HZ config USE_TINY_PRINTF bool "Enable tiny printf() version" + depends on SPL || TPL + default y help This option enables a tiny, stripped down printf version. This should only be used in space limited environments, @@ -192,6 +194,13 @@ config TRACE_BUFFER_SIZE the size is too small then 'trace stats' will show a message saying how many records were dropped due to buffer overflow. +config TRACE_CALL_DEPTH_LIMIT + int "Trace call depth limit" + depends on TRACE + default 15 + help + Sets the maximum call depth up to which function calls are recorded. + config TRACE_EARLY bool "Enable tracing before relocation" depends on TRACE @@ -209,6 +218,14 @@ config TRACE_EARLY_SIZE Sets the size of the early trace buffer in bytes. This is used to hold tracing information before relocation. +config TRACE_EARLY_CALL_DEPTH_LIMIT + int "Early trace call depth limit" + depends on TRACE_EARLY + default 200 + help + Sets the maximum call depth up to which function calls are recorded + during early tracing. + config TRACE_EARLY_ADDR hex "Address of early trace buffer in U-Boot" depends on TRACE_EARLY diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c index 1f4f270540..e8bfd1fb1e 100644 --- a/lib/fdtdec_test.c +++ b/lib/fdtdec_test.c @@ -138,6 +138,7 @@ static int run_test(const char *aliases, const char *nodes, const char *expect) } printf("pass\n"); + free(blob); return 0; } @@ -292,6 +293,7 @@ static int check_carveout(void) CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 2), 0); CHECKOK(check_fdt_carveout(fdt, 2, 2)); + free(fdt); return 0; } diff --git a/lib/hang.c b/lib/hang.c index c5a78694be..4d026a3e64 100644 --- a/lib/hang.c +++ b/lib/hang.c @@ -9,6 +9,7 @@ #include <common.h> #include <bootstage.h> +#include <os.h> /** * hang - stop processing by staying in an endless loop @@ -26,6 +27,8 @@ void hang(void) puts("### ERROR ### Please RESET the board ###\n"); #endif bootstage_error(BOOTSTAGE_ID_NEED_RESET); + if (IS_ENABLED(CONFIG_SANDBOX)) + os_exit(1); for (;;) ; } diff --git a/lib/trace.c b/lib/trace.c index 9956442fef..f2402b9359 100644 --- a/lib/trace.c +++ b/lib/trace.c @@ -56,6 +56,49 @@ static inline uintptr_t __attribute__((no_instrument_function)) return offset / FUNC_SITE_SIZE; } +#ifdef CONFIG_EFI_LOADER + +/** + * trace_gd - the value of the gd register + */ +static volatile void *trace_gd; + +/** + * trace_save_gd() - save the value of the gd register + */ +static void __attribute__((no_instrument_function)) trace_save_gd(void) +{ + trace_gd = gd; +} + +/** + * trace_swap_gd() - swap between U-Boot and application gd register value + * + * An UEFI application may change the value of the register that gd lives in. + * But some of our functions like get_ticks() access this register. So we + * have to set the gd register to the U-Boot value when entering a trace + * point and set it back to the application value when exiting the trace point. + */ +static void __attribute__((no_instrument_function)) trace_swap_gd(void) +{ + volatile void *temp_gd = trace_gd; + + trace_gd = gd; + gd = temp_gd; +} + +#else + +static void __attribute__((no_instrument_function)) trace_save_gd(void) +{ +} + +static void __attribute__((no_instrument_function)) trace_swap_gd(void) +{ +} + +#endif + static void __attribute__((no_instrument_function)) add_ftrace(void *func_ptr, void *caller, ulong flags) { @@ -100,6 +143,7 @@ void __attribute__((no_instrument_function)) __cyg_profile_func_enter( if (trace_enabled) { int func; + trace_swap_gd(); add_ftrace(func_ptr, caller, FUNCF_ENTRY); func = func_ptr_to_num(func_ptr); if (func < hdr->func_count) { @@ -111,6 +155,7 @@ void __attribute__((no_instrument_function)) __cyg_profile_func_enter( hdr->depth++; if (hdr->depth > hdr->depth_limit) hdr->max_depth = hdr->depth; + trace_swap_gd(); } } @@ -126,8 +171,10 @@ void __attribute__((no_instrument_function)) __cyg_profile_func_exit( void *func_ptr, void *caller) { if (trace_enabled) { + trace_swap_gd(); add_ftrace(func_ptr, caller, FUNCF_EXIT); hdr->depth--; + trace_swap_gd(); } } @@ -143,12 +190,12 @@ void __attribute__((no_instrument_function)) __cyg_profile_func_exit( * greater than buff_size if we ran out of space. * @return 0 if ok, -1 if space was exhausted */ -int trace_list_functions(void *buff, int buff_size, unsigned int *needed) +int trace_list_functions(void *buff, size_t buff_size, size_t *needed) { struct trace_output_hdr *output_hdr = NULL; void *end, *ptr = buff; - int func; - int upto; + size_t func; + size_t upto; end = buff ? buff + buff_size : NULL; @@ -159,7 +206,7 @@ int trace_list_functions(void *buff, int buff_size, unsigned int *needed) /* Add information about each function */ for (func = upto = 0; func < hdr->func_count; func++) { - int calls = hdr->call_accum[func]; + size_t calls = hdr->call_accum[func]; if (!calls) continue; @@ -188,12 +235,12 @@ int trace_list_functions(void *buff, int buff_size, unsigned int *needed) return 0; } -int trace_list_calls(void *buff, int buff_size, unsigned *needed) +int trace_list_calls(void *buff, size_t buff_size, size_t *needed) { struct trace_output_hdr *output_hdr = NULL; void *end, *ptr = buff; - int rec, upto; - int count; + size_t rec, upto; + size_t count; end = buff ? buff + buff_size : NULL; @@ -284,6 +331,8 @@ int __attribute__((no_instrument_function)) trace_init(void *buff, size_t needed; int was_disabled = !trace_enabled; + trace_save_gd(); + if (!was_disabled) { #ifdef CONFIG_TRACE_EARLY char *end; @@ -327,7 +376,7 @@ int __attribute__((no_instrument_function)) trace_init(void *buff, add_textbase(); puts("trace: enabled\n"); - hdr->depth_limit = 15; + hdr->depth_limit = CONFIG_TRACE_CALL_DEPTH_LIMIT; trace_enabled = 1; trace_inited = 1; @@ -361,7 +410,7 @@ int __attribute__((no_instrument_function)) trace_early_init(void) hdr->ftrace = (struct trace_call *)((char *)hdr + needed); hdr->ftrace_size = (buff_size - needed) / sizeof(*hdr->ftrace); add_textbase(); - hdr->depth_limit = 200; + hdr->depth_limit = CONFIG_TRACE_EARLY_CALL_DEPTH_LIMIT; printf("trace: early enable at %08x\n", CONFIG_TRACE_EARLY_ADDR); trace_enabled = 1; diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 2fc77b77c2..2c9cfb450d 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3066,7 +3066,6 @@ CONFIG_SYS_JFFS2_SORT_FRAGMENTS CONFIG_SYS_KMBEC_FPGA_BASE CONFIG_SYS_KMBEC_FPGA_SIZE CONFIG_SYS_KWD_CONFIG -CONFIG_SYS_KW_SPI_MPP CONFIG_SYS_L2 CONFIG_SYS_L2_PL310 CONFIG_SYS_L2_SIZE diff --git a/test/dm/adc.c b/test/dm/adc.c index 1f82304f41..da7bd4bf1f 100644 --- a/test/dm/adc.c +++ b/test/dm/adc.c @@ -24,7 +24,7 @@ static int dm_test_adc_bind(struct unit_test_state *uts) struct udevice *dev; unsigned int channel_mask; - ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc", &dev)); + ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc@0", &dev)); ut_asserteq_str(SANDBOX_ADC_DEVNAME, dev->name); ut_assertok(adc_channel_mask(dev, &channel_mask)); @@ -38,7 +38,7 @@ static int dm_test_adc_wrong_channel_selection(struct unit_test_state *uts) { struct udevice *dev; - ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc", &dev)); + ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc@0", &dev)); ut_asserteq(-EINVAL, adc_start_channel(dev, SANDBOX_ADC_CHANNELS)); return 0; @@ -51,7 +51,7 @@ static int dm_test_adc_supply(struct unit_test_state *uts) struct udevice *dev; int uV; - ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc", &dev)); + ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc@0", &dev)); /* Test Vss value - predefined 0 uV */ ut_assertok(adc_vss_value(dev, &uV)); @@ -94,7 +94,7 @@ static int dm_test_adc_single_channel_conversion(struct unit_test_state *uts) unsigned int i, data; struct udevice *dev; - ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc", &dev)); + ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc@0", &dev)); /* Test each ADC channel's value */ for (i = 0; i < SANDBOX_ADC_CHANNELS; i++, tdata++) { ut_assertok(adc_start_channel(dev, tdata->id)); @@ -117,7 +117,7 @@ static int dm_test_adc_multi_channel_conversion(struct unit_test_state *uts) ADC_CHANNEL(2) | ADC_CHANNEL(3); /* Start multi channel conversion */ - ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc", &dev)); + ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc@0", &dev)); ut_assertok(adc_start_channels(dev, channel_mask)); ut_assertok(adc_channels_data(dev, channel_mask, channels)); @@ -136,7 +136,7 @@ static int dm_test_adc_single_channel_shot(struct unit_test_state *uts) for (i = 0; i < SANDBOX_ADC_CHANNELS; i++, tdata++) { /* Start single channel conversion */ - ut_assertok(adc_channel_single_shot("adc", tdata->id, &data)); + ut_assertok(adc_channel_single_shot("adc@0", tdata->id, &data)); /* Compare the expected and returned conversion data. */ ut_asserteq(tdata->data, data); } @@ -155,7 +155,7 @@ static int dm_test_adc_multi_channel_shot(struct unit_test_state *uts) ADC_CHANNEL(2) | ADC_CHANNEL(3); /* Start single call and multi channel conversion */ - ut_assertok(adc_channels_single_shot("adc", channel_mask, channels)); + ut_assertok(adc_channels_single_shot("adc@0", channel_mask, channels)); /* Compare the expected and returned conversion data. */ for (i = 0; i < SANDBOX_ADC_CHANNELS; i++, tdata++) @@ -183,7 +183,7 @@ static int dm_test_adc_raw_to_uV(struct unit_test_state *uts) struct udevice *dev; int uV; - ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc", &dev)); + ut_assertok(uclass_get_device_by_name(UCLASS_ADC, "adc@0", &dev)); /* Test each ADC channel's value in microvolts */ for (i = 0; i < SANDBOX_ADC_CHANNELS; i++, tdata++) { ut_assertok(adc_start_channel(dev, tdata->id)); diff --git a/test/dm/pci.c b/test/dm/pci.c index a1febd54b7..c325f6600e 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -245,3 +245,52 @@ static int dm_test_pci_cap(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_pci_cap, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test looking up BARs in EA capability structure */ +static int dm_test_pci_ea(struct unit_test_state *uts) +{ + struct udevice *bus, *swap; + void *bar; + int cap; + + /* + * use emulated device mapping function, we're not using real physical + * addresses in this test + */ + sandbox_set_enable_pci_map(true); + + ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x01, 0), &swap)); + + /* look up PCI_CAP_ID_EA */ + cap = dm_pci_find_capability(swap, PCI_CAP_ID_EA); + ut_asserteq(PCI_CAP_ID_EA_OFFSET, cap); + + /* test swap case in BAR 1 */ + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_0, 0); + ut_assertnonnull(bar); + *(int *)bar = 2; /* swap upper/lower */ + + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0); + ut_assertnonnull(bar); + strcpy(bar, "ea TEST"); + unmap_sysmem(bar); + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0); + ut_assertnonnull(bar); + ut_asserteq_str("EA test", bar); + + /* test magic values in BARs2, 4; BAR 3 is n/a */ + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_2, 0); + ut_assertnonnull(bar); + ut_asserteq(PCI_EA_BAR2_MAGIC, *(u32 *)bar); + + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_3, 0); + ut_assertnull(bar); + + bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_4, 0); + ut_assertnonnull(bar); + ut_asserteq(PCI_EA_BAR4_MAGIC, *(u32 *)bar); + + return 0; +} +DM_TEST(dm_test_pci_ea, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); diff --git a/test/dm/usb.c b/test/dm/usb.c index 3493617544..ef454b0ae5 100644 --- a/test/dm/usb.c +++ b/test/dm/usb.c @@ -125,7 +125,7 @@ static int dm_test_usb_keyb(struct unit_test_state *uts) /* Initially there should be no characters */ ut_asserteq(0, tstc()); - ut_assertok(uclass_get_device_by_name(UCLASS_USB_EMUL, "keyb", + ut_assertok(uclass_get_device_by_name(UCLASS_USB_EMUL, "keyb@3", &dev)); /* diff --git a/test/py/tests/test_ofplatdata.py b/test/py/tests/test_ofplatdata.py index 98103ee71a..263334b074 100644 --- a/test/py/tests/test_ofplatdata.py +++ b/test/py/tests/test_ofplatdata.py @@ -2,6 +2,7 @@ # Copyright (c) 2016 Google, Inc import pytest +import u_boot_utils as util OF_PLATDATA_OUTPUT = ''' of-platdata probe: @@ -31,6 +32,15 @@ intarray 0 0 0 0 longbytearray 00 00 00 00 00 00 00 00 00 string <NULL> stringarray "one" "" "" +of-platdata probe: +bool 0 +byte 00 +bytearray 00 00 00 +int 0 +intarray 0 0 0 0 +longbytearray 00 00 00 00 00 00 00 00 00 +string <NULL> +stringarray "spl" "" "" ''' @pytest.mark.buildconfigspec('spl_of_platdata') @@ -40,3 +50,21 @@ def test_ofplatdata(u_boot_console): cons.restart_uboot_with_flags(['--show_of_platdata']) output = cons.get_spawn_output().replace('\r', '') assert OF_PLATDATA_OUTPUT in output + +@pytest.mark.buildconfigspec('spl_of_platdata') +def test_spl_devicetree(u_boot_console): + """Test content of spl device-tree""" + cons = u_boot_console + dtb = cons.config.build_dir + '/spl/u-boot-spl.dtb' + fdtgrep = cons.config.build_dir + '/tools/fdtgrep' + output = util.run_and_log(cons, [fdtgrep, '-l', dtb]) + + assert "u-boot,dm-pre-reloc" not in output + assert "u-boot,dm-pre-proper" not in output + assert "u-boot,dm-spl" not in output + assert "u-boot,dm-tpl" not in output + + assert "spl-test4" in output + assert "spl-test5" not in output + assert "spl-test6" not in output + assert "spl-test7" in output diff --git a/tools/binman/README b/tools/binman/README index 927fa856ac..ac193f16cf 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -702,6 +702,20 @@ To enable Python test coverage on Debian-type distributions (e.g. Ubuntu): $ sudo apt-get install python-coverage python-pytest +Concurrent tests +---------------- + +Binman tries to run tests concurrently. This means that the tests make use of +all available CPUs to run. + + To enable this: + + $ sudo apt-get install python-subunit python3-subunit + +Use '-P 1' to disable this. It is automatically disabled when code coverage is +being used (-T) since they are incompatible. + + Advanced Features / Technical docs ---------------------------------- diff --git a/tools/binman/README.entries b/tools/binman/README.entries index 9fc2f83280..357946d630 100644 --- a/tools/binman/README.entries +++ b/tools/binman/README.entries @@ -224,6 +224,20 @@ See README.x86 for information about x86 binary blobs. +Entry: intel-refcode: Entry containing an Intel Reference Code file +------------------------------------------------------------------- + +Properties / Entry arguments: + - filename: Filename of file to read into entry + +This file contains code for setting up the platform on some Intel systems. +This is executed by U-Boot when needed early during startup. A typical +filename is 'refcode.bin'. + +See README.x86 for information about x86 binary blobs. + + + Entry: intel-vbt: Entry containing an Intel Video BIOS Table (VBT) file ----------------------------------------------------------------------- @@ -627,6 +641,7 @@ Entry: vblock: An entry which contains a Chromium OS verified boot block ------------------------------------------------------------------------ Properties / Entry arguments: + - content: List of phandles to entries to sign - keydir: Directory containing the public keys to use - keyblock: Name of the key file to use (inside keydir) - signprivate: Name of provide key file to use (inside keydir) diff --git a/tools/binman/binman.py b/tools/binman/binman.py index 439908e665..aad2e9c8bc 100755 --- a/tools/binman/binman.py +++ b/tools/binman/binman.py @@ -9,6 +9,8 @@ """See README for more information""" +from __future__ import print_function + import glob import multiprocessing import os @@ -85,13 +87,25 @@ def RunTests(debug, processes, args): else: suite.run(result) - print result + # Remove errors which just indicate a missing test. Since Python v3.5 If an + # ImportError or AttributeError occurs while traversing name then a + # synthetic test that raises that error when run will be returned. These + # errors are included in the errors accumulated by result.errors. + if test_name: + errors = [] + for test, err in result.errors: + if ("has no attribute '%s'" % test_name) not in err: + errors.append((test, err)) + result.testsRun -= 1 + result.errors = errors + + print(result) for test, err in result.errors: - print test.id(), err + print(test.id(), err) for test, err in result.failures: - print err, result.failures + print(err, result.failures) if result.errors or result.failures: - print 'binman tests FAILED' + print('binman tests FAILED') return 1 return 0 @@ -143,9 +157,9 @@ def RunBinman(options, args): try: ret_code = control.Binman(options, args) except Exception as e: - print 'binman: %s' % e + print('binman: %s' % e) if options.debug: - print + print() traceback.print_exc() ret_code = 1 return ret_code diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index 0ba542ee98..03dfa2f805 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -8,7 +8,6 @@ from __future__ import print_function from collections import OrderedDict -from sets import Set import sys import fdt_util @@ -109,7 +108,7 @@ class Section(object): def GetFdtSet(self): """Get the set of device tree files used by this image""" - fdt_set = Set() + fdt_set = set() for entry in self._entries.values(): fdt_set.update(entry.GetFdtSet()) return fdt_set @@ -254,7 +253,7 @@ class Section(object): """ for entry in self._entries.values(): offset_dict = entry.GetOffsets() - for name, info in offset_dict.iteritems(): + for name, info in offset_dict.items(): self._SetEntryOffsetSize(name, *info) def PackEntries(self): @@ -333,7 +332,7 @@ class Section(object): def GetData(self): """Get the contents of the section""" - section_data = chr(self._pad_byte) * self._size + section_data = tools.GetBytes(self._pad_byte, self._size) for entry in self._entries.values(): data = entry.GetData() diff --git a/tools/binman/control.py b/tools/binman/control.py index b32e4e1996..20186ee198 100644 --- a/tools/binman/control.py +++ b/tools/binman/control.py @@ -5,6 +5,8 @@ # Creates binary images from input files controlled by a description # +from __future__ import print_function + from collections import OrderedDict import os import sys @@ -129,12 +131,15 @@ def Binman(options, args): if options.image: skip = [] - for name, image in images.iteritems(): - if name not in options.image: - del images[name] + new_images = OrderedDict() + for name, image in images.items(): + if name in options.image: + new_images[name] = image + else: skip.append(name) + images = new_images if skip and options.verbosity >= 2: - print 'Skipping images: %s' % ', '.join(skip) + print('Skipping images: %s' % ', '.join(skip)) state.Prepare(images, dtb) @@ -170,7 +175,7 @@ def Binman(options, args): except Exception as e: if options.map: fname = image.WriteMap() - print "Wrote map file '%s' to show errors" % fname + print("Wrote map file '%s' to show errors" % fname) raise image.SetImagePos() if options.update_fdt: diff --git a/tools/binman/elf.py b/tools/binman/elf.py index 97df8e32c5..828681d76d 100644 --- a/tools/binman/elf.py +++ b/tools/binman/elf.py @@ -59,7 +59,7 @@ def GetSymbols(fname, patterns): flags[1] == 'w') # Sort dict by address - return OrderedDict(sorted(syms.iteritems(), key=lambda x: x[1].address)) + return OrderedDict(sorted(syms.items(), key=lambda x: x[1].address)) def GetSymbolAddress(fname, sym_name): """Get a value of a symbol from an ELF file @@ -98,7 +98,7 @@ def LookupAndWriteSymbols(elf_fname, entry, section): base = syms.get('__image_copy_start') if not base: return - for name, sym in syms.iteritems(): + for name, sym in syms.items(): if name.startswith('_binman'): msg = ("Section '%s': Symbol '%s'\n in entry '%s'" % (section.GetPath(), name, entry.GetPath())) diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py index b68530c19b..42d94cbbbe 100644 --- a/tools/binman/elf_test.py +++ b/tools/binman/elf_test.py @@ -22,7 +22,7 @@ class FakeEntry: """ def __init__(self, contents_size): self.contents_size = contents_size - self.data = 'a' * contents_size + self.data = tools.GetBytes(ord('a'), contents_size) def GetPath(self): return 'entry_path' @@ -122,7 +122,8 @@ class TestElf(unittest.TestCase): section = FakeSection(sym_value=None) elf_fname = os.path.join(binman_dir, 'test', 'u_boot_binman_syms') syms = elf.LookupAndWriteSymbols(elf_fname, entry, section) - self.assertEqual(chr(255) * 16 + 'a' * 4, entry.data) + self.assertEqual(tools.GetBytes(255, 16) + tools.GetBytes(ord('a'), 4), + entry.data) def testDebug(self): """Check that enabling debug in the elf module produced debug output""" diff --git a/tools/binman/entry.py b/tools/binman/entry.py index 648cfd241f..d842d89dd6 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -18,7 +18,6 @@ except: have_importlib = False import os -from sets import Set import sys import fdt_util @@ -178,8 +177,8 @@ class Entry(object): # It would be better to use isinstance(self, Entry_blob_dtb) here but # we cannot access Entry_blob_dtb if fname and fname.endswith('.dtb'): - return Set([fname]) - return Set() + return set([fname]) + return set() def ExpandEntries(self): pass diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py index 1f7ff5b4e4..b30a7beecc 100644 --- a/tools/binman/entry_test.py +++ b/tools/binman/entry_test.py @@ -41,7 +41,11 @@ class TestEntry(unittest.TestCase): del sys.modules['importlib'] global entry if entry: - reload(entry) + if sys.version_info[0] >= 3: + import importlib + importlib.reload(entry) + else: + reload(entry) else: import entry entry.Entry.Create(None, self.GetNode(), 'u-boot-spl') diff --git a/tools/binman/etype/_testing.py b/tools/binman/etype/_testing.py index 3e345bd952..ac62d2e200 100644 --- a/tools/binman/etype/_testing.py +++ b/tools/binman/etype/_testing.py @@ -75,7 +75,7 @@ class Entry__testing(Entry): def ObtainContents(self): if self.return_unknown_contents or not self.return_contents: return False - self.data = 'a' + self.data = b'a' self.contents_size = len(self.data) if self.return_contents_once: self.return_contents = False diff --git a/tools/binman/etype/blob.py b/tools/binman/etype/blob.py index ae80bbee53..f56a1f8768 100644 --- a/tools/binman/etype/blob.py +++ b/tools/binman/etype/blob.py @@ -60,7 +60,7 @@ class Entry_blob(Entry): except AttributeError: data = lz4.compress(data) ''' - data = tools.Run('lz4', '-c', self._pathname) + data = tools.Run('lz4', '-c', self._pathname, binary=True) self.SetContents(data) return True diff --git a/tools/binman/etype/fill.py b/tools/binman/etype/fill.py index dcfe978a5b..68efe42ec0 100644 --- a/tools/binman/etype/fill.py +++ b/tools/binman/etype/fill.py @@ -5,7 +5,7 @@ from entry import Entry import fdt_util - +import tools class Entry_fill(Entry): """An entry which is filled to a particular byte value @@ -28,5 +28,5 @@ class Entry_fill(Entry): self.fill_value = fdt_util.GetByte(self._node, 'fill-byte', 0) def ObtainContents(self): - self.SetContents(chr(self.fill_value) * self.size) + self.SetContents(tools.GetBytes(self.fill_value, self.size)) return True diff --git a/tools/binman/etype/fmap.py b/tools/binman/etype/fmap.py index bf35a5bbf4..e6b5c5c74c 100644 --- a/tools/binman/etype/fmap.py +++ b/tools/binman/etype/fmap.py @@ -7,6 +7,7 @@ from entry import Entry import fmap_util +import tools class Entry_fmap(Entry): @@ -46,7 +47,7 @@ class Entry_fmap(Entry): if pos is not None: pos -= entry.section.GetRootSkipAtStart() areas.append(fmap_util.FmapArea(pos or 0, entry.size or 0, - entry.name, 0)) + tools.FromUnicode(entry.name), 0)) entries = self.section._image.GetEntries() areas = [] diff --git a/tools/binman/etype/gbb.py b/tools/binman/etype/gbb.py index 8fe10f4713..a94c0fca9d 100644 --- a/tools/binman/etype/gbb.py +++ b/tools/binman/etype/gbb.py @@ -64,7 +64,7 @@ class Entry_gbb(Entry): self.gbb_flags = 0 flags_node = node.FindNode('flags') if flags_node: - for flag, value in gbb_flag_properties.iteritems(): + for flag, value in gbb_flag_properties.items(): if fdt_util.GetBool(flags_node, flag): self.gbb_flags |= value diff --git a/tools/binman/etype/text.py b/tools/binman/etype/text.py index c4aa510a87..9ee04d7c9d 100644 --- a/tools/binman/etype/text.py +++ b/tools/binman/etype/text.py @@ -7,6 +7,7 @@ from collections import OrderedDict from entry import Entry, EntryArg import fdt_util +import tools class Entry_text(Entry): @@ -48,9 +49,11 @@ class Entry_text(Entry): """ def __init__(self, section, etype, node): Entry.__init__(self, section, etype, node) - self.text_label, = self.GetEntryArgsOrProps( - [EntryArg('text-label', str)]) - self.value, = self.GetEntryArgsOrProps([EntryArg(self.text_label, str)]) + label, = self.GetEntryArgsOrProps([EntryArg('text-label', str)]) + self.text_label = tools.ToStr(label) if type(label) != str else label + value, = self.GetEntryArgsOrProps([EntryArg(self.text_label, str)]) + value = tools.ToBytes(value) if value is not None else value + self.value = value def ObtainContents(self): if not self.value: diff --git a/tools/binman/etype/u_boot_dtb_with_ucode.py b/tools/binman/etype/u_boot_dtb_with_ucode.py index 444c51b8b7..188888e022 100644 --- a/tools/binman/etype/u_boot_dtb_with_ucode.py +++ b/tools/binman/etype/u_boot_dtb_with_ucode.py @@ -26,7 +26,7 @@ class Entry_u_boot_dtb_with_ucode(Entry_blob_dtb): """ def __init__(self, section, etype, node): Entry_blob_dtb.__init__(self, section, etype, node) - self.ucode_data = '' + self.ucode_data = b'' self.collate = False self.ucode_offset = None self.ucode_size = None @@ -65,7 +65,7 @@ class Entry_u_boot_dtb_with_ucode(Entry_blob_dtb): for node in self.ucode.subnodes: data_prop = node.props.get('data') if data_prop: - self.ucode_data += ''.join(data_prop.bytes) + self.ucode_data += data_prop.bytes if self.collate: node.DeleteProp('data') return True diff --git a/tools/binman/etype/u_boot_spl_bss_pad.py b/tools/binman/etype/u_boot_spl_bss_pad.py index 00b7ac5004..66a296a6f8 100644 --- a/tools/binman/etype/u_boot_spl_bss_pad.py +++ b/tools/binman/etype/u_boot_spl_bss_pad.py @@ -38,5 +38,5 @@ class Entry_u_boot_spl_bss_pad(Entry_blob): bss_size = elf.GetSymbolAddress(fname, '__bss_size') if not bss_size: self.Raise('Expected __bss_size symbol in spl/u-boot-spl') - self.SetContents(chr(0) * bss_size) + self.SetContents(tools.GetBytes(0, bss_size)) return True diff --git a/tools/binman/etype/u_boot_ucode.py b/tools/binman/etype/u_boot_ucode.py index a00e530295..dee8848db7 100644 --- a/tools/binman/etype/u_boot_ucode.py +++ b/tools/binman/etype/u_boot_ucode.py @@ -69,7 +69,7 @@ class Entry_u_boot_ucode(Entry_blob): if entry and entry.target_offset: found = True if not found: - self.data = '' + self.data = b'' return True # Get the microcode from the device tree entry. If it is not available # yet, return False so we will be called later. If the section simply @@ -87,7 +87,7 @@ class Entry_u_boot_ucode(Entry_blob): if not fdt_entry.collate: # This binary can be empty - self.data = '' + self.data = b'' return True # Write it out to a file diff --git a/tools/binman/etype/vblock.py b/tools/binman/etype/vblock.py index 334ff9f966..91fa2f7808 100644 --- a/tools/binman/etype/vblock.py +++ b/tools/binman/etype/vblock.py @@ -51,7 +51,7 @@ class Entry_vblock(Entry): def ObtainContents(self): # Join up the data files to be signed - input_data = '' + input_data = b'' for entry_phandle in self.content: data = self.section.GetContentsByPhandle(entry_phandle, self) if data is None: diff --git a/tools/binman/fmap_util.py b/tools/binman/fmap_util.py index be3cbee87b..d0f956b622 100644 --- a/tools/binman/fmap_util.py +++ b/tools/binman/fmap_util.py @@ -8,9 +8,12 @@ import collections import struct +import sys + +import tools # constants imported from lib/fmap.h -FMAP_SIGNATURE = '__FMAP__' +FMAP_SIGNATURE = b'__FMAP__' FMAP_VER_MAJOR = 1 FMAP_VER_MINOR = 0 FMAP_STRLEN = 32 @@ -50,6 +53,8 @@ FmapArea = collections.namedtuple('FmapArea', FMAP_AREA_NAMES) def NameToFmap(name): + if type(name) == bytes and sys.version_info[0] >= 3: + name = name.decode('utf-8') # pragma: no cover (for Python 2) return name.replace('\0', '').replace('-', '_').upper() def ConvertName(field_names, fields): @@ -65,7 +70,7 @@ def ConvertName(field_names, fields): value: value of that field (string for the ones we support) """ name_index = field_names.index('name') - fields[name_index] = NameToFmap(fields[name_index]) + fields[name_index] = tools.ToBytes(NameToFmap(fields[name_index])) def DecodeFmap(data): """Decode a flashmap into a header and list of areas @@ -106,7 +111,8 @@ def EncodeFmap(image_size, name, areas): ConvertName(names, params) return struct.pack(fmt, *params) - values = FmapHeader(FMAP_SIGNATURE, 1, 0, 0, image_size, name, len(areas)) + values = FmapHeader(FMAP_SIGNATURE, 1, 0, 0, image_size, + tools.FromUnicode(name), len(areas)) blob = _FormatBlob(FMAP_HEADER_FORMAT, FMAP_HEADER_NAMES, values) for area in areas: blob += _FormatBlob(FMAP_AREA_FORMAT, FMAP_AREA_NAMES, area) diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index daea1ea138..cc57ef3e04 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -29,38 +29,38 @@ import tools import tout # Contents of test files, corresponding to different entry types -U_BOOT_DATA = '1234' -U_BOOT_IMG_DATA = 'img' -U_BOOT_SPL_DATA = '56780123456789abcde' -U_BOOT_TPL_DATA = 'tpl' -BLOB_DATA = '89' -ME_DATA = '0abcd' -VGA_DATA = 'vga' -U_BOOT_DTB_DATA = 'udtb' -U_BOOT_SPL_DTB_DATA = 'spldtb' -U_BOOT_TPL_DTB_DATA = 'tpldtb' -X86_START16_DATA = 'start16' -X86_START16_SPL_DATA = 'start16spl' -X86_START16_TPL_DATA = 'start16tpl' -PPC_MPC85XX_BR_DATA = 'ppcmpc85xxbr' -U_BOOT_NODTB_DATA = 'nodtb with microcode pointer somewhere in here' -U_BOOT_SPL_NODTB_DATA = 'splnodtb with microcode pointer somewhere in here' -U_BOOT_TPL_NODTB_DATA = 'tplnodtb with microcode pointer somewhere in here' -FSP_DATA = 'fsp' -CMC_DATA = 'cmc' -VBT_DATA = 'vbt' -MRC_DATA = 'mrc' +U_BOOT_DATA = b'1234' +U_BOOT_IMG_DATA = b'img' +U_BOOT_SPL_DATA = b'56780123456789abcde' +U_BOOT_TPL_DATA = b'tpl' +BLOB_DATA = b'89' +ME_DATA = b'0abcd' +VGA_DATA = b'vga' +U_BOOT_DTB_DATA = b'udtb' +U_BOOT_SPL_DTB_DATA = b'spldtb' +U_BOOT_TPL_DTB_DATA = b'tpldtb' +X86_START16_DATA = b'start16' +X86_START16_SPL_DATA = b'start16spl' +X86_START16_TPL_DATA = b'start16tpl' +PPC_MPC85XX_BR_DATA = b'ppcmpc85xxbr' +U_BOOT_NODTB_DATA = b'nodtb with microcode pointer somewhere in here' +U_BOOT_SPL_NODTB_DATA = b'splnodtb with microcode pointer somewhere in here' +U_BOOT_TPL_NODTB_DATA = b'tplnodtb with microcode pointer somewhere in here' +FSP_DATA = b'fsp' +CMC_DATA = b'cmc' +VBT_DATA = b'vbt' +MRC_DATA = b'mrc' TEXT_DATA = 'text' TEXT_DATA2 = 'text2' TEXT_DATA3 = 'text3' -CROS_EC_RW_DATA = 'ecrw' -GBB_DATA = 'gbbd' -BMPBLK_DATA = 'bmp' -VBLOCK_DATA = 'vblk' -FILES_DATA = ("sorry I'm late\nOh, don't bother apologising, I'm " + - "sorry you're alive\n") -COMPRESS_DATA = 'data to compress' -REFCODE_DATA = 'refcode' +CROS_EC_RW_DATA = b'ecrw' +GBB_DATA = b'gbbd' +BMPBLK_DATA = b'bmp' +VBLOCK_DATA = b'vblk' +FILES_DATA = (b"sorry I'm late\nOh, don't bother apologising, I'm " + + b"sorry you're alive\n") +COMPRESS_DATA = b'data to compress' +REFCODE_DATA = b'refcode' class TestFunctional(unittest.TestCase): @@ -119,11 +119,11 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('refcode.bin', REFCODE_DATA) # ELF file with a '_dt_ucode_base_size' symbol - with open(self.TestFile('u_boot_ucode_ptr')) as fd: + with open(self.TestFile('u_boot_ucode_ptr'), 'rb') as fd: TestFunctional._MakeInputFile('u-boot', fd.read()) # Intel flash descriptor file - with open(self.TestFile('descriptor.bin')) as fd: + with open(self.TestFile('descriptor.bin'), 'rb') as fd: TestFunctional._MakeInputFile('descriptor.bin', fd.read()) shutil.copytree(self.TestFile('files'), @@ -214,7 +214,7 @@ class TestFunctional(unittest.TestCase): if verbosity is not None: args.append('-v%d' % verbosity) if entry_args: - for arg, value in entry_args.iteritems(): + for arg, value in entry_args.items(): args.append('-a%s=%s' % (arg, value)) if images: for image in images: @@ -236,7 +236,7 @@ class TestFunctional(unittest.TestCase): """ tools.PrepareOutputDir(None) dtb = fdt_util.EnsureCompiled(self.TestFile(fname)) - with open(dtb) as fd: + with open(dtb, 'rb') as fd: data = fd.read() TestFunctional._MakeInputFile(outfile, data) tools.FinaliseOutputDir() @@ -291,7 +291,6 @@ class TestFunctional(unittest.TestCase): # Use the compiled test file as the u-boot-dtb input if use_real_dtb: dtb_data = self._SetupDtb(fname) - infile = os.path.join(self._indir, 'u-boot.dtb') # For testing purposes, make a copy of the DT for SPL and TPL. Add # a node indicating which it is, so aid verification. @@ -317,7 +316,7 @@ class TestFunctional(unittest.TestCase): map_data = fd.read() else: map_data = None - with open(image_fname) as fd: + with open(image_fname, 'rb') as fd: return fd.read(), dtb_data, map_data, out_dtb_fname finally: # Put the test file back @@ -379,7 +378,7 @@ class TestFunctional(unittest.TestCase): Args: Filename of ELF file to use as SPL """ - with open(self.TestFile(src_fname)) as fd: + with open(self.TestFile(src_fname), 'rb') as fd: TestFunctional._MakeInputFile('spl/u-boot-spl', fd.read()) @classmethod @@ -396,7 +395,7 @@ class TestFunctional(unittest.TestCase): for grep in grep_list: if grep in target: return - self.fail("Error: '%' not found in '%s'" % (grep_list, target)) + self.fail("Error: '%s' not found in '%s'" % (grep_list, target)) def CheckNoGaps(self, entries): """Check that all entries fit together without gaps @@ -541,7 +540,7 @@ class TestFunctional(unittest.TestCase): self.assertEqual(len(U_BOOT_DATA), image._size) fname = tools.GetOutputFilename('image1.bin') self.assertTrue(os.path.exists(fname)) - with open(fname) as fd: + with open(fname, 'rb') as fd: data = fd.read() self.assertEqual(U_BOOT_DATA, data) @@ -549,11 +548,11 @@ class TestFunctional(unittest.TestCase): self.assertEqual(3 + len(U_BOOT_DATA) + 5, image._size) fname = tools.GetOutputFilename('image2.bin') self.assertTrue(os.path.exists(fname)) - with open(fname) as fd: + with open(fname, 'rb') as fd: data = fd.read() self.assertEqual(U_BOOT_DATA, data[3:7]) - self.assertEqual(chr(0) * 3, data[:3]) - self.assertEqual(chr(0) * 5, data[7:]) + self.assertEqual(tools.GetBytes(0, 3), data[:3]) + self.assertEqual(tools.GetBytes(0, 5), data[7:]) def testBadAlign(self): """Test that an invalid alignment value is detected""" @@ -732,7 +731,8 @@ class TestFunctional(unittest.TestCase): """Test that the image pad byte can be specified""" self._SetupSplElf() data = self._DoReadFile('021_image_pad.dts') - self.assertEqual(U_BOOT_SPL_DATA + (chr(0xff) * 1) + U_BOOT_DATA, data) + self.assertEqual(U_BOOT_SPL_DATA + tools.GetBytes(0xff, 1) + + U_BOOT_DATA, data) def testImageName(self): """Test that image files can be named""" @@ -755,8 +755,8 @@ class TestFunctional(unittest.TestCase): """Test that entries can be sorted""" self._SetupSplElf() data = self._DoReadFile('024_sorted.dts') - self.assertEqual(chr(0) * 1 + U_BOOT_SPL_DATA + chr(0) * 2 + - U_BOOT_DATA, data) + self.assertEqual(tools.GetBytes(0, 1) + U_BOOT_SPL_DATA + + tools.GetBytes(0, 2) + U_BOOT_DATA, data) def testPackZeroOffset(self): """Test that an entry at offset 0 is not given a new offset""" @@ -798,12 +798,12 @@ class TestFunctional(unittest.TestCase): """Test that a basic x86 ROM can be created""" self._SetupSplElf() data = self._DoReadFile('029_x86-rom.dts') - self.assertEqual(U_BOOT_DATA + chr(0) * 7 + U_BOOT_SPL_DATA + - chr(0) * 2, data) + self.assertEqual(U_BOOT_DATA + tools.GetBytes(0, 7) + U_BOOT_SPL_DATA + + tools.GetBytes(0, 2), data) def testPackX86RomMeNoDesc(self): """Test that an invalid Intel descriptor entry is detected""" - TestFunctional._MakeInputFile('descriptor.bin', '') + TestFunctional._MakeInputFile('descriptor.bin', b'') with self.assertRaises(ValueError) as e: self._DoTestFile('031_x86-rom-me.dts') self.assertIn("Node '/binman/intel-descriptor': Cannot find FD " @@ -900,8 +900,8 @@ class TestFunctional(unittest.TestCase): """ first, pos_and_size = self._RunMicrocodeTest('034_x86_ucode.dts', U_BOOT_NODTB_DATA) - self.assertEqual('nodtb with microcode' + pos_and_size + - ' somewhere in here', first) + self.assertEqual(b'nodtb with microcode' + pos_and_size + + b' somewhere in here', first) def _RunPackUbootSingleMicrocode(self): """Test that x86 microcode can be handled correctly @@ -932,8 +932,8 @@ class TestFunctional(unittest.TestCase): pos_and_size = struct.pack('<2L', 0xfffffe00 + ucode_pos, len(ucode_data)) first = data[:len(U_BOOT_NODTB_DATA)] - self.assertEqual('nodtb with microcode' + pos_and_size + - ' somewhere in here', first) + self.assertEqual(b'nodtb with microcode' + pos_and_size + + b' somewhere in here', first) def testPackUbootSingleMicrocode(self): """Test that x86 microcode can be handled correctly with fdt_normal. @@ -970,7 +970,7 @@ class TestFunctional(unittest.TestCase): """Test that a U-Boot binary without the microcode symbol is detected""" # ELF file without a '_dt_ucode_base_size' symbol try: - with open(self.TestFile('u_boot_no_ucode_ptr')) as fd: + with open(self.TestFile('u_boot_no_ucode_ptr'), 'rb') as fd: TestFunctional._MakeInputFile('u-boot', fd.read()) with self.assertRaises(ValueError) as e: @@ -980,7 +980,7 @@ class TestFunctional(unittest.TestCase): finally: # Put the original file back - with open(self.TestFile('u_boot_ucode_ptr')) as fd: + with open(self.TestFile('u_boot_ucode_ptr'), 'rb') as fd: TestFunctional._MakeInputFile('u-boot', fd.read()) def testMicrocodeNotInImage(self): @@ -993,7 +993,7 @@ class TestFunctional(unittest.TestCase): def testWithoutMicrocode(self): """Test that we can cope with an image without microcode (e.g. qemu)""" - with open(self.TestFile('u_boot_no_ucode_ptr')) as fd: + with open(self.TestFile('u_boot_no_ucode_ptr'), 'rb') as fd: TestFunctional._MakeInputFile('u-boot', fd.read()) data, dtb, _, _ = self._DoReadFileDtb('044_x86_optional_ucode.dts', True) @@ -1006,7 +1006,7 @@ class TestFunctional(unittest.TestCase): used_len = len(U_BOOT_NODTB_DATA) + fdt_len third = data[used_len:] - self.assertEqual(chr(0) * (0x200 - used_len), third) + self.assertEqual(tools.GetBytes(0, 0x200 - used_len), third) def testUnknownPosSize(self): """Test that microcode must be placed within the image""" @@ -1035,7 +1035,8 @@ class TestFunctional(unittest.TestCase): # ELF file with a '__bss_size' symbol self._SetupSplElf() data = self._DoReadFile('047_spl_bss_pad.dts') - self.assertEqual(U_BOOT_SPL_DATA + (chr(0) * 10) + U_BOOT_DATA, data) + self.assertEqual(U_BOOT_SPL_DATA + tools.GetBytes(0, 10) + U_BOOT_DATA, + data) def testSplBssPadMissing(self): """Test that a missing symbol is detected""" @@ -1067,8 +1068,8 @@ class TestFunctional(unittest.TestCase): self._SetupSplElf('u_boot_ucode_ptr') first, pos_and_size = self._RunMicrocodeTest(dts, U_BOOT_SPL_NODTB_DATA, ucode_second=ucode_second) - self.assertEqual('splnodtb with microc' + pos_and_size + - 'ter somewhere in here', first) + self.assertEqual(b'splnodtb with microc' + pos_and_size + + b'ter somewhere in here', first) def testPackUbootSplMicrocode(self): """Test that x86 microcode can be handled correctly in SPL""" @@ -1109,9 +1110,9 @@ class TestFunctional(unittest.TestCase): self._SetupSplElf('u_boot_binman_syms') data = self._DoReadFile('053_symbols.dts') sym_values = struct.pack('<LQL', 0x24 + 0, 0x24 + 24, 0x24 + 20) - expected = (sym_values + U_BOOT_SPL_DATA[16:] + chr(0xff) + - U_BOOT_DATA + - sym_values + U_BOOT_SPL_DATA[16:]) + expected = (sym_values + U_BOOT_SPL_DATA[16:] + + tools.GetBytes(0xff, 1) + U_BOOT_DATA + sym_values + + U_BOOT_SPL_DATA[16:]) self.assertEqual(expected, data) def testPackUnitAddress(self): @@ -1122,8 +1123,9 @@ class TestFunctional(unittest.TestCase): def testSections(self): """Basic test of sections""" data = self._DoReadFile('055_sections.dts') - expected = (U_BOOT_DATA + '!' * 12 + U_BOOT_DATA + 'a' * 12 + - U_BOOT_DATA + '&' * 4) + expected = (U_BOOT_DATA + tools.GetBytes(ord('!'), 12) + + U_BOOT_DATA + tools.GetBytes(ord('a'), 12) + + U_BOOT_DATA + tools.GetBytes(ord('&'), 4)) self.assertEqual(expected, data) def testMap(self): @@ -1281,8 +1283,10 @@ class TestFunctional(unittest.TestCase): } data, _, _, _ = self._DoReadFileDtb('066_text.dts', entry_args=entry_args) - expected = (TEXT_DATA + chr(0) * (8 - len(TEXT_DATA)) + TEXT_DATA2 + - TEXT_DATA3 + 'some text') + expected = (tools.ToBytes(TEXT_DATA) + + tools.GetBytes(0, 8 - len(TEXT_DATA)) + + tools.ToBytes(TEXT_DATA2) + tools.ToBytes(TEXT_DATA3) + + b'some text') self.assertEqual(expected, data) def testEntryDocs(self): @@ -1303,32 +1307,33 @@ class TestFunctional(unittest.TestCase): """Basic test of generation of a flashrom fmap""" data = self._DoReadFile('067_fmap.dts') fhdr, fentries = fmap_util.DecodeFmap(data[32:]) - expected = U_BOOT_DATA + '!' * 12 + U_BOOT_DATA + 'a' * 12 + expected = (U_BOOT_DATA + tools.GetBytes(ord('!'), 12) + + U_BOOT_DATA + tools.GetBytes(ord('a'), 12)) self.assertEqual(expected, data[:32]) - self.assertEqual('__FMAP__', fhdr.signature) + self.assertEqual(b'__FMAP__', fhdr.signature) self.assertEqual(1, fhdr.ver_major) self.assertEqual(0, fhdr.ver_minor) self.assertEqual(0, fhdr.base) self.assertEqual(16 + 16 + fmap_util.FMAP_HEADER_LEN + fmap_util.FMAP_AREA_LEN * 3, fhdr.image_size) - self.assertEqual('FMAP', fhdr.name) + self.assertEqual(b'FMAP', fhdr.name) self.assertEqual(3, fhdr.nareas) for fentry in fentries: self.assertEqual(0, fentry.flags) self.assertEqual(0, fentries[0].offset) self.assertEqual(4, fentries[0].size) - self.assertEqual('RO_U_BOOT', fentries[0].name) + self.assertEqual(b'RO_U_BOOT', fentries[0].name) self.assertEqual(16, fentries[1].offset) self.assertEqual(4, fentries[1].size) - self.assertEqual('RW_U_BOOT', fentries[1].name) + self.assertEqual(b'RW_U_BOOT', fentries[1].name) self.assertEqual(32, fentries[2].offset) self.assertEqual(fmap_util.FMAP_HEADER_LEN + fmap_util.FMAP_AREA_LEN * 3, fentries[2].size) - self.assertEqual('FMAP', fentries[2].name) + self.assertEqual(b'FMAP', fentries[2].name) def testBlobNamedByArg(self): """Test we can add a blob with the filename coming from an entry arg""" @@ -1341,7 +1346,7 @@ class TestFunctional(unittest.TestCase): def testFill(self): """Test for an fill entry type""" data = self._DoReadFile('069_fill.dts') - expected = 8 * chr(0xff) + 8 * chr(0) + expected = tools.GetBytes(0xff, 8) + tools.GetBytes(0, 8) self.assertEqual(expected, data) def testFillNoSize(self): @@ -1357,7 +1362,7 @@ class TestFunctional(unittest.TestCase): fname = pipe_list[0][-1] # Append our GBB data to the file, which will happen every time the # futility command is called. - with open(fname, 'a') as fd: + with open(fname, 'ab') as fd: fd.write(GBB_DATA) return command.CommandResult() @@ -1371,7 +1376,8 @@ class TestFunctional(unittest.TestCase): data, _, _, _ = self._DoReadFileDtb('071_gbb.dts', entry_args=entry_args) # Since futility - expected = GBB_DATA + GBB_DATA + 8 * chr(0) + (0x2180 - 16) * chr(0) + expected = (GBB_DATA + GBB_DATA + tools.GetBytes(0, 8) + + tools.GetBytes(0, 0x2180 - 16)) self.assertEqual(expected, data) def testGbbTooSmall(self): @@ -1431,7 +1437,7 @@ class TestFunctional(unittest.TestCase): def testTpl(self): """Test that an image with TPL and ots device tree can be created""" # ELF file with a '__bss_size' symbol - with open(self.TestFile('bss_data')) as fd: + with open(self.TestFile('bss_data'), 'rb') as fd: TestFunctional._MakeInputFile('tpl/u-boot-tpl', fd.read()) data = self._DoReadFile('078_u_boot_tpl.dts') self.assertEqual(U_BOOT_TPL_DATA + U_BOOT_TPL_DTB_DATA, data) @@ -1446,7 +1452,7 @@ class TestFunctional(unittest.TestCase): def testFillZero(self): """Test for an fill entry type with a size of 0""" data = self._DoReadFile('080_fill_empty.dts') - self.assertEqual(chr(0) * 16, data) + self.assertEqual(tools.GetBytes(0, 16), data) def testTextMissing(self): """Test for a text entry type where there is no text""" @@ -1557,7 +1563,7 @@ class TestFunctional(unittest.TestCase): out = os.path.join(self._indir, 'lz4.tmp') with open(out, 'wb') as fd: fd.write(data) - return tools.Run('lz4', '-dc', out) + return tools.Run('lz4', '-dc', out, binary=True) ''' try: orig = lz4.frame.decompress(data) @@ -1595,7 +1601,7 @@ class TestFunctional(unittest.TestCase): files = entries['files'] entries = files._section._entries - orig = '' + orig = b'' for i in range(1, 3): key = '%d.dat' % i start = entries[key].image_pos @@ -1623,10 +1629,10 @@ class TestFunctional(unittest.TestCase): """Test an expanding entry""" data, _, map_data, _ = self._DoReadFileDtb('088_expand_size.dts', map=True) - expect = ('a' * 8 + U_BOOT_DATA + - MRC_DATA + 'b' * 1 + U_BOOT_DATA + - 'c' * 8 + U_BOOT_DATA + - 'd' * 8) + expect = (tools.GetBytes(ord('a'), 8) + U_BOOT_DATA + + MRC_DATA + tools.GetBytes(ord('b'), 1) + U_BOOT_DATA + + tools.GetBytes(ord('c'), 8) + U_BOOT_DATA + + tools.GetBytes(ord('d'), 8)) self.assertEqual(expect, data) self.assertEqual('''ImagePos Offset Size Name 00000000 00000000 00000028 main-section @@ -1658,7 +1664,7 @@ class TestFunctional(unittest.TestCase): hash_node = dtb.GetNode('/binman/u-boot/hash').props['value'] m = hashlib.sha256() m.update(U_BOOT_DATA) - self.assertEqual(m.digest(), ''.join(hash_node.value)) + self.assertEqual(m.digest(), b''.join(hash_node.value)) def testHashNoAlgo(self): with self.assertRaises(ValueError) as e: @@ -1681,8 +1687,8 @@ class TestFunctional(unittest.TestCase): hash_node = dtb.GetNode('/binman/section/hash').props['value'] m = hashlib.sha256() m.update(U_BOOT_DATA) - m.update(16 * 'a') - self.assertEqual(m.digest(), ''.join(hash_node.value)) + m.update(tools.GetBytes(ord('a'), 16)) + self.assertEqual(m.digest(), b''.join(hash_node.value)) def testPackUBootTplMicrocode(self): """Test that x86 microcode can be handled correctly in TPL @@ -1693,18 +1699,18 @@ class TestFunctional(unittest.TestCase): u-boot-tpl.dtb with the microcode removed the microcode """ - with open(self.TestFile('u_boot_ucode_ptr')) as fd: + with open(self.TestFile('u_boot_ucode_ptr'), 'rb') as fd: TestFunctional._MakeInputFile('tpl/u-boot-tpl', fd.read()) first, pos_and_size = self._RunMicrocodeTest('093_x86_tpl_ucode.dts', U_BOOT_TPL_NODTB_DATA) - self.assertEqual('tplnodtb with microc' + pos_and_size + - 'ter somewhere in here', first) + self.assertEqual(b'tplnodtb with microc' + pos_and_size + + b'ter somewhere in here', first) def testFmapX86(self): """Basic test of generation of a flashrom fmap""" data = self._DoReadFile('094_fmap_x86.dts') fhdr, fentries = fmap_util.DecodeFmap(data[32:]) - expected = U_BOOT_DATA + MRC_DATA + 'a' * (32 - 7) + expected = U_BOOT_DATA + MRC_DATA + tools.GetBytes(ord('a'), 32 - 7) self.assertEqual(expected, data[:32]) fhdr, fentries = fmap_util.DecodeFmap(data[32:]) @@ -1712,21 +1718,21 @@ class TestFunctional(unittest.TestCase): self.assertEqual(0, fentries[0].offset) self.assertEqual(4, fentries[0].size) - self.assertEqual('U_BOOT', fentries[0].name) + self.assertEqual(b'U_BOOT', fentries[0].name) self.assertEqual(4, fentries[1].offset) self.assertEqual(3, fentries[1].size) - self.assertEqual('INTEL_MRC', fentries[1].name) + self.assertEqual(b'INTEL_MRC', fentries[1].name) self.assertEqual(32, fentries[2].offset) self.assertEqual(fmap_util.FMAP_HEADER_LEN + fmap_util.FMAP_AREA_LEN * 3, fentries[2].size) - self.assertEqual('FMAP', fentries[2].name) + self.assertEqual(b'FMAP', fentries[2].name) def testFmapX86Section(self): """Basic test of generation of a flashrom fmap""" data = self._DoReadFile('095_fmap_x86_section.dts') - expected = U_BOOT_DATA + MRC_DATA + 'b' * (32 - 7) + expected = U_BOOT_DATA + MRC_DATA + tools.GetBytes(ord('b'), 32 - 7) self.assertEqual(expected, data[:32]) fhdr, fentries = fmap_util.DecodeFmap(data[36:]) @@ -1734,28 +1740,28 @@ class TestFunctional(unittest.TestCase): self.assertEqual(0, fentries[0].offset) self.assertEqual(4, fentries[0].size) - self.assertEqual('U_BOOT', fentries[0].name) + self.assertEqual(b'U_BOOT', fentries[0].name) self.assertEqual(4, fentries[1].offset) self.assertEqual(3, fentries[1].size) - self.assertEqual('INTEL_MRC', fentries[1].name) + self.assertEqual(b'INTEL_MRC', fentries[1].name) self.assertEqual(36, fentries[2].offset) self.assertEqual(fmap_util.FMAP_HEADER_LEN + fmap_util.FMAP_AREA_LEN * 3, fentries[2].size) - self.assertEqual('FMAP', fentries[2].name) + self.assertEqual(b'FMAP', fentries[2].name) def testElf(self): """Basic test of ELF entries""" self._SetupSplElf() - with open(self.TestFile('bss_data')) as fd: + with open(self.TestFile('bss_data'), 'rb') as fd: TestFunctional._MakeInputFile('-boot', fd.read()) data = self._DoReadFile('096_elf.dts') def testElfStripg(self): """Basic test of ELF entries""" self._SetupSplElf() - with open(self.TestFile('bss_data')) as fd: + with open(self.TestFile('bss_data'), 'rb') as fd: TestFunctional._MakeInputFile('-boot', fd.read()) data = self._DoReadFile('097_elf_strip.dts') @@ -1771,7 +1777,7 @@ class TestFunctional(unittest.TestCase): # We should not get an inmage, but there should be a map file self.assertFalse(os.path.exists(tools.GetOutputFilename('image.bin'))) self.assertTrue(os.path.exists(map_fname)) - map_data = tools.ReadFile(map_fname) + map_data = tools.ReadFile(map_fname, binary=False) self.assertEqual('''ImagePos Offset Size Name <none> 00000000 00000007 main-section <none> 00000000 00000004 u-boot @@ -1797,9 +1803,12 @@ class TestFunctional(unittest.TestCase): 0000002c 00000000 00000004 u-boot ''', map_data) self.assertEqual(data, - 4 * chr(0x26) + U_BOOT_DATA + 12 * chr(0x21) + - 4 * chr(0x26) + U_BOOT_DATA + 12 * chr(0x61) + - 4 * chr(0x26) + U_BOOT_DATA + 8 * chr(0x26)) + tools.GetBytes(0x26, 4) + U_BOOT_DATA + + tools.GetBytes(0x21, 12) + + tools.GetBytes(0x26, 4) + U_BOOT_DATA + + tools.GetBytes(0x61, 12) + + tools.GetBytes(0x26, 4) + U_BOOT_DATA + + tools.GetBytes(0x26, 8)) if __name__ == "__main__": diff --git a/tools/binman/state.py b/tools/binman/state.py index d945e4bf65..af9678649c 100644 --- a/tools/binman/state.py +++ b/tools/binman/state.py @@ -7,7 +7,6 @@ import hashlib import re -from sets import Set import os import tools @@ -24,10 +23,10 @@ entry_args = {} use_fake_dtb = False # Set of all device tree files references by images -fdt_set = Set() +fdt_set = set() # Same as above, but excluding the main one -fdt_subset = Set() +fdt_subset = set() # The DTB which contains the full image information main_dtb = None @@ -136,7 +135,7 @@ def Prepare(images, dtb): main_dtb = dtb fdt_files.clear() fdt_files['u-boot.dtb'] = dtb - fdt_subset = Set() + fdt_subset = set() if not use_fake_dtb: for image in images.values(): fdt_subset.update(image.GetFdtSet()) diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index 17a3dccb11..037e82c8bb 100644 --- a/tools/dtoc/dtb_platdata.py +++ b/tools/dtoc/dtb_platdata.py @@ -17,6 +17,7 @@ import sys import fdt import fdt_util +import tools # When we see these properties we ignore them - i.e. do not create a structure member PROP_IGNORE_LIST = [ @@ -99,7 +100,7 @@ def get_value(ftype, value): if ftype == fdt.TYPE_INT: return '%#x' % fdt_util.fdt32_to_cpu(value) elif ftype == fdt.TYPE_BYTE: - return '%#x' % ord(value[0]) + return '%#x' % tools.ToByte(value[0]) elif ftype == fdt.TYPE_STRING: return '"%s"' % value elif ftype == fdt.TYPE_BOOL: @@ -449,7 +450,7 @@ class DtbPlatdata(object): self.out(';\n') self.out('};\n') - for alias, struct_name in self._aliases.iteritems(): + for alias, struct_name in self._aliases.items(): if alias not in sorted(structs): self.out('#define %s%s %s%s\n'% (STRUCT_PREFIX, alias, STRUCT_PREFIX, struct_name)) @@ -464,7 +465,8 @@ class DtbPlatdata(object): var_name = conv_name_to_c(node.name) self.buf('static const struct %s%s %s%s = {\n' % (STRUCT_PREFIX, struct_name, VAL_PREFIX, var_name)) - for pname, prop in node.props.items(): + for pname in sorted(node.props): + prop = node.props[pname] if pname in PROP_IGNORE_LIST or pname[0] == '#': continue member_name = conv_name_to_c(prop.name) @@ -498,7 +500,7 @@ class DtbPlatdata(object): vals.append(get_value(prop.type, val)) # Put 8 values per line to avoid very long lines. - for i in xrange(0, len(vals), 8): + for i in range(0, len(vals), 8): if i: self.buf(',\n\t\t') self.buf(', '.join(vals[i:i + 8])) diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py index 2277af9bf7..c1a1d3534d 100755 --- a/tools/dtoc/dtoc.py +++ b/tools/dtoc/dtoc.py @@ -25,6 +25,8 @@ options. For more information about the use of this options and tool please see doc/driver-model/of-plat.txt """ +from __future__ import print_function + from optparse import OptionParser import os import sys @@ -64,11 +66,11 @@ def run_tests(args): suite = unittest.TestLoader().loadTestsFromTestCase(module) suite.run(result) - print result + print(result) for _, err in result.errors: - print err + print(err) for _, err in result.failures: - print err + print(err) def RunTestCoverage(): """Run the tests and check that we get 100% coverage""" diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py index 9ad72f89ec..d9471c4381 100644 --- a/tools/dtoc/fdt.py +++ b/tools/dtoc/fdt.py @@ -11,6 +11,7 @@ import sys import fdt_util import libfdt from libfdt import QUIET_NOTFOUND +import tools # This deals with a device tree, presenting it as an assortment of Node and # Prop objects, representing nodes and properties, respectively. This file @@ -28,6 +29,66 @@ def CheckErr(errnum, msg): raise ValueError('Error %d: %s: %s' % (errnum, libfdt.fdt_strerror(errnum), msg)) + +def BytesToValue(data): + """Converts a string of bytes into a type and value + + Args: + A bytes value (which on Python 2 is an alias for str) + + Return: + A tuple: + Type of data + Data, either a single element or a list of elements. Each element + is one of: + TYPE_STRING: str/bytes value from the property + TYPE_INT: a byte-swapped integer stored as a 4-byte str/bytes + TYPE_BYTE: a byte stored as a single-byte str/bytes + """ + data = bytes(data) + size = len(data) + strings = data.split(b'\0') + is_string = True + count = len(strings) - 1 + if count > 0 and not len(strings[-1]): + for string in strings[:-1]: + if not string: + is_string = False + break + for ch in string: + # Handle Python 2 treating bytes as str + if type(ch) == str: + ch = ord(ch) + if ch < 32 or ch > 127: + is_string = False + break + else: + is_string = False + if is_string: + if count == 1: + if sys.version_info[0] >= 3: # pragma: no cover + return TYPE_STRING, strings[0].decode() + else: + return TYPE_STRING, strings[0] + else: + if sys.version_info[0] >= 3: # pragma: no cover + return TYPE_STRING, [s.decode() for s in strings[:-1]] + else: + return TYPE_STRING, strings[:-1] + if size % 4: + if size == 1: + return TYPE_BYTE, tools.ToChar(data[0]) + else: + return TYPE_BYTE, [tools.ToChar(ch) for ch in list(data)] + val = [] + for i in range(0, size, 4): + val.append(data[i:i + 4]) + if size == 4: + return TYPE_INT, val[0] + else: + return TYPE_INT, val + + class Prop: """A device tree property @@ -37,18 +98,18 @@ class Prop: bytes type: Value type """ - def __init__(self, node, offset, name, bytes): + def __init__(self, node, offset, name, data): self._node = node self._offset = offset self.name = name self.value = None - self.bytes = str(bytes) + self.bytes = bytes(data) self.dirty = False - if not bytes: + if not data: self.type = TYPE_BOOL self.value = True return - self.type, self.value = self.BytesToValue(bytes) + self.type, self.value = BytesToValue(bytes(data)) def RefreshOffset(self, poffset): self._offset = poffset @@ -87,55 +148,6 @@ class Prop: while len(self.value) < len(newprop.value): self.value.append(val) - def BytesToValue(self, bytes): - """Converts a string of bytes into a type and value - - Args: - A string containing bytes - - Return: - A tuple: - Type of data - Data, either a single element or a list of elements. Each element - is one of: - TYPE_STRING: string value from the property - TYPE_INT: a byte-swapped integer stored as a 4-byte string - TYPE_BYTE: a byte stored as a single-byte string - """ - bytes = str(bytes) - size = len(bytes) - strings = bytes.split('\0') - is_string = True - count = len(strings) - 1 - if count > 0 and not strings[-1]: - for string in strings[:-1]: - if not string: - is_string = False - break - for ch in string: - if ch < ' ' or ch > '~': - is_string = False - break - else: - is_string = False - if is_string: - if count == 1: - return TYPE_STRING, strings[0] - else: - return TYPE_STRING, strings[:-1] - if size % 4: - if size == 1: - return TYPE_BYTE, bytes[0] - else: - return TYPE_BYTE, list(bytes) - val = [] - for i in range(0, size, 4): - val.append(bytes[i:i + 4]) - if size == 4: - return TYPE_INT, val[0] - else: - return TYPE_INT, val - @classmethod def GetEmpty(self, type): """Get an empty / zero value of the given type @@ -181,8 +193,8 @@ class Prop: Args: bytes: New property value to set """ - self.bytes = str(bytes) - self.type, self.value = self.BytesToValue(bytes) + self.bytes = bytes + self.type, self.value = BytesToValue(bytes) self.dirty = True def Sync(self, auto_resize=False): @@ -334,7 +346,8 @@ class Node: Args: prop_name: Name of property """ - self.props[prop_name] = Prop(self, None, prop_name, '\0' * 4) + self.props[prop_name] = Prop(self, None, prop_name, + tools.GetBytes(0, 4)) def AddEmptyProp(self, prop_name, len): """Add a property with a fixed data size, for filling in later @@ -346,7 +359,7 @@ class Node: prop_name: Name of property len: Length of data in property """ - value = chr(0) * len + value = tools.GetBytes(0, len) self.props[prop_name] = Prop(self, None, prop_name, value) def SetInt(self, prop_name, val): @@ -385,7 +398,9 @@ class Node: prop_name: Name of property to set val: String value to set (will be \0-terminated in DT) """ - self.props[prop_name].SetData(val + chr(0)) + if sys.version_info[0] >= 3: # pragma: no cover + val = bytes(val, 'utf-8') + self.props[prop_name].SetData(val + b'\0') def AddString(self, prop_name, val): """Add a new string property to a node @@ -397,7 +412,9 @@ class Node: prop_name: Name of property to add val: String value of property """ - self.props[prop_name] = Prop(self, None, prop_name, val + chr(0)) + if sys.version_info[0] >= 3: # pragma: no cover + val = bytes(val, 'utf-8') + self.props[prop_name] = Prop(self, None, prop_name, val + b'\0') def AddSubnode(self, name): """Add a new subnode to the node @@ -448,8 +465,11 @@ class Node: # Sync properties now, whose offsets should not have been disturbed. # We do this after subnodes, since this disturbs the offsets of these - # properties. - prop_list = sorted(self.props.values(), key=lambda prop: prop._offset, + # properties. Note that new properties will have an offset of None here, + # which Python 3 cannot sort against int. So use a large value instead + # to ensure that the new properties are added first. + prop_list = sorted(self.props.values(), + key=lambda prop: prop._offset or 1 << 31, reverse=True) for prop in prop_list: prop.Sync(auto_resize) @@ -469,7 +489,7 @@ class Fdt: if self._fname: self._fname = fdt_util.EnsureCompiled(self._fname) - with open(self._fname) as fd: + with open(self._fname, 'rb') as fd: self._fdt_obj = libfdt.Fdt(fd.read()) @staticmethod @@ -483,7 +503,7 @@ class Fdt: Fdt object containing the data """ fdt = Fdt(None) - fdt._fdt_obj = libfdt.Fdt(bytearray(data)) + fdt._fdt_obj = libfdt.Fdt(bytes(data)) return fdt def LookupPhandle(self, phandle): @@ -573,7 +593,7 @@ class Fdt: Returns: The FDT contents as a string of bytes """ - return self._fdt_obj.as_bytearray() + return bytes(self._fdt_obj.as_bytearray()) def GetFdtObj(self): """Get the contents of the FDT diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py index 5fbfc8877b..f47879ac00 100644 --- a/tools/dtoc/fdt_util.py +++ b/tools/dtoc/fdt_util.py @@ -16,14 +16,6 @@ import tempfile import command import tools -VERSION3 = sys.version_info > (3, 0) - -def get_plain_bytes(val): - """Handle Python 3 strings""" - if isinstance(val, bytes): - val = val.decode('utf-8') - return val.encode('raw_unicode_escape') - def fdt32_to_cpu(val): """Convert a device tree cell to an integer @@ -33,9 +25,6 @@ def fdt32_to_cpu(val): Return: A native-endian integer value """ - if VERSION3: - # This code is not reached in Python 2 - val = get_plain_bytes(val) # pragma: no cover return struct.unpack('>I', val)[0] def fdt_cells_to_cpu(val, cells): @@ -45,11 +34,11 @@ def fdt_cells_to_cpu(val, cells): Value to convert (array of one or more 4-character strings) Return: - A native-endian long value + A native-endian integer value """ if not cells: return 0 - out = long(fdt32_to_cpu(val[0])) + out = int(fdt32_to_cpu(val[0])) if cells == 2: out = out << 32 | fdt32_to_cpu(val[1]) return out diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index cb6d6e7baf..b915b27856 100644 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -8,6 +8,8 @@ This includes unit tests for some functions and functional tests for the dtoc tool. """ +from __future__ import print_function + import collections import os import struct @@ -97,7 +99,7 @@ class TestDtoc(unittest.TestCase): if expected != actual: self._WritePythonString('/tmp/binman.expected', expected) self._WritePythonString('/tmp/binman.actual', actual) - print 'Failures written to /tmp/binman.{expected,actual}' + print('Failures written to /tmp/binman.{expected,actual}') self.assertEquals(expected, actual) def test_name(self): @@ -197,16 +199,16 @@ struct dtd_sandbox_spl_test_2 { data = infile.read() self._CheckStrings(C_HEADER + ''' static const struct dtd_sandbox_spl_test dtv_spl_test = { +\t.boolval\t\t= true, \t.bytearray\t\t= {0x6, 0x0, 0x0}, \t.byteval\t\t= 0x5, +\t.intarray\t\t= {0x2, 0x3, 0x4, 0x0}, \t.intval\t\t\t= 0x1, -\t.notstring\t\t= {0x20, 0x21, 0x22, 0x10, 0x0}, \t.longbytearray\t\t= {0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x10, \t\t0x11}, -\t.stringval\t\t= "message", -\t.boolval\t\t= true, -\t.intarray\t\t= {0x2, 0x3, 0x4, 0x0}, +\t.notstring\t\t= {0x20, 0x21, 0x22, 0x10, 0x0}, \t.stringarray\t\t= {"multi-word", "message", ""}, +\t.stringval\t\t= "message", }; U_BOOT_DEVICE(spl_test) = { \t.name\t\t= "sandbox_spl_test", @@ -217,12 +219,12 @@ U_BOOT_DEVICE(spl_test) = { static const struct dtd_sandbox_spl_test dtv_spl_test2 = { \t.bytearray\t\t= {0x1, 0x23, 0x34}, \t.byteval\t\t= 0x8, +\t.intarray\t\t= {0x5, 0x0, 0x0, 0x0}, \t.intval\t\t\t= 0x3, \t.longbytearray\t\t= {0x9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, \t\t0x0}, -\t.stringval\t\t= "message2", -\t.intarray\t\t= {0x5, 0x0, 0x0, 0x0}, \t.stringarray\t\t= {"another", "multi-word", "message"}, +\t.stringval\t\t= "message2", }; U_BOOT_DEVICE(spl_test2) = { \t.name\t\t= "sandbox_spl_test", diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index 8d70dd2a29..bf469dbd54 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -4,6 +4,8 @@ # Written by Simon Glass <sjg@chromium.org> # +from __future__ import print_function + from optparse import OptionParser import glob import os @@ -17,7 +19,7 @@ for dirname in ['../patman', '..']: import command import fdt -from fdt import TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL +from fdt import TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL, BytesToValue import fdt_util from fdt_util import fdt32_to_cpu import libfdt @@ -45,7 +47,7 @@ def _GetPropertyValue(dtb, node, prop_name): # Add 12, which is sizeof(struct fdt_property), to get to start of data offset = prop.GetOffset() + 12 data = dtb.GetContents()[offset:offset + len(prop.value)] - return prop, [chr(x) for x in data] + return prop, [tools.ToChar(x) for x in data] class TestFdt(unittest.TestCase): @@ -83,13 +85,13 @@ class TestFdt(unittest.TestCase): def testFlush(self): """Check that we can flush the device tree out to its file""" fname = self.dtb._fname - with open(fname) as fd: + with open(fname, 'rb') as fd: data = fd.read() os.remove(fname) with self.assertRaises(IOError): - open(fname) + open(fname, 'rb') self.dtb.Flush() - with open(fname) as fd: + with open(fname, 'rb') as fd: data = fd.read() def testPack(self): @@ -119,6 +121,10 @@ class TestFdt(unittest.TestCase): node = self.dtb.GetNode('/spl-test') self.assertEqual(self.dtb, node.GetFdt()) + def testBytesToValue(self): + self.assertEqual(BytesToValue(b'this\0is\0'), + (TYPE_STRING, ['this', 'is'])) + class TestNode(unittest.TestCase): """Test operation of the Node class""" @@ -277,7 +283,7 @@ class TestProp(unittest.TestCase): """Tests the GetEmpty() function for the various supported types""" self.assertEqual(True, fdt.Prop.GetEmpty(fdt.TYPE_BOOL)) self.assertEqual(chr(0), fdt.Prop.GetEmpty(fdt.TYPE_BYTE)) - self.assertEqual(chr(0) * 4, fdt.Prop.GetEmpty(fdt.TYPE_INT)) + self.assertEqual(tools.GetBytes(0, 4), fdt.Prop.GetEmpty(fdt.TYPE_INT)) self.assertEqual('', fdt.Prop.GetEmpty(fdt.TYPE_STRING)) def testGetOffset(self): @@ -381,7 +387,7 @@ class TestProp(unittest.TestCase): self.node.AddString('string', val) self.dtb.Sync(auto_resize=True) data = self.fdt.getprop(self.node.Offset(), 'string') - self.assertEqual(val + '\0', data) + self.assertEqual(tools.ToBytes(val) + b'\0', data) self.fdt.pack() self.node.SetString('string', val + 'x') @@ -391,21 +397,21 @@ class TestProp(unittest.TestCase): self.node.SetString('string', val[:-1]) prop = self.node.props['string'] - prop.SetData(val) + prop.SetData(tools.ToBytes(val)) self.dtb.Sync(auto_resize=False) data = self.fdt.getprop(self.node.Offset(), 'string') - self.assertEqual(val, data) + self.assertEqual(tools.ToBytes(val), data) self.node.AddEmptyProp('empty', 5) self.dtb.Sync(auto_resize=True) prop = self.node.props['empty'] - prop.SetData(val) + prop.SetData(tools.ToBytes(val)) self.dtb.Sync(auto_resize=False) data = self.fdt.getprop(self.node.Offset(), 'empty') - self.assertEqual(val, data) + self.assertEqual(tools.ToBytes(val), data) - self.node.SetData('empty', '123') - self.assertEqual('123', prop.bytes) + self.node.SetData('empty', b'123') + self.assertEqual(b'123', prop.bytes) def testFromData(self): dtb2 = fdt.Fdt.FromData(self.dtb.GetContents()) @@ -496,18 +502,22 @@ class TestFdtUtil(unittest.TestCase): self.assertEqual(2, fdt_util.fdt_cells_to_cpu(val, 1)) dtb2 = fdt.FdtScan('tools/dtoc/dtoc_test_addr64.dts') - node2 = dtb2.GetNode('/test1') - val = node2.props['reg'].value + node1 = dtb2.GetNode('/test1') + val = node1.props['reg'].value self.assertEqual(0x1234, fdt_util.fdt_cells_to_cpu(val, 2)) + node2 = dtb2.GetNode('/test2') + val = node2.props['reg'].value + self.assertEqual(0x1234567890123456, fdt_util.fdt_cells_to_cpu(val, 2)) + self.assertEqual(0x9876543210987654, fdt_util.fdt_cells_to_cpu(val[2:], + 2)) + self.assertEqual(0x12345678, fdt_util.fdt_cells_to_cpu(val, 1)) + def testEnsureCompiled(self): """Test a degenerate case of this function""" dtb = fdt_util.EnsureCompiled('tools/dtoc/dtoc_test_simple.dts') self.assertEqual(dtb, fdt_util.EnsureCompiled(dtb)) - def testGetPlainBytes(self): - self.assertEqual('fred', fdt_util.get_plain_bytes('fred')) - def RunTestCoverage(): """Run the tests and check that we get 100% coverage""" @@ -535,11 +545,11 @@ def RunTests(args): suite = unittest.TestLoader().loadTestsFromTestCase(module) suite.run(result) - print result + print(result) for _, err in result.errors: - print err + print(err) for _, err in result.failures: - print err + print(err) if __name__ != '__main__': sys.exit(1) diff --git a/tools/patman/cros_subprocess.py b/tools/patman/cros_subprocess.py index ebd4300dfd..06be64cc2c 100644 --- a/tools/patman/cros_subprocess.py +++ b/tools/patman/cros_subprocess.py @@ -54,7 +54,7 @@ class Popen(subprocess.Popen): """ def __init__(self, args, stdin=None, stdout=PIPE_PTY, stderr=PIPE_PTY, - shell=False, cwd=None, env=None, **kwargs): + shell=False, cwd=None, env=None, binary=False, **kwargs): """Cut-down constructor Args: @@ -72,6 +72,7 @@ class Popen(subprocess.Popen): """ stdout_pty = None stderr_pty = None + self.binary = binary if stdout == PIPE_PTY: stdout_pty = pty.openpty() @@ -100,6 +101,19 @@ class Popen(subprocess.Popen): if kwargs: raise ValueError("Unit tests do not test extra args - please add tests") + def ConvertData(self, data): + """Convert stdout/stderr data to the correct format for output + + Args: + data: Data to convert, or None for '' + + Returns: + Converted data, as bytes + """ + if data is None: + return b'' + return data + def CommunicateFilter(self, output): """Interact with process: Read data from stdout and stderr. @@ -156,11 +170,11 @@ class Popen(subprocess.Popen): self.stdin.close() if self.stdout: read_set.append(self.stdout) - stdout = [] + stdout = b'' if self.stderr and self.stderr != self.stdout: read_set.append(self.stderr) - stderr = [] - combined = [] + stderr = b'' + combined = b'' input_offset = 0 while read_set or write_set: @@ -186,46 +200,40 @@ class Popen(subprocess.Popen): write_set.remove(self.stdin) if self.stdout in rlist: - data = "" + data = b'' # We will get an error on read if the pty is closed try: data = os.read(self.stdout.fileno(), 1024) except OSError: pass - if data == "": + if not len(data): self.stdout.close() read_set.remove(self.stdout) else: - stdout.append(data) - combined.append(data) + stdout += data + combined += data if output: output(sys.stdout, data) if self.stderr in rlist: - data = "" + data = b'' # We will get an error on read if the pty is closed try: data = os.read(self.stderr.fileno(), 1024) except OSError: pass - if data == "": + if not len(data): self.stderr.close() read_set.remove(self.stderr) else: - stderr.append(data) - combined.append(data) + stderr += data + combined += data if output: output(sys.stderr, data) # All data exchanged. Translate lists into strings. - if stdout is not None: - stdout = ''.join(stdout) - else: - stdout = '' - if stderr is not None: - stderr = ''.join(stderr) - else: - stderr = '' - combined = ''.join(combined) + stdout = self.ConvertData(stdout) + stderr = self.ConvertData(stderr) + combined = self.ConvertData(combined) # Translate newlines, if requested. We cannot let the file # object do the translation: It is based on stdio, which is diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py index d79e716074..50a2741439 100644 --- a/tools/patman/func_test.py +++ b/tools/patman/func_test.py @@ -12,15 +12,20 @@ import sys import tempfile import unittest +try: + from StringIO import StringIO +except ImportError: + from io import StringIO + import gitutil import patchstream import settings +import tools @contextlib.contextmanager def capture(): import sys - from cStringIO import StringIO oldout,olderr = sys.stdout, sys.stderr try: out=[StringIO(), StringIO()] @@ -124,10 +129,10 @@ class TestFunctional(unittest.TestCase): """ process_tags = True ignore_bad_tags = True - stefan = u'Stefan Brüns <stefan.bruens@rwth-aachen.de>' + stefan = b'Stefan Br\xc3\xbcns <stefan.bruens@rwth-aachen.de>'.decode('utf-8') rick = 'Richard III <richard@palace.gov>' - mel = u'Lord Mëlchett <clergy@palace.gov>' - ed = u'Lond Edmund Blackaddër <weasel@blackadder.org' + mel = b'Lord M\xc3\xablchett <clergy@palace.gov>'.decode('utf-8') + ed = b'Lond Edmund Blackadd\xc3\xabr <weasel@blackadder.org'.decode('utf-8') fred = 'Fred Bloggs <f.bloggs@napier.net>' add_maintainers = [stefan, rick] dry_run = True @@ -159,7 +164,6 @@ class TestFunctional(unittest.TestCase): os.remove(cc_file) lines = out[0].splitlines() - #print '\n'.join(lines) self.assertEqual('Cleaned %s patches' % len(series.commits), lines[0]) self.assertEqual('Change log missing for v2', lines[1]) self.assertEqual('Change log missing for v3', lines[2]) @@ -174,27 +178,30 @@ class TestFunctional(unittest.TestCase): while 'Cc:' in lines[line]: line += 1 self.assertEqual('To: u-boot@lists.denx.de', lines[line]) - self.assertEqual('Cc: %s' % stefan.encode('utf-8'), lines[line + 1]) + self.assertEqual('Cc: %s' % tools.FromUnicode(stefan), + lines[line + 1]) self.assertEqual('Version: 3', lines[line + 2]) self.assertEqual('Prefix:\t RFC', lines[line + 3]) self.assertEqual('Cover: 4 lines', lines[line + 4]) line += 5 - self.assertEqual(' Cc: %s' % mel.encode('utf-8'), lines[line + 0]) - self.assertEqual(' Cc: %s' % rick, lines[line + 1]) - self.assertEqual(' Cc: %s' % fred, lines[line + 2]) - self.assertEqual(' Cc: %s' % ed.encode('utf-8'), lines[line + 3]) + self.assertEqual(' Cc: %s' % fred, lines[line + 0]) + self.assertEqual(' Cc: %s' % tools.FromUnicode(ed), + lines[line + 1]) + self.assertEqual(' Cc: %s' % tools.FromUnicode(mel), + lines[line + 2]) + self.assertEqual(' Cc: %s' % rick, lines[line + 3]) expected = ('Git command: git send-email --annotate ' '--in-reply-to="%s" --to "u-boot@lists.denx.de" ' '--cc "%s" --cc-cmd "%s --cc-cmd %s" %s %s' % (in_reply_to, stefan, sys.argv[0], cc_file, cover_fname, - ' '.join(args))).encode('utf-8') + ' '.join(args))) line += 4 - self.assertEqual(expected, lines[line]) + self.assertEqual(expected, tools.ToUnicode(lines[line])) - self.assertEqual(('%s %s, %s' % (args[0], rick, stefan)) - .encode('utf-8'), cc_lines[0]) - self.assertEqual(('%s %s, %s, %s, %s' % (args[1], fred, rick, stefan, - ed)).encode('utf-8'), cc_lines[1]) + self.assertEqual(('%s %s, %s' % (args[0], rick, stefan)), + tools.ToUnicode(cc_lines[0])) + self.assertEqual(('%s %s, %s, %s, %s' % (args[1], fred, ed, rick, + stefan)), tools.ToUnicode(cc_lines[1])) expected = ''' This is a test of how the cover @@ -223,7 +230,6 @@ Simon Glass (2): ''' lines = open(cover_fname).read().splitlines() - #print '\n'.join(lines) self.assertEqual( 'Subject: [RFC PATCH v3 0/2] test: A test patch series', lines[3]) @@ -231,7 +237,6 @@ Simon Glass (2): for i, fname in enumerate(args): lines = open(fname).read().splitlines() - #print '\n'.join(lines) subject = [line for line in lines if line.startswith('Subject')] self.assertEqual('Subject: [RFC %d/%d]' % (i + 1, count), subject[0][:18]) diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index 9905bb0bbd..dce7fa25b6 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -12,6 +12,7 @@ import terminal import checkpatch import settings +import tools # True to use --no-decorate - we check this in Setup() use_no_decorate = True @@ -325,6 +326,7 @@ def BuildEmailList(in_list, tag=None, alias=None, raise_on_error=True): raw += LookupEmail(item, alias, raise_on_error=raise_on_error) result = [] for item in raw: + item = tools.FromUnicode(item) if not item in result: result.append(item) if tag: @@ -395,11 +397,11 @@ def EmailPatches(series, cover_fname, args, dry_run, raise_on_error, cc_fname, git_config_to = command.Output('git', 'config', 'sendemail.to', raise_on_error=False) if not git_config_to: - print ("No recipient.\n" - "Please add something like this to a commit\n" - "Series-to: Fred Bloggs <f.blogs@napier.co.nz>\n" - "Or do something like this\n" - "git config sendemail.to u-boot@lists.denx.de") + print("No recipient.\n" + "Please add something like this to a commit\n" + "Series-to: Fred Bloggs <f.blogs@napier.co.nz>\n" + "Or do something like this\n" + "git config sendemail.to u-boot@lists.denx.de") return cc = BuildEmailList(list(set(series.get('cc')) - set(series.get('to'))), '--cc', alias, raise_on_error) @@ -410,9 +412,7 @@ def EmailPatches(series, cover_fname, args, dry_run, raise_on_error, cc_fname, if smtp_server: cmd.append('--smtp-server=%s' % smtp_server) if in_reply_to: - if type(in_reply_to) != str: - in_reply_to = in_reply_to.encode('utf-8') - cmd.append('--in-reply-to="%s"' % in_reply_to) + cmd.append('--in-reply-to="%s"' % tools.FromUnicode(in_reply_to)) if thread: cmd.append('--thread') diff --git a/tools/patman/patman.py b/tools/patman/patman.py index 27a2febf70..9605a36eff 100755 --- a/tools/patman/patman.py +++ b/tools/patman/patman.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python2 +#!/usr/bin/env python # SPDX-License-Identifier: GPL-2.0+ # # Copyright (c) 2011 The Chromium OS Authors. diff --git a/tools/patman/series.py b/tools/patman/series.py index 2735afaf88..67103f03e6 100644 --- a/tools/patman/series.py +++ b/tools/patman/series.py @@ -11,6 +11,7 @@ import get_maintainer import gitutil import settings import terminal +import tools # Series-xxx tags that we understand valid_series = ['to', 'cc', 'version', 'changes', 'prefix', 'notes', 'name', @@ -114,16 +115,16 @@ class Series(dict): commit = self.commits[upto] print(col.Color(col.GREEN, ' %s' % args[upto])) cc_list = list(self._generated_cc[commit.patch]) - for email in set(cc_list) - to_set - cc_set: + for email in sorted(set(cc_list) - to_set - cc_set): if email == None: email = col.Color(col.YELLOW, "<alias '%s' not found>" % tag) if email: print(' Cc: ', email) print - for item in to_set: + for item in sorted(to_set): print('To:\t ', item) - for item in cc_set - to_set: + for item in sorted(cc_set - to_set): print('Cc:\t ', item) print('Version: ', self.get('version')) print('Prefix:\t ', self.get('prefix')) @@ -131,7 +132,7 @@ class Series(dict): print('Cover: %d lines' % len(self.cover)) cover_cc = gitutil.BuildEmailList(self.get('cover_cc', '')) all_ccs = itertools.chain(cover_cc, *self._generated_cc.values()) - for email in set(all_ccs) - to_set - cc_set: + for email in sorted(set(all_ccs) - to_set - cc_set): print(' Cc: ', email) if cmd: print('Git command: %s' % cmd) @@ -238,19 +239,18 @@ class Series(dict): for x in set(cc) & set(settings.bounces): print(col.Color(col.YELLOW, 'Skipping "%s"' % x)) cc = set(cc) - set(settings.bounces) - cc = [m.encode('utf-8') if type(m) != str else m for m in cc] + cc = [tools.FromUnicode(m) for m in cc] if limit is not None: cc = cc[:limit] all_ccs += cc - print(commit.patch, ', '.join(set(cc)), file=fd) + print(commit.patch, ', '.join(sorted(set(cc))), file=fd) self._generated_cc[commit.patch] = cc if cover_fname: cover_cc = gitutil.BuildEmailList(self.get('cover_cc', '')) - cover_cc = [m.encode('utf-8') if type(m) != str else m - for m in cover_cc] - cc_list = ', '.join([x.decode('utf-8') - for x in set(cover_cc + all_ccs)]) + cover_cc = [tools.FromUnicode(m) for m in cover_cc] + cc_list = ', '.join([tools.ToUnicode(x) + for x in sorted(set(cover_cc + all_ccs))]) print(cover_fname, cc_list.encode('utf-8'), file=fd) fd.close() diff --git a/tools/patman/settings.py b/tools/patman/settings.py index ea2bc74f75..c98911d522 100644 --- a/tools/patman/settings.py +++ b/tools/patman/settings.py @@ -14,6 +14,7 @@ import re import command import gitutil +import tools """Default settings per-project. @@ -57,26 +58,26 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): # Check to make sure that bogus project gets general alias. >>> config = _ProjectConfigParser("zzz") >>> config.readfp(StringIO(sample_config)) - >>> config.get("alias", "enemies") - u'Evil <evil@example.com>' + >>> str(config.get("alias", "enemies")) + 'Evil <evil@example.com>' # Check to make sure that alias gets overridden by project. >>> config = _ProjectConfigParser("sm") >>> config.readfp(StringIO(sample_config)) - >>> config.get("alias", "enemies") - u'Green G. <ugly@example.com>' + >>> str(config.get("alias", "enemies")) + 'Green G. <ugly@example.com>' # Check to make sure that settings get merged with project. >>> config = _ProjectConfigParser("linux") >>> config.readfp(StringIO(sample_config)) - >>> sorted(config.items("settings")) - [(u'am_hero', u'True'), (u'process_tags', u'False')] + >>> sorted((str(a), str(b)) for (a, b) in config.items("settings")) + [('am_hero', 'True'), ('process_tags', 'False')] # Check to make sure that settings works with unknown project. >>> config = _ProjectConfigParser("unknown") >>> config.readfp(StringIO(sample_config)) - >>> sorted(config.items("settings")) - [(u'am_hero', u'True')] + >>> sorted((str(a), str(b)) for (a, b) in config.items("settings")) + [('am_hero', 'True')] """ def __init__(self, project_name): """Construct _ProjectConfigParser. @@ -99,17 +100,6 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): for setting_name, setting_value in project_defaults.items(): self.set(project_settings, setting_name, setting_value) - def _to_unicode(self, val): - """Make sure a value is of type 'unicode' - - Args: - val: string or unicode object - - Returns: - unicode version of val - """ - return val if isinstance(val, unicode) else val.decode('utf-8') - def get(self, section, option, *args, **kwargs): """Extend SafeConfigParser to try project_section before section. @@ -127,7 +117,7 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): val = ConfigParser.SafeConfigParser.get( self, section, option, *args, **kwargs ) - return self._to_unicode(val) + return tools.ToUnicode(val) def items(self, section, *args, **kwargs): """Extend SafeConfigParser to add project_section to section. @@ -162,8 +152,8 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): item_dict = dict(top_items) item_dict.update(project_items) - return {(self._to_unicode(item), self._to_unicode(val)) - for item, val in item_dict.iteritems()} + return {(tools.ToUnicode(item), tools.ToUnicode(val)) + for item, val in item_dict.items()} def ReadGitAliases(fname): """Read a git alias file. This is in the form used by git: diff --git a/tools/patman/test_util.py b/tools/patman/test_util.py index 687d40704a..ea36cd1633 100644 --- a/tools/patman/test_util.py +++ b/tools/patman/test_util.py @@ -3,6 +3,8 @@ # Copyright (c) 2016 Google, Inc # +from __future__ import print_function + from contextlib import contextmanager import glob import os @@ -15,6 +17,8 @@ try: except ImportError: from io import StringIO +PYTHON = 'python%d' % sys.version_info[0] + def RunTestCoverage(prog, filter_fname, exclude_list, build_dir, required=None): """Run tests and check that we get 100% coverage @@ -41,11 +45,12 @@ def RunTestCoverage(prog, filter_fname, exclude_list, build_dir, required=None): else: glob_list = [] glob_list += exclude_list - glob_list += ['*libfdt.py', '*site-packages*'] - cmd = ('PYTHONPATH=$PYTHONPATH:%s/sandbox_spl/tools python-coverage run ' - '--omit "%s" %s -P1 -t' % (build_dir, ','.join(glob_list), prog)) + glob_list += ['*libfdt.py', '*site-packages*', '*dist-packages*'] + cmd = ('PYTHONPATH=$PYTHONPATH:%s/sandbox_spl/tools %s-coverage run ' + '--omit "%s" %s -P1 -t' % (build_dir, PYTHON, ','.join(glob_list), + prog)) os.system(cmd) - stdout = command.Output('python-coverage', 'report') + stdout = command.Output('%s-coverage' % PYTHON, 'report') lines = stdout.splitlines() if required: # Convert '/path/to/name.py' just the module name 'name' @@ -54,18 +59,18 @@ def RunTestCoverage(prog, filter_fname, exclude_list, build_dir, required=None): missing_list = required missing_list.difference_update(test_set) if missing_list: - print 'Missing tests for %s' % (', '.join(missing_list)) - print stdout + print('Missing tests for %s' % (', '.join(missing_list))) + print(stdout) ok = False coverage = lines[-1].split(' ')[-1] ok = True - print coverage + print(coverage) if coverage != '100%': - print stdout - print ("Type 'python-coverage html' to get a report in " - 'htmlcov/index.html') - print 'Coverage error: %s, but should be 100%%' % coverage + print(stdout) + print("Type '%s-coverage html' to get a report in " + 'htmlcov/index.html' % PYTHON) + print('Coverage error: %s, but should be 100%%' % coverage) ok = False if not ok: raise ValueError('Test coverage failure') diff --git a/tools/patman/tools.py b/tools/patman/tools.py index bf099798e6..8e9f22afe8 100644 --- a/tools/patman/tools.py +++ b/tools/patman/tools.py @@ -7,6 +7,7 @@ import command import glob import os import shutil +import sys import tempfile import tout @@ -167,9 +168,9 @@ def PathHasFile(fname): return True return False -def Run(name, *args): +def Run(name, *args, **kwargs): try: - return command.Run(name, *args, cwd=outdir, capture=True) + return command.Run(name, *args, cwd=outdir, capture=True, **kwargs) except: if not PathHasFile(name): msg = "Plesae install tool '%s'" % name @@ -213,7 +214,7 @@ def Filename(fname): # If not found, just return the standard, unchanged path return fname -def ReadFile(fname): +def ReadFile(fname, binary=True): """Read and return the contents of a file. Args: @@ -222,7 +223,7 @@ def ReadFile(fname): Returns: data read from file, as a string. """ - with open(Filename(fname), 'rb') as fd: + with open(Filename(fname), binary and 'rb' or 'r') as fd: data = fd.read() #self._out.Info("Read file '%s' size %d (%#0x)" % #(fname, len(data), len(data))) @@ -239,3 +240,105 @@ def WriteFile(fname, data): #(fname, len(data), len(data))) with open(Filename(fname), 'wb') as fd: fd.write(data) + +def GetBytes(byte, size): + """Get a string of bytes of a given size + + This handles the unfortunate different between Python 2 and Python 2. + + Args: + byte: Numeric byte value to use + size: Size of bytes/string to return + + Returns: + A bytes type with 'byte' repeated 'size' times + """ + if sys.version_info[0] >= 3: + data = bytes([byte]) * size + else: + data = chr(byte) * size + return data + +def ToUnicode(val): + """Make sure a value is a unicode string + + This allows some amount of compatibility between Python 2 and Python3. For + the former, it returns a unicode object. + + Args: + val: string or unicode object + + Returns: + unicode version of val + """ + if sys.version_info[0] >= 3: + return val + return val if isinstance(val, unicode) else val.decode('utf-8') + +def FromUnicode(val): + """Make sure a value is a non-unicode string + + This allows some amount of compatibility between Python 2 and Python3. For + the former, it converts a unicode object to a string. + + Args: + val: string or unicode object + + Returns: + non-unicode version of val + """ + if sys.version_info[0] >= 3: + return val + return val if isinstance(val, str) else val.encode('utf-8') + +def ToByte(ch): + """Convert a character to an ASCII value + + This is useful because in Python 2 bytes is an alias for str, but in + Python 3 they are separate types. This function converts the argument to + an ASCII value in either case. + + Args: + ch: A string (Python 2) or byte (Python 3) value + + Returns: + integer ASCII value for ch + """ + return ord(ch) if type(ch) == str else ch + +def ToChar(byte): + """Convert a byte to a character + + This is useful because in Python 2 bytes is an alias for str, but in + Python 3 they are separate types. This function converts an ASCII value to + a value with the appropriate type in either case. + + Args: + byte: A byte or str value + """ + return chr(byte) if type(byte) != str else byte + +def ToChars(byte_list): + """Convert a list of bytes to a str/bytes type + + Args: + byte_list: List of ASCII values representing the string + + Returns: + string made by concatenating all the ASCII values + """ + return ''.join([chr(byte) for byte in byte_list]) + +def ToBytes(string): + """Convert a str type into a bytes type + + Args: + string: string to convert value + + Returns: + Python 3: A bytes type + Python 2: A string type + """ + if sys.version_info[0] >= 3: + return string.encode('utf-8') + return string diff --git a/tools/proftool.c b/tools/proftool.c index c1803fa78a..fecb9d6e99 100644 --- a/tools/proftool.c +++ b/tools/proftool.c @@ -205,12 +205,12 @@ static struct func_info *find_caller_by_offset(uint32_t offset) return low >= 0 ? &func_list[low] : NULL; } -static int read_calls(FILE *fin, int count) +static int read_calls(FILE *fin, size_t count) { struct trace_call *call_data; int i; - notice("call count: %d\n", count); + notice("call count: %zu\n", count); call_list = (struct trace_call *)calloc(count, sizeof(*call_data)); if (!call_list) { error("Cannot allocate call_list\n"); diff --git a/tools/rmboard.py b/tools/rmboard.py new file mode 100755 index 0000000000..df4f04b01c --- /dev/null +++ b/tools/rmboard.py @@ -0,0 +1,150 @@ +#! /usr/bin/python +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2019 Google LLC +# + +""" +Script to remove boards + +Usage: + rmboard.py <board_name>... + +A single commit is created for each board removed. + +Some boards may depend on files provided by another and this will cause +problems, generally the removal of files which should not be removed. + +This script works by: + - Looking through the MAINTAINERS files which mention a board to find out + what files the board uses + - Looking through the Kconfig files which mention a board to find one that + needs to have material removed + +Search for ## to update the commit message manually. +""" + +from __future__ import print_function + +import glob +import os +import re +import sys + +# Bring in the patman libraries +our_path = os.path.dirname(os.path.realpath(__file__)) +sys.path.append(os.path.join(our_path, '../tools/patman')) + +import command + +def rm_kconfig_include(path): + """Remove a path from Kconfig files + + This function finds the given path in a 'source' statement in a Kconfig + file and removes that line from the file. This is needed because the path + is going to be removed, so any reference to it will cause a problem with + Kconfig parsing. + + The changes are made locally and then added to the git staging area. + + Args: + path: Path to search for and remove + """ + cmd = ['git', 'grep', path] + stdout = command.RunPipe([cmd], capture=True, raise_on_error=False).stdout + if not stdout: + return + fname = stdout.split(':')[0] + + print("Fixing up '%s' to remove reference to '%s'" % (fname, path)) + cmd = ['sed', '-i', '\|%s|d' % path, fname] + stdout = command.RunPipe([cmd], capture=True).stdout + + cmd = ['git', 'add', fname] + stdout = command.RunPipe([cmd], capture=True).stdout + +def rm_board(board): + """Create a commit which removes a single board + + This looks up the MAINTAINERS file to file files that need to be removed, + then removes pieces from the Kconfig files that mention the board. + + + Args: + board: Board name to remove + """ + + # Find all MAINTAINERS and Kconfig files which mention the board + cmd = ['git', 'grep', '-l', board] + stdout = command.RunPipe([cmd], capture=True).stdout + maintain = [] + kconfig = [] + for line in stdout.splitlines(): + line = line.strip() + if 'MAINTAINERS' in line: + if line not in maintain: + maintain.append(line) + elif 'Kconfig' in line: + kconfig.append(line) + paths = [] + cc = [] + + # Look through the MAINTAINERS file to find things to remove + for fname in maintain: + with open(fname) as fd: + for line in fd: + line = line.strip() + fields = re.split('[ \t]', line, 1) + if len(fields) == 2: + if fields[0] == 'M:': + cc.append(fields[1]) + elif fields[0] == 'F:': + paths.append(fields[1].strip()) + + # Expand any wildcards in the MAINTAINERS file + real = [] + for path in paths: + if path[-1] == '/': + path = path[:-1] + if '*' in path: + globbed = glob.glob(path) + print("Expanded '%s' to '%s'" % (path, globbed)) + real += globbed + else: + real.append(path) + + # Search for Kconfig files in the resulting list. Remove any 'source' lines + # which reference Kconfig files we want to remove + for path in real: + cmd = ['find', path] + stdout = (command.RunPipe([cmd], capture=True, raise_on_error=False). + stdout) + for fname in stdout.splitlines(): + if fname.endswith('Kconfig'): + rm_kconfig_include(fname) + + # Remove unwanted files + cmd = ['git', 'rm', '-r'] + real + stdout = command.RunPipe([cmd], capture=True).stdout + + ## Change the messages as needed + msg = '''arm: Remove %s board + +This board has not been converted to CONFIG_DM_MMC by the deadline. +Remove it. + +''' % board + for name in cc: + msg += 'Patch-cc: %s\n' % name + + # Create the commit + cmd = ['git', 'commit', '-s', '-m', msg] + stdout = command.RunPipe([cmd], capture=True).stdout + + # Check if the board is mentioned anywhere else. The user will need to deal + # with this + cmd = ['git', 'grep', '-il', board] + print(command.RunPipe([cmd], capture=True, raise_on_error=False).stdout) + print(' '.join(cmd)) + +for board in sys.argv[1:]: + rm_board(board) |