diff options
1750 files changed, 10608 insertions, 3051 deletions
diff --git a/.travis.yml b/.travis.yml index d586206657..4db629d15b 100644 --- a/.travis.yml +++ b/.travis.yml @@ -146,233 +146,277 @@ matrix: include: # we need to build by vendor due to 50min time limit for builds # each env setting here is a dedicated build - - env: + - name: "buildman arc" + env: - BUILDMAN="arc" TOOLCHAIN="arc" - - env: + - name: "buildman arm11 arm7 arm920t arm946es" + env: - BUILDMAN="arm11 arm7 arm920t arm946es" - - env: + - name: "buildman arm926ejs (non-mx,siemens,atmel,kirkwood)" + env: - JOB="arm926ejs" BUILDMAN="arm926ejs -x mx,siemens,atmel,kirkwood" - - env: + - name: "buildman atmel" + env: - BUILDMAN="atmel" - - env: - BUILDMAN="boundary engicam toradex" - - env: - - JOB="Freescale ARM32" - BUILDMAN="freescale -x powerpc,m68k,aarch64" - - env: - - JOB="Freescale AArch64" - BUILDMAN="freescale&aarch64" - - env: - - JOB="i.MX6 (non-Freescale)" - BUILDMAN="mx6 -x freescale,toradex,boundary,engicam" - - env: - - JOB="i.MX (non-Freescale, non-i.MX6)" - BUILDMAN="mx -x freescale,mx6,toradex" - - env: + - name: "buildman boundary engicam toradex" + env: + - BUILDMAN="boundary engicam toradex" + - name: "buildman Freescale ARM32" + env: + - BUILDMAN="freescale -x powerpc,m68k,aarch64" + - name: "buildman Freescale AArch64" + env: + - BUILDMAN="freescale&aarch64" + - name: "buildman i.MX6 (non-Freescale)" + env: + - BUILDMAN="mx6 -x freescale,toradex,boundary,engicam" + - name: "buildman i.MX (non-Freescale,i.MX6,toradex)" + env: + - BUILDMAN="mx -x freescale,mx6,toradex" + - name: "buildman k2" + env: - BUILDMAN="k2" - - env: + - name: "buildman samsung socfpga" + env: - BUILDMAN="samsung socfpga" - - env: + - name: "buildman sun4i" + env: - BUILDMAN="sun4i" - - env: + - name: "buildman sun5i" + env: - BUILDMAN="sun5i" - - env: + - name: "buildman sun6i" + env: - BUILDMAN="sun6i" - - env: + - name: "builman sun7i" + env: - BUILDMAN="sun7i" - - env: + - name: "buildman sun8i" + env: - BUILDMAN="sun8i" - - env: + - name: "buildman sun9i" + env: - BUILDMAN="sun9i" - - env: + - name: "buildman sun50i" + env: - BUILDMAN="sun50i" - - env: - - JOB="Catch-all ARM" - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx" - - env: + - name: "buildman catch-all ARM" + env: + - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx" + - name: "buildman sandbox x86" + env: - BUILDMAN="sandbox x86" TOOLCHAIN="x86_64" - - env: + - name: "buildman kirkwood (excluding openrd)" + env: - BUILDMAN="kirkwood -x openrd" - - env: + - name: "buildman mvebu" + env: - BUILDMAN="mvebu" - - env: - - JOB="PXA" + - name: "buildman PXA (non-toradex)" + env: - BUILDMAN="pxa -x toradex" - - env: + - name: "buildman m68k" + env: - BUILDMAN="m68k" TOOLCHAIN="m68k" - - env: + - name: "buildman microblaze" + env: - BUILDMAN="microblaze" TOOLCHAIN="microblaze" - - env: + - name: "buildman mips" + env: - BUILDMAN="mips" TOOLCHAIN="mips" - - env: - - JOB="Non-Freescale PowerPC" - BUILDMAN="powerpc -x freescale" + - name: "buildman non-Freescale PowerPC" + env: + - BUILDMAN="powerpc -x freescale" TOOLCHAIN="powerpc" - - env: + - name: "buildman mpc85xx&freescale (excluding many)" + env: - BUILDMAN="mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*" TOOLCHAIN="powerpc" - - env: + - name: "buildman t208xrdb corenet_ds" + env: - BUILDMAN="t208xrdb corenet_ds" TOOLCHAIN="powerpc" - - env: + - name: "buildman Freescale PowerPC" + env: - BUILDMAN="t4qds b4860qds mpc83xx&freescale mpc86xx&freescale" TOOLCHAIN="powerpc" - - env: + - name: "buildman t102*" + env: - BUILDMAN="t102*" TOOLCHAIN="powerpc" - - env: + - name: "buildman p1_p2_rdb_pc" + env: - BUILDMAN="p1_p2_rdb_pc" TOOLCHAIN="powerpc" - - env: + - name: "buildman p1010rdb bsc91" + env: - BUILDMAN="p1010rdb bsc91" TOOLCHAIN="powerpc" - - env: + - name: "buildman siemens" + env: - BUILDMAN="siemens" - - env: - - JOB="tegra" - BUILDMAN="tegra -x toradex" - - env: - - JOB="am33xx" - BUILDMAN="am33xx -x siemens" - - env: + - name: "buildman tegra" + env: + - BUILDMAN="tegra -x toradex" + - name: "buildman am33xx (no siemens)" + env: + - BUILDMAN="am33xx -x siemens" + - name: "buildman omap" + env: - BUILDMAN="omap" - - env: + - name: "buildman uniphier" + env: - BUILDMAN="uniphier" - - env: - - JOB="Catch-all AArch64" - BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip,xilinx" - - env: + - name: "buildman catch-all AArch64" + env: + - BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip,xilinx" + - name: "buildman rockchip" + env: - BUILDMAN="rockchip" - - env: - - JOB="sh" - BUILDMAN="sh -x arm" + - name: "buildman sh" + env: + - BUILDMAN="sh -x arm" TOOLCHAIN="sh" - - env: - - JOB="Xilinx (ARM)" - BUILDMAN="xilinx -x microblaze" - - env: + - name: "buildman Xilinx (ARM)" + env: + - BUILDMAN="xilinx -x microblaze" + - name: "buildman xtensa" + env: - BUILDMAN="xtensa" TOOLCHAIN="xtensa-dc233c-elf" - - env: + - name: "buildman riscv" + env: - BUILDMAN="riscv" TOOLCHAIN="riscv" # QA jobs for code analytics # static code analysis with cppcheck (we can add --enable=all later) - - env: - - JOB="cppcheck" + - name: "cppcheck" script: - cppcheck --force --quiet --inline-suppr . # search for TODO within source tree - - env: - - JOB="grep TODO" + - name: "grep TODO" script: - grep -r TODO . # search for FIXME within source tree - - env: - - JOB="grep FIXME HACK" + - name: "grep FIXME HACK" script: - grep -r FIXME . # search for HACK within source tree and ignore HACKKIT board script: - grep -r HACK . | grep -v HACKKIT # some statistics about the code base - - env: - - JOB="sloccount" + - name: "sloccount" script: - sloccount . # test/py - - env: + - name: "test/py sandbox" + env: - TEST_PY_BD="sandbox" BUILDMAN="^sandbox$" TOOLCHAIN="x86_64" - - env: + - name: "test/py sandbox_spl" + env: - TEST_PY_BD="sandbox_spl" TEST_PY_TEST_SPEC="test_ofplatdata" BUILDMAN="^sandbox$" TOOLCHAIN="x86_64" TEST_PY_TOOLS="yes" - - env: + - name: "test/py sandbox_flattree" + env: - TEST_PY_BD="sandbox_flattree" BUILDMAN="^sandbox_flattree$" TOOLCHAIN="x86_64" - - env: + - name: "test/py vexpress_ca15_tc2" + env: - TEST_PY_BD="vexpress_ca15_tc2" TEST_PY_ID="--id qemu" QEMU_TARGET="arm-softmmu" BUILDMAN="^vexpress_ca15_tc2$" - - env: + - name: "test/py vexpress_ca9x4" + env: - TEST_PY_BD="vexpress_ca9x4" TEST_PY_ID="--id qemu" QEMU_TARGET="arm-softmmu" BUILDMAN="^vexpress_ca9x4$" - - env: + - name: "test/py integratorcp_cm926ejs" + env: - TEST_PY_BD="integratorcp_cm926ejs" TEST_PY_TEST_SPEC="not sleep" TEST_PY_ID="--id qemu" QEMU_TARGET="arm-softmmu" BUILDMAN="^integratorcp_cm926ejs$" - - env: + - name: "test/py qemu_arm" + env: - TEST_PY_BD="qemu_arm" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="arm-softmmu" BUILDMAN="^qemu_arm$" - - env: + - name: "test/py qemu_arm64" + env: - TEST_PY_BD="qemu_arm64" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="aarch64-softmmu" BUILDMAN="^qemu_arm64$" - - env: + - name: "test/py qemu_mips" + env: - TEST_PY_BD="qemu_mips" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="mips-softmmu" BUILDMAN="^qemu_mips$" TOOLCHAIN="mips" - - env: + - name: "test/py qemu_mipsel" + env: - TEST_PY_BD="qemu_mipsel" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="mipsel-softmmu" BUILDMAN="^qemu_mipsel$" TOOLCHAIN="mips" - - env: + - name: "test/py qemu_mips64" + env: - TEST_PY_BD="qemu_mips64" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="mips64-softmmu" BUILDMAN="^qemu_mips64$" TOOLCHAIN="mips" - - env: + - name: "test/py qemu_mips64el" + env: - TEST_PY_BD="qemu_mips64el" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="mips64el-softmmu" BUILDMAN="^qemu_mips64el$" TOOLCHAIN="mips" - - env: + - name: "test/py qemu-ppce500" + env: - TEST_PY_BD="qemu-ppce500" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="ppc-softmmu" BUILDMAN="^qemu-ppce500$" TOOLCHAIN="powerpc" - - env: + - name: "test/py qemu-x86" + env: - TEST_PY_BD="qemu-x86" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="i386-softmmu" BUILDMAN="^qemu-x86$" TOOLCHAIN="x86_64" BUILD_ROM="yes" - - env: + - name: "test/py zynq_zc702" + env: - TEST_PY_BD="zynq_zc702" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="arm-softmmu" TEST_PY_ID="--id qemu" BUILDMAN="^zynq_zc702$" - - env: + - name: "test/py xtfpga" + env: - TEST_PY_BD="xtfpga" TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="xtensa-softmmu" diff --git a/Documentation/devicetree/bindings/axi/gdsys,ihs_axi.txt b/Documentation/devicetree/bindings/axi/gdsys,ihs_axi.txt new file mode 100644 index 0000000000..110788fa91 --- /dev/null +++ b/Documentation/devicetree/bindings/axi/gdsys,ihs_axi.txt @@ -0,0 +1,22 @@ +gdsys AXI busses of IHS FPGA devices + +Certain gdsys IHS FPGAs offer a interface to their built-in AXI bus with which +the connected devices (usually IP cores) can be controlled via software. + +Required properties: +- compatible: must be "gdsys,ihs_axi" +- reg: describes the address and length of the AXI bus's register map (within + the FPGA's register space) + +Example: + +fpga0_axi_video0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "gdsys,ihs_axi"; + reg = <0x170 0x10>; + + axi_dev_1 { + ... + }; +}; diff --git a/Documentation/devicetree/bindings/misc/gdsys,io-endpoint.txt b/Documentation/devicetree/bindings/misc/gdsys,io-endpoint.txt new file mode 100644 index 0000000000..db2ff8ca12 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/gdsys,io-endpoint.txt @@ -0,0 +1,20 @@ +gdsys IO endpoint of IHS FPGA devices + +The IO endpoint of IHS FPGA devices is a packet-based transmission interface +that allows interconnected gdsys devices to send and receive data over the +FPGA's main ethernet connection. + +Required properties: +- compatible: must be "gdsys,io-endpoint" +- reg: describes the address and length of the endpoint's register map (within + the FPGA's register space) + +Example: + +fpga0_ep0 { + compatible = "gdsys,io-endpoint"; + reg = <0x020 0x10 + 0x320 0x10 + 0x340 0x10 + 0x360 0x10>; +}; diff --git a/Documentation/efi.rst b/Documentation/efi.rst new file mode 100644 index 0000000000..51c1de24f8 --- /dev/null +++ b/Documentation/efi.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +EFI subsystem +============= + +Boot services +------------- + +.. kernel-doc:: lib/efi_loader/efi_boottime.c + :internal: + +Runtime services +---------------- + +.. kernel-doc:: lib/efi_loader/efi_runtime.c + :internal: diff --git a/Documentation/index.rst b/Documentation/index.rst index a7b0ee4e87..0353c10a4b 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -1,117 +1,11 @@ -==================== -U-Boot Hacker Manual -==================== +.. SPDX-License-Identifier: GPL-2.0+ -Linker-Generated Arrays -======================= +####################### +U-Boot Developer Manual +####################### -A linker list is constructed by grouping together linker input -sections, each containing one entry of the list. Each input section -contains a constant initialized variable which holds the entry's -content. Linker list input sections are constructed from the list -and entry names, plus a prefix which allows grouping all lists -together. Assuming _list and _entry are the list and entry names, -then the corresponding input section name is +.. toctree:: -:: - - .u_boot_list_ + 2_ + @_list + _2_ + @_entry - -and the C variable name is - -:: - - _u_boot_list + _2_ + @_list + _2_ + @_entry - -This ensures uniqueness for both input section and C variable name. - -Note that the names differ only in the first character, "." for the -section and "_" for the variable, so that the linker cannot confuse -section and symbol names. From now on, both names will be referred -to as - -:: - - %u_boot_list_ + 2_ + @_list + _2_ + @_entry - -Entry variables need never be referred to directly. - -The naming scheme for input sections allows grouping all linker lists -into a single linker output section and grouping all entries for a -single list. - -Note the two '_2_' constant components in the names: their presence -allows putting a start and end symbols around a list, by mapping -these symbols to sections names with components "1" (before) and -"3" (after) instead of "2" (within). -Start and end symbols for a list can generally be defined as - -:: - - %u_boot_list_2_ + @_list + _1_... - %u_boot_list_2_ + @_list + _3_... - -Start and end symbols for the whole of the linker lists area can be -defined as - -:: - - %u_boot_list_1_... - %u_boot_list_3_... - -Here is an example of the sorted sections which result from a list -"array" made up of three entries : "first", "second" and "third", -iterated at least once. - -:: - - .u_boot_list_2_array_1 - .u_boot_list_2_array_2_first - .u_boot_list_2_array_2_second - .u_boot_list_2_array_2_third - .u_boot_list_2_array_3 - -If lists must be divided into sublists (e.g. for iterating only on -part of a list), one can simply give the list a name of the form -'outer_2_inner', where 'outer' is the global list name and 'inner' -is the sub-list name. Iterators for the whole list should use the -global list name ("outer"); iterators for only a sub-list should use -the full sub-list name ("outer_2_inner"). - -Here is an example of the sections generated from a global list -named "drivers", two sub-lists named "i2c" and "pci", and iterators -defined for the whole list and each sub-list: - -:: - - %u_boot_list_2_drivers_1 - %u_boot_list_2_drivers_2_i2c_1 - %u_boot_list_2_drivers_2_i2c_2_first - %u_boot_list_2_drivers_2_i2c_2_first - %u_boot_list_2_drivers_2_i2c_2_second - %u_boot_list_2_drivers_2_i2c_2_third - %u_boot_list_2_drivers_2_i2c_3 - %u_boot_list_2_drivers_2_pci_1 - %u_boot_list_2_drivers_2_pci_2_first - %u_boot_list_2_drivers_2_pci_2_second - %u_boot_list_2_drivers_2_pci_2_third - %u_boot_list_2_drivers_2_pci_3 - %u_boot_list_2_drivers_3 - -.. kernel-doc:: include/linker_lists.h - :internal: - -Serial system -============= - -.. kernel-doc:: drivers/serial/serial.c - :internal: - -The U-Boot EFI subsystem -======================== - -Boot services -------------- - -.. kernel-doc:: lib/efi_loader/efi_boottime.c - :internal: + efi + linker_lists + serial diff --git a/Documentation/linker_lists.rst b/Documentation/linker_lists.rst new file mode 100644 index 0000000000..72f514e0ac --- /dev/null +++ b/Documentation/linker_lists.rst @@ -0,0 +1,100 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Linker-Generated Arrays +======================= + +A linker list is constructed by grouping together linker input +sections, each containing one entry of the list. Each input section +contains a constant initialized variable which holds the entry's +content. Linker list input sections are constructed from the list +and entry names, plus a prefix which allows grouping all lists +together. Assuming _list and _entry are the list and entry names, +then the corresponding input section name is + +:: + + .u_boot_list_ + 2_ + @_list + _2_ + @_entry + +and the C variable name is + +:: + + _u_boot_list + _2_ + @_list + _2_ + @_entry + +This ensures uniqueness for both input section and C variable name. + +Note that the names differ only in the first character, "." for the +section and "_" for the variable, so that the linker cannot confuse +section and symbol names. From now on, both names will be referred +to as + +:: + + %u_boot_list_ + 2_ + @_list + _2_ + @_entry + +Entry variables need never be referred to directly. + +The naming scheme for input sections allows grouping all linker lists +into a single linker output section and grouping all entries for a +single list. + +Note the two '_2_' constant components in the names: their presence +allows putting a start and end symbols around a list, by mapping +these symbols to sections names with components "1" (before) and +"3" (after) instead of "2" (within). +Start and end symbols for a list can generally be defined as + +:: + + %u_boot_list_2_ + @_list + _1_... + %u_boot_list_2_ + @_list + _3_... + +Start and end symbols for the whole of the linker lists area can be +defined as + +:: + + %u_boot_list_1_... + %u_boot_list_3_... + +Here is an example of the sorted sections which result from a list +"array" made up of three entries : "first", "second" and "third", +iterated at least once. + +:: + + .u_boot_list_2_array_1 + .u_boot_list_2_array_2_first + .u_boot_list_2_array_2_second + .u_boot_list_2_array_2_third + .u_boot_list_2_array_3 + +If lists must be divided into sublists (e.g. for iterating only on +part of a list), one can simply give the list a name of the form +'outer_2_inner', where 'outer' is the global list name and 'inner' +is the sub-list name. Iterators for the whole list should use the +global list name ("outer"); iterators for only a sub-list should use +the full sub-list name ("outer_2_inner"). + +Here is an example of the sections generated from a global list +named "drivers", two sub-lists named "i2c" and "pci", and iterators +defined for the whole list and each sub-list: + +:: + + %u_boot_list_2_drivers_1 + %u_boot_list_2_drivers_2_i2c_1 + %u_boot_list_2_drivers_2_i2c_2_first + %u_boot_list_2_drivers_2_i2c_2_first + %u_boot_list_2_drivers_2_i2c_2_second + %u_boot_list_2_drivers_2_i2c_2_third + %u_boot_list_2_drivers_2_i2c_3 + %u_boot_list_2_drivers_2_pci_1 + %u_boot_list_2_drivers_2_pci_2_first + %u_boot_list_2_drivers_2_pci_2_second + %u_boot_list_2_drivers_2_pci_2_third + %u_boot_list_2_drivers_2_pci_3 + %u_boot_list_2_drivers_3 + +.. kernel-doc:: include/linker_lists.h + :internal: diff --git a/Documentation/serial.rst b/Documentation/serial.rst new file mode 100644 index 0000000000..ed34e592a4 --- /dev/null +++ b/Documentation/serial.rst @@ -0,0 +1,7 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Serial system +============= + +.. kernel-doc:: drivers/serial/serial.c + :internal: @@ -104,6 +104,12 @@ config ENV_VARS_UBOOT_CONFIG - CONFIG_SYS_VENDOR - CONFIG_SYS_SOC +config NR_DRAM_BANKS + int "Number of DRAM banks" + default 4 + help + This defines the number of DRAM banks. + config SYS_BOOT_GET_CMDLINE bool "Enable kernel command line setup" help diff --git a/MAINTAINERS b/MAINTAINERS index 58b61ac058..8f237128b2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -207,7 +207,11 @@ ARM SNAPDRAGON M: Ramon Fried <ramon.fried@gmail.com> S: Maintained F: arch/arm/mach-snapdragon/ +F: drivers/gpio/msm_gpio.c +F: drivers/mmc/msm_sdhci.c +F: drivers/serial/serial_msm.c F: drivers/smem/msm_smem.c +F: drivers/usb/host/ehci-msm.c ARM STI M: Patrice Chotard <patrice.chotard@st.com> @@ -224,11 +228,21 @@ F: arch/arm/include/asm/arch-spear/ ARM STM STM32MP M: Patrick Delaunay <patrick.delaunay@st.com> +M: Christophe Kerello <christophe.kerello@st.com> +M: Patrice Chotard <patrice.chotard@st.com> S: Maintained F: arch/arm/mach-stm32mp F: drivers/clk/clk_stm32mp1.c +F: drivers/i2c/stm32f7_i2c.c F: drivers/misc/stm32mp_fuse.c +F: drivers/mmc/stm32_sdmmc2.c +F: drivers/phy/phy-stm32-usbphyc.c +F: drivers/pinctrl/pinctrl_stm32.c +F: drivers/power/regulator/stm32-vrefbuf.c F: drivers/ram/stm32mp1/ +F: drivers/misc/stm32_rcc.c +F: drivers/reset/stm32-reset.c +F: drivers/spi/stm32_qspi.c ARM STM STV0991 M: Vikas Manocha <vikas.manocha@st.com> @@ -364,9 +378,9 @@ EFI PAYLOAD M: Alexander Graf <agraf@suse.de> S: Maintained T: git git://github.com/agraf/u-boot.git -F: doc/DocBook/efi.tmpl F: doc/README.uefi F: doc/README.iscsi +F: Documentation/efi.rst F: include/efi* F: include/pe.h F: include/asm-generic/pe.h @@ -3,7 +3,7 @@ VERSION = 2018 PATCHLEVEL = 09 SUBLEVEL = -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc2 NAME = # *DOCUMENTATION* @@ -375,6 +375,10 @@ KBUILD_CFLAGS := -Wall -Wstrict-prototypes \ KBUILD_CFLAGS += -fshort-wchar KBUILD_AFLAGS := -D__ASSEMBLY__ +# Don't generate position independent code +KBUILD_CFLAGS += $(call cc-option,-fno-PIE) +KBUILD_AFLAGS += $(call cc-option,-fno-PIE) + # Read UBOOTRELEASE from include/config/uboot.release (if it exists) UBOOTRELEASE = $(shell cat include/config/uboot.release 2> /dev/null) UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) @@ -977,9 +977,6 @@ The following options need to be configured: Define this to use i/o functions instead of macros (some hardware wont work with macros) - CONFIG_DRIVER_TI_EMAC - Support for davinci emac - CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT Define this if you have more then 3 PHYs. @@ -3943,6 +3940,17 @@ If CONFIG_REGEX is defined, the variable_name above is evaluated as a regular expression. This allows multiple variables to be connected to the same callback without explicitly listing them all out. +The signature of the callback functions is: + + int callback(const char *name, const char *value, enum env_op op, int flags) + +* name - changed environment variable +* value - new value of the environment variable +* op - operation (create, overwrite, or delete) +* flags - attributes of the environment variable change, see flags H_* in + include/search.h + +The return value is 0 if the variable change is accepted and 1 otherwise. Command Line Parsing: ===================== diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 63ec02403a..9f5eaf8591 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -772,7 +772,7 @@ config ARCH_SNAPDRAGON config ARCH_SOCFPGA bool "Altera SOCFPGA family" select ARCH_EARLY_INIT_R - select ARCH_MISC_INIT + select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 select ARM64 if TARGET_SOCFPGA_STRATIX10 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 select DM diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c index 6c3caf84b2..8bf9c42b22 100644 --- a/arch/arm/cpu/armv7/ls102xa/fdt.c +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c @@ -64,8 +64,8 @@ void ft_fixup_enet_phy_connect_type(void *fdt) do_fixup_by_path(fdt, enet_path, "phy-connection-type", phy_string_for_interface( PHY_INTERFACE_MODE_RGMII_ID), - sizeof(phy_string_for_interface( - PHY_INTERFACE_MODE_RGMII_ID)), + strlen(phy_string_for_interface( + PHY_INTERFACE_MODE_RGMII_ID)) + 1, 1); } } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index 1e9e4680fe..5d6f68aad6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -37,6 +37,7 @@ endif ifneq ($(CONFIG_ARCH_LS1046A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o +obj-y += icid.o ls1046_ids.o endif ifneq ($(CONFIG_ARCH_LS1088A),) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c b/arch/arm/cpu/armv8/fsl-layerscape/icid.c new file mode 100644 index 0000000000..b1a950e7f9 --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c @@ -0,0 +1,192 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include <common.h> +#include <linux/libfdt.h> +#include <fdt_support.h> + +#include <asm/io.h> +#include <asm/processor.h> +#include <asm/arch-fsl-layerscape/fsl_icid.h> +#include <fsl_fman.h> + +static void set_icid(struct icid_id_table *tbl, int size) +{ + int i; + + for (i = 0; i < size; i++) + out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg); +} + +#ifdef CONFIG_SYS_DPAA_FMAN +void set_fman_icids(struct fman_icid_id_table *tbl, int size) +{ + int i; + ccsr_fman_t *fm = (void *)CONFIG_SYS_FSL_FM1_ADDR; + + for (i = 0; i < size; i++) { + out_be32(&fm->fm_bmi_common.fmbm_ppid[tbl[i].port_id - 1], + tbl[i].icid); + } +} +#endif + +void set_icids(void) +{ + /* setup general icid offsets */ + set_icid(icid_tbl, icid_tbl_sz); + +#ifdef CONFIG_SYS_DPAA_FMAN + set_fman_icids(fman_icid_tbl, fman_icid_tbl_sz); +#endif +} + +int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids) +{ + int i, ret; + u32 prop[8]; + + /* + * Note: The "iommus" property definition mentions Stream IDs while + * this code handles ICIDs. The current implementation assumes that + * ICIDs and Stream IDs are equal. + */ + for (i = 0; i < num_ids; i++) { + prop[i * 2] = cpu_to_fdt32(smmu_ph); + prop[i * 2 + 1] = cpu_to_fdt32(ids[i]); + } + ret = fdt_setprop(blob, off, "iommus", + prop, sizeof(u32) * num_ids * 2); + if (ret) { + printf("WARNING unable to set iommus: %s\n", fdt_strerror(ret)); + return ret; + } + + return 0; +} + +int fdt_fixup_icid_tbl(void *blob, int smmu_ph, + struct icid_id_table *tbl, int size) +{ + int i, err, off; + + for (i = 0; i < size; i++) { + if (!tbl[i].compat) + continue; + + off = fdt_node_offset_by_compat_reg(blob, + tbl[i].compat, + tbl[i].compat_addr); + if (off > 0) { + err = fdt_set_iommu_prop(blob, off, smmu_ph, + &tbl[i].id, 1); + if (err) + return err; + } else { + printf("WARNING could not find node %s: %s.\n", + tbl[i].compat, fdt_strerror(off)); + } + } + + return 0; +} + +#ifdef CONFIG_SYS_DPAA_FMAN +int get_fman_port_icid(int port_id, struct fman_icid_id_table *tbl, + const int size) +{ + int i; + + for (i = 0; i < size; i++) { + if (tbl[i].port_id == port_id) + return tbl[i].icid; + } + + return -1; +} + +void fdt_fixup_fman_port_icid_by_compat(void *blob, int smmu_ph, + const char *compat) +{ + int noff, len, icid; + const u32 *prop; + + noff = fdt_node_offset_by_compatible(blob, -1, compat); + while (noff > 0) { + prop = fdt_getprop(blob, noff, "cell-index", &len); + if (!prop) { + printf("WARNING missing cell-index for fman port\n"); + continue; + } + if (len != 4) { + printf("WARNING bad cell-index size for fman port\n"); + continue; + } + + icid = get_fman_port_icid(fdt32_to_cpu(*prop), + fman_icid_tbl, fman_icid_tbl_sz); + if (icid < 0) { + printf("WARNING unknown ICID for fman port %d\n", + *prop); + continue; + } + + fdt_set_iommu_prop(blob, noff, smmu_ph, (u32 *)&icid, 1); + + noff = fdt_node_offset_by_compatible(blob, noff, compat); + } +} + +void fdt_fixup_fman_icids(void *blob, int smmu_ph) +{ + static const char * const compats[] = { + "fsl,fman-v3-port-oh", + "fsl,fman-v3-port-rx", + "fsl,fman-v3-port-tx", + }; + int i; + + for (i = 0; i < ARRAY_SIZE(compats); i++) + fdt_fixup_fman_port_icid_by_compat(blob, smmu_ph, compats[i]); +} +#endif + +int fdt_get_smmu_phandle(void *blob) +{ + int noff, smmu_ph; + + noff = fdt_node_offset_by_compatible(blob, -1, "arm,mmu-500"); + if (noff < 0) { + printf("WARNING failed to get smmu node: %s\n", + fdt_strerror(noff)); + return noff; + } + + smmu_ph = fdt_get_phandle(blob, noff); + if (!smmu_ph) { + smmu_ph = fdt_create_phandle(blob, noff); + if (!smmu_ph) { + printf("WARNING failed to get smmu phandle\n"); + return -1; + } + } + + return smmu_ph; +} + +void fdt_fixup_icid(void *blob) +{ + int smmu_ph; + + smmu_ph = fdt_get_smmu_phandle(blob); + if (smmu_ph < 0) + return; + + fdt_fixup_icid_tbl(blob, smmu_ph, icid_tbl, icid_tbl_sz); + +#ifdef CONFIG_SYS_DPAA_FMAN + fdt_fixup_fman_icids(blob, smmu_ph); +#endif +} diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c new file mode 100644 index 0000000000..2da9adab5b --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include <common.h> +#include <asm/arch-fsl-layerscape/immap_lsch2.h> +#include <asm/arch-fsl-layerscape/fsl_icid.h> +#include <asm/arch-fsl-layerscape/fsl_portals.h> + +#ifdef CONFIG_SYS_DPAA_QBMAN +struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), + SET_QP_INFO(FSL_DPAA1_STREAM_ID_END, 0), +}; +#endif + +struct icid_id_table icid_tbl[] = { +#ifdef CONFIG_SYS_DPAA_QBMAN + SET_QMAN_ICID(FSL_DPAA1_STREAM_ID_START), + SET_BMAN_ICID(FSL_DPAA1_STREAM_ID_START + 1), +#endif + + SET_SDHC_ICID(FSL_SDHC_STREAM_ID), + + SET_USB_ICID(1, "snps,dwc3", FSL_USB1_STREAM_ID), + SET_USB_ICID(2, "snps,dwc3", FSL_USB2_STREAM_ID), + SET_USB_ICID(3, "snps,dwc3", FSL_USB3_STREAM_ID), + + SET_SATA_ICID("fsl,ls1046a-ahci", FSL_SATA_STREAM_ID), + SET_QDMA_ICID("fsl,ls1046a-qdma", FSL_QDMA_STREAM_ID), + SET_EDMA_ICID(FSL_EDMA_STREAM_ID), + SET_ETR_ICID(FSL_ETR_STREAM_ID), + SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID), +#ifdef CONFIG_FSL_CAAM + SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2), + SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3), + SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4), + SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5), + SET_SEC_JR_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 6), + SET_SEC_RTIC_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 7), + SET_SEC_RTIC_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 8), + SET_SEC_RTIC_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 9), + SET_SEC_RTIC_ICID_ENTRY(3, FSL_DPAA1_STREAM_ID_START + 10), + SET_SEC_DECO_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 11), + SET_SEC_DECO_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 12), + SET_SEC_DECO_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 13), +#endif +}; + +int icid_tbl_sz = ARRAY_SIZE(icid_tbl); + +#ifdef CONFIG_SYS_DPAA_FMAN +struct fman_icid_id_table fman_icid_tbl[] = { + /* port id, icid */ + SET_FMAN_ICID_ENTRY(0x02, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x03, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x04, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x05, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x06, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x07, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x08, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x09, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x0a, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x0b, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x0c, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x0d, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x28, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x29, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x2a, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x2b, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x2c, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x2d, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x10, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x11, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x30, FSL_DPAA1_STREAM_ID_END), + SET_FMAN_ICID_ENTRY(0x31, FSL_DPAA1_STREAM_ID_END), +}; + +int fman_icid_tbl_sz = ARRAY_SIZE(fman_icid_tbl); +#endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 8028d5228f..3f15cb08ff 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -11,6 +11,8 @@ #include <asm/io.h> #include <asm/global_data.h> #include <asm/arch-fsl-layerscape/config.h> +#include <asm/arch-fsl-layerscape/ns_access.h> +#include <asm/arch-fsl-layerscape/fsl_icid.h> #ifdef CONFIG_LAYERSCAPE_NS_ACCESS #include <fsl_csu.h> #endif @@ -614,6 +616,14 @@ void fsl_lsch2_early_init_f(void) CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN); } + /* + * Program Central Security Unit (CSU) to grant access + * permission for USB 2.0 controller + */ +#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL) + if (current_el() == 3) + set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW); +#endif /* Erratum */ erratum_a008850_early(); /* part 1 of 2 */ erratum_a009929(); @@ -623,6 +633,10 @@ void fsl_lsch2_early_init_f(void) erratum_a009798(); erratum_a008997(); erratum_a009007(); + +#ifdef CONFIG_ARCH_LS1046A + set_icids(); +#endif } #endif diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index 2f935a21e9..ce000512ef 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -55,6 +55,7 @@ device_type = "soc"; interrupt-parent = <&intc>; ranges; + u-boot,dm-pre-reloc; amba { compatible = "simple-bus"; @@ -93,29 +94,35 @@ clkmgr@ffd04000 { compatible = "altr,clk-mgr"; reg = <0xffd04000 0x1000>; + u-boot,dm-pre-reloc; clocks { #address-cells = <1>; #size-cells = <0>; + u-boot,dm-pre-reloc; cb_intosc_hs_div2_clk: cb_intosc_hs_div2_clk { #clock-cells = <0>; compatible = "fixed-clock"; + u-boot,dm-pre-reloc; }; cb_intosc_ls_clk: cb_intosc_ls_clk { #clock-cells = <0>; compatible = "fixed-clock"; + u-boot,dm-pre-reloc; }; f2s_free_clk: f2s_free_clk { #clock-cells = <0>; compatible = "fixed-clock"; + u-boot,dm-pre-reloc; }; osc1: osc1 { #clock-cells = <0>; compatible = "fixed-clock"; + u-boot,dm-pre-reloc; }; main_pll: main_pll@40 { @@ -126,6 +133,7 @@ clocks = <&osc1>, <&cb_intosc_ls_clk>, <&f2s_free_clk>; reg = <0x40>; + u-boot,dm-pre-reloc; main_mpu_base_clk: main_mpu_base_clk { #clock-cells = <0>; @@ -214,6 +222,7 @@ clocks = <&osc1>, <&cb_intosc_ls_clk>, <&f2s_free_clk>, <&main_periph_ref_clk>; reg = <0xC0>; + u-boot,dm-pre-reloc; peri_mpu_base_clk: peri_mpu_base_clk { #clock-cells = <0>; @@ -427,8 +436,8 @@ rx-fifo-depth = <16384>; clocks = <&l4_mp_clk>; clock-names = "stmmaceth"; - resets = <&rst EMAC0_RESET>; - reset-names = "stmmaceth"; + resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -447,8 +456,8 @@ rx-fifo-depth = <16384>; clocks = <&l4_mp_clk>; clock-names = "stmmaceth"; - resets = <&rst EMAC1_RESET>; - reset-names = "stmmaceth"; + resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -467,6 +476,8 @@ rx-fifo-depth = <16384>; clocks = <&l4_mp_clk>; clock-names = "stmmaceth"; + resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -547,6 +558,8 @@ reg = <0xffc02200 0x100>; interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C0_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -557,6 +570,8 @@ reg = <0xffc02300 0x100>; interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C1_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -567,6 +582,8 @@ reg = <0xffc02400 0x100>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C2_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -577,6 +594,8 @@ reg = <0xffc02500 0x100>; interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C3_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -587,6 +606,8 @@ reg = <0xffc02600 0x100>; interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&l4_sp_clk>; + resets = <&rst I2C4_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -735,6 +756,7 @@ compatible = "altr,rst-mgr"; reg = <0xffd05000 0x100>; altr,modrst-offset = <0x20>; + u-boot,dm-pre-reloc; }; scu: snoop-control-unit@ffffc000 { @@ -795,6 +817,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&l4_sp_clk>; + resets = <&rst UART0_RESET>; status = "disabled"; }; @@ -805,6 +828,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&l4_sp_clk>; + resets = <&rst UART1_RESET>; status = "disabled"; }; diff --git a/arch/arm/dts/socfpga_arria10_socdk.dtsi b/arch/arm/dts/socfpga_arria10_socdk.dtsi index 3f59f02577..9160c20bd0 100644 --- a/arch/arm/dts/socfpga_arria10_socdk.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk.dtsi @@ -23,6 +23,7 @@ aliases { ethernet0 = &gmac0; serial0 = &uart1; + i2c0 = &i2c1; }; chosen { @@ -166,3 +167,28 @@ &watchdog1 { status = "okay"; }; + +/* Clock available early */ +&main_noc_base_clk { + u-boot,dm-pre-reloc; +}; + +&main_periph_ref_clk { + u-boot,dm-pre-reloc; +}; + +&peri_noc_base_clk { + u-boot,dm-pre-reloc; +}; + +&noc_free_clk { + u-boot,dm-pre-reloc; +}; + +&l4_mp_clk { + u-boot,dm-pre-reloc; +}; + +&l4_sp_clk { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts index 9c6070ded9..998d811210 100644 --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts @@ -38,3 +38,20 @@ <48 IRQ_TYPE_LEVEL_HIGH>; }; }; + +/* Clock available early */ +&main_sdmmc_clk { + u-boot,dm-pre-reloc; +}; + +&peri_sdmmc_clk { + u-boot,dm-pre-reloc; +}; + +&sdmmc_free_clk { + u-boot,dm-pre-reloc; +}; + +&sdmmc_clk { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 449ba9cbb9..6f4de2f563 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; memory { @@ -99,3 +100,7 @@ cdns,tslch-ns = <4>; }; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts index aeb327dd5b..139a70f265 100644 --- a/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts +++ b/arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; aliases { @@ -56,3 +57,7 @@ disable-over-current; status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts index f4a98e4bb0..d504150edd 100644 --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; aliases { @@ -75,3 +76,7 @@ &usb1 { status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts index 7da2d8b043..d4dd9e9bca 100644 --- a/arch/arm/dts/socfpga_cyclone5_de10_nano.dts +++ b/arch/arm/dts/socfpga_cyclone5_de10_nano.dts @@ -13,6 +13,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; aliases { @@ -65,3 +66,7 @@ &usb1 { status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts index e6fadb4fc9..f62292284d 100644 --- a/arch/arm/dts/socfpga_cyclone5_de1_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de1_soc.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; aliases { @@ -63,3 +64,7 @@ &usb1 { status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts index aa1ce2c3e2..4e94d86114 100644 --- a/arch/arm/dts/socfpga_cyclone5_is1.dts +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; memory { @@ -102,3 +103,7 @@ &usb1 { status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index 55c70abb02..c28be67bb9 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; memory { @@ -113,3 +114,7 @@ &usb1 { status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts b/arch/arm/dts/socfpga_cyclone5_sockit.dts index 08d8356d80..c7a6cf2db8 100644 --- a/arch/arm/dts/socfpga_cyclone5_sockit.dts +++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; aliases { @@ -93,3 +94,7 @@ &usb1 { status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index 0d452ae300..8cde9906a0 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; aliases { @@ -84,3 +85,7 @@ disable-over-current; status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_cyclone5_sr1500.dts b/arch/arm/dts/socfpga_cyclone5_sr1500.dts index 341df7a3e7..86c61fe081 100644 --- a/arch/arm/dts/socfpga_cyclone5_sr1500.dts +++ b/arch/arm/dts/socfpga_cyclone5_sr1500.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; aliases { @@ -67,6 +68,7 @@ &uart0 { status = "okay"; + u-boot,dm-pre-reloc; }; &usb1 { diff --git a/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts index 7a032af3a4..85ab56379f 100644 --- a/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts +++ b/arch/arm/dts/socfpga_cyclone5_vining_fpga.dts @@ -11,6 +11,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; }; aliases { @@ -108,3 +109,7 @@ &usb1 { status = "okay"; }; + +&uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/stm32429i-eval.dts b/arch/arm/dts/stm32429i-eval.dts index f6753a4d1a..1eec951188 100644 --- a/arch/arm/dts/stm32429i-eval.dts +++ b/arch/arm/dts/stm32429i-eval.dts @@ -72,7 +72,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; #size-cells = <0>; autorepeat; button@0 { diff --git a/arch/arm/dts/stm32f429-disco.dts b/arch/arm/dts/stm32f429-disco.dts index e914b6b74e..106db68b5b 100644 --- a/arch/arm/dts/stm32f429-disco.dts +++ b/arch/arm/dts/stm32f429-disco.dts @@ -76,7 +76,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; #size-cells = <0>; autorepeat; button@0 { diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi index 6bcf9863e0..046aeff7cc 100644 --- a/arch/arm/dts/stm32f429.dtsi +++ b/arch/arm/dts/stm32f429.dtsi @@ -259,7 +259,6 @@ }; timers13: timers@40001c00 { - #address-cells = <1>; #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40001C00 0x400>; @@ -274,7 +273,6 @@ }; timers14: timers@40002000 { - #address-cells = <1>; #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40002000 0x400>; @@ -542,7 +540,6 @@ }; timers10: timers@40014400 { - #address-cells = <1>; #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014400 0x400>; @@ -557,7 +554,6 @@ }; timers11: timers@40014800 { - #address-cells = <1>; #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40014800 0x400>; diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index e47f762e54..7ef33d6381 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -48,6 +48,7 @@ /dts-v1/; #include "stm32f746.dtsi" #include <dt-bindings/memory/stm32-sdram.h> +#include <dt-bindings/gpio/gpio.h> / { model = "STMicroelectronics STM32F746-DISCO board"; @@ -307,8 +308,7 @@ &sdio { status = "okay"; - cd-gpios = <&gpioc 13 0>; - cd-inverted; + cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "opendrain"; pinctrl-0 = <&sdio_pins>; pinctrl-1 = <&sdio_pins_od>; diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts index 59c9d31c21..1e8ef742ce 100644 --- a/arch/arm/dts/stm32f769-disco.dts +++ b/arch/arm/dts/stm32f769-disco.dts @@ -43,6 +43,7 @@ /dts-v1/; #include "stm32f746.dtsi" #include <dt-bindings/memory/stm32-sdram.h> +#include <dt-bindings/gpio/gpio.h> / { model = "STMicroelectronics STM32F769-DISCO board"; @@ -256,8 +257,7 @@ &sdio2 { status = "okay"; - cd-gpios = <&gpioi 15 0>; - cd-inverted; + cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "opendrain"; pinctrl-0 = <&sdio_pins_b>; pinctrl-1 = <&sdio_pins_od_b>; diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index 39a0ebce90..4898483e1d 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -13,6 +13,30 @@ mmc1 = &sdmmc2; i2c3 = &i2c4; }; + + led { + compatible = "gpio-leds"; + + red { + label = "stm32mp:red:status"; + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + green { + label = "stm32mp:green:user"; + gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + orange { + label = "stm32mp:orange:status"; + gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + blue { + label = "stm32mp:blue:user"; + gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>; + }; + }; }; &uart4_pins_a { diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi index 8df9f09dc6..cdf2946968 100644 --- a/arch/arm/dts/stm32mp157c.dtsi +++ b/arch/arm/dts/stm32mp157c.dtsi @@ -608,6 +608,38 @@ clocks = <&rcc DMAMUX>; }; + adc: adc@48003000 { + compatible = "st,stm32mp1-adc-core"; + reg = <0x48003000 0x400>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc ADC12>, <&rcc ADC12_K>; + clock-names = "bus", "adc"; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + adc1: adc@0 { + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + reg = <0x0>; + interrupt-parent = <&adc>; + interrupts = <0>; + status = "disabled"; + }; + + adc2: adc@100 { + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + reg = <0x100>; + interrupt-parent = <&adc>; + interrupts = <1>; + status = "disabled"; + }; + }; + sdmmc3: sdmmc@48004000 { compatible = "st,stm32-sdmmc2"; reg = <0x48004000 0x400>, <0x48005000 0x400>; diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 23faffd9fc..8a05148136 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -257,6 +257,7 @@ #elif defined(CONFIG_ARCH_LS1046A) #define CONFIG_SYS_FMAN_V3 +#define CONFIG_SYS_FSL_QMAN_V3 #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 8 #define CONFIG_SYS_NUM_FM1_10GEC 2 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h new file mode 100644 index 0000000000..a70c866651 --- /dev/null +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h @@ -0,0 +1,115 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef _FSL_ICID_H_ +#define _FSL_ICID_H_ + +#include <asm/types.h> +#include <fsl_qbman.h> +#include <fsl_sec.h> + +struct icid_id_table { + const char *compat; + u32 id; + u32 reg; + phys_addr_t compat_addr; + phys_addr_t reg_addr; +}; + +struct fman_icid_id_table { + u32 port_id; + u32 icid; +}; + +u32 get_ppid_icid(int ppid_tbl_idx, int ppid); +int fdt_get_smmu_phandle(void *blob); +int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids); +void set_icids(void); +void fdt_fixup_icid(void *blob); + +#define SET_ICID_ENTRY(name, idA, regA, addr, compataddr) \ + { .compat = name, \ + .id = idA, \ + .reg = regA, \ + .compat_addr = compataddr, \ + .reg_addr = addr, \ + } + +#define SET_SCFG_ICID(compat, streamid, name, compataddr) \ + SET_ICID_ENTRY(compat, streamid, (((streamid) << 24) | (1 << 23)), \ + offsetof(struct ccsr_scfg, name) + CONFIG_SYS_FSL_SCFG_ADDR, \ + compataddr) + +#define SET_USB_ICID(usb_num, compat, streamid) \ + SET_SCFG_ICID(compat, streamid, usb##usb_num##_icid,\ + CONFIG_SYS_XHCI_USB##usb_num##_ADDR) + +#define SET_SATA_ICID(compat, streamid) \ + SET_SCFG_ICID(compat, streamid, sata_icid,\ + AHCI_BASE_ADDR) + +#define SET_SDHC_ICID(streamid) \ + SET_SCFG_ICID("fsl,esdhc", streamid, sdhc_icid,\ + CONFIG_SYS_FSL_ESDHC_ADDR) + +#define SET_QDMA_ICID(compat, streamid) \ + SET_SCFG_ICID(compat, streamid, dma_icid,\ + QDMA_BASE_ADDR) + +#define SET_EDMA_ICID(streamid) \ + SET_SCFG_ICID("fsl,vf610-edma", streamid, edma_icid,\ + EDMA_BASE_ADDR) + +#define SET_ETR_ICID(streamid) \ + SET_SCFG_ICID(NULL, streamid, etr_icid, 0) + +#define SET_DEBUG_ICID(streamid) \ + SET_SCFG_ICID(NULL, streamid, debug_icid, 0) + +#define SET_QMAN_ICID(streamid) \ + SET_ICID_ENTRY("fsl,qman", streamid, streamid, \ + offsetof(struct ccsr_qman, liodnr) + \ + CONFIG_SYS_FSL_QMAN_ADDR, \ + CONFIG_SYS_FSL_QMAN_ADDR) + +#define SET_BMAN_ICID(streamid) \ + SET_ICID_ENTRY("fsl,bman", streamid, streamid, \ + offsetof(struct ccsr_bman, liodnr) + \ + CONFIG_SYS_FSL_BMAN_ADDR, \ + CONFIG_SYS_FSL_BMAN_ADDR) + +#define SET_FMAN_ICID_ENTRY(_port_id, streamid) \ + { .port_id = (_port_id), .icid = (streamid) } + +#define SET_SEC_QI_ICID(streamid) \ + SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \ + (((streamid) << 16) | (streamid)), \ + offsetof(ccsr_sec_t, qilcr_ls) + \ + CONFIG_SYS_FSL_SEC_ADDR, \ + CONFIG_SYS_FSL_SEC_ADDR) + +#define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \ + SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \ + (((streamid) << 16) | (streamid)), \ + offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \ + CONFIG_SYS_FSL_SEC_ADDR, \ + FSL_SEC_JR##jr_num##_BASE_ADDR) + +#define SET_SEC_DECO_ICID_ENTRY(deco_num, streamid) \ + SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \ + offsetof(ccsr_sec_t, decoliodnr[deco_num].ls) + \ + CONFIG_SYS_FSL_SEC_ADDR, 0) + +#define SET_SEC_RTIC_ICID_ENTRY(rtic_num, streamid) \ + SET_ICID_ENTRY(NULL, streamid, (((streamid) << 16) | (streamid)), \ + offsetof(ccsr_sec_t, rticliodnr[rtic_num].ls) + \ + CONFIG_SYS_FSL_SEC_ADDR, 0) + +extern struct icid_id_table icid_tbl[]; +extern struct fman_icid_id_table fman_icid_tbl[]; +extern int icid_tbl_sz; +extern int fman_icid_tbl_sz; + +#endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h new file mode 100644 index 0000000000..1577e935a6 --- /dev/null +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_portals.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef _FSL_PORTALS_H_ +#define _FSL_PORTALS_H_ + +struct qportal_info { + u16 dicid; /* DQRR ICID */ + u16 ficid; /* frame data ICID */ + u16 icid; + u8 sdest; +}; + +#define SET_QP_INFO(streamid, dest) \ + { .dicid = (streamid), .ficid = (streamid), .icid = (streamid), \ + .sdest = (dest) } + +extern struct qportal_info qp_info[]; +void fdt_portal(void *blob, const char *compat, const char *container, + u64 addr, u32 size); + +#endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 5b4767e0fe..be0a6ae363 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -57,8 +57,7 @@ #define CONFIG_SYS_BMAN_SWP_ISDR_REG 0x3E80 #define CONFIG_SYS_QMAN_NUM_PORTALS 10 #define CONFIG_SYS_QMAN_MEM_BASE 0x500000000 -#define CONFIG_SYS_QMAN_MEM_PHYS (0xf00000000ull + \ - CONFIG_SYS_QMAN_MEM_BASE) +#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE #define CONFIG_SYS_QMAN_MEM_SIZE 0x08000000 #define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x10000 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x10000 @@ -88,8 +87,12 @@ #define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000) +#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x01c00000) + #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000) +#define QDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x07380000) + #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x4000000000ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x4800000000ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x5000000000ULL @@ -197,10 +200,18 @@ struct sys_info { #define CONFIG_SYS_FSL_SEC_OFFSET 0x700000ull #define CONFIG_SYS_FSL_JR0_OFFSET 0x710000ull +#define FSL_SEC_JR0_OFFSET CONFIG_SYS_FSL_JR0_OFFSET +#define FSL_SEC_JR1_OFFSET 0x720000ull +#define FSL_SEC_JR2_OFFSET 0x730000ull +#define FSL_SEC_JR3_OFFSET 0x740000ull #define CONFIG_SYS_FSL_SEC_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET) #define CONFIG_SYS_FSL_JR0_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET) +#define FSL_SEC_JR0_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR0_OFFSET) +#define FSL_SEC_JR1_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR1_OFFSET) +#define FSL_SEC_JR2_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR2_OFFSET) +#define FSL_SEC_JR3_BASE_ADDR (CONFIG_SYS_IMMR + FSL_SEC_JR3_OFFSET) /* Device Configuration and Pin Control */ #define DCFG_DCSR_PORCR1 0x0 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h index 8ecff4d13f..a265106686 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h @@ -39,6 +39,7 @@ enum csu_cslx_ind { CSU_CSLX_ESDHC, CSU_CSLX_IFC = 45, CSU_CSLX_I2C1, + CSU_CSLX_USB_2, CSU_CSLX_I2C3 = 48, CSU_CSLX_I2C2, CSU_CSLX_DUART2 = 50, @@ -87,84 +88,4 @@ enum csu_cslx_ind { CSU_CSLX_DSCR = 121, }; -static struct csu_ns_dev ns_dev[] = { - {CSU_CSLX_PCIE2_IO, CSU_ALL_RW}, - {CSU_CSLX_PCIE1_IO, CSU_ALL_RW}, - {CSU_CSLX_MG2TPR_IP, CSU_ALL_RW}, - {CSU_CSLX_IFC_MEM, CSU_ALL_RW}, - {CSU_CSLX_OCRAM, CSU_ALL_RW}, - {CSU_CSLX_GIC, CSU_ALL_RW}, - {CSU_CSLX_PCIE1, CSU_ALL_RW}, - {CSU_CSLX_OCRAM2, CSU_ALL_RW}, - {CSU_CSLX_QSPI_MEM, CSU_ALL_RW}, - {CSU_CSLX_PCIE2, CSU_ALL_RW}, - {CSU_CSLX_SATA, CSU_ALL_RW}, - {CSU_CSLX_USB1, CSU_ALL_RW}, - {CSU_CSLX_QM_BM_SWPORTAL, CSU_ALL_RW}, - {CSU_CSLX_PCIE3, CSU_ALL_RW}, - {CSU_CSLX_PCIE3_IO, CSU_ALL_RW}, - {CSU_CSLX_USB3, CSU_ALL_RW}, - {CSU_CSLX_USB2, CSU_ALL_RW}, - {CSU_CSLX_PFE, CSU_ALL_RW}, - {CSU_CSLX_SERDES, CSU_ALL_RW}, - {CSU_CSLX_QDMA, CSU_ALL_RW}, - {CSU_CSLX_LPUART2, CSU_ALL_RW}, - {CSU_CSLX_LPUART1, CSU_ALL_RW}, - {CSU_CSLX_LPUART4, CSU_ALL_RW}, - {CSU_CSLX_LPUART3, CSU_ALL_RW}, - {CSU_CSLX_LPUART6, CSU_ALL_RW}, - {CSU_CSLX_LPUART5, CSU_ALL_RW}, - {CSU_CSLX_DSPI1, CSU_ALL_RW}, - {CSU_CSLX_QSPI, CSU_ALL_RW}, - {CSU_CSLX_ESDHC, CSU_ALL_RW}, - {CSU_CSLX_IFC, CSU_ALL_RW}, - {CSU_CSLX_I2C1, CSU_ALL_RW}, - {CSU_CSLX_I2C3, CSU_ALL_RW}, - {CSU_CSLX_I2C2, CSU_ALL_RW}, - {CSU_CSLX_DUART2, CSU_ALL_RW}, - {CSU_CSLX_DUART1, CSU_ALL_RW}, - {CSU_CSLX_WDT2, CSU_ALL_RW}, - {CSU_CSLX_WDT1, CSU_ALL_RW}, - {CSU_CSLX_EDMA, CSU_ALL_RW}, - {CSU_CSLX_SYS_CNT, CSU_ALL_RW}, - {CSU_CSLX_DMA_MUX2, CSU_ALL_RW}, - {CSU_CSLX_DMA_MUX1, CSU_ALL_RW}, - {CSU_CSLX_DDR, CSU_ALL_RW}, - {CSU_CSLX_QUICC, CSU_ALL_RW}, - {CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW}, - {CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW}, - {CSU_CSLX_SFP, CSU_ALL_RW}, - {CSU_CSLX_TMU, CSU_ALL_RW}, - {CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW}, - {CSU_CSLX_SCFG, CSU_ALL_RW}, - {CSU_CSLX_FM, CSU_ALL_RW}, - {CSU_CSLX_SEC5_5, CSU_ALL_RW}, - {CSU_CSLX_BM, CSU_ALL_RW}, - {CSU_CSLX_QM, CSU_ALL_RW}, - {CSU_CSLX_GPIO2, CSU_ALL_RW}, - {CSU_CSLX_GPIO1, CSU_ALL_RW}, - {CSU_CSLX_GPIO4, CSU_ALL_RW}, - {CSU_CSLX_GPIO3, CSU_ALL_RW}, - {CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW}, - {CSU_CSLX_CSU, CSU_ALL_RW}, - {CSU_CSLX_IIC4, CSU_ALL_RW}, - {CSU_CSLX_WDT4, CSU_ALL_RW}, - {CSU_CSLX_WDT3, CSU_ALL_RW}, - {CSU_CSLX_ESDHC2, CSU_ALL_RW}, - {CSU_CSLX_WDT5, CSU_ALL_RW}, - {CSU_CSLX_SAI2, CSU_ALL_RW}, - {CSU_CSLX_SAI1, CSU_ALL_RW}, - {CSU_CSLX_SAI4, CSU_ALL_RW}, - {CSU_CSLX_SAI3, CSU_ALL_RW}, - {CSU_CSLX_FTM2, CSU_ALL_RW}, - {CSU_CSLX_FTM1, CSU_ALL_RW}, - {CSU_CSLX_FTM4, CSU_ALL_RW}, - {CSU_CSLX_FTM3, CSU_ALL_RW}, - {CSU_CSLX_FTM6, CSU_ALL_RW}, - {CSU_CSLX_FTM5, CSU_ALL_RW}, - {CSU_CSLX_FTM8, CSU_ALL_RW}, - {CSU_CSLX_FTM7, CSU_ALL_RW}, - {CSU_CSLX_DSCR, CSU_ALL_RW}, -}; - #endif diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h index 61c6e533c6..1b02d484d9 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h @@ -50,6 +50,7 @@ #define FSL_QDMA_STREAM_ID 7 #define FSL_EDMA_STREAM_ID 8 #define FSL_ETR_STREAM_ID 9 +#define FSL_DEBUG_STREAM_ID 10 /* PCI - programmed in PEXn_LUT */ #define FSL_PEX_STREAM_ID_START 11 diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index de4b3cd34a..f7a698e72d 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -12,8 +12,6 @@ /* Basic CPU architecture */ #define CONFIG_ARCH_CPU_INIT -#define CONFIG_NR_DRAM_BANKS_MAX 2 - /* UART configuration */ #if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ (CONFIG_SYS_LPC32XX_UART == 7) diff --git a/arch/arm/include/asm/arch-ls102xa/ns_access.h b/arch/arm/include/asm/arch-ls102xa/ns_access.h index f414b736d0..b6daf32e56 100644 --- a/arch/arm/include/asm/arch-ls102xa/ns_access.h +++ b/arch/arm/include/asm/arch-ls102xa/ns_access.h @@ -91,88 +91,4 @@ enum csu_cslx_ind { CSU_CSLX_MAX, }; -static struct csu_ns_dev ns_dev[] = { - { CSU_CSLX_PCIE2_IO, CSU_ALL_RW }, - { CSU_CSLX_PCIE1_IO, CSU_ALL_RW }, - { CSU_CSLX_MG2TPR_IP, CSU_ALL_RW }, - { CSU_CSLX_IFC_MEM, CSU_ALL_RW }, - { CSU_CSLX_OCRAM, CSU_ALL_RW }, - { CSU_CSLX_GIC, CSU_ALL_RW }, - { CSU_CSLX_PCIE1, CSU_ALL_RW }, - { CSU_CSLX_OCRAM2, CSU_ALL_RW }, - { CSU_CSLX_QSPI_MEM, CSU_ALL_RW }, - { CSU_CSLX_PCIE2, CSU_ALL_RW }, - { CSU_CSLX_SATA, CSU_ALL_RW }, - { CSU_CSLX_USB3, CSU_ALL_RW }, - { CSU_CSLX_SERDES, CSU_ALL_RW }, - { CSU_CSLX_QDMA, CSU_ALL_RW }, - { CSU_CSLX_LPUART2, CSU_ALL_RW }, - { CSU_CSLX_LPUART1, CSU_ALL_RW }, - { CSU_CSLX_LPUART4, CSU_ALL_RW }, - { CSU_CSLX_LPUART3, CSU_ALL_RW }, - { CSU_CSLX_LPUART6, CSU_ALL_RW }, - { CSU_CSLX_LPUART5, CSU_ALL_RW }, - { CSU_CSLX_DSPI2, CSU_ALL_RW }, - { CSU_CSLX_DSPI1, CSU_ALL_RW }, - { CSU_CSLX_QSPI, CSU_ALL_RW }, - { CSU_CSLX_ESDHC, CSU_ALL_RW }, - { CSU_CSLX_2D_ACE, CSU_ALL_RW }, - { CSU_CSLX_IFC, CSU_ALL_RW }, - { CSU_CSLX_I2C1, CSU_ALL_RW }, - { CSU_CSLX_USB2, CSU_ALL_RW }, - { CSU_CSLX_I2C3, CSU_ALL_RW }, - { CSU_CSLX_I2C2, CSU_ALL_RW }, - { CSU_CSLX_DUART2, CSU_ALL_RW }, - { CSU_CSLX_DUART1, CSU_ALL_RW }, - { CSU_CSLX_WDT2, CSU_ALL_RW }, - { CSU_CSLX_WDT1, CSU_ALL_RW }, - { CSU_CSLX_EDMA, CSU_ALL_RW }, - { CSU_CSLX_SYS_CNT, CSU_ALL_RW }, - { CSU_CSLX_DMA_MUX2, CSU_ALL_RW }, - { CSU_CSLX_DMA_MUX1, CSU_ALL_RW }, - { CSU_CSLX_DDR, CSU_ALL_RW }, - { CSU_CSLX_QUICC, CSU_ALL_RW }, - { CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW }, - { CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW }, - { CSU_CSLX_SFP, CSU_ALL_RW }, - { CSU_CSLX_TMU, CSU_ALL_RW }, - { CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW }, - { CSU_CSLX_RESERVED0, CSU_ALL_RW }, - { CSU_CSLX_ETSEC1, CSU_ALL_RW }, - { CSU_CSLX_SEC5_5, CSU_ALL_RW }, - { CSU_CSLX_ETSEC3, CSU_ALL_RW }, - { CSU_CSLX_ETSEC2, CSU_ALL_RW }, - { CSU_CSLX_GPIO2, CSU_ALL_RW }, - { CSU_CSLX_GPIO1, CSU_ALL_RW }, - { CSU_CSLX_GPIO4, CSU_ALL_RW }, - { CSU_CSLX_GPIO3, CSU_ALL_RW }, - { CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW }, - { CSU_CSLX_CSU, CSU_ALL_RW }, - { CSU_CSLX_ASRC, CSU_ALL_RW }, - { CSU_CSLX_SPDIF, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN2, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN1, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN4, CSU_ALL_RW }, - { CSU_CSLX_FLEXCAN3, CSU_ALL_RW }, - { CSU_CSLX_SAI2, CSU_ALL_RW }, - { CSU_CSLX_SAI1, CSU_ALL_RW }, - { CSU_CSLX_SAI4, CSU_ALL_RW }, - { CSU_CSLX_SAI3, CSU_ALL_RW }, - { CSU_CSLX_FTM2, CSU_ALL_RW }, - { CSU_CSLX_FTM1, CSU_ALL_RW }, - { CSU_CSLX_FTM4, CSU_ALL_RW }, - { CSU_CSLX_FTM3, CSU_ALL_RW }, - { CSU_CSLX_FTM6, CSU_ALL_RW }, - { CSU_CSLX_FTM5, CSU_ALL_RW }, - { CSU_CSLX_FTM8, CSU_ALL_RW }, - { CSU_CSLX_FTM7, CSU_ALL_RW }, - { CSU_CSLX_COP_DCSR, CSU_ALL_RW }, - { CSU_CSLX_EPU, CSU_ALL_RW }, - { CSU_CSLX_GDI, CSU_ALL_RW }, - { CSU_CSLX_DDI, CSU_ALL_RW }, - { CSU_CSLX_RESERVED1, CSU_ALL_RW }, - { CSU_CSLX_USB3_PHY, CSU_ALL_RW }, - { CSU_CSLX_RESERVED2, CSU_ALL_RW }, -}; - #endif diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h b/arch/arm/include/asm/arch-rockchip/f_rockusb.h index 0b62771c21..9772321023 100644 --- a/arch/arm/include/asm/arch-rockchip/f_rockusb.h +++ b/arch/arm/include/asm/arch-rockchip/f_rockusb.h @@ -27,6 +27,7 @@ */ #define RKUSB_BUF_SIZE EP_BUFFER_SIZE * 2 +#define RKBLOCK_BUF_SIZE 4096 #define RKUSB_STATUS_IDLE 0 #define RKUSB_STATUS_CMD 1 @@ -62,6 +63,7 @@ K_FW_LOW_FORMAT = 0x1C, K_FW_SET_RESET_FLAG = 0x1E, K_FW_SPI_READ_10 = 0x21, K_FW_SPI_WRITE_10 = 0x22, +K_FW_LBA_ERASE_10 = 0x25, K_FW_SESSION = 0X30, K_FW_RESET = 0xff, @@ -120,6 +122,8 @@ struct f_rockusb { unsigned int lba; unsigned int dl_size; unsigned int dl_bytes; + unsigned int ul_size; + unsigned int ul_bytes; struct blk_desc *desc; int reboot_flag; void *buf; diff --git a/arch/arm/mach-bcmstb/include/mach/prior_stage.h b/arch/arm/mach-bcmstb/include/mach/prior_stage.h deleted file mode 100644 index 6c36c6810a..0000000000 --- a/arch/arm/mach-bcmstb/include/mach/prior_stage.h +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2018 Cisco Systems, Inc. - * - * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org> - */ - -#ifndef _BCMSTB_PRIOR_STAGE_H -#define _BCMSTB_PRIOR_STAGE_H - -#ifndef __ASSEMBLY__ - -#include <linux/types.h> - -struct bcmstb_boot_parameters { - u32 r0; - u32 r1; - u32 r2; - u32 r3; - u32 sp; - u32 lr; -}; - -extern struct bcmstb_boot_parameters bcmstb_boot_parameters; - -extern phys_addr_t prior_stage_fdt_address; - -#endif /* __ASSEMBLY__ */ - -#endif /* _BCMSTB_PRIOR_STAGE_H */ diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index f2b2de47d0..fcd903887b 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -38,7 +38,6 @@ /* Kirkwood has 2k of Security SRAM, use it for SP */ #define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 -#define CONFIG_NR_DRAM_BANKS_MAX 2 #define CONFIG_I2C_MVTWSI_BASE0 KW_TWSI_BASE #define MV_UART_CONSOLE_BASE KW_UART0_BASE @@ -75,7 +74,6 @@ */ #ifdef CONFIG_CMD_NET #define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_MII /* expose smi ove miiphy interface */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 9f51411e43..f165d10018 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -47,7 +47,6 @@ /* end of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR 0x00FF0000 -#define CONFIG_NR_DRAM_BANKS_MAX 2 #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE @@ -73,7 +72,6 @@ * Ethernet Driver configuration */ #ifdef CONFIG_CMD_NET -#define CONFIG_MII /* expose smi ove miiphy interface */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index bdca9bb905..076a019135 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -6,6 +6,8 @@ config ARCH_RMOBILE_BOARD_STRING config RCAR_GEN2 bool "Renesas RCar Gen2" + select PHY + select PHY_RCAR_GEN2 config R8A7740 bool "Renesas SoC R8A7740" diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index 1d35fea912..2d94083600 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -8,4 +8,6 @@ obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += pinctrl-apq8016.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += pinctrl-snapdragon.o +obj-y += misc.o obj-y += clock-snapdragon.o +obj-y += dram.o diff --git a/arch/arm/mach-snapdragon/dram.c b/arch/arm/mach-snapdragon/dram.c new file mode 100644 index 0000000000..79eb19992d --- /dev/null +++ b/arch/arm/mach-snapdragon/dram.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Onboard memory detection for Snapdragon boards + * + * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com> + * + */ + +#include <common.h> +#include <dm.h> +#include <smem.h> +#include <fdt_support.h> +#include <asm/arch/dram.h> + +#define SMEM_USABLE_RAM_PARTITION_TABLE 402 +#define RAM_PART_NAME_LENGTH 16 +#define RAM_NUM_PART_ENTRIES 32 +#define CATEGORY_SDRAM 0x0E +#define TYPE_SYSMEM 0x01 + +struct smem_ram_ptable_hdr { + u32 magic[2]; + u32 version; + u32 reserved; + u32 len; +} __attribute__ ((__packed__)); + +struct smem_ram_ptn { + char name[RAM_PART_NAME_LENGTH]; + u64 start; + u64 size; + u32 attr; + u32 category; + u32 domain; + u32 type; + u32 num_partitions; + u32 reserved[3]; +} __attribute__ ((__packed__)); + +struct smem_ram_ptable { + struct smem_ram_ptable_hdr hdr; + u32 reserved; /* Added for 8 bytes alignment of header */ + struct smem_ram_ptn parts[RAM_NUM_PART_ENTRIES]; +} __attribute__ ((__packed__)); + +#ifndef MEMORY_BANKS_MAX +#define MEMORY_BANKS_MAX 4 +#endif + +int msm_fixup_memory(void *blob) +{ + u64 bank_start[MEMORY_BANKS_MAX]; + u64 bank_size[MEMORY_BANKS_MAX]; + size_t size; + int i; + int count = 0; + struct udevice *smem; + int ret; + struct smem_ram_ptable *ram_ptable; + struct smem_ram_ptn *p; + + ret = uclass_get_device_by_name(UCLASS_SMEM, "smem", &smem); + if (ret < 0) { + printf("Failed to find SMEM node. Check device tree\n"); + return 0; + } + + ram_ptable = smem_get(smem, -1, SMEM_USABLE_RAM_PARTITION_TABLE, &size); + + if (!ram_ptable) { + printf("Failed to find SMEM partition.\n"); + return -ENODEV; + } + + /* Check validy of RAM */ + for (i = 0; i < RAM_NUM_PART_ENTRIES; i++) { + p = &ram_ptable->parts[i]; + if (p->category == CATEGORY_SDRAM && p->type == TYPE_SYSMEM) { + bank_start[count] = p->start; + bank_size[count] = p->size; + debug("Detected memory bank %u: start: 0x%llx size: 0x%llx\n", + count, p->start, p->size); + count++; + } + } + + if (!count) { + printf("Failed to detect any memory bank\n"); + return -ENODEV; + } + + ret = fdt_fixup_memory_banks(blob, bank_start, bank_size, count); + if (ret) + return ret; + + return 0; +} + diff --git a/arch/arm/mach-snapdragon/include/mach/dram.h b/arch/arm/mach-snapdragon/include/mach/dram.h new file mode 100644 index 0000000000..0a9eedda41 --- /dev/null +++ b/arch/arm/mach-snapdragon/include/mach/dram.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Snapdragon DRAM + * Copyright (C) 2018 Ramon Fried <ramon.fried@gmail.com> + */ + +#ifndef DRAM_H +#define DRAM_H + +int msm_fixup_memory(void *blob); + +#endif diff --git a/arch/arm/mach-snapdragon/include/mach/misc.h b/arch/arm/mach-snapdragon/include/mach/misc.h new file mode 100644 index 0000000000..c60e3e4724 --- /dev/null +++ b/arch/arm/mach-snapdragon/include/mach/misc.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Snapdragon DRAM + * Copyright (C) 2018 Ramon Fried <ramon.fried@gmail.com> + */ + +#ifndef MISC_H +#define MISC_H + +u32 msm_board_serial(void); +void msm_generate_mac_addr(u8 *mac); + +#endif diff --git a/arch/arm/mach-snapdragon/misc.c b/arch/arm/mach-snapdragon/misc.c new file mode 100644 index 0000000000..f6c87866c0 --- /dev/null +++ b/arch/arm/mach-snapdragon/misc.c @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Miscellaneous Snapdragon functionality + * + * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com> + * + */ + +#include <common.h> +#include <mmc.h> +#include <asm/arch/misc.h> + +/* UNSTUFF_BITS macro taken from Linux Kernel: drivers/mmc/core/sd.c */ +#define UNSTUFF_BITS(resp, start, size) \ + ({ \ + const int __size = size; \ + const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \ + const int __off = 3 - ((start) / 32); \ + const int __shft = (start) & 31; \ + u32 __res; \ + \ + __res = resp[__off] >> __shft; \ + if (__size + __shft > 32) \ + __res |= resp[__off - 1] << ((32 - __shft) % 32); \ + __res & __mask; \ + }) + +u32 msm_board_serial(void) +{ + struct mmc *mmc_dev; + + mmc_dev = find_mmc_device(0); + if (!mmc_dev) + return 0; + + return UNSTUFF_BITS(mmc_dev->cid, 16, 32); +} + +void msm_generate_mac_addr(u8 *mac) +{ + int i; + char sn[9]; + + snprintf(sn, 8, "%08x", msm_board_serial()); + + /* fill in the mac with serialno, use locally adminstrated pool */ + mac[0] = 0x02; + mac[1] = 00; + for (i = 3; i >= 0; i--) { + mac[i + 2] = simple_strtoul(&sn[2 * i], NULL, 16); + sn[2 * i] = 0; + } +} diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 5c1df2cf1f..06f8527aa4 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -11,6 +11,16 @@ config TARGET_SOCFPGA_ARRIA10 bool select ALTERA_SDRAM select SPL_BOARD_INIT if SPL + select CLK + select SPL_CLK if SPL + select DM_I2C + select DM_RESET + select SPL_DM_RESET if SPL + select REGMAP + select SPL_REGMAP if SPL + select SYSCON + select SPL_SYSCON if SPL + select ETH_DESIGNWARE_SOCFPGA config TARGET_SOCFPGA_CYCLONE5 bool diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c index 59ede59b59..9f3c643df8 100644 --- a/arch/arm/mach-socfpga/clock_manager.c +++ b/arch/arm/mach-socfpga/clock_manager.c @@ -42,9 +42,11 @@ int cm_wait_for_fsm(void) int set_cpu_clk_info(void) { +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) /* Calculate the clock frequencies required for drivers */ cm_get_l4_sp_clk_hz(); cm_get_mmc_controller_clk_hz(); +#endif gd->bd->bi_arm_freq = cm_get_mpu_clk_hz() / 1000000; gd->bd->bi_dsp_freq = 0; diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c index defa2f6261..1b4052cd37 100644 --- a/arch/arm/mach-socfpga/clock_manager_arria10.c +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c @@ -7,6 +7,8 @@ #include <fdtdec.h> #include <asm/io.h> #include <dm.h> +#include <clk.h> +#include <dm/device-internal.h> #include <asm/arch/clock_manager.h> static const struct socfpga_clock_manager *clock_manager_base = @@ -15,10 +17,6 @@ static const struct socfpga_clock_manager *clock_manager_base = static u32 eosc1_hz; static u32 cb_intosc_hz; static u32 f2s_free_hz; -static u32 cm_l4_main_clk_hz; -static u32 cm_l4_sp_clk_hz; -static u32 cm_l4_mp_clk_hz; -static u32 cm_l4_sys_free_clk_hz; struct mainpll_cfg { u32 vco0_psrc; @@ -141,9 +139,9 @@ struct strtopu32 { }; const struct strtopu32 dt_to_val[] = { - { "/clocks/altera_arria10_hps_eosc1", &eosc1_hz}, - { "/clocks/altera_arria10_hps_cb_intosc_ls", &cb_intosc_hz}, - { "/clocks/altera_arria10_hps_f2h_free", &f2s_free_hz}, + { "altera_arria10_hps_eosc1", &eosc1_hz }, + { "altera_arria10_hps_cb_intosc_ls", &cb_intosc_hz }, + { "altera_arria10_hps_f2h_free", &f2s_free_hz }, }; static int of_to_struct(const void *blob, int node, const struct strtou32 *cfg_tab, @@ -163,28 +161,39 @@ static int of_to_struct(const void *blob, int node, const struct strtou32 *cfg_t return 0; } -static void of_get_input_clks(const void *blob) +static int of_get_input_clks(const void *blob) { - int node, i; + struct udevice *dev; + struct clk clk; + int i, ret; for (i = 0; i < ARRAY_SIZE(dt_to_val); i++) { - node = fdt_path_offset(blob, dt_to_val[i].str); + memset(&clk, 0, sizeof(clk)); - if (node < 0) - continue; + ret = uclass_get_device_by_name(UCLASS_CLK, dt_to_val[i].str, + &dev); + if (ret) + return ret; - fdtdec_get_int_array(blob, node, "clock-frequency", - dt_to_val[i].p, 1); + ret = clk_request(dev, &clk); + if (ret) + return ret; + + *dt_to_val[i].p = clk_get_rate(&clk); } + + return 0; } static int of_get_clk_cfg(const void *blob, struct mainpll_cfg *main_cfg, struct perpll_cfg *per_cfg) { - int node, child, len; + int ret, node, child, len; const char *node_name; - of_get_input_clks(blob); + ret = of_get_input_clks(blob); + if (ret) + return ret; node = fdtdec_next_compatible(blob, 0, COMPAT_ALTERA_SOCFPGA_CLK_INIT); @@ -894,50 +903,6 @@ void cm_use_intosc(void) CLKMGR_CLKMGR_CTL_BOOTCLK_INTOSC_SET_MSK); } -unsigned int cm_get_noc_clk_hz(void) -{ - unsigned int clk_src, divisor, nocclk, src_hz; - - nocclk = readl(&clock_manager_base->main_pll.nocclk); - clk_src = (nocclk >> CLKMGR_MAINPLL_NOCCLK_SRC_LSB) & - CLKMGR_MAINPLL_NOCCLK_SRC_MSK; - - divisor = 1 + (nocclk & CLKMGR_MAINPLL_NOCDIV_MSK); - - if (clk_src == CLKMGR_PERPLLGRP_SRC_MAIN) { - src_hz = cm_get_main_vco_clk_hz(); - src_hz /= 1 + - (readl(SOCFPGA_CLKMGR_ADDRESS + CLKMGR_MAINPLL_NOC_CLK_OFFSET) & - CLKMGR_MAINPLL_NOCCLK_CNT_MSK); - } else if (clk_src == CLKMGR_PERPLLGRP_SRC_PERI) { - src_hz = cm_get_per_vco_clk_hz(); - src_hz /= 1 + - ((readl(SOCFPGA_CLKMGR_ADDRESS + - CLKMGR_MAINPLL_NOC_CLK_OFFSET) >> - CLKMGR_MAINPLL_NOCCLK_PERICNT_LSB) & - CLKMGR_MAINPLL_NOCCLK_CNT_MSK); - } else if (clk_src == CLKMGR_PERPLLGRP_SRC_OSC1) { - src_hz = eosc1_hz; - } else if (clk_src == CLKMGR_PERPLLGRP_SRC_INTOSC) { - src_hz = cb_intosc_hz; - } else if (clk_src == CLKMGR_PERPLLGRP_SRC_FPGA) { - src_hz = f2s_free_hz; - } else { - src_hz = 0; - } - - return src_hz / divisor; -} - -unsigned int cm_get_l4_noc_hz(unsigned int nocdivshift) -{ - unsigned int divisor2 = 1 << - ((readl(&clock_manager_base->main_pll.nocdiv) >> - nocdivshift) & CLKMGR_MAINPLL_NOCDIV_MSK); - - return cm_get_noc_clk_hz() / divisor2; -} - int cm_basic_init(const void *blob) { struct mainpll_cfg main_cfg; @@ -952,213 +917,74 @@ int cm_basic_init(const void *blob) if (rval) return rval; - rval = cm_full_cfg(&main_cfg, &per_cfg); - - cm_l4_main_clk_hz = - cm_get_l4_noc_hz(CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_LSB); - - cm_l4_mp_clk_hz = cm_get_l4_noc_hz(CLKMGR_MAINPLL_NOCDIV_L4MPCLK_LSB); - - cm_l4_sp_clk_hz = cm_get_l4_sp_clk_hz(); - - cm_l4_sys_free_clk_hz = cm_get_noc_clk_hz() / 4; - - return rval; + return cm_full_cfg(&main_cfg, &per_cfg); } -unsigned long cm_get_mpu_clk_hz(void) +static u32 cm_get_rate_dm(char *name) { - u32 reg, clk_hz; - u32 clk_src, mainmpuclk_reg; - - mainmpuclk_reg = readl(&clock_manager_base->main_pll.mpuclk); - - clk_src = (mainmpuclk_reg >> CLKMGR_MAINPLL_MPUCLK_SRC_LSB) & - CLKMGR_MAINPLL_MPUCLK_SRC_MSK; - - reg = readl(&clock_manager_base->altera.mpuclk); - /* Check MPU clock source: main, periph, osc1, intosc or f2s? */ - switch (clk_src) { - case CLKMGR_MAINPLL_MPUCLK_SRC_MAIN: - clk_hz = cm_get_main_vco_clk_hz(); - clk_hz /= (reg & CLKMGR_MAINPLL_MPUCLK_CNT_MSK) + 1; - break; - case CLKMGR_MAINPLL_MPUCLK_SRC_PERI: - clk_hz = cm_get_per_vco_clk_hz(); - clk_hz /= (((reg >> CLKMGR_MAINPLL_MPUCLK_PERICNT_LSB) & - CLKMGR_MAINPLL_MPUCLK_CNT_MSK) + 1); - break; - case CLKMGR_MAINPLL_MPUCLK_SRC_OSC1: - clk_hz = eosc1_hz; - break; - case CLKMGR_MAINPLL_MPUCLK_SRC_INTOSC: - clk_hz = cb_intosc_hz; - break; - case CLKMGR_MAINPLL_MPUCLK_SRC_FPGA: - clk_hz = f2s_free_hz; - break; - default: - printf("cm_get_mpu_clk_hz invalid clk_src %d\n", clk_src); + struct uclass *uc; + struct udevice *dev = NULL; + struct clk clk = { 0 }; + ulong rate; + int ret; + + /* Device addresses start at 1 */ + ret = uclass_get(UCLASS_CLK, &uc); + if (ret) return 0; - } - - clk_hz /= (mainmpuclk_reg & CLKMGR_MAINPLL_MPUCLK_CNT_MSK) + 1; - return clk_hz; -} - -unsigned int cm_get_per_vco_clk_hz(void) -{ - u32 src_hz = 0; - u32 clk_src = 0; - u32 numer = 0; - u32 denom = 0; - u32 vco = 0; - - clk_src = readl(&clock_manager_base->per_pll.vco0); - - clk_src = (clk_src >> CLKMGR_PERPLL_VCO0_PSRC_LSB) & - CLKMGR_PERPLL_VCO0_PSRC_MSK; - - if (clk_src == CLKMGR_PERPLL_VCO0_PSRC_EOSC) { - src_hz = eosc1_hz; - } else if (clk_src == CLKMGR_PERPLL_VCO0_PSRC_E_INTOSC) { - src_hz = cb_intosc_hz; - } else if (clk_src == CLKMGR_PERPLL_VCO0_PSRC_F2S) { - src_hz = f2s_free_hz; - } else if (clk_src == CLKMGR_PERPLL_VCO0_PSRC_MAIN) { - src_hz = cm_get_main_vco_clk_hz(); - src_hz /= (readl(&clock_manager_base->main_pll.cntr15clk) & - CLKMGR_MAINPLL_CNTRCLK_MSK) + 1; - } else { - printf("cm_get_per_vco_clk_hz invalid clk_src %d\n", clk_src); + ret = uclass_get_device_by_name(UCLASS_CLK, name, &dev); + if (ret) return 0; - } - - vco = readl(&clock_manager_base->per_pll.vco1); - - numer = vco & CLKMGR_PERPLL_VCO1_NUMER_MSK; - - denom = (vco >> CLKMGR_PERPLL_VCO1_DENOM_LSB) & - CLKMGR_PERPLL_VCO1_DENOM_MSK; - - vco = src_hz; - vco /= 1 + denom; - vco *= 1 + numer; - - return vco; -} -unsigned int cm_get_main_vco_clk_hz(void) -{ - u32 src_hz, numer, denom, vco; - - u32 clk_src = readl(&clock_manager_base->main_pll.vco0); - - clk_src = (clk_src >> CLKMGR_MAINPLL_VCO0_PSRC_LSB) & - CLKMGR_MAINPLL_VCO0_PSRC_MSK; - - if (clk_src == CLKMGR_MAINPLL_VCO0_PSRC_EOSC) { - src_hz = eosc1_hz; - } else if (clk_src == CLKMGR_MAINPLL_VCO0_PSRC_E_INTOSC) { - src_hz = cb_intosc_hz; - } else if (clk_src == CLKMGR_MAINPLL_VCO0_PSRC_F2S) { - src_hz = f2s_free_hz; - } else { - printf("cm_get_main_vco_clk_hz invalid clk_src %d\n", clk_src); + ret = device_probe(dev); + if (ret) return 0; - } - - vco = readl(&clock_manager_base->main_pll.vco1); - - numer = vco & CLKMGR_MAINPLL_VCO1_NUMER_MSK; - denom = (vco >> CLKMGR_MAINPLL_VCO1_DENOM_LSB) & - CLKMGR_MAINPLL_VCO1_DENOM_MSK; + ret = clk_request(dev, &clk); + if (ret) + return 0; - vco = src_hz; - vco /= 1 + denom; - vco *= 1 + numer; + rate = clk_get_rate(&clk); - return vco; -} + clk_free(&clk); -unsigned int cm_get_l4_sp_clk_hz(void) -{ - return cm_get_l4_noc_hz(CLKMGR_MAINPLL_NOCDIV_L4SPCLK_LSB); + return rate; } -unsigned int cm_get_mmc_controller_clk_hz(void) +static u32 cm_get_rate_dm_khz(char *name) { - u32 clk_hz = 0; - u32 clk_input = 0; - - clk_input = readl(&clock_manager_base->per_pll.cntr6clk); - clk_input = (clk_input >> CLKMGR_PERPLL_CNTR6CLK_SRC_LSB) & - CLKMGR_PERPLLGRP_SRC_MSK; - - switch (clk_input) { - case CLKMGR_PERPLLGRP_SRC_MAIN: - clk_hz = cm_get_main_vco_clk_hz(); - clk_hz /= 1 + (readl(&clock_manager_base->main_pll.cntr6clk) & - CLKMGR_MAINPLL_CNTRCLK_MSK); - break; - - case CLKMGR_PERPLLGRP_SRC_PERI: - clk_hz = cm_get_per_vco_clk_hz(); - clk_hz /= 1 + (readl(&clock_manager_base->per_pll.cntr6clk) & - CLKMGR_PERPLL_CNTRCLK_MSK); - break; - - case CLKMGR_PERPLLGRP_SRC_OSC1: - clk_hz = eosc1_hz; - break; - - case CLKMGR_PERPLLGRP_SRC_INTOSC: - clk_hz = cb_intosc_hz; - break; - - case CLKMGR_PERPLLGRP_SRC_FPGA: - clk_hz = f2s_free_hz; - break; - } - - return clk_hz / 4; + return cm_get_rate_dm(name) / 1000; } -unsigned int cm_get_spi_controller_clk_hz(void) +unsigned long cm_get_mpu_clk_hz(void) { - return cm_get_l4_noc_hz(CLKMGR_MAINPLL_NOCDIV_L4MPCLK_LSB); + return cm_get_rate_dm("main_mpu_base_clk"); } unsigned int cm_get_qspi_controller_clk_hz(void) { - return cm_get_l4_noc_hz(CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_LSB); + return cm_get_rate_dm("qspi_clk"); } -/* Override weak dw_spi_get_clk implementation in designware_spi.c driver */ -int dw_spi_get_clk(struct udevice *bus, ulong *rate) +unsigned int cm_get_l4_sp_clk_hz(void) { - *rate = cm_get_spi_controller_clk_hz(); - - return 0; + return cm_get_rate_dm("l4_sp_clk"); } void cm_print_clock_quick_summary(void) { - printf("MPU %10ld kHz\n", cm_get_mpu_clk_hz() / 1000); - printf("MMC %8d kHz\n", cm_get_mmc_controller_clk_hz() / 1000); - printf("QSPI %8d kHz\n", cm_get_qspi_controller_clk_hz() / 1000); - printf("SPI %8d kHz\n", cm_get_spi_controller_clk_hz() / 1000); - printf("EOSC1 %8d kHz\n", eosc1_hz / 1000); - printf("cb_intosc %8d kHz\n", cb_intosc_hz / 1000); - printf("f2s_free %8d kHz\n", f2s_free_hz / 1000); - printf("Main VCO %8d kHz\n", cm_get_main_vco_clk_hz() / 1000); - printf("NOC %8d kHz\n", cm_get_noc_clk_hz() / 1000); - printf("L4 Main %8d kHz\n", - cm_get_l4_noc_hz(CLKMGR_MAINPLL_NOCDIV_L4MAINCLK_LSB) / 1000); - printf("L4 MP %8d kHz\n", - cm_get_l4_noc_hz(CLKMGR_MAINPLL_NOCDIV_L4MPCLK_LSB) / 1000); - printf("L4 SP %8d kHz\n", cm_get_l4_sp_clk_hz() / 1000); - printf("L4 sys free %8d kHz\n", cm_l4_sys_free_clk_hz / 1000); + printf("MPU %10d kHz\n", cm_get_rate_dm_khz("main_mpu_base_clk")); + printf("MMC %8d kHz\n", cm_get_rate_dm_khz("sdmmc_clk")); + printf("QSPI %8d kHz\n", cm_get_rate_dm_khz("qspi_clk")); + printf("SPI %8d kHz\n", cm_get_rate_dm_khz("spi_m_clk")); + printf("EOSC1 %8d kHz\n", cm_get_rate_dm_khz("osc1")); + printf("cb_intosc %8d kHz\n", cm_get_rate_dm_khz("cb_intosc_ls_clk")); + printf("f2s_free %8d kHz\n", cm_get_rate_dm_khz("f2s_free_clk")); + printf("Main VCO %8d kHz\n", cm_get_rate_dm_khz("main_pll@40")); + printf("NOC %8d kHz\n", cm_get_rate_dm_khz("main_noc_base_clk")); + printf("L4 Main %8d kHz\n", cm_get_rate_dm_khz("l4_main_clk")); + printf("L4 MP %8d kHz\n", cm_get_rate_dm_khz("l4_mp_clk")); + printf("L4 SP %8d kHz\n", cm_get_rate_dm_khz("l4_sp_clk")); + printf("L4 sys free %8d kHz\n", cm_get_rate_dm_khz("l4_sys_free_clk")); } diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h index cb2306e5bc..b3c8853aa3 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h @@ -90,18 +90,12 @@ struct socfpga_clock_manager { }; void cm_use_intosc(void); -unsigned int cm_get_noc_clk_hz(void); -unsigned int cm_get_l4_noc_hz(unsigned int nocdivshift); int cm_basic_init(const void *blob); unsigned int cm_get_l4_sp_clk_hz(void); -unsigned int cm_get_main_vco_clk_hz(void); -unsigned int cm_get_per_vco_clk_hz(void); unsigned long cm_get_mpu_clk_hz(void); unsigned int cm_get_qspi_controller_clk_hz(void); -unsigned int cm_get_mmc_controller_clk_hz(void); -unsigned int cm_get_spi_controller_clk_hz(void); #endif /* __ASSEMBLER__ */ diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h index 7fe77ac8d8..e7e08b72d2 100644 --- a/arch/arm/mach-socfpga/include/mach/misc.h +++ b/arch/arm/mach-socfpga/include/mach/misc.h @@ -21,10 +21,8 @@ void socfpga_fpga_add(void); static inline void socfpga_fpga_add(void) {} #endif -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -unsigned int dedicated_uart_com_port(const void *blob); -unsigned int shared_uart_com_port(const void *blob); -unsigned int uart_com_port(const void *blob); +#ifdef CONFIG_TARGET_SOCFPGA_GEN5 +void socfpga_sdram_remap_zero(void); #endif void do_bridge_reset(int enable); diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h index 522f714d76..6623ebee65 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h @@ -10,12 +10,8 @@ void socfpga_watchdog_disable(void); void socfpga_reset_deassert_noc_ddr_scheduler(void); -int socfpga_is_wdt_in_reset(void); -void socfpga_emac_manage_reset(ulong emacbase, u32 state); int socfpga_reset_deassert_bridges_handoff(void); -void socfpga_reset_assert_fpga_connected_peripherals(void); void socfpga_reset_deassert_osc1wd0(void); -void socfpga_reset_uart(int assert); int socfpga_bridges_reset(void); struct socfpga_reset_manager { diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h index 813dff2153..297f9e1999 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h @@ -146,9 +146,9 @@ struct socfpga_system_manager { #define SYSMGR_FPGAINTF_SDMMC BIT(8) #define SYSMGR_FPGAINTF_SPIM0 BIT(16) #define SYSMGR_FPGAINTF_SPIM1 BIT(24) -#define SYSMGR_FPGAINTF_EMAC0 (0x11 << 0) -#define SYSMGR_FPGAINTF_EMAC1 (0x11 << 8) -#define SYSMGR_FPGAINTF_EMAC2 (0x11 << 16) +#define SYSMGR_FPGAINTF_EMAC0 BIT(0) +#define SYSMGR_FPGAINTF_EMAC1 BIT(8) +#define SYSMGR_FPGAINTF_EMAC2 BIT(16) #define SYSMGR_SDMMC_SMPLSEL_SHIFT 4 #define SYSMGR_SDMMC_DRVSEL_SHIFT 0 diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index 80bf2f036f..284e076ad6 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -38,48 +38,6 @@ static const struct socfpga_noc_fw_ocram *noc_fw_ocram_base = static struct socfpga_system_manager *sysmgr_regs = (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; -/* - * DesignWare Ethernet initialization - */ -#ifdef CONFIG_ETH_DESIGNWARE -static void arria10_dwmac_reset(const u8 of_reset_id, const u8 phymode) -{ - u32 reset; - - if (of_reset_id == EMAC0_RESET) { - reset = SOCFPGA_RESET(EMAC0); - } else if (of_reset_id == EMAC1_RESET) { - reset = SOCFPGA_RESET(EMAC1); - } else if (of_reset_id == EMAC2_RESET) { - reset = SOCFPGA_RESET(EMAC2); - } else { - printf("GMAC: Invalid reset ID (%i)!\n", of_reset_id); - return; - } - - clrsetbits_le32(&sysmgr_regs->emac[of_reset_id - EMAC0_RESET], - SYSMGR_EMACGRP_CTRL_PHYSEL_MASK, - phymode); - - /* Release the EMAC controller from reset */ - socfpga_per_reset(reset, 0); -} - -static int socfpga_eth_reset(void) -{ - /* Put all GMACs into RESET state. */ - socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1); - socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1); - socfpga_per_reset(SOCFPGA_RESET(EMAC2), 1); - return socfpga_eth_reset_common(arria10_dwmac_reset); -}; -#else -static int socfpga_eth_reset(void) -{ - return 0; -}; -#endif - #if defined(CONFIG_SPL_BUILD) /* + * This function initializes security policies to be consistent across @@ -128,133 +86,6 @@ int arch_early_init_r(void) #endif /* - * This function looking the 1st encounter UART peripheral, - * and then return its offset of the dedicated/shared IO pin - * mux. offset value (zero and above). - */ -static int find_peripheral_uart(const void *blob, - int child, const char *node_name) -{ - int len; - fdt_addr_t base_addr = 0; - fdt_size_t size; - const u32 *cell; - u32 value, offset = 0; - - base_addr = fdtdec_get_addr_size(blob, child, "reg", &size); - if (base_addr != FDT_ADDR_T_NONE) { - cell = fdt_getprop(blob, child, "pinctrl-single,pins", - &len); - if (cell != NULL) { - for (; len > 0; len -= (2 * sizeof(u32))) { - offset = fdt32_to_cpu(*cell++); - value = fdt32_to_cpu(*cell++); - /* Found UART peripheral. */ - if (value == PINMUX_UART) - return offset; - } - } - } - return -EINVAL; -} - -/* - * This function looks up the 1st encounter UART peripheral, - * and then return its offset of the dedicated/shared IO pin - * mux. UART peripheral is found if the offset is not in negative - * value. - */ -static int is_peripheral_uart_true(const void *blob, - int node, const char *child_name) -{ - int child, len; - const char *node_name; - - child = fdt_first_subnode(blob, node); - - if (child < 0) - return -EINVAL; - - node_name = fdt_get_name(blob, child, &len); - - while (node_name) { - if (!strcmp(child_name, node_name)) - return find_peripheral_uart(blob, child, node_name); - - child = fdt_next_subnode(blob, child); - if (child < 0) - break; - - node_name = fdt_get_name(blob, child, &len); - } - - return -1; -} - -/* - * This function looking the 1st encounter UART dedicated IO peripheral, - * and then return based address of the 1st encounter UART dedicated - * IO peripheral. - */ -unsigned int dedicated_uart_com_port(const void *blob) -{ - int node; - - node = fdtdec_next_compatible(blob, 0, - COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE); - if (node < 0) - return 0; - - if (is_peripheral_uart_true(blob, node, "dedicated") >= 0) - return SOCFPGA_UART1_ADDRESS; - - return 0; -} - -/* - * This function looking the 1st encounter UART shared IO peripheral, and then - * return based address of the 1st encounter UART shared IO peripheral. - */ -unsigned int shared_uart_com_port(const void *blob) -{ - int node, ret; - - node = fdtdec_next_compatible(blob, 0, - COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE); - if (node < 0) - return 0; - - ret = is_peripheral_uart_true(blob, node, "shared"); - - if (ret == PINMUX_UART0_TX_SHARED_IO_OFFSET_Q1_3 || - ret == PINMUX_UART0_TX_SHARED_IO_OFFSET_Q2_11 || - ret == PINMUX_UART0_TX_SHARED_IO_OFFSET_Q3_3) - return SOCFPGA_UART0_ADDRESS; - else if (ret == PINMUX_UART1_TX_SHARED_IO_OFFSET_Q1_7 || - ret == PINMUX_UART1_TX_SHARED_IO_OFFSET_Q3_7 || - ret == PINMUX_UART1_TX_SHARED_IO_OFFSET_Q4_3) - return SOCFPGA_UART1_ADDRESS; - - return 0; -} - -/* - * This function looking the 1st encounter UART peripheral, and then return - * base address of the 1st encounter UART peripheral. - */ -unsigned int uart_com_port(const void *blob) -{ - unsigned int ret; - - ret = dedicated_uart_com_port(blob); - - if (ret) - return ret; - - return shared_uart_com_port(blob); -} - -/* * Print CPU information */ #if defined(CONFIG_DISPLAY_CPUINFO) @@ -270,13 +101,6 @@ int print_cpuinfo(void) } #endif -#ifdef CONFIG_ARCH_MISC_INIT -int arch_misc_init(void) -{ - return socfpga_eth_reset(); -} -#endif - void do_bridge_reset(int enable) { if (enable) diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 848551c73f..429c3d6cd5 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -175,6 +175,22 @@ static void socfpga_nic301_slave_ns(void) writel(0x1, &nic301_regs->sdrdata); } +void socfpga_sdram_remap_zero(void) +{ + socfpga_nic301_slave_ns(); + + /* + * Private components security: + * U-Boot : configure private timer, global timer and cpu component + * access as non secure for kernel stage (as required by Linux) + */ + setbits_le32(&scu_regs->sacr, 0xfff); + + /* Configure the L2 controller to make SDRAM start at 0 */ + writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ + writel(0x1, &pl310->pl310_addr_filter_start); +} + static u32 iswgrp_handoff[8]; int arch_early_init_r(void) @@ -195,18 +211,7 @@ int arch_early_init_r(void) socfpga_bridges_reset(1); - socfpga_nic301_slave_ns(); - - /* - * Private components security: - * U-Boot : configure private timer, global timer and cpu component - * access as non secure for kernel stage (as required by Linux) - */ - setbits_le32(&scu_regs->sacr, 0xfff); - - /* Configure the L2 controller to make SDRAM start at 0 */ - writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ - writel(0x1, &pl310->pl310_addr_filter_start); + socfpga_sdram_remap_zero(); /* Add device descriptor to FPGA device table */ socfpga_fpga_add(); diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c index b4434f2ded..471a3045af 100644 --- a/arch/arm/mach-socfpga/reset_manager_arria10.c +++ b/arch/arm/mach-socfpga/reset_manager_arria10.c @@ -20,71 +20,6 @@ static const struct socfpga_reset_manager *reset_manager_base = static const struct socfpga_system_manager *sysmgr_regs = (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; -#define ECC_MASK (ALT_RSTMGR_PER0MODRST_EMACECC0_SET_MSK | \ - ALT_RSTMGR_PER0MODRST_EMACECC1_SET_MSK | \ - ALT_RSTMGR_PER0MODRST_EMACECC2_SET_MSK | \ - ALT_RSTMGR_PER0MODRST_NANDECC_SET_MSK | \ - ALT_RSTMGR_PER0MODRST_QSPIECC_SET_MSK | \ - ALT_RSTMGR_PER0MODRST_SDMMCECC_SET_MSK) - -void socfpga_reset_uart(int assert) -{ - unsigned int com_port; - - com_port = uart_com_port(gd->fdt_blob); - - if (com_port == SOCFPGA_UART1_ADDRESS) - socfpga_per_reset(SOCFPGA_RESET(UART1), assert); - else if (com_port == SOCFPGA_UART0_ADDRESS) - socfpga_per_reset(SOCFPGA_RESET(UART0), assert); -} - -static const u32 per0fpgamasks[] = { - ALT_RSTMGR_PER0MODRST_EMACECC0_SET_MSK | - ALT_RSTMGR_PER0MODRST_EMAC0_SET_MSK, - ALT_RSTMGR_PER0MODRST_EMACECC1_SET_MSK | - ALT_RSTMGR_PER0MODRST_EMAC1_SET_MSK, - ALT_RSTMGR_PER0MODRST_EMACECC2_SET_MSK | - ALT_RSTMGR_PER0MODRST_EMAC2_SET_MSK, - 0, /* i2c0 per1mod */ - 0, /* i2c1 per1mod */ - 0, /* i2c0_emac */ - 0, /* i2c1_emac */ - 0, /* i2c2_emac */ - ALT_RSTMGR_PER0MODRST_NANDECC_SET_MSK | - ALT_RSTMGR_PER0MODRST_NAND_SET_MSK, - ALT_RSTMGR_PER0MODRST_QSPIECC_SET_MSK | - ALT_RSTMGR_PER0MODRST_QSPI_SET_MSK, - ALT_RSTMGR_PER0MODRST_SDMMCECC_SET_MSK | - ALT_RSTMGR_PER0MODRST_SDMMC_SET_MSK, - ALT_RSTMGR_PER0MODRST_SPIM0_SET_MSK, - ALT_RSTMGR_PER0MODRST_SPIM1_SET_MSK, - ALT_RSTMGR_PER0MODRST_SPIS0_SET_MSK, - ALT_RSTMGR_PER0MODRST_SPIS1_SET_MSK, - 0, /* uart0 per1mod */ - 0, /* uart1 per1mod */ -}; - -static const u32 per1fpgamasks[] = { - 0, /* emac0 per0mod */ - 0, /* emac1 per0mod */ - 0, /* emac2 per0mod */ - ALT_RSTMGR_PER1MODRST_I2C0_SET_MSK, - ALT_RSTMGR_PER1MODRST_I2C1_SET_MSK, - ALT_RSTMGR_PER1MODRST_I2C2_SET_MSK, /* i2c0_emac */ - ALT_RSTMGR_PER1MODRST_I2C3_SET_MSK, /* i2c1_emac */ - ALT_RSTMGR_PER1MODRST_I2C4_SET_MSK, /* i2c2_emac */ - 0, /* nand per0mod */ - 0, /* qspi per0mod */ - 0, /* sdmmc per0mod */ - 0, /* spim0 per0mod */ - 0, /* spim1 per0mod */ - 0, /* spis0 per0mod */ - 0, /* spis1 per0mod */ - ALT_RSTMGR_PER1MODRST_UART0_SET_MSK, - ALT_RSTMGR_PER1MODRST_UART1_SET_MSK, -}; - struct bridge_cfg { int compat_id; u32 mask_noc; @@ -139,56 +74,6 @@ void socfpga_reset_deassert_noc_ddr_scheduler(void) ALT_RSTMGR_BRGMODRST_DDRSCH_SET_MSK); } -/* Check whether Watchdog in reset state? */ -int socfpga_is_wdt_in_reset(void) -{ - u32 val; - - val = readl(&reset_manager_base->per1modrst); - val &= ALT_RSTMGR_PER1MODRST_WD0_SET_MSK; - - /* return 0x1 if watchdog in reset */ - return val; -} - -/* emacbase: base address of emac to enable/disable reset - * state: 0 - disable reset, !0 - enable reset - */ -void socfpga_emac_manage_reset(ulong emacbase, u32 state) -{ - ulong eccmask; - ulong emacmask; - - switch (emacbase) { - case SOCFPGA_EMAC0_ADDRESS: - eccmask = ALT_RSTMGR_PER0MODRST_EMACECC0_SET_MSK; - emacmask = ALT_RSTMGR_PER0MODRST_EMAC0_SET_MSK; - break; - case SOCFPGA_EMAC1_ADDRESS: - eccmask = ALT_RSTMGR_PER0MODRST_EMACECC1_SET_MSK; - emacmask = ALT_RSTMGR_PER0MODRST_EMAC1_SET_MSK; - break; - case SOCFPGA_EMAC2_ADDRESS: - eccmask = ALT_RSTMGR_PER0MODRST_EMACECC2_SET_MSK; - emacmask = ALT_RSTMGR_PER0MODRST_EMAC2_SET_MSK; - break; - default: - pr_err("emac base address unexpected! %lx", emacbase); - hang(); - break; - } - - if (state) { - /* Enable ECC OCP first */ - setbits_le32(&reset_manager_base->per0modrst, eccmask); - setbits_le32(&reset_manager_base->per0modrst, emacmask); - } else { - /* Disable ECC OCP first */ - clrbits_le32(&reset_manager_base->per0modrst, emacmask); - clrbits_le32(&reset_manager_base->per0modrst, eccmask); - } -} - static int get_bridge_init_val(const void *blob, int compat_id) { int node; @@ -225,26 +110,6 @@ int socfpga_reset_deassert_bridges_handoff(void) false, 1000, false); } -void socfpga_reset_assert_fpga_connected_peripherals(void) -{ - u32 mask0 = 0; - u32 mask1 = 0; - u32 fpga_pinux_addr = SOCFPGA_PINMUX_FPGA_INTERFACE_ADDRESS; - int i; - - for (i = 0; i < ARRAY_SIZE(per1fpgamasks); i++) { - if (readl(fpga_pinux_addr)) { - mask0 |= per0fpgamasks[i]; - mask1 |= per1fpgamasks[i]; - } - fpga_pinux_addr += sizeof(u32); - } - - setbits_le32(&reset_manager_base->per0modrst, mask0 & ECC_MASK); - setbits_le32(&reset_manager_base->per1modrst, mask1); - setbits_le32(&reset_manager_base->per0modrst, mask0); -} - /* Release L4 OSC1 Watchdog Timer 0 from reset through reset manager */ void socfpga_reset_deassert_osc1wd0(void) { diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index fe4782c9cb..7d35e9daa8 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -17,6 +17,7 @@ #include <asm/arch/scan_manager.h> #include <asm/arch/sdram.h> #include <asm/arch/scu.h> +#include <asm/arch/misc.h> #include <asm/arch/nic301.h> #include <asm/sections.h> #include <fdtdec.h> @@ -74,11 +75,13 @@ void spl_board_init(void) config_dedicated_pins(gd->fdt_blob); WATCHDOG_RESET(); - /* Release UART from reset */ - socfpga_reset_uart(0); - /* enable console uart printing */ preloader_console_init(); + + WATCHDOG_RESET(); + + /* Add device descriptor to FPGA device table */ + socfpga_fpga_add(); } void board_init_f(ulong dummy) diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index d6fe7d35af..be318cc0d9 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -5,7 +5,6 @@ #include <common.h> #include <asm/io.h> -#include <asm/pl310.h> #include <asm/u-boot.h> #include <asm/utils.h> #include <image.h> @@ -17,20 +16,13 @@ #include <asm/arch/misc.h> #include <asm/arch/scan_manager.h> #include <asm/arch/sdram.h> -#include <asm/arch/scu.h> -#include <asm/arch/nic301.h> #include <asm/sections.h> +#include <debug_uart.h> #include <fdtdec.h> #include <watchdog.h> DECLARE_GLOBAL_DATA_PTR; -static struct pl310_regs *const pl310 = - (struct pl310_regs *)CONFIG_SYS_PL310_BASE; -static struct scu_registers *scu_regs = - (struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS; -static struct nic301_registers *nic301_regs = - (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS; static const struct socfpga_system_manager *sysmgr_regs = (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; @@ -71,21 +63,12 @@ u32 spl_boot_mode(const u32 boot_device) } #endif -static void socfpga_nic301_slave_ns(void) -{ - writel(0x1, &nic301_regs->lwhps2fpgaregs); - writel(0x1, &nic301_regs->hps2fpgaregs); - writel(0x1, &nic301_regs->acp); - writel(0x1, &nic301_regs->rom); - writel(0x1, &nic301_regs->ocram); - writel(0x1, &nic301_regs->sdrdata); -} - void board_init_f(ulong dummy) { const struct cm_config *cm_default_cfg = cm_get_default_config(); unsigned long sdram_size; unsigned long reg; + int ret; /* * First C code to run. Clear fake OCRAM ECC first as SBE @@ -101,14 +84,7 @@ void board_init_f(ulong dummy) memset(__bss_start, 0, __bss_end - __bss_start); - socfpga_nic301_slave_ns(); - - /* Configure ARM MPU SNSAC register. */ - setbits_le32(&scu_regs->sacr, 0xfff); - - /* Remap SDRAM to 0x0 */ - writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ - writel(0x1, &pl310->pl310_addr_filter_start); + socfpga_sdram_remap_zero(); debug("Freezing all I/O banks\n"); /* freeze all IO banks */ @@ -152,6 +128,17 @@ void board_init_f(ulong dummy) /* unfreeze / thaw all IO banks */ sys_mgr_frzctrl_thaw_req(); +#ifdef CONFIG_DEBUG_UART + socfpga_per_reset(SOCFPGA_RESET(UART0), 0); + debug_uart_init(); +#endif + + ret = spl_early_init(); + if (ret) { + debug("spl_early_init() failed: %d\n", ret); + hang(); + } + /* enable console uart printing */ preloader_console_init(); @@ -177,7 +164,4 @@ void board_init_f(ulong dummy) } socfpga_bridges_reset(1); - - /* Configure simple malloc base pointer into RAM. */ - gd->malloc_base = CONFIG_SYS_TEXT_BASE + (1024 * 1024); } diff --git a/arch/microblaze/include/asm/config.h b/arch/microblaze/include/asm/config.h index 93a3fe85fe..45966eef91 100644 --- a/arch/microblaze/include/asm/config.h +++ b/arch/microblaze/include/asm/config.h @@ -10,6 +10,4 @@ #define CONFIG_NEEDS_MANUAL_RELOC #endif -#define CONFIG_NR_DRAM_BANKS 1 - #endif diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index 9f444c96a9..6ac37f1ed7 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -11,6 +11,7 @@ i2c0 = &i2c_0; pci0 = &pci; rtc0 = &rtc_0; + axi0 = &axi; }; chosen { @@ -311,6 +312,16 @@ }; }; }; + + axi: axi@0 { + compatible = "sandbox,axi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + store@0 { + compatible = "sandbox,sandbox_store"; + reg = <0x0 0x400>; + }; + }; }; #include "cros-ec-keyboard.dtsi" diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 7035646195..118ff9f685 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -36,6 +36,7 @@ usb0 = &usb_0; usb1 = &usb_1; usb2 = &usb_2; + axi0 = &axi; }; a-test { @@ -285,6 +286,10 @@ mbox-names = "other", "test"; }; + misc-test { + compatible = "sandbox,misc_sandbox"; + }; + mmc2 { compatible = "sandbox,mmc"; }; @@ -552,6 +557,16 @@ compatible = "sandbox,wdt"; }; + axi: axi@0 { + compatible = "sandbox,axi"; + #address-cells = <0x1>; + #size-cells = <0x1>; + store@0 { + compatible = "sandbox,sandbox_store"; + reg = <0x0 0x400>; + }; + }; + chosen { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/sandbox/include/asm/axi.h b/arch/sandbox/include/asm/axi.h new file mode 100644 index 0000000000..d483f7b65a --- /dev/null +++ b/arch/sandbox/include/asm/axi.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#ifndef __asm_axi_h +#define __asm_axi_h + +#define axi_emul_get_ops(dev) ((struct axi_emul_ops *)(dev)->driver->ops) + +/** + * axi_sandbox_get_emul() - Retrieve a pointer to a AXI emulation device + * @bus: The AXI bus from which to retrieve a emulation device + * @address: The address of a transfer that should be handled by a emulation + * device + * @length: The data width of a transfer that should be handled by a emulation + * device + * @emulp: Pointer to a buffer receiving the emulation device that handles + * the transfer specified by the address and length parameters + * + * To test the AXI uclass, we implement a simple AXI emulation device, which is + * a virtual device on a AXI bus that exposes a simple storage interface: When + * reading and writing from the device, the addresses are translated to offsets + * within the device's storage. For write accesses the data is written to the + * specified storage offset, and for read accesses the data is read from the + * specified storage offset. + * + * A DTS entry might look like this: + * + * axi: axi@0 { + * compatible = "sandbox,axi"; + * #address-cells = <0x1>; + * #size-cells = <0x1>; + * store@0 { + * compatible = "sandbox,sandbox_store"; + * reg = <0x0 0x400>; + * }; + * }; + * + * This function may then be used to retrieve the pointer to the sandbox_store + * emulation device given the AXI bus device, and the data (address, data + * width) of a AXI transfer which should be handled by a emulation device. + * + * Return: 0 of OK, -ENODEV if no device capable of handling the specified + * transfer exists or the device could not be retrieved + */ +int axi_sandbox_get_emul(struct udevice *bus, ulong address, uint length, + struct udevice **emulp); +/** + * axi_get_store() - Get address of internal storage of a emulated AXI device + * @dev: Emulated AXI device to get the pointer of the internal storage + * for. + * @storep: Pointer to the internal storage of the emulated AXI device. + * + * To preset or read back the contents internal storage of the emulated AXI + * device, this function returns the pointer to the storage. Changes to the + * contents of the storage are reflected when using the AXI read/write API + * methods, and vice versa, so by using this method expected read data can be + * set up in advance, and written data can be checked in unit tests. + * + * Return: 0 if OK, -ve on error. + */ +int axi_get_store(struct udevice *dev, u8 **storep); + +#endif /* __asm_axi_h */ diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig index 392c258945..93f61f2fa4 100644 --- a/arch/x86/cpu/coreboot/Kconfig +++ b/arch/x86/cpu/coreboot/Kconfig @@ -3,26 +3,26 @@ if TARGET_COREBOOT config SYS_COREBOOT bool default y + imply SYS_NS16550 + imply SCSI + imply SCSI_AHCI imply AHCI_PCI - imply E1000 - imply ICH_SPI imply MMC imply MMC_PCI imply MMC_SDHCI imply MMC_SDHCI_SDMA - imply SCSI - imply SCSI_AHCI - imply SPI_FLASH - imply SYS_NS16550 imply USB imply USB_EHCI_HCD imply USB_XHCI_HCD + imply USB_STORAGE + imply USB_KEYBOARD imply VIDEO_COREBOOT + imply E1000 + imply ETH_DESIGNWARE + imply PCH_GBE + imply RTL8169 imply CMD_CBFS imply FS_CBFS - -config CBMEM_CONSOLE - bool - default y + imply CBMEM_CONSOLE endif diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 69025c1537..a6fd3a849a 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -7,6 +7,7 @@ #include <common.h> #include <fdtdec.h> +#include <usb.h> #include <asm/io.h> #include <asm/msr.h> #include <asm/mtrr.h> @@ -75,12 +76,10 @@ int last_stage_init(void) if (gd->flags & GD_FLG_COLD_BOOT) timestamp_add_to_bootstage(); - board_final_cleanup(); + /* start usb so that usb keyboard can be used as input device */ + usb_init(); - return 0; -} + board_final_cleanup(); -int misc_init_r(void) -{ return 0; } diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile index 37e4fdc760..fa717bc096 100644 --- a/arch/x86/dts/Makefile +++ b/arch/x86/dts/Makefile @@ -6,6 +6,7 @@ dtb-y += bayleybay.dtb \ chromebox_panther.dtb \ chromebook_samus.dtb \ conga-qeval20-qa3-e3845.dtb \ + coreboot.dtb \ cougarcanyon2.dtb \ crownbay.dtb \ dfi-bt700-q7x-151.dtb \ @@ -17,7 +18,6 @@ dtb-y += bayleybay.dtb \ qemu-x86_i440fx.dtb \ qemu-x86_q35.dtb \ theadorable-x86-dfi-bt700.dtb \ - broadwell_som-6896.dtb \ baytrail_som-db5800-som-6867.dtb targets += $(dtb-y) diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index 9683c525a7..291dc07ff6 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -15,7 +15,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Intel Bayley Bay"; diff --git a/arch/x86/dts/broadwell_som-6896.dts b/arch/x86/dts/broadwell_som-6896.dts deleted file mode 100644 index ec691f136a..0000000000 --- a/arch/x86/dts/broadwell_som-6896.dts +++ /dev/null @@ -1,52 +0,0 @@ -/dts-v1/; - -/include/ "skeleton.dtsi" -/include/ "serial.dtsi" -/include/ "reset.dtsi" -/include/ "rtc.dtsi" -/include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" - -/ { - model = "Advantech SOM-6896"; - compatible = "advantech,som-6896", "intel,broadwell"; - - aliases { - spi0 = &spi; - }; - - config { - silent_console = <0>; - }; - - chosen { - stdout-path = "/serial"; - }; - - pci { - compatible = "pci-x86"; - #address-cells = <3>; - #size-cells = <2>; - u-boot,dm-pre-reloc; - ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 - 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 - 0x01000000 0x0 0x2000 0x2000 0 0xe000>; - - pch@1f,0 { - reg = <0x0000f800 0 0 0 0>; - compatible = "intel,pch9"; - - spi: spi { - #address-cells = <1>; - #size-cells = <0>; - compatible = "intel,ich9-spi"; - spi-flash@0 { - reg = <0>; - compatible = "winbond,w25q128", "spi-flash"; - memory-map = <0xff000000 0x01000000>; - }; - }; - }; - }; - -}; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index 115a088a7a..f9f0979730 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -8,7 +8,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Google Link"; diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index 9c48c9a3fa..b58936b4ac 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -8,7 +8,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Google Samus"; diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index a72a85ef9c..f56e482944 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -5,7 +5,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Google Panther"; diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts new file mode 100644 index 0000000000..e212f3dc7d --- /dev/null +++ b/arch/x86/dts/coreboot.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> + * + * Generic coreboot payload device tree for x86 targets + */ + +/dts-v1/; + +/include/ "skeleton.dtsi" +/include/ "serial.dtsi" +/include/ "keyboard.dtsi" +/include/ "reset.dtsi" +/include/ "rtc.dtsi" +/include/ "tsc_timer.dtsi" + +/ { + model = "coreboot x86 payload"; + compatible = "coreboot,x86-payload"; + + aliases { + serial0 = &serial; + }; + + config { + silent_console = <0>; + }; + + chosen { + stdout-path = "/serial"; + }; + + tsc-timer { + clock-frequency = <1000000000>; + }; + + pci { + compatible = "pci-x86"; + u-boot,dm-pre-reloc; + }; + + coreboot-fb { + compatible = "coreboot-fb"; + }; +}; diff --git a/arch/x86/dts/coreboot_fb.dtsi b/arch/x86/dts/coreboot_fb.dtsi deleted file mode 100644 index 7d72f18537..0000000000 --- a/arch/x86/dts/coreboot_fb.dtsi +++ /dev/null @@ -1,5 +0,0 @@ -/ { - coreboot-fb { - compatible = "coreboot-fb"; - }; -}; diff --git a/arch/x86/dts/efi-x86_payload.dts b/arch/x86/dts/efi-x86_payload.dts index 19f253064b..5ccb986774 100644 --- a/arch/x86/dts/efi-x86_payload.dts +++ b/arch/x86/dts/efi-x86_payload.dts @@ -30,6 +30,10 @@ stdout-path = "/serial"; }; + tsc-timer { + clock-frequency = <1000000000>; + }; + pci { compatible = "pci-x86"; u-boot,dm-pre-reloc; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 02ab4c160a..6c65fb9611 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -14,7 +14,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Intel Minnowboard Max"; diff --git a/arch/xtensa/include/asm/u-boot.h b/arch/xtensa/include/asm/u-boot.h index a3dba8db79..24c4fce643 100644 --- a/arch/xtensa/include/asm/u-boot.h +++ b/arch/xtensa/include/asm/u-boot.h @@ -13,26 +13,8 @@ #ifndef _XTENSA_U_BOOT_H #define _XTENSA_U_BOOT_H -#ifdef CONFIG_SYS_GENERIC_BOARD /* Use the generic board which requires a unified bd_info */ #include <asm-generic/u-boot.h> -#else - -#ifndef __ASSEMBLY__ -typedef struct bd_info { - int bi_baudrate; /* serial console baudrate */ - unsigned long bi_ip_addr; /* IP Address */ - unsigned char bi_enetaddr[6]; /* Ethernet adress */ - unsigned long bi_boot_params; /* where this board expects params */ - unsigned long bi_memstart; /* start of DRAM memory VA */ - unsigned long bi_memsize; /* size of DRAM memory in bytes */ - unsigned long bi_flashstart; /* start of FLASH memory */ - unsigned long bi_flashsize; /* size of FLASH memory */ - unsigned long bi_flashoffset; /* offset to skip UBoot image */ -} bd_t; -#endif /* __ ASSEMBLY__ */ - -#endif /* CONFIG_SYS_GENERIC_BOARD */ /* For image.h:image_check_target_arch() */ #define IH_ARCH_DEFAULT IH_ARCH_XTENSA diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig index cfa1d50ee4..5bd6465d98 100644 --- a/board/coreboot/coreboot/Kconfig +++ b/board/coreboot/coreboot/Kconfig @@ -9,35 +9,15 @@ config SYS_VENDOR config SYS_SOC default "coreboot" +config SYS_CONFIG_NAME + default "coreboot" + config SYS_TEXT_BASE default 0x01110000 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - imply SPI_FLASH_ATMEL - imply SPI_FLASH_EON - imply SPI_FLASH_GIGADEVICE - imply SPI_FLASH_MACRONIX - imply SPI_FLASH_SPANSION - imply SPI_FLASH_STMICRO - imply SPI_FLASH_SST - imply SPI_FLASH_WINBOND - -comment "coreboot-specific options" - -config SYS_CONFIG_NAME - string "Board configuration file" - default "qemu-x86" - help - This option selects the board configuration file in include/configs/ - directory to be used to build U-Boot for coreboot. - -config DEFAULT_DEVICE_TREE - string "Board Device Tree Source (dts) file" - default "qemu-x86_i440fx" - help - This option selects the board Device Tree Source (dts) file in - arch/x86/dts/ directory to be used to build U-Boot for coreboot. + select BOARD_EARLY_INIT_R config SYS_CAR_ADDR hex "Board specific Cache-As-RAM (CAR) address" diff --git a/board/coreboot/coreboot/Makefile b/board/coreboot/coreboot/Makefile index ea0f3ee1ae..8db7cc62f3 100644 --- a/board/coreboot/coreboot/Makefile +++ b/board/coreboot/coreboot/Makefile @@ -10,4 +10,4 @@ # (C) Copyright 2002 # Daniel Engström, Omicron Ceti AB, daniel@omicron.se. -obj-y += coreboot_start.o +obj-y += start.o coreboot.o diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c new file mode 100644 index 0000000000..ed5606d4a4 --- /dev/null +++ b/board/coreboot/coreboot/coreboot.c @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> + */ + +#include <common.h> + +int board_early_init_r(void) +{ + /* + * Make sure PCI bus is enumerated so that peripherals on the PCI bus + * can be discovered by their drivers + */ + pci_init(); + + return 0; +} diff --git a/board/coreboot/coreboot/coreboot_start.S b/board/coreboot/coreboot/start.S index aa702622d4..aa702622d4 100644 --- a/board/coreboot/coreboot/coreboot_start.S +++ b/board/coreboot/coreboot/start.S diff --git a/board/davinci/da8xxevm/README.da850 b/board/davinci/da8xxevm/README.da850 index 519267e2f0..f24e8b5342 100644 --- a/board/davinci/da8xxevm/README.da850 +++ b/board/davinci/da8xxevm/README.da850 @@ -112,6 +112,25 @@ uflash writes the AIS image at offset 117. For compatibility with uflash, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is set to take into account this offset, and the dd command is adjusted accordingly. +Flashing the images to NOR +========================== +NOR Flash is XIP (execute-in-place), so no AIS (or SPL) is needed. The +u-boot.bin is directy flashed, but CONFIT_DA850_LOWLEVEL must be set +to initialize hardware that's normally done by SPL. + +For this case, CONFIG_SYS_TEXT_BASE=0x60000000 which is the address to +which the bootloader jumps when powered on. + +Example: +For the da850evm, there is a defconfig setup to use the NOR flash on +the UI expander board called da850evm_direct_nor_defconfig. + +Flash to NOR directly using +sudo mono ./sfh_OMAP-L138.exe -p /dev/ttyUSB0 -flash_noubl + -flashType NOR u-boot.bin + +SW7:5 through SW7:7 should be switched on and all others off. + Recovery ======== diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c index 79fa6aa2e7..0e6f2135b4 100644 --- a/board/freescale/common/ns_access.c +++ b/board/freescale/common/ns_access.c @@ -9,6 +9,173 @@ #include <asm/arch/ns_access.h> #include <asm/arch/fsl_serdes.h> +#ifdef CONFIG_ARCH_LS1021A +static struct csu_ns_dev ns_dev[] = { + { CSU_CSLX_PCIE2_IO, CSU_ALL_RW }, + { CSU_CSLX_PCIE1_IO, CSU_ALL_RW }, + { CSU_CSLX_MG2TPR_IP, CSU_ALL_RW }, + { CSU_CSLX_IFC_MEM, CSU_ALL_RW }, + { CSU_CSLX_OCRAM, CSU_ALL_RW }, + { CSU_CSLX_GIC, CSU_ALL_RW }, + { CSU_CSLX_PCIE1, CSU_ALL_RW }, + { CSU_CSLX_OCRAM2, CSU_ALL_RW }, + { CSU_CSLX_QSPI_MEM, CSU_ALL_RW }, + { CSU_CSLX_PCIE2, CSU_ALL_RW }, + { CSU_CSLX_SATA, CSU_ALL_RW }, + { CSU_CSLX_USB3, CSU_ALL_RW }, + { CSU_CSLX_SERDES, CSU_ALL_RW }, + { CSU_CSLX_QDMA, CSU_ALL_RW }, + { CSU_CSLX_LPUART2, CSU_ALL_RW }, + { CSU_CSLX_LPUART1, CSU_ALL_RW }, + { CSU_CSLX_LPUART4, CSU_ALL_RW }, + { CSU_CSLX_LPUART3, CSU_ALL_RW }, + { CSU_CSLX_LPUART6, CSU_ALL_RW }, + { CSU_CSLX_LPUART5, CSU_ALL_RW }, + { CSU_CSLX_DSPI2, CSU_ALL_RW }, + { CSU_CSLX_DSPI1, CSU_ALL_RW }, + { CSU_CSLX_QSPI, CSU_ALL_RW }, + { CSU_CSLX_ESDHC, CSU_ALL_RW }, + { CSU_CSLX_2D_ACE, CSU_ALL_RW }, + { CSU_CSLX_IFC, CSU_ALL_RW }, + { CSU_CSLX_I2C1, CSU_ALL_RW }, + { CSU_CSLX_USB2, CSU_ALL_RW }, + { CSU_CSLX_I2C3, CSU_ALL_RW }, + { CSU_CSLX_I2C2, CSU_ALL_RW }, + { CSU_CSLX_DUART2, CSU_ALL_RW }, + { CSU_CSLX_DUART1, CSU_ALL_RW }, + { CSU_CSLX_WDT2, CSU_ALL_RW }, + { CSU_CSLX_WDT1, CSU_ALL_RW }, + { CSU_CSLX_EDMA, CSU_ALL_RW }, + { CSU_CSLX_SYS_CNT, CSU_ALL_RW }, + { CSU_CSLX_DMA_MUX2, CSU_ALL_RW }, + { CSU_CSLX_DMA_MUX1, CSU_ALL_RW }, + { CSU_CSLX_DDR, CSU_ALL_RW }, + { CSU_CSLX_QUICC, CSU_ALL_RW }, + { CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW }, + { CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW }, + { CSU_CSLX_SFP, CSU_ALL_RW }, + { CSU_CSLX_TMU, CSU_ALL_RW }, + { CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW }, + { CSU_CSLX_RESERVED0, CSU_ALL_RW }, + { CSU_CSLX_ETSEC1, CSU_ALL_RW }, + { CSU_CSLX_SEC5_5, CSU_ALL_RW }, + { CSU_CSLX_ETSEC3, CSU_ALL_RW }, + { CSU_CSLX_ETSEC2, CSU_ALL_RW }, + { CSU_CSLX_GPIO2, CSU_ALL_RW }, + { CSU_CSLX_GPIO1, CSU_ALL_RW }, + { CSU_CSLX_GPIO4, CSU_ALL_RW }, + { CSU_CSLX_GPIO3, CSU_ALL_RW }, + { CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW }, + { CSU_CSLX_CSU, CSU_ALL_RW }, + { CSU_CSLX_ASRC, CSU_ALL_RW }, + { CSU_CSLX_SPDIF, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN2, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN1, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN4, CSU_ALL_RW }, + { CSU_CSLX_FLEXCAN3, CSU_ALL_RW }, + { CSU_CSLX_SAI2, CSU_ALL_RW }, + { CSU_CSLX_SAI1, CSU_ALL_RW }, + { CSU_CSLX_SAI4, CSU_ALL_RW }, + { CSU_CSLX_SAI3, CSU_ALL_RW }, + { CSU_CSLX_FTM2, CSU_ALL_RW }, + { CSU_CSLX_FTM1, CSU_ALL_RW }, + { CSU_CSLX_FTM4, CSU_ALL_RW }, + { CSU_CSLX_FTM3, CSU_ALL_RW }, + { CSU_CSLX_FTM6, CSU_ALL_RW }, + { CSU_CSLX_FTM5, CSU_ALL_RW }, + { CSU_CSLX_FTM8, CSU_ALL_RW }, + { CSU_CSLX_FTM7, CSU_ALL_RW }, + { CSU_CSLX_COP_DCSR, CSU_ALL_RW }, + { CSU_CSLX_EPU, CSU_ALL_RW }, + { CSU_CSLX_GDI, CSU_ALL_RW }, + { CSU_CSLX_DDI, CSU_ALL_RW }, + { CSU_CSLX_RESERVED1, CSU_ALL_RW }, + { CSU_CSLX_USB3_PHY, CSU_ALL_RW }, + { CSU_CSLX_RESERVED2, CSU_ALL_RW }, +}; + +#else +static struct csu_ns_dev ns_dev[] = { + {CSU_CSLX_PCIE2_IO, CSU_ALL_RW}, + {CSU_CSLX_PCIE1_IO, CSU_ALL_RW}, + {CSU_CSLX_MG2TPR_IP, CSU_ALL_RW}, + {CSU_CSLX_IFC_MEM, CSU_ALL_RW}, + {CSU_CSLX_OCRAM, CSU_ALL_RW}, + {CSU_CSLX_GIC, CSU_ALL_RW}, + {CSU_CSLX_PCIE1, CSU_ALL_RW}, + {CSU_CSLX_OCRAM2, CSU_ALL_RW}, + {CSU_CSLX_QSPI_MEM, CSU_ALL_RW}, + {CSU_CSLX_PCIE2, CSU_ALL_RW}, + {CSU_CSLX_SATA, CSU_ALL_RW}, + {CSU_CSLX_USB1, CSU_ALL_RW}, + {CSU_CSLX_QM_BM_SWPORTAL, CSU_ALL_RW}, + {CSU_CSLX_PCIE3, CSU_ALL_RW}, + {CSU_CSLX_PCIE3_IO, CSU_ALL_RW}, + {CSU_CSLX_USB3, CSU_ALL_RW}, + {CSU_CSLX_USB2, CSU_ALL_RW}, + {CSU_CSLX_PFE, CSU_ALL_RW}, + {CSU_CSLX_SERDES, CSU_ALL_RW}, + {CSU_CSLX_QDMA, CSU_ALL_RW}, + {CSU_CSLX_LPUART2, CSU_ALL_RW}, + {CSU_CSLX_LPUART1, CSU_ALL_RW}, + {CSU_CSLX_LPUART4, CSU_ALL_RW}, + {CSU_CSLX_LPUART3, CSU_ALL_RW}, + {CSU_CSLX_LPUART6, CSU_ALL_RW}, + {CSU_CSLX_LPUART5, CSU_ALL_RW}, + {CSU_CSLX_DSPI1, CSU_ALL_RW}, + {CSU_CSLX_QSPI, CSU_ALL_RW}, + {CSU_CSLX_ESDHC, CSU_ALL_RW}, + {CSU_CSLX_IFC, CSU_ALL_RW}, + {CSU_CSLX_I2C1, CSU_ALL_RW}, + {CSU_CSLX_I2C3, CSU_ALL_RW}, + {CSU_CSLX_I2C2, CSU_ALL_RW}, + {CSU_CSLX_DUART2, CSU_ALL_RW}, + {CSU_CSLX_DUART1, CSU_ALL_RW}, + {CSU_CSLX_WDT2, CSU_ALL_RW}, + {CSU_CSLX_WDT1, CSU_ALL_RW}, + {CSU_CSLX_EDMA, CSU_ALL_RW}, + {CSU_CSLX_SYS_CNT, CSU_ALL_RW}, + {CSU_CSLX_DMA_MUX2, CSU_ALL_RW}, + {CSU_CSLX_DMA_MUX1, CSU_ALL_RW}, + {CSU_CSLX_DDR, CSU_ALL_RW}, + {CSU_CSLX_QUICC, CSU_ALL_RW}, + {CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW}, + {CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW}, + {CSU_CSLX_SFP, CSU_ALL_RW}, + {CSU_CSLX_TMU, CSU_ALL_RW}, + {CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW}, + {CSU_CSLX_SCFG, CSU_ALL_RW}, + {CSU_CSLX_FM, CSU_ALL_RW}, + {CSU_CSLX_SEC5_5, CSU_ALL_RW}, + {CSU_CSLX_BM, CSU_ALL_RW}, + {CSU_CSLX_QM, CSU_ALL_RW}, + {CSU_CSLX_GPIO2, CSU_ALL_RW}, + {CSU_CSLX_GPIO1, CSU_ALL_RW}, + {CSU_CSLX_GPIO4, CSU_ALL_RW}, + {CSU_CSLX_GPIO3, CSU_ALL_RW}, + {CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW}, + {CSU_CSLX_CSU, CSU_ALL_RW}, + {CSU_CSLX_IIC4, CSU_ALL_RW}, + {CSU_CSLX_WDT4, CSU_ALL_RW}, + {CSU_CSLX_WDT3, CSU_ALL_RW}, + {CSU_CSLX_ESDHC2, CSU_ALL_RW}, + {CSU_CSLX_WDT5, CSU_ALL_RW}, + {CSU_CSLX_SAI2, CSU_ALL_RW}, + {CSU_CSLX_SAI1, CSU_ALL_RW}, + {CSU_CSLX_SAI4, CSU_ALL_RW}, + {CSU_CSLX_SAI3, CSU_ALL_RW}, + {CSU_CSLX_FTM2, CSU_ALL_RW}, + {CSU_CSLX_FTM1, CSU_ALL_RW}, + {CSU_CSLX_FTM4, CSU_ALL_RW}, + {CSU_CSLX_FTM3, CSU_ALL_RW}, + {CSU_CSLX_FTM6, CSU_ALL_RW}, + {CSU_CSLX_FTM5, CSU_ALL_RW}, + {CSU_CSLX_FTM8, CSU_ALL_RW}, + {CSU_CSLX_FTM7, CSU_ALL_RW}, + {CSU_CSLX_DSCR, CSU_ALL_RW}, +}; +#endif + void set_devices_ns_access(unsigned long index, u16 val) { u32 *base = (u32 *)CONFIG_SYS_FSL_CSU_ADDR; diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index a1668b9728..888f8500d4 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -25,6 +25,9 @@ DECLARE_GLOBAL_DATA_PTR; +#define BOOT_FROM_UPPER_BANK 0x2 +#define BOOT_FROM_LOWER_BANK 0x1 + int checkboard(void) { #ifdef CONFIG_TARGET_LS1012ARDB @@ -211,3 +214,85 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } + +static int switch_to_bank1(void) +{ + u8 data; + int ret; + + i2c_set_bus_num(0); + + data = 0xf4; + ret = i2c_write(0x24, 0x3, 1, &data, 1); + if (ret) { + printf("i2c write error to chip : %u, addr : %u, data : %u\n", + 0x24, 0x3, data); + } + + return ret; +} + +static int switch_to_bank2(void) +{ + u8 data; + int ret; + + i2c_set_bus_num(0); + + data = 0xfc; + ret = i2c_write(0x24, 0x7, 1, &data, 1); + if (ret) { + printf("i2c write error to chip : %u, addr : %u, data : %u\n", + 0x24, 0x7, data); + goto err; + } + + data = 0xf5; + ret = i2c_write(0x24, 0x3, 1, &data, 1); + if (ret) { + printf("i2c write error to chip : %u, addr : %u, data : %u\n", + 0x24, 0x3, data); + } +err: + return ret; +} + +static int convert_flash_bank(int bank) +{ + int ret = 0; + + switch (bank) { + case BOOT_FROM_UPPER_BANK: + ret = switch_to_bank2(); + break; + case BOOT_FROM_LOWER_BANK: + ret = switch_to_bank1(); + break; + default: + ret = CMD_RET_USAGE; + break; + }; + + return ret; +} + +static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc != 2) + return CMD_RET_USAGE; + if (strcmp(argv[1], "1") == 0) + convert_flash_bank(BOOT_FROM_LOWER_BANK); + else if (strcmp(argv[1], "2") == 0) + convert_flash_bank(BOOT_FROM_UPPER_BANK); + else + return CMD_RET_USAGE; + + return 0; +} + +U_BOOT_CMD( + boot_bank, 2, 0, flash_bank_cmd, + "Flash bank Selection Control", + "bank[1-lower bank/2-upper bank] (e.g. boot_bank 1)" +); diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index b765f07f85..0da82381af 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -14,6 +14,7 @@ #include <asm/arch/fdt.h> #include <asm/arch/mmu.h> #include <asm/arch/soc.h> +#include <asm/arch-fsl-layerscape/fsl_icid.h> #include <ahci.h> #include <hwconfig.h> #include <mmc.h> @@ -309,6 +310,8 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_board_enet(blob); #endif + fdt_fixup_icid(blob); + reg = QIXIS_READ(brdcfg[0]); reg = (reg & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index feb5c2448a..0a73fe859d 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -11,6 +11,7 @@ #include <asm/arch/fsl_serdes.h> #include <asm/arch/ppa.h> #include <asm/arch/soc.h> +#include <asm/arch-fsl-layerscape/fsl_icid.h> #include <hwconfig.h> #include <ahci.h> #include <mmc.h> @@ -174,6 +175,8 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_fman_ethernet(blob); #endif + fdt_fixup_icid(blob); + return 0; } #endif diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c index e7ead57f0d..53e231e55a 100644 --- a/board/qualcomm/dragonboard410c/dragonboard410c.c +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c @@ -10,6 +10,9 @@ #include <usb.h> #include <asm/gpio.h> #include <fdt_support.h> +#include <environment.h> +#include <asm/arch/dram.h> +#include <asm/arch/misc.h> DECLARE_GLOBAL_DATA_PTR; @@ -148,38 +151,38 @@ int board_init(void) return 0; } +/* Fixup of DTB for Linux Kernel + * 1. Fixup installed DRAM. + * 2. Fixup WLAN/BT Mac address: + * First, check if MAC addresses for WLAN/BT exists as environemnt + * variables wlanaddr,btaddr. if not, generate a unique address. + */ + int ft_board_setup(void *blob, bd_t *bd) { - int offset, len, i; - const char *mac; - struct { - const char *compatible; - const char *property; - } fix[] = { - [0] = { - /* update the kernel's dtb with wlan mac */ - .compatible = "qcom,wcnss-wlan", - .property = "local-mac-address", - }, - [1] = { - /* update the kernel's dtb with bt mac */ - .compatible = "qcom,wcnss-bt", - .property = "local-bd-address", - }, + u8 mac[ARP_HLEN]; + + msm_fixup_memory(blob); + + if (!eth_env_get_enetaddr("wlanaddr", mac)) { + msm_generate_mac_addr(mac); }; - for (i = 0; i < sizeof(fix) / sizeof(fix[0]); i++) { - offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1, - fix[i].compatible); - if (offset < 0) - continue; + do_fixup_by_compat(blob, "qcom,wcnss-wlan", + "local-mac-address", mac, ARP_HLEN, 1); - mac = fdt_getprop(gd->fdt_blob, offset, fix[i].property, &len); - if (mac) - do_fixup_by_compat(blob, fix[i].compatible, - fix[i].property, mac, ARP_HLEN, 1); - } + if (!eth_env_get_enetaddr("btaddr", mac)) { + msm_generate_mac_addr(mac); + +/* The BD address is same as WLAN MAC address but with + * least significant bit flipped. + */ + mac[0] ^= 0x01; + }; + + do_fixup_by_compat(blob, "qcom,wcnss-bt", + "local-bd-address", mac, ARP_HLEN, 1); return 0; } diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c index 195f620834..0e87674826 100644 --- a/board/sandbox/sandbox.c +++ b/board/sandbox/sandbox.c @@ -6,6 +6,7 @@ #include <common.h> #include <cros_ec.h> #include <dm.h> +#include <led.h> #include <os.h> #include <asm/test.h> #include <asm/u-boot-sandbox.h> @@ -47,6 +48,14 @@ int dram_init(void) return 0; } +int board_init(void) +{ + if (IS_ENABLED(CONFIG_LED)) + led_default_state(); + + return 0; +} + #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c index e800d70f76..500dc5fe3a 100644 --- a/board/st/stm32f429-discovery/stm32f429-discovery.c +++ b/board/st/stm32f429-discovery/stm32f429-discovery.c @@ -54,7 +54,7 @@ int board_early_init_f(void) int board_init(void) { - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; return 0; } diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c index fd2109b27c..8ab2fa5d59 100644 --- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c +++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c @@ -48,7 +48,7 @@ int board_early_init_f(void) int board_init(void) { - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; return 0; } diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c index a457f90952..70d23d90f4 100644 --- a/board/st/stm32f469-discovery/stm32f469-discovery.c +++ b/board/st/stm32f469-discovery/stm32f469-discovery.c @@ -48,7 +48,7 @@ int board_early_init_f(void) int board_init(void) { - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; return 0; } diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c index e21cfc6e49..7c9b1ad82a 100644 --- a/board/st/stm32f746-disco/stm32f746-disco.c +++ b/board/st/stm32f746-disco/stm32f746-disco.c @@ -21,25 +21,10 @@ DECLARE_GLOBAL_DATA_PTR; -int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size) -{ - int mr_node; - - mr_node = fdt_path_offset(gd->fdt_blob, "/memory"); - if (mr_node < 0) - return mr_node; - *mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node, - "reg", 0, mr_size, false); - debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size); - - return 0; -} int dram_init(void) { - int rv; - fdt_addr_t mr_base, mr_size; - #ifndef CONFIG_SUPPORT_SPL + int rv; struct udevice *dev; rv = uclass_get_device(UCLASS_RAM, 0, &dev); if (rv) { @@ -48,26 +33,12 @@ int dram_init(void) } #endif - rv = get_memory_base_size(&mr_base, &mr_size); - if (rv) - return rv; - gd->ram_size = mr_size; - gd->ram_top = mr_base; - - return rv; + return fdtdec_setup_mem_size_base(); } int dram_init_banksize(void) { - fdt_addr_t mr_base, mr_size; - get_memory_base_size(&mr_base, &mr_size); - /* - * Fill in global info with description of SRAM configuration - */ - gd->bd->bi_dram[0].start = mr_base; - gd->bd->bi_dram[0].size = mr_size; - - return 0; + return fdtdec_setup_memory_banksize(); } int board_early_init_f(void) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index cc39fa6df9..bfc8ab64d3 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -4,6 +4,7 @@ */ #include <config.h> #include <common.h> +#include <led.h> #include <asm/arch/stm32.h> /* @@ -22,5 +23,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100; + if (IS_ENABLED(CONFIG_LED)) + led_default_state(); + return 0; } diff --git a/cmd/Kconfig b/cmd/Kconfig index ef43ed8dda..51db3da33d 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -254,6 +254,14 @@ config CMD_BOOTMENU help Add an ANSI terminal boot menu command. +config CMD_DTIMG + bool "dtimg" + help + Android DTB/DTBO image manipulation commands. Read dtb/dtbo files from + image into RAM, dump image structure information, etc. Those dtb/dtbo + files should be merged in one dtb further, which needs to be passed to + the kernel, as part of a boot process. + config CMD_ELF bool "bootelf, bootvx" default y @@ -1027,6 +1035,14 @@ config CMD_USB_MASS_STORAGE help USB mass storage support +config CMD_AXI + bool "axi" + depends on AXI + help + Enable the command "axi" for accessing AXI (Advanced eXtensible + Interface) busses, a on-chip interconnect specification for managing + functional blocks in SoC designs, which is also often used in designs + involving FPGAs (e.g. communication with IP cores in Xilinx FPGAs). endmenu @@ -1066,6 +1082,7 @@ if NET menuconfig CMD_NET bool "Network commands" default y + imply NETDEVICES if CMD_NET diff --git a/cmd/Makefile b/cmd/Makefile index 323f1fd2c7..b1206fca85 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -43,6 +43,7 @@ ifdef CONFIG_POST obj-$(CONFIG_CMD_DIAG) += diag.o endif obj-$(CONFIG_CMD_DISPLAY) += display.o +obj-$(CONFIG_CMD_DTIMG) += dtimg.o obj-$(CONFIG_CMD_ECHO) += echo.o obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o obj-$(CONFIG_CMD_EEPROM) += eeprom.o @@ -149,6 +150,7 @@ obj-$(CONFIG_CMD_ZFS) += zfs.o obj-$(CONFIG_CMD_DFU) += dfu.o obj-$(CONFIG_CMD_GPT) += gpt.o obj-$(CONFIG_CMD_ETHSW) += ethsw.o +obj-$(CONFIG_CMD_AXI) += axi.o # Power obj-$(CONFIG_CMD_PMIC) += pmic.o diff --git a/cmd/axi.c b/cmd/axi.c new file mode 100644 index 0000000000..588098fddd --- /dev/null +++ b/cmd/axi.c @@ -0,0 +1,352 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 + * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc + * + * (C) Copyright 2017, 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <axi.h> +#include <command.h> +#include <console.h> +#include <dm.h> + +/* Currently selected AXI bus device */ +static struct udevice *axi_cur_bus; +/* Transmission size from last command */ +static uint dp_last_size; +/* Address from last command */ +static uint dp_last_addr; +/* Number of bytes to display from last command; default = 64 */ +static uint dp_last_length = 0x40; + +/** + * show_bus() - Show devices on a single AXI bus + * @bus: The AXI bus device to printt information for + */ +static void show_bus(struct udevice *bus) +{ + struct udevice *dev; + + printf("Bus %d:\t%s", bus->req_seq, bus->name); + if (device_active(bus)) + printf(" (active %d)", bus->seq); + printf("\n"); + for (device_find_first_child(bus, &dev); + dev; + device_find_next_child(&dev)) + printf(" %s\n", dev->name); +} + +/** + * axi_set_cur_bus() - Set the currently active AXI bus + * @busnum: The number of the bus (i.e. its sequence number) that should be + * made active + * + * The operations supplied by this command operate only on the currently active + * bus. + * + * Return: 0 if OK, -ve on error + */ +static int axi_set_cur_bus(unsigned int busnum) +{ + struct udevice *bus; + struct udevice *dummy; + int ret; + + /* Make sure that all sequence numbers are initialized */ + for (uclass_first_device(UCLASS_AXI, &dummy); + dummy; + uclass_next_device(&dummy)) + ; + + ret = uclass_get_device_by_seq(UCLASS_AXI, busnum, &bus); + if (ret) { + debug("%s: No bus %d\n", __func__, busnum); + return ret; + } + axi_cur_bus = bus; + + return 0; +} + +/** + * axi_get_cur_bus() - Retrieve the currently active AXI bus device + * @busp: Pointer to a struct udevice that receives the currently active bus + * device + * + * Return: 0 if OK, -ve on error + */ +static int axi_get_cur_bus(struct udevice **busp) +{ + if (!axi_cur_bus) { + puts("No AXI bus selected\n"); + return -ENODEV; + } + *busp = axi_cur_bus; + + return 0; +} + +/* + * Command handlers + */ + +static int do_axi_show_bus(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + struct udevice *dummy; + + /* Make sure that all sequence numbers are initialized */ + for (uclass_first_device(UCLASS_AXI, &dummy); + dummy; + uclass_next_device(&dummy)) + ; + + if (argc == 1) { + /* show all busses */ + struct udevice *bus; + + for (uclass_first_device(UCLASS_AXI, &bus); + bus; + uclass_next_device(&bus)) + show_bus(bus); + } else { + int i; + + /* show specific bus */ + i = simple_strtoul(argv[1], NULL, 10); + + struct udevice *bus; + int ret; + + ret = uclass_get_device_by_seq(UCLASS_AXI, i, &bus); + if (ret) { + printf("Invalid bus %d: err=%d\n", i, ret); + return CMD_RET_FAILURE; + } + show_bus(bus); + } + + return 0; +} + +static int do_axi_bus_num(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + int ret = 0; + int bus_no; + + if (argc == 1) { + /* querying current setting */ + struct udevice *bus; + + if (!axi_get_cur_bus(&bus)) + bus_no = bus->seq; + else + bus_no = -1; + + printf("Current bus is %d\n", bus_no); + } else { + bus_no = simple_strtoul(argv[1], NULL, 10); + printf("Setting bus to %d\n", bus_no); + + ret = axi_set_cur_bus(bus_no); + if (ret) + printf("Failure changing bus number (%d)\n", ret); + } + + return ret ? CMD_RET_FAILURE : 0; +} + +static int do_axi_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + /* Print that many bytes per line */ + const uint DISP_LINE_LEN = 16; + u8 linebuf[DISP_LINE_LEN]; + unsigned int k; + ulong addr, length, size; + ulong nbytes; + enum axi_size_t axisize; + int unitsize; + + /* + * We use the last specified parameters, unless new ones are + * entered. + */ + size = dp_last_size; + addr = dp_last_addr; + length = dp_last_length; + + if (argc < 3) + return CMD_RET_USAGE; + + if (!axi_cur_bus) { + puts("No AXI bus selected\n"); + return CMD_RET_FAILURE; + } + + if ((flag & CMD_FLAG_REPEAT) == 0) { + size = simple_strtoul(argv[1], NULL, 10); + + /* + * Address is specified since argc >= 3 + */ + addr = simple_strtoul(argv[2], NULL, 16); + + /* + * If there's another parameter, it is the length to display; + * length is the number of objects, not number of bytes + */ + if (argc > 3) + length = simple_strtoul(argv[3], NULL, 16); + } + + switch (size) { + case 8: + axisize = AXI_SIZE_8; + unitsize = 1; + break; + case 16: + axisize = AXI_SIZE_16; + unitsize = 2; + break; + case 32: + axisize = AXI_SIZE_32; + unitsize = 4; + break; + default: + printf("Unknown read size '%lu'\n", size); + return CMD_RET_USAGE; + }; + + nbytes = length * unitsize; + do { + ulong linebytes = (nbytes > DISP_LINE_LEN) ? + DISP_LINE_LEN : nbytes; + + for (k = 0; k < linebytes / unitsize; ++k) { + int ret = axi_read(axi_cur_bus, addr + k * unitsize, + linebuf + k * unitsize, axisize); + + if (!ret) /* Continue if axi_read was successful */ + continue; + + if (ret == -ENOSYS) + printf("axi_read failed; read size not supported?\n"); + else + printf("axi_read failed: err = %d\n", ret); + + return CMD_RET_FAILURE; + } + print_buffer(addr, (void *)linebuf, unitsize, + linebytes / unitsize, + DISP_LINE_LEN / unitsize); + + nbytes -= max(linebytes, 1UL); + addr += linebytes; + + if (ctrlc()) + break; + } while (nbytes > 0); + + dp_last_size = size; + dp_last_addr = addr; + dp_last_length = length; + + return 0; +} + +static int do_axi_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + u32 writeval; + ulong addr, count, size; + enum axi_size_t axisize; + + if (argc <= 3 || argc >= 6) + return CMD_RET_USAGE; + + size = simple_strtoul(argv[1], NULL, 10); + + switch (size) { + case 8: + axisize = AXI_SIZE_8; + break; + case 16: + axisize = AXI_SIZE_16; + break; + case 32: + axisize = AXI_SIZE_32; + break; + default: + printf("Unknown write size '%lu'\n", size); + return CMD_RET_USAGE; + }; + + /* Address is specified since argc > 4 */ + addr = simple_strtoul(argv[2], NULL, 16); + + /* Get the value to write */ + writeval = simple_strtoul(argv[3], NULL, 16); + + /* Count ? */ + if (argc == 5) + count = simple_strtoul(argv[4], NULL, 16); + else + count = 1; + + while (count-- > 0) { + int ret = axi_write(axi_cur_bus, addr + count * sizeof(u32), + &writeval, axisize); + + if (ret) { + printf("axi_write failed: err = %d\n", ret); + return CMD_RET_FAILURE; + } + } + + return 0; +} + +static cmd_tbl_t cmd_axi_sub[] = { + U_BOOT_CMD_MKENT(bus, 1, 1, do_axi_show_bus, "", ""), + U_BOOT_CMD_MKENT(dev, 1, 1, do_axi_bus_num, "", ""), + U_BOOT_CMD_MKENT(md, 4, 1, do_axi_md, "", ""), + U_BOOT_CMD_MKENT(mw, 5, 1, do_axi_mw, "", ""), +}; + +static int do_ihs_axi(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + cmd_tbl_t *c; + + if (argc < 2) + return CMD_RET_USAGE; + + /* Strip off leading 'axi' command argument */ + argc--; + argv++; + + /* Hand off rest of command line to sub-commands */ + c = find_cmd_tbl(argv[0], &cmd_axi_sub[0], ARRAY_SIZE(cmd_axi_sub)); + + if (c) + return c->cmd(cmdtp, flag, argc, argv); + else + return CMD_RET_USAGE; +} + +static char axi_help_text[] = + "bus - show AXI bus info\n" + "axi dev [bus] - show or set current AXI bus to bus number [bus]\n" + "axi md size addr [# of objects] - read from AXI device at address [addr] and data width [size] (one of 8, 16, 32)\n" + "axi mw size addr value [count] - write data [value] to AXI device at address [addr] and data width [size] (one of 8, 16, 32)\n"; + +U_BOOT_CMD(axi, 7, 1, do_ihs_axi, + "AXI sub-system", + axi_help_text +); diff --git a/cmd/dtimg.c b/cmd/dtimg.c new file mode 100644 index 0000000000..65c8d101b9 --- /dev/null +++ b/cmd/dtimg.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 Linaro Ltd. + * Sam Protsenko <semen.protsenko@linaro.org> + */ + +#include <image-android-dt.h> +#include <common.h> + +enum cmd_dtimg_info { + CMD_DTIMG_START = 0, + CMD_DTIMG_SIZE, +}; + +static int do_dtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + char *endp; + ulong hdr_addr; + + if (argc != 2) + return CMD_RET_USAGE; + + hdr_addr = simple_strtoul(argv[1], &endp, 16); + if (*endp != '\0') { + printf("Error: Wrong image address\n"); + return CMD_RET_FAILURE; + } + + if (!android_dt_check_header(hdr_addr)) { + printf("Error: DT image header is incorrect\n"); + return CMD_RET_FAILURE; + } + + android_dt_print_contents(hdr_addr); + + return CMD_RET_SUCCESS; +} + +static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info cmd) +{ + ulong hdr_addr; + u32 index; + char *endp; + ulong fdt_addr; + u32 fdt_size; + char buf[65]; + + if (argc != 4) + return CMD_RET_USAGE; + + hdr_addr = simple_strtoul(argv[1], &endp, 16); + if (*endp != '\0') { + printf("Error: Wrong image address\n"); + return CMD_RET_FAILURE; + } + + if (!android_dt_check_header(hdr_addr)) { + printf("Error: DT image header is incorrect\n"); + return CMD_RET_FAILURE; + } + + index = simple_strtoul(argv[2], &endp, 0); + if (*endp != '\0') { + printf("Error: Wrong index\n"); + return CMD_RET_FAILURE; + } + + if (!android_dt_get_fdt_by_index(hdr_addr, index, &fdt_addr, &fdt_size)) + return CMD_RET_FAILURE; + + switch (cmd) { + case CMD_DTIMG_START: + snprintf(buf, sizeof(buf), "%lx", fdt_addr); + break; + case CMD_DTIMG_SIZE: + snprintf(buf, sizeof(buf), "%x", fdt_size); + break; + default: + printf("Error: Unknown cmd_dtimg_info value: %d\n", cmd); + return CMD_RET_FAILURE; + } + + env_set(argv[3], buf); + + return CMD_RET_SUCCESS; +} + +static int do_dtimg_start(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + return dtimg_get_fdt(argc, argv, CMD_DTIMG_START); +} + +static int do_dtimg_size(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + return dtimg_get_fdt(argc, argv, CMD_DTIMG_SIZE); +} + +static cmd_tbl_t cmd_dtimg_sub[] = { + U_BOOT_CMD_MKENT(dump, 2, 0, do_dtimg_dump, "", ""), + U_BOOT_CMD_MKENT(start, 4, 0, do_dtimg_start, "", ""), + U_BOOT_CMD_MKENT(size, 4, 0, do_dtimg_size, "", ""), +}; + +static int do_dtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + cmd_tbl_t *cp; + + cp = find_cmd_tbl(argv[1], cmd_dtimg_sub, ARRAY_SIZE(cmd_dtimg_sub)); + + /* Strip off leading 'dtimg' command argument */ + argc--; + argv++; + + if (!cp || argc > cp->maxargs) + return CMD_RET_USAGE; + if (flag == CMD_FLAG_REPEAT && !cp->repeatable) + return CMD_RET_SUCCESS; + + return cp->cmd(cmdtp, flag, argc, argv); +} + +U_BOOT_CMD( + dtimg, CONFIG_SYS_MAXARGS, 0, do_dtimg, + "manipulate dtb/dtbo Android image", + "dump <addr>\n" + " - parse specified image and print its structure info\n" + " <addr>: image address in RAM, in hex\n" + "dtimg start <addr> <index> <varname>\n" + " - get address (hex) of FDT in the image, by index\n" + " <addr>: image address in RAM, in hex\n" + " <index>: index of desired FDT in the image\n" + " <varname>: name of variable where to store address of FDT\n" + "dtimg size <addr> <index> <varname>\n" + " - get size (hex, bytes) of FDT in the image, by index\n" + " <addr>: image address in RAM, in hex\n" + " <index>: index of desired FDT in the image\n" + " <varname>: name of variable where to store size of FDT" +); @@ -57,6 +57,79 @@ static unsigned long load_elf64_image_phdr(unsigned long addr) ++phdr; } + if (ehdr->e_machine == EM_PPC64 && (ehdr->e_flags & + EF_PPC64_ELFV1_ABI)) { + /* + * For the 64-bit PowerPC ELF V1 ABI, e_entry is a function + * descriptor pointer with the first double word being the + * address of the entry point of the function. + */ + uintptr_t addr = ehdr->e_entry; + + return *(Elf64_Addr *)addr; + } + + return ehdr->e_entry; +} + +static unsigned long load_elf64_image_shdr(unsigned long addr) +{ + Elf64_Ehdr *ehdr; /* Elf header structure pointer */ + Elf64_Shdr *shdr; /* Section header structure pointer */ + unsigned char *strtab = 0; /* String table pointer */ + unsigned char *image; /* Binary image pointer */ + int i; /* Loop counter */ + + ehdr = (Elf64_Ehdr *)addr; + + /* Find the section header string table for output info */ + shdr = (Elf64_Shdr *)(addr + (ulong)ehdr->e_shoff + + (ehdr->e_shstrndx * sizeof(Elf64_Shdr))); + + if (shdr->sh_type == SHT_STRTAB) + strtab = (unsigned char *)(addr + (ulong)shdr->sh_offset); + + /* Load each appropriate section */ + for (i = 0; i < ehdr->e_shnum; ++i) { + shdr = (Elf64_Shdr *)(addr + (ulong)ehdr->e_shoff + + (i * sizeof(Elf64_Shdr))); + + if (!(shdr->sh_flags & SHF_ALLOC) || + shdr->sh_addr == 0 || shdr->sh_size == 0) { + continue; + } + + if (strtab) { + debug("%sing %s @ 0x%08lx (%ld bytes)\n", + (shdr->sh_type == SHT_NOBITS) ? "Clear" : "Load", + &strtab[shdr->sh_name], + (unsigned long)shdr->sh_addr, + (long)shdr->sh_size); + } + + if (shdr->sh_type == SHT_NOBITS) { + memset((void *)(uintptr_t)shdr->sh_addr, 0, + shdr->sh_size); + } else { + image = (unsigned char *)addr + (ulong)shdr->sh_offset; + memcpy((void *)(uintptr_t)shdr->sh_addr, + (const void *)image, shdr->sh_size); + } + flush_cache((ulong)shdr->sh_addr, shdr->sh_size); + } + + if (ehdr->e_machine == EM_PPC64 && (ehdr->e_flags & + EF_PPC64_ELFV1_ABI)) { + /* + * For the 64-bit PowerPC ELF V1 ABI, e_entry is a function + * descriptor pointer with the first double word being the + * address of the entry point of the function. + */ + uintptr_t addr = ehdr->e_entry; + + return *(Elf64_Addr *)addr; + } + return ehdr->e_entry; } @@ -107,6 +180,8 @@ static unsigned long load_elf_image_shdr(unsigned long addr) int i; /* Loop counter */ ehdr = (Elf32_Ehdr *)addr; + if (ehdr->e_ident[EI_CLASS] == ELFCLASS64) + return load_elf64_image_shdr(addr); /* Find the section header string table for output info */ shdr = (Elf32_Shdr *)(addr + ehdr->e_shoff + diff --git a/cmd/sata.c b/cmd/sata.c index cc12afb07e..4f0c6e0137 100644 --- a/cmd/sata.c +++ b/cmd/sata.c @@ -107,8 +107,8 @@ static int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) /* If the user has not yet run `sata init`, do it now */ if (sata_curr_device == -1) { rc = sata_probe(0); - if (rc < 0) - return CMD_RET_FAILURE; + if (rc) + return rc; sata_curr_device = 0; } diff --git a/common/Kconfig b/common/Kconfig index 4d7215a360..b3d9b37463 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -539,6 +539,13 @@ config DEFAULT_FDT_FILE help This option is used to set the default fdt file to boot OS. +config MISC_INIT_R + bool "Execute Misc Init" + default y if ARCH_KEYSTONE || ARCH_SUNXI || MPC85xx + default y if ARCH_OMAP2PLUS && !AM33XX + help + Enabling this option calls 'misc_init_r' function + config VERSION_VARIABLE bool "add U-Boot environment variable vers" default n diff --git a/common/Makefile b/common/Makefile index 7100541ece..7473b85011 100644 --- a/common/Makefile +++ b/common/Makefile @@ -108,6 +108,8 @@ obj-$(CONFIG_IO_TRACE) += iotrace.o obj-y += memsize.o obj-y += stdio.o +obj-$(CONFIG_CMD_DTIMG) += image-android-dt.o + ifdef CONFIG_CMD_EEPROM_LAYOUT obj-y += eeprom/eeprom_field.o eeprom/eeprom_layout.o endif diff --git a/common/avb_verify.c b/common/avb_verify.c index 20e35ade30..82ddebcfc2 100644 --- a/common/avb_verify.c +++ b/common/avb_verify.c @@ -700,6 +700,37 @@ static AvbIOResult get_unique_guid_for_partition(AvbOps *ops, } /** + * get_size_of_partition() - gets the size of a partition identified + * by a string name + * + * @ops: contains AVB ops handlers + * @partition: partition name (NUL-terminated UTF-8 string) + * @out_size_num_bytes: returns the value of a partition size + * + * @return: + * AVB_IO_RESULT_OK, on success (GUID found) + * AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE, out_size_num_bytes is NULL + * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION, if partition was not found + */ +static AvbIOResult get_size_of_partition(AvbOps *ops, + const char *partition, + u64 *out_size_num_bytes) +{ + struct mmc_part *part; + + if (!out_size_num_bytes) + return AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE; + + part = get_partition(ops, partition); + if (!part) + return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION; + + *out_size_num_bytes = part->info.blksz * part->info.size; + + return AVB_IO_RESULT_OK; +} + +/** * ============================================================================ * AVB2.0 AvbOps alloc/initialisation/free * ============================================================================ @@ -722,7 +753,7 @@ AvbOps *avb_ops_alloc(int boot_device) ops_data->ops.read_is_device_unlocked = read_is_device_unlocked; ops_data->ops.get_unique_guid_for_partition = get_unique_guid_for_partition; - + ops_data->ops.get_size_of_partition = get_size_of_partition; ops_data->mmc_dev = boot_device; return &ops_data->ops; diff --git a/common/board_r.c b/common/board_r.c index 64f257409c..9402c0ef21 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -690,7 +690,8 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_DM initr_dm, #endif -#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) +#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \ + defined(CONFIG_SANDBOX) board_init, /* Setup chipselects */ #endif /* diff --git a/common/fdt_support.c b/common/fdt_support.c index 34d2bd59c4..d84f5dbade 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -409,7 +409,11 @@ static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size, return p - (char *)buf; } +#if CONFIG_NR_DRAM_BANKS > 4 +#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS +#else #define MEMORY_BANKS_MAX 4 +#endif int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) { int err, nodeoffset; diff --git a/common/image-android-dt.c b/common/image-android-dt.c new file mode 100644 index 0000000000..c0683ee70f --- /dev/null +++ b/common/image-android-dt.c @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 Linaro Ltd. + * Sam Protsenko <semen.protsenko@linaro.org> + */ + +#include <image-android-dt.h> +#include <dt_table.h> +#include <common.h> +#include <linux/libfdt.h> +#include <mapmem.h> + +/** + * Check if image header is correct. + * + * @param hdr_addr Start address of DT image + * @return true if header is correct or false if header is incorrect + */ +bool android_dt_check_header(ulong hdr_addr) +{ + const struct dt_table_header *hdr; + u32 magic; + + hdr = map_sysmem(hdr_addr, sizeof(*hdr)); + magic = fdt32_to_cpu(hdr->magic); + unmap_sysmem(hdr); + + return magic == DT_TABLE_MAGIC; +} + +/** + * Get the address of FDT (dtb or dtbo) in memory by its index in image. + * + * @param hdr_addr Start address of DT image + * @param index Index of desired FDT in image (starting from 0) + * @param[out] addr If not NULL, will contain address to specified FDT + * @param[out] size If not NULL, will contain size of specified FDT + * + * @return true on success or false on error + */ +bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr, + u32 *size) +{ + const struct dt_table_header *hdr; + const struct dt_table_entry *e; + u32 entry_count, entries_offset, entry_size; + ulong e_addr; + u32 dt_offset, dt_size; + + hdr = map_sysmem(hdr_addr, sizeof(*hdr)); + entry_count = fdt32_to_cpu(hdr->dt_entry_count); + entries_offset = fdt32_to_cpu(hdr->dt_entries_offset); + entry_size = fdt32_to_cpu(hdr->dt_entry_size); + unmap_sysmem(hdr); + + if (index > entry_count) { + printf("Error: index > dt_entry_count (%u > %u)\n", index, + entry_count); + return false; + } + + e_addr = hdr_addr + entries_offset + index * entry_size; + e = map_sysmem(e_addr, sizeof(*e)); + dt_offset = fdt32_to_cpu(e->dt_offset); + dt_size = fdt32_to_cpu(e->dt_size); + unmap_sysmem(e); + + if (addr) + *addr = hdr_addr + dt_offset; + if (size) + *size = dt_size; + + return true; +} + +#if !defined(CONFIG_SPL_BUILD) +static void android_dt_print_fdt_info(const struct fdt_header *fdt) +{ + u32 fdt_size; + int root_node_off; + const char *compatible = NULL; + + fdt_size = fdt_totalsize(fdt); + root_node_off = fdt_path_offset(fdt, "/"); + if (root_node_off < 0) { + printf("Error: Root node not found\n"); + } else { + compatible = fdt_getprop(fdt, root_node_off, "compatible", + NULL); + } + + printf(" (FDT)size = %d\n", fdt_size); + printf(" (FDT)compatible = %s\n", + compatible ? compatible : "(unknown)"); +} + +/** + * Print information about DT image structure. + * + * @param hdr_addr Start address of DT image + */ +void android_dt_print_contents(ulong hdr_addr) +{ + const struct dt_table_header *hdr; + u32 entry_count, entries_offset, entry_size; + u32 i; + + hdr = map_sysmem(hdr_addr, sizeof(*hdr)); + entry_count = fdt32_to_cpu(hdr->dt_entry_count); + entries_offset = fdt32_to_cpu(hdr->dt_entries_offset); + entry_size = fdt32_to_cpu(hdr->dt_entry_size); + + /* Print image header info */ + printf("dt_table_header:\n"); + printf(" magic = %08x\n", fdt32_to_cpu(hdr->magic)); + printf(" total_size = %d\n", fdt32_to_cpu(hdr->total_size)); + printf(" header_size = %d\n", fdt32_to_cpu(hdr->header_size)); + printf(" dt_entry_size = %d\n", entry_size); + printf(" dt_entry_count = %d\n", entry_count); + printf(" dt_entries_offset = %d\n", entries_offset); + printf(" page_size = %d\n", fdt32_to_cpu(hdr->page_size)); + printf(" version = %d\n", fdt32_to_cpu(hdr->version)); + + unmap_sysmem(hdr); + + /* Print image entries info */ + for (i = 0; i < entry_count; ++i) { + const ulong e_addr = hdr_addr + entries_offset + i * entry_size; + const struct dt_table_entry *e; + const struct fdt_header *fdt; + u32 dt_offset, dt_size; + u32 j; + + e = map_sysmem(e_addr, sizeof(*e)); + dt_offset = fdt32_to_cpu(e->dt_offset); + dt_size = fdt32_to_cpu(e->dt_size); + + printf("dt_table_entry[%d]:\n", i); + printf(" dt_size = %d\n", dt_size); + printf(" dt_offset = %d\n", dt_offset); + printf(" id = %08x\n", fdt32_to_cpu(e->id)); + printf(" rev = %08x\n", fdt32_to_cpu(e->rev)); + for (j = 0; j < 4; ++j) { + printf(" custom[%d] = %08x\n", j, + fdt32_to_cpu(e->custom[j])); + } + + unmap_sysmem(e); + + /* Print FDT info for this entry */ + fdt = map_sysmem(hdr_addr + dt_offset, sizeof(*fdt)); + android_dt_print_fdt_info(fdt); + unmap_sysmem(fdt); + } +} +#endif diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 0ad1e049a9..b44b7412fd 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -409,7 +409,7 @@ config SPL_LIBCOMMON_SUPPORT an SPL build. config SPL_LIBDISK_SUPPORT - bool "Support disk paritions" + bool "Support disk partitions" help Enable support for disk partitions within SPL. 'Disk' is something of a misnomer as it includes non-spinning media such as flash (as diff --git a/common/spl/spl.c b/common/spl/spl.c index eda84d0c74..19508c7168 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -317,8 +317,6 @@ static int spl_common_init(bool setup_malloc) { int ret; - debug("spl_early_init()\n"); - #if CONFIG_VAL(SYS_MALLOC_F_LEN) if (setup_malloc) { #ifdef CONFIG_MALLOC_F_ADDR @@ -366,6 +364,8 @@ int spl_early_init(void) { int ret; + debug("%s\n", __func__); + ret = spl_common_init(true); if (ret) return ret; @@ -380,6 +380,8 @@ int spl_init(void) bool setup_malloc = !(IS_ENABLED(CONFIG_SPL_STACK_R) && IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIMPLE)); + debug("%s\n", __func__); + if (!(gd->flags & GD_FLG_SPL_EARLY_INIT)) { ret = spl_common_init(setup_malloc); if (ret) diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig index acd7fb8d7c..8635bf8716 100644 --- a/configs/10m50_defconfig +++ b/configs/10m50_defconfig @@ -1,6 +1,7 @@ CONFIG_NIOS2=y CONFIG_SYS_CONFIG_NAME="10m50_devboard" CONFIG_DEFAULT_DEVICE_TREE="10m50_devboard" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index c378d87389..e19ff89046 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -1,6 +1,7 @@ CONFIG_NIOS2=y CONFIG_SYS_CONFIG_NAME="3c120_devboard" CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index feb1173c0b..3d56756114 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -10,12 +10,14 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y +CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 9498a6d752..ab576ba99e 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -8,11 +8,13 @@ CONFIG_MMC1_CD_PIN="PG13" CONFIG_MMC_SUNXI_SLOT_EXTRA=1 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_AXP152_POWER=y CONFIG_CONS_INDEX=2 diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index ed507cdf0b..04d588c0ff 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="PB10" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index b8ec1e54db..b02fe5bc53 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index 5657fc2594..dfbf311093 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -11,6 +11,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y @@ -23,6 +24,7 @@ CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 134d1d3fef..632482a8da 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -10,6 +10,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y @@ -22,6 +23,7 @@ CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index b7c13a6932..dd6febfe52 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -8,6 +8,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -15,6 +16,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig index a03c752aa6..95ba3250a2 100644 --- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -10,6 +10,7 @@ CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro-emmc" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -17,6 +18,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SUN7I_GMAC_FORCE_TXERR=y CONFIG_AXP_ALDO3_VOLT=2800 diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index 8dcbdc08f9..8cb48df364 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -11,6 +11,7 @@ CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -18,6 +19,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SUN7I_GMAC_FORCE_TXERR=y CONFIG_AXP_ALDO3_VOLT=2800 diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index a06499e2d0..82fa10955c 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -12,6 +12,7 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_SATAPWR="PC3" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -20,6 +21,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index 3bb8c4c7e6..32a17f4d11 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -12,6 +12,7 @@ CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb-emmc" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -24,6 +25,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index cfb7ffa556..fd4629e3db 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -11,6 +11,7 @@ CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -23,6 +24,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig index 744e7ef511..f622b2fa41 100644 --- a/configs/A33-OLinuXino_defconfig +++ b/configs/A33-OLinuXino_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PB2" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig index 3e47ca2466..3135130182 100644 --- a/configs/Ainol_AW1_defconfig +++ b/configs/Ainol_AW1_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ainol-aw1" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index b0d6047789..454cf93ce9 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index ce4806cf5e..8877d8acfa 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t003" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 5faf45c3d7..3b32240337 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index 05d2f35353..5711f091b8 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -40,9 +40,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig index 05b82aaca2..1ba0fe934a 100644 --- a/configs/B4420QDS_SPIFLASH_defconfig +++ b/configs/B4420QDS_SPIFLASH_defconfig @@ -29,9 +29,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig index 7d472ce99d..4dd8faae86 100644 --- a/configs/B4420QDS_defconfig +++ b/configs/B4420QDS_defconfig @@ -28,9 +28,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index 802ac75ae9..0cd3223ff2 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -40,9 +40,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig index ea2426f20f..16c48a01bb 100644 --- a/configs/B4860QDS_SECURE_BOOT_defconfig +++ b/configs/B4860QDS_SECURE_BOOT_defconfig @@ -29,9 +29,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig index ca35b5dcd4..8192888722 100644 --- a/configs/B4860QDS_SPIFLASH_defconfig +++ b/configs/B4860QDS_SPIFLASH_defconfig @@ -29,9 +29,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig index 3819e8c0e7..9bfed3c111 100644 --- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig @@ -28,9 +28,9 @@ CONFIG_FSL_CAAM=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig index ced3740c1f..af9adf25a1 100644 --- a/configs/B4860QDS_defconfig +++ b/configs/B4860QDS_defconfig @@ -28,9 +28,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig index 7c190cfd89..4f04ae8140 100644 --- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig @@ -11,6 +11,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y @@ -34,7 +35,7 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig index 11adf978c4..fee0c2037a 100644 --- a/configs/BSC9131RDB_NAND_defconfig +++ b/configs/BSC9131RDB_NAND_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y @@ -33,7 +34,7 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig index 3c7293bcd9..9058c15435 100644 --- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH,SYS_CLK_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y @@ -29,7 +30,7 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig index 50e7ad3693..76721d4a02 100644 --- a/configs/BSC9131RDB_SPIFLASH_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y @@ -29,7 +30,7 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig index 4cbaa84e8f..3abecded67 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig index 5c2536ba1e..e26809406f 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig @@ -38,9 +38,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig index 75707ea15b..eddf42693c 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig index 1f32702984..20c3bd39b0 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig @@ -38,9 +38,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig index 6a103f7475..87329cc5db 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig index aa4880e7b7..679f53f7d6 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig index 6551d9de90..6851344c69 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig index 30f310fb86..f06780d3fd 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig index 704437a5af..611eac0560 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig index ddc81f7d8b..48ef31c780 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig index 424b741db9..a7ad1ffe35 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig index e7586eb7e2..f0828ad5ae 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig index eef0176010..95b7275228 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig index 0203943370..a2bca0e742 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig index 947b8125a1..6d13c420fb 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig index 4016abac3f..cda838a29f 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index fde829fd71..0123ccee12 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 7a9b5fe0e5..3b7c56cfee 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -8,6 +8,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -17,6 +18,7 @@ CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index 2316437c94..71e21ac1cb 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC0_CD_PIN="PB4" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index 5a8ded0493..ca2bd8c024 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -10,6 +10,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -19,6 +20,7 @@ CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO4_VOLT=2500 CONFIG_SCSI=y diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index 610905d53e..22e2703ed5 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_SUPPORT=y @@ -39,9 +40,9 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index 87781b180b..337b287ec4 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -26,9 +27,9 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index 0f6f166da2..a8cf2c0d0b 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -27,9 +28,9 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig index 143d4f323d..f6d49f8d41 100644 --- a/configs/C29XPCIE_SPIFLASH_defconfig +++ b/configs/C29XPCIE_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -26,9 +27,9 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig index 240644f4f3..8fe205f06c 100644 --- a/configs/C29XPCIE_defconfig +++ b/configs/C29XPCIE_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -25,9 +26,9 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index c122944881..b674b6cc74 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -6,6 +6,7 @@ CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 5d63fadef5..ae3ca4d14f 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0" diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index b103e7e00d..a739806687 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -6,11 +6,13 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_AXP_DLDO1_VOLT=3300 diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 645a759fc2..3550ed76d9 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index c85e47cb11..18f2f2f5c2 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -16,12 +16,14 @@ CONFIG_VIDEO_LCD_PANEL_I2C_SDA="PA23" CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24" CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 418da63ba8..a08f538602 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -7,6 +7,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -14,6 +15,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Cubieboard4_defconfig b/configs/Cubieboard4_defconfig index 16b1862334..59f4ecd175 100644 --- a/configs/Cubieboard4_defconfig +++ b/configs/Cubieboard4_defconfig @@ -12,6 +12,7 @@ CONFIG_USB1_VBUS_PIN="PH14" CONFIG_USB3_VBUS_PIN="PH15" CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cubieboard4" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 27223d201e..cc0569c669 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -7,12 +7,14 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y +CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index 601eb3ca0c..8f46c47344 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -12,6 +12,7 @@ CONFIG_SATAPWR="PH12" CONFIG_GMAC_TX_DELAY=1 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y @@ -24,6 +25,7 @@ CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index d76bc6748b..ff5d3b595c 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -14,6 +14,7 @@ CONFIG_USB2_VBUS_PIN="PL6" CONFIG_I2C0_ENABLE=y CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-cubietruck-plus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Cyrus_P5020_defconfig b/configs/Cyrus_P5020_defconfig index d2e7e7364c..cf61c62ad0 100644 --- a/configs/Cyrus_P5020_defconfig +++ b/configs/Cyrus_P5020_defconfig @@ -30,8 +30,8 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/Cyrus_P5040_defconfig b/configs/Cyrus_P5040_defconfig index 33d010c28f..832b694a71 100644 --- a/configs/Cyrus_P5040_defconfig +++ b/configs/Cyrus_P5040_defconfig @@ -30,8 +30,8 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig index bac5859130..f588120b26 100644 --- a/configs/Empire_electronix_d709_defconfig +++ b/configs/Empire_electronix_d709_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index 47f3fe7e2e..8bf0a765a9 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index 24126fde28..e49a34ad08 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -8,12 +8,14 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 72327c90fc..187e254eb4 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index dfef071476..ff2839511c 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -7,6 +7,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -14,6 +15,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index 9ed1f02d52..716799d56c 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -9,6 +9,7 @@ CONFIG_SATAPWR="PB3" CONFIG_GMAC_TX_DELAY=4 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -19,6 +20,7 @@ CONFIG_B53_SWITCH=y CONFIG_B53_PHY_PORTS=0x1f CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index 6cf0940776..0c7ac3a5ce 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 CONFIG_DRAM_ZQ=14779 CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index 2df6761455..92dd99e212 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -9,6 +9,7 @@ CONFIG_SATAPWR="PH2" CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -17,6 +18,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index d7e9c26cbf..1dae7c0f6d 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=122 CONFIG_SATAPWR="PH2" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -15,6 +16,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SCSI_AHCI=y CONFIG_DM_MMC=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index 500f885599..439f502dad 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -5,11 +5,13 @@ CONFIG_MACH_SUN4I=y CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 684aae562d..920476042d 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -13,3 +13,4 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index f24955cd30..7d3b6d8581 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -18,3 +18,4 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 97a4bcd629..78d8ddc130 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -18,3 +18,4 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index 6f5ad073df..7a4e1d4346 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -14,3 +14,4 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 5043a8c8aa..8619c89996 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -16,3 +16,4 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index 6cc67abcca..3f10c15a83 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -14,3 +14,4 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 38898e8ac7..5b0430f3ef 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -16,3 +16,4 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 31d50e4f44..0b66da2645 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -16,3 +16,4 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index a2b8770c70..b2c97b8485 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -16,3 +16,4 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 2cfb605acb..38641f42e5 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -16,3 +16,4 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index 8d6e1dfc43..f69f405d5a 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -22,5 +22,6 @@ CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index 5fe6b1bc17..04ca3a8114 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -21,5 +21,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index 968707734b..f6acf6019d 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -21,5 +21,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 8002697baf..6b631d6d4b 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -21,5 +21,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index 4e8ef73222..b2266a0577 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -22,5 +22,6 @@ CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index 8d6e1dfc43..f69f405d5a 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -22,5 +22,6 @@ CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index d42ba8ac91..070c4e7392 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -24,5 +24,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index 724e512083..d819ad4112 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -23,5 +23,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index 11d7b734e3..75d85de27a 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index 5620c4ec54..84303f11c2 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -29,5 +29,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index d1dbd9cda5..ec5d69ae9f 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 3af7dbfe25..7019cd66d9 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index 28a2e48a74..62e9d26fa6 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -28,5 +28,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_CF_SPI=y diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig index 1ebd1c251e..5f18579d52 100644 --- a/configs/M5475AFE_defconfig +++ b/configs/M5475AFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig index e8086583de..29977f30a1 100644 --- a/configs/M5475BFE_defconfig +++ b/configs/M5475BFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig index 2cb413128c..14f29469cc 100644 --- a/configs/M5475CFE_defconfig +++ b/configs/M5475CFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig index 79326e3584..ee7e45648e 100644 --- a/configs/M5475DFE_defconfig +++ b/configs/M5475DFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig index 7a1dc4660f..302651f964 100644 --- a/configs/M5475EFE_defconfig +++ b/configs/M5475EFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig index 71ee123090..a3f418862c 100644 --- a/configs/M5475FFE_defconfig +++ b/configs/M5475FFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig index ee7793cdf7..39d3409409 100644 --- a/configs/M5475GFE_defconfig +++ b/configs/M5475GFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig index ea19f3110d..496db41e34 100644 --- a/configs/M5485AFE_defconfig +++ b/configs/M5485AFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig index 6b4de534e8..b5b5153199 100644 --- a/configs/M5485BFE_defconfig +++ b/configs/M5485BFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig index e73585b732..a0446feac0 100644 --- a/configs/M5485CFE_defconfig +++ b/configs/M5485CFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig index 3d289f77b0..ba4f03c5bf 100644 --- a/configs/M5485DFE_defconfig +++ b/configs/M5485DFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig index 3eabbc5195..0c24ab7b30 100644 --- a/configs/M5485EFE_defconfig +++ b/configs/M5485EFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig index be49ce140a..1399d91b35 100644 --- a/configs/M5485FFE_defconfig +++ b/configs/M5485FFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig index 6ce5c6d2d5..162618b00b 100644 --- a/configs/M5485GFE_defconfig +++ b/configs/M5485GFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig index 53b88a3ccb..201610c65a 100644 --- a/configs/M5485HFE_defconfig +++ b/configs/M5485HFE_defconfig @@ -15,6 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index a75d68c179..f8e4a47172 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -41,6 +41,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run flashboot" +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="S3K> " @@ -65,7 +66,6 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_MPC8XX_FEC=y # CONFIG_PCI is not set CONFIG_SHA256=y diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index 62768b8656..d0a8f7aba8 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig index 0fdba291a1..8e9cf9bf04 100644 --- a/configs/MPC8308RDB_defconfig +++ b/configs/MPC8308RDB_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=5 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +23,7 @@ CONFIG_CMD_FAT=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig index fcac27e96f..ac60840371 100644 --- a/configs/MPC8313ERDB_33_defconfig +++ b/configs/MPC8313ERDB_33_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" CONFIG_BOOTDELAY=6 +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -24,7 +25,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(ker # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig index e31f2709bc..8a0784dd2a 100644 --- a/configs/MPC8313ERDB_66_defconfig +++ b/configs/MPC8313ERDB_66_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" CONFIG_BOOTDELAY=6 +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -24,7 +25,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(ker # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig index 08587b7538..141ecb843b 100644 --- a/configs/MPC8313ERDB_NAND_33_defconfig +++ b/configs/MPC8313ERDB_NAND_33_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" CONFIG_BOOTDELAY=6 +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_SUPPORT=y @@ -31,7 +32,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_MTD_NOR_FLASH=y CONFIG_NAND=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig index a6bd729a5a..5a3bde4de2 100644 --- a/configs/MPC8313ERDB_NAND_66_defconfig +++ b/configs/MPC8313ERDB_NAND_66_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" CONFIG_BOOTDELAY=6 +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_SUPPORT=y @@ -31,7 +32,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_MTD_NOR_FLASH=y CONFIG_NAND=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig index 58e4361a6f..533a8fbb46 100644 --- a/configs/MPC8315ERDB_defconfig +++ b/configs/MPC8315ERDB_defconfig @@ -25,7 +25,7 @@ CONFIG_FSL_SATA=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig index cb3f9742b3..7d523308d8 100644 --- a/configs/MPC8349ITXGP_defconfig +++ b/configs/MPC8349ITXGP_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitxgp:eth0:off console=ttyS0,115200" +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="MPC8349E-mITX-GP> " CONFIG_CMD_IMLS=y @@ -21,7 +22,7 @@ CONFIG_CMD_DATE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig index 40fd98a253..d740908290 100644 --- a/configs/MPC8349ITX_LOWBOOT_defconfig +++ b/configs/MPC8349ITX_LOWBOOT_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX" CONFIG_BOOTDELAY=6 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200" +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="MPC8349E-mITX> " CONFIG_CMD_IMLS=y @@ -28,7 +29,7 @@ CONFIG_SATA_SIL3114=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig index 3b0d0e4df9..03f20c39ae 100644 --- a/configs/MPC8349ITX_defconfig +++ b/configs/MPC8349ITX_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX" CONFIG_BOOTDELAY=6 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=:/nfsroot/rootfs ip=::::mpc8349emitx:eth0:off console=ttyS0,115200" +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="MPC8349E-mITX> " CONFIG_CMD_IMLS=y @@ -28,7 +29,7 @@ CONFIG_SATA_SIL3114=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig index 9c4dbacf23..05afeb7b70 100644 --- a/configs/MPC837XEMDS_HOST_defconfig +++ b/configs/MPC837XEMDS_HOST_defconfig @@ -22,7 +22,7 @@ CONFIG_CMD_FAT=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig index 621af02fdc..76a7c1c082 100644 --- a/configs/MPC837XEMDS_defconfig +++ b/configs/MPC837XEMDS_defconfig @@ -20,7 +20,7 @@ CONFIG_CMD_FAT=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index bd9e727e83..5d94a21639 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_MPC837XERDB=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y @@ -22,7 +23,6 @@ CONFIG_FSL_SATA=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig index 83f9084944..925f3fac4d 100644 --- a/configs/MPC8536DS_36BIT_defconfig +++ b/configs/MPC8536DS_36BIT_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -30,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig index adb3b7f079..afc4d1f799 100644 --- a/configs/MPC8536DS_SDCARD_defconfig +++ b/configs/MPC8536DS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -29,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig index f4cbd31e0e..1671da1b5f 100644 --- a/configs/MPC8536DS_SPIFLASH_defconfig +++ b/configs/MPC8536DS_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -29,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig index 1cee787862..46583baa3e 100644 --- a/configs/MPC8536DS_defconfig +++ b/configs/MPC8536DS_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -29,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig index 7332d9ae68..c076c5264d 100644 --- a/configs/MPC8541CDS_defconfig +++ b/configs/MPC8541CDS_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_MPC8541CDS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y CONFIG_CMD_IMLS=y @@ -18,7 +19,7 @@ CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig index 605d2b4fa5..6e8418b93d 100644 --- a/configs/MPC8541CDS_legacy_defconfig +++ b/configs/MPC8541CDS_legacy_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y CONFIG_CMD_IMLS=y @@ -19,7 +20,7 @@ CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig index d60d6c7610..bcc0f6440e 100644 --- a/configs/MPC8544DS_defconfig +++ b/configs/MPC8544DS_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y CONFIG_CMD_IMLS=y @@ -23,9 +24,9 @@ CONFIG_SCSI_AHCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_RTL8139=y CONFIG_TSEC_ENET=y CONFIG_SCSI=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 6a35ac15bf..94623b7e7c 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -7,6 +7,7 @@ CONFIG_PHYS_64BIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y @@ -18,9 +19,9 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 9c521e1861..b579315747 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_MPC8548CDS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y @@ -17,9 +18,9 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 0aa112aea7..d00829d920 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y @@ -17,9 +18,9 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig index 40a7932559..87440a3a3c 100644 --- a/configs/MPC8555CDS_defconfig +++ b/configs/MPC8555CDS_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_MPC8555CDS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y CONFIG_CMD_IMLS=y @@ -18,7 +19,7 @@ CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig index 4d1acd4c4d..dd777f8982 100644 --- a/configs/MPC8555CDS_legacy_defconfig +++ b/configs/MPC8555CDS_legacy_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LEGACY" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y CONFIG_CMD_IMLS=y @@ -19,7 +20,7 @@ CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig index 934ef3b456..4e70f905c2 100644 --- a/configs/MPC8568MDS_defconfig +++ b/configs/MPC8568MDS_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_MPC8568MDS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y @@ -20,7 +21,7 @@ CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8569MDS_ATM_defconfig b/configs/MPC8569MDS_ATM_defconfig index cc5743b16b..bc1687a630 100644 --- a/configs/MPC8569MDS_ATM_defconfig +++ b/configs/MPC8569MDS_ATM_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="ATM" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/MPC8569MDS_defconfig b/configs/MPC8569MDS_defconfig index cbe0f9f988..0109516327 100644 --- a/configs/MPC8569MDS_defconfig +++ b/configs/MPC8569MDS_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_MPC8569MDS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig index f2b26af6b8..938a435c27 100644 --- a/configs/MPC8572DS_36BIT_defconfig +++ b/configs/MPC8572DS_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y @@ -26,9 +27,9 @@ CONFIG_SYS_FSL_DDR2=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig index 604ffc10bf..42ce6f4fd6 100644 --- a/configs/MPC8572DS_defconfig +++ b/configs/MPC8572DS_defconfig @@ -8,6 +8,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y @@ -25,9 +26,9 @@ CONFIG_SYS_FSL_DDR2=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig index acdb28018b..2df03d7a00 100644 --- a/configs/MPC8610HPCD_defconfig +++ b/configs/MPC8610HPCD_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig index 4d4028a90a..5819e71464 100644 --- a/configs/MPC8641HPCN_36BIT_defconfig +++ b/configs/MPC8641HPCN_36BIT_defconfig @@ -22,7 +22,7 @@ CONFIG_SCSI_AHCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig index b3dd6ac72b..39db233540 100644 --- a/configs/MPC8641HPCN_defconfig +++ b/configs/MPC8641HPCN_defconfig @@ -22,7 +22,7 @@ CONFIG_SCSI_AHCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index 309b384a4e..fc2c081457 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -9,6 +9,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-primo73" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index 04b0b63259..b11685198a 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-primo81" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 55c27b8435..4226fdecf3 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -4,11 +4,13 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y +CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_SUNXI_NO_PMIC=y CONFIG_SCSI=y diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index e084454293..2306963ca6 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -7,11 +7,13 @@ CONFIG_INITIAL_USB_SCAN_DELAY=2000 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_AXP_ALDO1_VOLT=3300 diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index 367f2aaf7a..353d4c8137 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -7,12 +7,14 @@ CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y +CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index 4fa61d311f..eb22c7b862 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -6,11 +6,13 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_AXP_ALDO1_VOLT=3300 diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index 9f48bd91e0..7666a3b3bd 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -8,12 +8,14 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index 6b198be6f6..edd2201dfb 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -8,6 +8,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -15,6 +16,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index af89c50ee1..fcb9ea93d3 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -6,11 +6,13 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_AXP_ALDO1_VOLT=3300 diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig index 329362d336..788cf83ba3 100644 --- a/configs/Merrii_A80_Optimus_defconfig +++ b/configs/Merrii_A80_Optimus_defconfig @@ -12,6 +12,7 @@ CONFIG_USB1_VBUS_PIN="PH4" CONFIG_USB3_VBUS_PIN="PH5" CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index e32935e132..ab507b4fb6 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN4I=y CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index 990bb25c41..de37c74fd4 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ODT_EN=y CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index 88e55495d5..cf2e3cd792 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -11,6 +11,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -19,6 +20,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 46f27be254..a837f26c25 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -21,6 +22,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig index 6e57ddf075..3c767087fb 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index a82d8f4bf6..d4057f0ffb 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -46,9 +46,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig index ce87ac489f..ee9492d05e 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig @@ -32,9 +32,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 9bf317f540..2ba579d959 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 557d23ae8f..7ef9011a5c 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -42,9 +42,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig index 07ba327b31..eb10eef2b8 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index ad6d300b3a..89cfcfef3f 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -43,9 +43,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig index 18be7e08a4..e1e8e2a6c7 100644 --- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig @@ -32,9 +32,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 32e56822d7..1a02d70d9a 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -45,9 +45,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig index f861061e73..adbb76c4ca 100644 --- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 63734579ef..38b70479ab 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index a310f271c3..bdb5db2ce3 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -41,9 +41,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig index 2c78da2772..e23473793d 100644 --- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig @@ -32,9 +32,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 1ee9b47d0e..a42a6e3a02 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -42,9 +42,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig index ab1c4cfd3e..0d46f26c94 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index cf43a7b555..1388dcade1 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -46,9 +46,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig index c3a2375e74..4b805169b0 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig @@ -32,9 +32,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 77fa6c9f8d..037fbba28d 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index b148271a22..79d695d078 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -42,9 +42,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig index 4e5ff65d95..e6032fd235 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig @@ -33,9 +33,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 487bc3a368..54f07db75f 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -43,9 +43,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig index 4ad21db663..bc7be37f57 100644 --- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig @@ -32,9 +32,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index b082a55b6c..a66da9e06f 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -45,9 +45,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig index 2dcc7fa0e7..0f3e2f6dce 100644 --- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index d92e1a24bd..08558c65a5 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 467024aa01..3a0291b7e4 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -41,9 +41,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig index 96f8328f7a..3e65ac08e0 100644 --- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig @@ -32,9 +32,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index a408227bb4..c15fecec5e 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -42,9 +42,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig index 7bba663e23..edaa0f99cf 100644 --- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -39,9 +40,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig index 33b5f2ddea..93f3c60b8e 100644 --- a/configs/P1020MBG-PC_36BIT_defconfig +++ b/configs/P1020MBG-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -29,9 +30,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig index d509732b59..c62138e13c 100644 --- a/configs/P1020MBG-PC_SDCARD_defconfig +++ b/configs/P1020MBG-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -38,9 +39,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig index 5247b9c09a..ec4cc08ea4 100644 --- a/configs/P1020MBG-PC_defconfig +++ b/configs/P1020MBG-PC_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -28,9 +29,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 66830a9d8a..cbe6791d78 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -44,9 +45,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 582bdd2f5a..fbe2ae923e 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -41,9 +42,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index c0588dd132..3e2ab2b56e 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -42,9 +43,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index d9901b6391..3ceb8f959c 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -31,9 +32,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 9ff8a6b098..604015522a 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -43,9 +44,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 89a7f82af4..bb2685f4e2 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -40,9 +41,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 7e22d5dce8..2550b07fa0 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -41,9 +42,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 99b373e183..5b2e332689 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -30,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index fc53e559c5..2f006c04a1 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -47,9 +48,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 9f51a0b70d..fe86e16364 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -44,9 +45,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index c66b562ecd..bfd2796514 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -45,9 +46,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index acce34a039..c836b7db87 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -34,9 +35,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig index 744b60940c..06bdb00598 100644 --- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -39,9 +40,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig index c20d44aa4e..f907ab4a14 100644 --- a/configs/P1020UTM-PC_36BIT_defconfig +++ b/configs/P1020UTM-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -29,9 +30,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig index b9b9aeebda..981326d6d3 100644 --- a/configs/P1020UTM-PC_SDCARD_defconfig +++ b/configs/P1020UTM-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -38,9 +39,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig index 0d1acd55b0..c637bbb204 100644 --- a/configs/P1020UTM-PC_defconfig +++ b/configs/P1020UTM-PC_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -28,9 +29,9 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig index 7f0ccf662d..5f4f744000 100644 --- a/configs/P1021RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -49,9 +50,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig index 92c2eb860f..a54ed1670d 100644 --- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -46,9 +47,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig index 46a7442559..567a3fa106 100644 --- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -47,9 +48,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig index c4e8eb6ee8..5a6daea638 100644 --- a/configs/P1021RDB-PC_36BIT_defconfig +++ b/configs/P1021RDB-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -36,9 +37,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig index 0a5020f9ca..2ae51b55dd 100644 --- a/configs/P1021RDB-PC_NAND_defconfig +++ b/configs/P1021RDB-PC_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -48,9 +49,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig index 8398bb89ef..0982787b8a 100644 --- a/configs/P1021RDB-PC_SDCARD_defconfig +++ b/configs/P1021RDB-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -45,9 +46,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig index 7b6ef3b21b..faf781b8c5 100644 --- a/configs/P1021RDB-PC_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -46,9 +47,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig index 553c04e0cf..129cd3f8b1 100644 --- a/configs/P1021RDB-PC_defconfig +++ b/configs/P1021RDB-PC_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -35,9 +36,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig index 8c1e5573bf..944efcc4b9 100644 --- a/configs/P1022DS_36BIT_NAND_defconfig +++ b/configs/P1022DS_36BIT_NAND_defconfig @@ -48,9 +48,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig index 3426dd3508..0aa7103376 100644 --- a/configs/P1022DS_36BIT_SDCARD_defconfig +++ b/configs/P1022DS_36BIT_SDCARD_defconfig @@ -45,9 +45,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig index 950f79bd90..109c8f43cf 100644 --- a/configs/P1022DS_36BIT_SPIFLASH_defconfig +++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig @@ -46,9 +46,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig index c864f2917b..bf37365445 100644 --- a/configs/P1022DS_36BIT_defconfig +++ b/configs/P1022DS_36BIT_defconfig @@ -35,9 +35,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig index c944f825b2..77fe9c09c5 100644 --- a/configs/P1022DS_NAND_defconfig +++ b/configs/P1022DS_NAND_defconfig @@ -47,9 +47,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig index 80fd574f91..21113b0d9a 100644 --- a/configs/P1022DS_SDCARD_defconfig +++ b/configs/P1022DS_SDCARD_defconfig @@ -44,9 +44,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig index 7a57a4a284..c0ead20d57 100644 --- a/configs/P1022DS_SPIFLASH_defconfig +++ b/configs/P1022DS_SPIFLASH_defconfig @@ -45,9 +45,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig index 74b559ca9b..78272618eb 100644 --- a/configs/P1022DS_defconfig +++ b/configs/P1022DS_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig index d26e72f50e..a740803751 100644 --- a/configs/P1023RDB_defconfig +++ b/configs/P1023RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=-1 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -29,9 +30,9 @@ CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig index 4024bbd4ec..566e05a796 100644 --- a/configs/P1024RDB_36BIT_defconfig +++ b/configs/P1024RDB_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -31,9 +32,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig index dc644ab923..14bd81837b 100644 --- a/configs/P1024RDB_NAND_defconfig +++ b/configs/P1024RDB_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -43,9 +44,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig index e3401b019e..a5b822e81e 100644 --- a/configs/P1024RDB_SDCARD_defconfig +++ b/configs/P1024RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -40,9 +41,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig index ad34e9e439..01e410a882 100644 --- a/configs/P1024RDB_SPIFLASH_defconfig +++ b/configs/P1024RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -41,9 +42,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig index de5e3b10e0..8ddf3b0be2 100644 --- a/configs/P1024RDB_defconfig +++ b/configs/P1024RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -30,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig index 42c3ffd99d..143f4670cb 100644 --- a/configs/P1025RDB_36BIT_defconfig +++ b/configs/P1025RDB_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -33,9 +34,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig index 9bdbbb13b1..d8e145a15f 100644 --- a/configs/P1025RDB_NAND_defconfig +++ b/configs/P1025RDB_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -45,9 +46,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig index 66d94b36af..eabf075b6f 100644 --- a/configs/P1025RDB_SDCARD_defconfig +++ b/configs/P1025RDB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -42,9 +43,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig index edf826f57b..20be5458d6 100644 --- a/configs/P1025RDB_SPIFLASH_defconfig +++ b/configs/P1025RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -43,9 +44,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig index fb057bd213..189e4ee44f 100644 --- a/configs/P1025RDB_defconfig +++ b/configs/P1025RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -32,9 +33,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index b074e7c18b..3a1382a180 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -49,9 +50,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index c251c27eb3..6e8fc92e19 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -46,9 +47,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 5f495b1cf3..fa40cc418b 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -47,9 +48,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 86c0deb714..90af3c12a2 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -36,9 +37,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index ff7bfd74cb..3c9fd49cf3 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -48,9 +49,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index a1b95baafe..b676ab72a0 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -45,9 +46,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index e0628cca09..63d23fd9b8 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set @@ -46,9 +47,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 55da1851c2..ab83d43438 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -35,9 +36,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 774d7f12bc..00d48ab41a 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -31,9 +31,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 2022f9bfac..d137456ef5 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig index 9c84397673..b876ea688f 100644 --- a/configs/P2041RDB_SECURE_BOOT_defconfig +++ b/configs/P2041RDB_SECURE_BOOT_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 51840a0492..4f48e3f08e 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig index 5943992fa3..75dedf3474 100644 --- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig @@ -29,9 +29,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 8c9e03316e..2461895dd5 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -29,9 +29,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig index e8cd5ad390..27366b3d96 100644 --- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig @@ -32,9 +32,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index faf1f1fe1a..627025a95d 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -31,9 +31,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 95ecbab632..0e644c65f1 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig index 023b75e8e4..1a3363a710 100644 --- a/configs/P3041DS_SECURE_BOOT_defconfig +++ b/configs/P3041DS_SECURE_BOOT_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 256e4f9b3d..64dd6ef7e6 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig index a49f408f88..8e39410e8f 100644 --- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig @@ -29,9 +29,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 3694eb41ea..33fa23ea84 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -29,9 +29,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 489188faa1..74e2d4be88 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig index c9677e94d5..ad463560d3 100644 --- a/configs/P4080DS_SECURE_BOOT_defconfig +++ b/configs/P4080DS_SECURE_BOOT_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 74d5746ef5..c3ef630f52 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig index 771e7250d8..9b3ba816f0 100644 --- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig @@ -29,9 +29,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 4f6f84eafe..61d225febf 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -29,9 +29,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig index 781f2fe850..9866386591 100644 --- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig @@ -33,9 +33,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig index 6dab4a15c0..399de815be 100644 --- a/configs/P5020DS_NAND_defconfig +++ b/configs/P5020DS_NAND_defconfig @@ -32,9 +32,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig index 71b3d07320..badbeb9a3e 100644 --- a/configs/P5020DS_SDCARD_defconfig +++ b/configs/P5020DS_SDCARD_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig index b3483e708f..e8edce687d 100644 --- a/configs/P5020DS_SECURE_BOOT_defconfig +++ b/configs/P5020DS_SECURE_BOOT_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig index 082689d56d..a89a0f52ad 100644 --- a/configs/P5020DS_SPIFLASH_defconfig +++ b/configs/P5020DS_SPIFLASH_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig index 5739e5098a..e81af0e779 100644 --- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig @@ -30,9 +30,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig index ac96ccacbf..d524cfb48c 100644 --- a/configs/P5020DS_defconfig +++ b/configs/P5020DS_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig index 00a894db8f..a3d28cbc83 100644 --- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig @@ -33,9 +33,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 572a979776..23822ea9cf 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -32,9 +32,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 501f336963..c29ce5c995 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig index 159842edf2..8db2658fe1 100644 --- a/configs/P5040DS_SECURE_BOOT_defconfig +++ b/configs/P5040DS_SECURE_BOOT_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 0486585bc1..8dd5404567 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -31,9 +31,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 5fb5742139..93ff1aba2d 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -30,9 +30,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index c786120e7f..eb4e32ef32 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw" CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y @@ -35,6 +36,7 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=10 CONFIG_MV88E61XX_PHY_PORTS=0x003 CONFIG_MV88E61XX_FIXED_PORTS=0x300 +CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SPI=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 05a1c18eae..6e35d996a4 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat" CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -39,5 +40,6 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=10 CONFIG_MV88E61XX_PHY_PORTS=0x003 CONFIG_MV88E61XX_FIXED_PORTS=0x300 +CONFIG_MII=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 9744aef096..03fbb2a12f 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -10,11 +10,13 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 394534b8b5..bbe2c18465 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig b/configs/Sinovoip_BPI_M2_Plus_defconfig index a325e9f806..ba11e35296 100644 --- a/configs/Sinovoip_BPI_M2_Plus_defconfig +++ b/configs/Sinovoip_BPI_M2_Plus_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index 65d81a5284..d21b71df5b 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -6,12 +6,14 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_AXP_ALDO2_VOLT=1800 diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index 479dd05dfb..2fb61a5898 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -15,6 +15,7 @@ CONFIG_USB1_VBUS_PIN="PD24" CONFIG_AXP_GPIO=y CONFIG_SATAPWR="PD25" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig index 008af068d4..8e3afe6ebd 100644 --- a/configs/Sunchip_CX-A99_defconfig +++ b/configs/Sunchip_CX-A99_defconfig @@ -11,6 +11,7 @@ CONFIG_USB0_VBUS_PIN="PH15" CONFIG_USB1_VBUS_PIN="PL7" CONFIG_USB3_VBUS_PIN="PL8" CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cx-a99" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index 30380fb255..dc3dcb9989 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -48,9 +48,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig index 7ae07ef1cf..bf9e699545 100644 --- a/configs/T1023RDB_SDCARD_defconfig +++ b/configs/T1023RDB_SDCARD_defconfig @@ -47,9 +47,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index a4c4d453b3..9820d34212 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -37,9 +37,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index fa9619419b..a1e37a6f38 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -48,9 +48,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig index fa45c724e1..07220b9d56 100644 --- a/configs/T1023RDB_defconfig +++ b/configs/T1023RDB_defconfig @@ -36,9 +36,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index bfca64da57..71911b3df7 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -40,9 +40,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig index 05718ae89b..35a3992a1e 100644 --- a/configs/T1024QDS_DDR4_defconfig +++ b/configs/T1024QDS_DDR4_defconfig @@ -39,7 +39,7 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index ddd3158195..38b43977c5 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -52,9 +52,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index 6e3f2de4d5..4a94d8016c 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -51,9 +51,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index e0b30f08e0..192140d746 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -41,9 +41,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index 1287842463..182d5cbb23 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -52,9 +52,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index 4c1824c5c3..e5b79c3da1 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -40,9 +40,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 2b76c3509c..fc9e407783 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -50,9 +50,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index b2e5b6ddc1..9c3d9c6316 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -49,9 +49,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index 7ee05653aa..10810c0c4f 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -39,9 +39,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index f8b6fa8ae1..5718ed3945 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -50,9 +50,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 8b051c23d1..ab40d599d1 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -38,9 +38,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index 5d3099096c..27b5398eb4 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -47,9 +47,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig index e523594649..0a54a9c9cd 100644 --- a/configs/T1040D4RDB_SDCARD_defconfig +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -46,9 +46,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig index e11a8819e8..fdb2f5a621 100644 --- a/configs/T1040D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig @@ -36,9 +36,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index 0fa743ed71..4e5109c33e 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -47,9 +47,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig index afe766e9f0..a7b5c6be80 100644 --- a/configs/T1040D4RDB_defconfig +++ b/configs/T1040D4RDB_defconfig @@ -35,9 +35,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig index ebfe298c43..c91e4f7c82 100644 --- a/configs/T1040QDS_DDR4_defconfig +++ b/configs/T1040QDS_DDR4_defconfig @@ -40,9 +40,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index 887063c793..250e4faf85 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -42,9 +42,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index e29453174b..f01063f708 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -41,9 +41,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 5b1545c886..160daed4c5 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -48,9 +48,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index d329d2f1f2..8f3fa46e9d 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -47,9 +47,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index 4a451f974e..b4a7776bd5 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -37,9 +37,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index 88ea42ef23..8ea5413863 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -48,9 +48,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig index 0cc05f7380..b815622b89 100644 --- a/configs/T1040RDB_defconfig +++ b/configs/T1040RDB_defconfig @@ -36,9 +36,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index ebb3b971aa..d7abf3c5a2 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -48,9 +48,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 8b412c4dbb..4fdf14aa34 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -47,9 +47,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig index 7bc3d572ba..2d5d9eb433 100644 --- a/configs/T1042D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig @@ -37,9 +37,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 8fbb8cbb4c..290e505b0e 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -48,9 +48,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index ae0c5e9312..7d2b530a9b 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -36,9 +36,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index 6adfe06c21..a0fad040ce 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -53,9 +53,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index bc0831ef35..ec652e36d5 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -50,9 +50,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index a0ba304f48..7102a2b622 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -49,9 +49,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index c020273a77..e2ce4815f1 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -50,9 +50,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig index f187b9fe0b..d7a82e6c68 100644 --- a/configs/T1042RDB_PI_defconfig +++ b/configs/T1042RDB_PI_defconfig @@ -38,9 +38,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index b2fe327f0c..b3029cba0d 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -36,9 +36,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig index cf55cf362c..98646a208c 100644 --- a/configs/T1042RDB_defconfig +++ b/configs/T1042RDB_defconfig @@ -35,9 +35,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 6960412a17..6b5de4d009 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -46,9 +46,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 20a0a379ae..a203582cb5 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -45,9 +45,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index eece6e1deb..29873cefe6 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -35,9 +35,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index c763316a10..6528eea389 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -46,9 +46,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index a0e935e184..38216b84f9 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -30,9 +30,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 5ed783604c..4a5cbb26ad 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -34,9 +34,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index aea7881de4..fa30d2917b 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -46,9 +46,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 9e55deb92c..30fe40e506 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -45,9 +45,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig index c6a95b0bb3..1e8bea5b7a 100644 --- a/configs/T2080RDB_SECURE_BOOT_defconfig +++ b/configs/T2080RDB_SECURE_BOOT_defconfig @@ -35,9 +35,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 654adfafec..8a96ff8752 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -46,9 +46,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig index 7e367124dd..947f8eceda 100644 --- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig @@ -30,9 +30,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 8a3dd5fe51..969e7d730e 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -34,9 +34,9 @@ CONFIG_MTD_PARTITIONS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index 9079e12335..bba3457248 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -46,9 +46,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index 779151495f..a64be133e3 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -45,9 +45,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index e744db88e0..40812b7aed 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -46,9 +46,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig index 6c274246da..88102aecff 100644 --- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig @@ -30,9 +30,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig index 8e03b7c40b..85d8b89aa8 100644 --- a/configs/T2081QDS_defconfig +++ b/configs/T2081QDS_defconfig @@ -34,9 +34,9 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index 4a41351eb0..3454e3d7cc 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -40,9 +40,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig index 1f3bbb4b6b..81a8c4b137 100644 --- a/configs/T4160QDS_SDCARD_defconfig +++ b/configs/T4160QDS_SDCARD_defconfig @@ -39,9 +39,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig index 71533606be..02975511f5 100644 --- a/configs/T4160QDS_SECURE_BOOT_defconfig +++ b/configs/T4160QDS_SECURE_BOOT_defconfig @@ -29,9 +29,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig index cf75e4396e..271060a653 100644 --- a/configs/T4160QDS_defconfig +++ b/configs/T4160QDS_defconfig @@ -28,9 +28,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig index 484e2046b2..4b26aa8cfe 100644 --- a/configs/T4160RDB_defconfig +++ b/configs/T4160RDB_defconfig @@ -28,9 +28,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index 4219859a3a..1a00746901 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -40,9 +40,9 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig index 7e23257255..4ca0a3b854 100644 --- a/configs/T4240QDS_SDCARD_defconfig +++ b/configs/T4240QDS_SDCARD_defconfig @@ -39,9 +39,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig index ce40b2bd9f..c34164ccb0 100644 --- a/configs/T4240QDS_SECURE_BOOT_defconfig +++ b/configs/T4240QDS_SECURE_BOOT_defconfig @@ -29,9 +29,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig index a8856fbf4c..1169b66a6d 100644 --- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig @@ -28,9 +28,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig index a8c2f62f1a..7ef45464cf 100644 --- a/configs/T4240QDS_defconfig +++ b/configs/T4240QDS_defconfig @@ -28,9 +28,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 9e0b148392..29733d467c 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -39,9 +39,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 4877973fca..1272b3e378 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -28,9 +28,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig index 229ad92634..c1f30699f3 100644 --- a/configs/TQM834x_defconfig +++ b/configs/TQM834x_defconfig @@ -26,7 +26,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=TQM834x-0:256k(u-boot),256k(env),1m(kernel),2m CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig index 5d850b9daf..bf23ab5641 100644 --- a/configs/TWR-P1025_defconfig +++ b/configs/TWR-P1025_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="TWR_P1025" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y @@ -35,9 +36,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig index 9ace07c0bf..ca28326853 100644 --- a/configs/UCP1020_SPIFLASH_defconfig +++ b/configs/UCP1020_SPIFLASH_defconfig @@ -7,6 +7,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -41,9 +42,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig index e8d6e53d77..48bbb74ce2 100644 --- a/configs/UCP1020_defconfig +++ b/configs/UCP1020_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -41,9 +42,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index a666e419db..ac81ebc557 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -19,6 +19,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_TL059WV5C0=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index 9a431ee4cd..926106545f 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wexler-tab7200" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index 8065ca2629..97795e0cd9 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -11,6 +11,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -19,6 +20,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index 88ccfd406e..ae0e7f9604 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -6,6 +6,7 @@ CONFIG_DRAM_CLK=432 CONFIG_MMC0_CD_PIN="PB3" CONFIG_USB1_VBUS_PIN="PG12" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-wobo-i5" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig index c49cbcbc3c..aae3a3a63f 100644 --- a/configs/Yones_Toptech_BD1078_defconfig +++ b/configs/Yones_Toptech_BD1078_defconfig @@ -18,6 +18,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig index 87c13b0ea8..c4d62d3f0f 100644 --- a/configs/Yones_Toptech_BS1078_V2_defconfig +++ b/configs/Yones_Toptech_BS1078_V2_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-yones-toptech-bs1078-v2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index b32df990a0..b0f66310a6 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig index 553ebc84a8..33f65caf32 100644 --- a/configs/adp-ae3xx_defconfig +++ b/configs/adp-ae3xx_defconfig @@ -2,6 +2,7 @@ CONFIG_NDS32=y CONFIG_SYS_TEXT_BASE=0x4A000000 CONFIG_TARGET_ADP_AE3XX=y CONFIG_DEFAULT_DEVICE_TREE="ae3xx" +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_BOOTDELAY=3 # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index 481ef5b870..81182a4f55 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -2,6 +2,7 @@ CONFIG_NDS32=y CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_TARGET_ADP_AG101P=y CONFIG_DEFAULT_DEVICE_TREE="ag101p" +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_BOOTDELAY=3 # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 46dc0a5084..07a3d80662 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 5400a4cff1..5ce8a5a59c 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -45,6 +45,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index 732cb64170..ec7f011b70 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -33,6 +33,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index cdb88e2bdd..f52b9ddc1c 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -38,6 +38,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index c982bed138..06fdcd7a86 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -41,6 +41,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig index aed312e451..f59d0f4900 100644 --- a/configs/am335x_evm_nor_defconfig +++ b/configs/am335x_evm_nor_defconfig @@ -31,6 +31,7 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig index 1d7233ecd9..f10eb545c7 100644 --- a/configs/am335x_evm_norboot_defconfig +++ b/configs/am335x_evm_norboot_defconfig @@ -27,6 +27,7 @@ CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index c36fabdec4..2ae706e9f9 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -31,6 +31,7 @@ CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig index 88003b5852..8999893d72 100644 --- a/configs/am335x_evm_usbspl_defconfig +++ b/configs/am335x_evm_usbspl_defconfig @@ -39,6 +39,7 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index f02bd37a18..8fd6fc7f9b 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -49,6 +49,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index 06177faa9a..bf1ad37129 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -46,6 +46,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index aaa5397641..d782976975 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -44,6 +44,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index de69b8e287..44ade7329d 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 0cf5ff392b..846d378436 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -39,6 +39,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index a5fa49132b..df1f9cbb64 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -40,6 +40,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig index 78c1dd79a8..942f0be611 100644 --- a/configs/am335x_shc_prompt_defconfig +++ b/configs/am335x_shc_prompt_defconfig @@ -37,6 +37,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index cd50e1a787..ead26732a0 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -39,6 +39,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig index cd50e1a787..ead26732a0 100644 --- a/configs/am335x_shc_sdboot_prompt_defconfig +++ b/configs/am335x_shc_sdboot_prompt_defconfig @@ -39,6 +39,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index b4dfe01904..399fdd6b8d 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -42,6 +42,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_MMC_OMAP_HS=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig index 23b3441505..0e210f0687 100644 --- a/configs/am3517_crane_defconfig +++ b/configs/am3517_crane_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_AM3517_CRANE=y CONFIG_EMIF4=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=10 # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 41ab3fd373..08214c61cd 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_EMIF4=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="am3517-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=10 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_VERSION_VARIABLE=y @@ -43,6 +44,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_SPL_NAND_SIMPLE=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 06e6c0d5b0..415a3d25e7 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -38,6 +39,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig index c6f6d4f9ac..ea46236bc4 100644 --- a/configs/am43xx_evm_ethboot_defconfig +++ b/configs/am43xx_evm_ethboot_defconfig @@ -3,9 +3,10 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_AM43XX=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y # CONFIG_SPL_SYS_MALLOC_SIMPLE is not set CONFIG_SPL_ETH_SUPPORT=y @@ -43,6 +44,7 @@ CONFIG_NAND=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_TI_QSPI=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index bcb7d22a2f..985a47522f 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -5,10 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x30000000 CONFIG_AM43XX=y CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,QSPI,QSPI_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,QSPI,QSPI_BOOT" CONFIG_QSPI_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CMD_ASKENV=y @@ -41,6 +42,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_TI_QSPI=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index a4d0210930..bf881ac74d 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -39,6 +40,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index f2c20ab40f..13560c243c 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -7,9 +7,10 @@ CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y @@ -52,6 +53,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index a6fa2e54be..dcedc531e6 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -18,6 +18,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_SPL_ETH_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y @@ -49,6 +50,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 52e5d6b286..1572dc80db 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -10,12 +10,14 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=am57xevmboard" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y @@ -58,6 +60,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index fe3e87f979..895719286d 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y @@ -22,6 +23,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=am57xevmboard" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y @@ -61,6 +63,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index 9ab4c0c1de..ba46d902a6 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -6,6 +6,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_VIDEO_DE2 is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-amarula-relic" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 3d179d64ef..06501abbb8 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA124=y CONFIG_TARGET_APALIS_TK1=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis" +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=1 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 77a4008d7a..133fc1a4db 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -10,10 +10,12 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -55,7 +57,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig index 89af27f7dc..6e72422e0e 100644 --- a/configs/apalis_imx6_nospl_com_defconfig +++ b/configs/apalis_imx6_nospl_com_defconfig @@ -5,10 +5,12 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_APALIS_IMX6=y CONFIG_CMD_HDMIDETECT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis_imx6/apalis_imx6q.cfg,MX6Q,DDR_MB=1024" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -44,7 +46,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig index 048d4f8271..bc04aabbbc 100644 --- a/configs/apalis_imx6_nospl_it_defconfig +++ b/configs/apalis_imx6_nospl_it_defconfig @@ -5,10 +5,12 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_APALIS_IMX6=y CONFIG_CMD_HDMIDETECT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis_imx6/apalis_imx6q.cfg,MX6Q,DDR_MB=2048" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -44,7 +46,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 918f40c6a5..237a0db1aa 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA30=y CONFIG_TARGET_APALIS_T30=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig index 5f688f0be8..f2a4e95a08 100644 --- a/configs/apf27_defconfig +++ b/configs/apf27_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_IDENT_STRING=" apf27 patch 3.10" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttySMX0,115200 mtdparts=mxc_nand.0:1M(u-boot)ro,512K(env),512K(env2),512K(firmware),512K(dtb),5M(kernel),-(rootfs) ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs " @@ -41,4 +42,5 @@ CONFIG_MMC_MXC=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y +CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig index 93718b4e09..352e0f286d 100644 --- a/configs/apx4devkit_defconfig +++ b/configs/apx4devkit_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_APX4DEVKIT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -31,6 +32,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_MMC_MXS=y CONFIG_NAND=y CONFIG_NAND_MXS=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index 60fd211ce9..5044a595fe 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_ARISTAINETOS2=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" CONFIG_BOOTDELAY=3 @@ -42,7 +43,7 @@ CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index a3537c1211..66413824da 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_ARISTAINETOS2B=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" CONFIG_BOOTDELAY=3 @@ -42,7 +43,7 @@ CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index 990aa499f7..6a31ee69c2 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_ARISTAINETOS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos.cfg,MX6DL" CONFIG_BOOTDELAY=3 @@ -41,6 +42,7 @@ CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index 753077b676..36ec403068 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0xE80C0000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Armadillo-800EVA Board" CONFIG_R8A7740=y CONFIG_TARGET_ARMADILLO_800EVA=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 66d299bbc2..648acbfa64 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for ARNDALE" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/aspenite_defconfig b/configs/aspenite_defconfig index 59dd24f63e..a38eab36f7 100644 --- a/configs/aspenite_defconfig +++ b/configs/aspenite_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_ASPENITE=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_IDENT_STRING="\nMarvell-Aspenite DB" +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index dc017242a3..da6ebe7dcd 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_ASTRO_MCF5373L=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/at91rm9200ek_defconfig b/configs/at91rm9200ek_defconfig index 589975396e..6af0118cf5 100644 --- a/configs/at91rm9200ek_defconfig +++ b/configs/at91rm9200ek_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x10000000 CONFIG_TARGET_AT91RM9200EK=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -19,6 +20,7 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/at91rm9200ek_ram_defconfig b/configs/at91rm9200ek_ram_defconfig index 06849e34d5..2688299db1 100644 --- a/configs/at91rm9200ek_ram_defconfig +++ b/configs/at91rm9200ek_ram_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_TARGET_AT91RM9200EK=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set @@ -20,6 +21,7 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index c77b8d8a20..d900d628ce 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 254d159185..b34a0ade9f 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 9079a668bd..a4051de96e 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index c5b37fcbd3..1a964600e5 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 43fb85cc11..dabdec0deb 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index a62617afbe..05e57a66c7 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index c49f3871fd..ac4c53fa7e 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index c49f3871fd..ac4c53fa7e 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 1592a7ccd6..832f534b73 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 0009a9cbea..9ecfb49d88 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index e035589582..661a238e11 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 632031a6ab..1b0a4cf180 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 1fdbbe0419..1c6b58ab6d 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index c9c0d88bad..d31bb28ff0 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 01f9347bd1..95e60545f9 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 522d2086d7..27608087c2 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index e7aa23201e..74f1b63200 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 94ed68d51e..c5db163cc2 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index d6bcf695fd..b193b2c414 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index aa01be0104..83dd9cba7a 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 5b5a942f23..5fd4b54b6b 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 33a3e6847d..5d0640ac4e 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index cab5f7d143..c929fd502b 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 61308e6bb2..a862d4d54f 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index c1ff8a179c..947d9df906 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index 80d596145a..97d45a1e44 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 3ed0aa18be..4d34fa3fd3 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 54b4a3316a..17846ad52c 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 3a2d6f4fcc..c12566ac80 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 87944fce47..669cbcd915 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index b2c5783fef..e5315e4d7f 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 4140eb30bb..4bd23e6aa3 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 12818c6189..1913a500df 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index fb079e8088..dfb0e582d9 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ax25-ae350_defconfig b/configs/ax25-ae350_defconfig index 5cc5e07213..a853c9915c 100644 --- a/configs/ax25-ae350_defconfig +++ b/configs/ax25-ae350_defconfig @@ -4,6 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ae350" CONFIG_TARGET_AX25_AE350=y CONFIG_CPU_RISCV_64=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index f1bdd0f04c..2d4e799a79 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index a981398cb5..037c119be1 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -44,6 +44,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index e524e6a9c6..aefabcdb80 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -44,6 +44,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index 88199c8e78..78cef27753 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -8,11 +8,13 @@ CONFIG_USB0_VBUS_PIN="PB9" CONFIG_USB2_VBUS_PIN="PH12" CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index 539ed73495..b915a774bd 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -8,6 +8,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set @@ -17,6 +18,7 @@ CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index c5c3cc3a90..a6ba32462b 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881979 CONFIG_MMC0_CD_PIN="PH13" CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry" CONFIG_AHCI=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 40c1c18aca..ebc29e3ed6 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -6,6 +6,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 25ec79de75..0b803414c7 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -11,6 +11,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y diff --git a/configs/bcm11130_defconfig b/configs/bcm11130_defconfig index 640d4accba..f13c27777e 100644 --- a/configs/bcm11130_defconfig +++ b/configs/bcm11130_defconfig @@ -1,7 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_BCM28155_AP=y CONFIG_SYS_TEXT_BASE=0xae000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_MMC_ENV_DEV=0" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/bcm11130_nand_defconfig b/configs/bcm11130_nand_defconfig index 064def01db..2d941f339e 100644 --- a/configs/bcm11130_nand_defconfig +++ b/configs/bcm11130_nand_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_BCM28155_AP=y CONFIG_SYS_TEXT_BASE=0xae000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/bcm23550_w1d_defconfig b/configs/bcm23550_w1d_defconfig index 388415f712..214a6a66fe 100644 --- a/configs/bcm23550_w1d_defconfig +++ b/configs/bcm23550_w1d_defconfig @@ -2,7 +2,9 @@ CONFIG_ARM=y CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y CONFIG_TARGET_BCM23550_W1D=y CONFIG_SYS_TEXT_BASE=0x9f000000 +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/bcm28155_ap_defconfig b/configs/bcm28155_ap_defconfig index 37a87ccfa9..d64c7b07d5 100644 --- a/configs/bcm28155_ap_defconfig +++ b/configs/bcm28155_ap_defconfig @@ -2,7 +2,9 @@ CONFIG_ARM=y CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y CONFIG_TARGET_BCM28155_AP=y CONFIG_SYS_TEXT_BASE=0xae000000 +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/bcm28155_w1d_defconfig b/configs/bcm28155_w1d_defconfig index 33199b0623..7972e273fd 100644 --- a/configs/bcm28155_w1d_defconfig +++ b/configs/bcm28155_w1d_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y CONFIG_TARGET_BCM28155_AP=y CONFIG_SYS_TEXT_BASE=0xae000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -23,7 +25,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_KONA=y -CONFIG_NETDEVICES=y CONFIG_BCM_SF2_ETH=y CONFIG_BCM_SF2_ETH_GMAC=y CONFIG_SYS_NS16550=y diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 8b4247882f..59c745f41b 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_BCMSTB=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_BCM7445=y +CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTDELAY=1 diff --git a/configs/bcm911360_entphn-ns_defconfig b/configs/bcm911360_entphn-ns_defconfig index 4bf8a29414..7e4920fc4c 100644 --- a/configs/bcm911360_entphn-ns_defconfig +++ b/configs/bcm911360_entphn-ns_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_TEXT_BASE=0x61000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x20000000,ARMV7_NONSEC" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/bcm911360_entphn_defconfig b/configs/bcm911360_entphn_defconfig index 7608d37178..a7c647520c 100644 --- a/configs/bcm911360_entphn_defconfig +++ b/configs/bcm911360_entphn_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_TEXT_BASE=0x61000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x20000000" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/bcm911360k_defconfig b/configs/bcm911360k_defconfig index ac03934d77..349f2b89c6 100644 --- a/configs/bcm911360k_defconfig +++ b/configs/bcm911360k_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_TEXT_BASE=0x61000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/bcm958300k-ns_defconfig b/configs/bcm958300k-ns_defconfig index 7af8104bba..fd0da02f1b 100644 --- a/configs/bcm958300k-ns_defconfig +++ b/configs/bcm958300k-ns_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_TEXT_BASE=0x61000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000,ARMV7_NONSEC" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/bcm958300k_defconfig b/configs/bcm958300k_defconfig index ac03934d77..349f2b89c6 100644 --- a/configs/bcm958300k_defconfig +++ b/configs/bcm958300k_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_TEXT_BASE=0x61000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/bcm958305k_defconfig b/configs/bcm958305k_defconfig index ac03934d77..349f2b89c6 100644 --- a/configs/bcm958305k_defconfig +++ b/configs/bcm958305k_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_BCMCYGNUS=y CONFIG_SYS_TEXT_BASE=0x61000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x40000000" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/bcm958622hr_defconfig b/configs/bcm958622hr_defconfig index f05380e8bd..74d9f255c8 100644 --- a/configs/bcm958622hr_defconfig +++ b/configs/bcm958622hr_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_BCMNSP=y CONFIG_SYS_TEXT_BASE=0x61000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x01000000" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/bcm958712k_defconfig b/configs/bcm958712k_defconfig index b69ba5d477..343a3e1dfa 100644 --- a/configs/bcm958712k_defconfig +++ b/configs/bcm958712k_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_BCMNS2=y CONFIG_SYS_TEXT_BASE=0x85000000 CONFIG_IDENT_STRING=" Broadcom Northstar 2" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="u-boot> " diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index 3354a5e034..058875ad43 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM6838=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="brcm,bcm968380gerg" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 89e97db613..d74688f7c9 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA30=y CONFIG_TARGET_BEAVER=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig index fa8f6dcba8..6de81621cd 100644 --- a/configs/bg0900_defconfig +++ b/configs/bg0900_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_BG0900=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200" @@ -33,6 +34,7 @@ CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y CONFIG_MXS_SPI=y diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig index 67b81c678a..0df6e44bda 100644 --- a/configs/birdland_bav335a_defconfig +++ b/configs/birdland_bav335a_defconfig @@ -12,7 +12,7 @@ CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_BAV_VERSION=1 CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -50,6 +50,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig index 86290ecedc..b42ecbddd0 100644 --- a/configs/birdland_bav335b_defconfig +++ b/configs/birdland_bav335b_defconfig @@ -12,7 +12,7 @@ CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_BAV_VERSION=2 CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -50,6 +50,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index e7f473b359..a3a7651c36 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -58,6 +58,7 @@ CONFIG_MTD_DEVICE=y CONFIG_NAND=y CONFIG_NAND_ZYNQ=y CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index c90ed96ef0..29abd1aea3 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_TARGET_BK4R1=y CONFIG_DEFAULT_DEVICE_TREE="bk4r1" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y @@ -38,6 +39,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_SPI=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index a71c2a5ab3..19ec7c6f0a 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -7,6 +7,7 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche" CONFIG_R8A7792=y CONFIG_TARGET_BLANCHE=y CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 8931cbd73a..33c758c90b 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-mmc" +CONFIG_NR_DRAM_BANKS=1 CONFIG_TPL_SYS_MALLOC_F_LEN=0x0 # CONFIG_EXPERT is not set # CONFIG_FIT is not set diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index 342d31a183..709c084131 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_BRPPT1=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand" +CONFIG_NR_DRAM_BANKS=1 CONFIG_TPL_SYS_MALLOC_F_LEN=0x0 # CONFIG_EXPERT is not set # CONFIG_FIT is not set diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 13104f05ef..d7b7a14ecf 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi" +CONFIG_NR_DRAM_BANKS=1 CONFIG_TPL_SYS_MALLOC_F_LEN=0x0 # CONFIG_EXPERT is not set # CONFIG_FIT is not set diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 94d17ec05d..c56a633292 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -8,7 +8,8 @@ CONFIG_TARGET_BRXRE1=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" CONFIG_BOOTDELAY=-2 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index 81e4fbcd0d..071316484b 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_BUBBLEGUM_96=y CONFIG_IDENT_STRING="\nBubblegum-96" CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyOWL5,115200n8" diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig index cfc3268cc1..4367ed0e6c 100644 --- a/configs/caddy2_defconfig +++ b/configs/caddy2_defconfig @@ -6,6 +6,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="CADDY2" CONFIG_BOOTDELAY=6 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y @@ -17,7 +18,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_BAUDRATE=9600 CONFIG_SYS_NS16550=y diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig index 0a772a284c..5c64d69702 100644 --- a/configs/cairo_defconfig +++ b/configs/cairo_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_OMAP3_CAIRO=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=-2 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -26,6 +27,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SPL_NAND_SIMPLE=y diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig index bc704ff7bd..e4f392b1b6 100644 --- a/configs/calimain_defconfig +++ b/configs/calimain_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_DAVINCI=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_TARGET_CALIMAIN=y CONFIG_DA850_LOWLEVEL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=0 CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set @@ -22,8 +23,11 @@ CONFIG_CMD_PING=y CONFIG_CMD_DIAG=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x01C23000 CONFIG_DA8XX_GPIO=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_SYS_NS16550=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 3628821eaa..8ccaeb23e4 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA30=y CONFIG_TARGET_CARDHU=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 29cae602de..d75f57db8d 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA124=y CONFIG_TARGET_CEI_TK1_SOM=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 95352a895b..015bab0c64 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -11,12 +11,14 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y @@ -53,6 +55,7 @@ CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index 4dd7ae54ee..25f96257bd 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -8,6 +8,7 @@ CONFIG_TARGET_CHERRYHILL=y CONFIG_DEBUG_UART=y CONFIG_SMP=y CONFIG_GENERATE_MP_TABLE=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 09d7452ae4..803e2bd920 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -35,6 +35,7 @@ CONFIG_DM_GPIO=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index b4d017c6a4..17780e9ee5 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index b9464e5f01..8e0703fd21 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb" diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 9af2c4de8d..cbb7b39de9 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -18,6 +18,7 @@ CONFIG_DEBUG_UART=y CONFIG_HAVE_MRC=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTSTAGE=y @@ -25,6 +26,7 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index f81b8dceb1..080b383617 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -11,12 +11,14 @@ CONFIG_DEBUG_UART=y CONFIG_HAVE_MRC=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index dce22599c8..086b6a5929 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 311de05241..e4c51f84d9 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -12,11 +12,13 @@ CONFIG_HAVE_MRC=y CONFIG_HAVE_REFCODE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 886c167358..6f8e204af8 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -5,12 +5,14 @@ CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther" CONFIG_TARGET_CHROMEBOX_PANTHER=y CONFIG_HAVE_MRC=y CONFIG_HAVE_VGA_BIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig index 66b1f491dd..c5337f909e 100644 --- a/configs/cl-som-am57x_defconfig +++ b/configs/cl-som-am57x_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_CL_SOM_AM57X=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_VERSION_VARIABLE=y # CONFIG_SPL_EXT_SUPPORT is not set @@ -46,6 +47,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index d47dd66197..0eed5264f2 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 @@ -54,6 +55,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 2164e20a3f..53dbd9fb81 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -15,6 +15,7 @@ CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -52,6 +53,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_SCSI=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index d5327194c1..763d8468e2 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -14,10 +14,12 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run legacy_bootcmd" +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y @@ -64,6 +66,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_SPI=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index a9848a588e..57f7cececc 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -46,6 +46,7 @@ CONFIG_LED_STATUS_BOOT=0 CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_FAT_WRITE=y CONFIG_OF_LIBFDT=y diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig index fa7f336739..b2452ff595 100644 --- a/configs/cm_t3517_defconfig +++ b/configs/cm_t3517_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_CM_T3517=y CONFIG_EMIF4=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -41,10 +42,11 @@ CONFIG_LED_STATUS_BOOT=0 CONFIG_MMC_OMAP_HS=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x2D000000 CONFIG_SMC911X_32_BIT=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SPI=y @@ -53,5 +55,6 @@ CONFIG_USB=y CONFIG_USB_MUSB_HOST=y CONFIG_USB_MUSB_AM35X=y CONFIG_USB_STORAGE=y +CONFIG_VIDEO_OMAP3=y CONFIG_LCD=y CONFIG_OF_LIBFDT=y diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig index 30a745210a..c78aaf93d1 100644 --- a/configs/cm_t35_defconfig +++ b/configs/cm_t35_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_CM_T35=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -38,6 +39,7 @@ CONFIG_LED_STATUS_BIT=186 CONFIG_LED_STATUS_STATE=2 CONFIG_LED_STATUS_BOOT_ENABLE=y CONFIG_LED_STATUS_BOOT=0 +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y @@ -56,5 +58,6 @@ CONFIG_USB_MUSB_UDC=y CONFIG_USB_OMAP3=y CONFIG_TWL4030_USB=y CONFIG_USB_STORAGE=y +CONFIG_VIDEO_OMAP3=y CONFIG_LCD=y CONFIG_OF_LIBFDT=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 0f9b0ca0c8..56ea425c76 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -58,6 +59,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig index ed2e558578..955a6a57a9 100644 --- a/configs/cm_t54_defconfig +++ b/configs/cm_t54_defconfig @@ -9,6 +9,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 # CONFIG_SPL_NAND_SUPPORT is not set diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 03ac4a1b81..fc295af114 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -12,4 +12,5 @@ CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_PING=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_BAUDRATE=19200 diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 85962e52e8..22d603bf01 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_COLIBRI_IMX6ULL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx6ull/imximage.cfg,MX6ULL,IMX_NAND" CONFIG_BOOTDELAY=1 @@ -55,8 +56,8 @@ CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index c19e782e41..d86c0872b4 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -10,10 +10,12 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -53,6 +55,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig index aecc179161..2ed42b54cc 100644 --- a/configs/colibri_imx6_nospl_defconfig +++ b/configs/colibri_imx6_nospl_defconfig @@ -5,10 +5,12 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_COLIBRI_IMX6=y CONFIG_CMD_HDMIDETECT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx6/colibri_imx6.cfg,MX6DL,DDR_MB=256" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -42,6 +44,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index b6139c0c38..303eac786d 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -7,6 +7,7 @@ CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set @@ -53,6 +54,7 @@ CONFIG_NAND_MXS=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index 2a2a82321e..2ad169ddfb 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_COLIBRI_PXA270=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200" # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index e5d33ecfef..f198be5352 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_COLIBRI_T20=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 83cca5c406..5abf6548f4 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA30=y CONFIG_TARGET_COLIBRI_T30=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 8c2e8d656d..32e3820f72 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_TARGET_COLIBRI_VF=y CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND" CONFIG_BOOTDELAY=1 CONFIG_LOGLEVEL=3 @@ -51,6 +52,7 @@ CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y CONFIG_SPI=y diff --git a/configs/colorfly_e708_q1_defconfig b/configs/colorfly_e708_q1_defconfig index e9c82674a2..3a2d6345a1 100644 --- a/configs/colorfly_e708_q1_defconfig +++ b/configs/colorfly_e708_q1_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-colorfly-e708-q1" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index e319df8ecc..92626d00a1 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM6318=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 50238f654b..3fe17fab7f 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM6328=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 708dcda3dd..a1d53c4b56 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM6348=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 3920f3381c..e4f8a90395 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM63268=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index a9c00e9122..5684ac3ad6 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM6368=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index 2dc2efe96a..8454b71075 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -15,6 +15,7 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTAGE=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 6b9b406e50..72b1d05039 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -11,6 +11,7 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTAGE=y diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig index 4fc001f681..966d321bfe 100644 --- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig @@ -41,7 +41,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig index ad4babda16..752015c299 100644 --- a/configs/controlcenterd_36BIT_SDCARD_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_defconfig @@ -41,7 +41,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig index 9b118db317..3d6be0efc6 100644 --- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH,DEVELOP" CONFIG_BOOTDELAY=-2 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig index 1aa1d72943..163d369b9b 100644 --- a/configs/controlcenterd_TRAILBLAZER_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH" CONFIG_BOOTDELAY=-2 CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_MISC_INIT_R is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index a66a281ede..5283c75483 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -56,6 +57,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_SCSI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 6af2f23462..ad0b35f204 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -2,29 +2,27 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0x1110000 CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y -CONFIG_BOOTSTAGE=y -CONFIG_BOOTSTAGE_REPORT=y +CONFIG_FIT_SIGNATURE=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" +CONFIG_PRE_CONSOLE_BUFFER=y +CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y +CONFIG_CMD_MMC=y CONFIG_CMD_PART=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y -CONFIG_CMD_BOOTSTAGE=y -CONFIG_CMD_TPM=y -CONFIG_CMD_TPM_TEST=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -33,11 +31,8 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_MAC_PARTITION=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y +CONFIG_DEFAULT_DEVICE_TREE="coreboot" CONFIG_REGMAP=y CONFIG_SYSCON=y -CONFIG_SPI=y -CONFIG_TPM_TIS_LPC=y -CONFIG_USB_STORAGE=y -CONFIG_USB_KEYBOARD=y +# CONFIG_PCI_PNP is not set CONFIG_CONSOLE_SCROLL_LINES=5 -CONFIG_TPM=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 83564dbe89..0a85fa55a3 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index eeee2521c6..b7751722a9 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -8,6 +8,7 @@ CONFIG_TARGET_COUGARCANYON2=y CONFIG_SMP=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 53245f4a66..e4b0108ce2 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -8,6 +8,7 @@ CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index d054c21780..c17391cde8 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -4,11 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NET2BIG_V2=y CONFIG_IDENT_STRING=" D2 v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="d2v2> " @@ -33,8 +35,8 @@ CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index abb2295951..c61d78e2fe 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -11,8 +11,10 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50" CONFIG_BOOTDELAY=3 +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -38,12 +40,15 @@ CONFIG_DM=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 4242728e6a..0b8bf2ad36 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -10,13 +10,16 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_BOOTDELAY=3 +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " @@ -39,7 +42,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y -CONFIG_DM_I2C_COMPAT=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_DM_SPI_FLASH=y @@ -47,9 +50,12 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y # CONFIG_FAT_WRITE is not set +CONFIG_USE_TINY_PRINTF=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 9d6c47df50..f4201b8b3a 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -5,11 +5,13 @@ CONFIG_TARGET_DA850EVM=y CONFIG_DA850_LOWLEVEL=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -38,12 +40,15 @@ CONFIG_DM=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y +CONFIG_SYS_I2C_DAVINCI=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 16e94d3623..aa6251490c 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA114=y CONFIG_TARGET_DALMORE=y CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 01f1be6de0..5bda909837 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -48,6 +49,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVPP2=y +CONFIG_MII=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 060c5d222e..ae2354b5c2 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=3 @@ -54,6 +55,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 2694fed8b9..131262d722 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -53,6 +54,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_SCSI=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 591501da43..5c69303462 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -52,6 +53,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 8a37122104..cdb4bd50d7 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 4a096b9265..41642abc83 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_DEVKIT8000=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -24,6 +25,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)" CONFIG_ENV_IS_IN_NAND=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 8b1cbac069..218b5753e3 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -10,6 +10,7 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTAGE=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 8f4553156e..2cb716479f 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 @@ -46,8 +47,8 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig index a7cdf0fbf7..28335e1663 100644 --- a/configs/difrnce_dit4350_defconfig +++ b/configs/difrnce_dit4350_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 2a85cf1074..b56162fb84 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -12,11 +12,13 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOOTCOUNT_LIMIT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA_SUPPORT=y @@ -56,6 +58,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1), CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_FSL_ESDHC=y @@ -67,8 +70,8 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 3cd2d6c888..edb37c3b2f 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" @@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run factory" CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_DMA_SUPPORT=y @@ -68,8 +70,8 @@ CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index d7a895165b..49dc3f0873 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_ADVANTECH_DMS_BA16=y CONFIG_SYS_DDR_1G=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -35,6 +36,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index 576b92ddb1..9b48f037a8 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_ADVANTECH_DMS_BA16=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -34,6 +35,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index d77f7766ee..ad201f8656 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DNS325=y CONFIG_IDENT_STRING="\nD-Link DNS-325" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_CONSOLE_MUX=y @@ -29,8 +30,8 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 1ed5cfe7d4..d845e75a75 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DOCKSTAR=y CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar" +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="DockStar> " @@ -23,8 +24,8 @@ CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index f2429f0c2c..b18bad925a 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -11,12 +11,14 @@ CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y @@ -67,6 +69,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_DM_ETH=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_SPL_PHY=y CONFIG_PIPE3_PHY=y CONFIG_PMIC_PALMAS=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index afdf33b556..b98426767b 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -15,6 +15,7 @@ CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y @@ -23,6 +24,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y @@ -66,6 +68,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_DM_ETH=y CONFIG_DRIVER_TI_CPSW=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_SPL_PHY=y CONFIG_PIPE3_PHY=y CONFIG_PMIC_PALMAS=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 5c61659fe5..9c5b45e89f 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -56,6 +57,7 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_NAND=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_DFU_NAND=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index ae8a8da554..4a85879e7c 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -4,9 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyMSM0,115200n8" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="dragonboard410c => " diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index ec4a5b952e..f81456f71c 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -6,9 +6,11 @@ CONFIG_TARGET_DRAGONBOARD820C=y CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C" CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyMSM0,115200n8" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="dragonboard820c => " diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index d7428ae9cd..db06288d52 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DREAMPLUG=y CONFIG_IDENT_STRING="\nMarvell-DreamPlug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set @@ -27,8 +28,8 @@ CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 6428614c93..5410b96498 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DS109=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set @@ -25,8 +26,8 @@ CONFIG_SYS_I2C_MVTWSI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index e8f50f388c..686d44a1e4 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -48,6 +49,7 @@ CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig index 8f469fbc34..803285b98a 100644 --- a/configs/dserve_dsrv9703c_defconfig +++ b/configs/dserve_dsrv9703c_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-dserve-dsrv9703c" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig index b1c291c8de..0bd52f3d3c 100644 --- a/configs/e2220-1170_defconfig +++ b/configs/e2220-1170_defconfig @@ -3,6 +3,7 @@ CONFIG_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA210=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-e2220-1170" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig index ace5fc51d4..5dad8ef0e5 100644 --- a/configs/ea20_defconfig +++ b/configs/ea20_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_SYS_TEXT_BASE=0xc1080000 CONFIG_TARGET_EA20=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -30,11 +31,14 @@ CONFIG_CMD_DIAG=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DA8XX_GPIO=y +CONFIG_SYS_I2C_DAVINCI=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_DAVINCI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DAVINCI_SPI=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index 844a2546e0..08965c9ac4 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xFF000400" CONFIG_BOOTDELAY=5 # CONFIG_CONSOLE_MUX is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="\nEB+CPU5282> " @@ -21,5 +22,6 @@ CONFIG_LED_STATUS_BOOT_ENABLE=y CONFIG_LED_STATUS_BOOT=0 CONFIG_LED_STATUS_CMD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_VIDEO=y # CONFIG_CFB_CONSOLE is not set diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index ca9e8a03e7..aaee4abe44 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418" CONFIG_BOOTDELAY=5 # CONFIG_CONSOLE_MUX is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -20,5 +21,6 @@ CONFIG_LED_STATUS_BOOT_ENABLE=y CONFIG_LED_STATUS_BOOT=0 CONFIG_LED_STATUS_CMD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_VIDEO=y # CONFIG_CFB_CONSOLE is not set diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig index 44e83a2d4b..7ecd0e8d76 100644 --- a/configs/eco5pk_defconfig +++ b/configs/eco5pk_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_ECO5PK=y CONFIG_EMIF4=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=10 # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y @@ -31,6 +32,8 @@ CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SPL_NAND_SIMPLE=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/edb9315a_defconfig b/configs/edb9315a_defconfig index b0e2622bab..72238c58a5 100644 --- a/configs/edb9315a_defconfig +++ b/configs/edb9315a_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_EDB93XX=y CONFIG_SYS_TEXT_BASE=0x60000000 +CONFIG_NR_DRAM_BANKS=8 CONFIG_SYS_EXTRA_OPTIONS="MK_edb9315a" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs console=ttyAM0,115200 ip=dhcp" @@ -37,6 +38,7 @@ CONFIG_LED_STATUS_GREEN_ENABLE=y CONFIG_LED_STATUS_GREEN=0 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/edison_defconfig b/configs/edison_defconfig index 54305fca6c..07f3968af5 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -4,6 +4,7 @@ CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="edison" CONFIG_TARGET_EDISON=y CONFIG_SMP=y +CONFIG_NR_DRAM_BANKS=3 CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 5abf81dedd..35e28bba9b 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_EDMINIV2=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_IDENT_STRING=" EDMiniV2" +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y @@ -26,8 +27,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/efi-x86_app_defconfig b/configs/efi-x86_app_defconfig index 9c1d5e786e..506901b0c6 100644 --- a/configs/efi-x86_app_defconfig +++ b/configs/efi-x86_app_defconfig @@ -5,6 +5,7 @@ CONFIG_VENDOR_EFI=y CONFIG_DEFAULT_DEVICE_TREE="efi-x86_app" CONFIG_TARGET_EFI_APP=y CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index 5b6f125549..4b0294f5b1 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -2,6 +2,7 @@ CONFIG_X86=y CONFIG_VENDOR_EFI=y CONFIG_DEFAULT_DEVICE_TREE="efi-x86_payload" CONFIG_TARGET_EFI_PAYLOAD=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_USE_BOOTARGS=y diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index 71fdb5c841..098029d1f7 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -2,6 +2,7 @@ CONFIG_X86=y CONFIG_VENDOR_EFI=y CONFIG_DEFAULT_DEVICE_TREE="efi-x86_payload" CONFIG_TARGET_EFI_PAYLOAD=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_USE_BOOTARGS=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index a068041a98..8c71f5b9e7 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -5,6 +5,7 @@ CONFIG_ARCH_EXYNOS7=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_IDENT_STRING=" for ESPRESSO7420" CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420" +CONFIG_NR_DRAM_BANKS=8 CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 3bb9b2e34e..ce3a228471 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -56,6 +57,7 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_NAND=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_DFU_NAND=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index fd5a6f66e9..581b78b292 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x27000000 CONFIG_TARGET_ETHERNUT5=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="ethernut5" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 467be641c6..0f8c5d1bb5 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -5,6 +5,7 @@ CONFIG_ASPEED_AST2500=y CONFIG_TARGET_EVB_AST2500=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb" +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw" CONFIG_PRE_CONSOLE_BUFFER=y diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 094189736a..86dea9ccb4 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1c0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-px5-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 61dbd20fb3..b75951f628 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -12,6 +12,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 7dda222830..d7780a6655 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -6,6 +6,7 @@ CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index 73976c0c4d..defff3dba8 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -12,6 +12,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_FDT_FILE="rk3229-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 48fec2a6f7..d5bac13882 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb" diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index ac4be4fdd9..01068abf3e 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -6,6 +6,7 @@ CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb" diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 142dc119af..b5e243803e 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -11,6 +11,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index e442d2c5fc..ed581610aa 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -7,6 +7,7 @@ CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index ff57b31178..d8a180c14f 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 443535046e..71145879cb 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 43805f045e..ebc51adc30 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -11,6 +11,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py" diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig index f116b45437..15e45967b0 100644 --- a/configs/flea3_defconfig +++ b/configs/flea3_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_FLEA3=y CONFIG_SYS_TEXT_BASE=0xA0000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 @@ -28,6 +29,7 @@ CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_OF_LIBFDT=y diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index 02cc9677aa..8b10aa54c9 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 7b6155be2f..63973028a7 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_GALILEO=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index b312920a25..729377d438 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_GE_BX50V3=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_BOOTDELAY=1 @@ -28,15 +29,16 @@ CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_EXT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5" CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_CMD_E1000=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_OF_LIBFDT=y diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index af1dd1a06b..6c98e5a248 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xFF690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 41d896a725..236a47636b 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_GOFLEXHOME=y CONFIG_IDENT_STRING="\nSeagate GoFlex Home" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_CONSOLE_MUX=y @@ -30,8 +31,8 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 4b41893497..0cd3971e9e 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig index ee3889b2e3..75ce2898bb 100644 --- a/configs/gplugd_defconfig +++ b/configs/gplugd_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_GPLUGD=y CONFIG_SYS_TEXT_BASE=0x00f00000 CONFIG_IDENT_STRING="\nMarvell-gplugD" +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y @@ -15,6 +16,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y # CONFIG_MMC is not set +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig index caff63eb59..875f0c4516 100644 --- a/configs/gt90h_v4_defconfig +++ b/configs/gt90h_v4_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index f00a06a29b..9a5cd72b55 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x73f00000 CONFIG_TARGET_GURNARD=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-gurnard" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45" CONFIG_BOOTDELAY=3 diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index d77922e2a7..509e6c9414 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_GURUPLUG=y CONFIG_IDENT_STRING="\nMarvell-GuruPlug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set @@ -30,8 +31,8 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 4394842f20..88ff2fc5d0 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -12,12 +12,14 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y @@ -60,8 +62,8 @@ CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_FSL_ESDHC=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_SERIAL=y CONFIG_USB=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index ef4785055e..c6ed7dfdad 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -12,12 +12,14 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y @@ -64,8 +66,8 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0xf CONFIG_MV88E61XX_FIXED_PORTS=0x0 -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_SERIAL=y CONFIG_USB=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index f4d35a62b8..3dd200ba8d 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -12,12 +12,14 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y @@ -63,8 +65,8 @@ CONFIG_FSL_ESDHC=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_SERIAL=y CONFIG_USB=y diff --git a/configs/h2200_defconfig b/configs/h2200_defconfig index c381b00ab0..72bb4d3f70 100644 --- a/configs/h2200_defconfig +++ b/configs/h2200_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_H2200=y CONFIG_SYS_TEXT_BASE=0xa0041000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_FIT_ENABLE_SHA256_SUPPORT is not set CONFIG_USE_BOOTARGS=y diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig index 80bdb20e8a..502064522c 100644 --- a/configs/h8_homlet_v2_defconfig +++ b/configs/h8_homlet_v2_defconfig @@ -9,6 +9,7 @@ CONFIG_USB0_VBUS_PIN="PL5" CONFIG_USB1_VBUS_PIN="PL6" CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-allwinner-h8homlet-v2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index c3742e909e..612b36298b 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_HARMONY=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index def682c76b..3eeb4c4fe5 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -15,6 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -47,6 +48,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_SCSI=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index 6375034b48..7393c38a57 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -3,9 +3,11 @@ CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_HIGHBANK=y CONFIG_SYS_TEXT_BASE=0x00008000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=0 CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 15301b2f88..0a772c4086 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -4,8 +4,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_IDENT_STRING="hikey" CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=6 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig index 93002fb719..93d8330a62 100644 --- a/configs/hrcon_defconfig +++ b/configs/hrcon_defconfig @@ -30,7 +30,7 @@ CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig index c427ad0fcf..6885bef055 100644 --- a/configs/hrcon_dh_defconfig +++ b/configs/hrcon_dh_defconfig @@ -28,7 +28,7 @@ CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index eec19478c6..9ea054ba5c 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -44,6 +44,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 4a13de4664..1a645b66f6 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM6358=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index a3c4b0e76c..9a15bbd51f 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -6,12 +6,14 @@ CONFIG_DRAM_CLK=384 CONFIG_MACPWR="PH21" CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index b1d6ed11f1..0cfdb405dc 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index bfd8f002e1..30aeff2ef5 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index b370eacc05..375e76aae6 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig index 29f807ab97..5a52ece7ea 100644 --- a/configs/iNet_D978_rev2_defconfig +++ b/configs/iNet_D978_rev2_defconfig @@ -16,6 +16,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 20a26d4505..c8153212cc 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_IB62X0=y CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0" +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -27,8 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index 8fca6e81ed..cadd967a27 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="PH22" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_UNZIP=y @@ -19,6 +20,7 @@ CONFIG_CMD_UNZIP=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 736db90cd7..237aa4e50e 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_ICONNECT=y CONFIG_IDENT_STRING=" Iomega iConnect" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect" +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="iconnect => " @@ -22,8 +23,8 @@ CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index 3f64cd0ea3..cedd56528f 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -8,6 +8,7 @@ CONFIG_IMAGE_FORMAT_LEGACY=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=1 +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -37,7 +38,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x9 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig index ace2f64f6f..5788846a9c 100644 --- a/configs/igep0032_defconfig +++ b/configs/igep0032_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 5b3d24d066..d65af3fc48 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 0286be8e76..b8db910bc5 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -41,6 +42,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 7df14d0e95..e95872d562 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_MX6DL_MAMOJ=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SPL_OS_BOOT=y @@ -33,6 +34,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index 65984a6c64..c49c4ee41e 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -42,6 +43,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 7d921cde05..a4ba011d16 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_TPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 @@ -60,6 +61,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 28aa5dd71d..a9490198d4 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -46,6 +47,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DEBUG_UART_MXC=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 6ed1cdd6fe..6dcad81925 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -51,6 +52,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DEBUG_UART_MXC=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index 65984a6c64..c49c4ee41e 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -42,6 +43,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 6fa494a6f9..04a1fd9963 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -43,6 +44,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 6cd1bfd15e..31b52184b7 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -40,6 +41,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index d3364a790f..0cc17f4f33 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -43,6 +44,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 684f23164b..055ac18226 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -40,6 +41,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index c976ab3409..29e95e45e0 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -43,6 +44,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_MXC_UART=y diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index 100d075960..0cd3ec4d93 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet1" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig index 9d6e340f08..a9292d9aee 100644 --- a/configs/inet86dz_defconfig +++ b/configs/inet86dz_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-inet86dz" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig index 4caf3075cd..9a8f200938 100644 --- a/configs/inet97fv2_defconfig +++ b/configs/inet97fv2_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet97fv2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig index 1eea0c66a5..3df4262c62 100644 --- a/configs/inet98v_rev2_defconfig +++ b/configs/inet98v_rev2_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig index 46fa4ee775..867da8e325 100644 --- a/configs/inet9f_rev03_defconfig +++ b/configs/inet9f_rev03_defconfig @@ -12,6 +12,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig index b928622813..739a65be11 100644 --- a/configs/inet_q972_defconfig +++ b/configs/inet_q972_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-inet-q972" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 2fb7209f31..199968038d 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -4,11 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" IS v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " @@ -33,8 +35,8 @@ CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 670e371df9..42187f4d41 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_INTEGRATOR=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM720T=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index fea531f6b8..1711e4d139 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_INTEGRATOR=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM920T=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index 8b6d188478..a6b99564ce 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_INTEGRATOR=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM926EJ_S=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index d7ac44189d..6d4c1b53c9 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_INTEGRATOR=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM946ES=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index cac7e25b56..308b94c519 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_INTEGRATOR=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM1136=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index 2e77ad7f97..ddabc0aa33 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_INTEGRATOR=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM920T=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index ef9e7442a7..b86053d267 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_INTEGRATOR=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM926EJ_S=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index fb1bf2690a..d830fa8485 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -3,8 +3,10 @@ CONFIG_ARCH_INTEGRATOR=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM946ES=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig index a142402952..8554ff7e32 100644 --- a/configs/ipam390_defconfig +++ b/configs/ipam390_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -37,4 +39,5 @@ CONFIG_DA8XX_GPIO=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_DAVINCI=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_SYS_NS16550=y diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index 00bb745be2..32e648d44b 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -7,11 +7,13 @@ CONFIG_MACPWR="PH19" CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index fb2e30046c..04254c21d3 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA124=y CONFIG_TARGET_JETSON_TK1=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index c5bb84a8d6..d539eb0cbf 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -34,6 +35,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y # CONFIG_MMC is not set CONFIG_NAND=y @@ -44,6 +46,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index a86eeb8b14..665030b885 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_TARGET_K2E_EVM=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -27,6 +28,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y # CONFIG_MMC is not set CONFIG_NAND=y @@ -37,6 +39,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 911618c17a..f7f03903db 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -34,6 +35,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y # CONFIG_BLK is not set +CONFIG_SYS_I2C_DAVINCI=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y @@ -47,6 +49,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_REMOTEPROC_TI_POWER=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 174af79960..b2016b6286 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_TARGET_K2G_EVM=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -27,6 +28,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y # CONFIG_BLK is not set +CONFIG_SYS_I2C_DAVINCI=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y @@ -40,6 +42,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_REMOTEPROC_TI_POWER=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 942e44e7a9..c00f013bae 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -34,6 +35,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y # CONFIG_MMC is not set CONFIG_NAND=y @@ -44,6 +46,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 12be37f0b7..d8fa7284dd 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_TARGET_K2HK_EVM=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -27,6 +28,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y # CONFIG_MMC is not set CONFIG_NAND=y @@ -37,6 +39,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 5381e9f7cc..8ec43e6935 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -34,6 +35,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y # CONFIG_MMC is not set CONFIG_NAND=y @@ -44,6 +46,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 0381a7240c..f3e715c05e 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0xC000060 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_TARGET_K2L_EVM=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -26,6 +27,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y # CONFIG_MMC is not set CONFIG_NAND=y @@ -36,6 +38,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig index 5321f65489..69991a8fa8 100644 --- a/configs/kc1_defconfig +++ b/configs/kc1_defconfig @@ -5,6 +5,7 @@ CONFIG_OMAP44XX=y CONFIG_TARGET_KC1=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 49384d68eb..e54cfc75e7 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -8,7 +8,9 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim" CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_BDI is not set diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index e41ec8990d..92ee3a3ec1 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile Kirkwood 128M16" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -30,11 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index fcab051ad6..f5cf6000c4 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile Kirkwood" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -30,11 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 4fc83a5ec8..e7e6aaa520 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile Kirkwood PCI" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -30,11 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index c8473ca08a..08d81020a5 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_UBI=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y @@ -42,7 +43,6 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 4e78d37ad4..941c1f0b72 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM8360=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMCOGE5NE" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -27,6 +28,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 4b1edb4c0a..b883d0f39e 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile COGE5UN" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -30,11 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 9aad99982a..2d5f284411 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM8360=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMETER1" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -26,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig index 7ffeaf9019..058789af33 100644 --- a/configs/kmlion1_defconfig +++ b/configs/kmlion1_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_UBI=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y @@ -42,7 +43,6 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 90d9a557b3..c07e22a106 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile NUSA" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -30,11 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index d8da1c4b18..5f68f062dd 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_TUXX1=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMOPTI2" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -26,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig index 132db201ef..f934695c95 100644 --- a/configs/kmsugp1_defconfig +++ b/configs/kmsugp1_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile SUGP1" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_SUGP1" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -30,11 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 79d5f923ff..98de2e873a 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_TUXX1=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMSUPX5" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -26,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig index 7b5b016f28..fc04e666f8 100644 --- a/configs/kmsuv31_defconfig +++ b/configs/kmsuv31_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile SUV31" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_SUV31" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -30,11 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index f3ca988c62..a3325a7662 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_SUVD3=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -28,6 +29,7 @@ CONFIG_CMD_DIAG=y CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index c47341e160..46dcb379cd 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_TUXX1=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMTEPR2" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -26,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig index 281a82e0ca..927ef9d56e 100644 --- a/configs/kmvect1_defconfig +++ b/configs/kmvect1_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_SUVD3=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="KMVECT1" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -27,6 +28,7 @@ CONFIG_CMD_DIAG=y CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index c3500d2ada..204299c73d 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index 43fd1a7aff..d6f776cfda 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_TARGET_KP_IMX53=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" CONFIG_SILENT_CONSOLE=y @@ -33,6 +34,7 @@ CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX5=y # CONFIG_SPL_PMIC_CHILDREN is not set diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 12ea476e69..84ca1ceb9b 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 @@ -34,8 +35,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_IMX_THERMAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index b8b9602ef9..6442ac434e 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_KYLIN_RK3036=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index af931855b7..054cd91dd6 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_ARCH_RMOBILE_BOARD_STRING="KMC KZM-A9-GT" CONFIG_TARGET_KZM9G=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/null console=ttySC4,115200" diff --git a/configs/lager_defconfig b/configs/lager_defconfig index d8cae4fa44..cdd72dea17 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 8ee2d223fd..7b8f16903c 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_SYS_TEXT_BASE=0xc1080000 CONFIG_TARGET_LEGOEV3=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=0 CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set @@ -22,6 +23,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_DIAG=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 200b9b2df7..4fe917bd6f 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -8,7 +8,9 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc" CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_BDI is not set diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index 071be93697..9d3ad854f0 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index c20ad9f3a2..1b67939546 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index 5db8dfcd4f..a4c59d747c 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 78e3ae9e47..df0af9eda7 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion" CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index ec9f2823ba..bdc99b0e0d 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -8,6 +8,7 @@ CONFIG_TARGET_LITEBOARD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=1 CONFIG_SUPPORT_RAW_INITRD=y @@ -31,6 +32,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 5128d1c4a5..fd7afc1ab6 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -6,6 +6,7 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index b5f5d010ad..0763d80561 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -5,6 +5,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index 3301684447..c14ddfb906 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -5,6 +5,7 @@ CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 497ac471af..ae80d16b2b 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index fdd131bcbe..ea70dcda14 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -6,6 +6,7 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index fcfaa501bf..b8e829c17f 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -7,6 +7,7 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index b803f54140..ca961d3e5e 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -6,6 +6,7 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index b39c890176..14cb259a86 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -2,7 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AIOT=y CONFIG_SYS_TEXT_BASE=0x40010000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y @@ -18,9 +20,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index ed82740c19..6b71fa3dfd 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -4,7 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 @@ -23,9 +25,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 5b162364d3..a1e2ce2791 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -10,6 +11,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y @@ -34,9 +36,9 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 82da84b6ec..99e605d1d7 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -11,6 +12,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y @@ -35,9 +37,9 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 25e2cddead..3cb49f82d7 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -17,6 +18,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y @@ -50,9 +52,9 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 63ab44f438..17187eca25 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SECURE_BOOT=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -12,6 +13,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y @@ -35,9 +37,9 @@ CONFIG_DM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index c8b76ae083..eab9545d99 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -10,6 +11,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y @@ -35,9 +37,9 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 101421f6e5..ef635b5f9d 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -11,6 +12,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y @@ -36,9 +38,9 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index b9cd7e53e3..e6ac670a24 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -12,6 +13,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y @@ -37,9 +39,9 @@ CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index a664d86fcd..f7e2015304 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" @@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y @@ -48,9 +50,9 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index b37d434570..55fbe14469 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" @@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y @@ -48,9 +50,9 @@ CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 17a202de2a..6707b161ae 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SECURE_BOOT=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -15,6 +16,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y @@ -29,9 +31,9 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index a18426e52b..1c089837cb 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -13,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y @@ -29,9 +31,9 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 83ffa191e9..be596695b1 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -15,6 +16,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y @@ -31,9 +33,9 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 46d8dbbf20..bc71714798 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -16,6 +17,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y @@ -34,9 +36,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index be2d369d18..d99602f756 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -21,6 +22,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_CRYPTO_SUPPORT=y @@ -44,9 +46,9 @@ CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 14044fd4c2..4c7b055229 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -20,6 +21,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y @@ -42,9 +44,9 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index a69dd96169..27f3b0a2ae 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -20,6 +21,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y @@ -44,9 +46,9 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index f6a8b74b07..39336d6882 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -4,12 +4,14 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -32,7 +34,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index b23ecf2ec9..33a1363b3a 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" @@ -11,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -33,7 +35,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 28131b22d6..b449128006 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" @@ -17,6 +18,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y @@ -47,7 +49,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 800f88407a..f3833a11ba 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -4,12 +4,14 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -33,7 +35,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index fdbcf7c2d2..9d9d64098c 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" @@ -12,6 +13,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y @@ -31,7 +33,6 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index b6ad63877c..fe43779efd 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" @@ -18,6 +19,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y @@ -47,7 +49,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 054fc0d6ea..89d6b35899 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" @@ -18,6 +19,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y @@ -44,7 +46,6 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 478fdc8c47..14039978de 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -5,11 +5,13 @@ CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -26,7 +28,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index c308882e4e..718b514af3 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -4,11 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -27,7 +29,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index ec90e48233..5474299b85 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" @@ -18,6 +19,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_CRYPTO_SUPPORT=y @@ -44,7 +46,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 04d2934524..aa8ab5286a 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" @@ -17,6 +18,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 @@ -44,7 +46,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 4bce1a9d17..ffca8f61fc 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" @@ -18,6 +19,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_CRYPTO_SUPPORT=y @@ -43,7 +45,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 09ff4c32f7..6dfcc6775f 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" @@ -17,6 +18,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 @@ -42,7 +44,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 9649919d5e..3de326609a 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SECURE_BOOT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -11,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -32,7 +34,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 6a3e4f839a..3050463ccd 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -4,12 +4,14 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -33,7 +35,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index cb4c5f0662..a51b60210e 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" @@ -11,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y @@ -34,7 +36,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index c6b6986f95..03a52f2621 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" @@ -14,6 +15,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 @@ -40,7 +42,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index b2c18854f0..83c0efed63 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_QSPI_BOOT=y @@ -11,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y @@ -32,7 +34,6 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index b0538c131c..fa7d25b068 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" @@ -18,6 +19,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 @@ -49,7 +51,6 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index d067ba9a54..f63f26ae34 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI" @@ -18,6 +19,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 @@ -47,7 +49,6 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 9e4f2751e7..81876fa0f3 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT" @@ -18,6 +19,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 @@ -43,7 +45,6 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 139e1abfbe..16d63ebab1 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -6,12 +6,14 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MISC_INIT_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -28,7 +30,6 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 45bef3dc65..c0a3e02a08 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -5,12 +5,14 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MISC_INIT_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -29,7 +31,6 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 5a5ae3ae51..ee632421aa 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y @@ -18,6 +19,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y @@ -46,7 +48,6 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 7fbce1cf3b..2c7b1a51bf 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" @@ -18,6 +19,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 CONFIG_SPL_CRYPTO_SUPPORT=y @@ -43,7 +45,6 @@ CONFIG_SPL_DM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index e82d389309..710c48306c 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" @@ -17,6 +18,7 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 @@ -42,7 +44,6 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 8f9c491afb..631a29d364 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -30,8 +31,8 @@ CONFIG_SCSI_AHCI=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_DM_SPI_FLASH=y -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index c7611025e1..0214e4185d 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -6,6 +6,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -33,8 +34,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index a7bed8ce06..234f44bc07 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -5,6 +5,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -33,8 +34,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index a7efd682b2..dd3eef1a4a 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" @@ -40,8 +41,8 @@ CONFIG_SCSI_AHCI=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index f724bd3ad6..397ce2d088 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -43,8 +44,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index d0334a239f..6d1889e603 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -6,6 +6,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -14,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -33,8 +35,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index d806966540..630e0ee61e 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -5,6 +5,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -13,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, QSPI_BOOT" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y @@ -33,8 +35,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 59356095cd..fcf9ee5019 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -19,6 +20,7 @@ CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -46,8 +48,12 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index bf1c0a2d7b..2ab5fd8cff 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -18,6 +19,7 @@ CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -43,8 +45,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_NETDEVICES=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig index 5d81d065d7..1f2c052427 100644 --- a/configs/ls2080a_emu_defconfig +++ b/configs/ls2080a_emu_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080A_EMU=y CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_IDENT_STRING=" LS2080A-EMU" +CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig index b6de767eeb..a4263b7f38 100644 --- a/configs/ls2080a_simu_defconfig +++ b/configs/ls2080a_simu_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080A_SIMU=y CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_IDENT_STRING=" LS2080A-SIMU" +CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index c879f805a4..fd146f7115 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -34,9 +35,9 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 9ee003df90..8bc9f95017 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,9 +36,9 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 039672f6cc..0125c602ec 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -44,9 +45,9 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 53e55c80f9..b37df49283 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,9 +36,9 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index efea22f31e..d23f9c1b06 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -42,9 +43,9 @@ CONFIG_DM=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 906fa9a438..8086970c7f 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -12,6 +13,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -33,9 +35,9 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index ea543833ce..90c4f91b0a 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -11,6 +12,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -34,9 +36,9 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 81d1b6c6dd..28619ecd4a 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_NR_DRAM_BANKS=3 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y @@ -41,9 +43,9 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index 6a28120c76..684dea9d25 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -13,6 +14,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -32,9 +34,9 @@ CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index cc88c887d5..9f1f719157 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -5,6 +5,7 @@ CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -12,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -30,9 +32,9 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index b2ca618af8..1432c1c4f4 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -13,6 +14,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -34,9 +36,9 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 23e57e61c5..0de57c153d 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_LSXL=y CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" CONFIG_API=y CONFIG_BOOTDELAY=3 @@ -13,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2" CONFIG_BOOTCOMMAND="run bootcmd_${bootsource}" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y @@ -29,8 +31,8 @@ CONFIG_MVSATA_IDE=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 73e13d0880..1ebed6616b 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_LSXL=y CONFIG_IDENT_STRING=" LS-XHL" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="LSXHL" CONFIG_API=y CONFIG_BOOTDELAY=3 @@ -13,6 +14,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2" CONFIG_BOOTCOMMAND="run bootcmd_${bootsource}" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y @@ -29,8 +31,8 @@ CONFIG_MVSATA_IDE=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index f7a0ab7dfa..a411046a3b 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000 CONFIG_TARGET_MALTA=y CONFIG_CPU_MIPS64_R2=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 61c0554dab..35e6731bae 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_MALTA=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R2=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 98e47705fa..efb57e629c 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -2,6 +2,7 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xBE000000 CONFIG_TARGET_MALTA=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="malta # " diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index f8c3055474..4a73e3fdac 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xBE000000 CONFIG_TARGET_MALTA=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="maltael # " diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 860cacf45d..1bc8894cfc 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" # CONFIG_CONSOLE_MUX is not set @@ -23,6 +24,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 3a56bc3fcc..14e788c5dd 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -39,6 +40,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 93cf3eef27..66447e8057 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SPL_BOARD_INIT=y @@ -36,7 +37,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 2abaa82a35..e965e78d36 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SPL_BOARD_INIT=y @@ -37,7 +38,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index e14780927c..811123843c 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_MCX=y CONFIG_EMIF4=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -37,6 +38,8 @@ CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SPL_NAND_SIMPLE=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_USB=y @@ -47,6 +50,7 @@ CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y +CONFIG_VIDEO_OMAP3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 1de7821a72..0c4e5fc8d6 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_MEDCOM_WIDE=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 928480903e..5aa0121f4c 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -4,9 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_MEESC=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index a009b25789..03b4b5ed41 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -4,9 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_MEESC=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index baee230c70..9c6475db36 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile COGE3UN" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -30,11 +31,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 34559b7ad9..6d6d4b4624 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -10,6 +10,7 @@ CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=-1 diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index fbe7e96e87..c805d1a791 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -15,6 +15,7 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTAGE=y @@ -22,6 +23,7 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 1a3dfde7d7..73b79a667f 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb" diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 79d984ba7b..b90316a4b4 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -8,12 +8,14 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y +CONFIG_MII=y CONFIG_SUN7I_GMAC=y CONFIG_AXP_ALDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 5129b49506..9235e29235 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -6,6 +6,7 @@ CONFIG_DRAM_CLK=432 CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index 81d121fb84..a7e8f0f890 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB2_VBUS_PIN="PH12" CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index 84ae234fdc..6fbe2b0114 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig index 0c6bceba71..661bafc915 100644 --- a/configs/mpc8308_p1m_defconfig +++ b/configs/mpc8308_p1m_defconfig @@ -17,7 +17,7 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index 81ed01e61d..ae88b7680a 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_MT_VENTOUX=y CONFIG_EMIF4=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=10 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -37,12 +38,15 @@ CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SPL_NAND_SIMPLE=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_ULPI_VIEWPORT_OMAP=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y +CONFIG_VIDEO_OMAP3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_OF_LIBFDT=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index 1255ec1159..92b9dd92cc 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index c1315fe67a..1ad06e5b44 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -10,6 +10,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 954ab1e5c6..463986c033 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index 4a977ee365..b92ef4e8f8 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -10,6 +10,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index 7ebdacf773..2eee19dab5 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX23_OLINUXINO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index 84d179367a..86f4d6babd 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX23EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_VERSION_VARIABLE=y diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index 8620ad2876..c024d7947b 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX25=y CONFIG_SYS_TEXT_BASE=0x81200000 CONFIG_TARGET_MX25PDK=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg" CONFIG_DEFAULT_FDT_FILE="imx25-pdk.dtb" CONFIG_HUSH_PARSER=y @@ -19,6 +20,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_FS_EXT4=y CONFIG_FS_FAT=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index 69089a5d6c..901de9a72b 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX28EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -42,6 +43,7 @@ CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y CONFIG_MXS_SPI=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index aa51974e7d..c018f34a58 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX28EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -42,6 +43,7 @@ CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y CONFIG_MXS_SPI=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index e0e328589b..675c81bb94 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX28EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_VERSION_VARIABLE=y @@ -41,6 +42,7 @@ CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y CONFIG_MXS_SPI=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 0b6c27f4cd..2d2790f324 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX28EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_VERSION_VARIABLE=y @@ -41,6 +42,7 @@ CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_SPI=y CONFIG_MXS_SPI=y diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig index 771cf72fe5..1733196b29 100644 --- a/configs/mx31pdk_defconfig +++ b/configs/mx31pdk_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX31PDK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_SUPPORT=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig index 4178aa7d61..082c26309d 100644 --- a/configs/mx35pdk_defconfig +++ b/configs/mx35pdk_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_MX35PDK=y CONFIG_SYS_TEXT_BASE=0xA0000000 +CONFIG_NR_DRAM_BANKS=2 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y @@ -30,7 +31,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y CONFIG_NAND_MXC=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0xB6000000 CONFIG_SPI=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index 0f648bb5dd..e93e81f3c3 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x97800000 CONFIG_TARGET_MX51EVK=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -21,6 +22,7 @@ CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig index 3bcd723990..96c43e0d2f 100644 --- a/configs/mx53ard_defconfig +++ b/configs/mx53ard_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_TARGET_MX53ARD=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg" CONFIG_DEFAULT_FDT_FILE="imx53-ard.dtb" CONFIG_HUSH_PARSER=y @@ -17,7 +18,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_NAND=y CONFIG_NAND_MXC=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0xF4000000 CONFIG_OF_LIBFDT=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 3923a36b0d..fec1eb4432 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_TARGET_MX53CX9020=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx53-cx9020" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg" CONFIG_BOOTDELAY=1 CONFIG_SUPPORT_RAW_INITRD=y @@ -24,8 +25,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FPGA_ALTERA=y CONFIG_FPGA_CYCLON2=y CONFIG_FSL_ESDHC=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX5=y CONFIG_MXC_UART=y diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig index cb86f56627..67582b55ef 100644 --- a/configs/mx53evk_defconfig +++ b/configs/mx53evk_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_TARGET_MX53EVK=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg" CONFIG_HUSH_PARSER=y CONFIG_CMD_I2C=y @@ -14,4 +15,5 @@ CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index b938dcba0e..4e161371e3 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_TARGET_MX53LOCO=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -23,6 +24,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 8a0cc5d481..7be5c04125 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_TARGET_MX53PPD=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ge/mx53ppd/imximage.cfg" CONFIG_BOOTDELAY=1 @@ -9,6 +10,7 @@ CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_I2C=y @@ -25,10 +27,11 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_EXT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5" CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_FSL_ESDHC=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_RTC_S35392A=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig index 92cffb96ac..3795ff1ef5 100644 --- a/configs/mx53smd_defconfig +++ b/configs/mx53smd_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_TARGET_MX53SMD=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg" CONFIG_HUSH_PARSER=y CONFIG_CMD_I2C=y @@ -14,4 +15,5 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index e67727743b..6e73a9752c 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y @@ -32,6 +33,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index a2fe348acb..0c3e788357 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_MX6QARM2=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -25,6 +26,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig index 3b3169eddd..21d102e959 100644 --- a/configs/mx6dlarm2_lpddr2_defconfig +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_MX6QARM2=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -25,6 +26,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index c60100ca6c..7356debc57 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -7,6 +7,7 @@ CONFIG_MX6_DDRCAL=y CONFIG_TARGET_MX6MEMCAL=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL,MX6QDL" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_USB_HOST_SUPPORT=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index 35f1d19225..2d4beabcc0 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_MX6QARM2=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -25,6 +26,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig index d707867752..7a900f3a59 100644 --- a/configs/mx6qarm2_lpddr2_defconfig +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_MX6QARM2=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -25,6 +26,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 380c1cd2b6..c73d0d3931 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -4,10 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE" CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -37,7 +39,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 66507f31ec..8856567846 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_NXP_BOARD_REVISION=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -48,6 +49,7 @@ CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 3e9bdb921f..e0202ef57d 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -56,6 +57,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 4b72e0814f..92a3ce5717 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_MX6SLEVK=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y @@ -36,6 +37,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index b71908d210..4ab228bcc3 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_MX6SLEVK=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg" CONFIG_SPI_BOOT=y CONFIG_SUPPORT_RAW_INITRD=y @@ -36,6 +37,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 8554d44c6d..206e2129c8 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y @@ -44,6 +45,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index 3c5da8c0e1..1ba8eb4901 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_MX6SLLEVK=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 3544897268..c1da3d051f 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_MX6SLLEVK=y CONFIG_USE_IMXIMG_PLUGIN=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index be95cc0916..359b9b6b56 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_MX6SXSABREAUTO=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sabreauto" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_HUSH_PARSER=y @@ -39,6 +40,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 6ea92bb480..dcac6f435c 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_MX6SXSABRESD=y # CONFIG_CMD_BMODE is not set CONFIG_NXP_BOARD_REVISION=y CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -39,6 +40,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 9ae29695f7..5738113d74 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_NXP_BOARD_REVISION=y CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -47,6 +48,7 @@ CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 5dd45b5d00..038f3a6354 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -42,6 +43,7 @@ CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 3340089521..5e02073419 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -42,6 +43,7 @@ CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_FSL_QSPI=y CONFIG_USB=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index 1863934a8b..2fa85d2e58 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index 7f71d6af8f..3ab0f1eb08 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_USE_IMXIMG_PLUGIN=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 8870da5583..c51331c84e 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -7,6 +7,7 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -49,6 +50,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 7949aa655e..c214acaaba 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX7ULP=y CONFIG_SYS_TEXT_BASE=0x67800000 CONFIG_TARGET_MX7ULP_EVK=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index dcac1ae741..9b0c222653 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX7ULP=y CONFIG_SYS_TEXT_BASE=0x67800000 CONFIG_TARGET_MX7ULP_EVK=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_HUSH_PARSER=y CONFIG_CMD_MEMTEST=y diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index c1d14cbcdd..141db0ac11 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -8,7 +8,9 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" nanopi-k2" CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_BDI is not set diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 0a04911c81..c9593fe833 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index e0ae3c7c60..dfbf219b2b 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -6,6 +6,7 @@ CONFIG_DRAM_CLK=408 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index ee22364760..6fb6e5790e 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ODT_EN=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1-plus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 35058186f5..0e3b65348a 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index f953b71f03..00817a9e29 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index 66919e5a2b..c43457cb49 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index 70798a8e9f..c33eb109b1 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 4ae69fe71a..d43d2cda9d 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NAS220=y CONFIG_IDENT_STRING="\nNAS 220" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set @@ -30,8 +31,8 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index e7216556be..89921a5476 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -4,11 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NET2BIG_V2=y CONFIG_IDENT_STRING=" 2Big v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="2big2> " @@ -33,8 +35,8 @@ CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index 90cd69eb7b..ff94311818 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -5,6 +5,7 @@ CONFIG_ARCH_BMIPS=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index f39d5949dc..04b32562f5 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM6362=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index c0e3651e6e..fd3adabe04 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -4,11 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" NS v2 Lite" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " @@ -33,8 +35,8 @@ CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index db75e6d550..aa6e98c6b1 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -4,11 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" NS Max v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " @@ -33,8 +35,8 @@ CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index fd774c722a..f713f39b0d 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -4,11 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" NS v2 Mini" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " @@ -31,8 +33,8 @@ CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index ebdb16b16f..fb15315c6c 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -4,11 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" NS v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " @@ -33,8 +35,8 @@ CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 378fc245de..2f3f74f949 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -3,10 +3,12 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -39,7 +41,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 306bf2e90c..80c9d81be9 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -3,10 +3,12 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -39,7 +41,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index ec4e38f000..293808fb33 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -3,10 +3,12 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -41,7 +43,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index c8da96e1f5..816f1c8214 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -3,10 +3,12 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -41,7 +43,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 70ffc9d797..b84291dfbf 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -3,10 +3,12 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -39,7 +41,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index d3fdd6df93..985eb3df70 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -3,10 +3,12 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -39,7 +41,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index ed9070d9a2..fe2ecf6c94 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -3,6 +3,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_NOKIA_RX51=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=30 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -21,6 +22,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y # CONFIG_NET is not set +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 9573fe8bd2..7eda3ac49d 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -13,11 +13,13 @@ CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttymxc1,115200 " CONFIG_BOOTCOMMAND="run distro_bootcmd ; run net_nfs" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y @@ -42,7 +44,7 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 4e3921a671..4a9ec13b62 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NSA310S=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -24,8 +25,8 @@ CONFIG_ISO_PARTITION=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 3b64c64371..f201d40199 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -7,6 +7,7 @@ CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index c6e7780030..8a70d1a784 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -8,7 +8,9 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c2" CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_BDI is not set diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 632542d984..d141658d42 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -5,11 +5,13 @@ CONFIG_ARCH_EXYNOS5=y CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1" CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=8 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="ODROID-XU3 # " CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_DFU=y @@ -31,7 +33,6 @@ CONFIG_ADC_EXYNOS=y CONFIG_DFU_MMC=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y -CONFIG_NETDEVICES=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x5000000 CONFIG_DM_PMIC=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 04a5e2cc3a..b566de3f48 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -5,6 +5,7 @@ CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ODROID=y CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=8 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -13,6 +14,7 @@ CONFIG_BOOTARGS="Please use defined boot" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="Odroid # " # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 1e1a391d7f..0a402ccf5f 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_OMAP3_BEAGLE=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="omap3-beagle" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DEFAULT_FDT_FILE="omap3-beagle.dtb" @@ -49,6 +50,7 @@ CONFIG_LED_STATUS_BOOT=1 CONFIG_LED_STATUS_GREEN_ENABLE=y CONFIG_LED_STATUS_GREEN=2 CONFIG_LED_STATUS_CMD=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y @@ -74,6 +76,7 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_VIDEO_OMAP3=y CONFIG_FAT_WRITE=y CONFIG_BCH=y CONFIG_SPL_OF_LIBFDT=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index cd517b418d..0a9efa0725 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -1,10 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_OMAP3_EVM=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="omap3-evm" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" CONFIG_VERSION_VARIABLE=y @@ -36,8 +38,11 @@ CONFIG_SPL_PARTITION_UUIDS=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SPL_DM=y +# CONFIG_SPL_BLK is not set CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_DM_MMC=y +# CONFIG_SPL_DM_MMC is not set CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y @@ -50,13 +55,12 @@ CONFIG_SMC911X_BASE=0x2C000000 CONFIG_SMC911X_32_BIT=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_OMAP3=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_MUSB_OMAP2PLUS=y -CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0451 diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig index e4b16c6872..6b3fb31aaa 100644 --- a/configs/omap3_ha_defconfig +++ b/configs/omap3_ha_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_TAO3530=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA" CONFIG_BOOTDELAY=3 # CONFIG_SPL_EXT_SUPPORT is not set @@ -24,6 +25,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)" CONFIG_ENV_IS_IN_NAND=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index df1b42f3c2..1807e280a4 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -3,9 +3,11 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_OMAP3_LOGIC=y +# CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -45,7 +47,6 @@ CONFIG_NETDEVICES=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x08000000 CONFIG_SMC911X_32_BIT=y -CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig index 21aaa03b34..0c4a021bc5 100644 --- a/configs/omap3_overo_defconfig +++ b/configs/omap3_overo_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_OMAP3_OVERO=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y @@ -30,6 +31,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(xloader),1792k(u-boot),256k(environ),8m(linux),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig index a2cb46e6b8..6dce53834d 100644 --- a/configs/omap3_pandora_defconfig +++ b/configs/omap3_pandora_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_OMAP3_PANDORA=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -24,6 +25,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(xloader),1920k(uboot),128k(uboot-env),10m(boot),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig index 4ca55cb531..48f3391c44 100644 --- a/configs/omap3_zoom1_defconfig +++ b/configs/omap3_zoom1_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TARGET_OMAP3_ZOOM1=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -21,6 +22,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)" CONFIG_ENV_IS_IN_NAND=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 4a97269dd4..e8c6cf03bc 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -11,8 +11,10 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=3 +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y @@ -34,6 +36,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_DM_I2C=y CONFIG_DM_I2C_COMPAT=y +CONFIG_SYS_I2C_DAVINCI=y CONFIG_NAND=y CONFIG_NAND_DAVINCI=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y @@ -43,6 +46,8 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 3b4724f1fc..ee1e480f93 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=2 @@ -29,8 +30,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC_HW_PARTITIONING is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index a2d86b5690..1561c897bd 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=2 @@ -29,8 +30,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC_HW_PARTITIONING is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 156fa3ff1f..be92440ee1 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate" +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=2 @@ -29,8 +30,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC_HW_PARTITIONING is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 729f9d78be..fa1dc89852 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev" +CONFIG_NR_DRAM_BANKS=1 CONFIG_TPL_SYS_MALLOC_F_LEN=0x400 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -68,8 +69,8 @@ CONFIG_PWRSEQ=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_POWER_DOMAIN=y diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index 577a32255b..4f892cf5d8 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_USB1_VBUS_PIN="PG13" CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index f3fd864a6d..f8069fe9bd 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -6,6 +6,7 @@ CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-lite" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 23f4973e5b..924165339e 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -6,6 +6,7 @@ CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index 3d456eb16e..7fd831b924 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -6,6 +6,7 @@ CONFIG_DRAM_ODT_EN=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-one-plus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index ca1e586e89..ed1a071642 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index 134db79e72..84bf48fec6 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -6,6 +6,7 @@ CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index 01c1cd7736..bf70773cc5 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc-plus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index a6e61a5065..fa06d77ce3 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index 8e32b0af32..01d8ac8c00 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_SATAPWR="PG11" CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 6161863258..adceaf2852 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index 8e6ee7b2db..bd43efefd3 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index d7211b5823..33ae053dcb 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_SPL_SPI_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 6afd4a3bfa..44c3144d55 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index fdb6bb4ed9..38de6a0697 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index fc656ce733..b10741b3e8 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -7,6 +7,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index 78e92eb1bd..b70f44df8e 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -2,9 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_OT1200=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -35,6 +37,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 525b24fee0..d5962e6456 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -9,9 +9,11 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y @@ -44,6 +46,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/p212_defconfig b/configs/p212_defconfig index 66cf62204f..53620e6096 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -8,7 +8,9 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p212" CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_BDI is not set diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index 6233357410..7dc3d8352f 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA210=y CONFIG_TARGET_P2371_0000=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 34262c559a..1bfb9a3a74 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA210=y CONFIG_TARGET_P2371_2180=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-2180" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 50675544a7..4118845fd1 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA210=y CONFIG_TARGET_P2571=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 29e1edcd68..f0b6848e81 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -3,6 +3,7 @@ CONFIG_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_TEGRA186=y CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-000" +CONFIG_NR_DRAM_BANKS=8 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index cc10669608..a633a0ba19 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -3,6 +3,7 @@ CONFIG_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_TEGRA186=y CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-500" +CONFIG_NR_DRAM_BANKS=8 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index 553a8d6572..88f4891e6b 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -11,6 +11,7 @@ CONFIG_USB0_ID_DET="PD10" CONFIG_USB1_VBUS_PIN="PD12" CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index c07283d865..85361c6b36 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_PAZ00=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index 37d3904244..fd86481b05 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -44,6 +44,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index b7fa51def7..4af412d76e 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -44,6 +44,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 0b3d93eee9..5a2d231f4f 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_TARGET_PCM052=y CONFIG_DEFAULT_DEVICE_TREE="pcm052" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y @@ -33,5 +34,6 @@ CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 6318a6a83c..8eaddaf0d3 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 @@ -48,7 +49,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 988e2601d2..5115d716d4 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pi" CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=7 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig index b0199e40eb..1398210406 100644 --- a/configs/pengwyn_defconfig +++ b/configs/pengwyn_defconfig @@ -49,6 +49,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig index 421dadc886..34a2f15610 100644 --- a/configs/pepper_defconfig +++ b/configs/pepper_defconfig @@ -34,7 +34,7 @@ CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DRIVER_TI_CPSW=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index 0a03854e70..8ab5112ea4 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 @@ -47,8 +48,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index b81b5e6c57..8187135845 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 9cc7387575..8a1a757b93 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -32,6 +32,7 @@ CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PIC32=y CONFIG_DM_ETH=y +CONFIG_MII=y CONFIG_PIC32_ETH=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_FULL is not set diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 67b3eb1024..59ef7b7f22 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_PICO_IMX6UL=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx6ul/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -33,6 +34,7 @@ CONFIG_DFU_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 57312b1fcb..d6cfc2065e 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -13,6 +13,7 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="ask" @@ -47,6 +48,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 2e72572829..73800fc8eb 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -13,6 +13,7 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb" @@ -47,6 +48,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_MXC_USB_OTG_HACTIVE=y diff --git a/configs/picosam9g45_defconfig b/configs/picosam9g45_defconfig index 559ebb23d5..0b6234fbd9 100644 --- a/configs/picosam9g45_defconfig +++ b/configs/picosam9g45_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index 21ce06f370..d20604d01a 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 878770a2c4..689f36befd 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -7,6 +7,7 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_PSCI_RESET is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index 3dc70ec550..16f13097ff 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -9,9 +9,11 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y @@ -46,6 +48,7 @@ CONFIG_FSL_ESDHC=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index 63123c3081..c6731a6cd5 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -9,9 +9,11 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y @@ -48,7 +50,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 5ca2930f5d..1d1bcc7e70 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_PLUTUX=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux" +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index 1afa7807a1..445e0ccac1 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_TARGET_PM9261=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 836563864a..dbb585e4cf 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_TARGET_PM9263=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 99acd20917..928e446c3f 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x73f00000 CONFIG_TARGET_PM9G45=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 0c4c023406..13b40d5b43 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_POGO_E02=y CONFIG_IDENT_STRING="\nPogo E02" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02" +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="PogoE02> " @@ -22,8 +23,8 @@ CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y # CONFIG_MMC is not set -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig index 03931c8f05..cad908f26c 100644 --- a/configs/polaroid_mid2407pxe03_defconfig +++ b/configs/polaroid_mid2407pxe03_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2407pxe03" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig index f6ba2370db..ce3f660f8b 100644 --- a/configs/polaroid_mid2809pxe04_defconfig +++ b/configs/polaroid_mid2809pxe04_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index a2b3eac1bf..c25aea8f41 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x37000000 CONFIG_IDENT_STRING="poplar" CONFIG_DEFAULT_DEVICE_TREE="hi3798cv200-poplar" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="poplar# " CONFIG_CMD_MMC=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 337fd76782..8fc4940330 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 6efa641c23..363a502c13 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig index 3c049c4449..f9f13af410 100644 --- a/configs/portl2_defconfig +++ b/configs/portl2_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile Port-L2" CONFIG_SYS_EXTRA_OPTIONS="KM_PORTL2" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -28,11 +29,12 @@ CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 # CONFIG_MMC is not set CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig index fd829f57ea..7317df7721 100644 --- a/configs/pov_protab2_ips9_defconfig +++ b/configs/pov_protab2_ips9_defconfig @@ -13,6 +13,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 10604e19f2..3a05256a80 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -15,10 +15,12 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-ddr1600" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/puma_rk3399/fit_spl_atf.its" CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 459f8fe48e..6a9cb5529e 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -58,6 +59,7 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_NAND=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_DFU_NAND=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y @@ -66,6 +68,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig index 0ef7e2c473..c89b072a32 100644 --- a/configs/q8_a13_tablet_defconfig +++ b/configs/q8_a13_tablet_defconfig @@ -14,6 +14,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig index 18e0849853..419c5662ea 100644 --- a/configs/q8_a23_tablet_800x480_defconfig +++ b/configs/q8_a23_tablet_800x480_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig index 0b3973dadc..003f32f04b 100644 --- a/configs/q8_a33_tablet_1024x600_defconfig +++ b/configs/q8_a33_tablet_1024x600_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig index 322d01d8a4..994d9214be 100644 --- a/configs/q8_a33_tablet_800x480_defconfig +++ b/configs/q8_a33_tablet_800x480_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 20003f8581..19f8dd5604 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=1 +# CONFIG_MISC_INIT_R is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 51227f11ed..9df5752892 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -17,6 +17,7 @@ CONFIG_SMP=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_BUILD_ROM=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 7144e9cfde..93fb5ee15e 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -6,6 +6,7 @@ CONFIG_SMP=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_BUILD_ROM=y CONFIG_FIT=y CONFIG_BOOTSTAGE=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index e9a35d010f..2df35a8082 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_TARGET_QEMU_ARM_64BIT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_CMD_PCI=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index 9d30dc31a5..2865599c62 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_TARGET_QEMU_ARM_32BIT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_CMD_PCI=y diff --git a/configs/qemu_mips64_defconfig b/configs/qemu_mips64_defconfig index ca90fd52d9..6789530dc1 100644 --- a/configs/qemu_mips64_defconfig +++ b/configs/qemu_mips64_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBFC00000 CONFIG_TARGET_QEMU_MIPS=y CONFIG_CPU_MIPS64_R1=y CONFIG_BOOTDELAY=10 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="qemu-mips64 # " CONFIG_CMD_IMLS=y diff --git a/configs/qemu_mips64el_defconfig b/configs/qemu_mips64el_defconfig index 04c4484e86..577bf42067 100644 --- a/configs/qemu_mips64el_defconfig +++ b/configs/qemu_mips64el_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_QEMU_MIPS=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R1=y CONFIG_BOOTDELAY=10 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="qemu-mips64el # " CONFIG_CMD_IMLS=y diff --git a/configs/qemu_mips_defconfig b/configs/qemu_mips_defconfig index ece5e647d0..a6950fc230 100644 --- a/configs/qemu_mips_defconfig +++ b/configs/qemu_mips_defconfig @@ -2,6 +2,7 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xBFC00000 CONFIG_TARGET_QEMU_MIPS=y CONFIG_BOOTDELAY=10 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="qemu-mips # " CONFIG_CMD_IMLS=y diff --git a/configs/qemu_mipsel_defconfig b/configs/qemu_mipsel_defconfig index 52bcbe13c9..6ee0acfc5b 100644 --- a/configs/qemu_mipsel_defconfig +++ b/configs/qemu_mipsel_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0xBFC00000 CONFIG_TARGET_QEMU_MIPS=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_BOOTDELAY=10 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="qemu-mipsel # " CONFIG_CMD_IMLS=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 9a66ee90f9..ca398d9d6e 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -5,6 +5,7 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 7fdd6ddc56..9b29418950 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -56,6 +57,7 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_NAND=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_DFU_NAND=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index eaa03bd9fb..1f00263bb4 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" # CONFIG_CONSOLE_MUX is not set @@ -23,6 +24,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index dc9547b359..0ff64f0efd 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-rock2-square.dtb" diff --git a/configs/rock_defconfig b/configs/rock_defconfig index 3218c629a5..9842f0343c 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -12,6 +12,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x60080000 CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index fcc2ae68c9..6a2b8be82c 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -4,7 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x00008000 CONFIG_TARGET_RPI_0_W=y CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index 204af74239..95bb9481f4 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -4,7 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x00008000 CONFIG_TARGET_RPI_2=y CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index 9e142cae63..444bfa4637 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -5,7 +5,9 @@ CONFIG_TARGET_RPI_3_32B=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index f46e504497..9789497f90 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -5,7 +5,9 @@ CONFIG_TARGET_RPI_3=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index 82c90d40e1..84f2c21ef3 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -4,7 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x00008000 CONFIG_TARGET_RPI=y CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 07710d272d..107014e56c 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -59,6 +60,7 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_NAND=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_DFU_NAND=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y @@ -67,6 +69,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig index f64ed8535f..b18a63b325 100644 --- a/configs/s32v234evb_defconfig +++ b/configs/s32v234evb_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_S32V234EVB=y CONFIG_SYS_TEXT_BASE=0x3E800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/s32v234evb/s32v234evb.cfg" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyLF0 root=/dev/ram rw" diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index a54dd5f3a3..f39df89707 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -4,9 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x34800000 CONFIG_TARGET_S5P_GONI=y CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}" CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="Goni # " diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index a1c67a3861..8712efa434 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -5,11 +5,13 @@ CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_S5PC210_UNIVERSAL=y CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="Please use defined boot" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="Universal # " # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index 7c684e31e7..3cbaec0e6b 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_SOC_BMIPS_BCM6338=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 53d4b7ce0c..36f221e38f 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -18,10 +18,12 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 27606be8ba..3cbd06e903 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -9,11 +9,13 @@ CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index ebba7599f0..ec14eb4cd6 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -9,11 +9,13 @@ CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_CONSOLE_MUX=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 4182e84b26..6f2efe7b3d 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -18,12 +18,14 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 18d1cb5589..63a852d394 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -17,11 +17,13 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwait" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 4ec6f4ee46..c160d704ae 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 9def836578..16f08babba 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 157c3aefc9..7ffd5bf1da 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 3e8cf67819..42f8e83998 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 8d0e475cca..884e0a2c84 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -15,6 +15,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index dcc7ed868c..be139ec998 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 940decc322..c858a173a0 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -15,6 +15,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index be95e25edd..2fc02eab24 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 3b756b1e21..561648b4d6 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -18,11 +18,13 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SEPARATE_BSS=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index e2f8bbbe49..7d516111f4 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -15,11 +15,13 @@ CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 18ed099f18..f675699c45 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -17,11 +17,13 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 86e5db6e6b..6bfe246350 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 1b0be82122..366b64d230 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -15,6 +15,7 @@ CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 9dc639c38d..454541d8eb 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 5bd5927b41..ebb3716e48 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SANDBOX64=y CONFIG_DEFAULT_DEVICE_TREE="sandbox64" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index afc34298ed..c72374ed9a 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -2,6 +2,7 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y @@ -45,6 +46,7 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_CMD_AXI=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y @@ -80,6 +82,8 @@ CONFIG_DEVRES=y CONFIG_DEBUG_DEVRES=y CONFIG_ADC=y CONFIG_ADC_SANDBOX=y +CONFIG_AXI=y +CONFIG_AXI_SANDBOX=y CONFIG_CLK=y CONFIG_CPU=y CONFIG_DM_DEMO=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 84b0756a4d..ca70f0437e 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -2,6 +2,7 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig index d1ca61bff2..f70088ad7e 100644 --- a/configs/sandbox_noblk_defconfig +++ b/configs/sandbox_noblk_defconfig @@ -2,6 +2,7 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index c00672f6cc..315f721266 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL=y CONFIG_SANDBOX_SPL=y CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig index 8697dcaaad..6d4692efd1 100644 --- a/configs/sansa_fuze_plus_defconfig +++ b/configs/sansa_fuze_plus_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_SANSA_FUZE_PLUS=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 " diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig index 567a59f57e..da26d50c06 100644 --- a/configs/sbc8548_PCI_33_PCIE_defconfig +++ b/configs/sbc8548_PCI_33_PCIE_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="33,PCIE" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y @@ -21,7 +22,7 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig index 5ac7510879..a2c01be85a 100644 --- a/configs/sbc8548_PCI_33_defconfig +++ b/configs/sbc8548_PCI_33_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="33" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y @@ -21,7 +22,7 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig index 55ddee34b6..c97d9c2afc 100644 --- a/configs/sbc8548_PCI_66_PCIE_defconfig +++ b/configs/sbc8548_PCI_66_PCIE_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="66,PCIE" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y @@ -21,7 +22,7 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig index 9d86d0cd59..eda393d36c 100644 --- a/configs/sbc8548_PCI_66_defconfig +++ b/configs/sbc8548_PCI_66_defconfig @@ -7,6 +7,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="66" CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y @@ -21,7 +22,7 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig index 0d4c70b3bf..c3cf3a33db 100644 --- a/configs/sbc8548_defconfig +++ b/configs/sbc8548_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_SBC8548=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 +# CONFIG_MISC_INIT_R is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y @@ -19,7 +20,7 @@ CONFIG_CMD_PING=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig index 56a4a2f225..12387d4386 100644 --- a/configs/sc_sps_1_defconfig +++ b/configs/sc_sps_1_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_SC_SPS_1=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200" @@ -29,6 +30,7 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_MMC_MXS=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index 75fe74d7d5..7799d53475 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_SEABOARD=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " # CONFIG_CMD_IMI is not set diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig index 9c3d65a841..cab9ad10fa 100644 --- a/configs/secomx6quq7_defconfig +++ b/configs/secomx6quq7_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_SECOMX6=y CONFIG_SECOMX6_UQ7=y CONFIG_SECOMX6Q=y CONFIG_SECOMX6_2GB=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y @@ -28,5 +29,5 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index f2031df845..cfbb3f5fc5 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -7,6 +7,7 @@ CONFIG_BOARD_SFR_NB4_SER=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index ce233afa50..04f922f61b 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1b0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index b965ff442a..c514fd3672 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_SHEEVAPLUG=y CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug" +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set @@ -31,8 +32,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_MVSATA_IDE=y -CONFIG_NETDEVICES=y CONFIG_MVGBE=y +CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 0437c39e75..34a39a7e72 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index f4e0aefabb..bd9cc735a8 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6QDL" @@ -35,7 +36,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_PHY_MICREL_KSZ8XXX=y -CONFIG_NETDEVICES=y CONFIG_FEC_MXC=y +CONFIG_MII=y CONFIG_DM_THERMAL=y CONFIG_OF_LIBFDT=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index f6ec130ce2..5b16dced31 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -12,6 +12,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_BOOTDELAY=3 diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index fbca175ff7..bb6420ed59 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5250" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 6b3909878e..9f7511fcb4 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5420" CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=7 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 74e7b6b7fb..068afe73eb 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x34800000 CONFIG_TARGET_SMDKC100=y CONFIG_IDENT_STRING=" for SMDKC100" CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)" diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index e707311069..7ce29bfb90 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_SNAPPER9260=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_BOOTDELAY=3 diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 073e855f71..2773c6b41b 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_SNAPPER9260=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" CONFIG_BOOTDELAY=3 diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 7e7f7dfa74..269d59ec53 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_SNIPER=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set @@ -25,6 +26,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x2000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_SYS_OMAP24_I2C_SPEED=400000 +CONFIG_TWL4030_INPUT=y CONFIG_MMC_OMAP_HS=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 7440ab3d13..8fb31ba5c3 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -12,6 +12,7 @@ CONFIG_IDENT_STRING=" for snow" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 4278bd06c8..4b0d47489a 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_arria10" CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" # CONFIG_USE_BOOTCOMMAND is not set @@ -34,5 +35,8 @@ CONFIG_DWAPB_GPIO=y CONFIG_DM_MMC=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 9b18d3e4c9..bd18bd4441 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -58,6 +59,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 8ab97efcc5..e039383bbe 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -59,6 +60,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index e4468e9aa0..19f412870d 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -54,6 +55,7 @@ CONFIG_MTD_PARTITIONS=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_USB=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index d56cb7d5a3..b02847b815 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -53,6 +54,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 9f57f64ce6..2aac0404e2 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -50,6 +51,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 34bb903ebf..e974685f0c 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -49,6 +50,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_USB=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 68a37f51cd..3c69276a20 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -53,6 +54,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 7c6c76ad19..41423010ac 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -59,6 +60,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index c5d5fa69f5..b45984cf51 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -59,6 +60,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 71fc2fe8f9..f9a7a6d307 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -59,6 +60,7 @@ CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index b13518aca1..dceadff439 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FAT_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=5 CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y @@ -45,6 +46,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index f0b4d46cb0..ae65b60bd3 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -15,6 +16,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -74,6 +76,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index f07d1a2d14..8ccd80cd43 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -33,7 +33,7 @@ CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index 9a2676adcd..0a36c338d7 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -12,6 +12,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTAGE=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index 1d0b3fbbc7..ea826aabad 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -10,6 +10,7 @@ CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig index 579bd3e350..164e3d8470 100644 --- a/configs/spear300_defconfig +++ b/configs/spear300_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR300" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig index ea94770cb7..17bff86ac5 100644 --- a/configs/spear300_nand_defconfig +++ b/configs/spear300_nand_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR300" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -23,7 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig index 2b370f38b4..297f7890e9 100644 --- a/configs/spear300_usbtty_defconfig +++ b/configs/spear300_usbtty_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig index 89fbf20bc5..e1b1e9362e 100644 --- a/configs/spear300_usbtty_nand_defconfig +++ b/configs/spear300_usbtty_nand_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -23,7 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig index ffbc25d63f..4263afbc45 100644 --- a/configs/spear310_defconfig +++ b/configs/spear310_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR310" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig index c9981ee0ef..433d972e84 100644 --- a/configs/spear310_nand_defconfig +++ b/configs/spear310_nand_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR310" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -23,7 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig index e31266f6a0..7b9f7fe7c0 100644 --- a/configs/spear310_pnor_defconfig +++ b/configs/spear310_pnor_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,FLASH_PNOR" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig index ebbbf9229e..2b05b56e60 100644 --- a/configs/spear310_usbtty_defconfig +++ b/configs/spear310_usbtty_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig index 6640d5f633..bb14524901 100644 --- a/configs/spear310_usbtty_nand_defconfig +++ b/configs/spear310_usbtty_nand_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -23,7 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig index d68cc45764..bab444aeec 100644 --- a/configs/spear310_usbtty_pnor_defconfig +++ b/configs/spear310_usbtty_pnor_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,FLASH_PNOR" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig index 5d31874d2e..3dc24d6500 100644 --- a/configs/spear320_defconfig +++ b/configs/spear320_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR320" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig index 65fdb1cd23..10bcf69b0e 100644 --- a/configs/spear320_nand_defconfig +++ b/configs/spear320_nand_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR320" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -23,7 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig index cf81df2cdd..d1e5140ff4 100644 --- a/configs/spear320_pnor_defconfig +++ b/configs/spear320_pnor_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,FLASH_PNOR" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig index 9e9b12ffbd..48449f7b0a 100644 --- a/configs/spear320_usbtty_defconfig +++ b/configs/spear320_usbtty_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig index f6045c83f4..c9e3b5bf56 100644 --- a/configs/spear320_usbtty_nand_defconfig +++ b/configs/spear320_usbtty_nand_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -23,7 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig index a94bf6393e..d3cdea9ad6 100644 --- a/configs/spear320_usbtty_pnor_defconfig +++ b/configs/spear320_usbtty_pnor_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,FLASH_PNOR" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig index 4969ec2b0c..e6784e0e42 100644 --- a/configs/spear600_defconfig +++ b/configs/spear600_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR600" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_AUTOBOOT_KEYED=y @@ -25,7 +27,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig index 010bd43e13..535a702218 100644 --- a/configs/spear600_nand_defconfig +++ b/configs/spear600_nand_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR600" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -23,7 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig index e66e818200..8cf0a24c76 100644 --- a/configs/spear600_usbtty_defconfig +++ b/configs/spear600_usbtty_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock3 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -22,7 +24,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig index 5b9c8339da..f69772b631 100644 --- a/configs/spear600_usbtty_nand_defconfig +++ b/configs/spear600_usbtty_nand_defconfig @@ -2,11 +2,13 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y CONFIG_SYS_TEXT_BASE=0x00700000 CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 mem=128M root=/dev/mtdblock7 rootfstype=jffs2" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_IMLS=y @@ -23,7 +25,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y CONFIG_MTD_PARTITIONS=y CONFIG_NAND=y -CONFIG_NETDEVICES=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 146cf0807b..fd3bfc95b9 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -12,6 +12,7 @@ CONFIG_IDENT_STRING=" for spring" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index ba1ff25d35..2f2c640584 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x7D600000 CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260" CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index 7ec3646fb1..a61601fa0d 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -6,9 +6,11 @@ CONFIG_STM32F4=y CONFIG_TARGET_STM32F429_DISCOVERY=y CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index 3ddd5c50fb..8a0bff9698 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -5,25 +5,24 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_STM32F4=y CONFIG_TARGET_STM32F429_EVALUATION=y CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval" -CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MII is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y +# CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM_MMC=y diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index a55476f2f3..8a62ec7cb2 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -5,25 +5,24 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_STM32F4=y CONFIG_TARGET_STM32F469_DISCOVERY=y CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco" -CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y # CONFIG_RANDOM_UUID is not set CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MII is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y +# CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM_MMC=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 6f07ff1558..8ff6404ec7 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -6,6 +6,7 @@ CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" @@ -30,6 +31,7 @@ CONFIG_CMD_SNTP=y CONFIG_CMD_DNS=y CONFIG_CMD_LINK_LOCAL=y CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y @@ -50,6 +52,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index c6a0d10bdb..1cf8ee8905 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -5,33 +5,29 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_DISCO=y CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco" -CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 +# CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y +# CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y -# CONFIG_NET is not set CONFIG_DM_MMC=y CONFIG_STM32_SDMMC2=y # CONFIG_PINCTRL_FULL is not set # CONFIG_SPL_SERIAL_PRESENT is not set -CONFIG_REGEX=y CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER is not set diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index ab5273ba90..24e64948ee 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -5,33 +5,29 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_EVAL=y CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval" -CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 +# CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y +# CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y -# CONFIG_NET is not set CONFIG_DM_MMC=y CONFIG_STM32_SDMMC2=y # CONFIG_PINCTRL_FULL is not set # CONFIG_SPL_SERIAL_PRESENT is not set -CONFIG_REGEX=y CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER is not set diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index ad21bdbab4..df2895829d 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL=y CONFIG_TARGET_STM32MP1=y CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_I2C_SUPPORT=y @@ -31,6 +32,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_STM32_ADC=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_DM_MMC=y CONFIG_STM32_SDMMC2=y # CONFIG_PINCTRL_FULL is not set diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 2a6cea3322..e17fdd7b12 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot" +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig index 8dd00af0b3..6268279cea 100644 --- a/configs/strider_con_defconfig +++ b/configs/strider_con_defconfig @@ -33,7 +33,7 @@ CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig index 99e4501892..a45aba1fc3 100644 --- a/configs/strider_con_dp_defconfig +++ b/configs/strider_con_dp_defconfig @@ -33,7 +33,7 @@ CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig index 03cb04ddb2..ef2f0e4eb4 100644 --- a/configs/strider_cpu_defconfig +++ b/configs/strider_cpu_defconfig @@ -33,7 +33,7 @@ CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig index 096db4a5c7..be70e723b7 100644 --- a/configs/strider_cpu_dp_defconfig +++ b/configs/strider_cpu_dp_defconfig @@ -33,7 +33,7 @@ CONFIG_DOS_PARTITION=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 CONFIG_SYS_NS16550=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index d75151c717..500fd6574a 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_STV0991=y CONFIG_SYS_TEXT_BASE=0x00010000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stv0991" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="STV0991" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set @@ -25,6 +26,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MICREL=y -CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CADENCE_QSPI=y diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig index 4cb2798ce7..8a636c4e66 100644 --- a/configs/sun8i_a23_evb_defconfig +++ b/configs/sun8i_a23_evb_defconfig @@ -8,6 +8,7 @@ CONFIG_USB0_VBUS_PIN="axp_drivebus" CONFIG_USB0_VBUS_DET="axp_vbus_detect" CONFIG_USB1_VBUS_PIN="PH7" CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-evb" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index d88dd4ebad..041103cafc 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -10,6 +10,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig index ede7e7316c..6bb1ae0e00 100644 --- a/configs/suvd3_defconfig +++ b/configs/suvd3_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_SUVD3=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SUVD3" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -26,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 6fb56afbe9..f8dbf9d014 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -45,6 +45,7 @@ CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig index dc26f3667d..daca05e84b 100644 --- a/configs/tao3530_defconfig +++ b/configs/tao3530_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_TAO3530=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y @@ -24,6 +25,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs)" CONFIG_ENV_IS_IN_NAND=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 3c6b8866a7..122ea4efc2 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 99093e0c68..55cd9bd998 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_TBS2910=y CONFIG_CMD_HDMIDETECT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_PRE_CONSOLE_BUFFER=y @@ -40,6 +41,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_THERMAL=y CONFIG_USB=y diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig index 5d58f5ceb4..7094384a89 100644 --- a/configs/tbs_a711_defconfig +++ b/configs/tbs_a711_defconfig @@ -12,6 +12,7 @@ CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_USB0_ID_DET="PH11" CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-tbs-a711" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 77a3da4c06..ccc5aa5d85 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA30=y CONFIG_TARGET_TEC_NG=y CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng" +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/tec_defconfig b/configs/tec_defconfig index a14f2c2feb..3fdea8ae4e 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_TEC=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" +CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index c18edc1f0a..698d2a0c39 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -13,6 +13,7 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTAGE=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index 736d052ed7..e4894c89c5 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -12,6 +12,7 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTAGE=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index bcbb5ccae2..f44831bbb9 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -11,6 +11,7 @@ CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_SEABIOS=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTAGE=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 473d5ec728..697be1aa10 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -59,6 +60,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 4eb58015b5..981b1d8a14 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -56,6 +57,7 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_NAND=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_DFU_NAND=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index b7c01aa634..c3e0361c3e 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -6,6 +6,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core" CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e024000000 debug maxcpus=48 rootwait rw root=/dev/sda2 coherent_pool=16M" diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig index 3086b72d21..b78dc7e017 100644 --- a/configs/ti814x_evm_defconfig +++ b/configs/ti814x_evm_defconfig @@ -11,8 +11,10 @@ CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -35,5 +37,6 @@ CONFIG_CMD_FAT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_DRIVER_TI_CPSW=y +CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 17d3308991..270646ef2f 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyO2,115200n8 noinitrd earlyprintk" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_MISC_INIT_R is not set CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -43,6 +44,8 @@ CONFIG_SYS_I2C_OMAP24XX=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y +CONFIG_MII=y +CONFIG_DRIVER_TI_EMAC=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index b8043cbff3..76b77802ae 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index 0f658ff315..9e0dfdafae 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -2,9 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_TITANIUM=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/barco/titanium/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Titanium > " @@ -36,7 +38,7 @@ CONFIG_NAND_MXS=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index cc0d032d91..37f161cc5c 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x4fc00000 CONFIG_TARGET_TQMA6=y CONFIG_TQMA6DL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,7 +37,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 061c52cd20..381d5d75f9 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x4fc00000 CONFIG_TARGET_TQMA6=y CONFIG_TQMA6DL=y CONFIG_TQMA6X_SPI_BOOT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -37,7 +38,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index a2a27aa538..0db49b7c2e 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x4fc00000 CONFIG_TARGET_TQMA6=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,7 +36,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index 8d7181cb30..fbad8ba248 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x4fc00000 CONFIG_TARGET_TQMA6=y CONFIG_TQMA6X_SPI_BOOT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,7 +37,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 9ee86fb966..9bfb08fe98 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x2fc00000 CONFIG_TARGET_TQMA6=y CONFIG_TQMA6S=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,7 +37,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 7def5752ef..9168fdcd39 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x2fc00000 CONFIG_TARGET_TQMA6=y CONFIG_TQMA6S=y CONFIG_TQMA6X_SPI_BOOT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -37,7 +38,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig index 898d334e79..df4c87eea6 100644 --- a/configs/tqma6s_wru4_mmc_defconfig +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -4,12 +4,14 @@ CONFIG_SYS_TEXT_BASE=0x2fc00000 CONFIG_TARGET_TQMA6=y CONFIG_TQMA6S=y CONFIG_WRU4=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="imx6s-wru4.dtb" +CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y @@ -58,6 +60,7 @@ CONFIG_LED_STATUS_CMD=y CONFIG_PCA9551_LED=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 93aa211707..fb9bd729c8 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -13,6 +13,7 @@ CONFIG_BOOTARGS="Please use defined boot" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="Trats2 # " # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index c929157efe..386a140b1d 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -12,6 +12,7 @@ CONFIG_BOOTARGS="Please use defined boot" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y CONFIG_SYS_PROMPT="Trats # " # CONFIG_CMD_XIMG is not set CONFIG_CMD_THOR_DOWNLOAD=y diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig index f8a87a8242..f92d391e3f 100644 --- a/configs/tricorder_defconfig +++ b/configs/tricorder_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_TRICORDER=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=0 CONFIG_SILENT_CONSOLE=y CONFIG_HUSH_PARSER=y @@ -33,6 +34,7 @@ CONFIG_LED_STATUS2=y CONFIG_LED_STATUS_BIT2=4 CONFIG_LED_STATUS_STATE2=2 CONFIG_LED_STATUS_CMD=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SPL_NAND_SIMPLE=y diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig index 408814eac7..b44a76656e 100644 --- a/configs/tricorder_flash_defconfig +++ b/configs/tricorder_flash_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_TRICORDER=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_EXTRA_OPTIONS="FLASHCARD" CONFIG_BOOTDELAY=0 CONFIG_SILENT_CONSOLE=y @@ -32,6 +33,7 @@ CONFIG_LED_STATUS2=y CONFIG_LED_STATUS_BIT2=4 CONFIG_LED_STATUS_STATE2=2 CONFIG_LED_STATUS_CMD=y +CONFIG_TWL4030_LED=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SPL_NAND_SIMPLE=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 38e4a90dfe..c1bdedf837 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_TRIMSLICE=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/ts4600_defconfig b/configs/ts4600_defconfig index 91af6ce9cd..8062532396 100644 --- a/configs/ts4600_defconfig +++ b/configs/ts4600_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_TS4600=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig index d92c15c002..e1766bde99 100644 --- a/configs/ts4800_defconfig +++ b/configs/ts4800_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x90008000 CONFIG_TARGET_TS4800=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -16,6 +17,7 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_OF_LIBFDT=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 4ace459571..1c67bc0c15 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_TUXX1=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="TUGE1" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -26,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index de9aedc764..cda9e469c0 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -8,6 +8,7 @@ CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 190f3dd04f..3bcfa6b606 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -14,8 +14,10 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C_SUPPORT=y @@ -42,6 +44,7 @@ CONFIG_MMC_SDHCI_MV=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y +CONFIG_MII=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 3e45802438..de22b0b5ea 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_TUXX1=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="TUXX1" +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y @@ -26,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y diff --git a/configs/twister_defconfig b/configs/twister_defconfig index dffd8254fb..4e3000c44a 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x80008000 CONFIG_TARGET_TWISTER=y CONFIG_EMIF4=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=10 # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_SPL_OS_BOOT=y @@ -36,9 +37,10 @@ CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SPL_NAND_SIMPLE=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x2C000000 +CONFIG_DRIVER_TI_EMAC=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 1a162e5b17..52de8ca46c 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -38,6 +39,6 @@ CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_DM_THERMAL=y CONFIG_OF_LIBFDT=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index f09507ca00..de0e03726b 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y @@ -28,4 +29,5 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index fc5bc00d18..1c96814e35 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL=y CONFIG_ARCH_UNIPHIER_LD4_SLD8=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_LOGLEVEL=6 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index ce7bcfc97d..6c0a283a5c 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_LOGLEVEL=6 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index 4a96c70103..c7e0a1e783 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ARCH_UNIPHIER_V8_MULTI=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" +CONFIG_NR_DRAM_BANKS=3 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_LOGLEVEL=6 CONFIG_CMD_CONFIG=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 31712c1984..d2bfdfadad 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_USB_A9263=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEFAULT_DEVICE_TREE="usb_a9263" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 2e5bdadb80..4bac8f1fe6 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_TARGET_USBARMORY=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_FUSE=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 550038c8fe..9f88d665e4 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_TEGRA124=y CONFIG_TARGET_VENICE2=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 70e28f7db7..65535858bb 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_TEGRA20=y CONFIG_TARGET_VENTANA=y CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " # CONFIG_CMD_IMI is not set diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig index 48d42bb103..65acbda274 100644 --- a/configs/vexpress_aemv8a_dram_defconfig +++ b/configs/vexpress_aemv8a_dram_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x88000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c090000 debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait loglevel=9" diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 122960142d..7b5e4e66bc 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0xe0000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlyprintk=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9" diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 4e375e8261..896dd89de9 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x88000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlyprintk=pl011,0x1c090000 debug user_debug=31 loglevel=9" diff --git a/configs/vexpress_ca15_tc2_defconfig b/configs/vexpress_ca15_tc2_defconfig index 9aba46761a..adf2edec25 100644 --- a/configs/vexpress_ca15_tc2_defconfig +++ b/configs/vexpress_ca15_tc2_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS_CA15_TC2=y CONFIG_SYS_TEXT_BASE=0x80800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/vexpress_ca5x2_defconfig b/configs/vexpress_ca5x2_defconfig index 942ab12a59..e9b3ff86ba 100644 --- a/configs/vexpress_ca5x2_defconfig +++ b/configs/vexpress_ca5x2_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS_CA5X2=y CONFIG_SYS_TEXT_BASE=0x80800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 1daee231ed..790a9849b2 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS_CA9X4=y CONFIG_SYS_TEXT_BASE=0x60800000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index 833fcdfb80..af2e3428c6 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=3 @@ -35,5 +36,6 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 7544624c9a..b79f88e842 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=3 @@ -35,5 +36,6 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index a47e0ba2d6..764f6ce8d6 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x20f00000 CONFIG_TARGET_VINCO=y CONFIG_DEFAULT_DEVICE_TREE="at91-vinco" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 8cc030bd3c..019f79c830 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_SAMTEC_VINING_2000=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/samtec/vining_2000/imximage.cfg" CONFIG_BOOTDELAY=0 CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -33,6 +34,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig index f4fff9ce42..dae53cf238 100644 --- a/configs/vme8349_defconfig +++ b/configs/vme8349_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_VME8349=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=6 +CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y @@ -17,7 +18,6 @@ CONFIG_CMD_DATE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y CONFIG_TSEC_ENET=y CONFIG_BAUDRATE=9600 CONFIG_SYS_NS16550=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 01390b7b41..c7949eed91 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -11,6 +11,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index a01ea523b2..4d8ccff675 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" # CONFIG_CONSOLE_MUX is not set @@ -36,6 +37,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 2e0f7b767b..15a66739f8 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -7,6 +7,7 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg" CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/warp_defconfig b/configs/warp_defconfig index db268f0207..6a9c91e18e 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_WARP=y # CONFIG_CMD_BMODE is not set +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig index f8c8ddbbd1..b7cc6003c6 100644 --- a/configs/wb45n_defconfig +++ b/configs/wb45n_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig index ea27852df7..5b255891e1 100644 --- a/configs/wb50n_defconfig +++ b/configs/wb50n_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index 00bc7743b7..fb57e88f3f 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_WOODBURN=y CONFIG_SYS_TEXT_BASE=0xA0000000 +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y @@ -33,5 +34,6 @@ CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index 9dc32bbfe0..f9c7988e49 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/woodburn/imximage.cfg" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set @@ -44,5 +45,6 @@ CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 55e790f972..7504077558 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HD44760=y CONFIG_CMD_MAX6957=y +CONFIG_NR_DRAM_BANKS=2 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS2,115200n8" diff --git a/configs/x600_defconfig b/configs/x600_defconfig index 77f2b037e7..4af1a21e81 100644 --- a/configs/x600_defconfig +++ b/configs/x600_defconfig @@ -9,8 +9,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_IDENT_STRING="-SPEAr" +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y @@ -47,8 +49,8 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig index 7f6a8d0561..6046ebe9e7 100644 --- a/configs/xfi3_defconfig +++ b/configs/xfi3_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_XFI3=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 " diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 65a72b7f99..5edbba1a49 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x10000 # CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=-1 CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index c32ba73b1f..8cb47ce4cc 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x10000 # CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=-1 CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 3117770263..afdfcd5d77 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x10000 # CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_BOOTDELAY=-1 CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index a4bc895030..9e404bd5f9 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y # CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" +CONFIG_NR_DRAM_BANKS=1 # CONFIG_IMAGE_FORMAT_LEGACY is not set CONFIG_BOOTDELAY=-1 # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index 9e667ff7d5..ff2bc356d1 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -5,6 +5,7 @@ CONFIG_DEBUG_UART_BASE=0xff010000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTSTAGE=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="ZynqMP r5> " diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 3a65cd96ff..c25e8466cf 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -76,6 +76,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 7df6b2a7b6..7dfb637aec 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -69,6 +69,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig index aaa025bd9e..00e73c4425 100644 --- a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig @@ -65,6 +65,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index efb0b20cdc..b1d8a249c7 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -62,6 +62,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index 1a6124b273..d95434578a 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -56,6 +56,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig index 0ca141b740..0a75fe45a4 100644 --- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig +++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig @@ -90,6 +90,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig index abc8cf5d18..ead61ca15d 100644 --- a/configs/xilinx_zynqmp_zcu102_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig @@ -87,6 +87,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 09e6f798c5..cf313ae562 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -87,6 +87,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/xilinx_zynqmp_zcu104_revA_defconfig b/configs/xilinx_zynqmp_zcu104_revA_defconfig index 34ea79b3f2..5da1778ff3 100644 --- a/configs/xilinx_zynqmp_zcu104_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revA_defconfig @@ -73,6 +73,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/xilinx_zynqmp_zcu104_revC_defconfig b/configs/xilinx_zynqmp_zcu104_revC_defconfig index 9d072a355c..5169cc4fcc 100644 --- a/configs/xilinx_zynqmp_zcu104_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revC_defconfig @@ -73,6 +73,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/xilinx_zynqmp_zcu106_revA_defconfig b/configs/xilinx_zynqmp_zcu106_revA_defconfig index 45f9884ea3..419c25531a 100644 --- a/configs/xilinx_zynqmp_zcu106_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu106_revA_defconfig @@ -82,6 +82,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/xilinx_zynqmp_zcu111_revA_defconfig b/configs/xilinx_zynqmp_zcu111_revA_defconfig index e035faa575..d60c1c2b12 100644 --- a/configs/xilinx_zynqmp_zcu111_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu111_revA_defconfig @@ -75,6 +75,7 @@ CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig index 726c199735..f52749cc01 100644 --- a/configs/xpedite517x_defconfig +++ b/configs/xpedite517x_defconfig @@ -29,7 +29,7 @@ CONFIG_DS4510=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_PANIC_HANG=y diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig index b5fec08b46..296bb017a9 100644 --- a/configs/xpedite520x_defconfig +++ b/configs/xpedite520x_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -29,7 +30,7 @@ CONFIG_CMD_PCA953X=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_PANIC_HANG=y diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig index 29e4fada85..6f2102e02a 100644 --- a/configs/xpedite537x_defconfig +++ b/configs/xpedite537x_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_REGINFO=y @@ -32,7 +33,7 @@ CONFIG_DS4510=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_PANIC_HANG=y diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig index 89f9300723..5e43d22884 100644 --- a/configs/xpedite550x_defconfig +++ b/configs/xpedite550x_defconfig @@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=3 +# CONFIG_MISC_INIT_R is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y @@ -30,7 +31,7 @@ CONFIG_CMD_PCA953X=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y -CONFIG_NETDEVICES=y +CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig index 5c50470616..caf0f6165a 100644 --- a/configs/xpress_defconfig +++ b/configs/xpress_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_TARGET_XPRESS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ccv/xpress/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -25,6 +26,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index 50397fc824..7eefa92fc5 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -35,6 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index 759b4a5524..77354fec07 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -2,6 +2,7 @@ CONFIG_XTENSA=y CONFIG_SYS_CPU="dc233c" CONFIG_XTFPGA_KC705=y CONFIG_BOOTDELAY=10 +CONFIG_MISC_INIT_R=y CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig index 2208549971..c79cd22936 100644 --- a/configs/zc5202_defconfig +++ b/configs/zc5202_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" @@ -34,6 +35,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MII=y CONFIG_PCI=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig index a06ebd5ed9..e92c63df12 100644 --- a/configs/zc5601_defconfig +++ b/configs/zc5601_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" @@ -34,6 +35,7 @@ CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_OF_LIBFDT=y diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig index 935058a2b8..5a5f211ce9 100644 --- a/configs/zipitz2_defconfig +++ b/configs/zipitz2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_ZIPITZ2=y CONFIG_SYS_TEXT_BASE=0x0 +CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=tty0 console=ttyS2,115200 fbcon=rotate:3" # CONFIG_CONSOLE_MUX is not set diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig index b3eb1ca534..02acb11f94 100644 --- a/configs/zmx25_defconfig +++ b/configs/zmx25_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX25=y CONFIG_SYS_TEXT_BASE=0xA0000000 CONFIG_TARGET_ZMX25=y +CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set @@ -22,6 +23,7 @@ CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_MII=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig index 26fdafb7c0..b856a93508 100644 --- a/configs/zynq_cc108_defconfig +++ b/configs/zynq_cc108_defconfig @@ -43,6 +43,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 48f223bfd1..3aaacf1276 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_minized_defconfig b/configs/zynq_minized_defconfig index 8df0736c1c..62e9b16e59 100644 --- a/configs/zynq_minized_defconfig +++ b/configs/zynq_minized_defconfig @@ -48,6 +48,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index 0136502e11..239e063052 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -35,6 +35,7 @@ CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig index ce3ec001ac..ba0731059c 100644 --- a/configs/zynq_z_turn_defconfig +++ b/configs/zynq_z_turn_defconfig @@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index bac538c8e2..55c5d53a72 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -60,6 +60,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 991784d63b..f32a28afc6 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -58,6 +58,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 6364e2b9d7..f5c459c2df 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -51,6 +51,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index 275bb33eeb..5dee08ec99 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -38,5 +38,6 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 833753e747..407dd079e0 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -44,6 +44,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 818b398eb8..55f53f714b 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 3dfc62162f..71ac525deb 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -55,6 +55,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig index ad44e772aa..73930f1dbd 100644 --- a/configs/zynq_zybo_z7_defconfig +++ b/configs/zynq_zybo_z7_defconfig @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHY_REALTEK=y +CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_ZYNQ_SERIAL=y diff --git a/disk/part.c b/disk/part.c index 9266a09ec3..9e457a6e72 100644 --- a/disk/part.c +++ b/disk/part.c @@ -400,7 +400,7 @@ int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str, *dev_desc = get_dev_hwpart(ifname, dev, hwpart); if (!(*dev_desc) || ((*dev_desc)->type == DEV_TYPE_UNKNOWN)) { - printf("** Bad device %s %s **\n", ifname, dev_hwpart_str); + debug("** Bad device %s %s **\n", ifname, dev_hwpart_str); dev = -ENOENT; goto cleanup; } diff --git a/doc/README.iscsi b/doc/README.iscsi index cb71c6e744..faee636264 100644 --- a/doc/README.iscsi +++ b/doc/README.iscsi @@ -1,6 +1,8 @@ -# iSCSI booting with U-Boot and iPXE +iSCSI booting with U-Boot and iPXE +================================== -## Motivation +Motivation +---------- U-Boot has only a reduced set of supported network protocols. The focus for network booting has been on UDP based protocols. A TCP stack and HTTP support @@ -32,14 +34,15 @@ via HTTPS and to download any other files needed for booting via iSCSI from the same target where the operating system is installed. An alternative to implementing these protocols in U-Boot is to use an existing -software that can run on top of U-Boot. iPXE is the "swiss army knife" of +software that can run on top of U-Boot. iPXE[1] is the "swiss army knife" of network booting. It supports both HTTPS and iSCSI. It has a scripting engine for fine grained control of the boot process and can provide a command shell. iPXE can be built as an EFI application (named snp.efi) which can be loaded and run by U-Boot. -## Boot sequence +Boot sequence +------------- U-Boot loads the EFI application iPXE snp.efi using the bootefi command. This application has network access via the simple network protocol offered by @@ -56,67 +59,68 @@ For a selected iSCSI target iPXE sets up a handle with the block IO protocol. It uses the ConnectController boot service of U-Boot to request U-Boot to connect a file system driver. U-Boot reads from the iSCSI drive via the block IO protocol offered by iPXE. It creates the partition handles and installs the simple file -protocol. Now iPXE can call the simple file protocol to load Grub. U-Boot uses -the block IO protocol offered by iPXE to fulfill the request. - -Once Grub is started it uses the same block IO protocol to load Linux. Via -the EFI stub Linux is called as an EFI application. - -``` - +--------+ +--------+ - | | Runs | | - | U-Boot |=========>| iPXE | - | EFI | | snp.efi| -+--------+ | | DHCP | | -| |<====|********|<=========| | -| DHCP | | | Get IP | | -| Server | | | Address | | -| |====>|********|=========>| | -+--------+ | | Response | | - | | | | - | | | | -+--------+ | | HTTPS | | -| |<====|********|<=========| | -| HTTPS | | | Load | | -| Server | | | Script | | -| |====>|********|=========>| | -+--------+ | | | | - | | | | - | | | | -+--------+ | | iSCSI | | -| |<====|********|<=========| | -| iSCSI | | | Auth | | -| Server |====>|********|=========>| | -| | | | | | -| | | | Loads | | -| |<====|********|<=========| | +--------+ -| | | | Grub | | Runs | | -| |====>|********|=========>| |=======>| Grub | -| | | | | | | | -| | | | | | | | -| | | | | | Loads | | -| |<====|********|<=========|********|<=======| | +--------+ -| | | | | | Linux | | Runs | | -| |====>|********|=========>|********|=======>| |=====>| Linux | -| | | | | | | | | | -+--------+ +--------+ +--------+ +--------+ | | - | | - | | - | ~ ~ ~ ~| -``` - -## Security +protocol. Now iPXE can call the simple file protocol to load GRUB[2]. U-Boot +uses the block IO protocol offered by iPXE to fulfill the request. + +Once GRUB is started it uses the same block IO protocol to load Linux. Via +the EFI stub Linux is called as an EFI application:: + + +--------+ +--------+ + | | Runs | | + | U-Boot |========>| iPXE | + | EFI | | snp.efi| + +--------+ | | DHCP | | + | |<===|********|<========| | + | DHCP | | | Get IP | | + | Server | | | Address | | + | |===>|********|========>| | + +--------+ | | Response| | + | | | | + | | | | + +--------+ | | HTTPS | | + | |<===|********|<========| | + | HTTPS | | | Load | | + | Server | | | Script | | + | |===>|********|========>| | + +--------+ | | | | + | | | | + | | | | + +--------+ | | iSCSI | | + | |<===|********|<========| | + | iSCSI | | | Auth | | + | Server |===>|********|========>| | + | | | | | | + | | | | Loads | | + | |<===|********|<========| | +--------+ + | | | | GRUB | | Runs | | + | |===>|********|========>| |======>| GRUB | + | | | | | | | | + | | | | | | | | + | | | | | | Loads | | + | |<===|********|<========|********|<======| | +--------+ + | | | | | | Linux | | Runs | | + | |===>|********|========>|********|======>| |=====>| Linux | + | | | | | | | | | | + +--------+ +--------+ +--------+ +--------+ | | + | | + | | + | ~ ~ ~ ~| + +Security +-------- The iSCSI protocol is not encrypted. The traffic could be secured using IPsec but neither U-Boot nor iPXE does support this. So we should at least separate the iSCSI traffic from all other network traffic. This can be achieved using a virtual local area network (VLAN). -## Configuration +Configuration +------------- -### iPXE +iPXE +^^^^ -For running iPXE on arm64 the bin-arm64-efi/snp.efi build target is needed. +For running iPXE on arm64 the bin-arm64-efi/snp.efi build target is needed:: git clone http://git.ipxe.org/ipxe.git cd ipxe/src @@ -132,7 +136,7 @@ http://ipxe.org/cfg iPXE by default will put the CPU to rest when waiting for input. U-Boot does not wake it up due to missing interrupt support. To avoid this behavior create -file src/config/local/nap.h. +file src/config/local/nap.h:: /* nap.h */ #undef NAP_EFIX86 @@ -140,7 +144,7 @@ file src/config/local/nap.h. #define NAP_NULL The supported commands in iPXE are controlled by an include, too. Putting the -following into src/config/local/general.h is sufficient for most use cases. +following into src/config/local/general.h is sufficient for most use cases:: /* general.h */ #define NSLOOKUP_CMD /* Name resolution command */ @@ -153,7 +157,9 @@ following into src/config/local/general.h is sufficient for most use cases. #define DOWNLOAD_PROTO_NFS /* Network File System Protocol */ #define DOWNLOAD_PROTO_FILE /* Local file system access */ -## Links +Links +----- -* https://ipxe.org - iPXE open source boot firmware -* https://www.gnu.org/software/grub/ - GNU Grub (Grand Unified Bootloader) +* [1](https://ipxe.org) https://ipxe.org - iPXE open source boot firmware +* [2](https://www.gnu.org/software/grub/) https://www.gnu.org/software/grub/ - + GNU GRUB (Grand Unified Bootloader) diff --git a/doc/README.rockusb b/doc/README.rockusb index 5405dc48c1..66437e17e4 100644 --- a/doc/README.rockusb +++ b/doc/README.rockusb @@ -42,9 +42,14 @@ see doc/README.rockchip for more detail about how to get U-Boot binary. sudo rkdeveloptool wl 64 <U-Boot binary> -There are plenty of Rockusb command. but wl(write lba) and -rd(reboot) command. These two command can let people flash -image to device. +Current set of rkdeveloptool commands supported: +- rci: Read Chip Info +- rfi: Read Flash Id +- rd : Reset Device +- td : Test Device Ready +- rl : Read blocks using LBA +- wl : Write blocks using LBA +- wlx: Write partition To do ----- diff --git a/doc/README.x86 b/doc/README.x86 index 9162ea17d8..8cc46725f2 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -47,21 +47,6 @@ on other architectures, like below: $ make coreboot_defconfig $ make all -Note this default configuration will build a U-Boot payload for the QEMU board. -To build a coreboot payload against another board, you can change the build -configuration during the 'make menuconfig' process. - -x86 architecture ---> - ... - (qemu-x86) Board configuration file - (qemu-x86_i440fx) Board Device Tree Source (dts) file - (0x01920000) Board specific Cache-As-RAM (CAR) address - (0x4000) Board specific Cache-As-RAM (CAR) size - -Change the 'Board configuration file' and 'Board Device Tree Source (dts) file' -to point to a new board. You can also change the Cache-As-RAM (CAR) related -settings here if the default values do not fit your new board. - Build Instructions for U-Boot as main bootloader ------------------------------------------------ @@ -427,17 +412,10 @@ To enable video you must enable these options in coreboot: - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5)) - Keep VESA framebuffer -And include coreboot_fb.dtsi in your board's device tree source file, like: - - /include/ "coreboot_fb.dtsi" - At present it seems that for Minnowboard Max, coreboot does not pass through the video information correctly (it always says the resolution is 0x0). This works correctly for link though. -Note: coreboot framebuffer driver does not work on QEMU. The reason is unknown -at this point. Patches are welcome if you figure out anything wrong. - Test with QEMU for bare mode ---------------------------- QEMU is a fancy emulator that can enable us to test U-Boot without access to diff --git a/doc/device-tree-bindings/regulator/fixed.txt b/doc/device-tree-bindings/regulator/fixed.txt index 5fd9033fea..453d2bef44 100644 --- a/doc/device-tree-bindings/regulator/fixed.txt +++ b/doc/device-tree-bindings/regulator/fixed.txt @@ -11,6 +11,7 @@ Required properties: Optional properties: - gpio: GPIO to use for enable control - startup-delay-us: startup time in microseconds +- u-boot,off-on-delay-us: off delay time in microseconds - regulator constraints (binding info: regulator.txt) - enable-active-high: Polarity of GPIO is Active high. If this property is missing, the default assumed is Active low. diff --git a/doc/uImage.FIT/beaglebone_vboot.txt b/doc/uImage.FIT/beaglebone_vboot.txt index f1862c2753..685ec1f46d 100644 --- a/doc/uImage.FIT/beaglebone_vboot.txt +++ b/doc/uImage.FIT/beaglebone_vboot.txt @@ -462,7 +462,7 @@ you sign. cd $UBOOT make O=b/am335x_boneblack_vboot EXT_DTB=${WORK}/am335x-boneblack-pubkey.dtb -Here we are overrriding the normal device tree file with our one, which +Here we are overriding the normal device tree file with our one, which contains the public key. Now you have a special U-Boot image with the public key. It can verify can diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt index d2793a195d..d701b9bb76 100644 --- a/doc/uImage.FIT/source_file_format.txt +++ b/doc/uImage.FIT/source_file_format.txt @@ -164,7 +164,9 @@ the '/images' node should have the following layout: - data : Path to the external file which contains this node's binary data. - compression : Compression used by included data. Supported compressions are "gzip" and "bzip2". If no compression is used compression property - should be set to "none". + should be set to "none". If the data is compressed but it should not be + uncompressed by U-Boot (e.g. compressed ramdisk), this should also be set + to "none". Conditionally mandatory property: - os : OS name, mandatory for types "kernel" and "ramdisk". Valid OS names diff --git a/drivers/Kconfig b/drivers/Kconfig index c72abf8932..56536c4b19 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -8,6 +8,8 @@ source "drivers/adc/Kconfig" source "drivers/ata/Kconfig" +source "drivers/axi/Kconfig" + source "drivers/block/Kconfig" source "drivers/bootcount/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index d53208540e..d296354b3c 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -103,6 +103,7 @@ obj-y += smem/ obj-y += soc/ obj-$(CONFIG_REMOTEPROC) += remoteproc/ obj-y += thermal/ +obj-y += axi/ obj-$(CONFIG_MACH_PIC32) += ddr/microchip/ endif diff --git a/drivers/axi/Kconfig b/drivers/axi/Kconfig new file mode 100644 index 0000000000..f81d843f89 --- /dev/null +++ b/drivers/axi/Kconfig @@ -0,0 +1,32 @@ +menuconfig AXI + bool "AXI bus drivers" + help + Support AXI (Advanced eXtensible Interface) busses, a on-chip + interconnect specification for managing functional blocks in SoC + designs, which is also often used in designs involving FPGAs (e.g. + communication with IP cores in Xilinx FPGAs). + + These types of busses expose a virtual address space that can be + accessed using different address widths (8, 16, and 32 are supported + for now). + + Other similar bus architectures may be compatible as well. + +if AXI + +config IHS_AXI + bool "Enable IHS AXI driver" + depends on DM + help + Support for gdsys Integrated Hardware Systems Advanced eXtensible + Interface (IHS AXI) bus on a gdsys IHS FPGA used to communicate with + IP cores in the FPGA (e.g. video transmitter cores). + +config AXI_SANDBOX + bool "Enable AXI sandbox driver" + depends on DM + help + Support AXI (Advanced eXtensible Interface) emulation for the sandbox + environment. + +endif diff --git a/drivers/axi/Makefile b/drivers/axi/Makefile new file mode 100644 index 0000000000..66b6c5a28f --- /dev/null +++ b/drivers/axi/Makefile @@ -0,0 +1,12 @@ +# +# (C) Copyright 2017 +# Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_AXI) += axi-uclass.o +obj-$(CONFIG_IHS_AXI) += ihs_axi.o +obj-$(CONFIG_SANDBOX) += axi-emul-uclass.o +obj-$(CONFIG_SANDBOX) += sandbox_store.o +obj-$(CONFIG_AXI_SANDBOX) += axi_sandbox.o diff --git a/drivers/axi/axi-emul-uclass.c b/drivers/axi/axi-emul-uclass.c new file mode 100644 index 0000000000..06c42006ee --- /dev/null +++ b/drivers/axi/axi-emul-uclass.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include <common.h> +#include <axi.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <asm/axi.h> + +int axi_sandbox_get_emul(struct udevice *bus, ulong address, + enum axi_size_t size, struct udevice **emulp) +{ + struct udevice *dev; + u32 reg[2]; + uint offset; + + switch (size) { + case AXI_SIZE_8: + offset = 1; + break; + case AXI_SIZE_16: + offset = 2; + break; + case AXI_SIZE_32: + offset = 4; + break; + default: + debug("%s: Unknown AXI transfer size '%d'", bus->name, size); + offset = 0; + } + + /* + * Note: device_find_* don't activate the devices; they're activated + * as-needed below. + */ + for (device_find_first_child(bus, &dev); + dev; + device_find_next_child(&dev)) { + int ret; + + ret = dev_read_u32_array(dev, "reg", reg, ARRAY_SIZE(reg)); + if (ret) { + debug("%s: Could not read 'reg' property of %s\n", + bus->name, dev->name); + continue; + } + + /* + * Does the transfer's address fall into this device's address + * space? + */ + if (address >= reg[0] && address <= reg[0] + reg[1] - offset) { + /* If yes, activate it... */ + if (device_probe(dev)) { + debug("%s: Could not activate %s\n", + bus->name, dev->name); + return -ENODEV; + } + + /* ...and return it */ + *emulp = dev; + return 0; + } + } + + return -ENODEV; +} + +int axi_get_store(struct udevice *dev, u8 **storep) +{ + struct axi_emul_ops *ops = axi_emul_get_ops(dev); + + if (!ops->get_store) + return -ENOSYS; + + return ops->get_store(dev, storep); +} + +UCLASS_DRIVER(axi_emul) = { + .id = UCLASS_AXI_EMUL, + .name = "axi_emul", +}; diff --git a/drivers/axi/axi-uclass.c b/drivers/axi/axi-uclass.c new file mode 100644 index 0000000000..af8acd9f88 --- /dev/null +++ b/drivers/axi/axi-uclass.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2017 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include <common.h> +#include <dm.h> +#include <axi.h> + +int axi_read(struct udevice *dev, ulong address, void *data, + enum axi_size_t size) +{ + struct axi_ops *ops = axi_get_ops(dev); + + if (!ops->read) + return -ENOSYS; + + return ops->read(dev, address, data, size); +} + +int axi_write(struct udevice *dev, ulong address, void *data, + enum axi_size_t size) +{ + struct axi_ops *ops = axi_get_ops(dev); + + if (!ops->write) + return -ENOSYS; + + return ops->write(dev, address, data, size); +} + +UCLASS_DRIVER(axi) = { + .id = UCLASS_AXI, + .name = "axi", + .post_bind = dm_scan_fdt_dev, + .flags = DM_UC_FLAG_SEQ_ALIAS, +}; + diff --git a/drivers/axi/axi_sandbox.c b/drivers/axi/axi_sandbox.c new file mode 100644 index 0000000000..b91c91f6b3 --- /dev/null +++ b/drivers/axi/axi_sandbox.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include <common.h> +#include <axi.h> +#include <dm.h> +#include <asm/axi.h> + +/* + * This driver implements a AXI bus for the sandbox architecture for testing + * purposes. + * + * The bus forwards every access to it to a special AXI emulation device (which + * it gets via the axi_emul_get_ops function) that implements a simple + * read/write storage. + * + * The emulator device must still be contained in the device tree in the usual + * way, since configuration data for the storage is read from the DT. + */ + +static int axi_sandbox_read(struct udevice *bus, ulong address, void *data, + enum axi_size_t size) +{ + struct axi_emul_ops *ops; + struct udevice *emul; + int ret; + + /* Get emulator device */ + ret = axi_sandbox_get_emul(bus, address, size, &emul); + if (ret) + return ret == -ENODEV ? 0 : ret; + /* Forward all reads to the AXI emulator */ + ops = axi_emul_get_ops(emul); + if (!ops || !ops->read) + return -ENOSYS; + + return ops->read(emul, address, data, size); +} + +static int axi_sandbox_write(struct udevice *bus, ulong address, void *data, + enum axi_size_t size) +{ + struct axi_emul_ops *ops; + struct udevice *emul; + int ret; + + /* Get emulator device */ + ret = axi_sandbox_get_emul(bus, address, size, &emul); + if (ret) + return ret == -ENODEV ? 0 : ret; + /* Forward all writes to the AXI emulator */ + ops = axi_emul_get_ops(emul); + if (!ops || !ops->write) + return -ENOSYS; + + return ops->write(emul, address, data, size); +} + +static const struct udevice_id axi_sandbox_ids[] = { + { .compatible = "sandbox,axi" }, + { /* sentinel */ } +}; + +static const struct axi_ops axi_sandbox_ops = { + .read = axi_sandbox_read, + .write = axi_sandbox_write, +}; + +U_BOOT_DRIVER(axi_sandbox_bus) = { + .name = "axi_sandbox_bus", + .id = UCLASS_AXI, + .of_match = axi_sandbox_ids, + .ops = &axi_sandbox_ops, +}; diff --git a/drivers/axi/ihs_axi.c b/drivers/axi/ihs_axi.c new file mode 100644 index 0000000000..690aa7796b --- /dev/null +++ b/drivers/axi/ihs_axi.c @@ -0,0 +1,293 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 + * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc + * + * (C) Copyright 2017, 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include <common.h> +#include <axi.h> +#include <dm.h> +#include <regmap.h> + +/** + * struct ihs_axi_regs - Structure for the register map of a IHS AXI device + * @interrupt_status: Status register to indicate certain events (e.g. + * error during transfer, transfer complete, etc.) + * @interrupt_enable_control: Register to both control which statuses will be + * indicated in the interrupt_status register, and + * to change bus settings + * @address_lsb: Least significant 16-bit word of the address of a + * device to transfer data from/to + * @address_msb: Most significant 16-bit word of the address of a + * device to transfer data from/to + * @write_data_lsb: Least significant 16-bit word of the data to be + * written to a device + * @write_data_msb: Most significant 16-bit word of the data to be + * written to a device + * @read_data_lsb: Least significant 16-bit word of the data read + * from a device + * @read_data_msb: Most significant 16-bit word of the data read + * from a device + */ +struct ihs_axi_regs { + u16 interrupt_status; + u16 interrupt_enable_control; + u16 address_lsb; + u16 address_msb; + u16 write_data_lsb; + u16 write_data_msb; + u16 read_data_lsb; + u16 read_data_msb; +}; + +/** + * ihs_axi_set() - Convenience macro to set values in register map + * @map: The register map to write to + * @member: The member of the ihs_axi_regs structure to write + * @val: The value to write to the register map + */ +#define ihs_axi_set(map, member, val) \ + regmap_set(map, struct ihs_axi_regs, member, val) + +/** + * ihs_axi_get() - Convenience macro to read values from register map + * @map: The register map to read from + * @member: The member of the ihs_axi_regs structure to read + * @valp: Pointer to a buffer to receive the value read + */ +#define ihs_axi_get(map, member, valp) \ + regmap_get(map, struct ihs_axi_regs, member, valp) + +/** + * struct ihs_axi_priv - Private data structure of IHS AXI devices + * @map: Register map for the IHS AXI device + */ +struct ihs_axi_priv { + struct regmap *map; +}; + +/** + * enum status_reg - Description of bits in the interrupt_status register + * @STATUS_READ_COMPLETE_EVENT: A read transfer was completed + * @STATUS_WRITE_COMPLETE_EVENT: A write transfer was completed + * @STATUS_TIMEOUT_EVENT: A timeout has occurred during the transfer + * @STATUS_ERROR_EVENT: A error has occurred during the transfer + * @STATUS_AXI_INT: A AXI interrupt has occurred + * @STATUS_READ_DATA_AVAILABLE: Data is available to be read + * @STATUS_BUSY: The bus is busy + * @STATUS_INIT_DONE: The bus has finished initializing + */ +enum status_reg { + STATUS_READ_COMPLETE_EVENT = BIT(15), + STATUS_WRITE_COMPLETE_EVENT = BIT(14), + STATUS_TIMEOUT_EVENT = BIT(13), + STATUS_ERROR_EVENT = BIT(12), + STATUS_AXI_INT = BIT(11), + STATUS_READ_DATA_AVAILABLE = BIT(7), + STATUS_BUSY = BIT(6), + STATUS_INIT_DONE = BIT(5), +}; + +/** + * enum control_reg - Description of bit fields in the interrupt_enable_control + * register + * @CONTROL_READ_COMPLETE_EVENT_ENABLE: STATUS_READ_COMPLETE_EVENT will be + * raised in the interrupt_status register + * @CONTROL_WRITE_COMPLETE_EVENT_ENABLE: STATUS_WRITE_COMPLETE_EVENT will be + * raised in the interrupt_status register + * @CONTROL_TIMEOUT_EVENT_ENABLE: STATUS_TIMEOUT_EVENT will be raised in + * the interrupt_status register + * @CONTROL_ERROR_EVENT_ENABLE: STATUS_ERROR_EVENT will be raised in + * the interrupt_status register + * @CONTROL_AXI_INT_ENABLE: STATUS_AXI_INT will be raised in the + * interrupt_status register + * @CONTROL_CMD_NOP: Configure bus to send a NOP command + * for the next transfer + * @CONTROL_CMD_WRITE: Configure bus to do a write transfer + * @CONTROL_CMD_WRITE_POST_INC: Auto-increment address after write + * transfer + * @CONTROL_CMD_READ: Configure bus to do a read transfer + * @CONTROL_CMD_READ_POST_INC: Auto-increment address after read + * transfer + */ +enum control_reg { + CONTROL_READ_COMPLETE_EVENT_ENABLE = BIT(15), + CONTROL_WRITE_COMPLETE_EVENT_ENABLE = BIT(14), + CONTROL_TIMEOUT_EVENT_ENABLE = BIT(13), + CONTROL_ERROR_EVENT_ENABLE = BIT(12), + CONTROL_AXI_INT_ENABLE = BIT(11), + + CONTROL_CMD_NOP = 0x0, + CONTROL_CMD_WRITE = 0x8, + CONTROL_CMD_WRITE_POST_INC = 0x9, + CONTROL_CMD_READ = 0xa, + CONTROL_CMD_READ_POST_INC = 0xb, +}; + +/** + * enum axi_cmd - Determine if transfer is read or write transfer + * @AXI_CMD_READ: The transfer should be a read transfer + * @AXI_CMD_WRITE: The transfer should be a write transfer + */ +enum axi_cmd { + AXI_CMD_READ, + AXI_CMD_WRITE, +}; + +/** + * ihs_axi_transfer() - Run transfer on the AXI bus + * @bus: The AXI bus device on which to run the transfer on + * @address: The address to use in the transfer (i.e. which address to + * read/write from/to) + * @cmd: Should the transfer be a read or write transfer? + * + * Return: 0 if OK, -ve on error + */ +static int ihs_axi_transfer(struct udevice *bus, ulong address, + enum axi_cmd cmd) +{ + struct ihs_axi_priv *priv = dev_get_priv(bus); + /* Try waiting for events up to 10 times */ + const uint WAIT_TRIES = 10; + u16 wait_mask = STATUS_TIMEOUT_EVENT | + STATUS_ERROR_EVENT; + u16 complete_flag; + u16 status; + uint k; + + if (cmd == AXI_CMD_READ) { + complete_flag = STATUS_READ_COMPLETE_EVENT; + cmd = CONTROL_CMD_READ; + } else { + complete_flag = STATUS_WRITE_COMPLETE_EVENT; + cmd = CONTROL_CMD_WRITE; + } + + wait_mask |= complete_flag; + + /* Lower 16 bit */ + ihs_axi_set(priv->map, address_lsb, address & 0xffff); + /* Upper 16 bit */ + ihs_axi_set(priv->map, address_msb, (address >> 16) & 0xffff); + + ihs_axi_set(priv->map, interrupt_status, wait_mask); + ihs_axi_set(priv->map, interrupt_enable_control, cmd); + + for (k = WAIT_TRIES; k > 0; --k) { + ihs_axi_get(priv->map, interrupt_status, &status); + if (status & wait_mask) + break; + udelay(1); + } + + /* + * k == 0 -> Tries ran out with no event we were waiting for actually + * occurring. + */ + if (!k) + ihs_axi_get(priv->map, interrupt_status, &status); + + if (status & complete_flag) + return 0; + + if (status & STATUS_ERROR_EVENT) { + debug("%s: Error occurred during transfer\n", bus->name); + return -EIO; + } + + debug("%s: Transfer timed out\n", bus->name); + return -ETIMEDOUT; +} + +/* + * API + */ + +static int ihs_axi_read(struct udevice *dev, ulong address, void *data, + enum axi_size_t size) +{ + struct ihs_axi_priv *priv = dev_get_priv(dev); + int ret; + u16 data_lsb, data_msb; + u32 *p = data; + + if (size != AXI_SIZE_32) { + debug("%s: transfer size '%d' not supported\n", + dev->name, size); + return -ENOSYS; + } + + ret = ihs_axi_transfer(dev, address, AXI_CMD_READ); + if (ret < 0) { + debug("%s: Error during AXI transfer (err = %d)\n", + dev->name, ret); + return ret; + } + + ihs_axi_get(priv->map, read_data_lsb, &data_lsb); + ihs_axi_get(priv->map, read_data_msb, &data_msb); + + /* Assemble data from two 16-bit words */ + *p = (data_msb << 16) | data_lsb; + + return 0; +} + +static int ihs_axi_write(struct udevice *dev, ulong address, void *data, + enum axi_size_t size) +{ + struct ihs_axi_priv *priv = dev_get_priv(dev); + int ret; + u32 *p = data; + + if (size != AXI_SIZE_32) { + debug("%s: transfer size '%d' not supported\n", + dev->name, size); + return -ENOSYS; + } + + /* Lower 16 bit */ + ihs_axi_set(priv->map, write_data_lsb, *p & 0xffff); + /* Upper 16 bit */ + ihs_axi_set(priv->map, write_data_msb, (*p >> 16) & 0xffff); + + ret = ihs_axi_transfer(dev, address, AXI_CMD_WRITE); + if (ret < 0) { + debug("%s: Error during AXI transfer (err = %d)\n", + dev->name, ret); + return ret; + } + + return 0; +} + +static const struct udevice_id ihs_axi_ids[] = { + { .compatible = "gdsys,ihs_axi" }, + { /* sentinel */ } +}; + +static const struct axi_ops ihs_axi_ops = { + .read = ihs_axi_read, + .write = ihs_axi_write, +}; + +static int ihs_axi_probe(struct udevice *dev) +{ + struct ihs_axi_priv *priv = dev_get_priv(dev); + + regmap_init_mem(dev_ofnode(dev), &priv->map); + + return 0; +} + +U_BOOT_DRIVER(ihs_axi_bus) = { + .name = "ihs_axi_bus", + .id = UCLASS_AXI, + .of_match = ihs_axi_ids, + .ops = &ihs_axi_ops, + .priv_auto_alloc_size = sizeof(struct ihs_axi_priv), + .probe = ihs_axi_probe, +}; diff --git a/drivers/axi/sandbox_store.c b/drivers/axi/sandbox_store.c new file mode 100644 index 0000000000..d724f19079 --- /dev/null +++ b/drivers/axi/sandbox_store.c @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include <common.h> +#include <axi.h> +#include <dm.h> + +/** + * struct sandbox_store_priv - Private data structure of a AXI store device + * @store: The buffer holding the device's internal memory, which is read from + * and written to using the driver's methods + */ +struct sandbox_store_priv { + u8 *store; +}; + +/** + * copy_axi_data() - Copy data from source to destination with a given AXI + * transfer width + * @src: Pointer to the data source from where data will be read + * @dst: Pointer to the data destination where data will be written to + * @size: Size of the data to be copied given by a axi_size_t enum value + * + * Return: 0 if OK, -ve on error + */ +static int copy_axi_data(void *src, void *dst, enum axi_size_t size) +{ + switch (size) { + case AXI_SIZE_8: + *((u8 *)dst) = *((u8 *)src); + return 0; + case AXI_SIZE_16: + *((u16 *)dst) = be16_to_cpu(*((u16 *)src)); + return 0; + case AXI_SIZE_32: + *((u32 *)dst) = be32_to_cpu(*((u32 *)src)); + return 0; + default: + debug("%s: Unknown AXI transfer size '%d'\n", __func__, size); + return -EINVAL; + } +} + +static int sandbox_store_read(struct udevice *dev, ulong address, void *data, + enum axi_size_t size) +{ + struct sandbox_store_priv *priv = dev_get_priv(dev); + + return copy_axi_data(priv->store + address, data, size); +} + +static int sandbox_store_write(struct udevice *dev, ulong address, void *data, + enum axi_size_t size) +{ + struct sandbox_store_priv *priv = dev_get_priv(dev); + + return copy_axi_data(data, priv->store + address, size); +} + +static int sandbox_store_get_store(struct udevice *dev, u8 **store) +{ + struct sandbox_store_priv *priv = dev_get_priv(dev); + + *store = priv->store; + + return 0; +} + +static const struct udevice_id sandbox_store_ids[] = { + { .compatible = "sandbox,sandbox_store" }, + { /* sentinel */ } +}; + +static const struct axi_emul_ops sandbox_store_ops = { + .read = sandbox_store_read, + .write = sandbox_store_write, + .get_store = sandbox_store_get_store, +}; + +static int sandbox_store_probe(struct udevice *dev) +{ + struct sandbox_store_priv *priv = dev_get_priv(dev); + u32 reg[2]; + int ret; + + ret = dev_read_u32_array(dev, "reg", reg, ARRAY_SIZE(reg)); + if (ret) { + debug("%s: Could not read 'reg' property\n", dev->name); + return -EINVAL; + } + + /* + * Allocate the device's internal storage that will be read + * from/written to + */ + priv->store = calloc(reg[1], 1); + if (!priv->store) + return -ENOMEM; + + return 0; +} + +static int sandbox_store_remove(struct udevice *dev) +{ + struct sandbox_store_priv *priv = dev_get_priv(dev); + + free(priv->store); + + return 0; +} + +U_BOOT_DRIVER(sandbox_axi_store) = { + .name = "sandbox_axi_store", + .id = UCLASS_AXI_EMUL, + .of_match = sandbox_store_ids, + .ops = &sandbox_store_ops, + .priv_auto_alloc_size = sizeof(struct sandbox_store_priv), + .probe = sandbox_store_probe, + .remove = sandbox_store_remove, +}; diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index d335ed14b9..9a0bd516d9 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -72,6 +72,14 @@ config BOOTCOUNT_AT91 endchoice +config BOOTCOUNT_BOOTLIMIT + int "Maximum number of reboot cycles allowed" + default 0 + help + Set the Maximum number of reboot cycles allowed without the boot + counter being cleared. + If set to 0 do not set a boot limit in the environment. + config BOOTCOUNT_ALEN int "I2C address length" default 1 diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 146283c723..034bf44078 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -11,6 +11,7 @@ obj-y += tegra/ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_MESON) += clk_meson.o obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ +obj-$(CONFIG_ARCH_SOCFPGA) += altera/ obj-$(CONFIG_CLK_AT91) += at91/ obj-$(CONFIG_CLK_MVEBU) += mvebu/ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o diff --git a/drivers/clk/altera/Makefile b/drivers/clk/altera/Makefile new file mode 100644 index 0000000000..2542b7f51b --- /dev/null +++ b/drivers/clk/altera/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2018 Marek Vasut <marex@denx.de> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clk-arria10.o diff --git a/drivers/clk/altera/clk-arria10.c b/drivers/clk/altera/clk-arria10.c new file mode 100644 index 0000000000..78102c760d --- /dev/null +++ b/drivers/clk/altera/clk-arria10.c @@ -0,0 +1,363 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018 Marek Vasut <marex@denx.de> + */ + +#include <common.h> +#include <asm/io.h> +#include <clk-uclass.h> +#include <dm.h> +#include <dm/lists.h> +#include <dm/util.h> + +#include <asm/arch/clock_manager.h> + +enum socfpga_a10_clk_type { + SOCFPGA_A10_CLK_MAIN_PLL, + SOCFPGA_A10_CLK_PER_PLL, + SOCFPGA_A10_CLK_PERIP_CLK, + SOCFPGA_A10_CLK_GATE_CLK, + SOCFPGA_A10_CLK_UNKNOWN_CLK, +}; + +struct socfpga_a10_clk_platdata { + enum socfpga_a10_clk_type type; + struct clk_bulk clks; + u32 regs; + /* Fixed divider */ + u16 fix_div; + /* Control register */ + u16 ctl_reg; + /* Divider register */ + u16 div_reg; + u8 div_len; + u8 div_off; + /* Clock gating register */ + u16 gate_reg; + u8 gate_bit; +}; + +static int socfpga_a10_clk_get_upstream(struct clk *clk, struct clk **upclk) +{ + struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev); + u32 reg, maxval; + + if (plat->clks.count == 0) + return 0; + + if (plat->clks.count == 1) { + *upclk = &plat->clks.clks[0]; + return 0; + } + + if (!plat->ctl_reg) { + dev_err(clk->dev, "Invalid control register\n"); + return -EINVAL; + } + + reg = readl(plat->regs + plat->ctl_reg); + + /* Assume PLLs are ON for now */ + if (plat->type == SOCFPGA_A10_CLK_MAIN_PLL) { + reg = (reg >> 8) & 0x3; + maxval = 2; + } else if (plat->type == SOCFPGA_A10_CLK_PER_PLL) { + reg = (reg >> 8) & 0x3; + maxval = 3; + } else { + reg = (reg >> 16) & 0x7; + maxval = 4; + } + + if (reg > maxval) { + dev_err(clk->dev, "Invalid clock source\n"); + return -EINVAL; + } + + *upclk = &plat->clks.clks[reg]; + return 0; +} + +static int socfpga_a10_clk_endisable(struct clk *clk, bool enable) +{ + struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev); + struct clk *upclk = NULL; + int ret; + + if (!enable && plat->gate_reg) + clrbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); + + ret = socfpga_a10_clk_get_upstream(clk, &upclk); + if (ret) + return ret; + + if (upclk) { + if (enable) + clk_enable(upclk); + else + clk_disable(upclk); + } + + if (enable && plat->gate_reg) + setbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); + + return 0; +} + +static int socfpga_a10_clk_enable(struct clk *clk) +{ + return socfpga_a10_clk_endisable(clk, true); +} + +static int socfpga_a10_clk_disable(struct clk *clk) +{ + return socfpga_a10_clk_endisable(clk, false); +} + +static ulong socfpga_a10_clk_get_rate(struct clk *clk) +{ + struct socfpga_a10_clk_platdata *plat = dev_get_platdata(clk->dev); + struct clk *upclk = NULL; + ulong rate = 0, reg, numer, denom; + int ret; + + ret = socfpga_a10_clk_get_upstream(clk, &upclk); + if (ret || !upclk) + return 0; + + rate = clk_get_rate(upclk); + + if (plat->type == SOCFPGA_A10_CLK_MAIN_PLL) { + reg = readl(plat->regs + plat->ctl_reg + 4); /* VCO1 */ + numer = reg & CLKMGR_MAINPLL_VCO1_NUMER_MSK; + denom = (reg >> CLKMGR_MAINPLL_VCO1_DENOM_LSB) & + CLKMGR_MAINPLL_VCO1_DENOM_MSK; + + rate /= denom + 1; + rate *= numer + 1; + } else if (plat->type == SOCFPGA_A10_CLK_PER_PLL) { + reg = readl(plat->regs + plat->ctl_reg + 4); /* VCO1 */ + numer = reg & CLKMGR_PERPLL_VCO1_NUMER_MSK; + denom = (reg >> CLKMGR_PERPLL_VCO1_DENOM_LSB) & + CLKMGR_PERPLL_VCO1_DENOM_MSK; + + rate /= denom + 1; + rate *= numer + 1; + } else { + rate /= plat->fix_div; + + if (plat->fix_div == 1 && plat->ctl_reg) { + reg = readl(plat->regs + plat->ctl_reg); + reg &= 0x7ff; + rate /= reg + 1; + } + + if (plat->div_reg) { + reg = readl(plat->regs + plat->div_reg); + reg >>= plat->div_off; + reg &= (1 << plat->div_len) - 1; + if (plat->type == SOCFPGA_A10_CLK_PERIP_CLK) + rate /= reg + 1; + if (plat->type == SOCFPGA_A10_CLK_GATE_CLK) + rate /= 1 << reg; + } + } + + return rate; +} + +static struct clk_ops socfpga_a10_clk_ops = { + .enable = socfpga_a10_clk_enable, + .disable = socfpga_a10_clk_disable, + .get_rate = socfpga_a10_clk_get_rate, +}; + +/* + * This workaround tries to fix the massively broken generated "handoff" DT, + * which contains duplicate clock nodes without any connection to the clock + * manager DT node. Yet, those "handoff" DT nodes contain configuration of + * the fixed input clock of the Arria10 which are missing from the base DT + * for Arria10. + * + * This workaround sets up upstream clock for the fixed input clocks of the + * A10 described in the base DT such that they map to the fixed clock from + * the "handoff" DT. This does not fully match how the clock look on the + * A10, but it is the least intrusive way to fix this mess. + */ +static void socfpga_a10_handoff_workaround(struct udevice *dev) +{ + struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev); + const void *fdt = gd->fdt_blob; + struct clk_bulk *bulk = &plat->clks; + int i, ret, offset = dev_of_offset(dev); + static const char * const socfpga_a10_fixedclk_map[] = { + "osc1", "altera_arria10_hps_eosc1", + "cb_intosc_ls_clk", "altera_arria10_hps_cb_intosc_ls", + "f2s_free_clk", "altera_arria10_hps_f2h_free", + }; + + if (fdt_node_check_compatible(fdt, offset, "fixed-clock")) + return; + + for (i = 0; i < ARRAY_SIZE(socfpga_a10_fixedclk_map); i += 2) + if (!strcmp(dev->name, socfpga_a10_fixedclk_map[i])) + break; + + if (i == ARRAY_SIZE(socfpga_a10_fixedclk_map)) + return; + + ret = uclass_get_device_by_name(UCLASS_CLK, + socfpga_a10_fixedclk_map[i + 1], &dev); + if (ret) + return; + + bulk->count = 1; + bulk->clks = devm_kcalloc(dev, bulk->count, + sizeof(struct clk), GFP_KERNEL); + if (!bulk->clks) + return; + + ret = clk_request(dev, &bulk->clks[0]); + if (ret) + free(bulk->clks); +} + +static int socfpga_a10_clk_bind(struct udevice *dev) +{ + const void *fdt = gd->fdt_blob; + int offset = dev_of_offset(dev); + bool pre_reloc_only = !(gd->flags & GD_FLG_RELOC); + const char *name; + int ret; + + for (offset = fdt_first_subnode(fdt, offset); + offset > 0; + offset = fdt_next_subnode(fdt, offset)) { + name = fdt_get_name(fdt, offset, NULL); + if (!name) + return -EINVAL; + + if (!strcmp(name, "clocks")) { + offset = fdt_first_subnode(fdt, offset); + name = fdt_get_name(fdt, offset, NULL); + if (!name) + return -EINVAL; + } + + /* Filter out supported sub-clock */ + if (fdt_node_check_compatible(fdt, offset, + "altr,socfpga-a10-pll-clock") && + fdt_node_check_compatible(fdt, offset, + "altr,socfpga-a10-perip-clk") && + fdt_node_check_compatible(fdt, offset, + "altr,socfpga-a10-gate-clk") && + fdt_node_check_compatible(fdt, offset, "fixed-clock")) + continue; + + if (pre_reloc_only && !dm_fdt_pre_reloc(fdt, offset)) + continue; + + ret = device_bind_driver_to_node(dev, "clk-a10", name, + offset_to_ofnode(offset), + NULL); + if (ret) + return ret; + } + + return 0; +} + +static int socfpga_a10_clk_probe(struct udevice *dev) +{ + struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev); + const void *fdt = gd->fdt_blob; + int offset = dev_of_offset(dev); + + clk_get_bulk(dev, &plat->clks); + + socfpga_a10_handoff_workaround(dev); + + if (!fdt_node_check_compatible(fdt, offset, + "altr,socfpga-a10-pll-clock")) { + /* Main PLL has 3 upstream clock */ + if (plat->clks.count == 3) + plat->type = SOCFPGA_A10_CLK_MAIN_PLL; + else + plat->type = SOCFPGA_A10_CLK_PER_PLL; + } else if (!fdt_node_check_compatible(fdt, offset, + "altr,socfpga-a10-perip-clk")) { + plat->type = SOCFPGA_A10_CLK_PERIP_CLK; + } else if (!fdt_node_check_compatible(fdt, offset, + "altr,socfpga-a10-gate-clk")) { + plat->type = SOCFPGA_A10_CLK_GATE_CLK; + } else { + plat->type = SOCFPGA_A10_CLK_UNKNOWN_CLK; + } + + return 0; +} + +static int socfpga_a10_ofdata_to_platdata(struct udevice *dev) +{ + struct socfpga_a10_clk_platdata *plat = dev_get_platdata(dev); + struct socfpga_a10_clk_platdata *pplat; + struct udevice *pdev; + const void *fdt = gd->fdt_blob; + unsigned int divreg[3], gatereg[2]; + int ret, offset = dev_of_offset(dev); + u32 regs; + + regs = dev_read_u32_default(dev, "reg", 0x0); + + if (!fdt_node_check_compatible(fdt, offset, "altr,clk-mgr")) { + plat->regs = devfdt_get_addr(dev); + } else { + pdev = dev_get_parent(dev); + if (!pdev) + return -ENODEV; + + pplat = dev_get_platdata(pdev); + if (!pplat) + return -EINVAL; + + plat->ctl_reg = regs; + plat->regs = pplat->regs; + } + + plat->type = SOCFPGA_A10_CLK_UNKNOWN_CLK; + + plat->fix_div = dev_read_u32_default(dev, "fixed-divider", 1); + + ret = dev_read_u32_array(dev, "div-reg", divreg, ARRAY_SIZE(divreg)); + if (!ret) { + plat->div_reg = divreg[0]; + plat->div_len = divreg[2]; + plat->div_off = divreg[1]; + } + + ret = dev_read_u32_array(dev, "clk-gate", gatereg, ARRAY_SIZE(gatereg)); + if (!ret) { + plat->gate_reg = gatereg[0]; + plat->gate_bit = gatereg[1]; + } + + return 0; +} + +static const struct udevice_id socfpga_a10_clk_match[] = { + { .compatible = "altr,clk-mgr" }, + {} +}; + +U_BOOT_DRIVER(socfpga_a10_clk) = { + .name = "clk-a10", + .id = UCLASS_CLK, + .flags = DM_FLAG_PRE_RELOC, + .of_match = socfpga_a10_clk_match, + .ops = &socfpga_a10_clk_ops, + .bind = socfpga_a10_clk_bind, + .probe = socfpga_a10_clk_probe, + .ofdata_to_platdata = socfpga_a10_ofdata_to_platdata, + + .platdata_auto_alloc_size = sizeof(struct socfpga_a10_clk_platdata), +}; diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c index 0b562610a2..e8506099fd 100644 --- a/drivers/clk/at91/clk-utmi.c +++ b/drivers/clk/at91/clk-utmi.c @@ -28,6 +28,7 @@ static int utmi_clk_enable(struct clk *clk) u32 utmi_ref_clk_freq; u32 tmp; int err; + int timeout = 2000000; if (readl(&pmc->sr) & AT91_PMC_LOCKU) return 0; @@ -85,8 +86,12 @@ static int utmi_clk_enable(struct clk *clk) AT91_PMC_BIASEN; writel(tmp, &pmc->uckr); - while (!(readl(&pmc->sr) & AT91_PMC_LOCKU)) + while ((--timeout) && !(readl(&pmc->sr) & AT91_PMC_LOCKU)) ; + if (!timeout) { + printf("UTMICK: timeout waiting for UPLL lock\n"); + return -ETIMEDOUT; + } return 0; } diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index e7c91193b9..318949529b 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -56,7 +56,7 @@ int dfu_init_env_entities(char *interface, char *devstr) { const char *str_env; char *env_bkp; - int ret; + int ret = 0; #ifdef CONFIG_SET_DFU_ALT_INFO set_dfu_alt_info(interface, devstr); @@ -71,11 +71,13 @@ int dfu_init_env_entities(char *interface, char *devstr) ret = dfu_config_entities(env_bkp, interface, devstr); if (ret) { pr_err("DFU entities configuration failed!\n"); - return ret; + pr_err("(partition table does not match dfu_alt_info?)\n"); + goto done; } +done: free(env_bkp); - return 0; + return ret; } static unsigned char *dfu_buf; @@ -462,7 +464,7 @@ int dfu_config_entities(char *env, char *interface, char *devstr) ret = dfu_fill_entity(&dfu[i], s, alt_num_cnt, interface, devstr); if (ret) { - free(dfu); + /* We will free "dfu" in dfu_free_entities() */ return -1; } diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 5eceab9ea8..ae3b501555 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -96,6 +96,12 @@ config SYS_I2C_CADENCE Say yes here to select Cadence I2C Host Controller. This controller is e.g. used by Xilinx Zynq. +config SYS_I2C_DAVINCI + bool "Davinci I2C Controller" + depends on (ARCH_KEYSTONE || ARCH_DAVINCI) + help + Say yes here to add support for Davinci and Keystone I2C controller + config SYS_I2C_DW bool "Designware I2C Controller" default n diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index 156380c1cc..b0da67ce2c 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -31,7 +31,7 @@ config I2C_MUX_PCA954x help If you say yes here you get support for the TI PCA954x I2C mux/switch devices. It is x width I2C multiplexer which enables to - paritioning I2C bus and connect multiple devices with the same address + partitioning I2C bus and connect multiple devices with the same address to the same I2C controller where driver handles proper routing to target i2c device. PCA9544 and PCA9548 are supported. diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index b3873c140d..7ffb949f12 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -24,3 +24,8 @@ config I8042_KEYB driver handles English and German keyboards - set the environment variable 'keymap' to "de" to select German. Keyboard repeat is handled by the keyboard itself. + +config TWL4030_INPUT + bool "Enable TWL4030 Input controller" + help + Enable TWL4030 Input controller diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c index 2f4d69eedd..2859475a6b 100644 --- a/drivers/led/led-uclass.c +++ b/drivers/led/led-uclass.c @@ -8,6 +8,7 @@ #include <dm.h> #include <errno.h> #include <led.h> +#include <dm/device-internal.h> #include <dm/root.h> #include <dm/uclass-internal.h> @@ -63,6 +64,35 @@ int led_set_period(struct udevice *dev, int period_ms) } #endif +int led_default_state(void) +{ + struct udevice *dev; + struct uclass *uc; + const char *default_state; + int ret; + + ret = uclass_get(UCLASS_LED, &uc); + if (ret) + return ret; + for (uclass_find_first_device(UCLASS_LED, &dev); + dev; + uclass_find_next_device(&dev)) { + default_state = dev_read_string(dev, "default-state"); + if (!default_state) + continue; + ret = device_probe(dev); + if (ret) + return ret; + if (!strncmp(default_state, "on", 2)) + led_set_state(dev, LEDST_ON); + else if (!strncmp(default_state, "off", 3)) + led_set_state(dev, LEDST_OFF); + /* default-state = "keep" : device is only probed */ + } + + return ret; +} + UCLASS_DRIVER(led) = { .id = UCLASS_LED, .name = "led", diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c index a36942b934..93f6b913c6 100644 --- a/drivers/led/led_gpio.c +++ b/drivers/led/led_gpio.c @@ -10,7 +10,6 @@ #include <led.h> #include <asm/gpio.h> #include <dm/lists.h> -#include <dm/uclass-internal.h> struct led_gpio_priv { struct gpio_desc gpio; @@ -58,7 +57,6 @@ static int led_gpio_probe(struct udevice *dev) { struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev); struct led_gpio_priv *priv = dev_get_priv(dev); - const char *default_state; int ret; /* Ignore the top-level LED node */ @@ -69,13 +67,6 @@ static int led_gpio_probe(struct udevice *dev) if (ret) return ret; - default_state = dev_read_string(dev, "default-state"); - if (default_state) { - if (!strncmp(default_state, "on", 2)) - gpio_led_set_state(dev, LEDST_ON); - else if (!strncmp(default_state, "off", 3)) - gpio_led_set_state(dev, LEDST_OFF); - } return 0; } @@ -118,14 +109,6 @@ static int led_gpio_bind(struct udevice *parent) return ret; uc_plat = dev_get_uclass_platdata(dev); uc_plat->label = label; - - if (ofnode_read_bool(node, "default-state")) { - struct udevice *devp; - - ret = uclass_get_device_tail(dev, 0, &devp); - if (ret) - return ret; - } } return 0; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index c031dfde9d..c2b7cc15db 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -195,6 +195,11 @@ config TEGRA186_BPMP can make requests to the BPMP. This driver is similar to an MFD driver in the Linux kernel. +config TWL4030_LED + bool "Enable TWL4030 LED controller" + help + Enable this to add support for the TWL4030 LED controller. + config WINBOND_W83627 bool "Enable Winbond Super I/O driver" help @@ -277,4 +282,10 @@ config GDSYS_RXAUI_CTRL depends on MISC help Support gdsys FPGA's RXAUI control. + +config GDSYS_IOEP + bool "Enable gdsys IOEP driver" + depends on MISC + help + Support gdsys FPGA's IO endpoint driver. endmenu diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 4ce9d213f0..32ef4a53c7 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -39,7 +39,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SANDBOX) += spltest_sandbox.o endif endif -obj-$(CONFIG_SANDBOX) += syscon_sandbox.o +obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o obj-$(CONFIG_TEGRA_CAR) += tegra_car.o obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o obj-$(CONFIG_TWL4030_LED) += twl4030_led.o @@ -53,4 +53,5 @@ obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o obj-$(CONFIG_STM32_RCC) += stm32_rcc.o obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o +obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c index 7c22b8d209..d3137680ad 100644 --- a/drivers/misc/fsl_portals.c +++ b/drivers/misc/fsl_portals.c @@ -13,6 +13,9 @@ #ifdef CONFIG_PPC #include <asm/fsl_portals.h> #include <asm/fsl_liodn.h> +#else +#include <asm/arch-fsl-layerscape/fsl_portals.h> +#include <asm/arch-fsl-layerscape/fsl_icid.h> #endif #include <fsl_qbman.h> @@ -24,7 +27,6 @@ void setup_qbman_portals(void) CONFIG_SYS_BMAN_SWP_ISDR_REG; void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE + CONFIG_SYS_QMAN_SWP_ISDR_REG; -#ifdef CONFIG_PPC struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; /* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */ @@ -32,7 +34,6 @@ void setup_qbman_portals(void) out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32)); #endif out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS); -#endif #ifdef CONFIG_FSL_CORENET int i; @@ -47,6 +48,22 @@ void setup_qbman_portals(void) /* set frame liodn */ out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | fliodn); } +#else +#ifdef CONFIG_ARCH_LS1046A + int i; + + for (i = 0; i < CONFIG_SYS_QMAN_NUM_PORTALS; i++) { + u8 sdest = qp_info[i].sdest; + u16 ficid = qp_info[i].ficid; + u16 dicid = qp_info[i].dicid; + u16 icid = qp_info[i].icid; + + out_be32(&qman->qcsp[i].qcsp_lio_cfg, (icid << 16) | + dicid); + /* set frame icid */ + out_be32(&qman->qcsp[i].qcsp_io_cfg, (sdest << 16) | ficid); + } +#endif #endif /* Change default state of BMan ISDR portals to all 1s */ @@ -180,6 +197,10 @@ void fdt_fixup_qportals(void *blob) char compat[64]; int compat_len; +#ifdef CONFIG_ARCH_LS1046A + int smmu_ph = fdt_get_smmu_phandle(blob); +#endif + maj = (rev_1 >> 8) & 0xff; min = rev_1 & 0xff; ip_cfg = rev_2 & 0xff; @@ -190,7 +211,7 @@ void fdt_fixup_qportals(void *blob) off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal"); while (off != -FDT_ERR_NOTFOUND) { -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) || defined(CONFIG_ARCH_LS1046A) #ifdef CONFIG_FSL_CORENET u32 liodns[2]; #endif @@ -200,12 +221,12 @@ void fdt_fixup_qportals(void *blob) if (!ci) goto err; - i = *ci; -#ifdef CONFIG_SYS_DPAA_FMAN + i = fdt32_to_cpu(*ci); +#if defined(CONFIG_SYS_DPAA_FMAN) && defined(CONFIG_PPC) int j; #endif -#endif /* CONFIG_PPC */ +#endif /* CONFIG_PPC || CONFIG_ARCH_LS1046A */ err = fdt_setprop(blob, off, "compatible", compat, compat_len); if (err < 0) goto err; @@ -253,6 +274,18 @@ void fdt_fixup_qportals(void *blob) if (err < 0) goto err; #endif +#else +#ifdef CONFIG_ARCH_LS1046A + if (smmu_ph >= 0) { + u32 icids[3]; + + icids[0] = qp_info[i].icid; + icids[1] = qp_info[i].dicid; + icids[2] = qp_info[i].ficid; + + fdt_set_iommu_prop(blob, off, smmu_ph, icids, 3); + } +#endif #endif /* CONFIG_PPC */ err: diff --git a/drivers/misc/gdsys_ioep.c b/drivers/misc/gdsys_ioep.c new file mode 100644 index 0000000000..7f17095cc5 --- /dev/null +++ b/drivers/misc/gdsys_ioep.c @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2017 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + * + * based on the cmd_ioloop driver/command, which is + * + * (C) Copyright 2014 + * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <misc.h> +#include <regmap.h> + +#include "gdsys_ioep.h" + +/** + * struct gdsys_ioep_priv - Private data structure for IOEP devices + * @map: Register map to be used for the device + * @state: Flag to keep the current status of the RX control (enabled/disabled) + */ +struct gdsys_ioep_priv { + struct regmap *map; + bool state; +}; + +/** + * enum last_spec - Convenience enum for read data sanity check + * @READ_DATA_IS_LAST: The data to be read should be the final data of the + * current packet + * @READ_DATA_IS_NOT_LAST: The data to be read should not be the final data of + * the current packet + */ +enum last_spec { + READ_DATA_IS_LAST, + READ_DATA_IS_NOT_LAST, +}; + +static int gdsys_ioep_set_receive(struct udevice *dev, bool val) +{ + struct gdsys_ioep_priv *priv = dev_get_priv(dev); + u16 state; + + priv->state = !priv->state; + + if (val) + state = CTRL_PROC_RECEIVE_ENABLE; + else + state = ~CTRL_PROC_RECEIVE_ENABLE; + + gdsys_ioep_set(priv->map, tx_control, state); + + if (val) { + /* Set device address to dummy 1 */ + gdsys_ioep_set(priv->map, device_address, 1); + } + + return !priv->state; +} + +static int gdsys_ioep_send(struct udevice *dev, int offset, + const void *buf, int size) +{ + struct gdsys_ioep_priv *priv = dev_get_priv(dev); + int k; + u16 *p = (u16 *)buf; + + for (k = 0; k < size; ++k) + gdsys_ioep_set(priv->map, transmit_data, *(p++)); + + gdsys_ioep_set(priv->map, tx_control, CTRL_PROC_RECEIVE_ENABLE | + CTRL_FLUSH_TRANSMIT_BUFFER); + + return 0; +} + +/** + * receive_byte_buffer() - Read data from a IOEP device + * @dev: The IOEP device to read data from + * @len: The length of the data to read + * @buffer: The buffer to read the data into + * @last_spec: Flag to indicate if the data to be read in this call should be + * the final data of the current packet (i.e. it should be empty + * after this read) + * + * Return: 0 if OK, -ve on error + */ +static int receive_byte_buffer(struct udevice *dev, uint len, + u16 *buffer, enum last_spec last_spec) +{ + struct gdsys_ioep_priv *priv = dev_get_priv(dev); + int k; + int ret = -EIO; + + for (k = 0; k < len; ++k) { + u16 rx_tx_status; + + gdsys_ioep_get(priv->map, receive_data, buffer++); + + gdsys_ioep_get(priv->map, rx_tx_status, &rx_tx_status); + /* + * Sanity check: If the data read should have been the last, + * but wasn't, something is wrong + */ + if (k == (len - 1) && (last_spec == READ_DATA_IS_NOT_LAST || + rx_tx_status & STATE_RX_DATA_LAST)) + ret = 0; + } + + if (ret) + debug("%s: Error while receiving bufer (err = %d)\n", + dev->name, ret); + + return ret; +} + +static int gdsys_ioep_receive(struct udevice *dev, int offset, void *buf, + int size) +{ + int ret; + struct io_generic_packet header; + u16 *p = (u16 *)buf; + const int header_words = sizeof(struct io_generic_packet) / sizeof(u16); + uint len; + + /* Read the packet header */ + ret = receive_byte_buffer(dev, header_words, p, READ_DATA_IS_NOT_LAST); + if (ret) { + debug("%s: Failed to read header data (err = %d)\n", + dev->name, ret); + return ret; + } + + memcpy(&header, p, header_words * sizeof(u16)); + p += header_words; + + /* Get payload data length */ + len = (header.packet_length + 1) / sizeof(u16); + + /* Read the packet payload */ + ret = receive_byte_buffer(dev, len, p, READ_DATA_IS_LAST); + if (ret) { + debug("%s: Failed to read payload data (err = %d)\n", + dev->name, ret); + return ret; + } + + return 0; +} + +static int gdsys_ioep_get_and_reset_status(struct udevice *dev, int msgid, + void *tx_msg, int tx_size, + void *rx_msg, int rx_size) +{ + struct gdsys_ioep_priv *priv = dev_get_priv(dev); + const u16 mask = STATE_RX_DIST_ERR | STATE_RX_LENGTH_ERR | + STATE_RX_FRAME_CTR_ERR | STATE_RX_FCS_ERR | + STATE_RX_PACKET_DROPPED | STATE_TX_ERR; + u16 *status = rx_msg; + + gdsys_ioep_get(priv->map, rx_tx_status, status); + + gdsys_ioep_set(priv->map, rx_tx_status, *status); + + return (*status & mask) ? 1 : 0; +} + +static const struct misc_ops gdsys_ioep_ops = { + .set_enabled = gdsys_ioep_set_receive, + .write = gdsys_ioep_send, + .read = gdsys_ioep_receive, + .call = gdsys_ioep_get_and_reset_status, +}; + +static int gdsys_ioep_probe(struct udevice *dev) +{ + struct gdsys_ioep_priv *priv = dev_get_priv(dev); + int ret; + + ret = regmap_init_mem(dev_ofnode(dev), &priv->map); + if (ret) { + debug("%s: Could not initialize regmap (err = %d)", + dev->name, ret); + return ret; + } + + priv->state = false; + + return 0; +} + +static const struct udevice_id gdsys_ioep_ids[] = { + { .compatible = "gdsys,io-endpoint" }, + { } +}; + +U_BOOT_DRIVER(gdsys_ioep) = { + .name = "gdsys_ioep", + .id = UCLASS_MISC, + .ops = &gdsys_ioep_ops, + .flags = DM_UC_FLAG_SEQ_ALIAS, + .of_match = gdsys_ioep_ids, + .probe = gdsys_ioep_probe, + .priv_auto_alloc_size = sizeof(struct gdsys_ioep_priv), +}; diff --git a/drivers/misc/gdsys_ioep.h b/drivers/misc/gdsys_ioep.h new file mode 100644 index 0000000000..4d9524b6b6 --- /dev/null +++ b/drivers/misc/gdsys_ioep.h @@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#ifndef __GDSYS_IOEP_H_ +#define __GDSYS_IOEP_H_ + +/** + * struct io_generic_packet - header structure for GDSYS IOEP packets + * @target_address: Target protocol address of the packet. + * @source_address: Source protocol address of the packet. + * @packet_type: Packet type. + * @bc: Block counter (filled in by FPGA). + * @packet_length: Length of the packet's payload bytes. + */ +struct io_generic_packet { + u16 target_address; + u16 source_address; + u8 packet_type; + u8 bc; + u16 packet_length; +} __attribute__((__packed__)); + +/** + * struct gdsys_ioep_regs - Registers of a IOEP device + * @transmit_data: Register that receives data to be sent + * @tx_control: TX control register + * @receive_data: Register filled with the received data + * @rx_tx_status: RX/TX status register + * @device_address: Register for setting/reading the device's address + * @target_address: Register for setting/reading the remote endpoint's address + * @int_enable: Interrupt/Interrupt enable register + */ +struct gdsys_ioep_regs { + u16 transmit_data; + u16 tx_control; + u16 receive_data; + u16 rx_tx_status; + u16 device_address; + u16 target_address; + u16 int_enable; +}; + +/** + * gdsys_ioep_set() - Convenience macro to write registers of a IOEP device + * @map: Register map to write the value in + * @member: Name of the member in the gdsys_ioep_regs structure to write + * @val: Value to write to the register + */ +#define gdsys_ioep_set(map, member, val) \ + regmap_set(map, struct gdsys_ioep_regs, member, val) + +/** + * gdsys_ioep_get() - Convenience macro to read registers of a IOEP device + * @map: Register map to read the value from + * @member: Name of the member in the gdsys_ioep_regs structure to read + * @valp: Pointer to buffer to read the register value into + */ +#define gdsys_ioep_get(map, member, valp) \ + regmap_get(map, struct gdsys_ioep_regs, member, valp) + +/** + * enum rx_tx_status_values - Enum to describe the fields of the rx_tx_status + * register + * @STATE_TX_PACKET_BUILDING: The device is currently building a packet + * (and accepting data for it) + * @STATE_TX_TRANSMITTING: A packet is currenly being transmitted + * @STATE_TX_BUFFER_FULL: The TX buffer is full + * @STATE_TX_ERR: A TX error occurred + * @STATE_RECEIVE_TIMEOUT: A receive timeout occurred + * @STATE_PROC_RX_STORE_TIMEOUT: A RX store timeout for a processor packet + * occurred + * @STATE_PROC_RX_RECEIVE_TIMEOUT: A RX receive timeout for a processor packet + * occurred + * @STATE_RX_DIST_ERR: A error occurred in the distribution block + * @STATE_RX_LENGTH_ERR: A length invalid error occurred + * @STATE_RX_FRAME_CTR_ERR: A frame count error occurred (two + * non-increasing frame count numbers + * encountered) + * @STATE_RX_FCS_ERR: A CRC error occurred + * @STATE_RX_PACKET_DROPPED: A RX packet has been dropped + * @STATE_RX_DATA_LAST: The data to be read is the final data of the + * current packet + * @STATE_RX_DATA_FIRST: The data to be read is the first data of the + * current packet + * @STATE_RX_DATA_AVAILABLE: RX data is available to be read + */ +enum rx_tx_status_values { + STATE_TX_PACKET_BUILDING = BIT(0), + STATE_TX_TRANSMITTING = BIT(1), + STATE_TX_BUFFER_FULL = BIT(2), + STATE_TX_ERR = BIT(3), + STATE_RECEIVE_TIMEOUT = BIT(4), + STATE_PROC_RX_STORE_TIMEOUT = BIT(5), + STATE_PROC_RX_RECEIVE_TIMEOUT = BIT(6), + STATE_RX_DIST_ERR = BIT(7), + STATE_RX_LENGTH_ERR = BIT(8), + STATE_RX_FRAME_CTR_ERR = BIT(9), + STATE_RX_FCS_ERR = BIT(10), + STATE_RX_PACKET_DROPPED = BIT(11), + STATE_RX_DATA_LAST = BIT(12), + STATE_RX_DATA_FIRST = BIT(13), + STATE_RX_DATA_AVAILABLE = BIT(15), +}; + +/** + * enum tx_control_values - Enum to describe the fields of the tx_control + * register + * @CTRL_PROC_RECEIVE_ENABLE: Enable packet reception for the processor + * @CTRL_FLUSH_TRANSMIT_BUFFER: Flush the transmit buffer (and send packet data) + */ +enum tx_control_values { + CTRL_PROC_RECEIVE_ENABLE = BIT(12), + CTRL_FLUSH_TRANSMIT_BUFFER = BIT(15), +}; + +/** + * enum int_enable_values - Enum to describe the fields of the int_enable + * register + * @IRQ_CPU_TRANSMITBUFFER_FREE_STATUS: The transmit buffer is free (packet + * data can be transmitted to the + * device) + * @IRQ_CPU_PACKET_TRANSMITTED_EVENT: A packet has been transmitted + * @IRQ_NEW_CPU_PACKET_RECEIVED_EVENT: A new packet has been received + * @IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS: RX packet data are available to be + * read + */ +enum int_enable_values { + IRQ_CPU_TRANSMITBUFFER_FREE_STATUS = BIT(5), + IRQ_CPU_PACKET_TRANSMITTED_EVENT = BIT(6), + IRQ_NEW_CPU_PACKET_RECEIVED_EVENT = BIT(7), + IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS = BIT(8), +}; + +#endif /* __GDSYS_IOEP_H_ */ diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c index 0dc62d0034..f240cda5c0 100644 --- a/drivers/misc/misc-uclass.c +++ b/drivers/misc/misc-uclass.c @@ -55,6 +55,16 @@ int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size, return ops->call(dev, msgid, tx_msg, tx_size, rx_msg, rx_size); } +int misc_set_enabled(struct udevice *dev, bool val) +{ + const struct misc_ops *ops = device_get_ops(dev); + + if (!ops->set_enabled) + return -ENOSYS; + + return ops->set_enabled(dev, val); +} + UCLASS_DRIVER(misc) = { .id = UCLASS_MISC, .name = "misc", diff --git a/drivers/misc/misc_sandbox.c b/drivers/misc/misc_sandbox.c new file mode 100644 index 0000000000..e4164f76fb --- /dev/null +++ b/drivers/misc/misc_sandbox.c @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include <common.h> +#include <dm.h> +#include <misc.h> + +struct misc_sandbox_priv { + u8 mem[128]; + ulong last_ioctl; + bool enabled; +}; + +int misc_sandbox_read(struct udevice *dev, int offset, void *buf, int size) +{ + struct misc_sandbox_priv *priv = dev_get_priv(dev); + + memcpy(buf, priv->mem + offset, size); + + return 0; +} + +int misc_sandbox_write(struct udevice *dev, int offset, const void *buf, + int size) +{ + struct misc_sandbox_priv *priv = dev_get_priv(dev); + + memcpy(priv->mem + offset, buf, size); + + return 0; +} + +int misc_sandbox_ioctl(struct udevice *dev, unsigned long request, void *buf) +{ + struct misc_sandbox_priv *priv = dev_get_priv(dev); + + priv->last_ioctl = request; + + return 0; +} + +int misc_sandbox_call(struct udevice *dev, int msgid, void *tx_msg, + int tx_size, void *rx_msg, int rx_size) +{ + struct misc_sandbox_priv *priv = dev_get_priv(dev); + + if (msgid == 0) { + int num = *(int *)tx_msg; + + switch (num) { + case 0: + strncpy(rx_msg, "Zero", rx_size); + break; + case 1: + strncpy(rx_msg, "One", rx_size); + break; + case 2: + strncpy(rx_msg, "Two", rx_size); + break; + default: + return -EINVAL; + } + } + + if (msgid == 1) { + int num = *(int *)tx_msg; + + switch (num) { + case 0: + strncpy(rx_msg, "Forty", rx_size); + break; + case 1: + strncpy(rx_msg, "Forty-one", rx_size); + break; + case 2: + strncpy(rx_msg, "Forty-two", rx_size); + break; + default: + return -EINVAL; + } + } + + if (msgid == 2) + memcpy(rx_msg, &priv->last_ioctl, sizeof(priv->last_ioctl)); + + if (msgid == 3) + memcpy(rx_msg, &priv->enabled, sizeof(priv->enabled)); + + return 0; +} + +int misc_sandbox_set_enabled(struct udevice *dev, bool val) +{ + struct misc_sandbox_priv *priv = dev_get_priv(dev); + + priv->enabled = !priv->enabled; + + return 0; +} + +static const struct misc_ops misc_sandbox_ops = { + .read = misc_sandbox_read, + .write = misc_sandbox_write, + .ioctl = misc_sandbox_ioctl, + .call = misc_sandbox_call, + .set_enabled = misc_sandbox_set_enabled, +}; + +int misc_sandbox_probe(struct udevice *dev) +{ + struct misc_sandbox_priv *priv = dev_get_priv(dev); + + priv->enabled = true; + + return 0; +} + +static const struct udevice_id misc_sandbox_ids[] = { + { .compatible = "sandbox,misc_sandbox" }, + { } +}; + +U_BOOT_DRIVER(misc_sandbox) = { + .name = "misc_sandbox", + .id = UCLASS_MISC, + .ops = &misc_sandbox_ops, + .of_match = misc_sandbox_ids, + .probe = misc_sandbox_probe, + .priv_auto_alloc_size = sizeof(struct misc_sandbox_priv), +}; diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index ed8ba10c93..739c1629a2 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -6,6 +6,7 @@ #include <common.h> #include <asm/arch/clock_manager.h> #include <asm/arch/system_manager.h> +#include <clk.h> #include <dm.h> #include <dwmmc.h> #include <errno.h> @@ -70,20 +71,39 @@ static void socfpga_dwmci_clksel(struct dwmci_host *host) CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK); } -static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev) +static int socfpga_dwmmc_get_clk_rate(struct udevice *dev) { - /* FIXME: probe from DT eventually too/ */ - const unsigned long clk = cm_get_mmc_controller_clk_hz(); - struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; - int fifo_depth; +#if CONFIG_IS_ENABLED(CLK) + struct clk clk; + int ret; + + ret = clk_get_by_index(dev, 1, &clk); + if (ret) + return ret; - if (clk == 0) { + host->bus_hz = clk_get_rate(&clk); + + clk_free(&clk); +#else + /* Fixed clock divide by 4 which due to the SDMMC wrapper */ + host->bus_hz = cm_get_mmc_controller_clk_hz(); +#endif + if (host->bus_hz == 0) { printf("DWMMC: MMC clock is zero!"); return -EINVAL; } + return 0; +} + +static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev) +{ + struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; + int fifo_depth; + fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "fifo-depth", 0); if (fifo_depth < 0) { @@ -102,8 +122,6 @@ static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev) * We only have one dwmmc block on gen5 SoCFPGA. */ host->dev_index = 0; - /* Fixed clock divide by 4 which due to the SDMMC wrapper */ - host->bus_hz = clk; host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2); priv->drvsel = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), @@ -123,6 +141,11 @@ static int socfpga_dwmmc_probe(struct udevice *dev) struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host; + int ret; + + ret = socfpga_dwmmc_get_clk_rate(dev); + if (ret) + return ret; socfpga_dwmci_reset(dev); @@ -130,7 +153,6 @@ static int socfpga_dwmmc_probe(struct udevice *dev) dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000); host->mmc = &plat->mmc; #else - int ret; ret = add_dwmci(host, host->bus_hz, 400000); if (ret) diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index a47226bd21..29f30d8ccc 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -242,31 +242,6 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob) ctrl->index += mtd->writesize; } -static int is_blank(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl, - unsigned int bufnum) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_ifc_mtd *priv = nand_get_controller_data(chip); - u8 __iomem *addr = priv->vbase + bufnum * (mtd->writesize * 2); - u32 __iomem *main = (u32 *)addr; - u8 __iomem *oob = addr + mtd->writesize; - int i; - - for (i = 0; i < mtd->writesize / 4; i++) { - if (__raw_readl(&main[i]) != 0xffffffff) - return 0; - } - - for (i = 0; i < chip->ecc.layout->eccbytes; i++) { - int pos = chip->ecc.layout->eccpos[i]; - - if (__raw_readb(&oob[pos]) != 0xff) - return 0; - } - - return 1; -} - /* returns nonzero if entire page is blank */ static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl, u32 eccstat, unsigned int bufnum) @@ -331,16 +306,14 @@ static int fsl_ifc_run_command(struct mtd_info *mtd) if (errors == 15) { /* * Uncorrectable error. - * OK only if the whole page is blank. + * We'll check for blank pages later. * * We disable ECCER reporting due to erratum * IFC-A002770 -- so report it now if we * see an uncorrectable error in ECCSTAT. */ - if (!is_blank(mtd, ctrl, bufnum)) - ctrl->status |= - IFC_NAND_EVTER_STAT_ECCER; - break; + ctrl->status |= IFC_NAND_EVTER_STAT_ECCER; + continue; } mtd->ecc_stats.corrected += errors; @@ -727,6 +700,39 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip) return status | NAND_STATUS_WP; } +/* + * The controller does not check for bitflips in erased pages, + * therefore software must check instead. + */ +static int +check_erased_page(struct nand_chip *chip, u8 *buf, struct mtd_info *mtd) +{ + u8 *ecc = chip->oob_poi; + const int ecc_size = chip->ecc.bytes; + const int pkt_size = chip->ecc.size; + int i, res, bitflips; + + /* IFC starts ecc bytes at offset 8 in the spare area. */ + ecc += 8; + bitflips = 0; + for (i = 0; i < chip->ecc.steps; i++) { + res = nand_check_erased_ecc_chunk(buf, pkt_size, ecc, ecc_size, + NULL, 0, chip->ecc.strength); + + if (res < 0) { + printf("fsl-ifc: NAND Flash ECC Uncorrectable Error\n"); + mtd->ecc_stats.failed++; + } else if (res > 0) { + mtd->ecc_stats.corrected += res; + } + bitflips = max(res, bitflips); + buf += pkt_size; + ecc += ecc_size; + } + + return bitflips; +} + static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, int oob_required, int page) { @@ -736,6 +742,9 @@ static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip, fsl_ifc_read_buf(mtd, buf, mtd->writesize); fsl_ifc_read_buf(mtd, chip->oob_poi, mtd->oobsize); + if (ctrl->status & IFC_NAND_EVTER_STAT_ECCER) + return check_erased_page(chip, buf, mtd); + if (ctrl->status != IFC_NAND_EVTER_STAT_OPC) mtd->ecc_stats.failed++; diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index f762b0898d..5441da47d1 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -150,6 +150,14 @@ config ETH_DESIGNWARE 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to provide the PHY (physical media interface). +config ETH_DESIGNWARE_SOCFPGA + bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" + depends on DM_ETH && ETH_DESIGNWARE + help + The Altera SoCFPGA requires additional configuration of the + Altera system manager to correctly interface with the PHY. + This code handles those SoC specifics. + config ETHOC bool "OpenCores 10/100 Mbps Ethernet MAC" help @@ -233,6 +241,11 @@ config RGMII Enable the support of the Reduced Gigabit Media-Independent Interface (RGMII). +config MII + bool "Enable MII" + help + Enable support of the Media-Independent Interface (MII) + config RTL8139 bool "Realtek 8139 series Ethernet controller driver" help @@ -309,6 +322,11 @@ config SH_ETHER help This driver supports the Ethernet for Renesas SH and ARM SoCs. +config DRIVER_TI_EMAC + bool "TI Davinci EMAC" + help + Support for davinci emac + config XILINX_AXIEMAC depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) select PHYLIB diff --git a/drivers/net/Makefile b/drivers/net/Makefile index c1ed44e21f..48a2878071 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_CALXEDA_XGMAC) += calxedaxgmac.o obj-$(CONFIG_CS8900) += cs8900.o obj-$(CONFIG_TULIP) += dc2114x.o obj-$(CONFIG_ETH_DESIGNWARE) += designware.o +obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o obj-$(CONFIG_DNET) += dnet.o obj-$(CONFIG_E1000) += e1000.o diff --git a/drivers/net/dwmac_socfpga.c b/drivers/net/dwmac_socfpga.c new file mode 100644 index 0000000000..08fc9677c4 --- /dev/null +++ b/drivers/net/dwmac_socfpga.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Marek Vasut <marex@denx.de> + * + * Altera SoCFPGA EMAC extras + */ + +#include <common.h> +#include <asm/io.h> +#include <dm.h> +#include <clk.h> +#include <phy.h> +#include <regmap.h> +#include <reset.h> +#include <syscon.h> +#include "designware.h" + +#include <asm/arch/system_manager.h> + +enum dwmac_type { + DWMAC_SOCFPGA_GEN5 = 0, + DWMAC_SOCFPGA_ARRIA10, + DWMAC_SOCFPGA_STRATIX10, +}; + +struct dwmac_socfpga_platdata { + struct dw_eth_pdata dw_eth_pdata; + enum dwmac_type type; + void *phy_intf; +}; + +static int dwmac_socfpga_ofdata_to_platdata(struct udevice *dev) +{ + struct dwmac_socfpga_platdata *pdata = dev_get_platdata(dev); + struct regmap *regmap; + struct ofnode_phandle_args args; + void *range; + int ret; + + ret = dev_read_phandle_with_args(dev, "altr,sysmgr-syscon", NULL, + 2, 0, &args); + if (ret) { + dev_err(dev, "Failed to get syscon: %d\n", ret); + return ret; + } + + if (args.args_count != 2) { + dev_err(dev, "Invalid number of syscon args\n"); + return -EINVAL; + } + + regmap = syscon_node_to_regmap(args.node); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(dev, "Failed to get regmap: %d\n", ret); + return ret; + } + + range = regmap_get_range(regmap, 0); + if (!range) { + dev_err(dev, "Failed to get regmap range\n"); + return -ENOMEM; + } + + pdata->phy_intf = range + args.args[0]; + + /* + * Sadly, the Altera DT bindings don't have SoC-specific compatibles, + * so we have to guesstimate which SoC we are running on from the + * DWMAC version. Luckily, Altera at least updated the DWMAC with + * each SoC. + */ + if (ofnode_device_is_compatible(dev->node, "snps,dwmac-3.70a")) + pdata->type = DWMAC_SOCFPGA_GEN5; + + if (ofnode_device_is_compatible(dev->node, "snps,dwmac-3.72a")) + pdata->type = DWMAC_SOCFPGA_ARRIA10; + + if (ofnode_device_is_compatible(dev->node, "snps,dwmac-3.74a")) + pdata->type = DWMAC_SOCFPGA_STRATIX10; + + return designware_eth_ofdata_to_platdata(dev); +} + +static int dwmac_socfpga_probe(struct udevice *dev) +{ + struct dwmac_socfpga_platdata *pdata = dev_get_platdata(dev); + struct eth_pdata *edata = &pdata->dw_eth_pdata.eth_pdata; + struct reset_ctl_bulk reset_bulk; + int ret; + u8 modereg; + + if (pdata->type == DWMAC_SOCFPGA_ARRIA10) { + switch (edata->phy_interface) { + case PHY_INTERFACE_MODE_MII: + case PHY_INTERFACE_MODE_GMII: + modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; + break; + case PHY_INTERFACE_MODE_RMII: + modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII; + break; + case PHY_INTERFACE_MODE_RGMII: + modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII; + break; + default: + dev_err(dev, "Unsupported PHY mode\n"); + return -EINVAL; + } + + ret = reset_get_bulk(dev, &reset_bulk); + if (ret) { + dev_err(dev, "Failed to get reset: %d\n", ret); + return ret; + } + + reset_assert_bulk(&reset_bulk); + + clrsetbits_le32(pdata->phy_intf, + SYSMGR_EMACGRP_CTRL_PHYSEL_MASK, + modereg); + + reset_release_bulk(&reset_bulk); + } + + return designware_eth_probe(dev); +} + +static const struct udevice_id dwmac_socfpga_ids[] = { + { .compatible = "altr,socfpga-stmmac" }, + { } +}; + +U_BOOT_DRIVER(dwmac_socfpga) = { + .name = "dwmac_socfpga", + .id = UCLASS_ETH, + .of_match = dwmac_socfpga_ids, + .ofdata_to_platdata = dwmac_socfpga_ofdata_to_platdata, + .probe = dwmac_socfpga_probe, + .ops = &designware_eth_ops, + .priv_auto_alloc_size = sizeof(struct dw_eth_dev), + .platdata_auto_alloc_size = sizeof(struct dwmac_socfpga_platdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index 982024e31e..940025a467 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -322,7 +322,7 @@ static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id, static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type) { int i, err = 0, ret = 0; - char ethname[10]; + char ethname[ETH_NAME_LEN]; struct eth_device *eth_dev; for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { @@ -331,8 +331,8 @@ static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type) (wriop_get_phy_address(i) == -1)) continue; - sprintf(ethname, "DPMAC%d@%s", i, - phy_interface_strings[wriop_get_enet_if(i)]); + snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", i, + phy_interface_strings[wriop_get_enet_if(i)]); eth_dev = eth_get_dev_by_name(ethname); if (eth_dev == NULL) diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index 79facb4a44..a25b7cd906 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -993,8 +993,8 @@ static int ldpaa_eth_netdev_init(struct eth_device *net_dev, int err; struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv; - sprintf(net_dev->name, "DPMAC%d@%s", priv->dpmac_id, - phy_interface_strings[enet_if]); + snprintf(net_dev->name, ETH_NAME_LEN, "DPMAC%d@%s", priv->dpmac_id, + phy_interface_strings[enet_if]); net_dev->iobase = 0; net_dev->init = ldpaa_eth_open; diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 375b8549c5..b4c8556686 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -321,6 +321,12 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) pci_setup_indirect(hose, cfg_addr, cfg_data); +#ifdef PEX_CCB_DIV + /* Configure the PCIE controller core clock ratio */ + pci_hose_write_config_dword(hose, dev, 0x440, + ((gd->bus_clk / 1000000) * + (16 / PEX_CCB_DIV)) / 333); +#endif block_rev = in_be32(&pci->block_rev1); if (PEX_IP_BLK_REV_2_2 <= block_rev) { pi = &pci->pit[2]; /* 0xDC0 */ diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 8fc2295d03..e0822bb775 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -110,6 +110,14 @@ config STI_USB_PHY used by USB2 and USB3 Host controllers available on STiH407 SoC families. +config PHY_RCAR_GEN2 + tristate "Renesas R-Car Gen2 USB PHY" + depends on PHY && RCAR_GEN2 + help + Support for the Renesas R-Car Gen2 USB PHY. This driver operates the + PHY connected to USBHS module, PCI EHCI module and USB3.0 module and + allows configuring the module multiplexing. + config PHY_STM32_USBPHYC tristate "STMicroelectronics STM32 SoC USB HS PHY driver" depends on PHY && ARCH_STM32MP diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index ba0803cd04..178fb4530e 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -12,5 +12,6 @@ obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o +obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o diff --git a/drivers/phy/phy-rcar-gen2.c b/drivers/phy/phy-rcar-gen2.c new file mode 100644 index 0000000000..ee70b81d88 --- /dev/null +++ b/drivers/phy/phy-rcar-gen2.c @@ -0,0 +1,190 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas RCar Gen2 USB PHY driver + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + */ + +#include <common.h> +#include <clk.h> +#include <div64.h> +#include <dm.h> +#include <fdtdec.h> +#include <generic-phy.h> +#include <reset.h> +#include <syscon.h> +#include <usb.h> +#include <asm/io.h> +#include <linux/bitops.h> +#include <power/regulator.h> + +#define USBHS_LPSTS 0x02 +#define USBHS_UGCTRL 0x80 +#define USBHS_UGCTRL2 0x84 +#define USBHS_UGSTS 0x88 /* From technical update */ + +/* Low Power Status register (LPSTS) */ +#define USBHS_LPSTS_SUSPM 0x4000 + +/* USB General control register (UGCTRL) */ +#define USBHS_UGCTRL_CONNECT BIT(2) +#define USBHS_UGCTRL_PLLRESET BIT(0) + +/* USB General control register 2 (UGCTRL2) */ +#define USBHS_UGCTRL2_USB2SEL 0x80000000 +#define USBHS_UGCTRL2_USB2SEL_PCI 0x00000000 +#define USBHS_UGCTRL2_USB2SEL_USB30 0x80000000 +#define USBHS_UGCTRL2_USB0SEL 0x00000030 +#define USBHS_UGCTRL2_USB0SEL_PCI 0x00000010 +#define USBHS_UGCTRL2_USB0SEL_HS_USB 0x00000030 + +/* USB General status register (UGSTS) */ +#define USBHS_UGSTS_LOCK 0x00000100 /* From technical update */ + +#define PHYS_PER_CHANNEL 2 + +struct rcar_gen2_phy { + fdt_addr_t regs; + struct clk clk; +}; + +static int rcar_gen2_phy_phy_init(struct phy *phy) +{ + struct rcar_gen2_phy *priv = dev_get_priv(phy->dev); + u16 chan = phy->id & 0xffff; + u16 mode = (phy->id >> 16) & 0xffff; + u32 clrmask, setmask; + + if (chan == 0) { + clrmask = USBHS_UGCTRL2_USB0SEL; + setmask = mode ? USBHS_UGCTRL2_USB0SEL_HS_USB : + USBHS_UGCTRL2_USB0SEL_PCI; + } else { + clrmask = USBHS_UGCTRL2_USB2SEL; + setmask = mode ? USBHS_UGCTRL2_USB2SEL_USB30 : + USBHS_UGCTRL2_USB2SEL_PCI; + } + clrsetbits_le32(priv->regs + USBHS_UGCTRL2, clrmask, setmask); + + return 0; +} + +static int rcar_gen2_phy_phy_power_on(struct phy *phy) +{ + struct rcar_gen2_phy *priv = dev_get_priv(phy->dev); + int i; + u32 value; + + /* Power on USBHS PHY */ + clrbits_le32(priv->regs + USBHS_UGCTRL, USBHS_UGCTRL_PLLRESET); + + setbits_le16(priv->regs + USBHS_LPSTS, USBHS_LPSTS_SUSPM); + + for (i = 0; i < 20; i++) { + value = readl(priv->regs + USBHS_UGSTS); + if ((value & USBHS_UGSTS_LOCK) == USBHS_UGSTS_LOCK) { + setbits_le32(priv->regs + USBHS_UGCTRL, + USBHS_UGCTRL_CONNECT); + return 0; + } + udelay(1); + } + + return -ETIMEDOUT; +} + +static int rcar_gen2_phy_phy_power_off(struct phy *phy) +{ + struct rcar_gen2_phy *priv = dev_get_priv(phy->dev); + + /* Power off USBHS PHY */ + clrbits_le32(priv->regs + USBHS_UGCTRL, USBHS_UGCTRL_CONNECT); + + clrbits_le16(priv->regs + USBHS_LPSTS, USBHS_LPSTS_SUSPM); + + setbits_le32(priv->regs + USBHS_UGCTRL, USBHS_UGCTRL_PLLRESET); + + return 0; +} + +static int rcar_gen2_phy_of_xlate(struct phy *phy, + struct ofnode_phandle_args *args) +{ + if (args->args_count != 2) { + dev_err(phy->dev, "Invalid DT PHY argument count: %d\n", + args->args_count); + return -EINVAL; + } + + if (args->args[0] != 0 && args->args[0] != 2) { + dev_err(phy->dev, "Invalid DT PHY channel: %d\n", + args->args[0]); + return -EINVAL; + } + + if (args->args[1] != 0 && args->args[1] != 1) { + dev_err(phy->dev, "Invalid DT PHY mode: %d\n", + args->args[1]); + return -EINVAL; + } + + if (args->args_count) + phy->id = args->args[0] | (args->args[1] << 16); + else + phy->id = 0; + + return 0; +} + +static const struct phy_ops rcar_gen2_phy_phy_ops = { + .init = rcar_gen2_phy_phy_init, + .power_on = rcar_gen2_phy_phy_power_on, + .power_off = rcar_gen2_phy_phy_power_off, + .of_xlate = rcar_gen2_phy_of_xlate, +}; + +static int rcar_gen2_phy_probe(struct udevice *dev) +{ + struct rcar_gen2_phy *priv = dev_get_priv(dev); + int ret; + + priv->regs = dev_read_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) + return -EINVAL; + + /* Enable clock */ + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret) + return ret; + + ret = clk_enable(&priv->clk); + if (ret) + return ret; + + return 0; +} + +static int rcar_gen2_phy_remove(struct udevice *dev) +{ + struct rcar_gen2_phy *priv = dev_get_priv(dev); + + clk_disable(&priv->clk); + clk_free(&priv->clk); + + return 0; +} + +static const struct udevice_id rcar_gen2_phy_of_match[] = { + { .compatible = "renesas,rcar-gen2-usb-phy", }, + { }, +}; + +U_BOOT_DRIVER(rcar_gen2_phy) = { + .name = "rcar-gen2-phy", + .id = UCLASS_PHY, + .of_match = rcar_gen2_phy_of_match, + .ops = &rcar_gen2_phy_phy_ops, + .probe = rcar_gen2_phy_probe, + .remove = rcar_gen2_phy_remove, + .priv_auto_alloc_size = sizeof(struct rcar_gen2_phy), +}; diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index 6162395e75..a0ac30aa71 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -64,7 +64,7 @@ int generic_phy_get_by_index(struct udevice *dev, int index, return ret; /* insert phy idx at first position into args array */ - for (i = args.args_count; i > 1 ; i--) + for (i = args.args_count; i >= 1 ; i--) args.args[i] = args.args[i - 1]; args.args_count++; diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c index 0be5b7bd51..a99aa78310 100644 --- a/drivers/power/regulator/fixed.c +++ b/drivers/power/regulator/fixed.c @@ -16,6 +16,7 @@ struct fixed_regulator_platdata { struct gpio_desc gpio; /* GPIO for regulator enable control */ unsigned int startup_delay_us; + unsigned int off_on_delay_us; }; static int fixed_regulator_ofdata_to_platdata(struct udevice *dev) @@ -50,6 +51,8 @@ static int fixed_regulator_ofdata_to_platdata(struct udevice *dev) /* Get optional ramp up delay */ dev_pdata->startup_delay_us = dev_read_u32_default(dev, "startup-delay-us", 0); + dev_pdata->off_on_delay_us = + dev_read_u32_default(dev, "u-boot,off-on-delay-us", 0); return 0; } @@ -123,6 +126,9 @@ static int fixed_regulator_set_enable(struct udevice *dev, bool enable) udelay(dev_pdata->startup_delay_us); debug("%s: done\n", __func__); + if (!enable && dev_pdata->off_on_delay_us) + udelay(dev_pdata->off_on_delay_us); + return 0; } diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index c489deac2b..c499601f00 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -36,7 +36,15 @@ static void serial_null(void) /** * on_baudrate() - Update the actual baudrate when the env var changes * + * @name: changed environment variable + * @value: new value of the environment variable + * @op: operation (create, overwrite, or delete) + * @flags: attributes of environment variable change, + * see flags H_* in include/search.h + * * This will check for a valid baudrate and only apply it if valid. + * + * Return: 0 on success, 1 on error */ static int on_baudrate(const char *name, const char *value, enum env_op op, int flags) diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 747f190d38..6473de20f1 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -341,16 +341,12 @@ static int tsc_timer_get_count(struct udevice *dev, u64 *count) return 0; } -static void tsc_timer_ensure_setup(void) +static void tsc_timer_ensure_setup(bool stop) { if (gd->arch.tsc_base) return; gd->arch.tsc_base = rdtsc(); - /* - * If there is no clock frequency specified in the device tree, - * calibrate it by ourselves. - */ if (!gd->arch.clock_rate) { unsigned long fast_calibrate; @@ -366,7 +362,10 @@ static void tsc_timer_ensure_setup(void) if (fast_calibrate) goto done; - panic("TSC frequency is ZERO"); + if (stop) + panic("TSC frequency is ZERO"); + else + return; done: gd->arch.clock_rate = fast_calibrate * 1000000; @@ -377,11 +376,17 @@ static int tsc_timer_probe(struct udevice *dev) { struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); - if (!uc_priv->clock_rate) { - tsc_timer_ensure_setup(); - uc_priv->clock_rate = gd->arch.clock_rate; + /* Try hardware calibration first */ + tsc_timer_ensure_setup(false); + if (!gd->arch.clock_rate) { + /* + * Use the clock frequency specified in the + * device tree as last resort + */ + if (!uc_priv->clock_rate) + panic("TSC frequency is ZERO"); } else { - gd->arch.tsc_base = rdtsc(); + uc_priv->clock_rate = gd->arch.clock_rate; } return 0; @@ -394,7 +399,7 @@ unsigned long notrace timer_early_get_rate(void) * clock rate can only be calibrated via some hardware ways. Specifying * it in the device tree won't work for the early timer. */ - tsc_timer_ensure_setup(); + tsc_timer_ensure_setup(true); return gd->arch.clock_rate; } diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c index 66f6c9ba82..f282ea6adf 100644 --- a/drivers/tpm/tpm2_tis_sandbox.c +++ b/drivers/tpm/tpm2_tis_sandbox.c @@ -215,24 +215,24 @@ static int sandbox_tpm2_check_readyness(struct udevice *dev, int command) return 0; } -static int sandbox_tpm2_fill_buf(u8 **recv, size_t *recv_len, u16 tag, u32 rc) +static int sandbox_tpm2_fill_buf(u8 *recv, size_t *recv_len, u16 tag, u32 rc) { *recv_len = sizeof(tag) + sizeof(u32) + sizeof(rc); /* Write tag */ - put_unaligned_be16(tag, *recv); - *recv += sizeof(tag); + put_unaligned_be16(tag, recv); + recv += sizeof(tag); /* Write length */ - put_unaligned_be32(*recv_len, *recv); - *recv += sizeof(u32); + put_unaligned_be32(*recv_len, recv); + recv += sizeof(u32); /* Write return code */ - put_unaligned_be32(rc, *recv); - *recv += sizeof(rc); + put_unaligned_be32(rc, recv); + recv += sizeof(rc); /* Add trailing \0 */ - *recv = NULL; + *recv = '\0'; return 0; } @@ -272,7 +272,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, u32 capability, property, property_count; /* TPM2_PCR_Read/Extend variables */ - int pcr_index; + int pcr_index = 0; u64 pcr_map = 0; u32 selections, pcr_nb; u16 alg; @@ -287,7 +287,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, printf("TPM2: Unmatching length, received: %ld, expected: %d\n", send_size, length); rc = TPM2_RC_SIZE; - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); return 0; } @@ -295,13 +295,13 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, sent += sizeof(command); rc = sandbox_tpm2_check_readyness(dev, command); if (rc) { - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); return 0; } rc = sandbox_tpm2_check_session(dev, command, tag, &sent, &hierarchy); if (rc) { - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); return 0; } @@ -319,7 +319,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, tpm->startup_done = true; - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); break; case TPM2_CC_SELF_TEST: @@ -335,7 +335,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, tpm->tests_done = true; - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); break; case TPM2_CC_CLEAR: @@ -358,7 +358,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, tpm->pcr[i][j] = 0; } - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); break; case TPM2_CC_HIERCHANGEAUTH: @@ -372,7 +372,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, sent += new_pw_sz; } - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); break; case TPM2_CC_GET_CAPABILITY: @@ -392,7 +392,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, if (!property_count || property + property_count > TPM2_PROPERTY_NB) { rc = TPM2_RC_HANDLE; - return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } /* Write tag */ @@ -445,7 +445,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, tpm->properties[TPM2_LOCKOUT_RECOVERY] = get_unaligned_be32(sent); sent += sizeof(*tpm->properties); - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); break; case TPM2_CC_PCR_READ: @@ -454,7 +454,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, if (selections != 1) { printf("Sandbox cannot handle more than one PCR\n"); rc = TPM2_RC_VALUE; - return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } alg = get_unaligned_be16(sent); @@ -462,7 +462,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, if (alg != TPM2_ALG_SHA256) { printf("Sandbox TPM only handle SHA256 algorithm\n"); rc = TPM2_RC_VALUE; - return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } pcr_array_sz = *sent; @@ -470,7 +470,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, if (!pcr_array_sz || pcr_array_sz > 8) { printf("Sandbox TPM cannot handle so much PCRs\n"); rc = TPM2_RC_VALUE; - return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } for (i = 0; i < pcr_array_sz; i++) @@ -480,13 +480,13 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, printf("Sandbox TPM handles up to %d PCR(s)\n", SANDBOX_TPM_PCR_NB); rc = TPM2_RC_VALUE; - return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } - if (pcr_map >> SANDBOX_TPM_PCR_NB) { - printf("Wrong PCR map.\n"); + if (!pcr_map) { + printf("Empty PCR map.\n"); rc = TPM2_RC_VALUE; - return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } for (i = 0; i < SANDBOX_TPM_PCR_NB; i++) @@ -538,7 +538,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, if (pcr_nb != 1) { printf("Sandbox cannot handle more than one PCR\n"); rc = TPM2_RC_VALUE; - return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } /* Check the hash algorithm */ @@ -547,19 +547,19 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, if (alg != TPM2_ALG_SHA256) { printf("Sandbox TPM only handle SHA256 algorithm\n"); rc = TPM2_RC_VALUE; - return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } /* Extend the PCR */ rc = sandbox_tpm2_extend(dev, pcr_index, sent); - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); break; default: printf("TPM2 command %02x unknown in Sandbox\n", command); rc = TPM2_RC_COMMAND_CODE; - sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } return 0; diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c index b8833d0b54..e81eb164b0 100644 --- a/drivers/usb/gadget/f_rockusb.c +++ b/drivers/usb/gadget/f_rockusb.c @@ -328,6 +328,7 @@ static int rockusb_tx_write(const char *buffer, unsigned int buffer_size) memcpy(in_req->buf, buffer, buffer_size); in_req->length = buffer_size; + debug("Transferring 0x%x bytes\n", buffer_size); usb_ep_dequeue(rockusb_func->in_ep, in_req); ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0); if (ret) @@ -383,11 +384,25 @@ static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size) csw->residue = cpu_to_be32(residue); csw->status = status; #ifdef DEBUG - printcsw((char *)&csw); + printcsw((char *)csw); #endif return rockusb_tx_write((char *)csw, size); } +static void tx_handler_send_csw(struct usb_ep *ep, struct usb_request *req) +{ + struct f_rockusb *f_rkusb = get_rkusb(); + int status = req->status; + + if (status) + debug("status: %d ep '%s' trans: %d\n", + status, ep->name, req->actual); + + /* Return back to default in_req complete function after sending CSW */ + req->complete = rockusb_complete; + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD, USB_BULK_CS_WRAP_LEN); +} + static unsigned int rx_bytes_expected(struct usb_ep *ep) { struct f_rockusb *f_rkusb = get_rkusb(); @@ -407,6 +422,65 @@ static unsigned int rx_bytes_expected(struct usb_ep *ep) return rx_remain; } +/* usb_request complete call back to handle upload image */ +static void tx_handler_ul_image(struct usb_ep *ep, struct usb_request *req) +{ + ALLOC_CACHE_ALIGN_BUFFER(char, rbuffer, RKBLOCK_BUF_SIZE); + struct f_rockusb *f_rkusb = get_rkusb(); + struct usb_request *in_req = rockusb_func->in_req; + int ret; + + /* Print error status of previous transfer */ + if (req->status) + debug("status: %d ep '%s' trans: %d len %d\n", req->status, + ep->name, req->actual, req->length); + + /* On transfer complete reset in_req and feedback host with CSW_GOOD */ + if (f_rkusb->ul_bytes >= f_rkusb->ul_size) { + in_req->length = 0; + in_req->complete = rockusb_complete; + + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD, + USB_BULK_CS_WRAP_LEN); + return; + } + + /* Proceed with current chunk */ + unsigned int transfer_size = f_rkusb->ul_size - f_rkusb->ul_bytes; + + if (transfer_size > RKBLOCK_BUF_SIZE) + transfer_size = RKBLOCK_BUF_SIZE; + /* Read at least one block */ + unsigned int blkcount = (transfer_size + f_rkusb->desc->blksz - 1) / + f_rkusb->desc->blksz; + + debug("ul %x bytes, %x blks, read lba %x, ul_size:%x, ul_bytes:%x, ", + transfer_size, blkcount, f_rkusb->lba, + f_rkusb->ul_size, f_rkusb->ul_bytes); + + int blks = blk_dread(f_rkusb->desc, f_rkusb->lba, blkcount, rbuffer); + + if (blks != blkcount) { + printf("failed reading from device %s: %d\n", + f_rkusb->dev_type, f_rkusb->dev_index); + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL, + USB_BULK_CS_WRAP_LEN); + return; + } + f_rkusb->lba += blkcount; + f_rkusb->ul_bytes += transfer_size; + + /* Proceed with USB request */ + memcpy(in_req->buf, rbuffer, transfer_size); + in_req->length = transfer_size; + in_req->complete = tx_handler_ul_image; + debug("Uploading 0x%x bytes\n", transfer_size); + usb_ep_dequeue(rockusb_func->in_ep, in_req); + ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0); + if (ret) + printf("Error %d on queue\n", ret); +} + /* usb_request complete call back to handle down load image */ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) { @@ -416,19 +490,6 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) unsigned int buffer_size = req->actual; transfer_size = f_rkusb->dl_size - f_rkusb->dl_bytes; - if (!f_rkusb->desc) { - char *type = f_rkusb->dev_type; - int index = f_rkusb->dev_index; - - f_rkusb->desc = blk_get_dev(type, index); - if (!f_rkusb->desc || - f_rkusb->desc->type == DEV_TYPE_UNKNOWN) { - puts("invalid mmc device\n"); - rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL, - USB_BULK_CS_WRAP_LEN); - return; - } - } if (req->status != 0) { printf("Bad status: %d\n", req->status); @@ -442,7 +503,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) memcpy((void *)f_rkusb->buf, buffer, transfer_size); f_rkusb->dl_bytes += transfer_size; - int blks = 0, blkcnt = transfer_size / 512; + int blks = 0, blkcnt = transfer_size / f_rkusb->desc->blksz; debug("dl %x bytes, %x blks, write lba %x, dl_size:%x, dl_bytes:%x, ", transfer_size, blkcnt, f_rkusb->lba, f_rkusb->dl_size, @@ -462,7 +523,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) req->complete = rx_handler_command; req->length = EP_BUFFER_SIZE; f_rkusb->buf = f_rkusb->buf_head; - printf("transfer 0x%x bytes done\n", f_rkusb->dl_size); + debug("transfer 0x%x bytes done\n", f_rkusb->dl_size); f_rkusb->dl_size = 0; rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_GOOD, USB_BULK_CS_WRAP_LEN); @@ -473,8 +534,8 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) else f_rkusb->buf = f_rkusb->buf_head; - debug("remain %x bytes, %x sectors\n", req->length, - req->length / 512); + debug("remain %x bytes, %lx sectors\n", req->length, + req->length / f_rkusb->desc->blksz); } req->actual = 0; @@ -496,13 +557,101 @@ static void cb_read_storage_id(struct usb_ep *ep, struct usb_request *req) { ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw, sizeof(struct fsg_bulk_cb_wrap)); + struct f_rockusb *f_rkusb = get_rkusb(); char emmc_id[] = "EMMC "; printf("read storage id\n"); memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN); + + /* Prepare for sending subsequent CSW_GOOD */ + f_rkusb->tag = cbw->tag; + f_rkusb->in_req->complete = tx_handler_send_csw; + rockusb_tx_write_str(emmc_id); - rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD, - USB_BULK_CS_WRAP_LEN); +} + +int __weak rk_get_bootrom_chip_version(unsigned int *chip_info, int size) +{ + return 0; +} + +static void cb_get_chip_version(struct usb_ep *ep, struct usb_request *req) +{ + ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw, + sizeof(struct fsg_bulk_cb_wrap)); + struct f_rockusb *f_rkusb = get_rkusb(); + unsigned int chip_info[4], i; + + memset(chip_info, 0, sizeof(chip_info)); + rk_get_bootrom_chip_version(chip_info, 4); + + /* + * Chip Version is a string saved in BOOTROM address space Little Endian + * + * Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030 + * which brings: 320A20140813V200 + * + * Note that memory version do invert MSB/LSB so printing the char + * buffer will show: A02341023180002V + */ + printf("read chip version: "); + for (i = 0; i < 4; i++) { + printf("%c%c%c%c", + (chip_info[i] >> 24) & 0xFF, + (chip_info[i] >> 16) & 0xFF, + (chip_info[i] >> 8) & 0xFF, + (chip_info[i] >> 0) & 0xFF); + } + printf("\n"); + memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN); + + /* Prepare for sending subsequent CSW_GOOD */ + f_rkusb->tag = cbw->tag; + f_rkusb->in_req->complete = tx_handler_send_csw; + + rockusb_tx_write((char *)chip_info, sizeof(chip_info)); +} + +static void cb_read_lba(struct usb_ep *ep, struct usb_request *req) +{ + ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw, + sizeof(struct fsg_bulk_cb_wrap)); + struct f_rockusb *f_rkusb = get_rkusb(); + int sector_count; + + memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN); + sector_count = (int)get_unaligned_be16(&cbw->CDB[7]); + f_rkusb->tag = cbw->tag; + + if (!f_rkusb->desc) { + char *type = f_rkusb->dev_type; + int index = f_rkusb->dev_index; + + f_rkusb->desc = blk_get_dev(type, index); + if (!f_rkusb->desc || + f_rkusb->desc->type == DEV_TYPE_UNKNOWN) { + printf("invalid device \"%s\", %d\n", type, index); + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL, + USB_BULK_CS_WRAP_LEN); + return; + } + } + + f_rkusb->lba = get_unaligned_be32(&cbw->CDB[2]); + f_rkusb->ul_size = sector_count * f_rkusb->desc->blksz; + f_rkusb->ul_bytes = 0; + + debug("require read %x bytes, %x sectors from lba %x\n", + f_rkusb->ul_size, sector_count, f_rkusb->lba); + + if (f_rkusb->ul_size == 0) { + rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, + CSW_FAIL, USB_BULK_CS_WRAP_LEN); + return; + } + + /* Start right now sending first chunk */ + tx_handler_ul_image(ep, req); } static void cb_write_lba(struct usb_ep *ep, struct usb_request *req) @@ -514,10 +663,26 @@ static void cb_write_lba(struct usb_ep *ep, struct usb_request *req) memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN); sector_count = (int)get_unaligned_be16(&cbw->CDB[7]); + f_rkusb->tag = cbw->tag; + + if (!f_rkusb->desc) { + char *type = f_rkusb->dev_type; + int index = f_rkusb->dev_index; + + f_rkusb->desc = blk_get_dev(type, index); + if (!f_rkusb->desc || + f_rkusb->desc->type == DEV_TYPE_UNKNOWN) { + printf("invalid device \"%s\", %d\n", type, index); + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL, + USB_BULK_CS_WRAP_LEN); + return; + } + } + f_rkusb->lba = get_unaligned_be32(&cbw->CDB[2]); - f_rkusb->dl_size = sector_count * 512; + f_rkusb->dl_size = sector_count * f_rkusb->desc->blksz; f_rkusb->dl_bytes = 0; - f_rkusb->tag = cbw->tag; + debug("require write %x bytes, %x sectors to lba %x\n", f_rkusb->dl_size, sector_count, f_rkusb->lba); @@ -530,6 +695,50 @@ static void cb_write_lba(struct usb_ep *ep, struct usb_request *req) } } +static void cb_erase_lba(struct usb_ep *ep, struct usb_request *req) +{ + ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw, + sizeof(struct fsg_bulk_cb_wrap)); + struct f_rockusb *f_rkusb = get_rkusb(); + int sector_count, lba, blks; + + memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN); + sector_count = (int)get_unaligned_be16(&cbw->CDB[7]); + f_rkusb->tag = cbw->tag; + + if (!f_rkusb->desc) { + char *type = f_rkusb->dev_type; + int index = f_rkusb->dev_index; + + f_rkusb->desc = blk_get_dev(type, index); + if (!f_rkusb->desc || + f_rkusb->desc->type == DEV_TYPE_UNKNOWN) { + printf("invalid device \"%s\", %d\n", type, index); + rockusb_tx_write_csw(f_rkusb->tag, 0, CSW_FAIL, + USB_BULK_CS_WRAP_LEN); + return; + } + } + + lba = get_unaligned_be32(&cbw->CDB[2]); + + debug("require erase %x sectors from lba %x\n", + sector_count, lba); + + blks = blk_derase(f_rkusb->desc, lba, sector_count); + if (blks != sector_count) { + printf("failed erasing device %s: %d\n", f_rkusb->dev_type, + f_rkusb->dev_index); + rockusb_tx_write_csw(f_rkusb->tag, + cbw->data_transfer_length, CSW_FAIL, + USB_BULK_CS_WRAP_LEN); + return; + } + + rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD, + USB_BULK_CS_WRAP_LEN); +} + void __weak rkusb_set_reboot_flag(int flag) { struct f_rockusb *f_rkusb = get_rkusb(); @@ -615,7 +824,7 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] = { }, { .cmd = K_FW_LBA_READ_10, - .cb = cb_not_support, + .cb = cb_read_lba, }, { .cmd = K_FW_LBA_WRITE_10, @@ -643,7 +852,7 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] = { }, { .cmd = K_FW_GET_CHIP_VER, - .cb = cb_not_support, + .cb = cb_get_chip_version, }, { .cmd = K_FW_LOW_FORMAT, @@ -662,6 +871,10 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] = { .cb = cb_not_support, }, { + .cmd = K_FW_LBA_ERASE_10, + .cb = cb_erase_lba, + }, + { .cmd = K_FW_SESSION, .cb = cb_not_support, }, diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index 1aa6be44bb..8b3b19feaf 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -877,14 +877,14 @@ static void thor_func_disable(struct usb_function *f) /* Avoid freeing memory when ep is still claimed */ if (dev->in_ep->driver_data) { - free_ep_req(dev->in_ep, dev->in_req); usb_ep_disable(dev->in_ep); + free_ep_req(dev->in_ep, dev->in_req); dev->in_ep->driver_data = NULL; } if (dev->out_ep->driver_data) { - usb_ep_free_request(dev->out_ep, dev->out_req); usb_ep_disable(dev->out_ep); + usb_ep_free_request(dev->out_ep, dev->out_req); dev->out_ep->driver_data = NULL; } diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index a2d7e10938..ed0b21f2a7 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -408,6 +408,12 @@ config VIDEO_MVEBU Support for the LCD controller integrated in the Marvell Armada XP SoC. +config VIDEO_OMAP3 + bool "Enable OMAP3+ DSS Support" + depends on ARCH_OMAP2PLUS + help + This enables the Display subsystem (DSS) on OMAP3+ boards. + config I2C_EDID bool "Enable EDID library" default n @@ -431,6 +437,17 @@ config ATMEL_HLCD help HLCDC supports video output to an attached LCD panel. +config LOGICORE_DP_TX + bool "Enable Logicore DP TX driver" + depends on DISPLAY + help + Enable the driver for the transmitter part of the Xilinx LogiCORE + DisplayPort, a IP core for Xilinx FPGAs that implements a DisplayPort + video interface as defined by VESA DisplayPort v1.2. + + Note that this is a pure transmitter device, and has no display + capabilities by itself. + config VIDEO_BROADWELL_IGD bool "Enable Intel Broadwell integrated graphics device" depends on X86 diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 7c89c67dce..0f41a23193 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -4,57 +4,58 @@ # Wolfgang Denk, DENX Software Engineering, wd@denx.de. ifdef CONFIG_DM +obj-$(CONFIG_BACKLIGHT_GPIO) += backlight_gpio.o +obj-$(CONFIG_BACKLIGHT_PWM) += pwm_backlight.o +obj-$(CONFIG_CONSOLE_NORMAL) += console_normal.o +obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o +obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/ obj-$(CONFIG_DISPLAY) += display-uclass.o obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o obj-$(CONFIG_DM_VIDEO) += video_bmp.o -obj-$(CONFIG_BACKLIGHT_PWM) += pwm_backlight.o -obj-$(CONFIG_BACKLIGHT_GPIO) += backlight_gpio.o -obj-$(CONFIG_CONSOLE_NORMAL) += console_normal.o -obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o -obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/ endif -obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o -obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o +obj-${CONFIG_EXYNOS_FB} += exynos/ +obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/ +obj-${CONFIG_VIDEO_STM32} += stm32/ +obj-${CONFIG_VIDEO_TEGRA124} += tegra124/ +obj-$(CONFIG_AM335X_LCD) += am335x-fb.o obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o +obj-$(CONFIG_FORMIKE) += formike.o obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o -obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o +obj-$(CONFIG_LD9040) += ld9040.o +obj-$(CONFIG_LG4573) += lg4573.o +obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o obj-$(CONFIG_PXA_LCD) += pxa_lcd.o -obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o obj-$(CONFIG_S6E8AX0) += s6e8ax0.o -obj-$(CONFIG_LD9040) += ld9040.o +obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o +obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o +obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o obj-$(CONFIG_VIDEO_EFI) += efi.o +obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o +obj-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o +obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o -obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o -obj-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o obj-$(CONFIG_VIDEO_MVEBU) += mvebu_lcd.o +obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o obj-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o obj-$(CONFIG_VIDEO_SANDBOX_SDL) += sandbox_sdl.o +obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o obj-$(CONFIG_VIDEO_VESA) += vesa.o -obj-$(CONFIG_FORMIKE) += formike.o -obj-$(CONFIG_LG4573) += lg4573.o -obj-$(CONFIG_AM335X_LCD) += am335x-fb.o -obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o -obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o -obj-${CONFIG_VIDEO_TEGRA124} += tegra124/ -obj-${CONFIG_EXYNOS_FB} += exynos/ -obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/ -obj-${CONFIG_VIDEO_STM32} += stm32/ obj-y += bridge/ obj-y += sunxi/ diff --git a/drivers/video/logicore_dp_dpcd.h b/drivers/video/logicore_dp_dpcd.h new file mode 100644 index 0000000000..858bbd609a --- /dev/null +++ b/drivers/video/logicore_dp_dpcd.h @@ -0,0 +1,341 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * logicore_dp_dpcd.h + * + * DPCD interface definition for XILINX LogiCore DisplayPort v6.1 + * based on Xilinx dp_v3_1 driver sources + * + * (C) Copyright 2016 + * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc + */ + +#ifndef __GDSYS_LOGICORE_DP_DPCD_H__ +#define __GDSYS_LOGICORE_DP_DPCD_H__ + +/* receiver capability field */ +#define DPCD_REV 0x00000 +#define DPCD_MAX_LINK_RATE 0x00001 +#define DPCD_MAX_LANE_COUNT 0x00002 +#define DPCD_MAX_DOWNSPREAD 0x00003 +#define DPCD_NORP_PWR_V_CAP 0x00004 +#define DPCD_DOWNSP_PRESENT 0x00005 +#define DPCD_ML_CH_CODING_CAP 0x00006 +#define DPCD_DOWNSP_COUNT_MSA_OUI 0x00007 +#define DPCD_RX_PORT0_CAP_0 0x00008 +#define DPCD_RX_PORT0_CAP_1 0x00009 +#define DPCD_RX_PORT1_CAP_0 0x0000A +#define DPCD_RX_PORT1_CAP_1 0x0000B +#define DPCD_I2C_SPEED_CTL_CAP 0x0000C +#define DPCD_EDP_CFG_CAP 0x0000D +#define DPCD_TRAIN_AUX_RD_INTERVAL 0x0000E +#define DPCD_ADAPTER_CAP 0x0000F +#define DPCD_FAUX_CAP 0x00020 +#define DPCD_MSTM_CAP 0x00021 +#define DPCD_NUM_AUDIO_EPS 0x00022 +#define DPCD_AV_GRANULARITY 0x00023 +#define DPCD_AUD_DEC_LAT_7_0 0x00024 +#define DPCD_AUD_DEC_LAT_15_8 0x00025 +#define DPCD_AUD_PP_LAT_7_0 0x00026 +#define DPCD_AUD_PP_LAT_15_8 0x00027 +#define DPCD_VID_INTER_LAT 0x00028 +#define DPCD_VID_PROG_LAT 0x00029 +#define DPCD_REP_LAT 0x0002A +#define DPCD_AUD_DEL_INS_7_0 0x0002B +#define DPCD_AUD_DEL_INS_15_8 0x0002C +#define DPCD_AUD_DEL_INS_23_16 0x0002D +#define DPCD_GUID 0x00030 +#define DPCD_RX_GTC_VALUE_7_0 0x00054 +#define DPCD_RX_GTC_VALUE_15_8 0x00055 +#define DPCD_RX_GTC_VALUE_23_16 0x00056 +#define DPCD_RX_GTC_VALUE_31_24 0x00057 +#define DPCD_RX_GTC_MSTR_REQ 0x00058 +#define DPCD_RX_GTC_FREQ_LOCK_DONE 0x00059 +#define DPCD_DOWNSP_0_CAP 0x00080 +#define DPCD_DOWNSP_1_CAP 0x00081 +#define DPCD_DOWNSP_2_CAP 0x00082 +#define DPCD_DOWNSP_3_CAP 0x00083 +#define DPCD_DOWNSP_0_DET_CAP 0x00080 +#define DPCD_DOWNSP_1_DET_CAP 0x00084 +#define DPCD_DOWNSP_2_DET_CAP 0x00088 +#define DPCD_DOWNSP_3_DET_CAP 0x0008C + +/* link configuration field */ +#define DPCD_LINK_BW_SET 0x00100 +#define DPCD_LANE_COUNT_SET 0x00101 +#define DPCD_TP_SET 0x00102 +#define DPCD_TRAINING_LANE0_SET 0x00103 +#define DPCD_TRAINING_LANE1_SET 0x00104 +#define DPCD_TRAINING_LANE2_SET 0x00105 +#define DPCD_TRAINING_LANE3_SET 0x00106 +#define DPCD_DOWNSPREAD_CTRL 0x00107 +#define DPCD_ML_CH_CODING_SET 0x00108 +#define DPCD_I2C_SPEED_CTL_SET 0x00109 +#define DPCD_EDP_CFG_SET 0x0010A +#define DPCD_LINK_QUAL_LANE0_SET 0x0010B +#define DPCD_LINK_QUAL_LANE1_SET 0x0010C +#define DPCD_LINK_QUAL_LANE2_SET 0x0010D +#define DPCD_LINK_QUAL_LANE3_SET 0x0010E +#define DPCD_TRAINING_LANE0_1_SET2 0x0010F +#define DPCD_TRAINING_LANE2_3_SET2 0x00110 +#define DPCD_MSTM_CTRL 0x00111 +#define DPCD_AUDIO_DELAY_7_0 0x00112 +#define DPCD_AUDIO_DELAY_15_8 0x00113 +#define DPCD_AUDIO_DELAY_23_6 0x00114 +#define DPCD_UPSTREAM_DEVICE_DP_PWR_NEED 0x00118 +#define DPCD_FAUX_MODE_CTRL 0x00120 +#define DPCD_FAUX_FORWARD_CH_DRIVE_SET 0x00121 +#define DPCD_BACK_CH_STATUS 0x00122 +#define DPCD_FAUX_BACK_CH_SYMBOL_ERROR_COUNT 0x00123 +#define DPCD_FAUX_BACK_CH_TRAINING_PATTERN_TIME 0x00125 +#define DPCD_TX_GTC_VALUE_7_0 0x00154 +#define DPCD_TX_GTC_VALUE_15_8 0x00155 +#define DPCD_TX_GTC_VALUE_23_16 0x00156 +#define DPCD_TX_GTC_VALUE_31_24 0x00157 +#define DPCD_RX_GTC_VALUE_PHASE_SKEW_EN 0x00158 +#define DPCD_TX_GTC_FREQ_LOCK_DONE 0x00159 +#define DPCD_ADAPTER_CTRL 0x001A0 +#define DPCD_BRANCH_DEVICE_CTRL 0x001A1 +#define DPCD_PAYLOAD_ALLOCATE_SET 0x001C0 +#define DPCD_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x001C1 +#define DPCD_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x001C2 + +/* link/sink status field */ +#define DPCD_SINK_COUNT 0x00200 +#define DPCD_DEVICE_SERVICE_IRQ 0x00201 +#define DPCD_STATUS_LANE_0_1 0x00202 +#define DPCD_STATUS_LANE_2_3 0x00203 +#define DPCD_LANE_ALIGN_STATUS_UPDATED 0x00204 +#define DPCD_SINK_STATUS 0x00205 +#define DPCD_ADJ_REQ_LANE_0_1 0x00206 +#define DPCD_ADJ_REQ_LANE_2_3 0x00207 +#define DPCD_TRAINING_SCORE_LANE_0 0x00208 +#define DPCD_TRAINING_SCORE_LANE_1 0x00209 +#define DPCD_TRAINING_SCORE_LANE_2 0x0020A +#define DPCD_TRAINING_SCORE_LANE_3 0x0020B +#define DPCD_ADJ_REQ_PC2 0x0020C +#define DPCD_FAUX_FORWARD_CH_SYMBOL_ERROR_COUNT 0x0020D +#define DPCD_SYMBOL_ERROR_COUNT_LANE_0 0x00210 +#define DPCD_SYMBOL_ERROR_COUNT_LANE_1 0x00212 +#define DPCD_SYMBOL_ERROR_COUNT_LANE_2 0x00214 +#define DPCD_SYMBOL_ERROR_COUNT_LANE_3 0x00216 + +/* automated testing sub-field */ +#define DPCD_FAUX_FORWARD_CH_STATUS 0x00280 +#define DPCD_FAUX_BACK_CH_DRIVE_SET 0x00281 +#define DPCD_FAUX_BACK_CH_SYM_ERR_COUNT_CTRL 0x00282 +#define DPCD_PAYLOAD_TABLE_UPDATE_STATUS 0x002C0 +#define DPCD_VC_PAYLOAD_ID_SLOT(slotnum) \ + (DPCD_PAYLOAD_TABLE_UPDATE_STATUS + slotnum) + +/* sink control field */ +#define DPCD_SET_POWER_DP_PWR_VOLTAGE 0x00600 + +/* sideband message buffers */ +#define DPCD_DOWN_REQ 0x01000 +#define DPCD_UP_REP 0x01200 +#define DPCD_DOWN_REP 0x01400 +#define DPCD_UP_REQ 0x01600 + +/* event status indicator field */ +#define DPCD_SINK_COUNT_ESI 0x02002 +#define DPCD_SINK_DEVICE_SERVICE_IRQ_VECTOR_ESI0 0x02003 +#define DPCD_SINK_DEVICE_SERVICE_IRQ_VECTOR_ESI1 0x02004 +#define DPCD_SINK_LINK_SERVICE_IRQ_VECTOR_ESI0 0x02005 +#define DPCD_SINK_LANE0_1_STATUS 0x0200C +#define DPCD_SINK_LANE2_3_STATUS 0x0200D +#define DPCD_SINK_ALIGN_STATUS_UPDATED_ESI 0x0200E +#define DPCD_SINK_STATUS_ESI 0x0200F + +/* + * field addresses and sizes. + */ +#define DPCD_RECEIVER_CAP_FIELD_START DPCD_REV +#define DPCD_RECEIVER_CAP_FIELD_SIZE 0x100 +#define DPCD_LINK_CFG_FIELD_START DPCD_LINK_BW_SET +#define DPCD_LINK_CFG_FIELD_SIZE 0x100 +#define DPCD_LINK_SINK_STATUS_FIELD_START DPCD_SINK_COUNT +#define DPCD_LINK_SINK_STATUS_FIELD_SIZE 0x17 +/* 0x00000: DPCD_REV */ +#define DPCD_REV_MNR_MASK 0x0F +#define DPCD_REV_MJR_MASK 0xF0 +#define DPCD_REV_MJR_SHIFT 4 +/* 0x00001: MAX_LINK_RATE */ +#define DPCD_MAX_LINK_RATE_162GBPS 0x06 +#define DPCD_MAX_LINK_RATE_270GBPS 0x0A +#define DPCD_MAX_LINK_RATE_540GBPS 0x14 +/* 0x00002: MAX_LANE_COUNT */ +#define DPCD_MAX_LANE_COUNT_MASK 0x1F +#define DPCD_MAX_LANE_COUNT_1 0x01 +#define DPCD_MAX_LANE_COUNT_2 0x02 +#define DPCD_MAX_LANE_COUNT_4 0x04 +#define DPCD_TPS3_SUPPORT_MASK 0x40 +#define DPCD_ENHANCED_FRAME_SUPPORT_MASK 0x80 +/* 0x00003: MAX_DOWNSPREAD */ +#define DPCD_MAX_DOWNSPREAD_MASK 0x01 +#define DPCD_NO_AUX_HANDSHAKE_LINK_TRAIN_MASK 0x40 +/* 0x00005: DOWNSP_PRESENT */ +#define DPCD_DOWNSP_PRESENT_MASK 0x01 +#define DPCD_DOWNSP_TYPE_MASK 0x06 +#define DPCD_DOWNSP_TYPE_SHIFT 1 +#define DPCD_DOWNSP_TYPE_DP 0x0 +#define DPCD_DOWNSP_TYPE_AVGA_ADVII 0x1 +#define DPCD_DOWNSP_TYPE_DVI_HDMI_DPPP 0x2 +#define DPCD_DOWNSP_TYPE_OTHERS 0x3 +#define DPCD_DOWNSP_FORMAT_CONV_MASK 0x08 +#define DPCD_DOWNSP_DCAP_INFO_AVAIL_MASK 0x10 +/* 0x00006, 0x00108: ML_CH_CODING_SUPPORT, ML_CH_CODING_SET */ +#define DPCD_ML_CH_CODING_MASK 0x01 +/* 0x00007: DOWNSP_COUNT_MSA_OUI */ +#define DPCD_DOWNSP_COUNT_MASK 0x0F +#define DPCD_MSA_TIMING_PAR_IGNORED_MASK 0x40 +#define DPCD_OUI_SUPPORT_MASK 0x80 +/* 0x00008, 0x0000A: RX_PORT[0-1]_CAP_0 */ +#define DPCD_RX_PORTX_CAP_0_LOCAL_EDID_PRESENT_MASK 0x02 +#define DPCD_RX_PORTX_CAP_0_ASSOC_TO_PRECEDING_PORT_MASK 0x04 +/* 0x0000C, 0x00109: I2C_SPEED_CTL_CAP, I2C_SPEED_CTL_SET */ +#define DPCD_I2C_SPEED_CTL_NONE 0x00 +#define DPCD_I2C_SPEED_CTL_1KBIPS 0x01 +#define DPCD_I2C_SPEED_CTL_5KBIPS 0x02 +#define DPCD_I2C_SPEED_CTL_10KBIPS 0x04 +#define DPCD_I2C_SPEED_CTL_100KBIPS 0x08 +#define DPCD_I2C_SPEED_CTL_400KBIPS 0x10 +#define DPCD_I2C_SPEED_CTL_1MBIPS 0x20 +/* 0x0000E: TRAIN_AUX_RD_INTERVAL */ +#define DPCD_TRAIN_AUX_RD_INT_100_400US 0x00 +#define DPCD_TRAIN_AUX_RD_INT_4MS 0x01 +#define DPCD_TRAIN_AUX_RD_INT_8MS 0x02 +#define DPCD_TRAIN_AUX_RD_INT_12MS 0x03 +#define DPCD_TRAIN_AUX_RD_INT_16MS 0x04 +/* 0x00020: DPCD_FAUX_CAP */ +#define DPCD_FAUX_CAP_MASK 0x01 +/* 0x00021: MSTM_CAP */ +#define DPCD_MST_CAP_MASK 0x01 +/* 0x00080, 0x00081|4, 0x00082|8, 0x00083|C: DOWNSP_X_(DET_)CAP */ +#define DPCD_DOWNSP_X_CAP_TYPE_MASK 0x07 +#define DPCD_DOWNSP_X_CAP_TYPE_DP 0x0 +#define DPCD_DOWNSP_X_CAP_TYPE_AVGA 0x1 +#define DPCD_DOWNSP_X_CAP_TYPE_DVI 0x2 +#define DPCD_DOWNSP_X_CAP_TYPE_HDMI 0x3 +#define DPCD_DOWNSP_X_CAP_TYPE_OTHERS 0x4 +#define DPCD_DOWNSP_X_CAP_TYPE_DPPP 0x5 +#define DPCD_DOWNSP_X_CAP_HPD_MASK 0x80 +#define DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_MASK 0xF0 +#define DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_SHIFT 4 +#define DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_720_480_I_60 0x1 +#define DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_720_480_I_50 0x2 +#define DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1920_1080_I_60 0x3 +#define DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1920_1080_I_50 0x4 +#define DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1280_720_P_60 0x5 +#define DPCD_DOWNSP_X_CAP_NON_EDID_ATTR_1280_720_P_50 0x7 +/* 0x00082, 0x00086, 0x0008A, 0x0008E: DOWNSP_X_(DET_)CAP2 */ +#define DPCD_DOWNSP_X_DCAP_MAX_BPC_MASK 0x03 +#define DPCD_DOWNSP_X_DCAP_MAX_BPC_8 0x0 +#define DPCD_DOWNSP_X_DCAP_MAX_BPC_10 0x1 +#define DPCD_DOWNSP_X_DCAP_MAX_BPC_12 0x2 +#define DPCD_DOWNSP_X_DCAP_MAX_BPC_16 0x3 +/* 0x00082, 0x00086, 0x0008A, 0x0008E: DOWNSP_X_(DET_)CAP2 */ +#define DPCD_DOWNSP_X_DCAP_HDMI_DPPP_FS2FP_MASK 0x01 +#define DPCD_DOWNSP_X_DCAP_DVI_DL_MASK 0x02 +#define DPCD_DOWNSP_X_DCAP_DVI_HCD_MASK 0x04 + +/* link configuration field masks, shifts, and register values */ +/* 0x00100: DPCD_LINK_BW_SET */ +#define DPCD_LINK_BW_SET_162GBPS 0x06 +#define DPCD_LINK_BW_SET_270GBPS 0x0A +#define DPCD_LINK_BW_SET_540GBPS 0x14 +/* 0x00101: LANE_COUNT_SET */ +#define DPCD_LANE_COUNT_SET_MASK 0x1F +#define DPCD_LANE_COUNT_SET_1 0x01 +#define DPCD_LANE_COUNT_SET_2 0x02 +#define DPCD_LANE_COUNT_SET_4 0x04 +#define DPCD_ENHANCED_FRAME_EN_MASK 0x80 +/* 0x00102: TP_SET */ +#define DPCD_TP_SEL_MASK 0x03 +#define DPCD_TP_SEL_OFF 0x0 +#define DPCD_TP_SEL_TP1 0x1 +#define DPCD_TP_SEL_TP2 0x2 +#define DPCD_TP_SEL_TP3 0x3 +#define DPCD_TP_SET_LQP_MASK 0x06 +#define DPCD_TP_SET_LQP_SHIFT 2 +#define DPCD_TP_SET_LQP_OFF 0x0 +#define DPCD_TP_SET_LQP_D102_TEST 0x1 +#define DPCD_TP_SET_LQP_SER_MES 0x2 +#define DPCD_TP_SET_LQP_PRBS7 0x3 +#define DPCD_TP_SET_REC_CLK_OUT_EN_MASK 0x10 +#define DPCD_TP_SET_SCRAMB_DIS_MASK 0x20 +#define DPCD_TP_SET_SE_COUNT_SEL_MASK 0xC0 +#define DPCD_TP_SET_SE_COUNT_SEL_SHIFT 6 +#define DPCD_TP_SET_SE_COUNT_SEL_DE_ISE 0x0 +#define DPCD_TP_SET_SE_COUNT_SEL_DE 0x1 +#define DPCD_TP_SET_SE_COUNT_SEL_ISE 0x2 +/* 0x00103-0x00106: TRAINING_LANE[0-3]_SET */ +#define DPCD_TRAINING_LANEX_SET_VS_MASK 0x03 +#define DPCD_TRAINING_LANEX_SET_MAX_VS_MASK 0x04 +#define DPCD_TRAINING_LANEX_SET_PE_MASK 0x18 +#define DPCD_TRAINING_LANEX_SET_PE_SHIFT 3 +#define DPCD_TRAINING_LANEX_SET_MAX_PE_MASK 0x20 +/* 0x00107: DOWNSPREAD_CTRL */ +#define DPCD_SPREAD_AMP_MASK 0x10 +#define DPCD_MSA_TIMING_PAR_IGNORED_EN_MASK 0x80 +/* 0x00108: ML_CH_CODING_SET - Same as 0x00006: ML_CH_CODING_SUPPORT */ +/* 0x00109: I2C_SPEED_CTL_SET - Same as 0x0000C: I2C_SPEED_CTL_CAP */ +/* 0x0010F-0x00110: TRAINING_LANE[0_1-2_3]_SET2 */ +#define DPCD_TRAINING_LANE_0_2_SET_PC2_MASK 0x03 +#define DPCD_TRAINING_LANE_0_2_SET_MAX_PC2_MASK 0x04 +#define DPCD_TRAINING_LANE_1_3_SET_PC2_MASK 0x30 +#define DPCD_TRAINING_LANE_1_3_SET_PC2_SHIFT 4 +#define DPCD_TRAINING_LANE_1_3_SET_MAX_PC2_MASK 0x40 +/* 0x00111: MSTM_CTRL */ +#define DPCD_MST_EN_MASK 0x01 +#define DPCD_UP_REQ_EN_MASK 0x02 +#define DPCD_UP_IS_SRC_MASK 0x03 + +/* link/sink status field masks, shifts, and register values */ +/* 0x00200: SINK_COUNT */ +#define DPCD_SINK_COUNT_LOW_MASK 0x3F +#define DPCD_SINK_CP_READY_MASK 0x40 +#define DPCD_SINK_COUNT_HIGH_MASK 0x80 +#define DPCD_SINK_COUNT_HIGH_LOW_SHIFT 1 +/* 0x00202: STATUS_LANE_0_1 */ +#define DPCD_STATUS_LANE_0_CR_DONE_MASK 0x01 +#define DPCD_STATUS_LANE_0_CE_DONE_MASK 0x02 +#define DPCD_STATUS_LANE_0_SL_DONE_MASK 0x04 +#define DPCD_STATUS_LANE_1_CR_DONE_MASK 0x10 +#define DPCD_STATUS_LANE_1_CE_DONE_MASK 0x20 +#define DPCD_STATUS_LANE_1_SL_DONE_MASK 0x40 +/* 0x00202: STATUS_LANE_2_3 */ +#define DPCD_STATUS_LANE_2_CR_DONE_MASK 0x01 +#define DPCD_STATUS_LANE_2_CE_DONE_MASK 0x02 +#define DPCD_STATUS_LANE_2_SL_DONE_MASK 0x04 +#define DPCD_STATUS_LANE_3_CR_DONE_MASK 0x10 +#define DPCD_STATUS_LANE_3_CE_DONE_MASK 0x20 +#define DPCD_STATUS_LANE_3_SL_DONE_MASK 0x40 +/* 0x00204: LANE_ALIGN_STATUS_UPDATED */ +#define DPCD_LANE_ALIGN_STATUS_UPDATED_IA_DONE_MASK \ + 0x01 +#define DPCD_LANE_ALIGN_STATUS_UPDATED_DOWNSP_STATUS_CHANGED_MASK \ + 0x40 +#define DPCD_LANE_ALIGN_STATUS_UPDATED_LINK_STATUS_UPDATED_MASK \ + 0x80 +/* 0x00205: SINK_STATUS */ +#define DPCD_SINK_STATUS_RX_PORT0_SYNC_STATUS_MASK 0x01 +#define DPCD_SINK_STATUS_RX_PORT1_SYNC_STATUS_MASK 0x02 + +/* 0x00206, 0x00207: ADJ_REQ_LANE_[0,2]_[1,3] */ +#define DPCD_ADJ_REQ_LANE_0_2_VS_MASK 0x03 +#define DPCD_ADJ_REQ_LANE_0_2_PE_MASK 0x0C +#define DPCD_ADJ_REQ_LANE_0_2_PE_SHIFT 2 +#define DPCD_ADJ_REQ_LANE_1_3_VS_MASK 0x30 +#define DPCD_ADJ_REQ_LANE_1_3_VS_SHIFT 4 +#define DPCD_ADJ_REQ_LANE_1_3_PE_MASK 0xC0 +#define DPCD_ADJ_REQ_LANE_1_3_PE_SHIFT 6 +/* 0x0020C: ADJ_REQ_PC2 */ +#define DPCD_ADJ_REQ_PC2_LANE_0_MASK 0x03 +#define DPCD_ADJ_REQ_PC2_LANE_1_MASK 0x0C +#define DPCD_ADJ_REQ_PC2_LANE_1_SHIFT 2 +#define DPCD_ADJ_REQ_PC2_LANE_2_MASK 0x30 +#define DPCD_ADJ_REQ_PC2_LANE_2_SHIFT 4 +#define DPCD_ADJ_REQ_PC2_LANE_3_MASK 0xC0 +#define DPCD_ADJ_REQ_PC2_LANE_3_SHIFT 6 + +#endif /* __GDSYS_LOGICORE_DP_DPCD_H__ */ diff --git a/drivers/video/logicore_dp_tx.c b/drivers/video/logicore_dp_tx.c new file mode 100644 index 0000000000..84fafe4341 --- /dev/null +++ b/drivers/video/logicore_dp_tx.c @@ -0,0 +1,2296 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * logicore_dp_tx.c + * + * Driver for XILINX LogiCore DisplayPort v6.1 TX (Source) + * based on Xilinx dp_v3_1 driver sources, updated to dp_v4_0 + * + * (C) Copyright 2016 + * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc + */ + +#include <common.h> +#include <clk.h> +#include <display.h> +#include <dm.h> +#include <errno.h> + +#include "axi.h" +#include "logicore_dp_dpcd.h" +#include "logicore_dp_tx.h" +#include "logicore_dp_tx_regif.h" + +/* Default AXI clock frequency value */ +#define S_AXI_CLK_DEFAULT 100000000 + +/* Default DP phy clock value */ +#define PHY_CLOCK_SELECT_DEFAULT PHY_CLOCK_SELECT_540GBPS + +/* The maximum voltage swing level is 3 */ +#define MAXIMUM_VS_LEVEL 3 +/* The maximum pre-emphasis level is 3 */ +#define MAXIMUM_PE_LEVEL 3 + +/* Error out if an AUX request yields a defer reply more than 50 times */ +#define AUX_MAX_DEFER_COUNT 50 +/* Error out if an AUX request times out more than 50 times awaiting a reply */ +#define AUX_MAX_TIMEOUT_COUNT 50 +/* Error out if checking for a connected device times out more than 50 times */ +#define IS_CONNECTED_MAX_TIMEOUT_COUNT 50 + +/** + * enum link_training_states - States for link training state machine + * @TS_CLOCK_RECOVERY: State for clock recovery + * @TS_CHANNEL_EQUALIZATION: State for channel equalization + * @TS_ADJUST_LINK_RATE: State where link rate is reduced in reaction to + * failed link training + * @TS_ADJUST_LANE_COUNT: State where lane count is reduced in reaction to + * failed link training + * @TS_FAILURE: State of link training failure + * @TS_SUCCESS:: State for successfully completed link training + */ +enum link_training_states { + TS_CLOCK_RECOVERY, + TS_CHANNEL_EQUALIZATION, + TS_ADJUST_LINK_RATE, + TS_ADJUST_LANE_COUNT, + TS_FAILURE, + TS_SUCCESS +}; + +/** + * struct aux_transaction - Description of an AUX channel transaction + * @cmd_code: Command code of the transaction + * @num_bytes: The number of bytes in the transaction's payload data + * @address: The DPCD address of the transaction + * @data: Payload data of the AUX channel transaction + */ +struct aux_transaction { + u16 cmd_code; + u8 num_bytes; + u32 address; + u8 *data; +}; + +/** + * struct main_stream_attributes - Main stream attributes + * @pixel_clock_hz: Pixel clock of the stream (in Hz) + * @misc_0: Miscellaneous stream attributes 0 as specified + * by the DisplayPort 1.2 specification + * @misc_1: Miscellaneous stream attributes 1 as specified + * by the DisplayPort 1.2 specification + * @n_vid: N value for the video stream + * @m_vid: M value used to recover the video clock from the + * link clock + * @user_pixel_width: Width of the user data input port + * @data_per_lane: Used to translate the number of pixels per line + * to the native internal 16-bit datapath + * @avg_bytes_per_tu: Average number of bytes per transfer unit, + * scaled up by a factor of 1000 + * @transfer_unit_size: Size of the transfer unit in the framing logic + * In MST mode, this is also the number of time + * slots that are alloted in the payload ID table + * @init_wait: Number of initial wait cycles at the start of a + * new line by the framing logic + * @bits_per_color: Bits per color component + * @component_format: The component format currently in use by the + * video stream + * @dynamic_range: The dynamic range currently in use by the video + * stream + * @y_cb_cr_colorimetry: The YCbCr colorimetry currently in use by the + * video stream + * @synchronous_clock_mode: Synchronous clock mode is currently in use by + * the video stream + * @override_user_pixel_width: If set to 1, the value stored for + * user_pixel_width will be used as the pixel width + * @h_start: Horizontal blank start (pixels) + * @h_active: Horizontal active resolution (pixels) + * @h_sync_width: Horizontal sync width (pixels) + * @h_total: Horizontal total (pixels) + * @h_sync_polarity: Horizontal sync polarity (0=neg|1=pos) + * @v_start: Vertical blank start (in lines) + * @v_active: Vertical active resolution (lines) + * @v_sync_width: Vertical sync width (lines) + * @v_total: Vertical total (lines) + * @v_sync_polarity: Vertical sync polarity (0=neg|1=pos) + * + * All porch parameters have been removed, because our videodata is + * hstart/vstart based, and there is no benefit in keeping the porches + */ +struct main_stream_attributes { + u32 pixel_clock_hz; + u32 misc_0; + u32 misc_1; + u32 n_vid; + //u32 m_vid; + u32 user_pixel_width; + u32 data_per_lane; + u32 avg_bytes_per_tu; + u32 transfer_unit_size; + u32 init_wait; + u32 bits_per_color; + u8 component_format; + u8 dynamic_range; + u8 y_cb_cr_colorimetry; + u8 synchronous_clock_mode; + u8 override_user_pixel_width; + u32 h_start; + u16 h_active; + u16 h_sync_width; + u16 h_total; + bool h_sync_polarity; + u32 v_start; + u16 v_active; + u16 v_sync_width; + u16 v_total; + bool v_sync_polarity; +}; + +/** + * struct link_config - Description of link configuration + * @lane_count: Currently selected lane count for this link + * @link_rate: Currently selected link rate for this link + * @scrambler_en: Flag to determine whether the scrambler is + * enabled for this link + * @enhanced_framing_mode: Flag to determine whether enhanced framing + * mode is active for this link + * @max_lane_count: Maximum lane count for this link + * @max_link_rate: Maximum link rate for this link + * @support_enhanced_framing_mode: Flag to indicate whether the link supports + * enhanced framing mode + * @vs_level: Voltage swing for each lane + * @pe_level: Pre-emphasis/cursor level for each lane + */ +struct link_config { + u8 lane_count; + u8 link_rate; + bool scrambler_en; + bool enhanced_framing_mode; + u8 max_lane_count; + u8 max_link_rate; + bool support_enhanced_framing_mode; + u8 vs_level; + u8 pe_level; +}; + +/** + * struct dp_tx - Private data structure of LogiCore DP TX devices + * + * @base: Address of register base of device + * @s_axi_clk: The AXI clock frequency in Hz + * @train_adaptive: Use adaptive link trainig (i.e. successively reduce + * link rate and/or lane count) for this device + * @max_link_rate: Maximum link rate for this device + * @max_lane_count: Maximum lane count for this device + * @dpcd_rx_caps: RX device's status registers, see below + * @lane_status_ajd_reqs: Lane status and adjustment requests information for + * this device + * @link_config: The link configuration for this device + * @main_stream_attributes: MSA set for this device + * + * dpcd_rx_caps is a raw read of the RX device's status registers. The first 4 + * bytes correspond to the lane status associated with clock recovery, channel + * equalization, symbol lock, and interlane alignment. The remaining 2 bytes + * represent the pre-emphasis and voltage swing level adjustments requested by + * the RX device. + */ +struct dp_tx { + u32 base; + u32 s_axi_clk; + bool train_adaptive; + u8 max_link_rate; + u8 max_lane_count; + u8 dpcd_rx_caps[16]; + u8 lane_status_ajd_reqs[6]; + struct link_config link_config; + struct main_stream_attributes main_stream_attributes; +}; + +/* + * Internal API + */ + +/** + * get_reg() - Read a register of a LogiCore DP TX device + * @dev: The LogiCore DP TX device in question + * @reg: The offset of the register to read + * + * Return: The read register value + */ +static u32 get_reg(struct udevice *dev, u32 reg) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u32 value = 0; + int res; + + /* TODO(mario.six@gdsys.cc): error handling */ + res = axi_read(dev->parent, dp_tx->base + reg, &value, AXI_SIZE_32); + if (res < 0) + printf("%s() failed; res = %d\n", __func__, res); + + return value; +} + +/** + * set_reg() - Write a register of a LogiCore DP TX device + * @dev: The LogiCore DP TX device in question + * @reg: The offset of the register to write + * @value: The value to write to the register + */ +static void set_reg(struct udevice *dev, u32 reg, u32 value) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + + axi_write(dev->parent, dp_tx->base + reg, &value, AXI_SIZE_32); +} + +/** + * is_connected() - Check if there is a connected RX device + * @dev: The LogiCore DP TX device in question + * + * The Xilinx original calls msleep_interruptible at least once, ignoring + * status. + * + * Return: true if a connected RX device was detected, false otherwise + */ +static bool is_connected(struct udevice *dev) +{ + u8 retries = 0; + + do { + int status = get_reg(dev, REG_INTERRUPT_SIG_STATE) & + INTERRUPT_SIG_STATE_HPD_STATE_MASK; + if (status) + return true; + + udelay(1000); + } while (retries++ < IS_CONNECTED_MAX_TIMEOUT_COUNT); + + return false; +} + +/** + * wait_phy_ready() - Wait for the DisplayPort PHY to come out of reset + * @dev: The LogiCore DP TX device in question + * @mask: Bit mask specifying which bit in the status register should be waited + * for + * + * Return: 0 if wait succeeded, -ve if error occurred + */ +static int wait_phy_ready(struct udevice *dev, u32 mask) +{ + u16 timeout = 20000; + u32 phy_status; + + /* Wait until the PHY is ready. */ + do { + phy_status = get_reg(dev, REG_PHY_STATUS) & mask; + + /* Protect against an infinite loop. */ + if (!timeout--) + return -ETIMEDOUT; + + udelay(20); + } while (phy_status != mask); + + return 0; +} + +/* AUX channel access */ + +/** + * aux_wait_ready() - Wait until another request is no longer in progress + * @dev: The LogiCore DP TX device in question + * + * Return: 0 if wait succeeded, -ve if error occurred + */ +static int aux_wait_ready(struct udevice *dev) +{ + int status; + u32 timeout = 100; + + /* Wait until the DisplayPort TX core is ready. */ + do { + status = get_reg(dev, REG_INTERRUPT_SIG_STATE); + + /* Protect against an infinite loop. */ + if (!timeout--) + return -ETIMEDOUT; + udelay(20); + } while (status & REPLY_STATUS_REPLY_IN_PROGRESS_MASK); + + return 0; +} + +/** + * aux_wait_reply() - Wait for reply on AUX channel + * @dev: The LogiCore DP TX device in question + * + * Wait for a reply indicating that the most recent AUX request + * has been received by the RX device. + * + * Return: 0 if wait succeeded, -ve if error occurred + */ +static int aux_wait_reply(struct udevice *dev) +{ + u32 timeout = 100; + + while (timeout > 0) { + int status = get_reg(dev, REG_REPLY_STATUS); + + /* Check for error. */ + if (status & REPLY_STATUS_REPLY_ERROR_MASK) + return -ETIMEDOUT; + + /* Check for a reply. */ + if ((status & REPLY_STATUS_REPLY_RECEIVED_MASK) && + !(status & + REPLY_STATUS_REQUEST_IN_PROGRESS_MASK) && + !(status & + REPLY_STATUS_REPLY_IN_PROGRESS_MASK)) { + return 0; + } + + timeout--; + udelay(20); + } + + return -ETIMEDOUT; +} + +/** + * aux_request_send() - Send request on the AUX channel + * @dev: The LogiCore DP TX device in question + * @request: The request to send + * + * Submit the supplied AUX request to the RX device over the AUX + * channel by writing the command, the destination address, (the write buffer + * for write commands), and the data size to the DisplayPort TX core. + * + * This is the lower-level sending routine, which is called by aux_request(). + * + * Return: 0 if request was sent successfully, -ve on error + */ +static int aux_request_send(struct udevice *dev, + struct aux_transaction *request) +{ + u32 timeout_count; + int status; + u8 index; + + /* Ensure that any pending AUX transactions have completed. */ + timeout_count = 0; + do { + status = get_reg(dev, REG_REPLY_STATUS); + + udelay(20); + timeout_count++; + if (timeout_count >= AUX_MAX_TIMEOUT_COUNT) + return -ETIMEDOUT; + } while ((status & REPLY_STATUS_REQUEST_IN_PROGRESS_MASK) || + (status & REPLY_STATUS_REPLY_IN_PROGRESS_MASK)); + + set_reg(dev, REG_AUX_ADDRESS, request->address); + + if (request->cmd_code == AUX_CMD_WRITE || + request->cmd_code == AUX_CMD_I2C_WRITE || + request->cmd_code == AUX_CMD_I2C_WRITE_MOT) { + /* Feed write data into the DisplayPort TX core's write FIFO. */ + for (index = 0; index < request->num_bytes; index++) { + set_reg(dev, + REG_AUX_WRITE_FIFO, request->data[index]); + } + } + + /* Submit the command and the data size. */ + set_reg(dev, REG_AUX_CMD, + ((request->cmd_code << AUX_CMD_SHIFT) | + ((request->num_bytes - 1) & + AUX_CMD_NBYTES_TRANSFER_MASK))); + + /* Check for a reply from the RX device to the submitted request. */ + status = aux_wait_reply(dev); + if (status) + /* Waiting for a reply timed out. */ + return -ETIMEDOUT; + + /* Analyze the reply. */ + status = get_reg(dev, REG_AUX_REPLY_CODE); + if (status == AUX_REPLY_CODE_DEFER || + status == AUX_REPLY_CODE_I2C_DEFER) { + /* The request was deferred. */ + return -EAGAIN; + } else if ((status == AUX_REPLY_CODE_NACK) || + (status == AUX_REPLY_CODE_I2C_NACK)) { + /* The request was not acknowledged. */ + return -EIO; + } + + /* The request was acknowledged. */ + + if (request->cmd_code == AUX_CMD_READ || + request->cmd_code == AUX_CMD_I2C_READ || + request->cmd_code == AUX_CMD_I2C_READ_MOT) { + /* Wait until all data has been received. */ + timeout_count = 0; + do { + status = get_reg(dev, REG_REPLY_DATA_COUNT); + + udelay(100); + timeout_count++; + if (timeout_count >= AUX_MAX_TIMEOUT_COUNT) + return -ETIMEDOUT; + } while (status != request->num_bytes); + + /* Obtain the read data from the reply FIFO. */ + for (index = 0; index < request->num_bytes; index++) + request->data[index] = get_reg(dev, REG_AUX_REPLY_DATA); + } + + return 0; +} + +/** + * aux_request() - Submit request on the AUX channel + * @dev: The LogiCore DP TX device in question + * @request: The request to submit + * + * Submit the supplied AUX request to the RX device over the AUX + * channel. If waiting for a reply times out, or if the DisplayPort TX core + * indicates that the request was deferred, the request is sent again (up to a + * maximum specified by AUX_MAX_DEFER_COUNT|AUX_MAX_TIMEOUT_COUNT). + * + * Return: 0 if request was submitted successfully, -ve on error + */ +static int aux_request(struct udevice *dev, struct aux_transaction *request) +{ + u32 defer_count = 0; + u32 timeout_count = 0; + + while ((defer_count < AUX_MAX_DEFER_COUNT) && + (timeout_count < AUX_MAX_TIMEOUT_COUNT)) { + int status = aux_wait_ready(dev); + + if (status) { + /* The RX device isn't ready yet. */ + timeout_count++; + continue; + } + + status = aux_request_send(dev, request); + if (status == -EAGAIN) { + /* The request was deferred. */ + defer_count++; + } else if (status == -ETIMEDOUT) { + /* Waiting for a reply timed out. */ + timeout_count++; + } else { + /* + * -EIO indicates that the request was NACK'ed, + * 0 indicates that the request was ACK'ed. + */ + return status; + } + + udelay(100); + } + + /* The request was not successfully received by the RX device. */ + return -ETIMEDOUT; +} + +/** + * aux_common() - Common (read/write) AUX communication transmission + * @dev: The LogiCore DP TX device in question + * @cmd_type: Command code of the transaction + * @address: The DPCD address of the transaction + * @num_bytes: Number of bytes in the payload data + * @data: The payload data of the AUX command + * + * Common sequence of submitting an AUX command for AUX read, AUX write, + * I2C-over-AUX read, and I2C-over-AUX write transactions. If required, the + * reads and writes are split into multiple requests, each acting on a maximum + * of 16 bytes. + * + * Return: 0 if OK, -ve on error + */ +static int aux_common(struct udevice *dev, u32 cmd_type, u32 address, + u32 num_bytes, u8 *data) +{ + struct aux_transaction request; + u32 bytes_left; + + /* + * Set the start address for AUX transactions. For I2C transactions, + * this is the address of the I2C bus. + */ + request.address = address; + + bytes_left = num_bytes; + while (bytes_left) { + int status; + + request.cmd_code = cmd_type; + + if (cmd_type == AUX_CMD_READ || + cmd_type == AUX_CMD_WRITE) { + /* Increment address for normal AUX transactions. */ + request.address = address + (num_bytes - bytes_left); + } + + /* Increment the pointer to the supplied data buffer. */ + request.data = &data[num_bytes - bytes_left]; + + request.num_bytes = (bytes_left > 16) ? 16 : bytes_left; + bytes_left -= request.num_bytes; + + if (cmd_type == AUX_CMD_I2C_READ && bytes_left) { + /* + * Middle of a transaction I2C read request. Override + * the command code that was set to cmd_type. + */ + request.cmd_code = AUX_CMD_I2C_READ_MOT; + } else if ((cmd_type == AUX_CMD_I2C_WRITE) && bytes_left) { + /* + * Middle of a transaction I2C write request. Override + * the command code that was set to cmd_type. + */ + request.cmd_code = AUX_CMD_I2C_WRITE_MOT; + } + + status = aux_request(dev, &request); + if (status) + return status; + } + + return 0; +} + +/** + * aux_read() - Issue AUX read request + * @dev: The LogiCore DP TX device in question + * @dpcd_address: The DPCD address to read from + * @bytes_to_read: Number of bytes to read + * @read_data: Buffer to receive the read data + * + * Issue a read request over the AUX channel that will read from the RX + * device's DisplayPort Configuration data (DPCD) address space. The read + * message will be divided into multiple transactions which read a maximum of + * 16 bytes each. + * + * Return: 0 if read operation was successful, -ve on error + */ +static int aux_read(struct udevice *dev, u32 dpcd_address, u32 bytes_to_read, + void *read_data) +{ + int status; + + if (!is_connected(dev)) + return -ENODEV; + + /* Send AUX read transaction. */ + status = aux_common(dev, AUX_CMD_READ, dpcd_address, + bytes_to_read, (u8 *)read_data); + + return status; +} + +/** + * aux_write() - Issue AUX write request + * @dev: The LogiCore DP TX device in question + * @dpcd_address: The DPCD address to write to + * @bytes_to_write: Number of bytes to write + * @write_data: Buffer containig data to be written + * + * Issue a write request over the AUX channel that will write to + * the RX device's DisplayPort Configuration data (DPCD) address space. The + * write message will be divided into multiple transactions which write a + * maximum of 16 bytes each. + * + * Return: 0 if write operation was successful, -ve on error + */ +static int aux_write(struct udevice *dev, u32 dpcd_address, u32 bytes_to_write, + void *write_data) +{ + int status; + + if (!is_connected(dev)) + return -ENODEV; + + /* Send AUX write transaction. */ + status = aux_common(dev, AUX_CMD_WRITE, dpcd_address, + bytes_to_write, (u8 *)write_data); + + return status; +} + +/* Core initialization */ + +/** + * initialize() - Initialize a LogiCore DP TX device + * @dev: The LogiCore DP TX device in question + * + * Return: Always 0 + */ +static int initialize(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u32 val; + u32 phy_config; + unsigned int k; + + /* place the PHY (and GTTXRESET) into reset. */ + phy_config = get_reg(dev, REG_PHY_CONFIG); + set_reg(dev, REG_PHY_CONFIG, phy_config | PHY_CONFIG_GT_ALL_RESET_MASK); + + /* reset the video streams and AUX logic. */ + set_reg(dev, REG_SOFT_RESET, + SOFT_RESET_VIDEO_STREAM_ALL_MASK | + SOFT_RESET_AUX_MASK); + + /* disable the DisplayPort TX core. */ + set_reg(dev, REG_ENABLE, 0); + + /* set the clock divider. */ + val = get_reg(dev, REG_AUX_CLK_DIVIDER); + val &= ~AUX_CLK_DIVIDER_VAL_MASK; + val |= dp_tx->s_axi_clk / 1000000; + set_reg(dev, REG_AUX_CLK_DIVIDER, val); + + /* set the DisplayPort TX core's clock speed. */ + set_reg(dev, REG_PHY_CLOCK_SELECT, PHY_CLOCK_SELECT_DEFAULT); + + /* bring the PHY (and GTTXRESET) out of reset. */ + set_reg(dev, REG_PHY_CONFIG, + phy_config & ~PHY_CONFIG_GT_ALL_RESET_MASK); + + /* enable the DisplayPort TX core. */ + set_reg(dev, REG_ENABLE, 1); + + /* Unmask Hot-Plug-Detect (HPD) interrupts. */ + set_reg(dev, REG_INTERRUPT_MASK, + ~INTERRUPT_MASK_HPD_PULSE_DETECTED_MASK & + ~INTERRUPT_MASK_HPD_EVENT_MASK & + ~INTERRUPT_MASK_HPD_IRQ_MASK); + + for (k = 0; k < 4; k++) { + /* Disable pre-cursor levels. */ + set_reg(dev, REG_PHY_PRECURSOR_LANE_0 + 4 * k, 0); + + /* Write default voltage swing levels to the TX registers. */ + set_reg(dev, REG_PHY_VOLTAGE_DIFF_LANE_0 + 4 * k, 0); + + /* Write default pre-emphasis levels to the TX registers. */ + set_reg(dev, REG_PHY_POSTCURSOR_LANE_0 + 4 * k, 0); + } + + return 0; +} + +/** + * is_link_rate_valid() - Check if given link rate is valif for device + * @dev: The LogiCore DP TX device in question + * @link_rate: The link rate to be checked for validity + * + * Return: true if he supplied link rate is valid, false otherwise + */ +static bool is_link_rate_valid(struct udevice *dev, u8 link_rate) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + bool valid = true; + + if (link_rate != LINK_BW_SET_162GBPS && + link_rate != LINK_BW_SET_270GBPS && + link_rate != LINK_BW_SET_540GBPS) + valid = false; + else if (link_rate > dp_tx->link_config.max_link_rate) + valid = false; + + return valid; +} + +/** + * is_lane_count_valid() - Check if given lane count is valif for device + * @dev: The LogiCore DP TX device in question + * @lane_count: The lane count to be checked for validity + * + * Return: true if he supplied lane count is valid, false otherwise + */ +static bool is_lane_count_valid(struct udevice *dev, u8 lane_count) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + bool valid = true; + + if (lane_count != LANE_COUNT_SET_1 && + lane_count != LANE_COUNT_SET_2 && + lane_count != LANE_COUNT_SET_4) + valid = false; + else if (lane_count > dp_tx->link_config.max_lane_count) + valid = false; + + return valid; +} + +/** + * get_rx_capabilities() - Check if capabilities of RX device are valid for TX + * device + * @dev: The LogiCore DP TX device in question + * + * Return: 0 if the capabilities of the RX device are valid for the TX device, + * -ve if not, of an error occurred during capability determination + */ +static int get_rx_capabilities(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + u8 rx_max_link_rate; + u8 rx_max_lane_count; + + if (!is_connected(dev)) + return -ENODEV; + + status = aux_read(dev, DPCD_RECEIVER_CAP_FIELD_START, 16, + dp_tx->dpcd_rx_caps); + if (status) + return -EIO; + + rx_max_link_rate = dp_tx->dpcd_rx_caps[DPCD_MAX_LINK_RATE]; + rx_max_lane_count = dp_tx->dpcd_rx_caps[DPCD_MAX_LANE_COUNT] & + DPCD_MAX_LANE_COUNT_MASK; + + dp_tx->link_config.max_link_rate = + (rx_max_link_rate > dp_tx->max_link_rate) ? + dp_tx->max_link_rate : rx_max_link_rate; + if (!is_link_rate_valid(dev, rx_max_link_rate)) + return -EINVAL; + + dp_tx->link_config.max_lane_count = + (rx_max_lane_count > dp_tx->max_lane_count) ? + dp_tx->max_lane_count : rx_max_lane_count; + if (!is_lane_count_valid(dev, rx_max_lane_count)) + return -EINVAL; + + dp_tx->link_config.support_enhanced_framing_mode = + dp_tx->dpcd_rx_caps[DPCD_MAX_LANE_COUNT] & + DPCD_ENHANCED_FRAME_SUPPORT_MASK; + + return 0; +} + +/** + * enable_main_link() - Switch on main link for a device + * @dev: The LogiCore DP TX device in question + */ +static void enable_main_link(struct udevice *dev) +{ + /* reset the scrambler. */ + set_reg(dev, REG_FORCE_SCRAMBLER_RESET, 0x1); + + /* enable the main stream. */ + set_reg(dev, REG_ENABLE_MAIN_STREAM, 0x1); +} + +/** + * disable_main_link() - Switch off main link for a device + * @dev: The LogiCore DP TX device in question + */ +static void disable_main_link(struct udevice *dev) +{ + /* reset the scrambler. */ + set_reg(dev, REG_FORCE_SCRAMBLER_RESET, 0x1); + + /* Disable the main stream. */ + set_reg(dev, REG_ENABLE_MAIN_STREAM, 0x0); +} + +/** + * reset_dp_phy() - Reset a device + * @dev: The LogiCore DP TX device in question + * @reset: Bit mask determining which bits in the device's config register + * should be set for the reset + */ +static void reset_dp_phy(struct udevice *dev, u32 reset) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u32 val; + + set_reg(dev, REG_ENABLE, 0x0); + + val = get_reg(dev, REG_PHY_CONFIG); + + /* Apply reset. */ + set_reg(dev, REG_PHY_CONFIG, val | reset); + + /* Remove reset. */ + set_reg(dev, REG_PHY_CONFIG, val); + + /* Wait for the PHY to be ready. */ + wait_phy_ready(dev, phy_status_lanes_ready_mask(dp_tx->max_lane_count)); + + set_reg(dev, REG_ENABLE, 0x1); +} + +/** + * set_enhanced_frame_mode() - Enable/Disable enhanced frame mode + * @dev: The LogiCore DP TX device in question + * @enable: Flag to determine whether to enable (1) or disable (0) the enhanced + * frame mode + * + * Enable or disable the enhanced framing symbol sequence for + * both the DisplayPort TX core and the RX device. + * + * Return: 0 if enabling/disabling the enhanced frame mode was successful, -ve + * on error + */ +static int set_enhanced_frame_mode(struct udevice *dev, u8 enable) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + u8 val; + + if (!is_connected(dev)) + return -ENODEV; + + if (dp_tx->link_config.support_enhanced_framing_mode) + dp_tx->link_config.enhanced_framing_mode = enable; + else + dp_tx->link_config.enhanced_framing_mode = false; + + /* Write enhanced frame mode enable to the DisplayPort TX core. */ + set_reg(dev, REG_ENHANCED_FRAME_EN, + dp_tx->link_config.enhanced_framing_mode); + + /* Write enhanced frame mode enable to the RX device. */ + status = aux_read(dev, DPCD_LANE_COUNT_SET, 0x1, &val); + if (status) + return -EIO; + + if (dp_tx->link_config.enhanced_framing_mode) + val |= DPCD_ENHANCED_FRAME_EN_MASK; + else + val &= ~DPCD_ENHANCED_FRAME_EN_MASK; + + status = aux_write(dev, DPCD_LANE_COUNT_SET, 0x1, &val); + if (status) + return -EIO; + + return 0; +} + +/** + * set_lane_count() - Set the lane count + * @dev: The LogiCore DP TX device in question + * @lane_count: Lane count to set + * + * Set the number of lanes to be used by the main link for both + * the DisplayPort TX core and the RX device. + * + * Return: 0 if setting the lane count was successful, -ve on error + */ +static int set_lane_count(struct udevice *dev, u8 lane_count) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + u8 val; + + if (!is_connected(dev)) + return -ENODEV; + + printf(" set lane count to %u\n", lane_count); + + dp_tx->link_config.lane_count = lane_count; + + /* Write the new lane count to the DisplayPort TX core. */ + set_reg(dev, REG_LANE_COUNT_SET, dp_tx->link_config.lane_count); + + /* Write the new lane count to the RX device. */ + status = aux_read(dev, DPCD_LANE_COUNT_SET, 0x1, &val); + if (status) + return -EIO; + val &= ~DPCD_LANE_COUNT_SET_MASK; + val |= dp_tx->link_config.lane_count; + + status = aux_write(dev, DPCD_LANE_COUNT_SET, 0x1, &val); + if (status) + return -EIO; + + return 0; +} + +/** + * set_clk_speed() - Set DP phy clock speed + * @dev: The LogiCore DP TX device in question + * @speed: The clock frquency to set (one of PHY_CLOCK_SELECT_*) + * + * Set the clock frequency for the DisplayPort PHY corresponding to a desired + * data rate. + * + * Return: 0 if setting the DP phy clock speed was successful, -ve on error + */ +static int set_clk_speed(struct udevice *dev, u32 speed) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + u32 val; + u32 mask; + + /* Disable the DisplayPort TX core first. */ + val = get_reg(dev, REG_ENABLE); + set_reg(dev, REG_ENABLE, 0x0); + + /* Change speed of the feedback clock. */ + set_reg(dev, REG_PHY_CLOCK_SELECT, speed); + + /* Re-enable the DisplayPort TX core if it was previously enabled. */ + if (val) + set_reg(dev, REG_ENABLE, 0x1); + + /* Wait until the PHY is ready. */ + mask = phy_status_lanes_ready_mask(dp_tx->max_lane_count); + status = wait_phy_ready(dev, mask); + if (status) + return -EIO; + + return 0; +} + +/** + * set_link_rate() - Set the link rate + * @dev: The LogiCore DP TX device in question + * @link_rate: The link rate to set (one of LINK_BW_SET_*) + * + * Set the data rate to be used by the main link for both the DisplayPort TX + * core and the RX device. + * + * Return: 0 if setting the link rate was successful, -ve on error + */ +static int set_link_rate(struct udevice *dev, u8 link_rate) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + + /* Write a corresponding clock frequency to the DisplayPort TX core. */ + switch (link_rate) { + case LINK_BW_SET_162GBPS: + printf(" set link rate to 1.62 Gb/s\n"); + status = set_clk_speed(dev, PHY_CLOCK_SELECT_162GBPS); + break; + case LINK_BW_SET_270GBPS: + printf(" set link rate to 2.70 Gb/s\n"); + status = set_clk_speed(dev, PHY_CLOCK_SELECT_270GBPS); + break; + case LINK_BW_SET_540GBPS: + printf(" set link rate to 5.40 Gb/s\n"); + status = set_clk_speed(dev, PHY_CLOCK_SELECT_540GBPS); + break; + default: + return -EINVAL; + } + if (status) + return -EIO; + + dp_tx->link_config.link_rate = link_rate; + + /* Write new link rate to the DisplayPort TX core. */ + set_reg(dev, REG_LINK_BW_SET, dp_tx->link_config.link_rate); + + /* Write new link rate to the RX device. */ + status = aux_write(dev, DPCD_LINK_BW_SET, 1, + &dp_tx->link_config.link_rate); + if (status) + return -EIO; + + return 0; +} + +/* Link training */ + +/** + * get_training_delay() - Get training delay + * @dev: The LogiCore DP TX device in question + * @training_state: The training state for which the required training delay + * should be queried + * + * Determine what the RX device's required training delay is for + * link training. + * + * Return: The training delay in us + */ +static int get_training_delay(struct udevice *dev, int training_state) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u16 delay; + + switch (dp_tx->dpcd_rx_caps[DPCD_TRAIN_AUX_RD_INTERVAL]) { + case DPCD_TRAIN_AUX_RD_INT_100_400US: + if (training_state == TS_CLOCK_RECOVERY) + /* delay for the clock recovery phase. */ + delay = 100; + else + /* delay for the channel equalization phase. */ + delay = 400; + break; + case DPCD_TRAIN_AUX_RD_INT_4MS: + delay = 4000; + break; + case DPCD_TRAIN_AUX_RD_INT_8MS: + delay = 8000; + break; + case DPCD_TRAIN_AUX_RD_INT_12MS: + delay = 12000; + break; + case DPCD_TRAIN_AUX_RD_INT_16MS: + delay = 16000; + break; + default: + /* Default to 20 ms. */ + delay = 20000; + break; + } + + return delay; +} + +/** + * set_vswing_preemp() - Build AUX data to set voltage swing and pre-emphasis + * @dev: The LogiCore DP TX device in question + * @aux_data: Buffer to receive the built AUX data + * + * Build AUX data to set current voltage swing and pre-emphasis level settings; + * the necessary data is taken from the link_config structure. + */ +static void set_vswing_preemp(struct udevice *dev, u8 *aux_data) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u8 data; + u8 vs_level_rx = dp_tx->link_config.vs_level; + u8 pe_level_rx = dp_tx->link_config.pe_level; + + /* Set up the data buffer for writing to the RX device. */ + data = (pe_level_rx << DPCD_TRAINING_LANEX_SET_PE_SHIFT) | vs_level_rx; + /* The maximum voltage swing has been reached. */ + if (vs_level_rx == MAXIMUM_VS_LEVEL) + data |= DPCD_TRAINING_LANEX_SET_MAX_VS_MASK; + + /* The maximum pre-emphasis level has been reached. */ + if (pe_level_rx == MAXIMUM_PE_LEVEL) + data |= DPCD_TRAINING_LANEX_SET_MAX_PE_MASK; + memset(aux_data, data, 4); +} + +/** + * adj_vswing_preemp() - Adjust voltage swing and pre-emphasis + * @dev: The LogiCore DP TX device in question + * + * Set new voltage swing and pre-emphasis levels using the + * adjustment requests obtained from the RX device. + * + * Return: 0 if voltage swing and pre-emphasis could be adjusted successfully, + * -ve on error + */ +static int adj_vswing_preemp(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + u8 index; + u8 vs_level_adj_req[4]; + u8 pe_level_adj_req[4]; + u8 aux_data[4]; + u8 *ajd_reqs = &dp_tx->lane_status_ajd_reqs[4]; + + /* + * Analyze the adjustment requests for changes in voltage swing and + * pre-emphasis levels. + */ + vs_level_adj_req[0] = ajd_reqs[0] & DPCD_ADJ_REQ_LANE_0_2_VS_MASK; + vs_level_adj_req[1] = (ajd_reqs[0] & DPCD_ADJ_REQ_LANE_1_3_VS_MASK) >> + DPCD_ADJ_REQ_LANE_1_3_VS_SHIFT; + vs_level_adj_req[2] = ajd_reqs[1] & DPCD_ADJ_REQ_LANE_0_2_VS_MASK; + vs_level_adj_req[3] = (ajd_reqs[1] & DPCD_ADJ_REQ_LANE_1_3_VS_MASK) >> + DPCD_ADJ_REQ_LANE_1_3_VS_SHIFT; + pe_level_adj_req[0] = (ajd_reqs[0] & DPCD_ADJ_REQ_LANE_0_2_PE_MASK) >> + DPCD_ADJ_REQ_LANE_0_2_PE_SHIFT; + pe_level_adj_req[1] = (ajd_reqs[0] & DPCD_ADJ_REQ_LANE_1_3_PE_MASK) >> + DPCD_ADJ_REQ_LANE_1_3_PE_SHIFT; + pe_level_adj_req[2] = (ajd_reqs[1] & DPCD_ADJ_REQ_LANE_0_2_PE_MASK) >> + DPCD_ADJ_REQ_LANE_0_2_PE_SHIFT; + pe_level_adj_req[3] = (ajd_reqs[1] & DPCD_ADJ_REQ_LANE_1_3_PE_MASK) >> + DPCD_ADJ_REQ_LANE_1_3_PE_SHIFT; + + /* + * Change the drive settings to match the adjustment requests. Use the + * greatest level requested. + */ + dp_tx->link_config.vs_level = 0; + dp_tx->link_config.pe_level = 0; + for (index = 0; index < dp_tx->link_config.lane_count; index++) { + if (vs_level_adj_req[index] > dp_tx->link_config.vs_level) + dp_tx->link_config.vs_level = vs_level_adj_req[index]; + if (pe_level_adj_req[index] > dp_tx->link_config.pe_level) + dp_tx->link_config.pe_level = pe_level_adj_req[index]; + } + + /* + * Verify that the voltage swing and pre-emphasis combination is + * allowed. Some combinations will result in a differential peak-to-peak + * voltage that is outside the permissible range. See the VESA + * DisplayPort v1.2 Specification, section 3.1.5.2. + * The valid combinations are: + * PE=0 PE=1 PE=2 PE=3 + * VS=0 valid valid valid valid + * VS=1 valid valid valid + * VS=2 valid valid + * VS=3 valid + * + * NOTE: + * Xilinix dp_v3_1 driver seems to have an off by one error when + * limiting pe_level which is fixed here. + */ + if (dp_tx->link_config.pe_level > (3 - dp_tx->link_config.vs_level)) + dp_tx->link_config.pe_level = 3 - dp_tx->link_config.vs_level; + + /* + * Make the adjustments to both the DisplayPort TX core and the RX + * device. + */ + set_vswing_preemp(dev, aux_data); + /* + * Write the voltage swing and pre-emphasis levels for each lane to the + * RX device. + */ + status = aux_write(dev, DPCD_TRAINING_LANE0_SET, 4, aux_data); + if (status) + return -EIO; + + return 0; +} + +/** + * get_lane_status_adj_reqs() - Read lane status and adjustment requests + * information from the device + * @dev: The LogiCore DP TX device in question + * + * Do a burst AUX read from the RX device over the AUX channel. The contents of + * the status registers will be stored for later use by check_clock_recovery, + * check_channel_equalization, and adj_vswing_preemp. + * + * Return: 0 if the status information were read successfully, -ve on error + */ +static int get_lane_status_adj_reqs(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + + /* + * Read and store 4 bytes of lane status and 2 bytes of adjustment + * requests. + */ + status = aux_read(dev, DPCD_STATUS_LANE_0_1, 6, + dp_tx->lane_status_ajd_reqs); + if (status) + return -EIO; + + return 0; +} + +/** + * check_clock_recovery() - Check clock recovery success + * @dev: The LogiCore DP TX device in question + * @lane_count: The number of lanes for which to check clock recovery success + * + * Check if the RX device's DisplayPort Configuration data (DPCD) indicates + * that the clock recovery sequence during link training was successful - the + * RX device's link clock and data recovery unit has realized and maintained + * the frequency lock for all lanes currently in use. + * + * Return: 0 if clock recovery was successful on all lanes in question, -ve if + * not + */ +static int check_clock_recovery(struct udevice *dev, u8 lane_count) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u8 *lane_status = dp_tx->lane_status_ajd_reqs; + + /* Check that all LANEx_CR_DONE bits are set. */ + switch (lane_count) { + case LANE_COUNT_SET_4: + if (!(lane_status[1] & DPCD_STATUS_LANE_3_CR_DONE_MASK)) + goto out_fail; + if (!(lane_status[1] & DPCD_STATUS_LANE_2_CR_DONE_MASK)) + goto out_fail; + /* Drop through and check lane 1. */ + case LANE_COUNT_SET_2: + if (!(lane_status[0] & DPCD_STATUS_LANE_1_CR_DONE_MASK)) + goto out_fail; + /* Drop through and check lane 0. */ + case LANE_COUNT_SET_1: + if (!(lane_status[0] & DPCD_STATUS_LANE_0_CR_DONE_MASK)) + goto out_fail; + default: + /* All (lane_count) lanes have achieved clock recovery. */ + break; + } + + return 0; + +out_fail: + return -EIO; +} + +/** + * check_channel_equalization() - Check channel equalization success + * @dev: The LogiCore DP TX device in question + * @lane_count: The number of lanes for which to check channel equalization + * success + * + * Check if the RX device's DisplayPort Configuration data (DPCD) indicates + * that the channel equalization sequence during link training was successful - + * the RX device has achieved channel equalization, symbol lock, and interlane + * alignment for all lanes currently in use. + * + * Return: 0 if channel equalization was successful on all lanes in question, + * -ve if not + */ +static int check_channel_equalization(struct udevice *dev, u8 lane_count) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u8 *lane_status = dp_tx->lane_status_ajd_reqs; + + /* Check that all LANEx_CHANNEL_EQ_DONE bits are set. */ + switch (lane_count) { + case LANE_COUNT_SET_4: + if (!(lane_status[1] & DPCD_STATUS_LANE_3_CE_DONE_MASK)) + goto out_fail; + if (!(lane_status[1] & DPCD_STATUS_LANE_2_CE_DONE_MASK)) + goto out_fail; + /* Drop through and check lane 1. */ + case LANE_COUNT_SET_2: + if (!(lane_status[0] & DPCD_STATUS_LANE_1_CE_DONE_MASK)) + goto out_fail; + /* Drop through and check lane 0. */ + case LANE_COUNT_SET_1: + if (!(lane_status[0] & DPCD_STATUS_LANE_0_CE_DONE_MASK)) + goto out_fail; + default: + /* All (lane_count) lanes have achieved channel equalization. */ + break; + } + + /* Check that all LANEx_SYMBOL_LOCKED bits are set. */ + switch (lane_count) { + case LANE_COUNT_SET_4: + if (!(lane_status[1] & DPCD_STATUS_LANE_3_SL_DONE_MASK)) + goto out_fail; + if (!(lane_status[1] & DPCD_STATUS_LANE_2_SL_DONE_MASK)) + goto out_fail; + /* Drop through and check lane 1. */ + case LANE_COUNT_SET_2: + if (!(lane_status[0] & DPCD_STATUS_LANE_1_SL_DONE_MASK)) + goto out_fail; + /* Drop through and check lane 0. */ + case LANE_COUNT_SET_1: + if (!(lane_status[0] & DPCD_STATUS_LANE_0_SL_DONE_MASK)) + goto out_fail; + default: + /* All (lane_count) lanes have achieved symbol lock. */ + break; + } + + /* Check that interlane alignment is done. */ + if (!(lane_status[2] & DPCD_LANE_ALIGN_STATUS_UPDATED_IA_DONE_MASK)) + goto out_fail; + + return 0; + +out_fail: + return -EIO; +} + +/** + * set_training_pattern() - Set training pattern for link training + * @dev: The LogiCore DP TX device in question + * @pattern: The training pattern to set + * + * Set the training pattern to be used during link training for both the + * DisplayPort TX core and the RX device. + * + * Return: 0 if the training pattern could be set successfully, -ve if not + */ +static int set_training_pattern(struct udevice *dev, u32 pattern) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + u8 aux_data[5]; + + /* Write to the DisplayPort TX core. */ + set_reg(dev, REG_TRAINING_PATTERN_SET, pattern); + + aux_data[0] = pattern; + + /* Write scrambler disable to the DisplayPort TX core. */ + switch (pattern) { + case TRAINING_PATTERN_SET_OFF: + set_reg(dev, REG_SCRAMBLING_DISABLE, 0); + dp_tx->link_config.scrambler_en = 1; + break; + case TRAINING_PATTERN_SET_TP1: + case TRAINING_PATTERN_SET_TP2: + case TRAINING_PATTERN_SET_TP3: + aux_data[0] |= DPCD_TP_SET_SCRAMB_DIS_MASK; + set_reg(dev, REG_SCRAMBLING_DISABLE, 1); + dp_tx->link_config.scrambler_en = 0; + break; + default: + break; + } + + /* + * Make the adjustments to both the DisplayPort TX core and the RX + * device. + */ + set_vswing_preemp(dev, &aux_data[1]); + /* + * Write the voltage swing and pre-emphasis levels for each lane to the + * RX device. + */ + if (pattern == TRAINING_PATTERN_SET_OFF) + status = aux_write(dev, DPCD_TP_SET, 1, aux_data); + else + status = aux_write(dev, DPCD_TP_SET, 5, aux_data); + if (status) + return -EIO; + + return 0; +} + +/** + * training_state_clock_recovery() - Run clock recovery part of link training + * @dev: The LogiCore DP TX device in question + * + * Run the clock recovery sequence as part of link training. The + * sequence is as follows: + * + * 0) Start signaling at the minimum voltage swing, pre-emphasis, and + * post- cursor levels. + * 1) Transmit training pattern 1 over the main link with symbol + * scrambling disabled. + * 2) The clock recovery loop. If clock recovery is unsuccessful after + * MaxIterations loop iterations, return. + * 2a) Wait for at least the period of time specified in the RX device's + * DisplayPort Configuration data (DPCD) register, + * TRAINING_AUX_RD_INTERVAL. + * 2b) Check if all lanes have achieved clock recovery lock. If so, + * return. + * 2c) Check if the same voltage swing level has been used 5 consecutive + * times or if the maximum level has been reached. If so, return. + * 2d) Adjust the voltage swing, pre-emphasis, and post-cursor levels as + * requested by the RX device. + * 2e) Loop back to 2a. + * + * For a more detailed description of the clock recovery sequence, see section + * 3.5.1.2.1 of the DisplayPort 1.2a specification document. + * + * Return: The next state machine state to advance to + */ +static unsigned int training_state_clock_recovery(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + u32 delay_us; + u8 prev_vs_level = 0; + u8 same_vs_level_count = 0; + + /* + * Obtain the required delay for clock recovery as specified by the + * RX device. + */ + delay_us = get_training_delay(dev, TS_CLOCK_RECOVERY); + + /* Start CRLock. */ + + /* Transmit training pattern 1. */ + /* Disable the scrambler. */ + /* Start from minimal voltage swing and pre-emphasis levels. */ + dp_tx->link_config.vs_level = 0; + dp_tx->link_config.pe_level = 0; + status = set_training_pattern(dev, TRAINING_PATTERN_SET_TP1); + if (status) + return TS_FAILURE; + + while (1) { + /* Wait delay specified in TRAINING_AUX_RD_INTERVAL. */ + udelay(delay_us); + + /* Get lane and adjustment requests. */ + status = get_lane_status_adj_reqs(dev); + if (status) + return TS_FAILURE; + + /* + * Check if all lanes have realized and maintained the frequency + * lock and get adjustment requests. + */ + status = check_clock_recovery(dev, + dp_tx->link_config.lane_count); + if (!status) + return TS_CHANNEL_EQUALIZATION; + + /* + * Check if the same voltage swing for each lane has been used 5 + * consecutive times. + */ + if (prev_vs_level == dp_tx->link_config.vs_level) { + same_vs_level_count++; + } else { + same_vs_level_count = 0; + prev_vs_level = dp_tx->link_config.vs_level; + } + if (same_vs_level_count >= 5) + break; + + /* Only try maximum voltage swing once. */ + if (dp_tx->link_config.vs_level == MAXIMUM_VS_LEVEL) + break; + + /* Adjust the drive settings as requested by the RX device. */ + status = adj_vswing_preemp(dev); + if (status) + /* The AUX write failed. */ + return TS_FAILURE; + } + + return TS_ADJUST_LINK_RATE; +} + +/** + * training_state_channel_equalization() - Run channel equalization part of + * link training + * @dev: The LogiCore DP TX device in question + * + * Run the channel equalization sequence as part of link + * training. The sequence is as follows: + * + * 0) Start signaling with the same drive settings used at the end of the + * clock recovery sequence. + * 1) Transmit training pattern 2 (or 3) over the main link with symbol + * scrambling disabled. + * 2) The channel equalization loop. If channel equalization is + * unsuccessful after 5 loop iterations, return. + * 2a) Wait for at least the period of time specified in the RX device's + * DisplayPort Configuration data (DPCD) register, + * TRAINING_AUX_RD_INTERVAL. + * 2b) Check if all lanes have achieved channel equalization, symbol lock, + * and interlane alignment. If so, return. + * 2c) Check if the same voltage swing level has been used 5 consecutive + * times or if the maximum level has been reached. If so, return. + * 2d) Adjust the voltage swing, pre-emphasis, and post-cursor levels as + * requested by the RX device. + * 2e) Loop back to 2a. + * + * For a more detailed description of the channel equalization sequence, see + * section 3.5.1.2.2 of the DisplayPort 1.2a specification document. + * + * Return: The next state machine state to advance to + */ +static int training_state_channel_equalization(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + u32 delay_us; + u32 iteration_count = 0; + + /* + * Obtain the required delay for channel equalization as specified by + * the RX device. + */ + delay_us = get_training_delay(dev, TS_CHANNEL_EQUALIZATION); + + /* Start channel equalization. */ + + /* Write the current drive settings. */ + /* Transmit training pattern 2/3. */ + if (dp_tx->dpcd_rx_caps[DPCD_MAX_LANE_COUNT] & DPCD_TPS3_SUPPORT_MASK) + status = set_training_pattern(dev, TRAINING_PATTERN_SET_TP3); + else + status = set_training_pattern(dev, TRAINING_PATTERN_SET_TP2); + + if (status) + return TS_FAILURE; + + while (iteration_count < 5) { + /* Wait delay specified in TRAINING_AUX_RD_INTERVAL. */ + udelay(delay_us); + + /* Get lane and adjustment requests. */ + status = get_lane_status_adj_reqs(dev); + if (status) + /* The AUX read failed. */ + return TS_FAILURE; + + /* Check that all lanes still have their clocks locked. */ + status = check_clock_recovery(dev, + dp_tx->link_config.lane_count); + if (status) + break; + + /* + * Check if all lanes have accomplished channel equalization, + * symbol lock, and interlane alignment. + */ + status = + check_channel_equalization(dev, + dp_tx->link_config.lane_count); + if (!status) + return TS_SUCCESS; + + /* Adjust the drive settings as requested by the RX device. */ + status = adj_vswing_preemp(dev); + if (status) + /* The AUX write failed. */ + return TS_FAILURE; + + iteration_count++; + } + + /* + * Tried 5 times with no success. Try a reduced bitrate first, then + * reduce the number of lanes. + */ + return TS_ADJUST_LINK_RATE; +} + +/** + * training_state_adjust_link_rate() - Downshift data rate and/or lane count + * @dev: The LogiCore DP TX device in question + * + * This function is reached if either the clock recovery or the channel + * equalization process failed during training. As a result, the data rate will + * be downshifted, and training will be re-attempted (starting with clock + * recovery) at the reduced data rate. If the data rate is already at 1.62 + * Gbps, a downshift in lane count will be attempted. + * + * Return: The next state machine state to advance to + */ +static int training_state_adjust_link_rate(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + + switch (dp_tx->link_config.link_rate) { + case LINK_BW_SET_540GBPS: + status = set_link_rate(dev, LINK_BW_SET_270GBPS); + if (status) { + status = TS_FAILURE; + break; + } + status = TS_CLOCK_RECOVERY; + break; + case LINK_BW_SET_270GBPS: + status = set_link_rate(dev, LINK_BW_SET_162GBPS); + if (status) { + status = TS_FAILURE; + break; + } + status = TS_CLOCK_RECOVERY; + break; + default: + /* + * Already at the lowest link rate. Try reducing the lane + * count next. + */ + status = TS_ADJUST_LANE_COUNT; + break; + } + + return status; +} + +/** + * trainig_state_adjust_lane_count - Downshift lane count + * @dev: The LogiCore DP TX device in question + * + * This function is reached if either the clock recovery or the channel + * equalization process failed during training, and a minimal data rate of 1.62 + * Gbps was being used. As a result, the number of lanes in use will be + * reduced, and training will be re-attempted (starting with clock recovery) at + * this lower lane count. + * + * Return: The next state machine state to advance to + */ +static int trainig_state_adjust_lane_count(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + + switch (dp_tx->link_config.lane_count) { + case LANE_COUNT_SET_4: + status = set_lane_count(dev, LANE_COUNT_SET_2); + if (status) { + status = TS_FAILURE; + break; + } + + status = set_link_rate(dev, dp_tx->link_config.max_link_rate); + if (status) { + status = TS_FAILURE; + break; + } + status = TS_CLOCK_RECOVERY; + break; + case LANE_COUNT_SET_2: + status = set_lane_count(dev, LANE_COUNT_SET_1); + if (status) { + status = TS_FAILURE; + break; + } + + status = set_link_rate(dev, dp_tx->link_config.max_link_rate); + if (status) { + status = TS_FAILURE; + break; + } + status = TS_CLOCK_RECOVERY; + break; + default: + /* + * Already at the lowest lane count. Training has failed at the + * lowest lane count and link rate. + */ + status = TS_FAILURE; + break; + } + + return status; +} + +/** + * check_link_status() - Check status of link + * @dev: The LogiCore DP TX device in question + * @lane_count: The lane count to use for the check + * + * Check if the receiver's DisplayPort Configuration data (DPCD) indicates the + * receiver has achieved and maintained clock recovery, channel equalization, + * symbol lock, and interlane alignment for all lanes currently in use. + * + * Return: 0 if the link status is OK, -ve if a error occurred during checking + */ +static int check_link_status(struct udevice *dev, u8 lane_count) +{ + u8 retry_count = 0; + + if (!is_connected(dev)) + return -ENODEV; + + /* Retrieve AUX info. */ + do { + int status; + + /* Get lane and adjustment requests. */ + status = get_lane_status_adj_reqs(dev); + if (status) + return -EIO; + + /* Check if the link needs training. */ + if ((check_clock_recovery(dev, lane_count) == 0) && + (check_channel_equalization(dev, lane_count) == 0)) + return 0; + + retry_count++; + } while (retry_count < 5); /* Retry up to 5 times. */ + + return -EIO; +} + +/** + * run_training() - Run link training + * @dev: The LogiCore DP TX device in question + * + * Run the link training process. It is implemented as a state machine, with + * each state returning the next state. First, the clock recovery sequence will + * be run; if successful, the channel equalization sequence will run. If either + * the clock recovery or channel equalization sequence failed, the link rate or + * the number of lanes used will be reduced and training will be re-attempted. + * If training fails at the minimal data rate, 1.62 Gbps with a single lane, + * training will no longer re-attempt and fail. + * + * ### Here be dragons ### + * There are undocumented timeout constraints in the link training process. In + * DP v1.2a spec, Chapter 3.5.1.2.2 a 10ms limit for the complete training + * process is mentioned. Which individual timeouts are derived and implemented + * by sink manufacturers is unknown. So each step should be as short as + * possible and link training should start as soon as possible after HPD. + * + * Return: 0 if the training sequence ran successfully, -ve if a error occurred + * or the training failed + */ +static int run_training(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + int training_state = TS_CLOCK_RECOVERY; + + while (1) { + switch (training_state) { + case TS_CLOCK_RECOVERY: + training_state = + training_state_clock_recovery(dev); + break; + case TS_CHANNEL_EQUALIZATION: + training_state = + training_state_channel_equalization(dev); + break; + case TS_ADJUST_LINK_RATE: + training_state = + training_state_adjust_link_rate(dev); + break; + case TS_ADJUST_LANE_COUNT: + training_state = + trainig_state_adjust_lane_count(dev); + break; + default: + break; + } + + if (training_state == TS_SUCCESS) + break; + else if (training_state == TS_FAILURE) + return -EIO; + + if (training_state == TS_ADJUST_LINK_RATE || + training_state == TS_ADJUST_LANE_COUNT) { + if (!dp_tx->train_adaptive) + return -EIO; + + status = set_training_pattern(dev, + TRAINING_PATTERN_SET_OFF); + if (status) + return -EIO; + } + } + + /* Final status check. */ + status = check_link_status(dev, dp_tx->link_config.lane_count); + if (status) + return -EIO; + + return 0; +} + +/* Link policy maker */ + +/** + * cfg_main_link_max() - Determine best common capabilities + * @dev: The LogiCore DP TX device in question + * + * Determine the common capabilities between the DisplayPort TX core and the RX + * device. + * + * Return: 0 if the determination succeeded, -ve on error + */ +static int cfg_main_link_max(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + + if (!is_connected(dev)) + return -ENODEV; + + /* + * Configure the main link to the maximum common link rate between the + * DisplayPort TX core and the RX device. + */ + status = set_link_rate(dev, dp_tx->link_config.max_link_rate); + if (status) + return status; + + /* + * Configure the main link to the maximum common lane count between the + * DisplayPort TX core and the RX device. + */ + status = set_lane_count(dev, dp_tx->link_config.max_lane_count); + if (status) + return status; + + return 0; +} + +/** + * establish_link() - Establish a link + * @dev: The LogiCore DP TX device in question + * + * Check if the link needs training and run the training sequence if training + * is required. + * + * Return: 0 if the link was established successfully, -ve on error + */ +static int establish_link(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int status; + int status2; + u32 mask; + + reset_dp_phy(dev, PHY_CONFIG_PHY_RESET_MASK); + + /* Disable main link during training. */ + disable_main_link(dev); + + /* Wait for the PHY to be ready. */ + mask = phy_status_lanes_ready_mask(dp_tx->max_lane_count); + status = wait_phy_ready(dev, mask); + if (status) + return -EIO; + + /* Train main link. */ + status = run_training(dev); + + /* Turn off the training pattern and enable scrambler. */ + status2 = set_training_pattern(dev, TRAINING_PATTERN_SET_OFF); + if (status || status2) + return -EIO; + + return 0; +} + +/* + * Stream policy maker + */ + +/** + * cfg_msa_recalculate() - Calculate MSA parameters + * @dev: The LogiCore DP TX device in question + * + * Calculate the following Main Stream Attributes (MSA): + * - Transfer unit size + * - User pixel width + * - Horizontal total clock + * - Vertical total clock + * - misc_0 + * - misc_1 + * - Data per lane + * - Average number of bytes per transfer unit + * - Number of initial wait cycles + * + * These values are derived from: + * - Bits per color + * - Horizontal resolution + * - Vertical resolution + * - Horizontal blank start + * - Vertical blank start + * - Pixel clock (in KHz) + * - Horizontal sync polarity + * - Vertical sync polarity + * - Horizontal sync pulse width + * - Vertical sync pulse width + */ +static void cfg_msa_recalculate(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u32 video_bw; + u32 link_bw; + u32 words_per_line; + u8 bits_per_pixel; + struct main_stream_attributes *msa_config; + struct link_config *link_config; + + msa_config = &dp_tx->main_stream_attributes; + link_config = &dp_tx->link_config; + + /* + * Set the user pixel width to handle clocks that exceed the + * capabilities of the DisplayPort TX core. + */ + if (msa_config->override_user_pixel_width == 0) { + if (msa_config->pixel_clock_hz > 300000000 && + link_config->lane_count == LANE_COUNT_SET_4) { + msa_config->user_pixel_width = 4; + } /* + * Xilinx driver used 75 MHz as a limit here, 150 MHZ should + * be more sane + */ + else if ((msa_config->pixel_clock_hz > 150000000) && + (link_config->lane_count != LANE_COUNT_SET_1)) { + msa_config->user_pixel_width = 2; + } else { + msa_config->user_pixel_width = 1; + } + } + + /* Compute the rest of the MSA values. */ + msa_config->n_vid = 27 * 1000 * link_config->link_rate; + + /* Miscellaneous attributes. */ + if (msa_config->bits_per_color == 6) + msa_config->misc_0 = MAIN_STREAMX_MISC0_BDC_6BPC; + else if (msa_config->bits_per_color == 8) + msa_config->misc_0 = MAIN_STREAMX_MISC0_BDC_8BPC; + else if (msa_config->bits_per_color == 10) + msa_config->misc_0 = MAIN_STREAMX_MISC0_BDC_10BPC; + else if (msa_config->bits_per_color == 12) + msa_config->misc_0 = MAIN_STREAMX_MISC0_BDC_12BPC; + else if (msa_config->bits_per_color == 16) + msa_config->misc_0 = MAIN_STREAMX_MISC0_BDC_16BPC; + + msa_config->misc_0 = (msa_config->misc_0 << + MAIN_STREAMX_MISC0_BDC_SHIFT) | + (msa_config->y_cb_cr_colorimetry << + MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_SHIFT) | + (msa_config->dynamic_range << + MAIN_STREAMX_MISC0_DYNAMIC_RANGE_SHIFT) | + (msa_config->component_format << + MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT) | + (msa_config->synchronous_clock_mode); + + msa_config->misc_1 = 0; + + /* + * Determine the number of bits per pixel for the specified color + * component format. + */ + if (msa_config->component_format == + MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR422) + /* YCbCr422 color component format. */ + bits_per_pixel = msa_config->bits_per_color * 2; + else + /* RGB or YCbCr 4:4:4 color component format. */ + bits_per_pixel = msa_config->bits_per_color * 3; + + /* Calculate the data per lane. */ + words_per_line = (msa_config->h_active * bits_per_pixel); + if (words_per_line % 16) + words_per_line += 16; + words_per_line /= 16; + + msa_config->data_per_lane = words_per_line - link_config->lane_count; + if (words_per_line % link_config->lane_count) + msa_config->data_per_lane += (words_per_line % + link_config->lane_count); + + /* + * Allocate a fixed size for single-stream transport (SST) + * operation. + */ + msa_config->transfer_unit_size = 64; + + /* + * Calculate the average number of bytes per transfer unit. + * Note: Both the integer and the fractional part is stored in + * avg_bytes_per_tu. + */ + video_bw = ((msa_config->pixel_clock_hz / 1000) * bits_per_pixel) / 8; + link_bw = (link_config->lane_count * link_config->link_rate * 27); + msa_config->avg_bytes_per_tu = (video_bw * + msa_config->transfer_unit_size) / + link_bw; + + /* + * The number of initial wait cycles at the start of a new line + * by the framing logic. This allows enough data to be buffered + * in the input FIFO before video is sent. + */ + if ((msa_config->avg_bytes_per_tu / 1000) <= 4) + msa_config->init_wait = 64; + else + msa_config->init_wait = msa_config->transfer_unit_size - + (msa_config->avg_bytes_per_tu / 1000); +} + +/** + * set_line_reset() - Enable/Disable end-of-line-reset + * @dev: The LogiCore DP TX device in question + * + * Disable/enable the end-of-line-reset to the internal video pipe in case of + * reduced blanking as required. + */ +static void set_line_reset(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + u32 reg_val; + u16 h_blank; + u16 h_reduced_blank; + struct main_stream_attributes *msa_config = + &dp_tx->main_stream_attributes; + + h_blank = msa_config->h_total - msa_config->h_active; + /* Reduced blanking starts at ceil(0.2 * HTotal). */ + h_reduced_blank = 2 * msa_config->h_total; + if (h_reduced_blank % 10) + h_reduced_blank += 10; + h_reduced_blank /= 10; + + /* CVT spec. states h_blank is either 80 or 160 for reduced blanking. */ + reg_val = get_reg(dev, REG_LINE_RESET_DISABLE); + if (h_blank < h_reduced_blank && + (h_blank == 80 || h_blank == 160)) { + reg_val |= LINE_RESET_DISABLE_MASK; + } else { + reg_val &= ~LINE_RESET_DISABLE_MASK; + } + set_reg(dev, REG_LINE_RESET_DISABLE, reg_val); +} + +/** + * clear_msa_values() - Clear MSA values + * @dev: The LogiCore DP TX device in question + * + * Clear the main stream attributes registers of the DisplayPort TX core. + */ +static void clear_msa_values(struct udevice *dev) +{ + set_reg(dev, REG_MAIN_STREAM_HTOTAL, 0); + set_reg(dev, REG_MAIN_STREAM_VTOTAL, 0); + set_reg(dev, REG_MAIN_STREAM_POLARITY, 0); + set_reg(dev, REG_MAIN_STREAM_HSWIDTH, 0); + set_reg(dev, REG_MAIN_STREAM_VSWIDTH, 0); + set_reg(dev, REG_MAIN_STREAM_HRES, 0); + set_reg(dev, REG_MAIN_STREAM_VRES, 0); + set_reg(dev, REG_MAIN_STREAM_HSTART, 0); + set_reg(dev, REG_MAIN_STREAM_VSTART, 0); + set_reg(dev, REG_MAIN_STREAM_MISC0, 0); + set_reg(dev, REG_MAIN_STREAM_MISC1, 0); + set_reg(dev, REG_USER_PIXEL_WIDTH, 0); + set_reg(dev, REG_USER_DATA_COUNT_PER_LANE, 0); + set_reg(dev, REG_M_VID, 0); + set_reg(dev, REG_N_VID, 0); + + set_reg(dev, REG_STREAM1, 0); + set_reg(dev, REG_TU_SIZE, 0); + set_reg(dev, REG_MIN_BYTES_PER_TU, 0); + set_reg(dev, REG_FRAC_BYTES_PER_TU, 0); + set_reg(dev, REG_INIT_WAIT, 0); +} + +/** + * set_msa_values() - Set MSA values + * @dev: The LogiCore DP TX device in question + * + * Set the main stream attributes registers of the DisplayPort TX + * core with the values specified in the main stream attributes configuration + * structure. + */ +static void set_msa_values(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + struct main_stream_attributes *msa_config = + &dp_tx->main_stream_attributes; + + printf(" set MSA %u x %u\n", msa_config->h_active, + msa_config->v_active); + + set_reg(dev, REG_MAIN_STREAM_HTOTAL, msa_config->h_total); + set_reg(dev, REG_MAIN_STREAM_VTOTAL, msa_config->v_total); + set_reg(dev, REG_MAIN_STREAM_POLARITY, + msa_config->h_sync_polarity | + (msa_config->v_sync_polarity << + MAIN_STREAMX_POLARITY_VSYNC_POL_SHIFT)); + set_reg(dev, REG_MAIN_STREAM_HSWIDTH, msa_config->h_sync_width); + set_reg(dev, REG_MAIN_STREAM_VSWIDTH, msa_config->v_sync_width); + set_reg(dev, REG_MAIN_STREAM_HRES, msa_config->h_active); + set_reg(dev, REG_MAIN_STREAM_VRES, msa_config->v_active); + set_reg(dev, REG_MAIN_STREAM_HSTART, msa_config->h_start); + set_reg(dev, REG_MAIN_STREAM_VSTART, msa_config->v_start); + set_reg(dev, REG_MAIN_STREAM_MISC0, msa_config->misc_0); + set_reg(dev, REG_MAIN_STREAM_MISC1, msa_config->misc_1); + set_reg(dev, REG_USER_PIXEL_WIDTH, msa_config->user_pixel_width); + + set_reg(dev, REG_M_VID, msa_config->pixel_clock_hz / 1000); + set_reg(dev, REG_N_VID, msa_config->n_vid); + set_reg(dev, REG_USER_DATA_COUNT_PER_LANE, msa_config->data_per_lane); + + set_line_reset(dev); + + set_reg(dev, REG_TU_SIZE, msa_config->transfer_unit_size); + set_reg(dev, REG_MIN_BYTES_PER_TU, msa_config->avg_bytes_per_tu / 1000); + set_reg(dev, REG_FRAC_BYTES_PER_TU, + (msa_config->avg_bytes_per_tu % 1000) * 1024 / 1000); + set_reg(dev, REG_INIT_WAIT, msa_config->init_wait); +} + +/* + * external API + */ + +/** + * logicore_dp_tx_set_msa() - Set given MSA values on device + * @dev: The LogiCore DP TX device in question + * @msa: The MSA values to set for the device + */ +static void logicore_dp_tx_set_msa(struct udevice *dev, + struct logicore_dp_tx_msa *msa) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + + memset(&dp_tx->main_stream_attributes, 0, + sizeof(struct main_stream_attributes)); + + dp_tx->main_stream_attributes.pixel_clock_hz = msa->pixel_clock_hz; + dp_tx->main_stream_attributes.bits_per_color = msa->bits_per_color; + dp_tx->main_stream_attributes.h_active = msa->h_active; + dp_tx->main_stream_attributes.h_start = msa->h_start; + dp_tx->main_stream_attributes.h_sync_polarity = msa->h_sync_polarity; + dp_tx->main_stream_attributes.h_sync_width = msa->h_sync_width; + dp_tx->main_stream_attributes.h_total = msa->h_total; + dp_tx->main_stream_attributes.v_active = msa->v_active; + dp_tx->main_stream_attributes.v_start = msa->v_start; + dp_tx->main_stream_attributes.v_sync_polarity = msa->v_sync_polarity; + dp_tx->main_stream_attributes.v_sync_width = msa->v_sync_width; + dp_tx->main_stream_attributes.v_total = msa->v_total; + dp_tx->main_stream_attributes.override_user_pixel_width = + msa->override_user_pixel_width; + dp_tx->main_stream_attributes.user_pixel_width = msa->user_pixel_width; + dp_tx->main_stream_attributes.synchronous_clock_mode = 0; +} + +/** + * logicore_dp_tx_video_enable() - Enable video output + * @dev: The LogiCore DP TX device in question + * @msa: The MSA values to set for the device + * + * Return: 0 if the video was enabled successfully, -ve on error + */ +static int logicore_dp_tx_video_enable(struct udevice *dev, + struct logicore_dp_tx_msa *msa) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + int res; + u8 power = 0x01; + + if (!is_connected(dev)) { + printf(" no DP sink connected\n"); + return -EIO; + } + + initialize(dev); + + disable_main_link(dev); + + logicore_dp_tx_set_msa(dev, msa); + + get_rx_capabilities(dev); + + printf(" DP sink connected\n"); + aux_write(dev, DPCD_SET_POWER_DP_PWR_VOLTAGE, 1, &power); + set_enhanced_frame_mode(dev, true); + cfg_main_link_max(dev); + res = establish_link(dev); + printf(" establish_link: %s, vs: %d, pe: %d\n", + res ? "failed" : "ok", dp_tx->link_config.vs_level, + dp_tx->link_config.pe_level); + + cfg_msa_recalculate(dev); + + clear_msa_values(dev); + set_msa_values(dev); + + enable_main_link(dev); + + return 0; +} + +/* + * Driver functions + */ + +static int logicore_dp_tx_enable(struct udevice *dev, int panel_bpp, + const struct display_timing *timing) +{ + struct clk pixclock; + struct logicore_dp_tx_msa *msa; + struct logicore_dp_tx_msa mode_640_480_60 = { + .pixel_clock_hz = 25175000, + .bits_per_color = 8, + .h_active = 640, + .h_start = 144, + .h_sync_polarity = false, + .h_sync_width = 96, + .h_total = 800, + .v_active = 480, + .v_start = 35, + .v_sync_polarity = false, + .v_sync_width = 2, + .v_total = 525, + .override_user_pixel_width = false, + .user_pixel_width = 0, + }; + + struct logicore_dp_tx_msa mode_720_400_70 = { + .pixel_clock_hz = 28300000, + .bits_per_color = 8, + .h_active = 720, + .h_start = 162, + .h_sync_polarity = false, + .h_sync_width = 108, + .h_total = 900, + .v_active = 400, + .v_start = 37, + .v_sync_polarity = true, + .v_sync_width = 2, + .v_total = 449, + .override_user_pixel_width = false, + .user_pixel_width = 0, + }; + + struct logicore_dp_tx_msa mode_1024_768_60 = { + .pixel_clock_hz = 65000000, + .bits_per_color = 8, + .h_active = 1024, + .h_start = 296, + .h_sync_polarity = false, + .h_sync_width = 136, + .h_total = 1344, + .v_active = 768, + .v_start = 35, + .v_sync_polarity = false, + .v_sync_width = 2, + .v_total = 806, + .override_user_pixel_width = false, + .user_pixel_width = 0, + }; + + if (timing->hactive.typ == 1024 && timing->vactive.typ == 768) + msa = &mode_1024_768_60; + else if (timing->hactive.typ == 720 && timing->vactive.typ == 400) + msa = &mode_720_400_70; + else + msa = &mode_640_480_60; + + if (clk_get_by_index(dev, 0, &pixclock)) { + printf("%s: Could not get pixelclock\n", dev->name); + return -1; + } + clk_set_rate(&pixclock, msa->pixel_clock_hz); + + return logicore_dp_tx_video_enable(dev, msa); +} + +static int logicore_dp_tx_probe(struct udevice *dev) +{ + struct dp_tx *dp_tx = dev_get_priv(dev); + + dp_tx->s_axi_clk = S_AXI_CLK_DEFAULT; + dp_tx->train_adaptive = false; + dp_tx->max_link_rate = DPCD_MAX_LINK_RATE_540GBPS; + dp_tx->max_lane_count = DPCD_MAX_LANE_COUNT_4; + + dp_tx->base = dev_read_u32_default(dev, "reg", -1); + + return 0; +} + +static const struct dm_display_ops logicore_dp_tx_ops = { + .enable = logicore_dp_tx_enable, +}; + +static const struct udevice_id logicore_dp_tx_ids[] = { + { .compatible = "gdsys,logicore_dp_tx" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(logicore_dp_tx) = { + .name = "logicore_dp_tx", + .id = UCLASS_DISPLAY, + .of_match = logicore_dp_tx_ids, + .probe = logicore_dp_tx_probe, + .priv_auto_alloc_size = sizeof(struct dp_tx), + .ops = &logicore_dp_tx_ops, +}; diff --git a/drivers/video/logicore_dp_tx.h b/drivers/video/logicore_dp_tx.h new file mode 100644 index 0000000000..d8d82b2b13 --- /dev/null +++ b/drivers/video/logicore_dp_tx.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * logicore_dp_tx.h + * + * Driver for XILINX LogiCore DisplayPort v6.1 TX (Source) + * + * (C) Copyright 2016 + * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc + */ + +#ifndef __GDSYS_LOGICORE_DP_TX_H__ +#define __GDSYS_LOGICORE_DP_TX_H__ + +/* + * struct logicore_dp_tx_msa - Main Stream Attributes (MSA) + * @pixel_clock_hz: The pixel clock of the stream (in Hz) + * @bits_per_color: Number of bits per color component + * @h_active: Horizontal active resolution (pixels) + * @h_start: Horizontal blank start (in pixels) + * @h_sync_polarity: Horizontal sync polarity + * (0 = negative | 1 = positive) + * @h_sync_width: Horizontal sync width (pixels) + * @h_total: Horizontal total (pixels) + * @v_active: Vertical active resolution (lines) + * @v_start: Vertical blank start (in lines). + * @v_sync_polarity: Vertical sync polarity + * (0 = negative | 1 = positive) + * @v_sync_width: Vertical sync width (lines) + * @v_total: Vertical total (lines) + * @override_user_pixel_width: If true, the value stored for user_pixel_width + * will be used as the pixel width. + * @user_pixel_width: The width of the user data input port. + * + * This is a stripped down version of struct main_stream_attributes that + * contains only the parameters that are not set by cfg_msa_recalculate() + */ +struct logicore_dp_tx_msa { + u32 pixel_clock_hz; + u32 bits_per_color; + u16 h_active; + u32 h_start; + bool h_sync_polarity; + u16 h_sync_width; + u16 h_total; + u16 v_active; + u32 v_start; + bool v_sync_polarity; + u16 v_sync_width; + u16 v_total; + bool override_user_pixel_width; + u32 user_pixel_width; +}; + +#endif /* __GDSYS_LOGICORE_DP_TX_H__ */ diff --git a/drivers/video/logicore_dp_tx_regif.h b/drivers/video/logicore_dp_tx_regif.h new file mode 100644 index 0000000000..e1affd2b67 --- /dev/null +++ b/drivers/video/logicore_dp_tx_regif.h @@ -0,0 +1,396 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * logicore_dp_tx_regif.h + * + * Register interface definition for XILINX LogiCore DisplayPort v6.1 TX + * (Source) based on Xilinx dp_v3_1 driver sources + * + * (C) Copyright 2016 + * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc + */ + +#ifndef __GDSYS_LOGICORE_DP_TX_REGIF_H__ +#define __GDSYS_LOGICORE_DP_TX_REGIF_H__ + +enum { + /* link configuration field */ + REG_LINK_BW_SET = 0x000, + REG_LANE_COUNT_SET = 0x004, + REG_ENHANCED_FRAME_EN = 0x008, + REG_TRAINING_PATTERN_SET = 0x00C, + REG_LINK_QUAL_PATTERN_SET = 0x010, + REG_SCRAMBLING_DISABLE = 0x014, + REG_DOWNSPREAD_CTRL = 0x018, + REG_SOFT_RESET = 0x01C, +}; + +enum { + /* core enables */ + REG_ENABLE = 0x080, + REG_ENABLE_MAIN_STREAM = 0x084, + REG_ENABLE_SEC_STREAM = 0x088, + REG_FORCE_SCRAMBLER_RESET = 0x0C0, + REG_MST_CONFIG = 0x0D0, + REG_LINE_RESET_DISABLE = 0x0F0, +}; + +enum { + /* core ID */ + REG_VERSION = 0x0F8, + REG_CORE_ID = 0x0FC, +}; + +enum { + /* AUX channel interface */ + REG_AUX_CMD = 0x100, + REG_AUX_WRITE_FIFO = 0x104, + REG_AUX_ADDRESS = 0x108, + REG_AUX_CLK_DIVIDER = 0x10C, + REG_USER_FIFO_OVERFLOW = 0x110, + REG_INTERRUPT_SIG_STATE = 0x130, + REG_AUX_REPLY_DATA = 0x134, + REG_AUX_REPLY_CODE = 0x138, + REG_AUX_REPLY_COUNT = 0x13C, + REG_INTERRUPT_STATUS = 0x140, + REG_INTERRUPT_MASK = 0x144, + REG_REPLY_DATA_COUNT = 0x148, + REG_REPLY_STATUS = 0x14C, + REG_HPD_DURATION = 0x150, +}; + +enum { + /* main stream attributes for SST / MST STREAM1 */ + REG_STREAM1_MSA_START = 0x180, + REG_MAIN_STREAM_HTOTAL = 0x180, + REG_MAIN_STREAM_VTOTAL = 0x184, + REG_MAIN_STREAM_POLARITY = 0x188, + REG_MAIN_STREAM_HSWIDTH = 0x18C, + REG_MAIN_STREAM_VSWIDTH = 0x190, + REG_MAIN_STREAM_HRES = 0x194, + REG_MAIN_STREAM_VRES = 0x198, + REG_MAIN_STREAM_HSTART = 0x19C, + REG_MAIN_STREAM_VSTART = 0x1A0, + REG_MAIN_STREAM_MISC0 = 0x1A4, + REG_MAIN_STREAM_MISC1 = 0x1A8, + REG_M_VID = 0x1AC, + REG_TU_SIZE = 0x1B0, + REG_N_VID = 0x1B4, + REG_USER_PIXEL_WIDTH = 0x1B8, + REG_USER_DATA_COUNT_PER_LANE = 0x1BC, + REG_MAIN_STREAM_INTERLACED = 0x1C0, + REG_MIN_BYTES_PER_TU = 0x1C4, + REG_FRAC_BYTES_PER_TU = 0x1C8, + REG_INIT_WAIT = 0x1CC, + REG_STREAM1 = 0x1D0, + REG_STREAM2 = 0x1D4, + REG_STREAM3 = 0x1D8, + REG_STREAM4 = 0x1DC, +}; + +enum { + /* PHY configuration status */ + REG_PHY_CONFIG = 0x200, + REG_PHY_VOLTAGE_DIFF_LANE_0 = 0x220, + REG_PHY_VOLTAGE_DIFF_LANE_1 = 0x224, + REG_PHY_VOLTAGE_DIFF_LANE_2 = 0x228, + REG_PHY_VOLTAGE_DIFF_LANE_3 = 0x22C, + REG_PHY_TRANSMIT_PRBS7 = 0x230, + REG_PHY_CLOCK_SELECT = 0x234, + REG_PHY_POWER_DOWN = 0x238, + REG_PHY_PRECURSOR_LANE_0 = 0x23C, + REG_PHY_PRECURSOR_LANE_1 = 0x240, + REG_PHY_PRECURSOR_LANE_2 = 0x244, + REG_PHY_PRECURSOR_LANE_3 = 0x248, + REG_PHY_POSTCURSOR_LANE_0 = 0x24C, + REG_PHY_POSTCURSOR_LANE_1 = 0x250, + REG_PHY_POSTCURSOR_LANE_2 = 0x254, + REG_PHY_POSTCURSOR_LANE_3 = 0x258, + REG_PHY_STATUS = 0x280, + REG_GT_DRP_COMMAND = 0x2A0, + REG_GT_DRP_READ_DATA = 0x2A4, + REG_GT_DRP_CHANNEL_STATUS = 0x2A8, +}; + +enum { + /* DisplayPort audio */ + REG_AUDIO_CONTROL = 0x300, + REG_AUDIO_CHANNELS = 0x304, + REG_AUDIO_INFO_DATA = 0x308, + REG_AUDIO_MAUD = 0x328, + REG_AUDIO_NAUD = 0x32C, + REG_AUDIO_EXT_DATA = 0x330, +}; + +enum { + /* HDCP */ + REG_HDCP_ENABLE = 0x400, +}; + +enum { + /* main stream attributes for MST STREAM2, 3, and 4 */ + REG_STREAM2_MSA_START = 0x500, + REG_STREAM3_MSA_START = 0x550, + REG_STREAM4_MSA_START = 0x5A0, + + REG_VC_PAYLOAD_BUFFER_ADDR = 0x800, +}; + +enum { + LINK_BW_SET_162GBPS = 0x06, + LINK_BW_SET_270GBPS = 0x0A, + LINK_BW_SET_540GBPS = 0x14, +}; + +enum { + LANE_COUNT_SET_1 = 0x1, + LANE_COUNT_SET_2 = 0x2, + LANE_COUNT_SET_4 = 0x4, +}; + +enum { + TRAINING_PATTERN_SET_OFF = 0x0, + /* training pattern 1 used for clock recovery */ + TRAINING_PATTERN_SET_TP1 = 0x1, + /* training pattern 2 used for channel equalization */ + TRAINING_PATTERN_SET_TP2 = 0x2, + /* + * training pattern 3 used for channel equalization for cores with DP + * v1.2 + */ + TRAINING_PATTERN_SET_TP3 = 0x3, +}; + +enum { + LINK_QUAL_PATTERN_SET_OFF = 0x0, + /* D10.2 unscrambled test pattern transmitted */ + LINK_QUAL_PATTERN_SET_D102_TEST = 0x1, + /* symbol error rate measurement pattern transmitted */ + LINK_QUAL_PATTERN_SET_SER_MES = 0x2, + /* pseudo random bit sequence 7 transmitted */ + LINK_QUAL_PATTERN_SET_PRBS7 = 0x3, +}; + +enum { + SOFT_RESET_VIDEO_STREAM1_MASK = 0x00000001, + SOFT_RESET_VIDEO_STREAM2_MASK = 0x00000002, + SOFT_RESET_VIDEO_STREAM3_MASK = 0x00000004, + SOFT_RESET_VIDEO_STREAM4_MASK = 0x00000008, + SOFT_RESET_AUX_MASK = 0x00000080, + SOFT_RESET_VIDEO_STREAM_ALL_MASK = 0x0000000F, +}; + +enum { + MST_CONFIG_MST_EN_MASK = 0x00000001, +}; + +enum { + LINE_RESET_DISABLE_MASK = 0x1, +}; + +#define AUX_CMD_NBYTES_TRANSFER_MASK 0x0000000F + +#define AUX_CMD_SHIFT 8 +#define AUX_CMD_MASK 0x00000F00 +enum { + AUX_CMD_I2C_WRITE = 0x0, + AUX_CMD_I2C_READ = 0x1, + AUX_CMD_I2C_WRITE_STATUS = 0x2, + AUX_CMD_I2C_WRITE_MOT = 0x4, + AUX_CMD_I2C_READ_MOT = 0x5, + AUX_CMD_I2C_WRITE_STATUS_MOT = 0x6, + AUX_CMD_WRITE = 0x8, + AUX_CMD_READ = 0x9, +}; + +#define AUX_CLK_DIVIDER_VAL_MASK 0x00FF + +#define AUX_CLK_DIVIDER_AUX_SIG_WIDTH_FILT_SHIFT 8 +#define AUX_CLK_DIVIDER_AUX_SIG_WIDTH_FILT_MASK 0xFF00 + +enum { + INTERRUPT_SIG_STATE_HPD_STATE_MASK = 0x00000001, + INTERRUPT_SIG_STATE_REQUEST_STATE_MASK = 0x00000002, + INTERRUPT_SIG_STATE_REPLY_STATE_MASK = 0x00000004, + INTERRUPT_SIG_STATE_REPLY_TIMEOUT_MASK = 0x00000008, +}; + +enum { + AUX_REPLY_CODE_ACK = 0x0, + AUX_REPLY_CODE_I2C_ACK = 0x0, + AUX_REPLY_CODE_NACK = 0x1, + AUX_REPLY_CODE_DEFER = 0x2, + AUX_REPLY_CODE_I2C_NACK = 0x4, + AUX_REPLY_CODE_I2C_DEFER = 0x8, +}; + +enum { + INTERRUPT_STATUS_HPD_IRQ_MASK = 0x00000001, + INTERRUPT_STATUS_HPD_EVENT_MASK = 0x00000002, + INTERRUPT_STATUS_REPLY_RECEIVED_MASK = 0x00000004, + INTERRUPT_STATUS_REPLY_TIMEOUT_MASK = 0x00000008, + INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK = 0x00000010, + INTERRUPT_STATUS_EXT_PKT_TXD_MASK = 0x00000020, +}; + +enum { + INTERRUPT_MASK_HPD_IRQ_MASK = 0x00000001, + INTERRUPT_MASK_HPD_EVENT_MASK = 0x00000002, + INTERRUPT_MASK_REPLY_RECEIVED_MASK = 0x00000004, + INTERRUPT_MASK_REPLY_TIMEOUT_MASK = 0x00000008, + INTERRUPT_MASK_HPD_PULSE_DETECTED_MASK = 0x00000010, + INTERRUPT_MASK_EXT_PKT_TXD_MASK = 0x00000020, +}; + +#define REPLY_STATUS_REPLY_STATUS_STATE_SHIFT 4 +#define REPLY_STATUS_REPLY_STATUS_STATE_MASK 0x00000FF0 +enum { + REPLY_STATUS_REPLY_RECEIVED_MASK = 0x00000001, + REPLY_STATUS_REPLY_IN_PROGRESS_MASK = 0x00000002, + REPLY_STATUS_REQUEST_IN_PROGRESS_MASK = 0x00000004, + REPLY_STATUS_REPLY_ERROR_MASK = 0x00000008, +}; + +#define MAIN_STREAMX_POLARITY_VSYNC_POL_SHIFT 1 +enum { + MAIN_STREAMX_POLARITY_HSYNC_POL_MASK = 0x00000001, + MAIN_STREAMX_POLARITY_VSYNC_POL_MASK = 0x00000002, +}; + +enum { + MAIN_STREAMX_MISC0_SYNC_CLK_MASK = 0x00000001, +}; + +#define MAIN_STREAMX_MISC0_COMPONENT_FORMAT_SHIFT 1 +#define MAIN_STREAMX_MISC0_COMPONENT_FORMAT_MASK 0x00000006 +enum { + MAIN_STREAMX_MISC0_COMPONENT_FORMAT_RGB = 0x0, + MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR422 = 0x1, + MAIN_STREAMX_MISC0_COMPONENT_FORMAT_YCBCR444 = 0x2, +}; + +#define MAIN_STREAMX_MISC0_DYNAMIC_RANGE_SHIFT 3 +#define MAIN_STREAMX_MISC0_DYNAMIC_RANGE_MASK 0x00000008 + +#define MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_SHIFT 4 +#define MAIN_STREAMX_MISC0_YCBCR_COLORIMETRY_MASK 0x00000010 + +#define MAIN_STREAMX_MISC0_BDC_SHIFT 5 +#define MAIN_STREAMX_MISC0_BDC_MASK 0x000000E0 +enum { + MAIN_STREAMX_MISC0_BDC_6BPC = 0x0, + MAIN_STREAMX_MISC0_BDC_8BPC = 0x1, + MAIN_STREAMX_MISC0_BDC_10BPC = 0x2, + MAIN_STREAMX_MISC0_BDC_12BPC = 0x3, + MAIN_STREAMX_MISC0_BDC_16BPC = 0x4, +}; + +enum { + PHY_CONFIG_PHY_RESET_ENABLE_MASK = 0x0000000, + PHY_CONFIG_PHY_RESET_MASK = 0x0000001, + PHY_CONFIG_GTTX_RESET_MASK = 0x0000002, + PHY_CONFIG_GT_ALL_RESET_MASK = 0x0000003, + PHY_CONFIG_TX_PHY_PMA_RESET_MASK = 0x0000100, + PHY_CONFIG_TX_PHY_PCS_RESET_MASK = 0x0000200, + PHY_CONFIG_TX_PHY_POLARITY_MASK = 0x0000800, + PHY_CONFIG_TX_PHY_PRBSFORCEERR_MASK = 0x0001000, + PHY_CONFIG_TX_PHY_POLARITY_IND_LANE_MASK = 0x0010000, + PHY_CONFIG_TX_PHY_POLARITY_LANE0_MASK = 0x0020000, + PHY_CONFIG_TX_PHY_POLARITY_LANE1_MASK = 0x0040000, + PHY_CONFIG_TX_PHY_POLARITY_LANE2_MASK = 0x0080000, + PHY_CONFIG_TX_PHY_POLARITY_LANE3_MASK = 0x0100000, + PHY_CONFIG_TX_PHY_8B10BEN_MASK = 0x0200000, +}; + +#define PHY_CONFIG_TX_PHY_LOOPBACK_SHIFT 13 +#define PHY_CONFIG_TX_PHY_LOOPBACK_MASK 0x000E000 + +enum { + PHY_CLOCK_SELECT_162GBPS = 0x1, + PHY_CLOCK_SELECT_270GBPS = 0x3, + PHY_CLOCK_SELECT_540GBPS = 0x5, +}; + +enum { + VS_LEVEL_0 = 0x2, + VS_LEVEL_1 = 0x5, + VS_LEVEL_2 = 0x8, + VS_LEVEL_3 = 0xF, + VS_LEVEL_OFFSET = 0x4, +}; + +enum { + PE_LEVEL_0 = 0x00, + PE_LEVEL_1 = 0x0E, + PE_LEVEL_2 = 0x14, + PE_LEVEL_3 = 0x1B, +}; + +enum { + PHY_STATUS_RESET_LANE_2_3_DONE_SHIFT = 2, + PHY_STATUS_TX_ERROR_LANE_0_SHIFT = 18, + PHY_STATUS_TX_BUFFER_STATUS_LANE_1_SHIFT = 20, + PHY_STATUS_TX_ERROR_LANE_1_SHIFT = 22, + PHY_STATUS_TX_BUFFER_STATUS_LANE_0_SHIFT = 16, + PHY_STATUS_TX_BUFFER_STATUS_LANE_2_SHIFT = 24, + PHY_STATUS_TX_ERROR_LANE_2_SHIFT = 26, + PHY_STATUS_TX_BUFFER_STATUS_LANE_3_SHIFT = 28, + PHY_STATUS_TX_ERROR_LANE_3_SHIFT = 30, +}; + +enum { + PHY_STATUS_RESET_LANE_0_DONE_MASK = 0x00000001, + PHY_STATUS_RESET_LANE_1_DONE_MASK = 0x00000002, + PHY_STATUS_RESET_LANE_2_3_DONE_MASK = 0x0000000C, + PHY_STATUS_PLL_LANE0_1_LOCK_MASK = 0x00000010, + PHY_STATUS_PLL_LANE2_3_LOCK_MASK = 0x00000020, + PHY_STATUS_PLL_FABRIC_LOCK_MASK = 0x00000040, + PHY_STATUS_TX_BUFFER_STATUS_LANE_0_MASK = 0x00030000, + PHY_STATUS_TX_ERROR_LANE_0_MASK = 0x000C0000, + PHY_STATUS_TX_BUFFER_STATUS_LANE_1_MASK = 0x00300000, + PHY_STATUS_TX_ERROR_LANE_1_MASK = 0x00C00000, + PHY_STATUS_TX_BUFFER_STATUS_LANE_2_MASK = 0x03000000, + PHY_STATUS_TX_ERROR_LANE_2_MASK = 0x0C000000, + PHY_STATUS_TX_BUFFER_STATUS_LANE_3_MASK = 0x30000000, + PHY_STATUS_TX_ERROR_LANE_3_MASK = 0xC0000000, +}; + +#define PHY_STATUS_LANE_0_READY_MASK \ + (PHY_STATUS_RESET_LANE_0_DONE_MASK | \ + PHY_STATUS_PLL_LANE0_1_LOCK_MASK) +#define PHY_STATUS_LANES_0_1_READY_MASK \ + (PHY_STATUS_LANE_0_READY_MASK | \ + PHY_STATUS_RESET_LANE_1_DONE_MASK) +/* + * PHY_STATUS_ALL_LANES_READY_MASK seems to be missing lanes 0 and 1 in + * Xilinx dp_v3_0 implementation + */ +#define PHY_STATUS_ALL_LANES_READY_MASK \ + (PHY_STATUS_LANES_0_1_READY_MASK | \ + PHY_STATUS_RESET_LANE_2_3_DONE_MASK | \ + PHY_STATUS_PLL_LANE2_3_LOCK_MASK) + +/** + * phy_status_lanes_ready_mask() - Generate phy status ready mask + * @lane_count: Number of lanes for which to generate a mask + * + * Return: The generated phy status ready mask + */ +static inline u32 phy_status_lanes_ready_mask(u8 lane_count) +{ + if (lane_count > 2) + return PHY_STATUS_ALL_LANES_READY_MASK; + + if (lane_count == 2) + return PHY_STATUS_LANES_0_1_READY_MASK; + + return PHY_STATUS_LANE_0_READY_MASK; +} + +#define GT_DRP_COMMAND_DRP_ADDR_MASK 0x000F +#define GT_DRP_COMMAND_DRP_RW_CMD_MASK 0x0080 +#define GT_DRP_COMMAND_DRP_W_DATA_SHIFT 16 +#define GT_DRP_COMMAND_DRP_W_DATA_MASK 0xFF00 + +#define HDCP_ENABLE_BYPASS_DISABLE_MASK 0x0001 + +#endif /* __GDSYS_LOGICORE_DP_TX_REGIF_H__ */ diff --git a/dts/Kconfig b/dts/Kconfig index 43f85c2f6f..8917f42444 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -61,7 +61,7 @@ config OF_LIVE help Normally U-Boot uses a flat device tree which saves space and avoids the need to unpack the tree before use. However a flat - tree does not support modifcation from within U-Boot since it + tree does not support modification from within U-Boot since it can invalidate driver-model device tree offsets. This option enables a live tree which is available after relocation, and can be adjusted as needed. diff --git a/env/Kconfig b/env/Kconfig index be99efb937..f23be00a54 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -431,23 +431,35 @@ config ENV_EXT4_FILE It's a string of the EXT4 file name. This file use to store the environment (explicit path to the file) -if ARCH_SUNXI +if ARCH_ROCKCHIP || ARCH_SUNXI || ARCH_ZYNQ || ARCH_ZYNQMP config ENV_OFFSET hex "Environment Offset" depends on !ENV_IS_IN_UBI depends on !ENV_IS_NOWHERE + default 0x3f8000 if ARCH_ROCKCHIP default 0x88000 if ARCH_SUNXI + default 0xE0000 if ARCH_ZYNQ + default 0x1E00000 if ARCH_ZYNQMP help Offset from the start of the device (or partition) config ENV_SIZE hex "Environment Size" - depends on !ENV_IS_NOWHERE - default 0x20000 if ARCH_SUNXI + default 0x40000 if ENV_IS_IN_SPI_FLASH && ARCH_ZYNQMP + default 0x20000 if ARCH_SUNXI || ARCH_ZYNQ + default 0x8000 if ARCH_ROCKCHIP || ARCH_ZYNQMP help Size of the environment storage area +config ENV_SECT_SIZE + hex "Environment Sector-Size" + depends on !ENV_IS_NOWHERE && (ARCH_ZYNQ || ARCH_ZYNQMP) + default 0x40000 if ARCH_ZYNQMP + default 0x20000 if ARCH_ZYNQ + help + Size of the sector containing the environment. + config ENV_UBI_PART string "UBI partition name" depends on ENV_IS_IN_UBI @@ -462,52 +474,6 @@ config ENV_UBI_VOLUME endif -if ARCH_ROCKCHIP - -config ENV_OFFSET - hex - depends on !ENV_IS_IN_UBI - depends on !ENV_IS_NOWHERE - default 0x3f8000 - help - Offset from the start of the device (or partition) - -config ENV_SIZE - hex - default 0x8000 - help - Size of the environment storage area - -endif - -if ARCH_ZYNQMP || ARCH_ZYNQ - -config ENV_OFFSET - hex "Environment Offset" - depends on !ENV_IS_NOWHERE - default 0x1E00000 if ARCH_ZYNQMP - default 0xE0000 if ARCH_ZYNQ - help - Offset from the start of the device (or partition) - -config ENV_SIZE - hex "Environment Size" - default 0x40000 if ENV_IS_IN_SPI_FLASH && ARCH_ZYNQMP - default 0x8000 if ARCH_ZYNQMP - default 0x20000 if ARCH_ZYNQ - help - Size of the environment storage area. - -config ENV_SECT_SIZE - hex "Environment Sector-Size" - depends on !ENV_IS_NOWHERE - default 0x40000 if ARCH_ZYNQMP - default 0x20000 if ARCH_ZYNQ - help - Size of the sector containing the environment. - -endif - config USE_DEFAULT_ENV_FILE bool "Create default environment from file" help @@ -186,14 +186,18 @@ int env_load(void) continue; printf("Loading Environment from %s... ", drv->name); + /* + * In error case, the error message must be printed during + * drv->load() in some underlying API, and it must be exactly + * one message. + */ ret = drv->load(); - if (ret) - printf("Failed (%d)\n", ret); - else + if (ret) { + debug("Failed (%d)\n", ret); + } else { printf("OK\n"); - - if (!ret) return 0; + } } /* diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 4efe8a3eda..4b722fc5ca 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -1095,7 +1095,7 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer, if (ret) goto out_free_both; - debug("reading %s\n", filename); + debug("reading %s at pos %llu\n", filename, pos); ret = get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread); out_free_both: @@ -112,7 +112,7 @@ struct fstype_info { * Is it legal to pass NULL as .probe()'s fs_dev_desc parameter? This * should be false in most cases. For "virtual" filesystems which * aren't based on a U-Boot block device (e.g. sandbox), this can be - * set to true. This should also be true for the dumm entry at the end + * set to true. This should also be true for the dummy entry at the end * of fstypes[], since that is essentially a "virtual" (non-existent) * filesystem. */ diff --git a/include/axi.h b/include/axi.h new file mode 100644 index 0000000000..3e40692cdf --- /dev/null +++ b/include/axi.h @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2017, 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#ifndef _AXI_H_ +#define _AXI_H_ + +/** + * enum axi_size_t - Determine size of AXI transfer + * @AXI_SIZE_8: AXI sransfer is 8-bit wide + * @AXI_SIZE_16: AXI sransfer is 16-bit wide + * @AXI_SIZE_32: AXI sransfer is 32-bit wide + */ +enum axi_size_t { + AXI_SIZE_8, + AXI_SIZE_16, + AXI_SIZE_32, +}; + +struct axi_ops { + /** + * read() - Read a single value from a specified address on a AXI bus + * @dev: AXI bus to read from. + * @address: The address to read from. + * @data: Pointer to a variable that takes the data value read + * from the address on the AXI bus. + * @size: The size of the data to be read. + * + * Return: 0 if OK, -ve on error. + */ + int (*read)(struct udevice *dev, ulong address, void *data, + enum axi_size_t size); + + /** + * write() - Write a single value to a specified address on a AXI bus + * @dev: AXI bus to write to. + * @address: The address to write to. + * @data: Pointer to the data value to be written to the address + * on the AXI bus. + * @size: The size of the data to write. + * + * Return 0 if OK, -ve on error. + */ + int (*write)(struct udevice *dev, ulong address, void *data, + enum axi_size_t size); +}; + +#define axi_get_ops(dev) ((struct axi_ops *)(dev)->driver->ops) + +/** + * axi_read() - Read a single value from a specified address on a AXI bus + * @dev: AXI bus to read from. + * @address: The address to read from. + * @data: Pointer to a variable that takes the data value read from the + * address on the AXI bus. + * @size: The size of the data to write. + * + * Return: 0 if OK, -ve on error. + */ +int axi_read(struct udevice *dev, ulong address, void *data, + enum axi_size_t size); + +/** + * axi_write() - Write a single value to a specified address on a AXI bus + * @dev: AXI bus to write to. + * @address: The address to write to. + * @data: Pointer to the data value to be written to the address on the + * AXI bus. + * @size: The size of the data to write. + * + * Return: 0 if OK, -ve on error. + */ +int axi_write(struct udevice *dev, ulong address, void *data, + enum axi_size_t size); + +struct axi_emul_ops { + /** + * read() - Read a single value from a specified address on a AXI bus + * @dev: AXI bus to read from. + * @address: The address to read from. + * @data: Pointer to a variable that takes the data value read + * from the address on the AXI bus. + * @size: The size of the data to be read. + * + * Return: 0 if OK, -ve on error. + */ + int (*read)(struct udevice *dev, ulong address, void *data, + enum axi_size_t size); + + /** + * write() - Write a single value to a specified address on a AXI bus + * @dev: AXI bus to write to. + * @address: The address to write to. + * @data: Pointer to the data value to be written to the address + * on the AXI bus. + * @size: The size of the data to write. + * + * Return: 0 if OK, -ve on error. + */ + int (*write)(struct udevice *dev, ulong address, void *data, + enum axi_size_t size); + + /** + * get_store() - Get address of internal storage of a emulated AXI + * device + * @dev: Emulated AXI device to get the pointer of the internal + * storage for. + * @storep: Pointer to the internal storage of the emulated AXI + * device. + * + * Return: 0 if OK, -ve on error. + */ + int (*get_store)(struct udevice *dev, u8 **storep); +}; + +#endif diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 719a22d797..4843a27cbf 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -47,7 +47,6 @@ */ #define CONFIG_SYS_SDRAM_BASE 0xc8000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_MONITOR_IS_IN_RAM #define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */ #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index cc8b956a09..86fbec5ea2 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -51,7 +51,6 @@ */ #define CONFIG_SYS_SDRAM_BASE 0xD0000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_MONITOR_IS_IN_RAM #define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */ #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 9dd560edcb..c37864c139 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -402,8 +402,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -663,7 +661,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e #define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 0x1f -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 93366d1048..e6cbcf86c6 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -234,7 +234,6 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index c5c199e6c2..7687588044 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD #define CONFIG_SYS_RAMBOOT @@ -422,7 +420,6 @@ combinations. this should be removed later #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 4de25a3d06..177110428b 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -363,7 +363,6 @@ #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #ifdef CONFIG_TSEC_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 116df265fd..a548af687d 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -21,7 +21,6 @@ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 2099f6809b..92d4c22741 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -31,7 +31,6 @@ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 86d5cfce9d..bd5e57c8f0 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -52,7 +52,6 @@ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 2569cdf0b2..57bc1cf77c 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -50,7 +50,6 @@ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -#define CONFIG_MII 1 #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 76bd05df1d..2ce9b11af7 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -44,7 +44,6 @@ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index d4fb1e5146..dee7913fe2 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -28,7 +28,6 @@ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index c0e42a3595..228471cbac 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -28,7 +28,6 @@ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 93789b3257..274f4db3ef 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -28,7 +28,6 @@ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index a9d456c50b..0d829b4e74 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -48,7 +48,6 @@ /* Network configuration */ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -#define CONFIG_MII 1 #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_RX_ETH_BUFFER 2 diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 5c6dcd3f69..5bd1d4f240 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -36,7 +36,6 @@ /* Network configuration */ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 28009cd86b..2de51d91a3 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -36,7 +36,6 @@ /* Network configuration */ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 4ad3849582..0c42b85438 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -28,7 +28,6 @@ #define CONFIG_FSLDMAFEC #ifdef CONFIG_FSLDMAFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_HAS_ETH1 diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index 2eb96be1d2..b4069db36c 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -28,7 +28,6 @@ #define CONFIG_FSLDMAFEC #ifdef CONFIG_FSLDMAFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_HAS_ETH1 diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 20e601dab5..4429f135d5 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -8,7 +8,6 @@ #define __CONFIG_H /* High Level Configuration Options */ -#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ #define CONFIG_EXTRA_ENV_SETTINGS \ "sdram_type=SDRAM\0" \ diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 34fbe0d91a..e5a164d4d1 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -15,8 +15,6 @@ #define CONFIG_MPC830x 1 /* MPC830x family */ #define CONFIG_MPC8308 1 /* MPC8308 CPU specific */ -#define CONFIG_MISC_INIT_R - #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_USE_PIO @@ -371,7 +369,6 @@ /* * TSEC ethernet configuration */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2_NAME "eTSEC1" #define TSEC1_PHY_ADDR 2 diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 1f56deb151..884dd4125e 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -51,8 +51,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_FSL_ELBC 1 -#define CONFIG_MISC_INIT_R - /* * On-board devices * diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index e61cf64f65..9de3744759 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -369,7 +369,6 @@ /* * TSEC ethernet configuration */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 7dc0377178..77174e3b7e 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -52,7 +52,6 @@ #define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */ #define CONFIG_MISC_INIT_F -#define CONFIG_MISC_INIT_R /* * On-board devices @@ -408,9 +407,6 @@ boards, we say we have two, but don't display a message if we find only one. */ /* TSEC */ #ifdef CONFIG_TSEC_ENET - -#define CONFIG_MII - #define CONFIG_TSEC1 #ifdef CONFIG_TSEC1 diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index c7d10f7e9a..3fdf34669f 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -389,7 +389,6 @@ extern int board_pci_host_broken(void); /* * TSEC ethernet configuration */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index bb5e49a65e..aae777db95 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -15,7 +15,6 @@ #define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XERDB 1 -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 7265598164..3625dfe3f6 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -510,7 +510,6 @@ #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 6fdab33487..b4178b11e0 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -258,7 +258,6 @@ #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 3daa4f916b..1201f468a0 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -298,7 +298,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 7973f3ceae..2568e95270 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -287,7 +287,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 2aa3b4df15..a62d4f7eee 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -396,7 +396,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index c708e924ad..f45270f9c4 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -296,7 +296,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index cea24d1484..724575ac59 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -253,9 +253,6 @@ #ifdef CONFIG_TSEC_ENET -#ifndef CONFIG_MII -#define CONFIG_MII 1 /* MII PHY management */ -#endif #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_TSEC2 1 @@ -294,10 +291,6 @@ #define FETH3_RST 0x80 #endif /* CONFIG_ETHER_INDEX */ -#ifndef CONFIG_MII -#define CONFIG_MII 1 /* MII PHY management */ -#endif - #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ /* diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 21735e5e52..219cda936a 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -308,7 +308,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index a5b3db3151..8c92c3f832 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -471,7 +471,6 @@ #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index ddfb241010..cfb7135870 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -57,8 +57,6 @@ #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) #endif -#define CONFIG_MISC_INIT_R 1 - #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 489f599086..68bc710b02 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -379,9 +379,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #endif /* CONFIG_PCI */ #if defined(CONFIG_TSEC_ENET) - -#define CONFIG_MII 1 /* MII PHY management */ - #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define CONFIG_TSEC2 1 diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 6024cce1af..4990c8ece8 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -184,7 +184,6 @@ #define CONFIG_DDR_CLK_FREQ 66666666 /* DDRCLK on P1010 RDB */ #define CONFIG_SYS_CLK_FREQ 66666666 /* SYSCLK for P1010 RDB */ -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG /* * These can be toggled for performance analysis, otherwise use default. @@ -581,7 +580,6 @@ extern unsigned long get_sdram_size(void); #endif #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 3110cb1ce4..24bec8541d 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -262,7 +262,6 @@ #endif /* CONFIG_NAND_FSL_ELBC */ -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG #define CONFIG_FSL_NGPIXIS @@ -488,7 +487,6 @@ #define CONFIG_TSECV2 -#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define CONFIG_TSEC2 1 diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index b69d521252..8279452906 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -302,7 +302,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x2 #define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 82ee37616e..1afaf2717d 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -256,8 +256,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -542,7 +540,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0 #define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index 24712662d4..07b65f89f9 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -24,8 +24,6 @@ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ #define CONFIG_KIRKWOOD_GPIO 1 -#define CONFIG_MISC_INIT_R /* call misc_init_r */ - /* * NS16550 Configuration */ @@ -91,7 +89,6 @@ * Other required minimal configurations */ #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ -#define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ @@ -102,7 +99,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_NETCONSOLE /* include NetConsole support */ #define CONFIG_NET_MULTI /* specify more that one ports available */ -#define CONFIG_MII /* expose smi over miiphy interface */ #define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ #define CONFIG_PHY_BASE_ADR 0x01 diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 0491832fee..d73752c7f9 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -24,8 +24,6 @@ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ #define CONFIG_KIRKWOOD_GPIO 1 -#define CONFIG_MISC_INIT_R /* call misc_init_r */ - /* * NS16550 Configuration */ @@ -91,7 +89,6 @@ * Other required minimal configurations */ #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ -#define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ @@ -102,7 +99,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_NETCONSOLE /* include NetConsole support */ #define CONFIG_NET_MULTI /* specify more that one ports available */ -#define CONFIG_MII /* expose smi over miiphy interface */ #define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ #define CONFIG_PHY_BASE_ADR 0x01 diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index d88c9678dd..8a38c5e19c 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -418,8 +418,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -721,7 +719,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC4" #endif diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 27948ba3b6..f7a54f7a97 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -427,8 +427,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -737,7 +735,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC4" #endif diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 7ab6b2f47e..e890860b7e 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -337,8 +337,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -601,7 +599,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e #define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 0x1f -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 71eb8e0535..46b036f6f7 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -440,8 +440,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #endif #endif -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -732,7 +730,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #endif #endif -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC4" #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 68ce7aa7ad..7d9354b360 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -391,7 +391,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -654,7 +653,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 90043eed5a..ebee9083ed 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -338,7 +338,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -606,7 +605,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 804d41bea9..f85881fc3c 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -475,7 +475,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 4abe554080..9d8834a3be 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -128,8 +128,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #endif -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -238,7 +236,6 @@ #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif @@ -626,7 +623,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 1cf37ef11b..fc1fa0c089 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -181,7 +181,6 @@ /* * TSEC */ -#define CONFIG_MII #define CONFIG_SYS_TSEC1_OFFSET 0x24000 #define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index ab69c45bae..7bdc14e512 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -442,7 +442,6 @@ #define CONFIG_BOOTP_SERVERIP -#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1_NAME "eTSEC1" #define CONFIG_TSEC2_NAME "eTSEC2" #define CONFIG_TSEC3_NAME "eTSEC3" diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index e0da9e8b5f..9395e618fa 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -97,8 +97,6 @@ #define PHYS_SDRAM_1 \ (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ -#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */ - #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index d04a85cff5..6f9f82178d 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -194,8 +194,6 @@ #define PHYS_SDRAM_1 \ (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ -#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */ - #ifdef CONFIG_SKIP_LOWLEVEL_INIT #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index 586e7a77ca..0c9de6125d 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -56,7 +56,6 @@ /* Networking Configs */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -203,7 +202,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index ca6580f297..6368872e5b 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -247,7 +247,6 @@ #undef CONFIG_TIMER #endif -#define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index ffe40a4160..3ce3814cbe 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -23,8 +23,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 @@ -58,7 +56,6 @@ * select serial console configuration */ #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* UART3 on CRANEBOARD */ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -99,8 +96,6 @@ /* * Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access */ /* nand at CS0 */ @@ -178,7 +173,6 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 9a20796214..1fe81d8934 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -12,8 +12,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ - /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM * 64 bytes before this address should be set aside for u-boot.img's @@ -27,7 +25,6 @@ #include <configs/ti_omap3_common.h> #undef CONFIG_SDRC /* Disable SDRC since we have EMIF4 */ -#define CONFIG_MISC_INIT_R #define CONFIG_REVISION_TAG /* Hardware drivers */ @@ -56,9 +53,7 @@ /* I2C */ /* Ethernet */ -#define CONFIG_DRIVER_TI_EMAC #define CONFIG_DRIVER_TI_EMAC_USE_RMII -#define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME @@ -66,8 +61,6 @@ /* Board NAND Info. */ #ifdef CONFIG_NAND -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index a8560619bc..9d0d342478 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -211,7 +211,6 @@ #ifndef CONFIG_SPL_BUILD /* CPSW Ethernet */ -#define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 42f271dd5f..d61fdf9f7a 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -16,8 +16,6 @@ #define CONFIG_IODELAY_RECALIBRATION -#define CONFIG_NR_DRAM_BANKS 2 - /* MMC ENV related defines */ #define CONFIG_SYS_MMC_ENV_DEV 1 /* eMMC */ #define CONFIG_SYS_MMC_ENV_PART 0 @@ -52,7 +50,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_MII /* Required in net/eth.c */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ #define CONFIG_SUPPORT_EMMC_BOOT diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 7225c03ac5..135b3c9584 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -14,8 +14,6 @@ #define CONFIG_MACH_TYPE 4886 -#define CONFIG_SYS_GENERIC_BOARD - #include <asm/arch/imx-regs.h> #include <asm/mach-imx/gpio.h> @@ -32,8 +30,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024) -#define CONFIG_MISC_INIT_R - #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE @@ -69,7 +65,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -252,7 +247,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/apf27.h b/include/configs/apf27.h index f4e0c1a762..1cee2fa292 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -48,7 +48,6 @@ * Memory configurations */ #define CONFIG_NR_DRAM_POPULATED 1 -#define CONFIG_NR_DRAM_BANKS 2 #define ACFG_SDRAM_MBYTE_SYZE 64 @@ -190,7 +189,6 @@ */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0x1f -#define CONFIG_MII /* MII PHY management */ /* * FPGA diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h index 00ba2eab6a..09de1c06ef 100644 --- a/include/configs/apx4devkit.h +++ b/include/configs/apx4devkit.h @@ -17,7 +17,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index bfa89b5d0a..baddd1c330 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 @@ -138,7 +137,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index 1433067e15..c0e1740219 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -51,7 +51,6 @@ #define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ 64 * 1024 * 1024) -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index be7dcecb85..46062492cd 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -33,8 +33,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (SYS_INIT_RAM_END \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h index bb6c8fe48f..79bf8f26e9 100644 --- a/include/configs/aspenite.h +++ b/include/configs/aspenite.h @@ -22,7 +22,6 @@ * TBD: dcache to be used for this */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000) -#define CONFIG_NR_DRAM_BANKS_MAX 2 /* * Commands configuration diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 873154bead..e241c9858d 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -123,7 +123,6 @@ #endif /* here we put our FPGA configuration... */ -#define CONFIG_MISC_INIT_R 1 /* Define user parameters that have to be customized most likely */ diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index fa7e9ee241..d9bb1fc52c 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -54,7 +54,6 @@ /* * Memory Configuration */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE SZ_32M @@ -115,7 +114,6 @@ #define CONFIG_DRIVER_AT91EMAC #define CONFIG_SYS_RX_ETH_BUFFER 16 #define CONFIG_RMII -#define CONFIG_MII /* * NOR Flash diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index fdc74a3d78..2177512fe8 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -53,7 +53,6 @@ * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 0cf34153b0..1c7fbe111f 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -51,7 +51,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_SP_ADDR \ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 3bd0926590..f0dfc99d5b 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -52,7 +52,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE 1 /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 2c1ceeda07..0958d63c94 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -43,7 +43,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x70000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 739ea29737..6cd267eee6 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -33,7 +33,6 @@ */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 1001526b7d..b052071478 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -41,7 +41,6 @@ #undef CONFIG_FB_ADDR /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index a30e345fef..d48b7d0785 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -31,7 +31,6 @@ */ /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index b230896734..99fb80d53e 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -45,7 +45,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1 \ (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index f78e1573b6..1b2966fd61 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -53,7 +53,6 @@ /* * Ethernet PHY configuration */ -#define CONFIG_MII /* * USB 1.1 configuration diff --git a/include/configs/baltos.h b/include/configs/baltos.h index a5737708b7..006b049d09 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -266,7 +266,6 @@ /* Network. */ #define CONFIG_PHY_SMSC -#define CONFIG_MII #define CONFIG_PHY_ATHEROS /* NAND support */ diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h index b8920d21ce..d0c7de34a0 100644 --- a/include/configs/bcm23550_w1d.h +++ b/include/configs/bcm23550_w1d.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */ @@ -56,7 +55,6 @@ #define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */ /* Init functions */ -#define CONFIG_MISC_INIT_R /* board's misc_init_r function */ /* Some commands use this as the default load address */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 4b0d599dfb..781689a991 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_SIZE 0x80000000 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */ @@ -55,7 +54,6 @@ #define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */ /* Init functions */ -#define CONFIG_MISC_INIT_R /* board's misc_init_r function */ /* Some commands use this as the default load address */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/bcm7445.h b/include/configs/bcm7445.h index f7200357eb..f34cf2d03b 100644 --- a/include/configs/bcm7445.h +++ b/include/configs/bcm7445.h @@ -10,10 +10,15 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include "bcmstb.h" - #define CONFIG_SYS_NS16550_COM3 0xf040ab00 +#define CONFIG_SYS_TEXT_BASE 0x80100000 +#define CONFIG_SYS_INIT_RAM_ADDR 0x80200000 + +#define CONFIG_SYS_MALLOC_LEN ((10 * 1024) << 10) /* 10 MiB */ + +#include "bcmstb.h" + #define BCMSTB_SDHCI_BASE 0xf03e0200 #define BCMSTB_TIMER_LOW 0xf0412008 #define BCMSTB_TIMER_HIGH 0xf041200c @@ -23,4 +28,11 @@ #define BCMSTB_HIF_SPI_INTR2 0xf03e1a00 #define BCMSTB_CS_REG 0xf03e0920 +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_DM_SPI 1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF_TEST + #endif /* __CONFIG_H */ diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index 4423e8613f..0586c53ae1 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -24,8 +24,6 @@ #error CONFIG_SYS_SDRAM_SIZE must be defined! #endif -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) /* Some commands use this as the default load address */ diff --git a/include/configs/bcm_northstar2.h b/include/configs/bcm_northstar2.h index 5a288fc45c..754bf2e0db 100644 --- a/include/configs/bcm_northstar2.h +++ b/include/configs/bcm_northstar2.h @@ -14,7 +14,6 @@ #define V2M_BASE 0x80000000 #define PHYS_SDRAM_1 V2M_BASE -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1_SIZE (4UL * SZ_1G) #define PHYS_SDRAM_2_SIZE (4UL * SZ_1G) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 8c6178042e..e755383e72 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -12,12 +12,25 @@ #include "version.h" #include <linux/sizes.h> -#include <asm/arch/prior_stage.h> -/* - * Generic board configuration. - */ -#define CONFIG_SYS_GENERIC_BOARD +#ifndef __ASSEMBLY__ + +#include <linux/types.h> + +struct bcmstb_boot_parameters { + u32 r0; + u32 r1; + u32 r2; + u32 r3; + u32 sp; + u32 lr; +}; + +extern struct bcmstb_boot_parameters bcmstb_boot_parameters; + +extern phys_addr_t prior_stage_fdt_address; + +#endif /* __ASSEMBLY__ */ /* * CPU configuration. @@ -69,16 +82,11 @@ * MiB. However, BOLT can be configured to allow loading larger * initramfs images, in which case this limitation is eliminated. */ -#define CONFIG_NR_DRAM_BANKS 3 - #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_TEXT_BASE 0x80100000 -#define CONFIG_SYS_INIT_RAM_ADDR 0x80200000 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MALLOC_LEN ((10 * 1024) << 10) /* 10 MiB */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* @@ -106,7 +114,6 @@ /* * Serial console configuration. */ -#define CONFIG_SERIAL3 3 #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ @@ -123,9 +130,6 @@ #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 -#define CONFIG_CMD_SF -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF_TEST #define CONFIG_CMD_MMC /* @@ -148,7 +152,6 @@ */ #define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_ENV_IS_IN_SPI_FLASH 1 #define CONFIG_ENV_OFFSET 0x1e0000 #define CONFIG_ENV_SIZE (64 << 10) /* 64 KiB */ #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE @@ -176,8 +179,4 @@ */ #define CONFIG_BOARD_LATE_INIT -#define CONFIG_SYS_MAX_FLASH_BANKS 1 - -#define CONFIG_DM_SPI 1 - #endif /* __BCMSTB_H */ diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h index 98cd7b6f28..ec6b01f144 100644 --- a/include/configs/bg0900.h +++ b/include/configs/bg0900.h @@ -6,7 +6,6 @@ #define __CONFIGS_BG0900_H__ /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h index 813a14cf29..e2f9e76a97 100644 --- a/include/configs/bmips_bcm3380.h +++ b/include/configs/bmips_bcm3380.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 166500000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index 5cc0ebe8ba..476aa51af3 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 166500000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h index e244cd02f8..1456b0ec47 100644 --- a/include/configs/bmips_bcm63268.h +++ b/include/configs/bmips_bcm63268.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 200000000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h index 42e9215dc8..faf9abcc3e 100644 --- a/include/configs/bmips_bcm6328.h +++ b/include/configs/bmips_bcm6328.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 160000000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h index 66e731c01c..2a02854f25 100644 --- a/include/configs/bmips_bcm6338.h +++ b/include/configs/bmips_bcm6338.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 120000000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index 3d4e219302..647f630fbb 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 128000000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index a38903e248..6cb99e854f 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 150000000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h index 29518e6d6c..60777207e1 100644 --- a/include/configs/bmips_bcm6362.h +++ b/include/configs/bmips_bcm6362.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 200000000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index 8f8134d32e..142379c768 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 200000000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* USB */ diff --git a/include/configs/bmips_bcm6838.h b/include/configs/bmips_bcm6838.h index e79a98206a..d735c51efc 100644 --- a/include/configs/bmips_bcm6838.h +++ b/include/configs/bmips_bcm6838.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 160000000 /* RAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bubblegum_96.h b/include/configs/bubblegum_96.h index a8f38a23f9..e1dc37b687 100644 --- a/include/configs/bubblegum_96.h +++ b/include/configs/bubblegum_96.h @@ -12,7 +12,6 @@ /* SDRAM Definitions */ #define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_SIZE 0x80000000 /* Generic Timer Definitions */ diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 926ba9918c..1bbfa16660 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -63,7 +63,6 @@ * always, even when we have more. We always start at 0x80000000, * and we place the initial stack pointer in our SRAM. */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/calimain.h b/include/configs/calimain.h index 690f605695..7f2b751404 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -14,7 +14,6 @@ /* * Board */ -#define CONFIG_DRIVER_TI_EMAC #define CONFIG_MACH_TYPE MACH_TYPE_CALIMAIN /* @@ -122,8 +121,6 @@ /* memtest will be run on 16MB */ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (16 << 20)) -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - /* * Serial Driver info */ @@ -153,7 +150,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_MII #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -255,7 +251,6 @@ "verify=n\0" \ "clearenv=protect off all;" \ "erase 0x60040000 +0x40000;\0" \ - "bootlimit=3\0" \ "altbootcmd=run bootrlk\0" #define CONFIG_PREBOOT \ diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 03b17840e5..5d247886ae 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -24,8 +24,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_MISC_INIT_R - #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART2_BASE @@ -83,7 +81,6 @@ /* Ethernet */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -202,7 +199,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h index f0e1e8280c..80f0b4f56d 100644 --- a/include/configs/cl-som-am57x.h +++ b/include/configs/cl-som-am57x.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_CL_SOM_AM57X_H #define __CONFIG_CL_SOM_AM57X_H -#define CONFIG_NR_DRAM_BANKS 2 - #define CONSOLEDEV "ttyO2" #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ @@ -22,7 +20,6 @@ #include <configs/ti_omap5_common.h> /* misc */ -#define CONFIG_MISC_INIT_R #define CONFIG_REVISION_TAG /* PMIC I2C bus number */ @@ -79,7 +76,6 @@ /* USB Networking options */ /* CPSW Ethernet */ -#define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_PHY_ATHEROS diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index faea6c6b93..f86324a20b 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -25,7 +25,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 @@ -133,7 +132,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 5f3b97f6e6..f7e82dfbdb 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -24,7 +24,6 @@ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -180,7 +179,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_PHY_ATHEROS -#define CONFIG_MII #define CONFIG_ETHPRIME "FEC0" #define CONFIG_ARP_TIMEOUT 200UL #define CONFIG_NET_RETRY_COUNT 5 @@ -216,7 +214,6 @@ /* misc */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_MISC_INIT_R /* SPL */ #include "imx6_spl.h" diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index 282b0747e1..740bbd45a0 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -79,7 +79,6 @@ #define CONFIG_SYS_AUTOLOAD "no" /* Serial console configuration */ -#define CONFIG_SERIAL1 1 /* UART0 */ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 415924549b..8722841384 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -30,8 +30,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -62,7 +60,6 @@ * select serial console configuration */ #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* UART3 */ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -84,13 +81,10 @@ /* * TWL4030 */ -#define CONFIG_TWL4030_LED /* * Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ @@ -174,7 +168,6 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 /*----------------------------------------------------------------------- @@ -203,7 +196,6 @@ #define CONFIG_SPLASHIMAGE_GUARD /* Display Configuration */ -#define CONFIG_VIDEO_OMAP3 #define LCD_BPP LCD_COLOR16 #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index 2c889d4a85..c876853cd5 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -29,8 +29,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - /* * The early kernel mapping on ARM currently only maps from the base of DRAM * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. @@ -66,7 +64,6 @@ * select serial console configuration */ #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* UART3 */ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -91,8 +88,6 @@ /* * Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ @@ -174,7 +169,6 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define CONFIG_SYS_CS0_SIZE (256 << 20) @@ -191,9 +185,7 @@ #define CONFIG_ENV_ADDR 0x260000 #if defined(CONFIG_CMD_NET) -#define CONFIG_DRIVER_TI_EMAC #define CONFIG_DRIVER_TI_EMAC_USE_RMII -#define CONFIG_MII #define CONFIG_ARP_TIMEOUT 200UL #define CONFIG_NET_RETRY_COUNT 5 #endif /* CONFIG_CMD_NET */ @@ -210,7 +202,6 @@ #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */ /* Display Configuration */ -#define CONFIG_VIDEO_OMAP3 #define LCD_BPP LCD_COLOR16 #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index fdaf68c6fd..79eb865bf9 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -44,7 +44,6 @@ 50, 51, 52, 53, 54, 55, 56, 57, } /* CPSW Ethernet support */ -#define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_PHY_ATHEROS diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 24a3d1b76c..337c875655 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -114,7 +114,6 @@ */ #ifdef CONFIG_MCFFEC -# define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index a692da5ea2..f2db039454 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) /* Network */ -#define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 @@ -134,7 +133,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 7e3463e184..7eb87cada6 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -12,8 +12,6 @@ #undef CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SYS_GENERIC_BOARD - #include <asm/arch/imx-regs.h> #include <asm/mach-imx/gpio.h> @@ -30,8 +28,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024) -#define CONFIG_MISC_INIT_R - #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE @@ -57,7 +53,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" @@ -227,7 +222,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index ec5aade852..e7da8b72c0 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -21,7 +21,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 @@ -126,7 +125,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 61256e233b..7b10ac8cf1 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -84,7 +84,6 @@ /* * DRAM Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 1d15651c23..31ff8a00a6 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -48,7 +48,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 1 #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET1_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 @@ -133,7 +132,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical memory map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index bfd77c8299..54a381b682 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -253,7 +253,6 @@ #define CONFIG_TSECV2 -#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define CONFIG_TSEC2 1 @@ -311,7 +310,6 @@ /* * Board initialisation callbacks */ -#define CONFIG_MISC_INIT_R #endif /* CONFIG_TRAILBLAZER */ /* diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h new file mode 100644 index 0000000000..1cf5c037e8 --- /dev/null +++ b/include/configs/coreboot.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/x86-common.h> + +#define CONFIG_SYS_MONITOR_LEN (1 << 20) + +#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +/* ATA/IDE support */ +#define CONFIG_SYS_IDE_MAXBUS 2 +#define CONFIG_SYS_IDE_MAXDEVICE 4 +#define CONFIG_SYS_ATA_BASE_ADDR 0 +#define CONFIG_SYS_ATA_DATA_OFFSET 0 +#define CONFIG_SYS_ATA_REG_OFFSET 0 +#define CONFIG_SYS_ATA_ALT_OFFSET 0 +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 +#define CONFIG_ATAPI + +#endif /* __CONFIG_H */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 366e8ea65b..aa7520473a 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -265,8 +265,6 @@ #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -555,7 +553,6 @@ #define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0 #define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 66fdbc2e9d..5dd5c28e08 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -55,7 +55,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 8284a97ae3..597012174d 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -150,8 +150,6 @@ #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -376,7 +374,6 @@ #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC4" #endif diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 3dcd1390ca..7e52fea2a1 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -13,7 +13,6 @@ /* * Board */ -#define CONFIG_DRIVER_TI_EMAC /* check if direct NOR boot config is used */ #ifndef CONFIG_DIRECT_NOR_BOOT #define CONFIG_USE_SPIFLASH @@ -57,8 +56,6 @@ /* memtest will be run on 16MB */ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ @@ -141,7 +138,6 @@ * I2C Configuration */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 #endif @@ -193,7 +189,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_MII #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -226,7 +221,6 @@ /* * U-Boot general configuration */ -#define CONFIG_MISC_INIT_R #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 00e9c44fdf..ae2b81ba73 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -23,7 +23,6 @@ /* * Memory configurations */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN SZ_1M #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_64M diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index f36dc2dc2c..1b175be387 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -31,12 +31,9 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #include <configs/ti_omap3_common.h> -#define CONFIG_MISC_INIT_R - #define CONFIG_REVISION_TAG 1 /* Size of malloc() pool */ @@ -57,12 +54,8 @@ #undef CONFIG_DM9000_DEBUG /* TWL4030 */ -#define CONFIG_TWL4030_LED 1 /* Board NAND Info */ - -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 3e0ac15229..6c833e7a27 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -42,7 +42,6 @@ #define CONFIG_SYS_BOOTCOUNT_BE /* FEC ethernet */ -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" @@ -146,7 +145,6 @@ #endif /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/display5.h b/include/configs/display5.h index 692a95938b..514638f684 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -54,7 +54,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024) -#define CONFIG_MISC_INIT_R /*#define CONFIG_MXC_UART*/ #define CONFIG_MXC_UART_BASE UART5_BASE @@ -84,7 +83,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_MII #endif /* MMC Configs */ @@ -168,7 +166,7 @@ "rootwait rootfstype=ext4 rw; " \ "run set_kernel_part;" \ "part start mmc ${mmcdev} ${kernel_part} lba_start; " \ - "mmc read ${loadaddr} ${lba_start} 0x2000; " \ + "mmc read ${loadaddr} ${lba_start} ${fitImg_fw_sz}; " \ "setenv fdt_conf imx6q-${board}-${display}.dtb; " /* All the numbers are in LBAs */ @@ -264,7 +262,6 @@ "baudrate=115200\0" \ "bootcmd=" CONFIG_BOOTCOMMAND "\0" \ "factory=" FACTORY_PROCEDURE "\0" \ - "bootlimit=3\0" \ "ethact=FEC\0" \ "netdev=eth0\0" \ "boot_os=y\0" \ @@ -276,6 +273,7 @@ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "kernel_file=fitImage\0" \ + "fitImg_fw_sz=0x2200\0" \ "up=run tftp_sf_SPL; run tftp_sf_uboot\0" \ "download_kernel=" \ "tftpboot ${loadaddr} ${kernel_file};\0" \ @@ -378,7 +376,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 8658c80fdc..f72ee90ab5 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -28,8 +28,6 @@ * Commands configuration */ -#define CONFIG_NR_DRAM_BANKS 1 - /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index fa3f2b92fe..fcaf3a1e13 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -16,7 +16,6 @@ #define CONFIG_IODELAY_RECALIBRATION #define CONFIG_VERY_BIG_RAM -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_MAX_MEM_MAPPED 0x80000000 #ifndef CONFIG_QSPI_BOOT @@ -71,7 +70,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_MII /* Required in net/eth.c */ #define CONFIG_PHY_TI /* SPI */ diff --git a/include/configs/draco.h b/include/configs/draco.h index 7b2794826f..ffeb3982b5 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -36,7 +36,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#undef CONFIG_MII #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 46a7179f1b..cf021083ae 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -11,10 +11,7 @@ #include <linux/sizes.h> #include <asm/arch/sysmap-apq8016.h> -#define CONFIG_MISC_INIT_R /* To stop autoboot */ - /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x80000000 /* 1008 MB (the last ~30Mb are secured for TrustZone by ATF*/ #define PHYS_SDRAM_1_SIZE 0x3da00000 diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 12ae6bc884..cc4a4cb3f4 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -11,10 +11,7 @@ #include <linux/sizes.h> #include <asm/arch/sysmap-apq8096.h> -#define CONFIG_MISC_INIT_R /* To stop autoboot */ - /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_SIZE 0xC0000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/ea20.h b/include/configs/ea20.h index 485866d694..a644e67816 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -13,7 +13,6 @@ /* * Board */ -#define CONFIG_DRIVER_TI_EMAC #define CONFIG_USE_SPIFLASH #define CONFIG_SYS_USE_NAND #define CONFIG_DRIVER_TI_EMAC_USE_RMII @@ -43,8 +42,6 @@ /* memtest will be run on 16MB */ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - /* * Serial Driver info */ @@ -62,7 +59,6 @@ * I2C Configuration */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ @@ -70,7 +66,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_MII #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index d8e647ec96..fd5c9b1dae 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -14,8 +14,6 @@ * High Level Configuration Options (easy to change) * *----------------------------------------------------------------------*/ -#define CONFIG_MISC_INIT_R - #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) @@ -79,7 +77,6 @@ *----------------------------------------------------------------------*/ #define CONFIG_MCFFEC -#define CONFIG_MII 1 #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY #define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/eco5pk.h b/include/configs/eco5pk.h index 182066d4d4..3375c5d965 100644 --- a/include/configs/eco5pk.h +++ b/include/configs/eco5pk.h @@ -16,10 +16,8 @@ /* Our console port is port3 */ #undef CONFIG_SYS_NS16550_COM1 -#undef CONFIG_SERIAL1 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 #define CONFIG_MACH_TYPE MACH_TYPE_ECO5_PK diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h index 7eff61645e..a175f9eee9 100644 --- a/include/configs/edb93xx.h +++ b/include/configs/edb93xx.h @@ -93,7 +93,6 @@ /* Network hardware configuration */ #define CONFIG_DRIVER_EP93XX_MAC #define CONFIG_MII_SUPPRESS_PREAMBLE -#define CONFIG_MII #undef CONFIG_NETCONSOLE /* SDRAM configuration */ @@ -137,7 +136,6 @@ #endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 32*1024 - GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/edison.h b/include/configs/edison.h index 93ab900f11..476f5e38b4 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -25,8 +25,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x100000 #define CONFIG_PHYSMEM -#define CONFIG_NR_DRAM_BANKS 3 - #define CONFIG_SYS_STACK_SIZE (32 * 1024) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 9882d84e29..644f42a8bb 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -122,7 +122,6 @@ #define CONFIG_PHY_BASE_ADR 0x8 #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ #define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_MII /* expose smi ove miiphy interface */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #endif @@ -189,7 +188,6 @@ * Other required minimal configurations */ #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_LOAD_ADDR 0x00800000 #define CONFIG_SYS_MEMTEST_START 0x00400000 diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index f5e92d6718..b472a6c5a2 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -84,7 +84,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 03926bcef6..71217f07e2 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -42,7 +42,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -64,7 +63,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 977ff45ff0..4e3b26c25c 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -24,7 +24,6 @@ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" /* DRAM Memory Banks */ -#define CONFIG_NR_DRAM_BANKS 8 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ #endif /* __CONFIG_ESPRESSO7420_H */ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index a13be398d5..726f8a500f 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -95,7 +95,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#undef CONFIG_MII #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 72a5d220e1..944cdbbeb2 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -33,7 +33,6 @@ GENERATED_GBL_DATA_SIZE) /* 128MB SDRAM in 1 bank */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE (128 << 20) #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index eaf40a0e7d..c3473f7ef8 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -29,7 +29,6 @@ #define CONFIG_USB_XHCI_EXYNOS /* DRAM Memory Banks */ -#define CONFIG_NR_DRAM_BANKS 8 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ #endif /* __CONFIG_5250_H */ diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 9d16428606..6c231630b6 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -71,8 +71,6 @@ #define IMX_FEC_BASE FEC_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_MII - #define CONFIG_ARP_TIMEOUT 200UL /* @@ -91,7 +89,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index fef41a8a18..fad840b9b2 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -65,7 +65,6 @@ /* Networking Configs */ #ifdef CONFIG_NET #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -88,7 +87,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootcause=POR\0" \ - "bootlimit=10\0" \ "image=/boot/fitImage\0" \ "fdt_high=0xffffffff\0" \ "dev=mmc\0" \ @@ -167,7 +165,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index 4a6da951c8..a8c4ddf0fd 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -28,7 +28,6 @@ * TBD: dcache to be used for this */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000) -#define CONFIG_NR_DRAM_BANKS_MAX 2 /* * Commands configuration @@ -49,7 +48,6 @@ #define CONFIG_MARVELL_GPIO /* PHY configuration */ -#define CONFIG_MII #define CONFIG_RESET_PHY_R /* 88E3015 register definition */ #define PHY_LED_PAR_SEL_REG 22 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index b078cc5466..6cafdc6685 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -33,7 +33,6 @@ #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) /* Init Functions */ -#define CONFIG_MISC_INIT_R /* Driver Model */ #ifndef CONFIG_SPL_BUILD @@ -124,7 +123,6 @@ /* Ethernet support */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 @@ -157,7 +155,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/h2200.h b/include/configs/h2200.h index 69100d3d2a..1abf283e26 100644 --- a/include/configs/h2200.h +++ b/include/configs/h2200.h @@ -12,7 +12,6 @@ #define CONFIG_CPU_PXA25X 1 -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 4d2f1f0aa8..2566867e82 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ -#define CONFIG_MISC_INIT_R #define CONFIG_SCSI_AHCI_PLAT #define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 #define CONFIG_SYS_SCSI_MAX_LUN 1 @@ -53,7 +52,6 @@ * Physical Memory Map * The DRAM is already setup, so do not touch the DT node later. */ -#define CONFIG_NR_DRAM_BANKS 0 #define PHYS_SDRAM_1_SIZE (4089 << 20) #define CONFIG_SYS_MEMTEST_START 0x100000 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000) diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 29d4db9707..1376d6155d 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -22,7 +22,6 @@ /* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */ -#define CONFIG_NR_DRAM_BANKS 6 #define PHYS_SDRAM_1 0x00000000 /* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/ @@ -50,8 +49,6 @@ #define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000 /*#define CONFIG_DWC2_DFLT_SPEED_FULL*/ #define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO - -#define CONFIG_MISC_INIT_R #endif #define CONFIG_HIKEY_GPIO diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 941684425f..c292c258c6 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -470,7 +470,6 @@ void fpga_control_clear(unsigned int bus, int pin); /* * TSEC ethernet configuration */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 #define CONFIG_TSEC1_NAME "eTSEC0" #define TSEC1_PHY_ADDR 1 diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 5da053002e..cdf4fddd94 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -48,7 +48,6 @@ /* * Ethernet PHY configuration */ -#define CONFIG_MII /* * USB 1.1 configuration diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index b633de60e9..afa7e10778 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -19,8 +19,6 @@ #define CONFIG_FSL_ELBC -#define CONFIG_MISC_INIT_R - #define CONFIG_BOOT_RETRY_TIME 900 #define CONFIG_BOOT_RETRY_MIN 30 #define CONFIG_RESET_TO_RETRY @@ -446,7 +444,6 @@ #define CONFIG_SYS_MEMTEST_END 0x00C00000 #define CONFIG_SYS_LOAD_ADDR 0x100000 -#define CONFIG_MII #define CONFIG_LOADS_ECHO #define CONFIG_TIMESTAMP #define CONFIG_PREBOOT "echo;" \ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index dddb2c9b0e..cd89fadb39 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -72,7 +72,6 @@ /* memtest start address */ #define CONFIG_SYS_MEMTEST_START 0xA0000000 #define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0xA0000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ @@ -110,7 +109,6 @@ */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0x1f -#define CONFIG_MII /* * MTD diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 7260f8013f..7baa265934 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -117,7 +117,6 @@ #endif /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -164,8 +163,6 @@ # define CONFIG_FEC_MXC_PHYADDR 0 # define CONFIG_FEC_XCV_TYPE RMII # endif - -# define CONFIG_MII #endif /* Falcon Mode */ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 36be589241..e55941408c 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -26,7 +26,6 @@ #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* Dev kit SD card */ /* Ethernet Configs */ -#define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 @@ -122,7 +121,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 5a3c2d68b5..030dbedce8 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -55,7 +55,6 @@ /* Ethernet */ #define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_MII /* USB */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET @@ -83,7 +82,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 811384ebbe..952993f8ea 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -14,7 +14,6 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */ /* * There are various dependencies on the core module (CM) fitted @@ -64,7 +63,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index eb3f394231..df9a8a0881 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -17,7 +17,6 @@ /* * Board */ -#define CONFIG_DRIVER_TI_EMAC /* * SoC Configuration @@ -42,8 +41,6 @@ /* memtest will be run on 16MB */ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 16 * 1024 * 1024) -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ DAVINCI_SYSCFG_SUSPSRC_UART2 | \ @@ -170,7 +167,6 @@ /* * U-Boot general configuration */ -#define CONFIG_MISC_INIT_R #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/kc1.h b/include/configs/kc1.h index 56a4b84ef8..9b1149b190 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -26,8 +26,6 @@ * Board */ -#define CONFIG_MISC_INIT_R - /* * Clocks */ @@ -39,8 +37,6 @@ * DRAM */ -#define CONFIG_NR_DRAM_BANKS 1 - /* * Memory */ diff --git a/include/configs/khadas-vim.h b/include/configs/khadas-vim.h index 3a9c1e6992..6615f7711d 100644 --- a/include/configs/khadas-vim.h +++ b/include/configs/khadas-vim.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - #define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0" #include <configs/meson-gx-common.h> diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index aad7657e94..f72cc0a012 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -194,7 +194,6 @@ "setenv altbootcmd \'setenv boot_bank ${backup_bank}; " \ "run ${subbootcmds}; reset\' && " \ "saveenv && saveenv && boot\0" \ - "bootlimit=3\0" \ "cramfsloadfdt=" \ "cramfsload ${fdt_addr_r} " \ "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h index 330c252f7d..337a9cec66 100644 --- a/include/configs/km/km83xx-common.h +++ b/include/configs/km/km83xx-common.h @@ -11,7 +11,6 @@ #include "keymile-common.h" #include "km-powerpc.h" -#define CONFIG_MISC_INIT_R /* * System Clock Setup */ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index add3dae5bb..e3dbbc83e6 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -80,7 +80,6 @@ "" #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#define CONFIG_MISC_INIT_R /* * NS16550 Configuration @@ -125,14 +124,12 @@ * Other required minimal configurations */ #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ -#define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ /* * Ethernet Driver configuration */ #define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_MII /* expose smi ove miiphy interface */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 73506c4e57..0592c9a699 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -187,7 +187,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */ #define CONFIG_MISC_INIT_F -#define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index 0dc708e480..080eec47ca 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 1 /* Eth Configs */ -#define CONFIG_MII /* USB Configs */ #define CONFIG_USB_EHCI_MX5 @@ -88,7 +87,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * SZ_1M) #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE) diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index bf3cc174cd..704383090f 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M) /* FEC ethernet */ -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -116,7 +115,6 @@ #endif /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 016c2fd9ea..dd7ad3e659 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -24,7 +24,6 @@ #define KZM_SDRAM_BASE (0x40000000) #define PHYS_SDRAM KZM_SDRAM_BASE #define PHYS_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_NR_DRAM_BANKS (1) /* NOR Flash */ #define KZM_FLASH_BASE (0x00000000) diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 8af8fd5c63..1f619a0d27 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -47,7 +47,6 @@ /* * SDRAM configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* * Different SDRAM configuration and size for some of the boards derived @@ -74,7 +73,6 @@ /* * Enable platform initialisation via misc_init_r() function */ -#define CONFIG_MISC_INIT_R /* * Ethernet Driver configuration diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 7a0511f88e..c631e26785 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -37,8 +37,6 @@ /* memtest will be run on 16MB */ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - /* * Serial Driver info */ @@ -56,7 +54,6 @@ * I2C Configuration */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_DAVINCI_I2C_SPEED 400000 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ diff --git a/include/configs/libretech-cc.h b/include/configs/libretech-cc.h index b44d3bdd32..a0856f98da 100644 --- a/include/configs/libretech-cc.h +++ b/include/configs/libretech-cc.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - #define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0" #include <configs/meson-gx-common.h> diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 6af8e70be6..a97ccb50b2 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -112,7 +112,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -141,7 +140,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_ENET_DEV 0 #define IMX_FEC_BASE ENET_BASE_ADDR diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index d6baf166e4..71e4a8b427 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_CMD_MEMINFO #define CONFIG_SYS_MEMTEST_START 0x80000000 diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 73ac162ffb..7affabfdba 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_CMD_MEMINFO diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 35578c3e41..8129595d51 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -15,7 +15,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 -#define CONFIG_NR_DRAM_BANKS 2 #define SYS_SDRAM_SIZE_512 0x20000000 #define SYS_SDRAM_SIZE_1024 0x40000000 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index d508bf9055..c5bdea6798 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_CMD_MEMINFO #define CONFIG_SYS_MEMTEST_START 0x80000000 @@ -118,6 +117,4 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff -#define CONFIG_MISC_INIT_R - #endif /* __LS1012AQDS_H__ */ diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 24980f8bbf..17554ea955 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_CMD_MEMINFO #define CONFIG_SYS_MEMTEST_START 0x80000000 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 97792be6a8..10dc0c6843 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -82,8 +82,6 @@ #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -152,7 +150,6 @@ */ #ifdef CONFIG_TSEC_ENET -#define CONFIG_MII #define CONFIG_MII_DEFAULT_TSEC 1 #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" @@ -249,8 +246,6 @@ #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_MISC_INIT_R - #include <asm/fsl_secure_boot.h> #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 79a84c4a64..994e6ca362 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -85,8 +85,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MONITOR_LEN 0x80000 #endif -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_DDR_SPD #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -405,7 +403,6 @@ unsigned long get_board_ddr_clk(void); */ #ifdef CONFIG_TSEC_ENET -#define CONFIG_MII #define CONFIG_MII_DEFAULT_TSEC 3 #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" @@ -524,8 +521,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif -#define CONFIG_MISC_INIT_R - #include <asm/fsl_secure_boot.h> #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index cf23c33d85..75b2e2fbbd 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -98,7 +98,6 @@ #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) @@ -269,7 +268,6 @@ */ #ifdef CONFIG_TSEC_ENET -#define CONFIG_MII #define CONFIG_MII_DEFAULT_TSEC 1 #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" @@ -505,8 +503,6 @@ #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif -#define CONFIG_MISC_INIT_R - #include <asm/fsl_secure_boot.h> #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index f4a0cc070e..68f202f97a 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -23,7 +23,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_DDR_SPD #define SPD_EEPROM_ADDRESS 0x51 @@ -362,7 +361,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_MISC_INIT_R #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 9b24056985..bc639e586f 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -12,12 +12,10 @@ #define CONFIG_DDR_CLK_FREQ 100000000 #define CONFIG_LAYERSCAPE_NS_ACCESS -#define CONFIG_MISC_INIT_R #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index e873682766..8edaf190d0 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -23,7 +23,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_DDR_SPD #define SPD_EEPROM_ADDRESS 0x51 @@ -387,7 +386,6 @@ unsigned long get_board_ddr_clk(void); /* * Miscellaneous configurable options */ -#define CONFIG_MISC_INIT_R #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 87d8cf5374..ffca410b1a 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -12,12 +12,10 @@ #define CONFIG_DDR_CLK_FREQ 100000000 #define CONFIG_LAYERSCAPE_NS_ACCESS -#define CONFIG_MISC_INIT_R #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_DDR_SPD #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 031c311a3c..2d6a5fc3d4 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -166,8 +166,6 @@ unsigned long long get_qixis_addr(void); /* Physical Memory Map */ #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_NR_DRAM_BANKS 2 - #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index d2c80fc3b6..25f680c864 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -464,7 +464,6 @@ unsigned long get_board_ddr_clk(void); #define XQSGMII_CARD_PHY4_PORT2_ADDR 0xe #define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 36243f92c1..eb220bf6e9 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -8,8 +8,6 @@ #include "ls1088a_common.h" -#define CONFIG_MISC_INIT_R - #if defined(CONFIG_QSPI_BOOT) #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_SECT_SIZE 0x40000 @@ -443,7 +441,6 @@ #define QSGMII2_PORT3_PHY_ADDR 0x1e #define QSGMII2_PORT4_PHY_ADDR 0x1f -#define CONFIG_MII #define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_PHY_GIGE #endif diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 5024f97326..e756844c6a 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -163,8 +163,6 @@ unsigned long long get_qixis_addr(void); /* fixme: these need to be checked against the board */ #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_NR_DRAM_BANKS 3 - #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 81a092b0db..c04448d0c2 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -426,7 +426,6 @@ unsigned long get_board_ddr_clk(void); #define XQSGMII_CARD_PHY4_PORT2_ADDR 0xe #define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "DPMAC1@xgmii" #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 84c6b7b2ab..3d53a69e8a 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -320,8 +320,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif -#define CONFIG_MISC_INIT_R - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 0) \ @@ -479,7 +477,6 @@ unsigned long get_board_sys_clk(void); #define AQ_PHY_ADDR4 0x03 #define AQR405_IRQ_MASK 0x36 -#define CONFIG_MII #define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_PHY_AQUANTIA #endif diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 8d1f0aac1d..9d4be18413 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -29,7 +29,6 @@ #define CONFIG_KW88F6281 /* SOC Name */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ -#define CONFIG_MISC_INIT_R #define CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_KIRKWOOD_GPIO diff --git a/include/configs/malta.h b/include/configs/malta.h index 363a2a6494..ba3639d177 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -19,7 +19,6 @@ #define CONFIG_PCNET_79C973 #define PCNET_HAS_PROM -#define CONFIG_MISC_INIT_R #define CONFIG_RTC_MC146818 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 0816fae365..0cda1f6248 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -85,7 +85,6 @@ /* Ethernet Configuration */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -275,7 +274,6 @@ "fi;\0" /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 0cad187a3c..5f7423b717 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -26,8 +26,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -60,7 +58,6 @@ * select serial console configuration */ #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* UART3 */ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -81,8 +78,6 @@ /* * Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access */ /* nand at CS0 */ @@ -213,7 +208,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 @@ -289,9 +283,7 @@ * */ #if defined(CONFIG_CMD_NET) -#define CONFIG_DRIVER_TI_EMAC #define CONFIG_DRIVER_TI_EMAC_USE_RMII -#define CONFIG_MII #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 @@ -299,6 +291,5 @@ #define CONFIG_SPLASH_SCREEN #define CONFIG_VIDEO_BMP_RLE8 -#define CONFIG_VIDEO_OMAP3 #endif /* __CONFIG_H */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index dcf504b1cb..0a03a2f5c7 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -39,7 +39,6 @@ #define CONFIG_SERIAL_TAG #define CONFIG_REVISION_TAG #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ -#define CONFIG_MISC_INIT_R /* Call misc_init_r */ #define CONFIG_PREBOOT /* enable preboot variable */ @@ -59,7 +58,6 @@ #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE diff --git a/include/configs/meson-gx-common.h b/include/configs/meson-gx-common.h index 7435f3475e..c46522ef7e 100644 --- a/include/configs/meson-gx-common.h +++ b/include/configs/meson-gx-common.h @@ -9,7 +9,6 @@ #define CONFIG_CPU_ARMV8 #define CONFIG_REMAKE_ELF -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MAXARGS 32 #define CONFIG_SYS_MALLOC_LEN (32 << 20) diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 9624fc5ee8..2562bb05d6 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -170,10 +170,7 @@ #define CONFIG_LMB 1 #if defined(CONFIG_XILINX_AXIEMAC) -# define CONFIG_MII 1 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 -#else -# undef CONFIG_MII #endif /* SPL part */ diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 459eae820a..d0fe582c90 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_MISC_INIT_R - #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" \ diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index e978734bab..6752ef66da 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -337,7 +337,6 @@ /* * TSEC ethernet configuration */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2_NAME "eTSEC1" #define TSEC1_PHY_ADDR 1 diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h index 3b11cc0e50..e590364441 100644 --- a/include/configs/mt_ventoux.h +++ b/include/configs/mt_ventoux.h @@ -39,7 +39,6 @@ #define CONFIG_SPLASH_SCREEN #define CONFIG_VIDEO_BMP_RLE8 -#define CONFIG_VIDEO_OMAP3 /* DSS Support */ #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_TAM3517_SETTINGS \ "bootcmd=run net_nfs\0" diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 8ae521f7e9..5eeb5a1624 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -70,17 +70,6 @@ /* ====> Include platform Common Definitions */ #include <asm/arch/config.h> -/* - * DRAM Banks configuration, Custom config can be done in <board>.h - */ -#ifndef CONFIG_NR_DRAM_BANKS -#define CONFIG_NR_DRAM_BANKS CONFIG_NR_DRAM_BANKS_MAX -#else -#if (CONFIG_NR_DRAM_BANKS > CONFIG_NR_DRAM_BANKS_MAX) -#error CONFIG_NR_DRAM_BANKS Configurated more than available -#endif -#endif /* CONFIG_NR_DRAM_BANKS */ - /* ====> Include driver Common Definitions */ /* * Common NAND configuration diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 5015bc74bb..cf9440f90c 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -13,8 +13,6 @@ /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_NR_DRAM_BANKS 1 - /* auto boot */ #define CONFIG_PREBOOT diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 9205bd9632..93c50488a2 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -14,8 +14,6 @@ /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_NR_DRAM_BANKS 1 - /* auto boot */ #define CONFIG_PREBOOT diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index abebda4292..330f020f78 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -11,7 +11,6 @@ /* U-Boot Commands */ /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index b7ac9c2534..da1d53c883 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -14,7 +14,6 @@ /* U-Boot Commands */ /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 166f3d1861..6537e3a204 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -28,7 +28,6 @@ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) @@ -62,7 +61,6 @@ /* Ethernet */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0x1f -#define CONFIG_MII #define CONFIG_ENV_OVERWRITE /* ESDHC driver */ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index c060d56328..1117139f1c 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -14,7 +14,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 3ec3126233..7d84d160b4 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -86,7 +86,6 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 49d923b8eb..383ba9bbf0 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -87,8 +87,6 @@ #define IMX_FEC_BASE FEC_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1F -#define CONFIG_MII - #define CONFIG_ARP_TIMEOUT 200UL /* @@ -103,7 +101,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) #define PHYS_SDRAM_2 CSD1_BASE_ADDR diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 7cccca018a..eb172c97b3 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -55,7 +55,6 @@ /* * Eth Configs */ -#define CONFIG_MII #define CONFIG_FEC_MXC #define IMX_FEC_BASE FEC_BASE_ADDR @@ -167,7 +166,6 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index d15a4cab3c..46ff99b449 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -46,7 +46,6 @@ /* Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_MII /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -154,7 +153,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) #define PHYS_SDRAM_2 CSD1_BASE_ADDR diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 5752bf1790..3ed5ee3c57 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -36,7 +36,6 @@ /* bootz: zImage/initrd.img support */ /* Eth Configs */ -#define CONFIG_MII #define IMX_FEC_BASE FEC_BASE_ADDR #define CONFIG_ETHPRIME "FEC0" #define CONFIG_FEC_MXC_PHYADDR 0x1F @@ -140,7 +139,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) #define PHYS_SDRAM_2 CSD1_BASE_ADDR diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 3bfba35afc..17ff13df3e 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 2 /* Eth Configs */ -#define CONFIG_MII #define CONFIG_FEC_MXC #define IMX_FEC_BASE FEC_BASE_ADDR @@ -107,7 +106,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 0c74e563a0..816164e87e 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -32,7 +32,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 2 /* Eth Configs */ -#define CONFIG_MII #define CONFIG_FEC_MXC #define IMX_FEC_BASE FEC_BASE_ADDR @@ -150,7 +149,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) #define PHYS_SDRAM_2 CSD1_BASE_ADDR diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index e08e83151f..bbd4cd78cd 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -26,7 +26,6 @@ #define CONFIG_IMX_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000 -#define CONFIG_MISC_INIT_R #define CONFIG_BOARD_LATE_INIT #define CONFIG_REVISION_TAG @@ -38,7 +37,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 2 /* Eth Configs */ -#define CONFIG_MII #define CONFIG_FEC_MXC #define IMX_FEC_BASE FEC_BASE_ADDR @@ -102,7 +100,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ PPD_CONFIG_NFS \ - "bootlimit=10\0" \ "image=/boot/fitImage\0" \ "fdt_high=0xffffffff\0" \ "dev=mmc\0" \ @@ -179,7 +176,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) #define PHYS_SDRAM_2 CSD1_BASE_ADDR diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index 0887fe7d61..e606ee81b5 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -38,7 +38,6 @@ /* Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_MII #define CONFIG_FEC_MXC #define IMX_FEC_BASE FEC_BASE_ADDR @@ -99,7 +98,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) #define PHYS_SDRAM_2 CSD1_BASE_ADDR diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 7fa63fd935..a62e14f7c6 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -29,7 +29,6 @@ /* Ethernet Configuration */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 @@ -134,7 +133,6 @@ #endif /* CONFIG_SPL_BUILD */ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index fea0cada2a..58d5ebf564 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 7664b22476..6e4e751935 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 @@ -107,7 +106,6 @@ #define CONFIG_SYS_MEMTEST_END 0x10010000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 99ecc412a6..711aa82f9c 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -174,7 +173,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 4eac330a5c..a80a656c3b 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -33,7 +33,6 @@ #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 @@ -120,7 +119,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index 4d095361e0..fb8f44684b 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -113,7 +113,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_128M) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_2G diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 4510ebfe36..058856ac86 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -95,7 +95,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -128,7 +127,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index f5ca2fcf04..dc4181dbf8 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -127,7 +127,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -151,7 +150,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index da2a67fc21..3ad2518dce 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -147,7 +147,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -185,7 +184,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_ENET_DEV 1 #if (CONFIG_FEC_ENET_DEV == 0) diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 10d0969ac3..c64d0929ab 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -133,7 +133,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 87d2b52ef1..11fcc9f158 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -20,7 +20,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 @@ -169,7 +168,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 9f8c0641d0..3d32ff17ac 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -73,7 +73,6 @@ #define CONFIG_SYS_MAXARGS 256 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x60000000 #define PHYS_SDRAM_SIZE SZ_1G diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 0fe0770e13..9e59e7a4dc 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -111,7 +111,6 @@ /* FEC Ethernet on SoC */ #ifdef CONFIG_FEC_MXC -#define CONFIG_MII #ifndef CONFIG_ETHPRIME #define CONFIG_ETHPRIME "FEC0" #endif diff --git a/include/configs/nanopi-k2.h b/include/configs/nanopi-k2.h index f7ecb7be18..ef53f20c0f 100644 --- a/include/configs/nanopi-k2.h +++ b/include/configs/nanopi-k2.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - /* Serial setup */ #define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-nanopi-k2.dtb\0" diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 4e375d88d1..c364442244 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -16,7 +16,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_MISC_INIT_R #define CONFIG_USBD_HS #define CONFIG_NETCONSOLE @@ -54,7 +53,6 @@ #endif #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -147,7 +145,6 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 40e735101b..453dd32fbd 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -40,7 +40,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R #define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */ #define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */ @@ -73,7 +72,6 @@ * select serial console configuration */ #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -93,8 +91,6 @@ /* * TWL4030 */ -#define CONFIG_TWL4030_LED -#define CONFIG_TWL4030_KEYPAD #define GPIO_SLIDE 71 @@ -322,7 +318,6 @@ int rx51_kp_getc(struct stdio_dev *sdev); /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 /* diff --git a/include/configs/novena.h b/include/configs/novena.h index 81f7d471aa..25736f3c03 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -9,7 +9,6 @@ #define __CONFIG_H /* System configurations */ -#define CONFIG_MISC_INIT_R #define CONFIG_KEYBOARD #include "mx6_common.h" @@ -39,7 +38,6 @@ #define CONFIG_HOSTNAME "novena" /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -62,7 +60,6 @@ /* Ethernet Configuration */ #ifdef CONFIG_CMD_NET #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h index 913943421a..d117b183aa 100644 --- a/include/configs/odroid-c2.h +++ b/include/configs/odroid-c2.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - /* Serial setup */ #define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxbb-odroidc2.dtb\0" diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 67a790ef02..ad77242e38 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -21,7 +21,6 @@ #define CONFIG_MACH_TYPE 4289 -#define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE @@ -37,7 +36,6 @@ #include <linux/sizes.h> /* select serial console configuration */ -#define CONFIG_SERIAL1 /* Console configuration */ @@ -189,7 +187,6 @@ */ #define CONFIG_MISC_COMMON #define CONFIG_BOARD_TYPES -#define CONFIG_MISC_INIT_R #undef CONFIG_REVISION_TAG diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index f495f6219b..f683ee46e3 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -15,11 +15,9 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* select serial console configuration */ -#define CONFIG_SERIAL2 /* use SERIAL 2 */ #define TZPC_BASE_OFFSET 0x10000 -#define CONFIG_NR_DRAM_BANKS 8 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ /* Reserve the last 22 MiB for the secure firmware */ #define CONFIG_SYS_MEM_TOP_HIDE (22UL << 20UL) @@ -82,7 +80,6 @@ /* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */ #define CONFIG_MISC_COMMON -#define CONFIG_MISC_INIT_R #define CONFIG_SET_DFU_ALT_INFO #define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 1599b6f0ba..7698a90c4e 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -11,8 +11,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ - #include <configs/ti_omap3_common.h> /* @@ -22,7 +20,6 @@ #undef CONFIG_SPL_TEXT_BASE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -61,10 +58,8 @@ #define CONFIG_I2C_MULTI_BUS /* DSS Support */ -#define CONFIG_VIDEO_OMAP3 /* TWL4030 LED Support */ -#define CONFIG_TWL4030_LED /* Environment */ #define CONFIG_ENV_SIZE SZ_128K diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h index 72f04c3c18..04bce2f8b4 100644 --- a/include/configs/omap3_cairo.h +++ b/include/configs/omap3_cairo.h @@ -19,8 +19,6 @@ #ifndef __OMAP3_CAIRO_CONFIG_H #define __OMAP3_CAIRO_CONFIG_H -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ - /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM * 64 bytes before this address should be set aside for u-boot.img's @@ -36,8 +34,6 @@ #include <configs/ti_omap3_common.h> -#define CONFIG_MISC_INIT_R - #define CONFIG_REVISION_TAG 1 #define CONFIG_ENV_OVERWRITE @@ -50,7 +46,6 @@ /* * TWL4030 */ -#define CONFIG_TWL4030_LED 1 /* * Board NAND Info. @@ -203,8 +198,6 @@ * function per_clocks_enable(). */ #ifdef CONFIG_SPL_BUILD -#undef CONFIG_SERIAL3 -#define CONFIG_SERIAL2 #endif /* Provide the MACH_TYPE value the vendor kernel requires */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 34418309cb..07bcbc6f4e 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -16,8 +16,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ - #include <configs/ti_omap3_common.h> /* @@ -27,15 +25,11 @@ #undef CONFIG_SPL_TEXT_BASE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_MISC_INIT_R #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG -/* Override OMAP3 serial console configuration */ -#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 - /* NAND */ #if defined(CONFIG_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 4254330ee2..b9d6569752 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -9,8 +9,6 @@ #ifndef __IGEP00X0_H #define __IGEP00X0_H -#define CONFIG_NR_DRAM_BANKS 2 - #include <configs/ti_omap3_common.h> /* @@ -20,8 +18,6 @@ #undef CONFIG_SPL_TEXT_BASE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_MISC_INIT_R - #define CONFIG_REVISION_TAG 1 /* GPIO banks */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 3b65a8505f..2cbdbebb26 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -12,8 +12,6 @@ /* High Level Configuration Options */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ - #include <configs/ti_omap3_common.h> /* @@ -24,7 +22,6 @@ #undef CONFIG_SPL_TEXT_BASE #define CONFIG_SPL_TEXT_BASE 0x40200000 -#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -37,8 +34,6 @@ /* Board NAND Info. */ #ifdef CONFIG_NAND -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index a3d0e5fcaa..35f3af4ae9 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ - #include <configs/ti_omap3_common.h> /* * We are only ever GP parts and will utilize all of the "downloaded image" @@ -17,7 +15,6 @@ #define CONFIG_SPL_TEXT_BASE 0x40200000 /* call misc_init_r */ -#define CONFIG_MISC_INIT_R /* pass the revision tag */ #define CONFIG_REVISION_TAG @@ -32,7 +29,6 @@ /* I2C Support */ /* TWL4030 LED */ -#define CONFIG_TWL4030_LED /* USB EHCI */ #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183 @@ -51,8 +47,6 @@ #endif /* CONFIG_NAND */ /* Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 9259282729..5a82cbee71 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -9,13 +9,10 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ - /* override base for compatibility with MLO the device ships with */ #include <configs/ti_omap3_common.h> -#define CONFIG_MISC_INIT_R #define CONFIG_REVISION_TAG 1 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ @@ -27,7 +24,6 @@ */ /* TWL4030 LED */ -#define CONFIG_TWL4030_LED /* * NS16550 Configuration @@ -37,15 +33,12 @@ #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 /* commands to include */ /* * Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW #define CONFIG_SYS_NAND_PAGE_SIZE 2048 #define CONFIG_SYS_NAND_OOBSIZE 64 diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index c62b373de3..0a02ecdc14 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -12,7 +12,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #include <asm/arch/cpu.h> /* get chip and board defs */ #include <asm/arch/omap.h> #include <configs/ti_omap3_common.h> @@ -22,8 +21,6 @@ /* Generic NAND definition conflicts with debug_base */ #undef CONFIG_SYS_NAND_BASE -#define CONFIG_MISC_INIT_R - #define CONFIG_REVISION_TAG 1 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ @@ -51,13 +48,10 @@ /* * TWL4030 */ -#define CONFIG_TWL4030_LED 1 /* * Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 23dc0893f9..66bd288040 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_NS16550_COM3 UART3_BASE -#define CONFIG_MISC_INIT_R /* MMC ENV related defines */ #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ #define CONFIG_ENV_SIZE (128 << 10) diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index a68c18f625..39fdf063f2 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -13,7 +13,6 @@ /* * Board */ -#define CONFIG_DRIVER_TI_EMAC #undef CONFIG_USE_SPIFLASH #undef CONFIG_SYS_USE_NOR @@ -50,8 +49,6 @@ /* memtest will be run on 16MB */ #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ - #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ @@ -133,7 +130,6 @@ /* * I2C Configuration */ -#define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_DAVINCI_I2C_SPEED 25000 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 @@ -206,7 +202,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_MII #undef CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS2 @@ -217,7 +212,6 @@ /* * U-Boot general configuration */ -#define CONFIG_MISC_INIT_R #define CONFIG_BOOTFILE "zImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index b634d9eb03..70cf4665df 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -25,7 +25,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE @@ -51,7 +50,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1 #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_MII #endif /* LCD */ diff --git a/include/configs/origen.h b/include/configs/origen.h index 65e1c7c0c7..1acc42f964 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_DCACHE_OFF 1 /* ORIGEN has 4 bank of DRAM */ -#define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ @@ -30,7 +29,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN /* select serial console configuration */ -#define CONFIG_SERIAL2 /* Console configuration */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index a4be49707b..776835a766 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -12,8 +12,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_MISC_INIT_R - /* UART Configs */ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE @@ -69,7 +67,6 @@ #endif #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE MII100 #define CONFIG_ETHPRIME "FEC" @@ -90,7 +87,6 @@ #define CONFIG_IMX_THERMAL /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 3aebc845cd..aa3f2277d6 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -642,7 +642,6 @@ #endif /* CONFIG_PCI */ #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1 #define CONFIG_TSEC1_NAME "eTSEC1" #define CONFIG_TSEC2 diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 2fff006cc2..5a6c9e0d14 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -256,7 +256,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1 #define CONFIG_TSEC1_NAME "eTSEC1" #undef CONFIG_TSEC2 diff --git a/include/configs/p212.h b/include/configs/p212.h index 53af6bc21c..2aa9f5d143 100644 --- a/include/configs/p212.h +++ b/include/configs/p212.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - /* Serial setup */ #define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-p212.dtb\0" diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index eddb201d4a..cfe8d8cbed 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -48,7 +48,4 @@ /* Crystal is 38.4MHz. clk_m runs at half that rate */ #define COUNTER_FREQUENCY 19200000 -#undef CONFIG_NR_DRAM_BANKS -#define CONFIG_NR_DRAM_BANKS (1024 + 2) - #endif diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 1885577ce5..9997795434 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -40,7 +40,6 @@ /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 @@ -189,7 +188,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical memory map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024) diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 6da624af6e..49048c163f 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -32,7 +32,6 @@ /* Ethernet */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -63,7 +62,6 @@ /* Filesystem support */ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index d90eb14f6f..a732e06a99 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) /* select serial console configuration */ -#define CONFIG_SERIAL3 /* use SERIAL 3 */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" /* Display */ @@ -37,7 +36,6 @@ #define CONFIG_POWER_TPS65090_EC /* DRAM Memory Banks */ -#define CONFIG_NR_DRAM_BANKS 7 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ #endif /* __CONFIG_PEACH_PI_H */ diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index b87b36a9c6..6c5960cb8d 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -24,11 +24,9 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) /* select serial console configuration */ -#define CONFIG_SERIAL3 /* use SERIAL 3 */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" /* DRAM Memory Banks */ -#define CONFIG_NR_DRAM_BANKS 4 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ #endif /* __CONFIG_PEACH_PIT_H */ diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index c54d50096f..48f1f7bacc 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -10,7 +10,6 @@ #ifndef __CONFIG_PENGWYN_H #define __CONFIG_PENGWYN_H -#define CONFIG_SERIAL1 #include <configs/ti_am335x_common.h> diff --git a/include/configs/pepper.h b/include/configs/pepper.h index 9ce45f2777..ef662d7000 100644 --- a/include/configs/pepper.h +++ b/include/configs/pepper.h @@ -70,7 +70,6 @@ "fi;" \ /* Serial console configuration */ -#define CONFIG_SERIAL1 1 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Ethernet support */ diff --git a/include/configs/pfla02.h b/include/configs/pfla02.h index 690efd74af..e2aae19484 100644 --- a/include/configs/pfla02.h +++ b/include/configs/pfla02.h @@ -29,7 +29,6 @@ #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) /* Ethernet */ -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -64,7 +63,6 @@ /* Various command support */ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index d3775023d0..374957737d 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -60,7 +60,6 @@ /*----------------------------------------------------------------------- * Networking Configuration */ -#define CONFIG_MII #define CONFIG_PHY_SMSC #define CONFIG_SYS_RX_ETH_BUFFER 8 #define CONFIG_NET_RETRY_COUNT 20 diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 038b0a4778..34ba53a2a9 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -16,7 +16,6 @@ /* Network support */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 #define CONFIG_FEC_XCV_TYPE RMII @@ -120,7 +119,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 13e735379e..4cc84ff5d4 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -31,7 +31,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 @@ -101,7 +100,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h index 585db0ef53..0b240e7ebc 100644 --- a/include/configs/picosam9g45.h +++ b/include/configs/picosam9g45.h @@ -66,7 +66,6 @@ */ /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ #define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */ diff --git a/include/configs/platinum.h b/include/configs/platinum.h index a780cca592..d1ebaf5561 100644 --- a/include/configs/platinum.h +++ b/include/configs/platinum.h @@ -36,7 +36,6 @@ /* Ethernet config */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR /* USB config */ @@ -45,7 +44,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* Memory config */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #ifndef PHYS_SDRAM_SIZE #define PHYS_SDRAM_SIZE (1024 << 20) @@ -96,7 +94,6 @@ */ /* Board startup config */ -#define CONFIG_MISC_INIT_R #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 015eeab21c..9dcb3b0c1b 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -154,7 +154,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE 1 /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 20ecccca57..803de1c02c 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -168,7 +168,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE 1 /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 275eac8319..46b8030894 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -65,7 +65,6 @@ #define CONFIG_JFFS2_PART_SIZE (256 * 1024 * 1024) /* partition */ /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x70000000 #define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */ diff --git a/include/configs/poplar.h b/include/configs/poplar.h index be4c20a7c7..0a126002d7 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -14,7 +14,6 @@ #include <linux/sizes.h> /* DRAM banks */ -#define CONFIG_NR_DRAM_BANKS 2 /* SYS */ #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h index c949a23b8b..45a4ccc18f 100644 --- a/include/configs/puma_rk3399.h +++ b/include/configs/puma_rk3399.h @@ -20,7 +20,6 @@ #define SDRAM_BANK_SIZE (2UL << 30) -#define CONFIG_MISC_INIT_R #define CONFIG_SERIAL_TAG #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index be516bac0c..913ff4f263 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -10,7 +10,6 @@ /* Physical memory map */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* The DTB generated by QEMU is placed at start of RAM, stay away from there */ diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index e55f3080e7..e5e192d11e 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -13,8 +13,6 @@ #define CONFIG_QEMU_MIPS -#define CONFIG_MISC_INIT_R - #define CONFIG_TIMESTAMP /* Print image info with timestamp */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h index 44c3af5e24..b19b8a5a26 100644 --- a/include/configs/qemu-mips64.h +++ b/include/configs/qemu-mips64.h @@ -13,8 +13,6 @@ #define CONFIG_QEMU_MIPS -#define CONFIG_MISC_INIT_R - #define CONFIG_TIMESTAMP /* Print image info with timestamp */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 75e6e1976b..c69535aa6d 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -41,7 +41,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#undef CONFIG_MII #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 4f24a0e7ef..2a5cd6b832 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -35,7 +35,6 @@ #define CONFIG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) #define CONFIG_SYS_LOAD_ADDR 0x50000000 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 07f08db4fe..435d108628 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define DRAM_RSV_SIZE 0x08000000 -#define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) #define CONFIG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE) #define CONFIG_SYS_LOAD_ADDR 0x58000000 diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 07c54b596b..d4e5406101 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -8,7 +8,6 @@ #include <asm/arch/hardware.h> #include "rockchip-common.h" -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT @@ -29,7 +28,6 @@ #define CONFIG_BOUNCE_BUFFER #define CONFIG_SYS_SDRAM_BASE 0x60000000 -#define CONFIG_NR_DRAM_BANKS 1 #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE) diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 94b0ae0d79..3e9e642b78 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -31,7 +31,6 @@ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_SDRAM_BASE 0x60000000 -#define CONFIG_NR_DRAM_BANKS 2 #define SDRAM_MAX_SIZE 0x80000000 #define CONFIG_SPI_FLASH diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 1a0f28d2a7..d1837d5c4e 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -12,7 +12,6 @@ #include "rockchip-common.h" #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 @@ -38,7 +37,6 @@ #define CONFIG_BOUNCE_BUFFER #define CONFIG_SYS_SDRAM_BASE 0x60000000 -#define CONFIG_NR_DRAM_BANKS 1 #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0x80000000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 5b9c4082da..176bd0c26c 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -29,7 +29,6 @@ #define CONFIG_BOUNCE_BUFFER #define CONFIG_SYS_SDRAM_BASE 0x60000000 -#define CONFIG_NR_DRAM_BANKS 2 #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE 0x80000000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 71ae3c2316..5388b1391e 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -10,7 +10,6 @@ #include "rockchip-common.h" #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 @@ -41,7 +40,6 @@ #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_NR_DRAM_BANKS 1 #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0xfe000000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 481044dc24..9174c67cad 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -28,7 +28,6 @@ /* FAT sd card locations. */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_NR_DRAM_BANKS 1 #define SDRAM_MAX_SIZE 0xff000000 #define CONFIG_SPI_FLASH diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 0e77866b40..6638491e79 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index ee38107ea5..eeda070752 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -8,7 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT @@ -39,7 +38,6 @@ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SF_DEFAULT_SPEED 20000000 diff --git a/include/configs/rpi.h b/include/configs/rpi.h index a97550b732..37be6dbeeb 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -39,7 +39,6 @@ #endif /* Memory layout */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE /* @@ -66,7 +65,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_TFTP_TSIZE -#define CONFIG_MISC_INIT_R #endif /* Console configuration */ diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index dc93775fb4..2ab3b85e0c 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) #define CONFIG_SYS_SDRAM_BASE 0x60000000 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x2000000) diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h index c6fb909174..216932046b 100644 --- a/include/configs/s32v234evb.h +++ b/include/configs/s32v234evb.h @@ -77,7 +77,6 @@ /* Ethernet config */ #define CONFIG_CMD_MII #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 @@ -167,7 +166,6 @@ /* Physical memory map */ /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM (DDR_BASE_ADDR) #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 80bd8b845e..87ddc20a52 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -39,7 +39,6 @@ /* * select serial console configuration */ -#define CONFIG_SERIAL2 1 /* use SERIAL2 */ /* MMC */ #define SDHCI_MAX_HOSTS 4 @@ -99,7 +98,6 @@ " onenand write 0x32008000 0x0 0x100000\0" #define CONFIG_MISC_COMMON -#define CONFIG_MISC_INIT_R #define CONFIG_ENV_OVERWRITE #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -156,7 +154,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000) /* Goni has 3 banks of DRAM, but swap the bank */ -#define CONFIG_NR_DRAM_BANKS 3 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index baa19b0dc3..999bdd1676 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -17,14 +17,12 @@ #define CONFIG_SYS_L2CACHE_OFF 1 /* Universal has 2 banks of DRAM */ -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* select serial console configuration */ -#define CONFIG_SERIAL2 /* Console configuration */ @@ -144,8 +142,6 @@ int universal_spi_read(void); /* Common misc for Samsung */ #define CONFIG_MISC_COMMON -#define CONFIG_MISC_INIT_R - /* Download menu - Samsung common */ #define CONFIG_LCD_MENU diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 0cae301da2..6192328965 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -14,10 +14,7 @@ #undef CONFIG_SYS_AT91_MAIN_CLOCK #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ -#define CONFIG_MISC_INIT_R - /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x8000000 diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h index d2d4adbb7f..87a0a74b31 100644 --- a/include/configs/sama5d2_ptc_ek.h +++ b/include/configs/sama5d2_ptc_ek.h @@ -15,10 +15,7 @@ #undef CONFIG_SYS_AT91_MAIN_CLOCK #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ -#define CONFIG_MISC_INIT_R - /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index b205d8d604..92f7f0df0e 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -11,10 +11,7 @@ #include "at91-sama5_common.h" -#define CONFIG_MISC_INIT_R - /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index acfb2d7014..d0d8087ca3 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -23,7 +23,6 @@ #define ATMEL_PMC_UHP (1 << 6) /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x10000000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 82e1a16a40..9987484a00 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -39,7 +39,6 @@ #endif /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 42e5a86941..7f8ac178f3 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -11,10 +11,7 @@ #include "at91-sama5_common.h" -#define CONFIG_MISC_INIT_R - /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index c36b5084e5..aa8573d8ba 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -12,7 +12,6 @@ #include "at91-sama5_common.h" /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 1a49d1dab5..e36a5fec0e 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -55,7 +55,6 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_SDRAM_SIZE (128 << 20) #define CONFIG_SYS_MONITOR_BASE 0 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h index ddbb5a27e0..1beff234db 100644 --- a/include/configs/sansa_fuze_plus.h +++ b/include/configs/sansa_fuze_plus.h @@ -8,7 +8,6 @@ /* U-Boot Commands */ /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 0289d1b267..dfcf8491cb 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -449,7 +449,6 @@ #if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index a620f0d2b4..c509822814 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -304,9 +304,6 @@ #endif /* CONFIG_PCI */ #if defined(CONFIG_TSEC_ENET) - -/* #define CONFIG_MII 1 */ /* MII PHY management */ - #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define CONFIG_TSEC2 1 diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index fbd977abf5..cc108920dc 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -14,7 +14,6 @@ /* U-Boot Commands */ /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h index ead9bddf7f..2d219b2b5f 100644 --- a/include/configs/secomx6quq7.h +++ b/include/configs/secomx6quq7.h @@ -27,7 +27,6 @@ /* Ethernet Configuration */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -65,7 +64,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 97903a08e1..d8ed02bf79 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -64,7 +64,6 @@ #define CONFIG_SF_DEFAULT_SPEED (75000000) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 @@ -83,7 +82,6 @@ #define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CONFIG_SYS_NS16550_COM4 0x481a6000 -#define CONFIG_SERIAL1 1 /* I2C Configuration */ #define CONFIG_I2C @@ -188,7 +186,6 @@ # define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ #endif /* SPI support */ -#define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME @@ -239,7 +236,6 @@ "project_dir=targetdir\0" \ "upgrade_available=0\0" \ "altbootcmd=run bootcmd\0" \ - "bootlimit=3\0" \ "partitionset_active=A\0" \ "loadaddr=0x82000000\0" \ "kloadaddr=0x81000000\0" \ diff --git a/include/configs/sksimx6.h b/include/configs/sksimx6.h index 6f6cb1ecea..4f7ec2d7e9 100644 --- a/include/configs/sksimx6.h +++ b/include/configs/sksimx6.h @@ -26,7 +26,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0x01 -#define CONFIG_MII #define CONFIG_PHY_MICREL_KSZ9021 /* I2C Configs */ @@ -38,7 +37,6 @@ /* Filesystem support */ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 292da54162..114b87e1b3 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -62,7 +62,6 @@ * SDRAM: 1 bank, 64 MB, base address 0x20000000 * Already initialized before u-boot gets started. */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index dd7ded6d7a..14ec099d53 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) /* select serial console configuration */ -#define CONFIG_SERIAL3 /* use SERIAL 3 */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" @@ -34,7 +33,6 @@ #define CONFIG_USB_XHCI_EXYNOS /* DRAM Memory Banks */ -#define CONFIG_NR_DRAM_BANKS 7 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ #endif /* __CONFIG_SMDK5420_H */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index aa43798c42..b934ee70d5 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -44,7 +44,6 @@ /* * select serial console configuration */ -#define CONFIG_SERIAL0 1 /* use SERIAL 0 on SMDKC100 */ /* PWM */ #define CONFIG_PWM 1 @@ -118,7 +117,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE (128 << 20) /* 0x8000000, 128 MB Bank #1 */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 3446489e14..6da713728f 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -28,7 +28,6 @@ #define S5P_CHECK_LPA 0xABAD0000 /* select serial console configuration */ -#define CONFIG_SERIAL1 1 /* use SERIAL 1 */ #define EXYNOS4_DEFAULT_UART_OFFSET 0x010000 /* allow to overwrite serial and ethaddr */ @@ -50,7 +49,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) /* SMDKV310 has 4 bank of DRAM */ -#define CONFIG_NR_DRAM_BANKS 4 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index b0d1f44976..f212d154e9 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -27,7 +27,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */ #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 32b42a8759..f2c47dabc5 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -25,7 +25,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 7a665f64e1..aa78684b02 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -21,8 +21,6 @@ * Board */ -#define CONFIG_MISC_INIT_R - /* * Clocks */ @@ -38,7 +36,6 @@ * DRAM */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 @@ -63,8 +60,6 @@ * Input */ -#define CONFIG_TWL4030_INPUT - /* * SPL */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 8ebf6b85fe..440a918fc7 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -20,7 +20,6 @@ /* * Memory configurations */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x0 #define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 @@ -75,7 +74,6 @@ */ #ifdef CONFIG_CMD_NET #define CONFIG_DW_ALTDESCRIPTOR -#define CONFIG_MII #endif /* diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index e63fe29078..b58f478004 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -131,7 +131,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define PHYS_SDRAM_1 0x0 #define PHYS_SDRAM_1_SIZE (1 * 1024 * 1024 * 1024) #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MEMTEST_START 0 #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE - 0x200000 @@ -166,7 +165,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) #define CONFIG_DW_ALTDESCRIPTOR -#define CONFIG_MII #endif /* CONFIG_CMD_NET */ /* diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index e39147e979..5517ed722d 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -171,8 +171,6 @@ #define CONFIG_ENV_OFFSET_REDUND \ (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) -#define CONFIG_MISC_INIT_R - /* Support changing the prompt string */ #define CONFIG_CMDLINE_PS_SUPPORT diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 2c897cdf29..dd950f3473 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -21,8 +21,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ - /* * Only possible on E500 Version 2 or newer cores. */ @@ -220,7 +218,6 @@ #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_TSEC3 1 diff --git a/include/configs/som-6896.h b/include/configs/som-6896.h deleted file mode 100644 index f0e8d612fa..0000000000 --- a/include/configs/som-6896.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration settings for the SOM-6896 - * - * Copyright (C) 2015 NovaTech LLC - * George McCollister <george.mccollister@gmail.com> - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <configs/x86-common.h> - -#define CONFIG_SYS_MONITOR_LEN (1 << 20) - -#define CONFIG_MISC_INIT_R - -#define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO - -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ - "stdout=serial,vidconsole\0" \ - "stderr=serial,vidconsole\0" - -#define CONFIG_ENV_SECT_SIZE 0x1000 -#define CONFIG_ENV_OFFSET 0x00ff0000 - -#endif /* __CONFIG_H */ diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index b91b999129..ea5996fe1e 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -13,7 +13,6 @@ /* U-Boot Load Address */ /* Ethernet driver configuration */ -#define CONFIG_MII #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ /* USBD driver configuration */ @@ -155,7 +154,6 @@ #define CONFIG_BOOT_PARAMS_ADDR 0x00000100 #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_MISC_INIT_R #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 @@ -165,7 +163,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 #define PHYS_SDRAM_1_MAXSIZE 0x40000000 diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 9ce31f4463..b67efbb168 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -10,7 +10,6 @@ #include <linux/sizes.h> /* ram memory-related information */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x40000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_1_SIZE 0x3E000000 diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 46eda1d518..31c17d0818 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -7,23 +7,13 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - #define CONFIG_SYS_FLASH_BASE 0x08000000 #define CONFIG_SYS_INIT_SP_ADDR 0x10010000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF - /* * Configuration of the external SDRAM memory */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_RAM_CS 1 -#define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0x90000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE #define CONFIG_SYS_LOAD_ADDR 0x90400000 #define CONFIG_LOADADDR 0x90400000 @@ -39,8 +29,6 @@ #define CONFIG_STM32_FLASH -#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */ - #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_CMDLINE_TAG diff --git a/include/configs/stm32f429-evaluation.h b/include/configs/stm32f429-evaluation.h index 67cb584165..a5390f8742 100644 --- a/include/configs/stm32f429-evaluation.h +++ b/include/configs/stm32f429-evaluation.h @@ -7,22 +7,13 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - #define CONFIG_SYS_FLASH_BASE 0x08000000 #define CONFIG_SYS_INIT_SP_ADDR 0x10010000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF - /* * Configuration of the external SDRAM memory */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE #define CONFIG_SYS_LOAD_ADDR 0x00400000 #define CONFIG_LOADADDR 0x00400000 @@ -35,7 +26,6 @@ #define CONFIG_STM32_FLASH -#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_CMDLINE_TAG @@ -47,11 +37,20 @@ #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_BOOTCOMMAND \ - "run boot_sd" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "boot_sd=mmc dev 0;fatload mmc 0 0x00700000 stm32429i-eval.dtb; fatload mmc 0 0x00008000 zImage; icache off; bootz 0x00008000 - 0x00700000" +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#include <config_distro_bootcmd.h> +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0x00008000\0" \ + "fdtfile=stm32429i-eval.dtb\0" \ + "fdt_addr_r=0x00700000\0" \ + "scriptaddr=0x00800000\0" \ + "pxefile_addr_r=0x00800000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "ramdisk_addr_r=0x00900000\0" \ + BOOTENV /* * Command line configuration. diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h index b5259ee214..1c7efd13b8 100644 --- a/include/configs/stm32f469-discovery.h +++ b/include/configs/stm32f469-discovery.h @@ -7,22 +7,13 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MISC_INIT_R - #define CONFIG_SYS_FLASH_BASE 0x08000000 #define CONFIG_SYS_INIT_SP_ADDR 0x10010000 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF - /* * Configuration of the external SDRAM memory */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE #define CONFIG_SYS_LOAD_ADDR 0x00400000 #define CONFIG_LOADADDR 0x00400000 @@ -35,7 +26,6 @@ #define CONFIG_STM32_FLASH -#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_CMDLINE_TAG @@ -47,11 +37,20 @@ #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_BOOTCOMMAND \ - "run boot_sd" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "boot_sd=mmc dev 0;fatload mmc 0 0x00700000 stm32f469-disco.dtb; fatload mmc 0 0x00008000 zImage; icache off; bootz 0x00008000 - 0x00700000" +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#include <config_distro_bootcmd.h> +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0x00008000\0" \ + "fdtfile=stm32f469-disco.dtb\0" \ + "fdt_addr_r=0x00700000\0" \ + "scriptaddr=0x00800000\0" \ + "pxefile_addr_r=0x00800000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "ramdisk_addr_r=0x00900000\0" \ + BOOTENV /* * Command line configuration. diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 567e7f2a00..dae402f91b 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -20,7 +20,6 @@ /* * Configuration of the external SDRAM memory */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 8 #define CONFIG_SYS_MAX_FLASH_BANKS 1 @@ -31,10 +30,8 @@ #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) #define CONFIG_DW_ALTDESCRIPTOR -#define CONFIG_MII #define CONFIG_PHY_SMSC -#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */ #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_CMDLINE_TAG @@ -58,7 +55,6 @@ /* * Command line configuration. */ -#define CONFIG_CMD_CACHE #define CONFIG_BOARD_LATE_INIT #define CONFIG_DISPLAY_BOARDINFO diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h index 5b6ee76e7c..f110e2994c 100644 --- a/include/configs/stm32h743-disco.h +++ b/include/configs/stm32h743-disco.h @@ -15,9 +15,6 @@ /* * Configuration of the external SDRAM memory */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_RAM_BASE 0xD0000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE #define CONFIG_SYS_LOAD_ADDR 0xD0400000 #define CONFIG_LOADADDR 0xD0400000 @@ -33,13 +30,24 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_BOOTARGS \ - "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#include <config_distro_bootcmd.h> +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0xD0008000\0" \ + "fdtfile=stm32h743i-disco.dtb\0" \ + "fdt_addr_r=0xD0700000\0" \ + "scriptaddr=0xD0800000\0" \ + "pxefile_addr_r=0xD0800000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "ramdisk_addr_r=0xD0900000\0" \ + BOOTENV /* * Command line configuration. */ -#define CONFIG_CMD_CACHE #define CONFIG_BOARD_LATE_INIT #endif /* __CONFIG_H */ diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h index 5b6ee76e7c..e3bf5b27e8 100644 --- a/include/configs/stm32h743-eval.h +++ b/include/configs/stm32h743-eval.h @@ -15,9 +15,6 @@ /* * Configuration of the external SDRAM memory */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_RAM_BASE 0xD0000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE #define CONFIG_SYS_LOAD_ADDR 0xD0400000 #define CONFIG_LOADADDR 0xD0400000 @@ -33,13 +30,24 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_BOOTARGS \ - "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#include <config_distro_bootcmd.h> +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0xD0008000\0" \ + "fdtfile=stm32h743i-eval.dtb\0" \ + "fdt_addr_r=0xD0700000\0" \ + "scriptaddr=0xD0800000\0" \ + "pxefile_addr_r=0xD0800000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "ramdisk_addr_r=0xD0900000\0" \ + BOOTENV /* * Command line configuration. */ -#define CONFIG_CMD_CACHE #define CONFIG_BOARD_LATE_INIT #endif /* __CONFIG_H */ diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 09ec429b1f..701298cab8 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -33,8 +33,6 @@ #define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -#define CONFIG_NR_DRAM_BANKS 1 - /* * Console I/O buffer size */ diff --git a/include/configs/strider.h b/include/configs/strider.h index 0757c89f7e..9b89031965 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -502,7 +502,6 @@ void fpga_control_clear(unsigned int bus, int pin); /* * TSEC ethernet configuration */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 #define CONFIG_TSEC1_NAME "eTSEC0" #define TSEC1_PHY_ADDR 1 diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 9ce610ab18..3177b7a759 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH /* ram memory-related information */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_1_SIZE 0x00198000 @@ -37,7 +36,6 @@ /* GMAC related configs */ -#define CONFIG_MII #define CONFIG_DW_ALTDESCRIPTOR /* Command support defines */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 93690481a1..9819d9980c 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -101,7 +101,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ @@ -154,8 +153,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #endif #define CONFIG_SYS_MMC_MAX_DEVICE 4 -#elif defined(CONFIG_ENV_IS_NOWHERE) -#define CONFIG_ENV_SIZE (128 << 10) #endif #ifndef CONFIG_MACH_SUN8I_V3S @@ -291,12 +288,8 @@ extern int soft_i2c_gpio_scl; #endif /* CONFIG_VIDEO_SUNXI */ /* Ethernet support */ -#ifdef CONFIG_SUN4I_EMAC -#define CONFIG_MII /* MII PHY management */ -#endif #ifdef CONFIG_SUN7I_GMAC -#define CONFIG_MII /* MII PHY management */ #define CONFIG_PHY_REALTEK #endif @@ -310,8 +303,6 @@ extern int soft_i2c_gpio_scl; #define CONFIG_PREBOOT #endif -#define CONFIG_MISC_INIT_R - #ifndef CONFIG_SPL_BUILD #ifdef CONFIG_ARM64 diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index b65b6334f8..bca5961206 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -89,8 +89,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_MISC_INIT_R - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -210,7 +208,6 @@ #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC1" #endif diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index a7d3d0822b..dd71d89840 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -20,8 +20,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -53,7 +51,6 @@ * select serial console configuration */ #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 -#define CONFIG_SERIAL1 /* UART1 */ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -103,7 +100,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 @@ -132,9 +128,7 @@ * ethernet support, EMAC * */ -#define CONFIG_DRIVER_TI_EMAC #define CONFIG_DRIVER_TI_EMAC_USE_RMII -#define CONFIG_MII #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 4b596c680a..1384a35c0c 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -23,8 +23,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -65,13 +63,10 @@ /* * TWL4030 */ -#define CONFIG_TWL4030_LED /* * Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ @@ -156,7 +151,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 3056f49428..4fdb0dd962 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -58,7 +58,6 @@ * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 092eef81cb..a60223c623 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -19,7 +19,6 @@ #define CONFIG_IMX_THERMAL /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -51,7 +50,6 @@ /* Ethernet */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index d8ae9d1e0d..4d249ddfd2 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -65,7 +65,6 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ diff --git a/include/configs/thuban.h b/include/configs/thuban.h index 91cfba7e07..569df9e4d8 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -34,7 +34,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#undef CONFIG_MII #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index d71d207621..619571d45b 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -48,7 +48,6 @@ #define CONFIG_SYS_LOAD_ADDR (MEM_BASE) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index a81f3b8201..05ba83b1f5 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -97,7 +97,6 @@ /** * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 banks of DRAM */ #define PHYS_DRAM_1_SIZE 0x20000000 /* 512MB */ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */ @@ -154,7 +153,6 @@ #endif /* Ethernet */ -#define CONFIG_MII #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 68400a86fc..e622f4a00b 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -52,9 +52,6 @@ /* allow overwriting serial config and ethaddr */ #define CONFIG_ENV_OVERWRITE -#define CONFIG_SERIAL1 -#define CONFIG_SERIAL2 -#define CONFIG_SERIAL3 /* * GPMC NAND block. We support 1 device and the physical address to @@ -97,8 +94,6 @@ #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) -#define CONFIG_DRIVER_TI_EMAC -#define CONFIG_MII #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index f1c297ca93..68f64655a7 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -31,7 +31,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_MII /* Required in net/eth.c */ #endif /* diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 57f27cb90e..55b9b45eec 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -64,9 +64,6 @@ * initial stack pointer in our SRAM. Otherwise, we can define * CONFIG_NR_DRAM_BANKS before including this file. */ -#ifndef CONFIG_NR_DRAM_BANKS -#define CONFIG_NR_DRAM_BANKS 1 -#endif #define CONFIG_SYS_SDRAM_BASE 0x80000000 #ifndef CONFIG_SYS_INIT_SP_ADDR diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 116bfaa4d9..cc823c5146 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_DCACHE_OFF /* Memory Configuration */ -#define CONFIG_NR_DRAM_BANKS 2 #define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE - \ @@ -89,7 +88,6 @@ #endif /* Network Configuration */ -#define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME @@ -143,7 +141,6 @@ #define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE /* I2C Configuration */ -#define CONFIG_SYS_I2C_DAVINCI #define CONFIG_SYS_DAVINCI_I2C_SPEED 100000 #define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */ #define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000 @@ -181,7 +178,6 @@ #define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE /* U-Boot general configuration */ -#define CONFIG_MISC_INIT_R #define CONFIG_MX_CYCLIC #define CONFIG_TIMESTAMP diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 6d16fc782b..dcf76305db 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 #define CONFIG_SYS_NS16550_COM2 OMAP34XX_UART2 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 #endif /* Physical Memory Map */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 33761c65e9..5d21c572f8 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -11,8 +11,6 @@ #ifndef __CONFIG_TI_OMAP4_COMMON_H #define __CONFIG_TI_OMAP4_COMMON_H -#define CONFIG_MISC_INIT_R - #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 1 #define CONFIG_SYS_PL310_BASE 0x48242000 diff --git a/include/configs/titanium.h b/include/configs/titanium.h index 63098387c3..c24d657dba 100644 --- a/include/configs/titanium.h +++ b/include/configs/titanium.h @@ -22,8 +22,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) -#define CONFIG_MISC_INIT_R - #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE @@ -40,7 +38,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 1 #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 4 @@ -124,7 +121,6 @@ #define CONFIG_BOOTCOMMAND "run nand_ubifs" /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE (512 << 20) diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index f0b5c42c64..65cc12f1c1 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -70,7 +70,6 @@ #define CONFIG_FEC_MXC #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_MII #define CONFIG_ARP_TIMEOUT 200UL @@ -323,7 +322,6 @@ TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS \ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 2e9292eb55..a945272595 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -16,8 +16,6 @@ #define CONFIG_MXC_UART_BASE UART4_BASE #define CONSOLE_DEV "ttymxc3" -#define CONFIG_MISC_INIT_R - /* Watchdog */ #define CONFIG_HW_WATCHDOG #define CONFIG_IMX_WATCHDOG diff --git a/include/configs/trats.h b/include/configs/trats.h index f68a70e4b1..223fce49a7 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -22,7 +22,6 @@ #endif /* TRATS has 4 banks of DRAM */ -#define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ @@ -33,7 +32,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) /* select serial console configuration */ -#define CONFIG_SERIAL2 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS @@ -168,8 +166,6 @@ /* Common misc for Samsung */ #define CONFIG_MISC_COMMON -#define CONFIG_MISC_INIT_R - /* Download menu - Samsung common */ #define CONFIG_LCD_MENU diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 020dd76eb7..f1e4cbad30 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -21,7 +21,6 @@ #endif /* TRATS2 has 4 banks of DRAM */ -#define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ @@ -31,7 +30,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) /* select serial console configuration */ -#define CONFIG_SERIAL2 /* Console configuration */ @@ -151,8 +149,6 @@ /* Common misc for Samsung */ #define CONFIG_MISC_COMMON -#define CONFIG_MISC_INIT_R - /* Download menu - Samsung common */ #define CONFIG_LCD_MENU diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 95c3ea9ce4..13307fc199 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -30,8 +30,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -49,7 +47,6 @@ /* select serial console configuration */ #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SERIAL3 3 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} @@ -62,12 +59,8 @@ #define CONFIG_SYS_EEPROM_BUS_NUM 1 /* TWL4030 */ -#define CONFIG_TWL4030_LED /* Board NAND Info */ - -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ @@ -201,7 +194,6 @@ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 diff --git a/include/configs/ts4600.h b/include/configs/ts4600.h index d314398538..a107e96530 100644 --- a/include/configs/ts4600.h +++ b/include/configs/ts4600.h @@ -16,7 +16,6 @@ /* U-Boot Commands */ /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h index 97019c4251..956f7795f1 100644 --- a/include/configs/ts4800.h +++ b/include/configs/ts4800.h @@ -55,7 +55,6 @@ /* * Eth Configs */ -#define CONFIG_MII #define CONFIG_PHY_SMSC #define CONFIG_FEC_MXC @@ -120,7 +119,6 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 5784851271..0aebe2100b 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -18,8 +18,6 @@ /* additions for new ARM relocation support */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_NR_DRAM_BANKS 1 - /* auto boot */ #define CONFIG_PREBOOT diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 44d5016fbf..598674c96e 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -11,8 +11,6 @@ * High Level Configuration Options (easy to change) */ -#define CONFIG_MISC_INIT_R - /* * TEXT_BASE needs to be below 16MiB, since this area is scrubbed * for DDR ECC byte filling in the SPL before loading the main diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 23bdff3348..985f306813 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -33,7 +33,6 @@ /* Network support */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -142,7 +141,6 @@ "else run netboot; fi" /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 2924e3143a..6ba4270b72 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -64,7 +64,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -96,7 +95,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_ENET_DEV 0 #define IMX_FEC_BASE ENET_BASE_ADDR diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 43add0e5a2..21ed1d368a 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -202,7 +202,6 @@ #define CONFIG_SYS_BOOTMAPSZ 0x20000000 #define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_NR_DRAM_BANKS 3 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index a13fee6938..aa8738fe73 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -39,7 +39,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index e17514cd49..270f325a55 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -82,7 +82,6 @@ #endif /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM CSD0_BASE_ADDR #define PHYS_SDRAM_SIZE (gd->ram_size) diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 7184aefd42..36f535e9a4 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -126,11 +126,8 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_2 (0x880000000) #define PHYS_SDRAM_2_SIZE 0x180000000 -#else -#define CONFIG_NR_DRAM_BANKS 1 #endif /* Enable memtest */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 30dda0c085..2ad3338a2b 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -151,7 +151,6 @@ #define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ #define PHYS_SDRAM_2 (((unsigned int)V2M_BASE) + \ ((unsigned int)0x20000000)) diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index effae2b0ba..686a383739 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -43,7 +43,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 1 #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 @@ -179,7 +178,6 @@ #define CONFIG_SYS_MEMTEST_END 0x87C00000 /* Physical memory map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) diff --git a/include/configs/vinco.h b/include/configs/vinco.h index e8dd5cf07c..9d6001ff03 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_TIMER_COUNTER 0xfc06863c /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x4000000 diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 43f986342d..d3cbdc6f2e 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -33,7 +33,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -63,7 +62,6 @@ /* Network */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 2456475f27..7fc89e8e71 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -32,8 +32,6 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_VME8349 1 /* ESD VME8349 board specific */ -#define CONFIG_MISC_INIT_R - /* Don't enable PCI2 on vme834x - it doesn't exist physically. */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index cb32cd11f9..b03a1c550c 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -57,7 +57,6 @@ /* Ethernet Configuration */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" @@ -137,7 +136,6 @@ #include <config_distro_bootcmd.h> /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/warp.h b/include/configs/warp.h index 1fc35c1a0e..f9c095dad3 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -34,7 +34,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_256M) /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 2a7789baa2..1b656a5aaf 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -103,7 +103,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h index c9dd3915b0..0ca5ef8d4d 100644 --- a/include/configs/wb45n.h +++ b/include/configs/wb45n.h @@ -32,7 +32,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */ diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h index 70ea48a9a3..40ca9d602b 100644 --- a/include/configs/wb50n.h +++ b/include/configs/wb50n.h @@ -36,7 +36,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS #define CONFIG_SYS_SDRAM_SIZE 0x04000000 diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index 88ee59259c..c0bc23d963 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -80,7 +80,6 @@ #define IMX_FEC_BASE FEC_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_MII #define CONFIG_DISCOVER_PHY #define CONFIG_ARP_TIMEOUT 200UL @@ -97,7 +96,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 73a107e3c3..f453f01675 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -31,7 +31,6 @@ /* * Memory configurations */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN SZ_1M #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_128M diff --git a/include/configs/x600.h b/include/configs/x600.h index 74f4dfc55d..a6835ebbd5 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -64,7 +64,6 @@ /* UBI/UBI config options */ /* Ethernet config options */ -#define CONFIG_MII #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ #define CONFIG_SPEAR_GPIO @@ -102,7 +101,6 @@ #define CONFIG_BOOT_PARAMS_ADDR 0x00000100 #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_MISC_INIT_R #define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ #define CONFIG_SYS_MEMTEST_START 0x00800000 @@ -183,7 +181,6 @@ "\0" /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 #define PHYS_SDRAM_1_MAXSIZE 0x40000000 diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index b507a0699e..5a33223b7d 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -8,8 +8,6 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_MISC_INIT_R - #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 098703064c..cc621cb942 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -16,7 +16,6 @@ */ #define CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_PHYSMEM -#define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_LMB diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h index eda9164820..afc4b82fd8 100644 --- a/include/configs/xfi3.h +++ b/include/configs/xfi3.h @@ -8,7 +8,6 @@ /* U-Boot Commands */ /* Memory configuration */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index b1e44d55c2..a65e8fedff 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -23,9 +23,6 @@ # define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 #endif -#ifndef CONFIG_NR_DRAM_BANKS -# define CONFIG_NR_DRAM_BANKS 2 -#endif #define CONFIG_SYS_MEMTEST_START 0 #define CONFIG_SYS_MEMTEST_END 1000 @@ -107,7 +104,6 @@ /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) -# define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define PHY_ANEG_TIMEOUT 20000 #endif diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index becb125f0a..1387d39e79 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -30,7 +30,4 @@ #undef CONFIG_BOOTP_BOOTFILESIZE #undef CONFIG_BOOTP_MAY_FAIL -#undef CONFIG_NR_DRAM_BANKS -#define CONFIG_NR_DRAM_BANKS 1 - #endif /* __CONFIG_ZYNQMP_MINI_H */ diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 05105e5d44..4eb3312e2d 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -#define CONFIG_NR_DRAM_BANKS 1 - #define CONFIG_SYS_MALLOC_LEN 0x1400000 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index e9ef46050e..4816bf5fef 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -296,7 +296,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Networking options */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_ETHPRIME "eTSEC1" #define CONFIG_TSEC1 1 diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 426af47aa3..86ed58611c 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -235,7 +235,6 @@ /* * Networking options */ -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_ETHPRIME "eTSEC1" #define CONFIG_TSEC1 1 diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index cc95bbaf3b..2f7fc5a6eb 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -295,7 +295,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * Networking options */ #define CONFIG_TSEC_TBI -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_ETHPRIME "eTSEC2" diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 7e8daa8cfb..d98062f491 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -279,7 +279,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * Networking options */ #define CONFIG_TSEC_TBI -#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_ETHPRIME "eTSEC2" diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 405ff46268..08e0ca0c8f 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE (128 << 20) @@ -66,7 +65,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_FEC_MXC -#define CONFIG_MII #define CONFIG_FEC_ENET_DEV 0 #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 3e4b7cb00b..90310c46ac 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -108,7 +108,6 @@ /*==============================*/ #define CONFIG_BOARD_POSTCLK_INIT -#define CONFIG_MISC_INIT_R #define CONFIG_BOOTFILE "uImage" /* Console I/O Buffer Size */ diff --git a/include/configs/zc5202.h b/include/configs/zc5202.h index 22a7fe6e77..40d33f7830 100644 --- a/include/configs/zc5202.h +++ b/include/configs/zc5202.h @@ -18,7 +18,6 @@ /* Ethernet */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE MII100 #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/zc5601.h b/include/configs/zc5601.h index 37d5d6ee77..b9673e2c06 100644 --- a/include/configs/zc5601.h +++ b/include/configs/zc5601.h @@ -19,7 +19,6 @@ /* Ethernet */ #define CONFIG_FEC_MXC -#define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index e48896a511..17b9a5987a 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -91,7 +91,6 @@ unsigned char zipitz2_spi_read(void); /* * DRAM Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */ #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 576a73feb0..05b42db265 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -45,7 +45,6 @@ */ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0x00 -#define CONFIG_MII /* * BOOTP options @@ -73,7 +72,6 @@ #endif /* CONFIG_CMD_USB */ /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */ #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 2506d2b806..526fe055a8 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -35,7 +35,6 @@ /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) -# define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_BOOTP_MAY_FAIL #endif @@ -227,10 +226,6 @@ #define CONFIG_CLOCKS #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -#ifndef CONFIG_NR_DRAM_BANKS -# define CONFIG_NR_DRAM_BANKS 1 -#endif - #define CONFIG_SYS_MEMTEST_START 0 #define CONFIG_SYS_MEMTEST_END 0x1000 diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index a39643ec5e..7027ea076d 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -23,6 +23,7 @@ enum uclass_id { UCLASS_I2C_EMUL, /* sandbox I2C device emulator */ UCLASS_PCI_EMUL, /* sandbox PCI device emulator */ UCLASS_USB_EMUL, /* sandbox USB bus device emulator */ + UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */ UCLASS_SIMPLE_BUS, /* bus with child devices */ /* U-Boot uclasses start here - in alphabetical order */ @@ -43,6 +44,7 @@ enum uclass_id { UCLASS_I2C_GENERIC, /* Generic I2C device */ UCLASS_I2C_MUX, /* I2C multiplexer */ UCLASS_IDE, /* IDE device */ + UCLASS_AXI, /* AXI bus */ UCLASS_IRQ, /* Interrupt controller */ UCLASS_KEYBOARD, /* Keyboard input device */ UCLASS_LED, /* Light-emitting diode (LED) */ diff --git a/include/elf.h b/include/elf.h index 6802428ac4..81f40191d7 100644 --- a/include/elf.h +++ b/include/elf.h @@ -593,6 +593,9 @@ unsigned long elf_hash(const unsigned char *name); /* Values for Elf32/64_Ehdr.e_flags */ #define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag */ +#define EF_PPC64_ELFV1_ABI 0x00000001 +#define EF_PPC64_ELFV2_ABI 0x00000002 + /* Cygnus local bits below */ #define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag*/ #define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib diff --git a/include/env_default.h b/include/env_default.h index bd600cfa44..86b639d3e2 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -104,6 +104,9 @@ const uchar default_environment[] = { "soc=" CONFIG_SYS_SOC "\0" #endif #endif +#if defined(CONFIG_BOOTCOUNT_BOOTLIMIT) && (CONFIG_BOOTCOUNT_BOOTLIMIT > 0) + "bootlimit=" __stringify(CONFIG_BOOTCOUNT_BOOTLIMIT)"\0" +#endif #ifdef CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS #endif diff --git a/include/image-android-dt.h b/include/image-android-dt.h new file mode 100644 index 0000000000..9a3aa8fa30 --- /dev/null +++ b/include/image-android-dt.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 Linaro Ltd. + * Sam Protsenko <semen.protsenko@linaro.org> + */ + +#ifndef IMAGE_ANDROID_DT_H +#define IMAGE_ANDROID_DT_H + +#include <linux/types.h> + +bool android_dt_check_header(ulong hdr_addr); +bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr, + u32 *size); + +#if !defined(CONFIG_SPL_BUILD) +void android_dt_print_contents(ulong hdr_addr); +#endif + +#endif /* IMAGE_ANDROID_DT_H */ diff --git a/include/led.h b/include/led.h index 940b97f58c..7bfdddfd6f 100644 --- a/include/led.h +++ b/include/led.h @@ -106,4 +106,13 @@ enum led_state_t led_get_state(struct udevice *dev); */ int led_set_period(struct udevice *dev, int period_ms); +/** + * led_default_state() - set the default state for all the LED + * + * This enables all leds which have default state. + * see Documentation/devicetree/bindings/leds/common.txt + * + */ +int led_default_state(void); + #endif diff --git a/include/misc.h b/include/misc.h index 68f8e64d61..50515852b2 100644 --- a/include/misc.h +++ b/include/misc.h @@ -6,38 +6,47 @@ #ifndef _MISC_H_ #define _MISC_H_ -/* - * Read the device to buffer, optional. - * +/** + * misc_read() - Read the device to buffer, optional. * @dev: the device * @offset: offset to read the device * @buf: pointer to data buffer * @size: data size in bytes to read the device - * @return: 0 if OK, -ve on error + * + * Return: 0 if OK, -ve on error */ int misc_read(struct udevice *dev, int offset, void *buf, int size); -/* - * Write buffer to the device, optional. - * + +/** + * misc_write() - Write buffer to the device, optional. * @dev: the device * @offset: offset to write the device * @buf: pointer to data buffer * @size: data size in bytes to write the device - * @return: 0 if OK, -ve on error + * + * Return: 0 if OK, -ve on error */ int misc_write(struct udevice *dev, int offset, void *buf, int size); -/* - * Assert command to the device, optional. - * + +/** + * misc_ioctl() - Assert command to the device, optional. * @dev: the device * @request: command to be sent to the device * @buf: pointer to buffer related to the request - * @return: 0 if OK, -ve on error + * + * Return: 0 if OK, -ve on error */ int misc_ioctl(struct udevice *dev, unsigned long request, void *buf); -/* - * Send a message to the device and wait for a response. +/** + * misc_call() - Send a message to the device and wait for a response. + * @dev: the device. + * @msgid: the message ID/number to send. + * @tx_msg: the request/transmit message payload. + * @tx_size: the size of the buffer pointed at by tx_msg. + * @rx_msg: the buffer to receive the response message payload. May be NULL if + * the caller only cares about the error code. + * @rx_size: the size of the buffer pointed at by rx_msg. * * The caller provides the message type/ID and payload to be sent. * The callee constructs any message header required, transmits it to the @@ -45,18 +54,28 @@ int misc_ioctl(struct udevice *dev, unsigned long request, void *buf); * strips any message header from the response, and returns the error code * (or a parsed version of it) and the response message payload. * - * @dev: the device. - * @msgid: the message ID/number to send. - * tx_msg: the request/transmit message payload. - * tx_size: the size of the buffer pointed at by tx_msg. - * rx_msg: the buffer to receive the response message payload. May be NULL if - * the caller only cares about the error code. - * rx_size: the size of the buffer pointed at by rx_msg. - * @return the response message size if OK, -ve on error + * Return: the response message size if OK, -ve on error */ int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size, void *rx_msg, int rx_size); +/** + * misc_set_enabled() - Enable or disable a device. + * @dev: the device to enable or disable. + * @val: the flag that tells the driver to either enable or disable the device. + * + * The semantics of "disable" and "enable" should be understood here as + * activating or deactivating the device's primary function, hence a "disabled" + * device should be dormant, but still answer to commands and queries. + * + * A probed device may start in a disabled or enabled state, depending on the + * driver and hardware. + * + * Return: -ve on error, 0 if the previous state was "disabled", 1 if the + * previous state was "enabled" + */ +int misc_set_enabled(struct udevice *dev, bool val); + /* * struct misc_ops - Driver model Misc operations * @@ -64,50 +83,62 @@ int misc_call(struct udevice *dev, int msgid, void *tx_msg, int tx_size, * use driver model. */ struct misc_ops { - /* + /** * Read the device to buffer, optional. - * * @dev: the device * @offset: offset to read the device * @buf: pointer to data buffer * @size: data size in bytes to read the device - * @return: 0 if OK, -ve on error + * + * Return: 0 if OK, -ve on error */ int (*read)(struct udevice *dev, int offset, void *buf, int size); - /* + + /** * Write buffer to the device, optional. - * * @dev: the device * @offset: offset to write the device * @buf: pointer to data buffer * @size: data size in bytes to write the device - * @return: 0 if OK, -ve on error + * + * Return: 0 if OK, -ve on error */ int (*write)(struct udevice *dev, int offset, const void *buf, int size); - /* + /** * Assert command to the device, optional. - * * @dev: the device * @request: command to be sent to the device * @buf: pointer to buffer related to the request - * @return: 0 if OK, -ve on error + * + * Return: 0 if OK, -ve on error */ int (*ioctl)(struct udevice *dev, unsigned long request, void *buf); - /* + + /** * Send a message to the device and wait for a response. - * * @dev: the device * @msgid: the message ID/number to send - * tx_msg: the request/transmit message payload - * tx_size: the size of the buffer pointed at by tx_msg - * rx_msg: the buffer to receive the response message payload. May be - * NULL if the caller only cares about the error code. - * rx_size: the size of the buffer pointed at by rx_msg - * @return the response message size if OK, -ve on error + * @tx_msg: the request/transmit message payload + * @tx_size: the size of the buffer pointed at by tx_msg + * @rx_msg: the buffer to receive the response message payload. May be + * NULL if the caller only cares about the error code. + * @rx_size: the size of the buffer pointed at by rx_msg + * + * Return: the response message size if OK, -ve on error */ int (*call)(struct udevice *dev, int msgid, void *tx_msg, int tx_size, void *rx_msg, int rx_size); + /** + * Enable or disable a device, optional. + * @dev: the device to enable. + * @val: the flag that tells the driver to either enable or disable the + * device. + * + * Return: -ve on error, 0 if the previous state was "disabled", 1 if + * the previous state was "enabled" + */ + int (*set_enabled)(struct udevice *dev, bool val); }; #endif /* _MISC_H_ */ diff --git a/include/net.h b/include/net.h index 62f82c4dca..2b2deb5aae 100644 --- a/include/net.h +++ b/include/net.h @@ -164,7 +164,7 @@ void eth_halt_state_only(void); /* Set passive state */ #ifndef CONFIG_DM_ETH struct eth_device { -#define ETH_NAME_LEN 16 +#define ETH_NAME_LEN 20 char name[ETH_NAME_LEN]; unsigned char enetaddr[ARP_HLEN]; phys_addr_t iobase; diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c index cfe09cc94c..05ac67b822 100644 --- a/lib/rsa/rsa-sign.c +++ b/lib/rsa/rsa-sign.c @@ -20,7 +20,8 @@ #define HAVE_ERR_REMOVE_THREAD_STATE #endif -#if OPENSSL_VERSION_NUMBER < 0x10100000L +#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ + (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) static void RSA_get0_key(const RSA *r, const BIGNUM **n, const BIGNUM **e, const BIGNUM **d) { @@ -299,7 +300,8 @@ static int rsa_init(void) { int ret; -#if OPENSSL_VERSION_NUMBER < 0x10100000L +#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ + (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) ret = SSL_library_init(); #else ret = OPENSSL_init_ssl(0, NULL); @@ -308,7 +310,8 @@ static int rsa_init(void) fprintf(stderr, "Failure to init SSL library\n"); return -1; } -#if OPENSSL_VERSION_NUMBER < 0x10100000L +#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ + (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) SSL_load_error_strings(); OpenSSL_add_all_algorithms(); @@ -354,7 +357,8 @@ err_set_rsa: err_engine_init: ENGINE_free(e); err_engine_by_id: -#if OPENSSL_VERSION_NUMBER < 0x10100000L +#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ + (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) ENGINE_cleanup(); #endif return ret; @@ -362,7 +366,8 @@ err_engine_by_id: static void rsa_remove(void) { -#if OPENSSL_VERSION_NUMBER < 0x10100000L +#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ + (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) CRYPTO_cleanup_all_ex_data(); ERR_free_strings(); #ifdef HAVE_ERR_REMOVE_THREAD_STATE @@ -432,7 +437,8 @@ static int rsa_sign_with_key(RSA *rsa, struct checksum_algo *checksum_algo, ret = rsa_err("Could not obtain signature"); goto err_sign; } - #if OPENSSL_VERSION_NUMBER < 0x10100000L + #if OPENSSL_VERSION_NUMBER < 0x10100000L || \ + (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) EVP_MD_CTX_cleanup(context); #else EVP_MD_CTX_reset(context); diff --git a/lib/smbios.c b/lib/smbios.c index df3d26b071..326eb00230 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -116,7 +116,7 @@ static int smbios_write_type1(ulong *current, int handle) t->manufacturer = smbios_add_string(t->eos, CONFIG_SMBIOS_MANUFACTURER); t->product_name = smbios_add_string(t->eos, CONFIG_SMBIOS_PRODUCT_NAME); if (serial_str) { - strncpy((char*)t->uuid, serial_str, sizeof(t->uuid)); + strncpy((char *)t->uuid, serial_str, sizeof(t->uuid)); t->serial_number = smbios_add_string(t->eos, serial_str); } @@ -278,6 +278,7 @@ ulong write_smbios_table(ulong addr) /* populate minimum required tables */ for (i = 0; i < ARRAY_SIZE(smbios_write_funcs); i++) { int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++); + max_struct_size = max(max_struct_size, tmp); len += tmp; } diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 0ec125160d..fc37099cbe 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -309,7 +309,6 @@ CONFIG_CUSTOMER_BOARD_SUPPORT CONFIG_D2NET_V2 CONFIG_DA850_AM18X_EVM CONFIG_DA850_EVM_MAX_CPU_CLK -CONFIG_DBAU1000 CONFIG_DBGU CONFIG_DBG_MONITOR CONFIG_DB_784MP_GP @@ -400,7 +399,6 @@ CONFIG_DRIVER_NE2000_BASE CONFIG_DRIVER_NE2000_CCR CONFIG_DRIVER_NE2000_VAL CONFIG_DRIVER_SMC911X_BASE -CONFIG_DRIVER_TI_EMAC CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE CONFIG_DRIVER_TI_EMAC_USE_RMII CONFIG_DRIVER_TI_KEYSTONE_NET @@ -616,7 +614,6 @@ CONFIG_FIXED_PHY_ADDR CONFIG_FIXED_SDHCI_ALIGNED_BUFFER CONFIG_FLASHBOOTCOMMAND CONFIG_FLASHCARD -CONFIG_FLASH_16BIT CONFIG_FLASH_BASE CONFIG_FLASH_BR_PRELIM CONFIG_FLASH_CFI_DRIVER @@ -1241,7 +1238,6 @@ CONFIG_MENUKEY CONFIG_MENUPROMPT CONFIG_MENU_SHOW CONFIG_MFG_ENV_SETTINGS -CONFIG_MII CONFIG_MIIM_ADDRESS CONFIG_MII_DEFAULT_TSEC CONFIG_MII_INIT @@ -1251,7 +1247,6 @@ CONFIG_MIPS_MT_FPAFF CONFIG_MIRQ_EN CONFIG_MISC_COMMON CONFIG_MISC_INIT_F -CONFIG_MISC_INIT_R CONFIG_MIU_1BIT_INTERLEAVED CONFIG_MIU_2BIT_21_7_INTERLEAVED CONFIG_MIU_2BIT_INTERLEAVED @@ -1411,8 +1406,6 @@ CONFIG_NO_ETH CONFIG_NO_RELOCATION CONFIG_NO_WAIT CONFIG_NR_CPUS -CONFIG_NR_DRAM_BANKS -CONFIG_NR_DRAM_BANKS_MAX CONFIG_NR_DRAM_POPULATED CONFIG_NS16550_MIN_FUNCTIONS CONFIG_NS8382X @@ -1440,9 +1433,6 @@ CONFIG_PALMAS_POWER CONFIG_PALMAS_SMPS7_FPWM CONFIG_PALMAS_USB_SS_PWR CONFIG_PARAVIRT -CONFIG_PB1000 -CONFIG_PB1100 -CONFIG_PB1500 CONFIG_PCA953X CONFIG_PCA9698 CONFIG_PCI1 @@ -1732,10 +1722,6 @@ CONFIG_SECURE_RUNTIME_RESV_SRAM_SZ CONFIG_SECURITY CONFIG_SEC_DEQ_TIMEOUT CONFIG_SEC_FW_SIZE -CONFIG_SERIAL0 -CONFIG_SERIAL1 -CONFIG_SERIAL2 -CONFIG_SERIAL3 CONFIG_SERIAL_BOOT CONFIG_SERIAL_FLASH CONFIG_SERIAL_HW_FLOW_CONTROL @@ -1827,11 +1813,6 @@ CONFIG_SMSTP7_ENA CONFIG_SMSTP8_ENA CONFIG_SMSTP9_ENA CONFIG_SOCRATES -CONFIG_SOC_AU1000 -CONFIG_SOC_AU1100 -CONFIG_SOC_AU1500 -CONFIG_SOC_AU1550 -CONFIG_SOC_AU1X00 CONFIG_SOC_DM355 CONFIG_SOC_DM365 CONFIG_SOC_DM644X @@ -3002,7 +2983,6 @@ CONFIG_SYS_GBIT_MII1_BUSNAME CONFIG_SYS_GBIT_MII_BUSNAME CONFIG_SYS_GBL_DATA_OFFSET CONFIG_SYS_GBL_DATA_SIZE -CONFIG_SYS_GENERIC_BOARD CONFIG_SYS_GIC400_ADDR CONFIG_SYS_GP1DIR CONFIG_SYS_GP1ODR @@ -3071,7 +3051,6 @@ CONFIG_SYS_I2C_BASE4 CONFIG_SYS_I2C_BASE5 CONFIG_SYS_I2C_BUSES CONFIG_SYS_I2C_CLK_OFFSET -CONFIG_SYS_I2C_DAVINCI CONFIG_SYS_I2C_DIRECT_BUS CONFIG_SYS_I2C_DVI_ADDR CONFIG_SYS_I2C_DVI_BUS_NUM @@ -3567,7 +3546,6 @@ CONFIG_SYS_NAND_ACTL_ALE CONFIG_SYS_NAND_ACTL_CLE CONFIG_SYS_NAND_ACTL_DELAY CONFIG_SYS_NAND_ACTL_NCE -CONFIG_SYS_NAND_ADDR CONFIG_SYS_NAND_ALE CONFIG_SYS_NAND_AMASK CONFIG_SYS_NAND_BAD_BLOCK_POS @@ -3964,9 +3942,6 @@ CONFIG_SYS_PCI_TBATR3 CONFIG_SYS_PCI_TBATR4 CONFIG_SYS_PCI_TBATR5 CONFIG_SYS_PCI_VIRT -CONFIG_SYS_PCMCIA_ATTR_BASE -CONFIG_SYS_PCMCIA_IO_BASE -CONFIG_SYS_PCMCIA_MEM_ADDR CONFIG_SYS_PCMCIA_MEM_SIZE CONFIG_SYS_PDCNT CONFIG_SYS_PEHLPAR @@ -4072,9 +4047,6 @@ CONFIG_SYS_QRIO_BR_PRELIM CONFIG_SYS_QRIO_OR_PRELIM CONFIG_SYS_R7780MP_OLD_FLASH CONFIG_SYS_RAMBOOT -CONFIG_SYS_RAM_BASE -CONFIG_SYS_RAM_CS -CONFIG_SYS_RAM_FREQ_DIV CONFIG_SYS_RCAR_I2C0_BASE CONFIG_SYS_RCAR_I2C1_BASE CONFIG_SYS_RCAR_I2C2_BASE @@ -4520,9 +4492,6 @@ CONFIG_TULIP_FIX_DAVICOM CONFIG_TULIP_SELECT_MEDIA CONFIG_TULIP_USE_IO CONFIG_TUXX1 -CONFIG_TWL4030_INPUT -CONFIG_TWL4030_KEYPAD -CONFIG_TWL4030_LED CONFIG_TWL6030_INPUT CONFIG_TWL6030_POWER CONFIG_TWR @@ -4616,7 +4585,6 @@ CONFIG_USB_FAT_BOOT CONFIG_USB_FREQ CONFIG_USB_GADGET_AMD5536UDC CONFIG_USB_GADGET_AT91 -CONFIG_USB_GADGET_AU1X00 CONFIG_USB_GADGET_DUMMY_HCD CONFIG_USB_GADGET_DWC2_OTG_PHY CONFIG_USB_GADGET_FOTG210 @@ -4634,7 +4602,6 @@ CONFIG_USB_GADGET_PXA27X CONFIG_USB_GADGET_PXA2XX CONFIG_USB_GADGET_SA1100 CONFIG_USB_GADGET_SUPERH -CONFIG_USB_GADGET_SX2 CONFIG_USB_HOST_XHCI_BASE CONFIG_USB_INVENTRA_DMA CONFIG_USB_ISP1301_I2C_ADDR @@ -4642,7 +4609,6 @@ CONFIG_USB_MAX_CONTROLLER_COUNT CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT CONFIG_USB_MUSB_TIMEOUT CONFIG_USB_MUSB_TUSB6010 -CONFIG_USB_OHCI CONFIG_USB_OHCI_EP93XX CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW @@ -4692,7 +4658,6 @@ CONFIG_VIDEO_MB862xx CONFIG_VIDEO_MB862xx_ACCEL CONFIG_VIDEO_MXS CONFIG_VIDEO_MXS_MODE_SYSTEM -CONFIG_VIDEO_OMAP3 CONFIG_VIDEO_STD_TIMINGS CONFIG_VIDEO_VCXK CONFIG_VID_FLS_ENV diff --git a/test/dm/Makefile b/test/dm/Makefile index d2ed96c615..67c1fe6d01 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -44,4 +44,6 @@ obj-$(CONFIG_DM_VIDEO) += video.o obj-$(CONFIG_ADC) += adc.o obj-$(CONFIG_SPMI) += spmi.o obj-$(CONFIG_WDT) += wdt.o +obj-$(CONFIG_AXI) += axi.o +obj-$(CONFIG_MISC) += misc.o endif diff --git a/test/dm/axi.c b/test/dm/axi.c new file mode 100644 index 0000000000..e234ab82e6 --- /dev/null +++ b/test/dm/axi.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include <common.h> +#include <axi.h> +#include <dm.h> +#include <dm/test.h> +#include <test/ut.h> +#include <asm/axi.h> + +/* Test that sandbox AXI works correctly */ +static int dm_test_axi_base(struct unit_test_state *uts) +{ + struct udevice *bus; + + ut_assertok(uclass_get_device(UCLASS_AXI, 0, &bus)); + + return 0; +} + +DM_TEST(dm_test_axi_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test that sandbox PCI bus numbering works correctly */ +static int dm_test_axi_busnum(struct unit_test_state *uts) +{ + struct udevice *bus; + + ut_assertok(uclass_get_device_by_seq(UCLASS_AXI, 0, &bus)); + + return 0; +} + +DM_TEST(dm_test_axi_busnum, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test that we can use the store device correctly */ +static int dm_test_axi_store(struct unit_test_state *uts) +{ + struct udevice *store; + u8 tdata1[] = {0x55, 0x66, 0x77, 0x88}; + u8 tdata2[] = {0xaa, 0xbb, 0xcc, 0xdd}; + u32 val; + u8 *data; + + /* Check that asking for the device automatically fires up AXI */ + ut_assertok(uclass_get_device(UCLASS_AXI_EMUL, 0, &store)); + ut_assert(device_active(store)); + + axi_get_store(store, &data); + + /* Test reading */ + memcpy(data, tdata1, ARRAY_SIZE(tdata1)); + axi_read(store, 0, &val, AXI_SIZE_32); + ut_asserteq(0x55667788, val); + + memcpy(data + 3, tdata2, ARRAY_SIZE(tdata2)); + axi_read(store, 3, &val, AXI_SIZE_32); + ut_asserteq(0xaabbccdd, val); + + /* Reset data store */ + memset(data, 0, 16); + + /* Test writing */ + val = 0x55667788; + axi_write(store, 0, &val, AXI_SIZE_32); + ut_asserteq(0, memcmp(data, tdata1, ARRAY_SIZE(tdata1))); + + val = 0xaabbccdd; + axi_write(store, 3, &val, AXI_SIZE_32); + ut_asserteq(0, memcmp(data + 3, tdata2, ARRAY_SIZE(tdata1))); + + return 0; +} + +DM_TEST(dm_test_axi_store, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); diff --git a/test/dm/led.c b/test/dm/led.c index 0071f216bb..00de7b3997 100644 --- a/test/dm/led.c +++ b/test/dm/led.c @@ -32,6 +32,9 @@ static int dm_test_led_default_state(struct unit_test_state *uts) { struct udevice *dev; + /* configure the default state (auto-probe) */ + led_default_state(); + /* Check that we handle the default-state property correctly. */ ut_assertok(led_get_by_label("sandbox:default_on", &dev)); ut_asserteq(LEDST_ON, led_get_state(dev)); diff --git a/test/dm/misc.c b/test/dm/misc.c new file mode 100644 index 0000000000..61279665ef --- /dev/null +++ b/test/dm/misc.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#include <common.h> +#include <dm.h> +#include <dm/test.h> +#include <misc.h> +#include <test/ut.h> + +static int dm_test_misc(struct unit_test_state *uts) +{ + struct udevice *dev; + u8 buf[16]; + int id; + ulong last_ioctl; + bool enabled; + + ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "misc-test", &dev)); + + /* Read / write tests */ + ut_assertok(misc_write(dev, 0, "TEST", 4)); + ut_assertok(misc_write(dev, 4, "WRITE", 5)); + ut_assertok(misc_read(dev, 0, buf, 9)); + + ut_assertok(memcmp(buf, "TESTWRITE", 9)); + + /* Call tests */ + + id = 0; + ut_assertok(misc_call(dev, 0, &id, 4, buf, 16)); + ut_assertok(memcmp(buf, "Zero", 4)); + + id = 2; + ut_assertok(misc_call(dev, 0, &id, 4, buf, 16)); + ut_assertok(memcmp(buf, "Two", 3)); + + ut_assertok(misc_call(dev, 1, &id, 4, buf, 16)); + ut_assertok(memcmp(buf, "Forty-two", 9)); + + id = 1; + ut_assertok(misc_call(dev, 1, &id, 4, buf, 16)); + ut_assertok(memcmp(buf, "Forty-one", 9)); + + /* IOCTL tests */ + + ut_assertok(misc_ioctl(dev, 6, NULL)); + /* Read back last issued ioctl */ + ut_assertok(misc_call(dev, 2, NULL, 0, &last_ioctl, + sizeof(last_ioctl))); + ut_asserteq(6, last_ioctl) + + ut_assertok(misc_ioctl(dev, 23, NULL)); + /* Read back last issued ioctl */ + ut_assertok(misc_call(dev, 2, NULL, 0, &last_ioctl, + sizeof(last_ioctl))); + ut_asserteq(23, last_ioctl) + + /* Enable / disable tests */ + + /* Read back enable/disable status */ + ut_assertok(misc_call(dev, 3, NULL, 0, &enabled, + sizeof(enabled))); + ut_asserteq(true, enabled); + + ut_assertok(misc_set_enabled(dev, false)); + /* Read back enable/disable status */ + ut_assertok(misc_call(dev, 3, NULL, 0, &enabled, + sizeof(enabled))); + ut_asserteq(false, enabled); + + ut_assertok(misc_set_enabled(dev, true)); + /* Read back enable/disable status */ + ut_assertok(misc_call(dev, 3, NULL, 0, &enabled, + sizeof(enabled))); + ut_asserteq(true, enabled); + + return 0; +} + +DM_TEST(dm_test_misc, DM_TESTF_SCAN_FDT); |