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-rw-r--r--arch/arm/cpu/armv7/zynq/Makefile1
-rw-r--r--arch/arm/cpu/armv7/zynq/config.mk7
-rw-r--r--arch/arm/cpu/armv7/zynq/cpu.c3
-rw-r--r--arch/arm/cpu/armv7/zynq/lowlevel_init.S26
4 files changed, 34 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/zynq/Makefile b/arch/arm/cpu/armv7/zynq/Makefile
index 3363a3c71b..901f2ce4cb 100644
--- a/arch/arm/cpu/armv7/zynq/Makefile
+++ b/arch/arm/cpu/armv7/zynq/Makefile
@@ -13,4 +13,5 @@ obj-y += cpu.o
obj-y += ddrc.o
obj-y += slcr.o
obj-y += clk.o
+obj-y += lowlevel_init.o
obj-$(CONFIG_SPL_BUILD) += spl.o
diff --git a/arch/arm/cpu/armv7/zynq/config.mk b/arch/arm/cpu/armv7/zynq/config.mk
new file mode 100644
index 0000000000..778a377e8a
--- /dev/null
+++ b/arch/arm/cpu/armv7/zynq/config.mk
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2013 - 2015 Xilinx, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+# Allow NEON instructions (needed for lowlevel_init.S with GNU toolchain)
+PLATFORM_RELFLAGS += -mfpu=neon
diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c
index 816d0c5da7..d1bfec9f71 100644
--- a/arch/arm/cpu/armv7/zynq/cpu.c
+++ b/arch/arm/cpu/armv7/zynq/cpu.c
@@ -10,9 +10,6 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
-void lowlevel_init(void)
-{
-}
#define ZYNQ_SILICON_VER_MASK 0xF0000000
#define ZYNQ_SILICON_VER_SHIFT 28
diff --git a/arch/arm/cpu/armv7/zynq/lowlevel_init.S b/arch/arm/cpu/armv7/zynq/lowlevel_init.S
new file mode 100644
index 0000000000..6d714b711c
--- /dev/null
+++ b/arch/arm/cpu/armv7/zynq/lowlevel_init.S
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2013 Xilinx, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm-offsets.h>
+#include <config.h>
+#include <linux/linkage.h>
+
+ENTRY(lowlevel_init)
+
+ /* Enable the the VFP */
+ mrc p15, 0, r1, c1, c0, 2
+ orr r1, r1, #(0x3 << 20)
+ orr r1, r1, #(0x3 << 20)
+ mcr p15, 0, r1, c1, c0, 2
+ isb
+ fmrx r1, FPEXC
+ orr r1,r1, #(1<<30)
+ fmxr FPEXC, r1
+
+ /* Move back to caller */
+ mov pc, lr
+
+ENDPROC(lowlevel_init)