diff options
-rw-r--r-- | Makefile | 2 | ||||
-rw-r--r-- | arch/blackfin/cpu/initcode.c | 6 | ||||
-rw-r--r-- | arch/blackfin/include/asm/mach-bf518/anomaly.h | 2 | ||||
-rw-r--r-- | arch/blackfin/include/asm/mach-bf527/anomaly.h | 4 | ||||
-rw-r--r-- | arch/blackfin/include/asm/mach-bf533/anomaly.h | 7 | ||||
-rw-r--r-- | arch/blackfin/include/asm/mach-bf537/anomaly.h | 7 | ||||
-rw-r--r-- | arch/blackfin/include/asm/mach-bf538/anomaly.h | 7 | ||||
-rw-r--r-- | arch/blackfin/include/asm/mach-bf548/anomaly.h | 7 | ||||
-rw-r--r-- | arch/blackfin/include/asm/mach-bf561/anomaly.h | 11 | ||||
-rw-r--r-- | arch/powerpc/lib/Makefile | 2 | ||||
-rw-r--r-- | board/freescale/mpc5121ads/mpc5121ads.c | 4 | ||||
-rw-r--r-- | common/env_mmc.c | 13 | ||||
-rw-r--r-- | drivers/serial/ns16550.c | 9 | ||||
-rw-r--r-- | include/configs/Alaska8220.h | 1 | ||||
-rw-r--r-- | include/configs/MPC8610HPCD.h | 1 | ||||
-rw-r--r-- | include/configs/MPC8641HPCN.h | 1 | ||||
-rw-r--r-- | include/configs/XPEDITE5170.h | 1 | ||||
-rw-r--r-- | include/configs/Yukon8220.h | 1 | ||||
-rw-r--r-- | include/configs/sbc8641d.h | 1 |
19 files changed, 71 insertions, 16 deletions
@@ -700,7 +700,7 @@ mpc5121ads_rev2_config \ : unconfig @mkdir -p $(obj)include @if [ "$(findstring rev2,$@)" ] ; then \ - echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \ + echo "#define CONFIG_MPC5121ADS_REV2 1" > $(obj)include/config.h; \ fi @$(MKCONFIG) -n $@ -a mpc5121ads powerpc mpc512x mpc5121ads freescale diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c index 007f5ce775..433d477ddf 100644 --- a/arch/blackfin/cpu/initcode.c +++ b/arch/blackfin/cpu/initcode.c @@ -391,7 +391,9 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs) /* Always programming PLL_LOCKCNT avoids Anomaly 05000430 */ ADI_SYSCTRL_VALUES memory_settings; - uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_PLLDIV | SYSCTRL_LOCKCNT; + uint32_t actions = SYSCTRL_WRITE | SYSCTRL_PLLCTL | SYSCTRL_LOCKCNT; + if (!ANOMALY_05000440) + actions |= SYSCTRL_PLLDIV; if (CONFIG_HAS_VR) { actions |= SYSCTRL_VRCTL; if (CONFIG_VR_CTL_VAL & FREQ_MASK) @@ -410,6 +412,8 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs) serial_putc('e'); bfrom_SysControl(actions, &memory_settings, NULL); serial_putc('f'); + if (ANOMALY_05000440) + bfin_write_PLL_DIV(CONFIG_PLL_DIV_VAL); #if ANOMALY_05000432 bfin_write_SIC_IWR1(-1); #endif diff --git a/arch/blackfin/include/asm/mach-bf518/anomaly.h b/arch/blackfin/include/asm/mach-bf518/anomaly.h index d808b451e6..24918c5f7e 100644 --- a/arch/blackfin/include/asm/mach-bf518/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf518/anomaly.h @@ -88,6 +88,8 @@ #define ANOMALY_05000477 (1) /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ #define ANOMALY_05000481 (1) +/* IFLUSH sucks at life */ +#define ANOMALY_05000491 (1) /* Anomalies that don't exist on this proc */ #define ANOMALY_05000099 (0) diff --git a/arch/blackfin/include/asm/mach-bf527/anomaly.h b/arch/blackfin/include/asm/mach-bf527/anomaly.h index 9358afa05c..72a63694e5 100644 --- a/arch/blackfin/include/asm/mach-bf527/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf527/anomaly.h @@ -12,7 +12,7 @@ /* This file should be up to date with: * - Revision E, 03/15/2010; ADSP-BF526 Blackfin Processor Anomaly List - * - Revision G, 08/25/2009; ADSP-BF527 Blackfin Processor Anomaly List + * - Revision H, 04/29/2010; ADSP-BF527 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -220,6 +220,8 @@ #define ANOMALY_05000483 (1) /* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */ #define ANOMALY_05000485 (_ANOMALY_BF526_BF527(< 2, < 3)) +/* The CODEC Zero-Cross Detect Feature is not Functional */ +#define ANOMALY_05000487 (1) /* IFLUSH sucks at life */ #define ANOMALY_05000491 (1) diff --git a/arch/blackfin/include/asm/mach-bf533/anomaly.h b/arch/blackfin/include/asm/mach-bf533/anomaly.h index 78f8721879..30e0eba222 100644 --- a/arch/blackfin/include/asm/mach-bf533/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf533/anomaly.h @@ -11,7 +11,7 @@ */ /* This file should be up to date with: - * - Revision E, 09/18/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List + * - Revision F, 05/25/2010; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -206,6 +206,10 @@ #define ANOMALY_05000443 (1) /* False Hardware Error when RETI Points to Invalid Memory */ #define ANOMALY_05000461 (1) +/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */ +#define ANOMALY_05000462 (1) +/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */ +#define ANOMALY_05000471 (1) /* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ #define ANOMALY_05000473 (1) /* Possible Lockup Condition whem Modifying PLL from External Memory */ @@ -357,6 +361,7 @@ #define ANOMALY_05000430 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000447 (0) #define ANOMALY_05000448 (0) #define ANOMALY_05000456 (0) diff --git a/arch/blackfin/include/asm/mach-bf537/anomaly.h b/arch/blackfin/include/asm/mach-bf537/anomaly.h index 43df6afd22..d3a29665a7 100644 --- a/arch/blackfin/include/asm/mach-bf537/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf537/anomaly.h @@ -11,7 +11,7 @@ */ /* This file should be up to date with: - * - Revision D, 09/18/2008; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List + * - Revision E, 05/25/2010; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -160,12 +160,16 @@ #define ANOMALY_05000443 (1) /* False Hardware Error when RETI Points to Invalid Memory */ #define ANOMALY_05000461 (1) +/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */ +#define ANOMALY_05000462 (1) /* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ #define ANOMALY_05000473 (1) /* Possible Lockup Condition whem Modifying PLL from External Memory */ #define ANOMALY_05000475 (1) /* TESTSET Instruction Cannot Be Interrupted */ #define ANOMALY_05000477 (1) +/* Multiple Simultaneous Urgent DMA Requests May Cause DMA System Instability */ +#define ANOMALY_05000480 (__SILICON_REVISION__ < 3) /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ #define ANOMALY_05000481 (1) /* IFLUSH sucks at life */ @@ -211,6 +215,7 @@ #define ANOMALY_05000430 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000447 (0) #define ANOMALY_05000448 (0) #define ANOMALY_05000456 (0) diff --git a/arch/blackfin/include/asm/mach-bf538/anomaly.h b/arch/blackfin/include/asm/mach-bf538/anomaly.h index e22d23c174..4bc1f4a3db 100644 --- a/arch/blackfin/include/asm/mach-bf538/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf538/anomaly.h @@ -11,8 +11,8 @@ */ /* This file should be up to date with: - * - Revision H, 07/10/2009; ADSP-BF538/BF538F Blackfin Processor Anomaly List - * - Revision M, 07/10/2009; ADSP-BF539/BF539F Blackfin Processor Anomaly List + * - Revision I, 05/25/2010; ADSP-BF538/BF538F Blackfin Processor Anomaly List + * - Revision N, 05/25/2010; ADSP-BF539/BF539F Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -142,6 +142,8 @@ #define ANOMALY_05000477 (1) /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ #define ANOMALY_05000481 (1) +/* IFLUSH sucks at life */ +#define ANOMALY_05000491 (1) /* Anomalies that don't exist on this proc */ #define ANOMALY_05000099 (0) @@ -184,6 +186,7 @@ #define ANOMALY_05000430 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000447 (0) #define ANOMALY_05000448 (0) #define ANOMALY_05000456 (0) diff --git a/arch/blackfin/include/asm/mach-bf548/anomaly.h b/arch/blackfin/include/asm/mach-bf548/anomaly.h index 7bda09c0b2..b9f4ecc958 100644 --- a/arch/blackfin/include/asm/mach-bf548/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf548/anomaly.h @@ -11,7 +11,7 @@ */ /* This file should be up to date with: - * - Revision I, 07/23/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List + * - Revision J, 06/03/2010; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -110,8 +110,6 @@ #define ANOMALY_05000379 (1) /* 8-Bit NAND Flash Boot Mode Not Functional */ #define ANOMALY_05000382 (__SILICON_REVISION__ < 1) -/* Some ATAPI Modes Are Not Functional */ -#define ANOMALY_05000383 (1) /* Boot from OTP Memory Not Functional */ #define ANOMALY_05000385 (__SILICON_REVISION__ < 1) /* bfrom_SysControl() Firmware Routine Not Functional */ @@ -218,6 +216,8 @@ #define ANOMALY_05000481 (1) /* Possible USB Data Corruption When Multiple Endpoints Are Accessed by the Core */ #define ANOMALY_05000483 (1) +/* DDR Trim May Not Be Performed for Certain VLEV Values in OTP Page PBS00L */ +#define ANOMALY_05000484 (__SILICON_REVISION__ < 3) /* PLL_CTL Change Using bfrom_SysControl() Can Result in Processor Overclocking */ #define ANOMALY_05000485 (__SILICON_REVISION__ >= 2) /* IFLUSH sucks at life */ @@ -272,6 +272,7 @@ #define ANOMALY_05000412 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000475 (0) #endif diff --git a/arch/blackfin/include/asm/mach-bf561/anomaly.h b/arch/blackfin/include/asm/mach-bf561/anomaly.h index 4c108c99cb..9313c27f47 100644 --- a/arch/blackfin/include/asm/mach-bf561/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf561/anomaly.h @@ -11,7 +11,7 @@ */ /* This file should be up to date with: - * - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List + * - Revision R, 05/25/2010; ADSP-BF561 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -286,12 +286,18 @@ #define ANOMALY_05000428 (__SILICON_REVISION__ > 3) /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ #define ANOMALY_05000443 (1) +/* SCKELOW Feature Is Not Functional */ +#define ANOMALY_05000458 (1) /* False Hardware Error when RETI Points to Invalid Memory */ #define ANOMALY_05000461 (1) +/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */ +#define ANOMALY_05000462 (1) +/* Boot Failure When SDRAM Control Signals Toggle Coming Out Of Reset */ +#define ANOMALY_05000471 (1) /* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ #define ANOMALY_05000473 (1) /* Possible Lockup Condition whem Modifying PLL from External Memory */ -#define ANOMALY_05000475 (__SILICON_REVISION__ < 4) +#define ANOMALY_05000475 (1) /* TESTSET Instruction Cannot Be Interrupted */ #define ANOMALY_05000477 (1) /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */ @@ -316,6 +322,7 @@ #define ANOMALY_05000430 (0) #define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) +#define ANOMALY_05000440 (0) #define ANOMALY_05000447 (0) #define ANOMALY_05000448 (0) #define ANOMALY_05000456 (0) diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 2065b6d807..cec7666b44 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -30,7 +30,7 @@ SOBJS-y += ppcstring.o SOBJS-y += ticks.o SOBJS-y += reloc.o -COBJS-y += bat_rw.o +COBJS-$(CONFIG_BAT_RW) += bat_rw.o COBJS-y += board.o COBJS-y += bootm.o COBJS-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount.o diff --git a/board/freescale/mpc5121ads/mpc5121ads.c b/board/freescale/mpc5121ads/mpc5121ads.c index a84644def4..8cc68530e6 100644 --- a/board/freescale/mpc5121ads/mpc5121ads.c +++ b/board/freescale/mpc5121ads/mpc5121ads.c @@ -102,7 +102,7 @@ int board_early_init_f(void) * write commands in order to establish the device ID. */ -#ifdef CONFIG_ADS5121_REV2 +#ifdef CONFIG_MPC5121ADS_REV2 out_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08), 0xC1); #else if (in_8((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) & 0x04) { @@ -329,7 +329,7 @@ int checkboard (void) volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u32 spridr = in_be32(&im->sysconf.spridr); - printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n", + printf ("Board: MPC5121ADS rev. 0x%04x (CPLD rev. 0x%02x)\n", brd_rev, cpld_rev); /* initialize function mux & slew rate IO inter alia on IO Pins */ diff --git a/common/env_mmc.c b/common/env_mmc.c index d443ff51f1..3d7fceb099 100644 --- a/common/env_mmc.c +++ b/common/env_mmc.c @@ -29,6 +29,7 @@ #include <linux/stddef.h> #include <malloc.h> #include <mmc.h> +#include <errno.h> /* references to names in env_common.c */ extern uchar default_environment[]; @@ -96,13 +97,23 @@ inline int write_env(struct mmc *mmc, unsigned long size, int saveenv(void) { + env_t env_new; + ssize_t len; + char *res; struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); if (init_mmc_for_env(mmc)) return 1; + res = (char *)&env_new.data; + len = hexport('\0', &res, ENV_SIZE); + if (len < 0) { + error("Cannot export environment: errno = %d\n", errno); + return 1; + } + env_new.crc = crc32(0, env_new.data, ENV_SIZE); printf("Writing to MMC(%d)... ", CONFIG_SYS_MMC_ENV_DEV); - if (write_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, env_ptr)) { + if (write_env(mmc, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, (u_char *)&env_new)) { puts("failed\n"); return 1; } diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 7e833fde5f..32f24dee50 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -70,6 +70,15 @@ void NS16550_putc (NS16550_t com_port, char c) { while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0); serial_out(c, &com_port->thr); + + /* + * Call watchdog_reset() upon newline. This is done here in putc + * since the environment code uses a single puts() to print the complete + * environment upon "printenv". So we can't put this watchdog call + * in puts(). + */ + if (c == '\n') + WATCHDOG_RESET(); } #ifndef CONFIG_NS16550_MIN_FUNCTIONS diff --git a/include/configs/Alaska8220.h b/include/configs/Alaska8220.h index 576aa74062..85b68be544 100644 --- a/include/configs/Alaska8220.h +++ b/include/configs/Alaska8220.h @@ -31,6 +31,7 @@ #define CONFIG_MPC8220 1 #define CONFIG_ALASKA8220 1 /* ... on Alaska board */ +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 645d947a5d..2b7b8b54ba 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -53,6 +53,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported & enabled */ #define CONFIG_ALTIVEC 1 diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 3b80d14e98..d92b12df74 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -68,6 +68,7 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_SYS_NUM_ADDR_MAP 8 /* Number of addr map slots = 8 dbats */ diff --git a/include/configs/XPEDITE5170.h b/include/configs/XPEDITE5170.h index 8770a8dab9..306baeda9d 100644 --- a/include/configs/XPEDITE5170.h +++ b/include/configs/XPEDITE5170.h @@ -36,6 +36,7 @@ #define CONFIG_SYS_BOARD_NAME "XPedite5170" #define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */ #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_ALTIVEC 1 diff --git a/include/configs/Yukon8220.h b/include/configs/Yukon8220.h index c439068f53..8ec6c84eb3 100644 --- a/include/configs/Yukon8220.h +++ b/include/configs/Yukon8220.h @@ -31,6 +31,7 @@ #define CONFIG_MPC8220 1 #define CONFIG_YUKON8220 1 /* ... on Yukon board */ +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* Input clock running at 30Mhz, read Hid1 for the CPU multiplier to diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index a7831c0545..490d4f548d 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -64,6 +64,7 @@ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE +#define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #undef CONFIG_SPD_EEPROM /* Do not use SPD EEPROM for DDR setup*/ |