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-rw-r--r--arch/arm/dts/r8a7792-blanche-u-boot.dts4
-rw-r--r--arch/arm/dts/r8a7792.dtsi17
-rw-r--r--board/renesas/blanche/blanche.c22
-rw-r--r--configs/blanche_defconfig4
-rw-r--r--drivers/clk/renesas/clk-rcar-gen2.c3
5 files changed, 47 insertions, 3 deletions
diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dts b/arch/arm/dts/r8a7792-blanche-u-boot.dts
index 3555663d64..30b27040f5 100644
--- a/arch/arm/dts/r8a7792-blanche-u-boot.dts
+++ b/arch/arm/dts/r8a7792-blanche-u-boot.dts
@@ -8,6 +8,10 @@
#include "r8a7792-blanche.dts"
#include "r8a7792-u-boot.dtsi"
+&iic3 {
+ status = "okay";
+};
+
&scif0 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/r8a7792.dtsi b/arch/arm/dts/r8a7792.dtsi
index 8e9eb4b704..6fd80e3541 100644
--- a/arch/arm/dts/r8a7792.dtsi
+++ b/arch/arm/dts/r8a7792.dtsi
@@ -444,6 +444,23 @@
status = "disabled";
};
+ iic3: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7792",
+ "renesas,rcar-gen2-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ dmas = <&dmac0 0x77>, <&dmac0 0x78>,
+ <&dmac1 0x77>, <&dmac1 0x78>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+ resets = <&cpg 926>;
+ status = "disabled";
+ };
+
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7792",
"renesas,rcar-dmac";
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index 7232370d6f..c15387366c 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -20,6 +20,7 @@
#include <dm.h>
#include <dm/platform_data/serial_sh.h>
#include <env.h>
+#include <hang.h>
#include <i2c.h>
#include <linux/errno.h>
#include <malloc.h>
@@ -313,6 +314,7 @@ int board_init(void)
}
/* Added for BLANCHE(R-CarV2H board) */
+#ifndef CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
int rc = 0;
@@ -337,6 +339,7 @@ int board_eth_init(bd_t *bis)
return rc;
}
+#endif
int dram_init(void)
{
@@ -355,4 +358,23 @@ int dram_init_banksize(void)
void reset_cpu(ulong addr)
{
+ struct udevice *dev;
+ const u8 pmic_bus = 6;
+ const u8 pmic_addr = 0x58;
+ u8 data;
+ int ret;
+
+ ret = i2c_get_chip_for_busnum(pmic_bus, pmic_addr, 1, &dev);
+ if (ret)
+ hang();
+
+ ret = dm_i2c_read(dev, 0x13, &data, 1);
+ if (ret)
+ hang();
+
+ data |= BIT(1);
+
+ ret = dm_i2c_write(dev, 0x13, &data, 1);
+ if (ret)
+ hang();
}
diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index 5c7b517e7c..64b7bccfb4 100644
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -24,7 +24,6 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SDRAM=y
-CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
@@ -53,7 +52,7 @@ CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
-CONFIG_SPI_FLASH=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x18000000
@@ -68,6 +67,7 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
+CONFIG_DM_SPI=y
CONFIG_SH_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c
index 13111b341a..bfd7620dae 100644
--- a/drivers/clk/renesas/clk-rcar-gen2.c
+++ b/drivers/clk/renesas/clk-rcar-gen2.c
@@ -291,7 +291,8 @@ int gen2_clk_probe(struct udevice *dev)
if (ret < 0)
return ret;
- rst_base = fdtdec_get_addr(gd->fdt_blob, ret, "reg");
+ rst_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, ret, "reg",
+ 0, NULL, false);
if (rst_base == FDT_ADDR_T_NONE)
return -EINVAL;