diff options
-rw-r--r-- | arch/arm/mach-at91/spl_atmel.c | 8 | ||||
-rw-r--r-- | board/atmel/sama5d2_icp/sama5d2_icp.c | 38 | ||||
-rw-r--r-- | common/spl/Kconfig | 12 | ||||
-rw-r--r-- | configs/gardena-smart-gateway-at91sam_defconfig | 1 | ||||
-rw-r--r-- | configs/sama5d2_icp_mmc_defconfig | 3 | ||||
-rw-r--r-- | configs/sama5d2_ptc_ek_mmc_defconfig | 1 | ||||
-rw-r--r-- | configs/sama5d2_ptc_ek_nandflash_defconfig | 1 | ||||
-rw-r--r-- | configs/sama5d4_xplained_mmc_defconfig | 2 |
8 files changed, 65 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c index ef745c9477..85290be369 100644 --- a/arch/arm/mach-at91/spl_atmel.c +++ b/arch/arm/mach-at91/spl_atmel.c @@ -44,7 +44,15 @@ static void switch_to_main_crystal_osc(void) #endif tmp = readl(&pmc->mor); +/* + * some boards have an external oscillator with driving. + * in this case we need to disable the internal SoC driving (bypass mode) + */ +#if defined(CONFIG_SPL_AT91_MCK_BYPASS) + tmp |= AT91_PMC_MOR_OSCBYPASS; +#else tmp &= ~AT91_PMC_MOR_OSCBYPASS; +#endif tmp &= ~AT91_PMC_MOR_KEY(0xff); tmp |= AT91_PMC_MOR_KEY(0x37); writel(tmp, &pmc->mor); diff --git a/board/atmel/sama5d2_icp/sama5d2_icp.c b/board/atmel/sama5d2_icp/sama5d2_icp.c index 807cfcdb19..1593e2bd4e 100644 --- a/board/atmel/sama5d2_icp/sama5d2_icp.c +++ b/board/atmel/sama5d2_icp/sama5d2_icp.c @@ -73,6 +73,36 @@ int misc_init_r(void) /* SPL */ #ifdef CONFIG_SPL_BUILD +/* must set PB25 low to enable the CAN transceivers */ +static void board_can_stdby_dis(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 25, 0); +} + +static void board_leds_init(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 0, 0); /* RED */ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 1, 1); /* GREEN */ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 31, 0); /* BLUE */ +} + +/* deassert reset lines for external periph in case of warm reboot */ +static void board_reset_additional_periph(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 16, 0); /* LAN9252_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTC, 2, 0); /* HSIC_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTC, 17, 0); /* USB2534_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTD, 4, 0); /* KSZ8563_RST */ +} + +static void board_start_additional_periph(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 16, 1); /* LAN9252_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTC, 2, 1); /* HSIC_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTC, 17, 1); /* USB2534_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTD, 4, 1); /* KSZ8563_RST */ +} + #ifdef CONFIG_SD_BOOT void spl_mmc_init(void) { @@ -93,12 +123,20 @@ void spl_board_init(void) #ifdef CONFIG_SD_BOOT spl_mmc_init(); #endif + board_reset_additional_periph(); + board_can_stdby_dis(); + board_leds_init(); } void spl_display_print(void) { } +void spl_board_prepare_for_boot(void) +{ + board_start_additional_periph(); +} + static void ddrc_conf(struct atmel_mpddrc_config *ddrc) { ddrc->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR3_SDRAM); diff --git a/common/spl/Kconfig b/common/spl/Kconfig index ac2f470032..9b9e788eb3 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1187,5 +1187,17 @@ config TPL_YMODEM_SUPPORT endif # TPL +config SPL_AT91_MCK_BYPASS + bool "Use external clock signal as a source of main clock for AT91 platforms" + depends on ARCH_AT91 + default n + help + Use external 8 to 24 Mhz clock signal as source of main clock instead + of an external crystal oscillator. + This option disables the internal driving on the XOUT pin. + The external source has to provide a stable clock on the XIN pin. + If this option is disabled, the SoC expects a crystal oscillator + that needs driving on both XIN and XOUT lines. + endif # SPL endmenu diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 577dceb2d4..a25d378064 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y +CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 1fafb767af..e0471086d6 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -23,12 +23,12 @@ CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set @@ -75,3 +75,4 @@ CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER_HII is not set diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index bf2b5584df..25b3aaf623 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -51,6 +51,7 @@ CONFIG_MMC_SDHCI_ATMEL=y CONFIG_NAND=y CONFIG_NAND_ATMEL=y CONFIG_ATMEL_NAND_HW_PMECC=y +CONFIG_PMECC_CAP=4 CONFIG_DM_ETH=y CONFIG_MACB=y CONFIG_PINCTRL=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 9608ecd0b3..3f7e6270d0 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -50,6 +50,7 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y CONFIG_NAND_ATMEL=y CONFIG_ATMEL_NAND_HW_PMECC=y +CONFIG_PMECC_CAP=4 CONFIG_DM_ETH=y CONFIG_MACB=y CONFIG_PINCTRL=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index f673832dff..0504b4ec0f 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -59,6 +59,8 @@ CONFIG_DM_MMC=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_NAND=y CONFIG_NAND_ATMEL=y +CONFIG_ATMEL_NAND_HW_PMECC=y +CONFIG_PMECC_CAP=8 CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=30000000 |