summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--.mailmap1
-rw-r--r--arch/mips/cpu/u-boot.lds6
-rw-r--r--arch/mips/include/asm/system.h13
-rw-r--r--arch/mips/lib/cache.c30
-rw-r--r--board/imgtec/boston/MAINTAINERS2
-rw-r--r--board/imgtec/boston/config.mk14
-rw-r--r--board/imgtec/boston/lowlevel_init.S3
-rw-r--r--board/imgtec/malta/MAINTAINERS2
-rw-r--r--board/imgtec/malta/superio.c2
-rw-r--r--board/imgtec/malta/superio.h2
-rw-r--r--drivers/pci/pci_msc01.c2
-rw-r--r--include/configs/boston.h2
-rw-r--r--include/msc01.h2
-rw-r--r--include/pci_msc01.h2
14 files changed, 59 insertions, 24 deletions
diff --git a/.mailmap b/.mailmap
index 14b5ad7e5c..bd7267241a 100644
--- a/.mailmap
+++ b/.mailmap
@@ -20,6 +20,7 @@ Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Markus Klotzbuecher <mk@denx.de>
+Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
Prabhakar Kushwaha <prabhakar@freescale.com>
Rajeshwari Shinde <rajeshwari.s@samsung.com>
Ricardo Ribalda <ricardo.ribalda@uam.es>
diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds
index bd5536f013..fc943af923 100644
--- a/arch/mips/cpu/u-boot.lds
+++ b/arch/mips/cpu/u-boot.lds
@@ -5,12 +5,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#if defined(CONFIG_64BIT)
-#define PTR_COUNT_SHIFT 3
-#else
-#define PTR_COUNT_SHIFT 2
-#endif
-
OUTPUT_ARCH(mips)
ENTRY(_start)
SECTIONS
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h
index c9c5961462..eaf1b2290d 100644
--- a/arch/mips/include/asm/system.h
+++ b/arch/mips/include/asm/system.h
@@ -14,8 +14,10 @@
#ifndef _ASM_SYSTEM_H
#define _ASM_SYSTEM_H
+#include <asm/asm.h>
#include <asm/sgidefs.h>
#include <asm/ptrace.h>
+#include <linux/stringify.h>
#if 0
#include <linux/kernel.h>
#endif
@@ -270,4 +272,15 @@ static inline void execution_hazard_barrier(void)
".set reorder");
}
+static inline void instruction_hazard_barrier(void)
+{
+ unsigned long tmp;
+
+ asm volatile(
+ __stringify(PTR_LA) "\t%0, 1f\n"
+ " jr.hb %0\n"
+ "1: .insn"
+ : "=&r"(tmp));
+}
+
#endif /* _ASM_SYSTEM_H */
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 91b037f87d..e305f3207a 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -10,7 +10,9 @@
#ifdef CONFIG_MIPS_L2_CACHE
#include <asm/cm.h>
#endif
+#include <asm/io.h>
#include <asm/mipsregs.h>
+#include <asm/system.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -96,6 +98,9 @@ static inline unsigned long scache_line_size(void)
const unsigned int cache_ops[] = { ops }; \
unsigned int i; \
\
+ if (!lsize) \
+ break; \
+ \
for (; addr <= aend; addr += lsize) { \
for (i = 0; i < ARRAY_SIZE(cache_ops); i++) \
mips_cache(cache_ops[i], addr); \
@@ -116,19 +121,24 @@ void flush_cache(ulong start_addr, ulong size)
/* flush I-cache & D-cache simultaneously */
cache_loop(start_addr, start_addr + size, ilsize,
HIT_WRITEBACK_INV_D, HIT_INVALIDATE_I);
- return;
+ goto ops_done;
}
/* flush D-cache */
cache_loop(start_addr, start_addr + size, dlsize, HIT_WRITEBACK_INV_D);
/* flush L2 cache */
- if (slsize)
- cache_loop(start_addr, start_addr + size, slsize,
- HIT_WRITEBACK_INV_SD);
+ cache_loop(start_addr, start_addr + size, slsize, HIT_WRITEBACK_INV_SD);
/* flush I-cache */
cache_loop(start_addr, start_addr + size, ilsize, HIT_INVALIDATE_I);
+
+ops_done:
+ /* ensure cache ops complete before any further memory accesses */
+ sync();
+
+ /* ensure the pipeline doesn't contain now-invalid instructions */
+ instruction_hazard_barrier();
}
void flush_dcache_range(ulong start_addr, ulong stop)
@@ -143,8 +153,10 @@ void flush_dcache_range(ulong start_addr, ulong stop)
cache_loop(start_addr, stop, lsize, HIT_WRITEBACK_INV_D);
/* flush L2 cache */
- if (slsize)
- cache_loop(start_addr, stop, slsize, HIT_WRITEBACK_INV_SD);
+ cache_loop(start_addr, stop, slsize, HIT_WRITEBACK_INV_SD);
+
+ /* ensure cache ops complete before any further memory accesses */
+ sync();
}
void invalidate_dcache_range(ulong start_addr, ulong stop)
@@ -157,8 +169,10 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
return;
/* invalidate L2 cache */
- if (slsize)
- cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD);
+ cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD);
cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_D);
+
+ /* ensure cache ops complete before any further memory accesses */
+ sync();
}
diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS
index ec850d2f91..81f067d690 100644
--- a/board/imgtec/boston/MAINTAINERS
+++ b/board/imgtec/boston/MAINTAINERS
@@ -1,5 +1,5 @@
BOSTON BOARD
-M: Paul Burton <paul.burton@imgtec.com>
+M: Paul Burton <paul.burton@mips.com>
S: Maintained
F: board/imgtec/boston/
F: include/configs/boston.h
diff --git a/board/imgtec/boston/config.mk b/board/imgtec/boston/config.mk
new file mode 100644
index 0000000000..2775727744
--- /dev/null
+++ b/board/imgtec/boston/config.mk
@@ -0,0 +1,14 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+quiet_cmd_srec_cat = SRECCAT $@
+ cmd_srec_cat = srec_cat -output $@ -$2 $< -binary -offset $3
+
+u-boot.mcs: u-boot.bin
+ $(call cmd,srec_cat,intel,0x7c00000)
+
+# if srec_cat is present build u-boot.mcs by default
+has_srec_cat = $(call try-run,srec_cat -VERSion,y,n)
+ALL-$(has_srec_cat) += u-boot.mcs
+CLEAN_FILES += u-boot.mcs
diff --git a/board/imgtec/boston/lowlevel_init.S b/board/imgtec/boston/lowlevel_init.S
index 0c01aa981d..02a75a8ee7 100644
--- a/board/imgtec/boston/lowlevel_init.S
+++ b/board/imgtec/boston/lowlevel_init.S
@@ -34,7 +34,6 @@ LEAF(lowlevel_init)
PTR_LA a0, msg_ddr_ok
bal lowlevel_display
- move v0, zero
jr s0
END(lowlevel_init)
@@ -52,5 +51,5 @@ LEAF(lowlevel_display)
sw k1, 4(AT)
#endif
.set pop
-1: jr ra
+ jr ra
END(lowlevel_display)
diff --git a/board/imgtec/malta/MAINTAINERS b/board/imgtec/malta/MAINTAINERS
index 052ec67b14..b1cf297f4f 100644
--- a/board/imgtec/malta/MAINTAINERS
+++ b/board/imgtec/malta/MAINTAINERS
@@ -1,5 +1,5 @@
MALTA BOARD
-M: Paul Burton <paul.burton@imgtec.com>
+M: Paul Burton <paul.burton@mips.com>
S: Maintained
F: board/imgtec/malta/
F: include/configs/malta.h
diff --git a/board/imgtec/malta/superio.c b/board/imgtec/malta/superio.c
index 7865ae2b70..d6ada4f87d 100644
--- a/board/imgtec/malta/superio.c
+++ b/board/imgtec/malta/superio.c
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.burton@imgtec.com>
+ * Author: Paul Burton <paul.burton@mips.com>
*
* Setup code for the FDC37M817 super I/O controller
*
diff --git a/board/imgtec/malta/superio.h b/board/imgtec/malta/superio.h
index 271c462eac..f0ae1422b8 100644
--- a/board/imgtec/malta/superio.h
+++ b/board/imgtec/malta/superio.h
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.burton@imgtec.com>
+ * Author: Paul Burton <paul.burton@mips.com>
*
* Setup code for the FDC37M817 super I/O controller
*
diff --git a/drivers/pci/pci_msc01.c b/drivers/pci/pci_msc01.c
index 284ffa09b6..a1b9116e4d 100644
--- a/drivers/pci/pci_msc01.c
+++ b/drivers/pci/pci_msc01.c
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.burton@imgtec.com>
+ * Author: Paul Burton <paul.burton@mips.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/include/configs/boston.h b/include/configs/boston.h
index ee4e4a37ea..fdd5ef5632 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -34,7 +34,7 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000)
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x10000000)
diff --git a/include/msc01.h b/include/msc01.h
index 37cf963f13..7ee243bec3 100644
--- a/include/msc01.h
+++ b/include/msc01.h
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.burton@imgtec.com>
+ * Author: Paul Burton <paul.burton@mips.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/include/pci_msc01.h b/include/pci_msc01.h
index 54945a7a8f..066c6622da 100644
--- a/include/pci_msc01.h
+++ b/include/pci_msc01.h
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.burton@imgtec.com>
+ * Author: Paul Burton <paul.burton@mips.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
generated by cgit (git 2.34.1) at 2025-01-08 05:17:12 +0000