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-rw-r--r--arch/arc/Kconfig9
-rw-r--r--arch/arc/dts/Makefile3
-rw-r--r--arch/arc/dts/abilis_tb100.dts12
-rw-r--r--arch/arc/dts/axc001.dtsi19
-rw-r--r--arch/arc/dts/axc003.dtsi19
-rw-r--r--arch/arc/dts/axs101.dts17
-rw-r--r--arch/arc/dts/axs103.dts17
-rw-r--r--arch/arc/dts/axs10x.dts57
-rw-r--r--arch/arc/dts/axs10x_mb.dtsi66
-rw-r--r--arch/arc/dts/nsim.dts14
-rw-r--r--arch/arc/dts/skeleton.dtsi19
-rw-r--r--arch/arc/include/asm/arcregs.h4
-rw-r--r--arch/arc/include/asm/init_helpers.h12
-rw-r--r--arch/arc/include/asm/relocate.h16
-rw-r--r--arch/arc/lib/Makefile1
-rw-r--r--arch/arc/lib/cache.c8
-rw-r--r--arch/arc/lib/cpu.c6
-rw-r--r--arch/arc/lib/start.S16
-rw-r--r--arch/arc/lib/timer.c24
19 files changed, 216 insertions, 123 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 4c5696be1c..6e4b1d0e22 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -118,7 +118,7 @@ config SYS_DCACHE_OFF
choice
prompt "Target select"
- default TARGET_AXS10X
+ default TARGET_AXS103
config TARGET_TB100
bool "Support tb100"
@@ -126,8 +126,11 @@ config TARGET_TB100
config TARGET_NSIM
bool "Support standalone nSIM & Free nSIM"
-config TARGET_AXS10X
- bool "Support Synopsys Designware SDP board (AXS101 & AXS103)"
+config TARGET_AXS101
+ bool "Support Synopsys Designware SDP board AXS101"
+
+config TARGET_AXS103
+ bool "Support Synopsys Designware SDP board AXS103"
endchoice
diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile
index 1d94c082ab..218a6475dd 100644
--- a/arch/arc/dts/Makefile
+++ b/arch/arc/dts/Makefile
@@ -2,7 +2,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
-dtb-$(CONFIG_TARGET_AXS10X) += axs10x.dtb
+dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb
+dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb
dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
diff --git a/arch/arc/dts/abilis_tb100.dts b/arch/arc/dts/abilis_tb100.dts
index cf395c4011..23329ec016 100644
--- a/arch/arc/dts/abilis_tb100.dts
+++ b/arch/arc/dts/abilis_tb100.dts
@@ -8,13 +8,19 @@
#include "skeleton.dtsi"
/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
aliases {
console = &uart0;
};
+ cpu_card {
+ core_clk: core_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <500000000>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
uart0: serial@ff100000 {
compatible = "snps,dw-apb-uart";
reg = <0xff100000 0x1000>;
diff --git a/arch/arc/dts/axc001.dtsi b/arch/arc/dts/axc001.dtsi
new file mode 100644
index 0000000000..1cf630d23b
--- /dev/null
+++ b/arch/arc/dts/axc001.dtsi
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ cpu_card {
+ core_clk: core_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <750000000>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
+
diff --git a/arch/arc/dts/axc003.dtsi b/arch/arc/dts/axc003.dtsi
new file mode 100644
index 0000000000..5e9270a0b7
--- /dev/null
+++ b/arch/arc/dts/axc003.dtsi
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ cpu_card {
+ core_clk: core_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
+
diff --git a/arch/arc/dts/axs101.dts b/arch/arc/dts/axs101.dts
new file mode 100644
index 0000000000..ec7b8b7574
--- /dev/null
+++ b/arch/arc/dts/axs101.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+
+/include/ "axc001.dtsi"
+/include/ "axs10x_mb.dtsi"
+
+
+/ {
+ chosen {
+ stdout-path = &uart0;
+ };
+};
+
diff --git a/arch/arc/dts/axs103.dts b/arch/arc/dts/axs103.dts
new file mode 100644
index 0000000000..8f7a76f377
--- /dev/null
+++ b/arch/arc/dts/axs103.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+
+/include/ "axc003.dtsi"
+/include/ "axs10x_mb.dtsi"
+
+
+/ {
+ chosen {
+ stdout-path = &uart0;
+ };
+};
+
diff --git a/arch/arc/dts/axs10x.dts b/arch/arc/dts/axs10x.dts
deleted file mode 100644
index 391d067158..0000000000
--- a/arch/arc/dts/axs10x.dts
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-/dts-v1/;
-
-#include "skeleton.dtsi"
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- aliases {
- console = &uart0;
- };
-
- clocks {
- apbclk: apbclk {
- compatible = "fixed-clock";
- clock-frequency = <50000000>;
- #clock-cells = <0>;
- };
- };
-
- uart0: serial0@e0022000 {
- compatible = "snps,dw-apb-uart";
- reg = <0xe0022000 0x1000>;
- reg-shift = <2>;
- reg-io-width = <4>;
- };
-
- ethernet@e0018000 {
- #interrupt-cells = <1>;
- compatible = "altr,socfpga-stmmac";
- reg = < 0xe0018000 0x2000 >;
- interrupts = < 25 >;
- interrupt-names = "macirq";
- phy-mode = "gmii";
- snps,pbl = < 32 >;
- clocks = <&apbclk>;
- clock-names = "stmmaceth";
- max-speed = <100>;
- };
-
- ehci@0xe0040000 {
- compatible = "generic-ehci";
- reg = < 0xe0040000 0x100 >;
- interrupts = < 8 >;
- };
-
- ohci@0xe0060000 {
- compatible = "generic-ohci";
- reg = < 0xe0060000 0x100 >;
- interrupts = < 8 >;
- };
-};
diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
new file mode 100644
index 0000000000..b74d3c8545
--- /dev/null
+++ b/arch/arc/dts/axs10x_mb.dtsi
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/ {
+ axs10x_mb@e0000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00000000 0xe0000000 0x10000000>;
+ u-boot,dm-pre-reloc;
+
+ clocks {
+ compatible = "simple-bus";
+ u-boot,dm-pre-reloc;
+
+ apbclk: apbclk {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ #clock-cells = <0>;
+ };
+
+ uartclk: uartclk {
+ compatible = "fixed-clock";
+ clock-frequency = <33333333>;
+ #clock-cells = <0>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ ethernet@18000 {
+ #interrupt-cells = <1>;
+ compatible = "altr,socfpga-stmmac";
+ reg = < 0x18000 0x2000 >;
+ interrupts = < 25 >;
+ interrupt-names = "macirq";
+ phy-mode = "gmii";
+ snps,pbl = < 32 >;
+ clocks = <&apbclk>;
+ clock-names = "stmmaceth";
+ max-speed = <100>;
+ };
+
+ ehci@0x40000 {
+ compatible = "generic-ehci";
+ reg = < 0x40000 0x100 >;
+ interrupts = < 8 >;
+ };
+
+ ohci@0x60000 {
+ compatible = "generic-ohci";
+ reg = < 0x60000 0x100 >;
+ interrupts = < 8 >;
+ };
+
+ uart0: serial0@22000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x22000 0x100>;
+ clocks = <&uartclk>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };
+ };
+};
diff --git a/arch/arc/dts/nsim.dts b/arch/arc/dts/nsim.dts
index 69e16c2a1b..491c46da56 100644
--- a/arch/arc/dts/nsim.dts
+++ b/arch/arc/dts/nsim.dts
@@ -8,17 +8,23 @@
#include "skeleton.dtsi"
/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
aliases {
console = &arcuart0;
};
+ cpu_card {
+ core_clk: core_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <70000000>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
arcuart0: serial@0xc0fc1000 {
compatible = "snps,arc-uart";
reg = <0xc0fc1000 0x100>;
- clock-frequency = <80000000>;
+ clock-frequency = <70000000>;
};
};
diff --git a/arch/arc/dts/skeleton.dtsi b/arch/arc/dts/skeleton.dtsi
index b41d241de2..279fc6cacf 100644
--- a/arch/arc/dts/skeleton.dtsi
+++ b/arch/arc/dts/skeleton.dtsi
@@ -9,5 +9,22 @@
#size-cells = <1>;
chosen { };
aliases { };
- memory { device_type = "memory"; reg = <0 0>; };
+
+ cpu_card {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ timer@0 {
+ compatible = "snps,arc-timer";
+ clocks = <&core_clk>;
+ reg = <0 1>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256M */
+ };
};
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index cf999b0280..54a9b00d4c 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -33,6 +33,10 @@
#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
#define ARC_AUX_TIMER0_LIMIT 0x23 /* Timer 0 limit */
+#define ARC_AUX_TIMER1_CNT 0x100 /* Timer 1 count */
+#define ARC_AUX_TIMER1_CTRL 0x101 /* Timer 1 control */
+#define ARC_AUX_TIMER1_LIMIT 0x102 /* Timer 1 limit */
+
#define ARC_AUX_INTR_VEC_BASE 0x25
/* Data cache related auxiliary registers */
diff --git a/arch/arc/include/asm/init_helpers.h b/arch/arc/include/asm/init_helpers.h
deleted file mode 100644
index 7607e19561..0000000000
--- a/arch/arc/include/asm/init_helpers.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ASM_ARC_INIT_HELPERS_H
-#define _ASM_ARC_INIT_HELPERS_H
-
-int init_cache_f_r(void);
-
-#endif /* _ASM_ARC_INIT_HELPERS_H */
diff --git a/arch/arc/include/asm/relocate.h b/arch/arc/include/asm/relocate.h
deleted file mode 100644
index 4c5f923416..0000000000
--- a/arch/arc/include/asm/relocate.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _ASM_ARC_RELOCATE_H
-#define _ASM_ARC_RELOCATE_H
-
-#include <common.h>
-
-int copy_uboot_to_ram(void);
-int clear_bss(void);
-int do_elf_reloc_fixups(void);
-
-#endif /* _ASM_ARC_RELOCATE_H */
diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile
index eb62b3c427..12097bf3be 100644
--- a/arch/arc/lib/Makefile
+++ b/arch/arc/lib/Makefile
@@ -18,7 +18,6 @@ obj-y += memcmp.o
obj-y += memcpy-700.o
obj-y += memset.o
obj-y += reset.o
-obj-y += timer.o
obj-y += ints_low.o
obj-y += init_helpers.o
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index b6ec83112c..f1436bf199 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -59,10 +59,16 @@ static unsigned int __before_slc_op(const int op)
static void __after_slc_op(const int op, unsigned int reg)
{
- if (op & OP_FLUSH) /* flush / flush-n-inv both wait */
+ if (op & OP_FLUSH) { /* flush / flush-n-inv both wait */
+ /*
+ * Make sure "busy" bit reports correct status,
+ * see STAR 9001165532
+ */
+ read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) &
DC_CTRL_FLUSH_STATUS)
;
+ }
/* Switch back to default Invalidate mode */
if (op == OP_INV)
diff --git a/arch/arc/lib/cpu.c b/arch/arc/lib/cpu.c
index d1f10abb68..cb80893337 100644
--- a/arch/arc/lib/cpu.c
+++ b/arch/arc/lib/cpu.c
@@ -28,3 +28,9 @@ int arch_early_init_r(void)
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
+
+/* This is a dummy function on arc */
+int dram_init(void)
+{
+ return 0;
+}
diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S
index 90ee7e0fe4..b2ba768309 100644
--- a/arch/arc/lib/start.S
+++ b/arch/arc/lib/start.S
@@ -10,6 +10,22 @@
#include <asm/arcregs.h>
ENTRY(_start)
+ ; Non-masters will be halted immediately, they might be kicked later
+ ; by platform code right before passing control to the Linux kernel
+ ; in bootm.c:boot_jump_linux().
+ lr r5, [identity]
+ lsr r5, r5, 8
+ bmsk r5, r5, 7
+ cmp r5, 0
+ mov.nz r0, r5
+ bz .Lmaster_proceed
+ flag 1
+ nop
+ nop
+ nop
+
+.Lmaster_proceed:
+
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
diff --git a/arch/arc/lib/timer.c b/arch/arc/lib/timer.c
deleted file mode 100644
index a0acbbc01a..0000000000
--- a/arch/arc/lib/timer.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <asm/arcregs.h>
-
-#define NH_MODE (1 << 1) /* Disable timer if CPU is halted */
-
-int timer_init(void)
-{
- write_aux_reg(ARC_AUX_TIMER0_CTRL, NH_MODE);
- /* Set max value for counter/timer */
- write_aux_reg(ARC_AUX_TIMER0_LIMIT, 0xffffffff);
- /* Set initial count value and restart counter/timer */
- write_aux_reg(ARC_AUX_TIMER0_CNT, 0);
- return 0;
-}
-
-unsigned long timer_read_counter(void)
-{
- return read_aux_reg(ARC_AUX_TIMER0_CNT);
-}
generated by cgit (git 2.34.1) at 2024-12-26 13:44:14 +0000