summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/arm920t
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/cpu/arm920t')
-rw-r--r--arch/arm/cpu/arm920t/a320/timer.c18
-rw-r--r--arch/arm/cpu/arm920t/at91/clock.c24
-rw-r--r--arch/arm/cpu/arm920t/at91/timer.c14
-rw-r--r--arch/arm/cpu/arm920t/s3c24x0/timer.c30
4 files changed, 44 insertions, 42 deletions
diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c
index 4bfcef2379..512fb9d73d 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -31,14 +31,14 @@ DECLARE_GLOBAL_DATA_PTR;
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, gd->timer_rate_hz);
+ do_div(tick, gd->arch.timer_rate_hz);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
- usec *= gd->timer_rate_hz;
+ usec *= gd->arch.timer_rate_hz;
do_div(usec, 1000000);
return usec;
@@ -74,8 +74,8 @@ int timer_init(void)
cr |= FTTMR010_TM3_ENABLE;
writel(cr, &tmr->cr);
- gd->timer_rate_hz = TIMER_CLOCK;
- gd->tbu = gd->tbl = 0;
+ gd->arch.timer_rate_hz = TIMER_CLOCK;
+ gd->arch.tbu = gd->arch.tbl = 0;
return 0;
}
@@ -89,10 +89,10 @@ unsigned long long get_ticks(void)
ulong now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter);
/* increment tbu if tbl has rolled over */
- if (now < gd->tbl)
- gd->tbu++;
- gd->tbl = now;
- return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
+ if (now < gd->arch.tbl)
+ gd->arch.tbu++;
+ gd->arch.tbl = now;
+ return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
}
void __udelay(unsigned long usec)
@@ -126,5 +126,5 @@ ulong get_timer(ulong base)
*/
ulong get_tbclk(void)
{
- return gd->timer_rate_hz;
+ return gd->arch.timer_rate_hz;
}
diff --git a/arch/arm/cpu/arm920t/at91/clock.c b/arch/arm/cpu/arm920t/at91/clock.c
index 09d2799831..696200d04a 100644
--- a/arch/arm/cpu/arm920t/at91/clock.c
+++ b/arch/arm/cpu/arm920t/at91/clock.c
@@ -29,11 +29,11 @@ static unsigned long at91_css_to_rate(unsigned long css)
case AT91_PMC_MCKR_CSS_SLOW:
return CONFIG_SYS_AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
- return gd->main_clk_rate_hz;
+ return gd->arch.main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
- return gd->plla_rate_hz;
+ return gd->arch.plla_rate_hz;
case AT91_PMC_MCKR_CSS_PLLB:
- return gd->pllb_rate_hz;
+ return gd->arch.pllb_rate_hz;
}
return 0;
@@ -124,10 +124,10 @@ int at91_clock_init(unsigned long main_clock)
main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
}
#endif
- gd->main_clk_rate_hz = main_clock;
+ gd->arch.main_clk_rate_hz = main_clock;
/* report if PLLA is more than mildly overclocked */
- gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
+ gd->arch.plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
#ifdef CONFIG_USB_ATMEL
/*
@@ -136,9 +136,10 @@ int at91_clock_init(unsigned long main_clock)
*
* REVISIT: assumes MCK doesn't derive from PLLB!
*/
- gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
+ gd->arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
AT91_PMC_PLLBR_USBDIV_2;
- gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init);
+ gd->arch.pllb_rate_hz = at91_pll_rate(main_clock,
+ gd->arch.at91_pllb_usb_init);
#endif
/*
@@ -146,13 +147,14 @@ int at91_clock_init(unsigned long main_clock)
* For now, assume this parentage won't change.
*/
mckr = readl(&pmc->mckr);
- gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
- freq = gd->mck_rate_hz;
+ gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
+ freq = gd->arch.mck_rate_hz;
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */
/* mdiv */
- gd->mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
- gd->cpu_clk_rate_hz = freq;
+ gd->arch.mck_rate_hz = freq /
+ (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
+ gd->arch.cpu_clk_rate_hz = freq;
return 0;
}
diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c
index 91607b525e..8ce75843a0 100644
--- a/arch/arm/cpu/arm920t/at91/timer.c
+++ b/arch/arm/cpu/arm920t/at91/timer.c
@@ -63,8 +63,8 @@ int timer_init(void)
writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
- gd->lastinc = 0;
- gd->tbl = 0;
+ gd->arch.lastinc = 0;
+ gd->arch.tbl = 0;
return 0;
}
@@ -89,16 +89,16 @@ ulong get_timer_raw(void)
now = readl(&tc->tc[0].cv) & 0x0000ffff;
- if (now >= gd->lastinc) {
+ if (now >= gd->arch.lastinc) {
/* normal mode */
- gd->tbl += now - gd->lastinc;
+ gd->arch.tbl += now - gd->arch.lastinc;
} else {
/* we have an overflow ... */
- gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc;
+ gd->arch.tbl += now + TIMER_LOAD_VAL - gd->arch.lastinc;
}
- gd->lastinc = now;
+ gd->arch.lastinc = now;
- return gd->tbl;
+ return gd->arch.tbl;
}
ulong get_timer_masked(void)
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index d8668bec5e..d76bf186b6 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -45,25 +45,25 @@ int timer_init(void)
/* use PWM Timer 4 because it has no output */
/* prescaler for Timer 4 is 16 */
writel(0x0f00, &timers->tcfg0);
- if (gd->tbu == 0) {
+ if (gd->arch.tbu == 0) {
/*
* for 10 ms clock period @ PCLK with 4 bit divider = 1/2
* (default) and prescaler = 16. Should be 10390
* @33.25MHz and 15625 @ 50 MHz
*/
- gd->tbu = get_PCLK() / (2 * 16 * 100);
- gd->timer_rate_hz = get_PCLK() / (2 * 16);
+ gd->arch.tbu = get_PCLK() / (2 * 16 * 100);
+ gd->arch.timer_rate_hz = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
- writel(gd->tbu, &timers->tcntb4);
+ writel(gd->arch.tbu, &timers->tcntb4);
/* auto load, manual update of timer 4 */
tmr = (readl(&timers->tcon) & ~0x0700000) | 0x0600000;
writel(tmr, &timers->tcon);
/* auto load, start timer 4 */
tmr = (tmr & ~0x0700000) | 0x0500000;
writel(tmr, &timers->tcon);
- gd->lastinc = 0;
- gd->tbl = 0;
+ gd->arch.lastinc = 0;
+ gd->arch.tbl = 0;
return 0;
}
@@ -82,7 +82,7 @@ void __udelay (unsigned long usec)
ulong start = get_ticks();
tmo = usec / 1000;
- tmo *= (gd->tbu * 100);
+ tmo *= (gd->arch.tbu * 100);
tmo /= 1000;
while ((ulong) (get_ticks() - start) < tmo)
@@ -93,7 +93,7 @@ ulong get_timer_masked(void)
{
ulong tmr = get_ticks();
- return tmr / (gd->timer_rate_hz / CONFIG_SYS_HZ);
+ return tmr / (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
}
void udelay_masked(unsigned long usec)
@@ -104,10 +104,10 @@ void udelay_masked(unsigned long usec)
if (usec >= 1000) {
tmo = usec / 1000;
- tmo *= (gd->tbu * 100);
+ tmo *= (gd->arch.tbu * 100);
tmo /= 1000;
} else {
- tmo = usec * (gd->tbu * 100);
+ tmo = usec * (gd->arch.tbu * 100);
tmo /= (1000 * 1000);
}
@@ -128,16 +128,16 @@ unsigned long long get_ticks(void)
struct s3c24x0_timers *timers = s3c24x0_get_base_timers();
ulong now = readl(&timers->tcnto4) & 0xffff;
- if (gd->lastinc >= now) {
+ if (gd->arch.lastinc >= now) {
/* normal mode */
- gd->tbl += gd->lastinc - now;
+ gd->arch.tbl += gd->arch.lastinc - now;
} else {
/* we have an overflow ... */
- gd->tbl += gd->lastinc + gd->tbu - now;
+ gd->arch.tbl += gd->arch.lastinc + gd->arch.tbu - now;
}
- gd->lastinc = now;
+ gd->arch.lastinc = now;
- return gd->tbl;
+ return gd->arch.tbl;
}
/*
generated by cgit (git 2.34.1) at 2025-01-01 08:43:47 +0000