diff options
Diffstat (limited to 'arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 31 |
1 files changed, 22 insertions, 9 deletions
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c index a532f8ab60..df7d6a24ba 100644 --- a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c +++ b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c @@ -32,6 +32,7 @@ #include <asm/arch/emif_defs.h> #include <asm/arch/pll_defs.h> +#if defined(CONFIG_SYS_DA850_PLL_INIT) void da850_waitloop(unsigned long loopcnt) { unsigned long i; @@ -85,6 +86,13 @@ int da850_pll_init(struct davinci_pllc_regs *reg, unsigned long pllmult) /* Enable the PLL from Disable Mode PLLDIS bit to 0 */ clrbits_le32(®->pllctl, PLLCTL_PLLDIS); +#if defined(CONFIG_SYS_DA850_PLL0_PREDIV) + /* program the prediv */ + if (reg == davinci_pllc0_regs && CONFIG_SYS_DA850_PLL0_PREDIV) + writel((PLL_DIVEN | CONFIG_SYS_DA850_PLL0_PREDIV), + ®->prediv); +#endif + /* Program the required multiplier value in PLLM */ writel(pllmult, ®->pllm); @@ -156,7 +164,9 @@ int da850_pll_init(struct davinci_pllc_regs *reg, unsigned long pllmult) return 0; } +#endif /* CONFIG_SYS_DA850_PLL_INIT */ +#if defined(CONFIG_SYS_DA850_DDR_INIT) int da850_ddr_setup(void) { unsigned long tmp; @@ -235,6 +245,7 @@ int da850_ddr_setup(void) return 0; } +#endif /* CONFIG_SYS_DA850_DDR_INIT */ __attribute__((weak)) void board_gpio_init(void) @@ -242,10 +253,6 @@ void board_gpio_init(void) return; } -/* pinmux_resource[] vector is defined in the board specific file */ -extern const struct pinmux_resource pinmuxes[]; -extern const int pinmuxes_size; - int arch_cpu_init(void) { /* Unlock kick registers */ @@ -259,13 +266,11 @@ int arch_cpu_init(void) if (davinci_configure_pin_mux_items(pinmuxes, pinmuxes_size)) return 1; +#if defined(CONFIG_SYS_DA850_PLL_INIT) /* PLL setup */ da850_pll_init(davinci_pllc0_regs, CONFIG_SYS_DA850_PLL0_PLLM); da850_pll_init(davinci_pllc1_regs, CONFIG_SYS_DA850_PLL1_PLLM); - - /* GPIO setup */ - board_gpio_init(); - +#endif /* setup CSn config */ #if defined(CONFIG_SYS_DA850_CS2CFG) writel(CONFIG_SYS_DA850_CS2CFG, &davinci_emif_regs->ab1cr); @@ -274,7 +279,12 @@ int arch_cpu_init(void) writel(CONFIG_SYS_DA850_CS3CFG, &davinci_emif_regs->ab2cr); #endif - lpsc_on(CONFIG_SYS_DA850_LPSC_UART); + da8xx_configure_lpsc_items(lpsc, lpsc_size); + + /* GPIO setup */ + board_gpio_init(); + + NS16550_init((NS16550_t)(CONFIG_SYS_NS16550_COM1), CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); @@ -286,6 +296,9 @@ int arch_cpu_init(void) DAVINCI_UART_PWREMU_MGMT_UTRST), &davinci_uart2_ctrl_regs->pwremu_mgmt); +#if defined(CONFIG_SYS_DA850_DDR_INIT) da850_ddr_setup(); +#endif + return 0; } |