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-rw-r--r--arch/arm/cpu/arm926ejs/Makefile15
-rw-r--r--arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c14
-rw-r--r--arch/arm/cpu/arm926ejs/mx27/Makefile4
-rw-r--r--arch/arm/cpu/arm926ejs/mx27/relocate.S51
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/mxsimage-signed.cfg1
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg1
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg1
-rw-r--r--arch/arm/cpu/arm926ejs/mxs/spl_power_init.c3
8 files changed, 89 insertions, 1 deletions
diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile
index 125299537f..adcea9f683 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -13,3 +13,18 @@ ifdef CONFIG_SPL_NO_CPU_SUPPORT_CODE
extra-y :=
endif
endif
+
+obj-$(CONFIG_ARMADA100) += armada100/
+obj-$(CONFIG_AT91FAMILY) += at91/
+obj-$(CONFIG_ARCH_DAVINCI) += davinci/
+obj-$(CONFIG_KIRKWOOD) += kirkwood/
+obj-$(if $(filter lpc32xx,$(SOC)),y) += lpc32xx/
+obj-$(CONFIG_MB86R0x) += mb86r0x/
+obj-$(CONFIG_MX25) += mx25/
+obj-$(CONFIG_MX27) += mx27/
+obj-$(if $(filter mxs,$(SOC)),y) += mxs/
+obj-$(CONFIG_ARCH_NOMADIK) += nomadik/
+obj-$(CONFIG_ORION5X) += orion5x/
+obj-$(CONFIG_PANTHEON) += pantheon/
+obj-$(if $(filter spear,$(SOC)),y) += spear/
+obj-$(CONFIG_ARCH_VERSATILE) += versatile/
diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
index 7a7fd7dfb2..efb53d673f 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <dm.h>
#include <asm/io.h>
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91_common.h>
@@ -229,3 +230,16 @@ void at91_sdram_hw_init(void)
at91_set_a_periph(AT91_PIO_PORTC, 30, 0);
at91_set_a_periph(AT91_PIO_PORTC, 31, 0);
}
+
+/* Platform data for the GPIOs */
+static const struct at91_port_platdata at91sam9260_plat[] = {
+ { ATMEL_BASE_PIOA, "PA" },
+ { ATMEL_BASE_PIOB, "PB" },
+ { ATMEL_BASE_PIOC, "PC" },
+};
+
+U_BOOT_DEVICES(at91sam9260_gpios) = {
+ { "gpio_at91", &at91sam9260_plat[0] },
+ { "gpio_at91", &at91sam9260_plat[1] },
+ { "gpio_at91", &at91sam9260_plat[2] },
+};
diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile b/arch/arm/cpu/arm926ejs/mx27/Makefile
index 4976bbb89b..0edf1445fe 100644
--- a/arch/arm/cpu/arm926ejs/mx27/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx27/Makefile
@@ -5,3 +5,7 @@
# SPDX-License-Identifier: GPL-2.0+
obj-y = generic.o reset.o timer.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += relocate.o
+endif
diff --git a/arch/arm/cpu/arm926ejs/mx27/relocate.S b/arch/arm/cpu/arm926ejs/mx27/relocate.S
new file mode 100644
index 0000000000..0c4b272889
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx27/relocate.S
@@ -0,0 +1,51 @@
+/*
+ * relocate - i.MX27-specific vector relocation
+ *
+ * Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm-offsets.h>
+#include <config.h>
+#include <linux/linkage.h>
+
+/*
+ * The i.MX27 SoC is very specific with respect to exceptions: it
+ * does not provide RAM at the high vectors address (0xFFFF0000),
+ * thus only the low address (0x00000000) is useable; but that is
+ * in ROM. Therefore, vectors cannot be changed at all.
+ *
+ * However, these ROM-based vectors actually just perform indirect
+ * calls through pointers located in RAM at SoC-specific addresses,
+ * as follows:
+ *
+ * Offset Exception Use by ROM code
+ * 0x00000000 reset indirect branch to [0x00000014]
+ * 0x00000004 undefined instruction indirect branch to [0xfffffef0]
+ * 0x00000008 software interrupt indirect branch to [0xfffffef4]
+ * 0x0000000c prefetch abort indirect branch to [0xfffffef8]
+ * 0x00000010 data abort indirect branch to [0xfffffefc]
+ * 0x00000014 (reserved in ARMv5) vector to ROM reset: 0xc0000000
+ * 0x00000018 IRQ indirect branch to [0xffffff00]
+ * 0x0000001c FIQ indirect branch to [0xffffff04]
+ *
+ * In order to initialize exceptions on i.MX27, we must copy U-Boot's
+ * indirect (not exception!) vector table into 0xfffffef0..0xffffff04
+ * taking care not to copy vectors number 5 (reserved exception).
+ */
+
+ .section .text.relocate_vectors,"ax",%progbits
+
+ENTRY(relocate_vectors)
+
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
+ ldr r1, =32 /* size of vector table */
+ add r0, r0, r1 /* skip to indirect table */
+ ldr r1, =0xFFFFFEF0 /* i.MX27 indirect table */
+ ldmia r0!, {r2-r8} /* load indirect vectors 1..7 */
+ stmia r1!, {r2-r5, r7,r8} /* write all but vector 5 */
+
+ bx lr
+
+ENDPROC(relocate_vectors)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage-signed.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage-signed.cfg
index 1520bba3fb..83953daf28 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxsimage-signed.cfg
+++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage-signed.cfg
@@ -1,3 +1,4 @@
+DISPLAYPROGRESS
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x1000 spl/u-boot-spl.bin
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
index 55510e9cd8..e7028092a2 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
+++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
@@ -1,3 +1,4 @@
+DISPLAYPROGRESS
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x1000 spl/u-boot-spl.bin
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
index bb78cb0c84..3f7bf59924 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
+++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
@@ -1,3 +1,4 @@
+DISPLAYPROGRESS
SECTION 0x0 BOOTABLE
TAG LAST
LOAD 0x1000 spl/u-boot-spl.bin
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index d25019a51e..1c54ab7de3 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -1002,7 +1002,8 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg,
uint32_t powered_by_linreg = 0;
int adjust_up, tmp;
- new_brownout = DIV_ROUND(new_target - new_brownout, cfg->step_mV);
+ new_brownout = DIV_ROUND_CLOSEST(new_target - new_brownout,
+ cfg->step_mV);
cur_target = readl(cfg->reg);
cur_target &= cfg->trg_mask;