diff options
Diffstat (limited to 'arch/arm/cpu/armv7/tegra2/funcmux.c')
| -rw-r--r-- | arch/arm/cpu/armv7/tegra2/funcmux.c | 152 |
1 files changed, 139 insertions, 13 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c index 0878f51110..c1d2dfec5f 100644 --- a/arch/arm/cpu/armv7/tegra2/funcmux.c +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c @@ -22,31 +22,151 @@ /* Tegra2 high-level function multiplexing */ #include <common.h> #include <asm/arch/clock.h> +#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> int funcmux_select(enum periph_id id, int config) { - if (config != 0) { - debug("%s: invalid config %d for periph_id %d", __func__, - config, id); - return -1; - } + int bad_config = config != FUNCMUX_DEFAULT; + switch (id) { case PERIPH_ID_UART1: - pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA); - pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA); - pinmux_tristate_disable(PINGRP_IRRX); - pinmux_tristate_disable(PINGRP_IRTX); + if (config == FUNCMUX_UART1_IRRX_IRTX) { + pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA); + pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA); + pinmux_tristate_disable(PINGRP_IRRX); + pinmux_tristate_disable(PINGRP_IRTX); + /* + * Tegra appears to boot with function UARTA pre- + * selected on mux group SDB. If two mux groups are + * both set to the same function, it's unclear which + * group's pins drive the RX signals into the HW. + * For UARTA, SDB certainly overrides group IRTX in + * practice. To solve this, configure some alternative + * function on SDB to avoid the conflict. Also, tri- + * state the group to avoid driving any signal onto it + * until we know what's connected. + */ + pinmux_tristate_enable(PINGRP_SDB); + pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); + } break; case PERIPH_ID_UART2: - pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA); - pinmux_tristate_disable(PINGRP_UAD); + if (config == FUNCMUX_UART2_IRDA) { + pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA); + pinmux_tristate_disable(PINGRP_UAD); + } break; case PERIPH_ID_UART4: - pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD); - pinmux_tristate_disable(PINGRP_GMC); + if (config == FUNCMUX_UART4_GMC) { + pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD); + pinmux_tristate_disable(PINGRP_GMC); + } + break; + + case PERIPH_ID_DVC_I2C: + /* there is only one selection, pinmux_config is ignored */ + if (config == FUNCMUX_DVC_I2CP) { + pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C); + pinmux_tristate_disable(PINGRP_I2CP); + } + break; + + case PERIPH_ID_I2C1: + /* support pinmux_config of 0 for now, */ + if (config == FUNCMUX_I2C1_RM) { + pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C); + pinmux_tristate_disable(PINGRP_RM); + } + break; + case PERIPH_ID_I2C2: /* I2C2 */ + switch (config) { + case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */ + pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2); + /* PTA to HDMI */ + pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI); + pinmux_tristate_disable(PINGRP_DDC); + break; + case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */ + pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2); + /* set DDC_SEL to RSVDx (RSVD2 works for now) */ + pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2); + pinmux_tristate_disable(PINGRP_PTA); + bad_config = 0; + break; + } + break; + case PERIPH_ID_I2C3: /* I2C3 */ + /* support pinmux_config of 0 for now */ + if (config == FUNCMUX_I2C3_DTF) { + pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3); + pinmux_tristate_disable(PINGRP_DTF); + } + break; + + case PERIPH_ID_SDMMC2: + if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) { + pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2); + pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2); + + pinmux_tristate_disable(PINGRP_DTA); + pinmux_tristate_disable(PINGRP_DTD); + } + break; + + case PERIPH_ID_SDMMC3: + switch (config) { + case FUNCMUX_SDMMC3_SDB_SLXA_8BIT: + pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3); + pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3); + pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3); + pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3); + + pinmux_tristate_disable(PINGRP_SLXA); + pinmux_tristate_disable(PINGRP_SLXC); + pinmux_tristate_disable(PINGRP_SLXD); + pinmux_tristate_disable(PINGRP_SLXK); + /* fall through */ + + case FUNCMUX_SDMMC3_SDB_4BIT: + pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); + pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3); + pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3); + + pinmux_tristate_disable(PINGRP_SDB); + pinmux_tristate_disable(PINGRP_SDC); + pinmux_tristate_disable(PINGRP_SDD); + bad_config = 0; + break; + } + break; + + case PERIPH_ID_SDMMC4: + switch (config) { + case FUNCMUX_SDMMC4_ATC_ATD_8BIT: + pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4); + pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4); + + pinmux_tristate_disable(PINGRP_ATC); + pinmux_tristate_disable(PINGRP_ATD); + break; + + case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT: + pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); + pinmux_tristate_disable(PINGRP_GME); + /* fall through */ + + case FUNCMUX_SDMMC4_ATB_GMA_4_BIT: + pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); + pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); + + pinmux_tristate_disable(PINGRP_ATB); + pinmux_tristate_disable(PINGRP_GMA); + bad_config = 0; + break; + } break; default: @@ -54,5 +174,11 @@ int funcmux_select(enum periph_id id, int config) return -1; } + if (bad_config) { + debug("%s: invalid config %d for periph_id %d", __func__, + config, id); + return -1; + } + return 0; } |