diff options
Diffstat (limited to 'arch/arm/cpu/armv7')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/board.c | 13 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/lowlevel_init.S | 22 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 29 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap-common/hwinit-common.c | 6 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/Kconfig | 5 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/board.c | 21 |
6 files changed, 84 insertions, 12 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 81477aa7b0..67bef23ea9 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -275,6 +275,14 @@ static void watchdog_disable(void) ; } +#ifdef CONFIG_SPL_BUILD +void board_init_f(ulong dummy) +{ + board_early_init_f(); + sdram_init(); +} +#endif + void s_init(void) { /* @@ -290,6 +298,7 @@ void s_init(void) setup_clocks_for_console(); uart_soft_reset(); #if defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT) + /* TODO: This does not work, gd is not available yet */ gd->baudrate = CONFIG_BAUDRATE; serial_init(); gd->have_console = 1; @@ -298,9 +307,5 @@ void s_init(void) /* Enable RTC32K clock */ rtc32k_enable(); #endif -#ifdef CONFIG_SPL_BUILD - board_early_init_f(); - sdram_init(); -#endif } #endif diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S index f1aea05c90..427b0b1321 100644 --- a/arch/arm/cpu/armv7/lowlevel_init.S +++ b/arch/arm/cpu/armv7/lowlevel_init.S @@ -17,10 +17,17 @@ ENTRY(lowlevel_init) /* - * Setup a temporary stack + * Setup a temporary stack. Global data is not available yet. */ ldr sp, =CONFIG_SYS_INIT_SP_ADDR bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ +#ifdef CONFIG_DM + mov r9, #0 +#else + /* + * Set up global data for boards that still need it. This will be + * removed soon. + */ #ifdef CONFIG_SPL_BUILD ldr r9, =gdata #else @@ -28,13 +35,24 @@ ENTRY(lowlevel_init) bic sp, sp, #7 mov r9, sp #endif +#endif /* * Save the old lr(passed in ip) and the current lr to stack */ push {ip, lr} /* - * go setup pll, mux, memory + * Call the very early init function. This should do only the + * absolute bare minimum to get started. It should not: + * + * - set up DRAM + * - use global_data + * - clear BSS + * - try to start a console + * + * For boards with SPL this should be empty since SPL can do all of + * this init in the SPL board_init_f() function which is called + * immediately after this. */ bl s_init pop {ip, pc} diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index e599a12b3a..ef029722b4 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -230,6 +230,11 @@ static void imx_set_wdog_powerdown(bool enable) struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR; struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR; +#ifdef CONFIG_MX6SX + struct wdog_regs *wdog3 = (struct wdog_regs *)WDOG3_BASE_ADDR; + writew(enable, &wdog3->wmcr); +#endif + /* Write to the PDE (Power Down Enable) bit */ writew(enable, &wdog1->wmcr); writew(enable, &wdog2->wmcr); @@ -255,6 +260,23 @@ static void clear_mmdc_ch_mask(void) writel(0, &mxc_ccm->ccdr); } +static void init_bandgap(void) +{ + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; + /* + * Ensure the bandgap has stabilized. + */ + while (!(readl(&anatop->ana_misc0) & 0x80)) + ; + /* + * For best noise performance of the analog blocks using the + * outputs of the bandgap, the reftop_selfbiasoff bit should + * be set. + */ + writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set); +} + + #ifdef CONFIG_MX6SL static void set_preclk_from_osc(void) { @@ -275,6 +297,13 @@ int arch_cpu_init(void) clear_mmdc_ch_mask(); /* + * Disable self-bias circuit in the analog bandap. + * The self-bias circuit is used by the bandgap during startup. + * This bit should be set after the bandgap has initialized. + */ + init_bandgap(); + + /* * When low freq boot is enabled, ROM will not set AHB * freq, so we need to ensure AHB freq is 132MHz in such * scenario. diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index cb35c198f1..6c8f3bcea4 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -128,14 +128,18 @@ void s_init(void) do_io_settings(); #endif prcm_init(); +} + #ifdef CONFIG_SPL_BUILD +void board_init_f(ulong dummy) +{ #ifdef CONFIG_BOARD_EARLY_INIT_F board_early_init_f(); #endif /* For regular u-boot sdram_init() is called from dram_init() */ sdram_init(); -#endif } +#endif /* * Routine: wait_for_command_complete diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig index 4a0ac2c987..65da6e2c17 100644 --- a/arch/arm/cpu/armv7/omap3/Kconfig +++ b/arch/arm/cpu/armv7/omap3/Kconfig @@ -91,6 +91,10 @@ config TARGET_TWISTER bool "Twister" select SUPPORT_SPL +config TARGET_OMAP3_CAIRO + bool "QUIPOS CAIRO" + select SUPPORT_SPL + endchoice config DM @@ -133,5 +137,6 @@ source "board/matrix_vision/mvblx/Kconfig" source "board/nokia/rx51/Kconfig" source "board/technexion/tao3530/Kconfig" source "board/technexion/twister/Kconfig" +source "board/quipos/cairo/Kconfig" endif diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7bb5..dd53b207f8 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -240,8 +240,6 @@ void try_unlock_memory(void) *****************************************************************************/ void s_init(void) { - int in_sdram = is_running_in_sdram(); - watchdog_init(); try_unlock_memory(); @@ -264,10 +262,14 @@ void s_init(void) #ifdef CONFIG_USB_EHCI_OMAP ehci_clocks_enable(); #endif +} - if (!in_sdram) - mem_init(); +#ifdef CONFIG_SPL_BUILD +void board_init_f(ulong dummy) +{ + mem_init(); } +#endif /* * Routine: misc_init_r @@ -345,7 +347,16 @@ static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const arg goto usage; } } else if (strncmp(argv[1], "sw", 2) == 0) { - omap_nand_switch_ecc(0, 0); + if (argc == 2) { + omap_nand_switch_ecc(0, 1); + } else { + if (strncmp(argv[2], "hamming", 7) == 0) + omap_nand_switch_ecc(0, 1); + else if (strncmp(argv[2], "bch8", 4) == 0) + omap_nand_switch_ecc(0, 8); + else + goto usage; + } } else { goto usage; } |