diff options
Diffstat (limited to 'arch/arm/cpu/armv7')
| -rw-r--r-- | arch/arm/cpu/armv7/ls102xa/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c | 41 |
3 files changed, 4 insertions, 42 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Makefile b/arch/arm/cpu/armv7/ls102xa/Makefile index f8300c7775..0c1596f330 100644 --- a/arch/arm/cpu/armv7/ls102xa/Makefile +++ b/arch/arm/cpu/armv7/ls102xa/Makefile @@ -10,7 +10,6 @@ obj-y += timer.o obj-y += fsl_epu.o obj-y += soc.o -obj-$(CONFIG_SCSI_AHCI_PLAT) += ls102xa_sata.o obj-$(CONFIG_OF_LIBFDT) += fdt.o obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o obj-$(CONFIG_SPL) += spl.o diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index af413f8622..bb169aaaf4 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -73,6 +73,7 @@ static void __secure ls1_deepsleep_irq_cfg(void) * read, that is why we don't read it from register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]); + out_be32(&rcpm->ippdexpcr1, ippdexpcr1); if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC) pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 | @@ -192,6 +193,9 @@ static void __secure ls1_deep_sleep(u32 entry_point) setbits_be32(&scfg->dpslpcr, SCFG_DPSLPCR_WDRR_EN); setbits_be32(&gur->crstsr, DCFG_CRSTSR_WDRFR); + /* Disable QE */ + setbits_be32(&gur->devdisr, CCSR_DEVDISR1_QE); + ls1_deepsleep_irq_cfg(); psci_v7_flush_dcache_all(); diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c deleted file mode 100644 index c9fe7522fb..0000000000 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2015 Freescale Semiconductor, Inc. - */ -#include <common.h> -#include <asm/io.h> -#include <asm/arch/immap_ls102xa.h> -#include <ahci.h> -#include <scsi.h> - -/* port register default value */ -#define AHCI_PORT_PHY_1_CFG 0xa003fffe -#define AHCI_PORT_PHY_2_CFG 0x28183414 -#define AHCI_PORT_PHY_3_CFG 0x0e080e06 -#define AHCI_PORT_PHY_4_CFG 0x064a080b -#define AHCI_PORT_PHY_5_CFG 0x2aa86470 -#define AHCI_PORT_TRANS_CFG 0x08000029 - -#define SATA_ECC_REG_ADDR 0x20220520 -#define SATA_ECC_DISABLE 0x00020000 - -int ls1021a_sata_init(void) -{ - struct ccsr_ahci __iomem *ccsr_ahci = (void *)AHCI_BASE_ADDR; - -#ifdef CONFIG_SYS_FSL_ERRATUM_A008407 - out_le32((void *)SATA_ECC_REG_ADDR, SATA_ECC_DISABLE); -#endif - - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG); - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG); - out_le32(&ccsr_ahci->pp4c, AHCI_PORT_PHY_4_CFG); - out_le32(&ccsr_ahci->pp5c, AHCI_PORT_PHY_5_CFG); - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); - - ahci_init((void __iomem *)AHCI_BASE_ADDR); - scsi_scan(false); - - return 0; -} |