diff options
Diffstat (limited to 'arch/arm/cpu/armv8')
| -rw-r--r-- | arch/arm/cpu/armv8/zynqmp/Kconfig | 8 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/zynqmp/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/zynqmp/cpu.c | 28 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/zynqmp/psu_spl_init.c | 80 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/zynqmp/spl.c | 8 |
5 files changed, 106 insertions, 19 deletions
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig index 3f922b4097..9e521ed874 100644 --- a/arch/arm/cpu/armv8/zynqmp/Kconfig +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@ -68,6 +68,12 @@ config PMUFW_INIT_FILE config ZYNQMP_USB bool "Configure ZynqMP USB" +config ZYNQMP_NO_DDR + bool "Disable DDR MMU mapping" + help + This option configures MMU with no DDR to avoid speculative + access to DDR memory where DDR is not present. + config SYS_MALLOC_F_LEN default 0x600 @@ -107,7 +113,7 @@ config SPL_ZYNQMP_ALT_BOOTMODE choice prompt "Boot mode" depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED - default JTAG + default JTAG_MODE config JTAG_MODE bool "JTAG_MODE" diff --git a/arch/arm/cpu/armv8/zynqmp/Makefile b/arch/arm/cpu/armv8/zynqmp/Makefile index 72dee3ded4..dde1a0f658 100644 --- a/arch/arm/cpu/armv8/zynqmp/Makefile +++ b/arch/arm/cpu/armv8/zynqmp/Makefile @@ -9,3 +9,4 @@ obj-y += clk.o obj-y += cpu.o obj-$(CONFIG_MP) += mp.o obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o +obj-$(CONFIG_ZYNQMP_PSU_INIT_ENABLED) += psu_spl_init.o diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index f026cb4511..bc77dd03c3 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -17,20 +17,24 @@ DECLARE_GLOBAL_DATA_PTR; static struct mm_region zynqmp_mem_map[] = { +#if !defined(CONFIG_ZYNQMP_NO_DDR) { .virt = 0x0UL, .phys = 0x0UL, .size = 0x80000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE - }, { + }, +#endif + { .virt = 0x80000000UL, .phys = 0x80000000UL, .size = 0x70000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { + }, + { .virt = 0xf8000000UL, .phys = 0xf8000000UL, .size = 0x07e00000UL, @@ -48,20 +52,24 @@ static struct mm_region zynqmp_mem_map[] = { #endif .virt = 0x400000000UL, .phys = 0x400000000UL, - .size = 0x200000000UL, + .size = 0x400000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN - }, { - .virt = 0x600000000UL, - .phys = 0x600000000UL, + }, +#if !defined(CONFIG_ZYNQMP_NO_DDR) + { + .virt = 0x800000000UL, + .phys = 0x800000000UL, .size = 0x800000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE - }, { - .virt = 0xe00000000UL, - .phys = 0xe00000000UL, - .size = 0xf200000000UL, + }, +#endif + { + .virt = 0x1000000000UL, + .phys = 0x1000000000UL, + .size = 0xf000000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN diff --git a/arch/arm/cpu/armv8/zynqmp/psu_spl_init.c b/arch/arm/cpu/armv8/zynqmp/psu_spl_init.c new file mode 100644 index 0000000000..28d39570b3 --- /dev/null +++ b/arch/arm/cpu/armv8/zynqmp/psu_spl_init.c @@ -0,0 +1,80 @@ +/* + * Copyright 2018 Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <asm/io.h> +#include <asm/arch/psu_init_gpl.h> + +#define PSU_MASK_POLL_TIME 1100000 + +int __maybe_unused mask_pollonvalue(unsigned long add, u32 mask, u32 value) +{ + int i = 0; + + while ((__raw_readl(add) & mask) != value) { + if (i == PSU_MASK_POLL_TIME) + return 0; + i++; + } + return 1; +} + +__weak int mask_poll(u32 add, u32 mask) +{ + int i = 0; + unsigned long addr = add; + + while (!(__raw_readl(addr) & mask)) { + if (i == PSU_MASK_POLL_TIME) + return 0; + i++; + } + return 1; +} + +__weak u32 mask_read(u32 add, u32 mask) +{ + unsigned long addr = add; + + return __raw_readl(addr) & mask; +} + +__weak void mask_delay(u32 delay) +{ + udelay(delay); +} + +__weak void psu_mask_write(unsigned long offset, unsigned long mask, + unsigned long val) +{ + unsigned long regval = 0; + + regval = readl(offset); + regval &= ~(mask); + regval |= (val & mask); + writel(regval, offset); +} + +__weak void prog_reg(unsigned long addr, unsigned long mask, + unsigned long shift, unsigned long value) +{ + int rdata = 0; + + rdata = readl(addr); + rdata = rdata & (~mask); + rdata = rdata | (value << shift); + writel(rdata, addr); +} + +__weak int psu_init(void) +{ + /* + * This function is overridden by the one in + * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists. + */ + return -1; +} diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c index 41b0070a5e..bc7313a88b 100644 --- a/arch/arm/cpu/armv8/zynqmp/spl.c +++ b/arch/arm/cpu/armv8/zynqmp/spl.c @@ -129,14 +129,6 @@ u32 spl_boot_mode(const u32 boot_device) } } -__weak void psu_init(void) -{ - /* - * This function is overridden by the one in - * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists. - */ -} - #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { |