diff options
Diffstat (limited to 'arch/arm/cpu/armv8')
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 10 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/soc.c | 44 |
4 files changed, 58 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index b25639183f..2f75b2cdd3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -46,6 +46,7 @@ config ARCH_LS1028A select SYS_FSL_ERRATUM_A009663 if !TFABOOT select SYS_FSL_ERRATUM_A009942 if !TFABOOT select SYS_FSL_ERRATUM_A050382 + select RESV_RAM if GIC_V3_ITS imply PANIC_HANG config ARCH_LS1043A @@ -152,6 +153,7 @@ config ARCH_LS1088A select SYS_I2C_MXC_I2C2 if !TFABOOT select SYS_I2C_MXC_I2C3 if !TFABOOT select SYS_I2C_MXC_I2C4 if !TFABOOT + select RESV_RAM if GIC_V3_ITS imply SCSI imply PANIC_HANG @@ -202,6 +204,7 @@ config ARCH_LS2080A select SYS_I2C_MXC_I2C2 if !TFABOOT select SYS_I2C_MXC_I2C3 if !TFABOOT select SYS_I2C_MXC_I2C4 if !TFABOOT + select RESV_RAM if GIC_V3_ITS imply DISTRO_DEFAULTS imply PANIC_HANG @@ -229,6 +232,7 @@ config ARCH_LX2160A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC + select RESV_RAM if GIC_V3_ITS imply DISTRO_DEFAULTS imply PANIC_HANG imply SCSI diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index b443894453..b3f5c2f641 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1156,8 +1156,10 @@ int arch_early_init_r(void) fsl_rgmii_init(); #endif #ifdef CONFIG_FMAN_ENET +#ifndef CONFIG_DM_ETH fman_enet_init(); #endif +#endif #ifdef CONFIG_SYS_DPAA_QBMAN setup_qbman_portals(); #endif @@ -1379,7 +1381,7 @@ static int tfa_dram_init_banksize(void) if (i > 0) ret = 0; -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD) /* Assign memory for MC */ #ifdef CONFIG_SYS_DDR_BLOCK3_BASE if (gd->bd->bi_dram[2].size >= @@ -1402,7 +1404,7 @@ static int tfa_dram_init_banksize(void) board_reserve_ram_top(gd->bd->bi_dram[0].size); } } -#endif /* CONFIG_FSL_MC_ENET */ +#endif /* CONFIG_RESV_RAM */ return ret; } @@ -1465,7 +1467,7 @@ int dram_init_banksize(void) } #endif /* CONFIG_SYS_MEM_RESERVE_SECURE */ -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD) /* Assign memory for MC */ #ifdef CONFIG_SYS_DDR_BLOCK3_BASE if (gd->bd->bi_dram[2].size >= @@ -1488,7 +1490,7 @@ int dram_init_banksize(void) board_reserve_ram_top(gd->bd->bi_dram[0].size); } } -#endif /* CONFIG_FSL_MC_ENET */ +#endif /* CONFIG_RESV_RAM */ #ifdef CONFIG_SYS_DP_DDR_BASE_PHY #ifdef CONFIG_SYS_DDR_BLOCK3_BASE diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 077438765c..3bbad827cb 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -471,6 +471,10 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); +#ifdef CONFIG_GIC_V3_ITS + ls_gic_rd_tables_init(blob); +#endif + #if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4) ft_pci_setup(blob, bd); #endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index d0e10cb007..28bb1d7401 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -6,10 +6,12 @@ #include <common.h> #include <clock_legacy.h> +#include <cpu_func.h> #include <env.h> #include <fsl_immap.h> #include <fsl_ifc.h> #include <init.h> +#include <linux/sizes.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/soc.h> #include <asm/io.h> @@ -17,6 +19,7 @@ #include <asm/arch-fsl-layerscape/config.h> #include <asm/arch-fsl-layerscape/ns_access.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> +#include <asm/gic-v3.h> #ifdef CONFIG_LAYERSCAPE_NS_ACCESS #include <fsl_csu.h> #endif @@ -30,9 +33,50 @@ #include <fsl_immap.h> #ifdef CONFIG_TFABOOT #include <env_internal.h> +#endif +#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS) DECLARE_GLOBAL_DATA_PTR; #endif +#ifdef CONFIG_GIC_V3_ITS +#define PENDTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K) +#define PROPTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K) +#define GIC_LPI_SIZE ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \ + PROPTABLE_MAX_SZ, SZ_1M) +static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size) +{ + u32 phandle; + int err; + struct fdt_memory gic_rd_tables; + + gic_rd_tables.start = base; + gic_rd_tables.end = base + size - 1; + err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables, + &phandle); + if (err < 0) + debug("%s: failed to add reserved memory: %d\n", __func__, err); + + return err; +} + +int ls_gic_rd_tables_init(void *blob) +{ + u64 gic_lpi_base; + int ret; + + gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K); + ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE); + if (ret) + return ret; + + ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); + if (ret) + debug("%s: failed to init gic-lpi-tables\n", __func__); + + return ret; +} +#endif + bool soc_has_dp_ddr(void) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); |