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-rw-r--r--arch/arm/cpu/arm1136/mx31/Makefile5
-rw-r--r--arch/arm/cpu/arm1136/mx35/Makefile5
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/Makefile6
-rw-r--r--arch/arm/cpu/arm926ejs/mx27/Makefile6
-rw-r--r--arch/arm/cpu/armv7/start.S32
5 files changed, 16 insertions, 38 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/Makefile b/arch/arm/cpu/arm1136/mx31/Makefile
index dcbd57065b..774f352ece 100644
--- a/arch/arm/cpu/arm1136/mx31/Makefile
+++ b/arch/arm/cpu/arm1136/mx31/Makefile
@@ -8,7 +8,4 @@
obj-y += generic.o
obj-y += timer.o
obj-y += devices.o
-
-ifndef CONFIG_SPL_BUILD
-obj-y += relocate.o
-endif
+obj-y += relocate.o
diff --git a/arch/arm/cpu/arm1136/mx35/Makefile b/arch/arm/cpu/arm1136/mx35/Makefile
index 796db9c7cc..e4c8e2e684 100644
--- a/arch/arm/cpu/arm1136/mx35/Makefile
+++ b/arch/arm/cpu/arm1136/mx35/Makefile
@@ -10,7 +10,4 @@
obj-y += generic.o
obj-y += timer.o
obj-y += mx35_sdram.o
-
-ifndef CONFIG_SPL_BUILD
-obj-y += relocate.o
-endif
+obj-y += relocate.o
diff --git a/arch/arm/cpu/arm926ejs/mx25/Makefile b/arch/arm/cpu/arm926ejs/mx25/Makefile
index ebc0407ef4..7d608c6082 100644
--- a/arch/arm/cpu/arm926ejs/mx25/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx25/Makefile
@@ -4,8 +4,4 @@
#
# SPDX-License-Identifier: GPL-2.0+
-obj-y = generic.o timer.o reset.o
-
-ifndef CONFIG_SPL_BUILD
-obj-y += relocate.o
-endif
+obj-y += generic.o timer.o reset.o relocate.o
diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile b/arch/arm/cpu/arm926ejs/mx27/Makefile
index 0edf1445fe..7d608c6082 100644
--- a/arch/arm/cpu/arm926ejs/mx27/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx27/Makefile
@@ -4,8 +4,4 @@
#
# SPDX-License-Identifier: GPL-2.0+
-obj-y = generic.o reset.o timer.o
-
-ifndef CONFIG_SPL_BUILD
-obj-y += relocate.o
-endif
+obj-y += generic.o timer.o reset.o relocate.o
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 95a0b5224b..7e2695761e 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -239,55 +239,47 @@ skip_errata_801819:
#endif
#ifdef CONFIG_ARM_ERRATA_454179
+ mrc p15, 0, r0, c1, c0, 1 @ Read ACR
+
cmp r2, #0x21 @ Only on < r2p1
- bge skip_errata_454179
+ orrlt r0, r0, #(0x3 << 6) @ Set DBSM(BIT7) and IBE(BIT6) bits
- mrc p15, 0, r0, c1, c0, 1 @ Read ACR
- orr r0, r0, #(0x3 << 6) @ Set DBSM(BIT7) and IBE(BIT6) bits
push {r1-r5} @ Save the cpu info registers
bl v7_arch_cp15_set_acr
pop {r1-r5} @ Restore the cpu info - fall through
-
-skip_errata_454179:
#endif
#ifdef CONFIG_ARM_ERRATA_430973
+ mrc p15, 0, r0, c1, c0, 1 @ Read ACR
+
cmp r2, #0x21 @ Only on < r2p1
- bge skip_errata_430973
+ orrlt r0, r0, #(0x1 << 6) @ Set IBE bit
- mrc p15, 0, r0, c1, c0, 1 @ Read ACR
- orr r0, r0, #(0x1 << 6) @ Set IBE bit
push {r1-r5} @ Save the cpu info registers
bl v7_arch_cp15_set_acr
pop {r1-r5} @ Restore the cpu info - fall through
-
-skip_errata_430973:
#endif
#ifdef CONFIG_ARM_ERRATA_621766
+ mrc p15, 0, r0, c1, c0, 1 @ Read ACR
+
cmp r2, #0x21 @ Only on < r2p1
- bge skip_errata_621766
+ orrlt r0, r0, #(0x1 << 5) @ Set L1NEON bit
- mrc p15, 0, r0, c1, c0, 1 @ Read ACR
- orr r0, r0, #(0x1 << 5) @ Set L1NEON bit
push {r1-r5} @ Save the cpu info registers
bl v7_arch_cp15_set_acr
pop {r1-r5} @ Restore the cpu info - fall through
-
-skip_errata_621766:
#endif
#ifdef CONFIG_ARM_ERRATA_725233
+ mrc p15, 1, r0, c9, c0, 2 @ Read L2ACR
+
cmp r2, #0x21 @ Only on < r2p1 (Cortex A8)
- bge skip_errata_725233
+ orrlt r0, r0, #(0x1 << 27) @ L2 PLD data forwarding disable
- mrc p15, 1, r0, c9, c0, 2 @ Read L2ACR
- orr r0, r0, #(0x1 << 27) @ L2 PLD data forwarding disable
push {r1-r5} @ Save the cpu info registers
bl v7_arch_cp15_set_l2aux_ctrl
pop {r1-r5} @ Restore the cpu info - fall through
-
-skip_errata_725233:
#endif
#ifdef CONFIG_ARM_ERRATA_852421