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-rw-r--r--arch/arm/cpu/armv7/mx6/Kconfig5
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c4
2 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 1282be3418..10908c4c4a 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -33,11 +33,16 @@ config TARGET_SECOMX6
bool "Support secomx6 boards"
select CPU_V7
+config TARGET_TQMA6
+ bool "TQ Systems TQMa6 board"
+ select CPU_V7
+
endchoice
config SYS_SOC
default "mx6"
source "board/seco/Kconfig"
+source "board/tqc/tqma6/Kconfig"
endif
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index b21bd03a8a..29de6243dc 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -62,6 +62,7 @@ u32 get_cpu_rev(void)
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
u32 reg = readl(&anatop->digprog_sololite);
u32 type = ((reg >> 16) & 0xff);
+ u32 major;
if (type != MXC_CPU_MX6SL) {
reg = readl(&anatop->digprog);
@@ -79,8 +80,9 @@ u32 get_cpu_rev(void)
}
}
+ major = ((reg >> 8) & 0xff);
reg &= 0xff; /* mx6 silicon revision */
- return (type << 12) | (reg + 0x10);
+ return (type << 12) | (reg + (0x10 * (major + 1)));
}
/*