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-rw-r--r--arch/arm/cpu/arm1136/mx31/generic.c1
-rw-r--r--arch/arm/cpu/arm1136/mx35/Makefile2
-rw-r--r--arch/arm/cpu/arm1136/omap24xx/timer.c20
-rw-r--r--arch/arm/cpu/arm720t/cpu.c29
-rw-r--r--arch/arm/cpu/arm720t/interrupts.c14
-rw-r--r--arch/arm/cpu/arm720t/start.S64
-rw-r--r--arch/arm/cpu/arm926ejs/mb86r0x/Makefile2
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/Makefile2
-rw-r--r--arch/arm/cpu/arm926ejs/mx27/Makefile2
-rw-r--r--arch/arm/cpu/armv7/mx5/Makefile2
-rw-r--r--arch/arm/cpu/armv7/mx5/lowlevel_init.S2
11 files changed, 16 insertions, 124 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 248431b9bc..e3a4d1b808 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -85,6 +85,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_ARM_CLK:
return mx31_get_mcu_main_clk();
case MXC_IPG_CLK:
+ case MXC_IPG_PERCLK:
case MXC_CSPI_CLK:
case MXC_UART_CLK:
return mx31_get_ipg_clk();
diff --git a/arch/arm/cpu/arm1136/mx35/Makefile b/arch/arm/cpu/arm1136/mx35/Makefile
index 284cdc50d1..469397ca43 100644
--- a/arch/arm/cpu/arm1136/mx35/Makefile
+++ b/arch/arm/cpu/arm1136/mx35/Makefile
@@ -39,8 +39,6 @@ all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
-$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
-
#########################################################################
diff --git a/arch/arm/cpu/arm1136/omap24xx/timer.c b/arch/arm/cpu/arm1136/omap24xx/timer.c
index 73bf4a7b4c..e929ae45bb 100644
--- a/arch/arm/cpu/arm1136/omap24xx/timer.c
+++ b/arch/arm/cpu/arm1136/omap24xx/timer.c
@@ -41,13 +41,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static void reset_timer_masked (void)
-{
- /* reset time */
- gd->lastinc = READ_TIMER; /* capture current incrementer value time */
- gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
int timer_init (void)
{
int32_t val;
@@ -57,7 +50,9 @@ int timer_init (void)
val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/
*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */
- reset_timer_masked(); /* init the timestamp and lastinc value */
+ /* reset time */
+ gd->lastinc = READ_TIMER; /* capture current incrementer value */
+ gd->tbl = 0; /* start "advancing" time stamp */
return(0);
}
@@ -84,10 +79,13 @@ void __udelay (unsigned long usec)
}
tmp = get_timer (0); /* get current timestamp */
- if ( (tmo + tmp + 1) < tmp ) /* if setting this forward will roll time stamp */
- reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */
- else
+ if ((tmo + tmp + 1) < tmp) { /* if setting this forward will roll */
+ /* time stamp, then reset time */
+ gd->lastinc = READ_TIMER; /* capture incrementer value */
+ gd->tbl = 0; /* start time stamp */
+ } else {
tmo += tmp; /* else, set advancing stamp wake up time */
+ }
while (get_timer_masked () < tmo)/* loop till event */
/*NOP*/;
}
diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c
index ff992aac52..974f2880a4 100644
--- a/arch/arm/cpu/arm720t/cpu.c
+++ b/arch/arm/cpu/arm720t/cpu.c
@@ -36,10 +36,6 @@
#include <asm/hardware.h>
#include <asm/system.h>
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
-static void cache_flush(void);
-#endif
-
int cleanup_before_linux (void)
{
/*
@@ -50,20 +46,7 @@ int cleanup_before_linux (void)
* and we set the CPU-speed to 73 MHz - see start.S for details
*/
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
- disable_interrupts ();
-
- /* turn off I-cache */
- icache_disable();
- dcache_disable();
-
- /* flush I-cache */
- cache_flush();
-#ifdef CONFIG_ARM7_REVD
- /* go to high speed */
- IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73;
-#endif
-#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
+#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
disable_interrupts ();
/* Nothing more needed */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
@@ -73,13 +56,3 @@ int cleanup_before_linux (void)
#endif
return 0;
}
-
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
-/* flush I/D-cache */
-static void cache_flush (void)
-{
- unsigned long i = 0;
-
- asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
-}
-#endif
diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index fa9c5a20bd..464dd30466 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -149,18 +149,6 @@ int timer_init (void)
/* set timer 2 counter */
lastdec = TIMER_LOAD_VAL;
-#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
- /* disable all interrupts */
- IO_INTMR1 = 0;
-
- /* operate timer 1 in prescale mode */
- IO_SYSCON1 |= SYSCON1_TC1M;
-
- /* select 2kHz clock source for timer 1 */
- IO_SYSCON1 &= ~SYSCON1_TC1S;
-
- /* set timer 1 counter */
- lastdec = IO_TC1D = TIMER_LOAD_VAL;
#elif defined(CONFIG_S3C4510B)
/* configure free running timer 0 */
PUT_REG( REG_TMOD, 0x0);
@@ -207,7 +195,7 @@ int timer_init (void)
*/
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292)
+#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
ulong get_timer (ulong base)
{
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index e9a094fcbd..00fa8c95ea 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -272,25 +272,7 @@ _dynsym_start_ofs:
*************************************************************************
*/
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
-
-/* Interrupt-Controller base addresses */
-INTMR1: .word 0x80000280 @ 32 bit size
-INTMR2: .word 0x80001280 @ 16 bit size
-INTMR3: .word 0x80002280 @ 8 bit size
-
-/* SYSCONs */
-SYSCON1: .word 0x80000100
-SYSCON2: .word 0x80001100
-SYSCON3: .word 0x80002200
-
-#define CLKCTL 0x6 /* mask */
-#define CLKCTL_18 0x0 /* 18.432 MHz */
-#define CLKCTL_36 0x2 /* 36.864 MHz */
-#define CLKCTL_49 0x4 /* 49.152 MHz */
-#define CLKCTL_73 0x6 /* 73.728 MHz */
-
-#elif defined(CONFIG_LPC2292)
+#if defined(CONFIG_LPC2292)
PLLCFG_ADR: .word PLLCFG
PLLFEED_ADR: .word PLLFEED
PLLCON_ADR: .word PLLCON
@@ -301,35 +283,7 @@ MEMMAP_ADR: .word MEMMAP
#endif
cpu_init_crit:
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
-
- /*
- * mask all IRQs by clearing all bits in the INTMRs
- */
- mov r1, #0x00
- ldr r0, INTMR1
- str r1, [r0]
- ldr r0, INTMR2
- str r1, [r0]
- ldr r0, INTMR3
- str r1, [r0]
-
- /*
- * flush v4 I/D caches
- */
- mov r0, #0
- mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
- mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
-
- /*
- * disable MMU stuff and caches
- */
- mrc p15,0,r0,c1,c0
- bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
- bic r0, r0, #0x0000008f @ clear bits 7, 3:0 (B--- WCAM)
- orr r0, r0, #0x00000002 @ set bit 2 (A) Align
- mcr p15,0,r0,c1,c0
-#elif defined(CONFIG_NETARM)
+#if defined(CONFIG_NETARM)
/*
* prior to software reset : need to set pin PORTC4 to be *HRESET
*/
@@ -634,19 +588,7 @@ fiq:
#endif
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
- .align 5
-.globl reset_cpu
-reset_cpu:
- mov ip, #0
- mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
- mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4)
- mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
- bic ip, ip, #0x000f @ ............wcam
- bic ip, ip, #0x2100 @ ..v....s........
- mcr p15, 0, ip, c1, c0, 0 @ ctrl register
- mov pc, r0
-#elif defined(CONFIG_NETARM)
+#if defined(CONFIG_NETARM)
.align 5
.globl reset_cpu
reset_cpu:
diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/Makefile b/arch/arm/cpu/arm926ejs/mb86r0x/Makefile
index 974d0be0bc..bab048bfd5 100644
--- a/arch/arm/cpu/arm926ejs/mb86r0x/Makefile
+++ b/arch/arm/cpu/arm926ejs/mb86r0x/Makefile
@@ -37,8 +37,6 @@ all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
-$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
-
#########################################################################
# defines $(obj).depend target
diff --git a/arch/arm/cpu/arm926ejs/mx25/Makefile b/arch/arm/cpu/arm926ejs/mx25/Makefile
index 9219c062b0..3c2a65ed79 100644
--- a/arch/arm/cpu/arm926ejs/mx25/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx25/Makefile
@@ -34,8 +34,6 @@ all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
-$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
-
#########################################################################
# defines $(obj).depend target
diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile b/arch/arm/cpu/arm926ejs/mx27/Makefile
index 7ac1a21406..0e112b34f4 100644
--- a/arch/arm/cpu/arm926ejs/mx27/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx27/Makefile
@@ -34,8 +34,6 @@ all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS))
-$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
-
#########################################################################
# defines $(obj).depend target
diff --git a/arch/arm/cpu/armv7/mx5/Makefile b/arch/arm/cpu/armv7/mx5/Makefile
index 6e13cc3e84..e8be9c9fab 100644
--- a/arch/arm/cpu/armv7/mx5/Makefile
+++ b/arch/arm/cpu/armv7/mx5/Makefile
@@ -45,6 +45,4 @@ include $(SRCTREE)/rules.mk
sinclude $(obj).depend
-lowlevel_init.o : $(TOPDIR)/include/asm/arch/asm-offsets.h
-
#########################################################################
diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index 6c66b42619..7e37221e03 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -21,7 +21,7 @@
#include <config.h>
#include <asm/arch/imx-regs.h>
-#include <asm/arch/asm-offsets.h>
+#include <generated/asm-offsets.h>
/*
* L2CC Cache setup/invalidation/disable
generated by cgit (git 2.34.1) at 2025-01-01 19:36:46 +0000