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-rw-r--r--arch/arm/cpu/armv7/omap-common/clocks-common.c3
-rw-r--r--arch/arm/cpu/armv7/omap-common/u-boot-spl.lds4
-rw-r--r--arch/arm/cpu/armv7/omap3/board.c2
-rw-r--r--arch/arm/cpu/armv7/omap3/clock.c2
4 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index bb77b5ca3e..dfa3760dfc 100644
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -779,7 +779,8 @@ void gpi2c_init(void)
static int gpi2c = 1;
if (gpi2c) {
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
+ CONFIG_SYS_OMAP24_I2C_SLAVE);
gpi2c = 0;
}
}
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
index 5e93b343e6..989083c808 100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -33,6 +33,10 @@ SECTIONS
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
+ .u_boot_list : {
+ KEEP(*(SORT(.u_boot_list*)));
+ } >.sram
+ . = ALIGN(4);
__image_copy_end = .;
_end = .;
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 7d1f8d9d2c..29228160c3 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -98,7 +98,7 @@ void spl_board_init(void)
gpmc_init();
#endif
#ifdef CONFIG_SPL_I2C_SUPPORT
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
}
#endif /* CONFIG_SPL_BUILD */
diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index 9f989ff860..14fc7e8e81 100644
--- a/arch/arm/cpu/armv7/omap3/clock.c
+++ b/arch/arm/cpu/armv7/omap3/clock.c
@@ -708,7 +708,7 @@ void per_clocks_enable(void)
sr32(&prcm_base->iclken_per, 17, 1, 1);
#endif
-#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+#ifdef CONFIG_SYS_I2C_OMAP34XX
/* Turn on all 3 I2C clocks */
sr32(&prcm_base->fclken1_core, 15, 3, 0x7);
sr32(&prcm_base->iclken1_core, 15, 3, 0x7); /* I2C1,2,3 = on */