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-rw-r--r--arch/arm/cpu/armv7/cache_v7.c10
-rw-r--r--arch/arm/cpu/armv7/omap3/Kconfig25
-rw-r--r--arch/arm/cpu/armv7/omap5/Kconfig1
-rw-r--r--arch/arm/cpu/armv7/psci-common.c2
-rw-r--r--arch/arm/cpu/armv7/sunxi/psci.c12
-rw-r--r--arch/arm/cpu/armv8/cache_v8.c4
6 files changed, 17 insertions, 37 deletions
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 52f18565db..c4bbcc3cc3 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -75,7 +75,7 @@ static void v7_dcache_maint_range(u32 start, u32 stop, u32 range_op)
}
/* DSB to make sure the operation is complete */
- DSB;
+ dsb();
}
/* Invalidate TLB */
@@ -88,9 +88,9 @@ static void v7_inval_tlb(void)
/* Invalidate entire instruction TLB */
asm volatile ("mcr p15, 0, %0, c8, c5, 0" : : "r" (0));
/* Full system DSB - make sure that the invalidation is complete */
- DSB;
+ dsb();
/* Full system ISB - make sure the instruction stream sees it */
- ISB;
+ isb();
}
void invalidate_dcache_all(void)
@@ -194,10 +194,10 @@ void invalidate_icache_all(void)
asm volatile ("mcr p15, 0, %0, c7, c5, 6" : : "r" (0));
/* Full system DSB - make sure that the invalidation is complete */
- DSB;
+ dsb();
/* ISB - make sure the instruction stream sees it */
- ISB;
+ isb();
}
#else
void invalidate_icache_all(void)
diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig
index 85d6436904..99a25f9ff3 100644
--- a/arch/arm/cpu/armv7/omap3/Kconfig
+++ b/arch/arm/cpu/armv7/omap3/Kconfig
@@ -6,55 +6,39 @@ choice
config TARGET_AM3517_EVM
bool "AM3517 EVM"
- select SUPPORT_SPL
config TARGET_MT_VENTOUX
bool "TeeJet Mt.Ventoux"
- select SUPPORT_SPL
config TARGET_OMAP3_BEAGLE
bool "TI OMAP3 BeagleBoard"
- select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_CM_T35
bool "CompuLab CM-T3530 and CM-T3730 boards"
- select SUPPORT_SPL
config TARGET_CM_T3517
bool "CompuLab CM-T3517 boards"
config TARGET_DEVKIT8000
bool "TimLL OMAP3 Devkit8000"
- select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_OMAP3_EVM
bool "TI OMAP3 EVM"
- select SUPPORT_SPL
-
-config TARGET_OMAP3_EVM_QUICK_MMC
- bool "TI OMAP3 EVM Quick MMC"
- select SUPPORT_SPL
-
-config TARGET_OMAP3_EVM_QUICK_NAND
- bool "TI OMAP3 EVM Quick NAND"
- select SUPPORT_SPL
config TARGET_OMAP3_IGEP00X0
bool "IGEP"
- select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_OMAP3_OVERO
bool "OMAP35xx Gumstix Overo"
- select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
@@ -67,51 +51,42 @@ config TARGET_OMAP3_ZOOM1
config TARGET_AM3517_CRANE
bool "am3517_crane"
- select SUPPORT_SPL
config TARGET_OMAP3_PANDORA
bool "OMAP3 Pandora"
config TARGET_ECO5PK
bool "ECO5PK"
- select SUPPORT_SPL
config TARGET_TRICORDER
bool "Tricorder"
- select SUPPORT_SPL
config TARGET_MCX
bool "MCX"
- select SUPPORT_SPL
config TARGET_OMAP3_LOGIC
bool "OMAP3 Logic"
select DM
select DM_SERIAL
select DM_GPIO
- select SUPPORT_SPL
config TARGET_NOKIA_RX51
bool "Nokia RX51"
config TARGET_TAO3530
bool "TAO3530"
- select SUPPORT_SPL
config TARGET_TWISTER
bool "Twister"
- select SUPPORT_SPL
config TARGET_OMAP3_CAIRO
bool "QUIPOS CAIRO"
- select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_SNIPER
bool "LG Optimus Black"
- select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
diff --git a/arch/arm/cpu/armv7/omap5/Kconfig b/arch/arm/cpu/armv7/omap5/Kconfig
index 4fb5ef95cb..a8600b102e 100644
--- a/arch/arm/cpu/armv7/omap5/Kconfig
+++ b/arch/arm/cpu/armv7/omap5/Kconfig
@@ -13,6 +13,7 @@ config TARGET_OMAP5_UEVM
config TARGET_DRA7XX_EVM
bool "TI DRA7XX"
select TI_I2C_BOARD_DETECT
+ select PHYS_64BIT
config TARGET_AM57XX_EVM
bool "AM57XX"
diff --git a/arch/arm/cpu/armv7/psci-common.c b/arch/arm/cpu/armv7/psci-common.c
index d14b693747..8cb4107be6 100644
--- a/arch/arm/cpu/armv7/psci-common.c
+++ b/arch/arm/cpu/armv7/psci-common.c
@@ -29,7 +29,7 @@ static u32 psci_target_pc[CONFIG_ARMV7_PSCI_NR_CPUS] __secure_data = { 0 };
void __secure psci_save_target_pc(int cpu, u32 pc)
{
psci_target_pc[cpu] = pc;
- DSB;
+ dsb();
}
u32 __secure psci_get_target_pc(int cpu)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 7ac84065f4..766b8c79d9 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -53,16 +53,16 @@ static void __secure __mdelay(u32 ms)
u32 reg = ONE_MS * ms;
cp15_write_cntp_tval(reg);
- ISB;
+ isb();
cp15_write_cntp_ctl(3);
do {
- ISB;
+ isb();
reg = cp15_read_cntp_ctl();
} while (!(reg & BIT(2)));
cp15_write_cntp_ctl(0);
- ISB;
+ isb();
}
static void __secure clamp_release(u32 __maybe_unused *clamp)
@@ -164,7 +164,7 @@ static u32 __secure cp15_read_scr(void)
static void __secure cp15_write_scr(u32 scr)
{
asm volatile ("mcr p15, 0, %0, c1, c1, 0" : : "r" (scr));
- ISB;
+ isb();
}
/*
@@ -190,7 +190,7 @@ void __secure __irq psci_fiq_enter(void)
/* End of interrupt */
writel(reg, GICC_BASE + GICC_EOIR);
- DSB;
+ dsb();
/* Get CPU number */
cpu = (reg >> 10) & 0x7;
@@ -242,7 +242,7 @@ void __secure psci_cpu_off(void)
/* Ask CPU0 via SGI15 to pull the rug... */
writel(BIT(16) | 15, GICD_BASE + GICD_SGIR);
- DSB;
+ dsb();
/* Wait to be turned off */
while (1)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index ac909a15ff..cd3f6c10ae 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -380,6 +380,7 @@ void setup_pgtables(void)
static void setup_all_pgtables(void)
{
u64 tlb_addr = gd->arch.tlb_addr;
+ u64 tlb_size = gd->arch.tlb_size;
/* Reset the fill ptr */
gd->arch.tlb_fillptr = tlb_addr;
@@ -388,10 +389,13 @@ static void setup_all_pgtables(void)
setup_pgtables();
/* Create emergency page tables */
+ gd->arch.tlb_size -= (uintptr_t)gd->arch.tlb_fillptr -
+ (uintptr_t)gd->arch.tlb_addr;
gd->arch.tlb_addr = gd->arch.tlb_fillptr;
setup_pgtables();
gd->arch.tlb_emerg = gd->arch.tlb_addr;
gd->arch.tlb_addr = tlb_addr;
+ gd->arch.tlb_size = tlb_size;
}
/* to activate the MMU we need to set up virtual memory */