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-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig6
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c24
2 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index e77d8866c8..b6410d731f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -16,6 +16,7 @@ config ARCH_LS1043A
select SYS_FSL_DDR_BE
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008850
+ select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009660
select SYS_FSL_ERRATUM_A009663
@@ -41,6 +42,7 @@ config ARCH_LS1046A
select SYS_FSL_ERRATUM_A008336
select SYS_FSL_ERRATUM_A008511
select SYS_FSL_ERRATUM_A008850
+ select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009801
@@ -104,6 +106,7 @@ config ARCH_LS2080A
select SYS_FSL_ERRATUM_A008511
select SYS_FSL_ERRATUM_A008514
select SYS_FSL_ERRATUM_A008585
+ select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009635
select SYS_FSL_ERRATUM_A009663
@@ -254,6 +257,9 @@ config LS_PPA_ESBC_HDR_SIZE
endmenu
+config SYS_FSL_ERRATUM_A008997
+ bool "Workaround for USB PHY erratum A008997"
+
config SYS_FSL_ERRATUM_A009008
bool "Workaround for USB PHY erratum A009008"
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index d9d6e4fd96..c7180f1ebe 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -97,6 +97,28 @@ static void erratum_a009798(void)
#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
}
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+static inline void set_usb_pcstxswingfull(u32 __iomem *scfg, u32 offset)
+{
+ scfg_clrsetbits32(scfg + offset / 4,
+ 0x7F << 9,
+ SCFG_USB_PCSTXSWINGFULL << 9);
+}
+#endif
+
+static void erratum_a008997(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008997
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+ u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+
+ set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB1);
+ set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB2);
+ set_usb_pcstxswingfull(scfg, SCFG_USB3PRM2CR_USB3);
+#endif
+#endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
+}
+
#if defined(CONFIG_FSL_LSCH3)
/*
* This erratum requires setting a value to eddrtqcr1 to
@@ -245,6 +267,7 @@ void fsl_lsch3_early_init_f(void)
erratum_a008336();
erratum_a009008();
erratum_a009798();
+ erratum_a008997();
#ifdef CONFIG_CHAIN_OF_TRUST
/* In case of Secure Boot, the IBR configures the SMMU
* to allow only Secure transactions.
@@ -525,6 +548,7 @@ void fsl_lsch2_early_init_f(void)
erratum_a010539();
erratum_a009008();
erratum_a009798();
+ erratum_a008997();
}
#endif