summaryrefslogtreecommitdiff
path: root/arch/arm/dts/stih410.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/dts/stih410.dtsi')
-rw-r--r--arch/arm/dts/stih410.dtsi227
1 files changed, 35 insertions, 192 deletions
diff --git a/arch/arm/dts/stih410.dtsi b/arch/arm/dts/stih410.dtsi
index b59b110989..6d847019c5 100644
--- a/arch/arm/dts/stih410.dtsi
+++ b/arch/arm/dts/stih410.dtsi
@@ -1,67 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2014 STMicroelectronics Limited.
* Author: Peter Griffin <peter.griffin@linaro.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * publishhed by the Free Software Foundation.
*/
#include "stih410-clock.dtsi"
#include "stih407-family.dtsi"
#include "stih410-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
bdisp0 = &bdisp0;
};
- cpus {
- cpu@0 {
- st,syscfg = <&syscfg_core 0x8e0>;
- st,syscfg-eng = <&syscfg_opp 0x4 0x0>;
- clocks = <&clk_m_a9>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
- cpu@1 {
- clocks = <&clk_m_a9>;
- operating-points-v2 = <&cpu0_opp_table>;
- };
- };
-
- cpu0_opp_table: opp_table0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp@1500000000 {
- opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>;
- opp-hz = /bits/ 64 <1500000000>;
- clock-latency-ns = <10000000>;
- opp-suspend;
- };
- opp@1200000000 {
- opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>;
- opp-hz = /bits/ 64 <1200000000>;
- clock-latency-ns = <10000000>;
- };
- opp@800000000 {
- opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>;
- opp-hz = /bits/ 64 <800000000>;
- clock-latency-ns = <10000000>;
- };
- opp@400000000 {
- opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>;
- opp-hz = /bits/ 64 <400000000>;
- clock-latency-ns = <10000000>;
- };
- };
-
soc {
- syscfg_opp: @08a6583c {
- compatible = "syscon";
- reg = <0x08a6583c 0x8>;
- };
-
- usb2_picophy1: phy2 {
+ usb2_picophy1: phy2@0 {
compatible = "st,stih407-usb2-phy";
+ reg = <0 0>;
#phy-cells = <0>;
st,syscfg = <&syscfg_core 0xf8 0xf4>;
resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
@@ -71,8 +25,9 @@
status = "disabled";
};
- usb2_picophy2: phy3 {
+ usb2_picophy2: phy3@0 {
compatible = "st,stih407-usb2-phy";
+ reg = <0 0>;
#phy-cells = <0>;
st,syscfg = <&syscfg_core 0xfc 0xf4>;
resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
@@ -83,15 +38,14 @@
};
ohci0: usb@9a03c00 {
- compatible = "generic-ohci";
+ compatible = "st,st-ohci-300x";
reg = <0x9a03c00 0x100>;
- interrupts = <GIC_SPI 180 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
<&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
<&softreset STIH407_USB2_PORT0_SOFTRESET>;
reset-names = "power", "softreset";
-
phys = <&usb2_picophy1>;
phy-names = "usb";
@@ -99,9 +53,9 @@
};
ehci0: usb@9a03e00 {
- compatible = "generic-ehci";
+ compatible = "st,st-ehci-300x";
reg = <0x9a03e00 0x100>;
- interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>;
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
@@ -116,15 +70,14 @@
};
ohci1: usb@9a83c00 {
- compatible = "generic-ohci";
+ compatible = "st,st-ohci-300x";
reg = <0x9a83c00 0x100>;
- interrupts = <GIC_SPI 181 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
<&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>;
resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
<&softreset STIH407_USB2_PORT1_SOFTRESET>;
reset-names = "power", "softreset";
-
phys = <&usb2_picophy2>;
phy-names = "usb";
@@ -132,9 +85,9 @@
};
ehci1: usb@9a83e00 {
- compatible = "generic-ehci";
+ compatible = "st,st-ehci-300x";
reg = <0x9a83e00 0x100>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>;
clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>,
@@ -142,18 +95,18 @@
resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
<&softreset STIH407_USB2_PORT1_SOFTRESET>;
reset-names = "power", "softreset";
-
phys = <&usb2_picophy2>;
phy-names = "usb";
status = "disabled";
};
- sti-display-subsystem {
+ sti-display-subsystem@0 {
compatible = "st,sti-display-subsystem";
#address-cells = <1>;
#size-cells = <1>;
+ reg = <0 0>;
assigned-clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
<&clk_s_c0_pll1 0>,
@@ -243,10 +196,10 @@
sti_hdmi: sti-hdmi@8d04000 {
compatible = "st,stih407-hdmi";
- #sound-dai-cells = <0>;
reg = <0x8d04000 0x1000>;
reg-names = "hdmi-reg";
- interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
+ #sound-dai-cells = <0>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq";
clock-names = "pix",
"tmds",
@@ -262,7 +215,7 @@
<&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>;
- hdmi,hpd-gpio = <&pio5 3>;
+ hdmi,hpd-gpio = <&pio5 3 GPIO_ACTIVE_LOW>;
reset-names = "hdmi";
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
ddc = <&hdmiddc>;
@@ -283,24 +236,7 @@
<&clk_s_d2_quadfs 1>;
};
- sti-dvo@8d00400 {
- compatible = "st,stih407-dvo";
- status = "disabled";
- reg = <0x8d00400 0x200>;
- reg-names = "dvo-reg";
- clock-names = "dvo_pix",
- "dvo",
- "main_parent",
- "aux_parent";
- clocks = <&clk_s_d2_flexgen CLK_PIX_DVO>,
- <&clk_s_d2_flexgen CLK_DVO>,
- <&clk_s_d2_quadfs 0>,
- <&clk_s_d2_quadfs 1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_dvo>;
- };
-
- sti-hqvdp@9c000000 {
+ sti-hqvdp@9c00000 {
compatible = "st,stih407-hqvdp";
reg = <0x9C00000 0x100000>;
clock-names = "hqvdp", "pix_main";
@@ -315,7 +251,7 @@
bdisp0:bdisp@9f10000 {
compatible = "st,stih407-bdisp";
reg = <0x9f10000 0x1000>;
- interrupts = <GIC_SPI 38 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "bdisp";
clocks = <&clk_s_c0_flexgen CLK_IC_BDISP_0>;
};
@@ -324,8 +260,8 @@
compatible = "st,st-hva";
reg = <0x8c85000 0x400>, <0x6000000 0x40000>;
reg-names = "hva_registers", "hva_esram";
- interrupts = <GIC_SPI 58 IRQ_TYPE_NONE>,
- <GIC_SPI 59 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clk_hva";
clocks = <&clk_s_c0_flexgen CLK_HVA>;
};
@@ -338,66 +274,7 @@
interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
};
- g1@8c80000 {
- compatible = "st,g1";
- reg = <0x8c80000 0x194>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_NONE>;
- };
-
- temp0{
- compatible = "st,stih407-thermal";
- reg = <0x91a0000 0x28>;
- clock-names = "thermal";
- clocks = <&clk_sysin>;
- interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
- };
-
- delta0 {
- compatible = "st,delta";
- clock-names = "delta", "delta-st231", "delta-flash-promip";
- clocks = <&clk_s_c0_flexgen CLK_VID_DMU>,
- <&clk_s_c0_flexgen CLK_ST231_DMU>,
- <&clk_s_c0_flexgen CLK_FLASH_PROMIP>;
- };
-
- h264pp0: h264pp@8c00000 {
- compatible = "st,h264pp";
- reg = <0x8c00000 0x20000>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_NONE>;
- clock-names = "clk_h264pp_0";
- clocks = <&clk_s_c0_flexgen CLK_PP_DMU>;
- };
-
- mali: mali@09f00000 {
- compatible = "arm,mali-400";
- reg = <0x09f00000 0x10000>;
- interrupts = <GIC_SPI 49 IRQ_TYPE_NONE>,
- <GIC_SPI 50 IRQ_TYPE_NONE>,
- <GIC_SPI 41 IRQ_TYPE_NONE>,
- <GIC_SPI 45 IRQ_TYPE_NONE>,
- <GIC_SPI 42 IRQ_TYPE_NONE>,
- <GIC_SPI 46 IRQ_TYPE_NONE>,
- <GIC_SPI 43 IRQ_TYPE_NONE>,
- <GIC_SPI 47 IRQ_TYPE_NONE>,
- <GIC_SPI 44 IRQ_TYPE_NONE>,
- <GIC_SPI 48 IRQ_TYPE_NONE>;
- interrupt-names = "IRQGP",
- "IRQGPMMU",
- "IRQPP0",
- "IRQPPMMU0",
- "IRQPP1",
- "IRQPPMMU1",
- "IRQPP2",
- "IRQPPMMU2",
- "IRQPP3",
- "IRQPPMMU3";
- clock-names = "gpu-clk";
- clocks = <&clk_s_c0_flexgen CLK_ICN_GPU>;
- reset-names = "gpu";
- resets = <&softreset STIH407_GPU_SOFTRESET>;
- };
-
- delta0 {
+ delta0@0 {
compatible = "st,st-delta";
clock-names = "delta",
"delta-st231",
@@ -407,51 +284,17 @@
<&clk_s_c0_flexgen CLK_FLASH_PROMIP>;
};
- h264pp0: h264pp@8c00000 {
- compatible = "st,h264pp";
- reg = <0x8c00000 0x20000>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_NONE>;
- clock-names = "clk_h264pp_0";
- clocks = <&clk_s_c0_flexgen CLK_PP_DMU>;
- };
-
- mali: mali@09f00000 {
- compatible = "arm,mali-400";
- reg = <0x09f00000 0x10000>;
- interrupts = <GIC_SPI 49 IRQ_TYPE_NONE>,
- <GIC_SPI 50 IRQ_TYPE_NONE>,
- <GIC_SPI 41 IRQ_TYPE_NONE>,
- <GIC_SPI 45 IRQ_TYPE_NONE>,
- <GIC_SPI 42 IRQ_TYPE_NONE>,
- <GIC_SPI 46 IRQ_TYPE_NONE>,
- <GIC_SPI 43 IRQ_TYPE_NONE>,
- <GIC_SPI 47 IRQ_TYPE_NONE>,
- <GIC_SPI 44 IRQ_TYPE_NONE>,
- <GIC_SPI 48 IRQ_TYPE_NONE>;
- interrupt-names = "IRQGP",
- "IRQGPMMU",
- "IRQPP0",
- "IRQPPMMU0",
- "IRQPP1",
- "IRQPPMMU1",
- "IRQPP2",
- "IRQPPMMU2",
- "IRQPP3",
- "IRQPPMMU3";
- clock-names = "gpu-clk";
- clocks = <&clk_s_c0_flexgen CLK_ICN_GPU>;
- reset-names = "gpu";
- resets = <&softreset STIH407_GPU_SOFTRESET>;
- };
-
- hva@8c85000{
- compatible = "st,st-hva";
- reg = <0x8c85000 0x400>, <0x6000000 0x40000>;
- reg-names = "hva_registers", "hva_esram";
- interrupts = <GIC_SPI 58 IRQ_TYPE_NONE>,
- <GIC_SPI 59 IRQ_TYPE_NONE>;
- clock-names = "clk_hva";
- clocks = <&clk_s_c0_flexgen CLK_HVA>;
+ sti-cec@94a087c {
+ compatible = "st,stih-cec";
+ reg = <0x94a087c 0x64>;
+ clocks = <&clk_sysin>;
+ clock-names = "cec-clk";
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cec-irq";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_cec0_default>;
+ resets = <&softreset STIH407_LPM_SOFTRESET>;
+ hdmi-phandle = <&sti_hdmi>;
};
};
};
generated by cgit (git 2.34.1) at 2025-02-02 13:36:45 +0000