diff options
Diffstat (limited to 'arch/arm/dts/stm32mp157-pinctrl.dtsi')
| -rw-r--r-- | arch/arm/dts/stm32mp157-pinctrl.dtsi | 116 |
1 files changed, 114 insertions, 2 deletions
diff --git a/arch/arm/dts/stm32mp157-pinctrl.dtsi b/arch/arm/dts/stm32mp157-pinctrl.dtsi index 0aae69b0a0..4c424c488d 100644 --- a/arch/arm/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp157-pinctrl.dtsi @@ -173,13 +173,18 @@ <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ - <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */ <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ bias-disable; drive-push-pull; - slew-rate = <3>; + slew-rate = <2>; }; pins2 { + pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */ @@ -210,6 +215,50 @@ }; }; + fmc_pins_a: fmc-0 { + pins1 { + pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */ + <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */ + <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */ + <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */ + <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */ + <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */ + <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */ + <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */ + <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */ + <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */ + <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */ + <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */ + <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + pins2 { + pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */ + bias-pull-up; + }; + }; + + fmc_sleep_pins_a: fmc-sleep-0 { + pins { + pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */ + <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */ + <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */ + <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */ + <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */ + <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */ + <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */ + <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */ + <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */ + <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */ + <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */ + <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */ + <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */ + <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */ + }; + }; + i2c1_pins_a: i2c1-0 { pins { pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ @@ -220,6 +269,16 @@ }; }; + i2c1_pins_b: i2c1-1 { + pins { + pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */ + <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + i2c2_pins_a: i2c2-0 { pins { pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */ @@ -230,6 +289,16 @@ }; }; + i2c2_pins_b: i2c2-1 { + pins { + pinmux = <STM32_PINMUX('Z', 0, AF3)>, /* I2C2_SCL */ + <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + i2c5_pins_a: i2c5-0 { pins { pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */ @@ -375,6 +444,21 @@ }; }; + spi2_pins_a: spi2-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */ + <STM32_PINMUX('I', 0, AF5)>, /* SPI2_NSS */ + <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + pins2 { + pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */ + bias-disable; + }; + }; + stusb1600_pins_a: stusb1600-0 { pins { pinmux = <STM32_PINMUX('I', 11, ANALOG)>; @@ -395,6 +479,34 @@ }; }; + uart4_pins_b: uart4-1 { + pins1 { + pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ + bias-disable; + }; + }; + + uart7_pins_a: uart7-0 { + pins1 { + pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART4_RX */ + <STM32_PINMUX('E', 10, AF7)>, /* UART4_CTS */ + <STM32_PINMUX('E', 9, AF7)>; /* UART4_RTS */ + bias-disable; + }; + }; + usbotg_hs_pins_a: usbotg_hs-0 { pins { pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */ |