diff options
Diffstat (limited to 'arch/arm/dts/stm32mp157.dtsi')
| -rw-r--r-- | arch/arm/dts/stm32mp157.dtsi | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp157.dtsi b/arch/arm/dts/stm32mp157.dtsi index 32d3984259..b84899a1ea 100644 --- a/arch/arm/dts/stm32mp157.dtsi +++ b/arch/arm/dts/stm32mp157.dtsi @@ -86,6 +86,20 @@ status = "disabled"; }; + sdmmc3: sdmmc@48004000 { + compatible = "st,stm32-sdmmc2"; + reg = <0x48004000 0x400>, <0x48005000 0x400>; + reg-names = "sdmmc", "delay"; + interrupts = <GIC_SPI 137 IRQ_TYPE_NONE>; + clocks = <&rcc_clk SDMMC3_K>; + resets = <&rcc_rst SDMMC3_R>; + st,idma = <1>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <120000000>; + status = "disabled"; + }; + rcc: rcc@50000000 { compatible = "syscon", "simple-mfd"; @@ -100,6 +114,13 @@ #reset-cells = <1>; compatible = "st,stm32mp1-rcc-rst"; }; + + rcc_reboot: rcc-reboot@50000000 { + compatible = "syscon-reboot"; + regmap = <&rcc>; + offset = <0x404>; + mask = <0x1>; + }; }; pinctrl: pin-controller { @@ -288,6 +309,20 @@ status = "disabled"; }; + sdmmc2: sdmmc@58007000 { + compatible = "st,stm32-sdmmc2"; + reg = <0x58007000 0x1000>, <0x58008000 0x1000>; + reg-names = "sdmmc", "delay"; + interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>; + clocks = <&rcc_clk SDMMC2_K>; + resets = <&rcc_rst SDMMC2_R>; + st,idma = <1>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <120000000>; + status = "disabled"; + }; + i2c4: i2c@5c002000 { compatible = "st,stm32f7-i2c"; reg = <0x5c002000 0x400>; |