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-rw-r--r--arch/arm/dts/zynqmp.dtsi219
1 files changed, 15 insertions, 204 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 5bdab61164..80ac9a6ac7 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP
*
@@ -5,7 +6,10 @@
*
* Michal Simek <michal.simek@xilinx.com>
*
- * SPDX-License-Identifier: GPL-2.0+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
*/
/ {
@@ -98,155 +102,6 @@
u-boot,dm-pre-reloc;
};
- power-domains {
- compatible = "xlnx,zynqmp-genpd";
-
- pd_usb0: pd-usb0 {
- #power-domain-cells = <0x0>;
- pd-id = <0x16>;
- };
-
- pd_usb1: pd-usb1 {
- #power-domain-cells = <0x0>;
- pd-id = <0x17>;
- };
-
- pd_sata: pd-sata {
- #power-domain-cells = <0x0>;
- pd-id = <0x1c>;
- };
-
- pd_spi0: pd-spi0 {
- #power-domain-cells = <0x0>;
- pd-id = <0x23>;
- };
-
- pd_spi1: pd-spi1 {
- #power-domain-cells = <0x0>;
- pd-id = <0x24>;
- };
-
- pd_uart0: pd-uart0 {
- #power-domain-cells = <0x0>;
- pd-id = <0x21>;
- };
-
- pd_uart1: pd-uart1 {
- #power-domain-cells = <0x0>;
- pd-id = <0x22>;
- };
-
- pd_eth0: pd-eth0 {
- #power-domain-cells = <0x0>;
- pd-id = <0x1d>;
- };
-
- pd_eth1: pd-eth1 {
- #power-domain-cells = <0x0>;
- pd-id = <0x1e>;
- };
-
- pd_eth2: pd-eth2 {
- #power-domain-cells = <0x0>;
- pd-id = <0x1f>;
- };
-
- pd_eth3: pd-eth3 {
- #power-domain-cells = <0x0>;
- pd-id = <0x20>;
- };
-
- pd_i2c0: pd-i2c0 {
- #power-domain-cells = <0x0>;
- pd-id = <0x25>;
- };
-
- pd_i2c1: pd-i2c1 {
- #power-domain-cells = <0x0>;
- pd-id = <0x26>;
- };
-
- pd_dp: pd-dp {
- #power-domain-cells = <0x0>;
- pd-id = <0x29>;
- };
-
- pd_gdma: pd-gdma {
- #power-domain-cells = <0x0>;
- pd-id = <0x2a>;
- };
-
- pd_adma: pd-adma {
- #power-domain-cells = <0x0>;
- pd-id = <0x2b>;
- };
-
- pd_ttc0: pd-ttc0 {
- #power-domain-cells = <0x0>;
- pd-id = <0x18>;
- };
-
- pd_ttc1: pd-ttc1 {
- #power-domain-cells = <0x0>;
- pd-id = <0x19>;
- };
-
- pd_ttc2: pd-ttc2 {
- #power-domain-cells = <0x0>;
- pd-id = <0x1a>;
- };
-
- pd_ttc3: pd-ttc3 {
- #power-domain-cells = <0x0>;
- pd-id = <0x1b>;
- };
-
- pd_sd0: pd-sd0 {
- #power-domain-cells = <0x0>;
- pd-id = <0x27>;
- };
-
- pd_sd1: pd-sd1 {
- #power-domain-cells = <0x0>;
- pd-id = <0x28>;
- };
-
- pd_nand: pd-nand {
- #power-domain-cells = <0x0>;
- pd-id = <0x2c>;
- };
-
- pd_qspi: pd-qspi {
- #power-domain-cells = <0x0>;
- pd-id = <0x2d>;
- };
-
- pd_gpio: pd-gpio {
- #power-domain-cells = <0x0>;
- pd-id = <0x2e>;
- };
-
- pd_can0: pd-can0 {
- #power-domain-cells = <0x0>;
- pd-id = <0x2f>;
- };
-
- pd_can1: pd-can1 {
- #power-domain-cells = <0x0>;
- pd-id = <0x30>;
- };
-
- pd_pcie: pd-pcie {
- #power-domain-cells = <0x0>;
- pd-id = <0x3b>;
- };
-
- pd_gpu: pd-gpu {
- #power-domain-cells = <0x0>;
- pd-id = <0x3a 0x14 0x15>;
- };
- };
-
pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <&gic>;
@@ -390,7 +245,6 @@
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
- power-domains = <&pd_can0>;
};
can1: can@ff070000 {
@@ -402,7 +256,6 @@
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
- power-domains = <&pd_can1>;
};
cci: cci@fd6e0000 {
@@ -435,7 +288,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14e8>;
- power-domains = <&pd_gdma>;
};
fpd_dma_chan2: dma@fd510000 {
@@ -448,7 +300,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14e9>;
- power-domains = <&pd_gdma>;
};
fpd_dma_chan3: dma@fd520000 {
@@ -461,7 +312,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ea>;
- power-domains = <&pd_gdma>;
};
fpd_dma_chan4: dma@fd530000 {
@@ -474,7 +324,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14eb>;
- power-domains = <&pd_gdma>;
};
fpd_dma_chan5: dma@fd540000 {
@@ -487,7 +336,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ec>;
- power-domains = <&pd_gdma>;
};
fpd_dma_chan6: dma@fd550000 {
@@ -500,7 +348,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ed>;
- power-domains = <&pd_gdma>;
};
fpd_dma_chan7: dma@fd560000 {
@@ -513,7 +360,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ee>;
- power-domains = <&pd_gdma>;
};
fpd_dma_chan8: dma@fd570000 {
@@ -526,7 +372,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ef>;
- power-domains = <&pd_gdma>;
};
gpu: gpu@fd4b0000 {
@@ -537,7 +382,6 @@
interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
clock-names = "gpu", "gpu_pp0", "gpu_pp1";
- power-domains = <&pd_gpu>;
};
/* LPDDMA default allows only secured access. inorder to enable
@@ -547,105 +391,97 @@
lpd_dma_chan1: dma@ffa80000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
- clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffa80000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 77 4>;
+ clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x868>;
- power-domains = <&pd_adma>;
};
lpd_dma_chan2: dma@ffa90000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
- clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffa90000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 78 4>;
+ clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x869>;
- power-domains = <&pd_adma>;
};
lpd_dma_chan3: dma@ffaa0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
- clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffaa0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 79 4>;
+ clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86a>;
- power-domains = <&pd_adma>;
};
lpd_dma_chan4: dma@ffab0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
- clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffab0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 80 4>;
+ clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86b>;
- power-domains = <&pd_adma>;
};
lpd_dma_chan5: dma@ffac0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
- clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffac0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 81 4>;
+ clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86c>;
- power-domains = <&pd_adma>;
};
lpd_dma_chan6: dma@ffad0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
- clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffad0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 82 4>;
+ clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86d>;
- power-domains = <&pd_adma>;
};
lpd_dma_chan7: dma@ffae0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
- clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffae0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 83 4>;
+ clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86e>;
- power-domains = <&pd_adma>;
};
lpd_dma_chan8: dma@ffaf0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
- clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffaf0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 84 4>;
+ clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86f>;
- power-domains = <&pd_adma>;
};
mc: memory-controller@fd070000 {
@@ -666,7 +502,6 @@
#size-cells = <1>;
#stream-id-cells = <1>;
iommus = <&smmu 0x872>;
- power-domains = <&pd_nand>;
};
gem0: ethernet@ff0b0000 {
@@ -680,7 +515,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x874>;
- power-domains = <&pd_eth0>;
};
gem1: ethernet@ff0c0000 {
@@ -694,7 +528,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x875>;
- power-domains = <&pd_eth1>;
};
gem2: ethernet@ff0d0000 {
@@ -708,7 +541,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x876>;
- power-domains = <&pd_eth2>;
};
gem3: ethernet@ff0e0000 {
@@ -722,7 +554,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x877>;
- power-domains = <&pd_eth3>;
};
gpio: gpio@ff0a0000 {
@@ -735,7 +566,6 @@
#interrupt-cells = <2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
gpio-controller;
- power-domains = <&pd_gpio>;
};
i2c0: i2c@ff020000 {
@@ -746,7 +576,6 @@
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- power-domains = <&pd_i2c0>;
};
i2c1: i2c@ff030000 {
@@ -757,7 +586,6 @@
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- power-domains = <&pd_i2c1>;
};
ocm: memory-controller@ff960000 {
@@ -781,7 +609,8 @@
<0 116 4>,
<0 115 4>, /* MSI_1 [63...32] */
<0 114 4>; /* MSI_0 [31...0] */
- interrupt-names = "misc","dummy","intx", "msi1", "msi0";
+ interrupt-names = "misc", "dummy", "intx",
+ "msi1", "msi0";
msi-parent = <&pcie>;
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
@@ -795,7 +624,6 @@
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
- power-domains = <&pd_pcie>;
pcie_intc: legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0>;
@@ -817,7 +645,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x873>;
- power-domains = <&pd_qspi>;
};
rtc: rtc@ffa60000 {
@@ -867,7 +694,6 @@
reg = <0x0 0xfd0c0000 0x0 0x2000>;
interrupt-parent = <&gic>;
interrupts = <0 133 4>;
- power-domains = <&pd_sata>;
#stream-id-cells = <4>;
iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
<&smmu 0x4c2>, <&smmu 0x4c3>;
@@ -885,7 +711,6 @@
xlnx,device_id = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x870>;
- power-domains = <&pd_sd0>;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
};
@@ -901,7 +726,6 @@
xlnx,device_id = <1>;
#stream-id-cells = <1>;
iommus = <&smmu 0x871>;
- power-domains = <&pd_sd1>;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
};
@@ -935,7 +759,6 @@
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
- power-domains = <&pd_spi0>;
};
spi1: spi@ff050000 {
@@ -947,7 +770,6 @@
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
- power-domains = <&pd_spi1>;
};
ttc0: timer@ff110000 {
@@ -957,7 +779,6 @@
interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <32>;
- power-domains = <&pd_ttc0>;
};
ttc1: timer@ff120000 {
@@ -967,7 +788,6 @@
interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <32>;
- power-domains = <&pd_ttc1>;
};
ttc2: timer@ff130000 {
@@ -977,7 +797,6 @@
interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <32>;
- power-domains = <&pd_ttc2>;
};
ttc3: timer@ff140000 {
@@ -987,7 +806,6 @@
interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <32>;
- power-domains = <&pd_ttc3>;
};
uart0: serial@ff000000 {
@@ -998,7 +816,6 @@
interrupts = <0 21 4>;
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
- power-domains = <&pd_uart0>;
};
uart1: serial@ff010000 {
@@ -1009,7 +826,6 @@
interrupts = <0 22 4>;
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
- power-domains = <&pd_uart1>;
};
usb0: usb0@ff9d0000 {
@@ -1019,7 +835,6 @@
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9d0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
- power-domains = <&pd_usb0>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
@@ -1045,7 +860,6 @@
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9e0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
- power-domains = <&pd_usb1>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
@@ -1106,7 +920,6 @@
interrupts = <0 119 4>;
interrupt-parent = <&gic>;
clock-names = "aclk", "aud_clk";
- power-domains = <&pd_dp>;
xlnx,dp-version = "v1.2";
xlnx,max-lanes = <2>;
xlnx,max-link-rate = <540000>;
@@ -1129,7 +942,6 @@
xlnx,output-fmt = "rgb";
xlnx,vid-fmt = "yuyv";
xlnx,gfx-fmt = "rgb565";
- power-domains = <&pd_dp>;
};
xlnx_dpdma: dma@fd4c0000 {
@@ -1139,7 +951,6 @@
interrupts = <0 122 4>;
interrupt-parent = <&gic>;
clock-names = "axi_clk";
- power-domains = <&pd_dp>;
dma-channels = <6>;
#dma-cells = <1>;
dma-video0channel {
generated by cgit (git 2.34.1) at 2024-12-28 05:18:35 +0000