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-rw-r--r--arch/arm/dts/armada-370-xp.dtsi1
-rw-r--r--arch/arm/dts/bcm63158.dtsi10
-rw-r--r--arch/arm/dts/bcm6858.dtsi10
3 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm/dts/armada-370-xp.dtsi b/arch/arm/dts/armada-370-xp.dtsi
index e4c35d4e98..50fc0be9f7 100644
--- a/arch/arm/dts/armada-370-xp.dtsi
+++ b/arch/arm/dts/armada-370-xp.dtsi
@@ -102,6 +102,7 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
+ u-boot,dm-pre-reloc;
rtc: rtc@10300 {
compatible = "marvell,orion-rtc";
diff --git a/arch/arm/dts/bcm63158.dtsi b/arch/arm/dts/bcm63158.dtsi
index 4b2eaeea2e..175af38018 100644
--- a/arch/arm/dts/bcm63158.dtsi
+++ b/arch/arm/dts/bcm63158.dtsi
@@ -66,6 +66,12 @@
clock-frequency = <0xbebc200>;
u-boot,dm-pre-reloc;
};
+
+ refclk50mhz: refclk50mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
};
ubus {
@@ -92,13 +98,13 @@
wdt1: watchdog@ff800480 {
compatible = "brcm,bcm6345-wdt";
reg = <0x0 0xff800480 0x0 0x14>;
- clocks = <&periph_osc>;
+ clocks = <&refclk50mhz>;
};
wdt2: watchdog@ff8004c0 {
compatible = "brcm,bcm6345-wdt";
reg = <0x0 0xff8004c0 0x0 0x14>;
- clocks = <&periph_osc>;
+ clocks = <&refclk50mhz>;
};
wdt-reboot {
diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi
index 76ba0ea167..91f7787eb9 100644
--- a/arch/arm/dts/bcm6858.dtsi
+++ b/arch/arm/dts/bcm6858.dtsi
@@ -66,6 +66,12 @@
clock-frequency = <200000000>;
u-boot,dm-pre-reloc;
};
+
+ refclk50mhz: refclk50mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
};
ubus {
@@ -92,13 +98,13 @@
wdt1: watchdog@ff802780 {
compatible = "brcm,bcm6345-wdt";
reg = <0x0 0xff802780 0x0 0x14>;
- clocks = <&periph_osc>;
+ clocks = <&refclk50mhz>;
};
wdt2: watchdog@ff8027c0 {
compatible = "brcm,bcm6345-wdt";
reg = <0x0 0xff8027c0 0x0 0x14>;
- clocks = <&periph_osc>;
+ clocks = <&refclk50mhz>;
};
wdt-reboot {