diff options
Diffstat (limited to 'arch/arm/imx-common')
| -rw-r--r-- | arch/arm/imx-common/cpu.c | 9 | ||||
| -rw-r--r-- | arch/arm/imx-common/speed.c | 18 | ||||
| -rw-r--r-- | arch/arm/imx-common/timer.c | 12 |
3 files changed, 32 insertions, 7 deletions
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index fa1d468041..a10d12d97d 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -30,6 +30,7 @@ #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> #include <asm/arch/crm_regs.h> +#include <ipu_pixfmt.h> #ifdef CONFIG_FSL_ESDHC #include <fsl_esdhc.h> @@ -138,3 +139,11 @@ u32 get_ahb_clk(void) return get_periph_clk() / (ahb_podf + 1); } + +#if defined(CONFIG_VIDEO_IPUV3) +void arch_preboot_os(void) +{ + /* disable video before launching O/S */ + ipuv3_fb_shutdown(); +} +#endif diff --git a/arch/arm/imx-common/speed.c b/arch/arm/imx-common/speed.c index 80989c4983..fbf4de3b30 100644 --- a/arch/arm/imx-common/speed.c +++ b/arch/arm/imx-common/speed.c @@ -36,9 +36,25 @@ int get_clocks(void) { #ifdef CONFIG_FSL_ESDHC #ifdef CONFIG_FSL_USDHC +#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR + gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); +#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR + gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); +#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR + gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); +#else gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); +#endif +#else +#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR + gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); +#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR + gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); +#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR + gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); #else - gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK); + gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); +#endif #endif #endif return 0; diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c index e2725e1a64..b021903d9b 100644 --- a/arch/arm/imx-common/timer.c +++ b/arch/arm/imx-common/timer.c @@ -27,6 +27,7 @@ #include <asm/io.h> #include <div64.h> #include <asm/arch/imx-regs.h> +#include <asm/arch/clock.h> /* General purpose timers registers */ struct mxc_gpt { @@ -44,7 +45,6 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR; #define GPTCR_FRR (1 << 9) /* Freerun / restart */ #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */ #define GPTCR_TEN 1 /* Timer enable */ -#define CLK_32KHZ 32768 /* 32Khz input */ DECLARE_GLOBAL_DATA_PTR; @@ -54,14 +54,14 @@ DECLARE_GLOBAL_DATA_PTR; static inline unsigned long long tick_to_time(unsigned long long tick) { tick *= CONFIG_SYS_HZ; - do_div(tick, CLK_32KHZ); + do_div(tick, MXC_CLK32); return tick; } static inline unsigned long long us_to_tick(unsigned long long usec) { - usec = usec * CLK_32KHZ + 999999; + usec = usec * MXC_CLK32 + 999999; do_div(usec, 1000000); return usec; @@ -86,7 +86,7 @@ int timer_init(void) __raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control); val = __raw_readl(&cur_gpt->counter); - lastinc = val / (CLK_32KHZ / CONFIG_SYS_HZ); + lastinc = val / (MXC_CLK32 / CONFIG_SYS_HZ); timestamp = 0; return 0; @@ -114,7 +114,7 @@ ulong get_timer_masked(void) { /* * get_ticks() returns a long long (64 bit), it wraps in - * 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ + * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in * 5 * 10^6 days - long enough. */ @@ -145,5 +145,5 @@ void __udelay(unsigned long usec) */ ulong get_tbclk(void) { - return CLK_32KHZ; + return MXC_CLK32; } |