diff options
Diffstat (limited to 'arch/arm/include/asm/arch-mx5')
-rw-r--r-- | arch/arm/include/asm/arch-mx5/clock.h | 7 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx5/crm_regs.h | 6 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx5/imx-regs.h | 11 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx5/iomux.h | 4 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx5/sys_proto.h | 3 |
5 files changed, 28 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index ea972a3985..35ee8155de 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -32,6 +32,10 @@ enum mxc_clock { MXC_UART_CLK, MXC_CSPI_CLK, MXC_FEC_CLK, + MXC_SATA_CLK, + MXC_DDR_CLK, + MXC_NFC_CLK, + MXC_PERIPH_CLK, }; unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref); @@ -39,10 +43,11 @@ unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref); u32 imx_get_uartclk(void); u32 imx_get_fecclk(void); unsigned int mxc_get_clock(enum mxc_clock clk); - +int mxc_set_clock(u32 ref, u32 freq, u32 clk_type); void set_usb_phy2_clk(void); void enable_usb_phy2_clk(unsigned char enable); void set_usboh3_clk(void); void enable_usboh3_clk(unsigned char enable); +void mxc_set_sata_internal_clock(void); #endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h index bdeafbc0df..4e0fc1bc1d 100644 --- a/arch/arm/include/asm/arch-mx5/crm_regs.h +++ b/arch/arm/include/asm/arch-mx5/crm_regs.h @@ -76,6 +76,9 @@ struct mxc_ccm_reg { u32 CCGR4; u32 CCGR5; u32 CCGR6; /* 0x0080 */ +#ifdef CONFIG_MX53 + u32 CCGR7; /* 0x0084 */ +#endif u32 cmeor; }; @@ -84,6 +87,9 @@ struct mxc_ccm_reg { #define MXC_CCM_CACRR_ARM_PODF_MASK 0x7 /* Define the bits in register CBCDR */ +#define MXC_CCM_CBCDR_DDR_HIFREQ_SEL (0x1 << 30) +#define MXC_CCM_CBCDR_DDR_PODF_MASK (0x7 << 27) +#define MXC_CCM_CBCDR_DDR_PODF_OFFSET 27 #define MXC_CCM_CBCDR_EMI_CLK_SEL (0x1 << 26) #define MXC_CCM_CBCDR_PERIPH_CLK_SEL (0x1 << 25) #define MXC_CCM_CBCDR_EMI_PODF_OFFSET 22 diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index 4fa66587a0..cef419077e 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -43,6 +43,7 @@ #define NFC_BASE_ADDR_AXI 0xF7FF0000 #define IRAM_BASE_ADDR 0xF8000000 #define CS1_BASE_ADDR 0xF4000000 +#define SATA_BASE_ADDR 0x10000000 #else #error "CPU_TYPE not defined" #endif @@ -93,6 +94,7 @@ #define GPIO5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000DC000) #define GPIO6_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E0000) #define GPIO7_BASE_ADDR (AIPS1_BASE_ADDR + 0x000E4000) +#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000F0000) #endif /* * AIPS 2 @@ -133,6 +135,10 @@ #define VPU_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F4000) #define SAHARA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000F8000) +#if defined(CONFIG_MX53) +#define UART5_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000) +#endif + /* * WEIM CSnGCR1 */ @@ -485,6 +491,11 @@ struct iim_regs { } bank[4]; }; +struct fuse_bank0_regs { + u32 fuse0_23[24]; + u32 gp[8]; +}; + struct fuse_bank1_regs { u32 fuse0_8[9]; u32 mac_addr[6]; diff --git a/arch/arm/include/asm/arch-mx5/iomux.h b/arch/arm/include/asm/arch-mx5/iomux.h index 760371b48f..e3765a37e3 100644 --- a/arch/arm/include/asm/arch-mx5/iomux.h +++ b/arch/arm/include/asm/arch-mx5/iomux.h @@ -66,8 +66,8 @@ typedef enum iomux_pad_config { PAD_CTL_HYS_ENABLE = 0x1 << 8, /* Hysteresis enabled */ PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9,/* DDR input CMOS */ PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,/* DDR input DDR */ - PAD_CTL_DRV_VOT_LOW = 0x0 << 13, /* Low voltage mode */ - PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,/* High voltage mode */ + PAD_CTL_DRV_VOT_LOW = 0x1 << 13, /* Low voltage mode */ + PAD_CTL_DRV_VOT_HIGH = 0x0 << 13,/* High voltage mode */ } iomux_pad_config_t; /* various IOMUX input functions */ diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index 13d12ee1a4..7b5246eea6 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -35,5 +35,8 @@ void set_chipselect_size(int const); */ int fecmxc_initialize(bd_t *bis); +u32 get_ahb_clk(void); +u32 get_periph_clk(void); +char *get_reset_cause(void); #endif |