diff options
Diffstat (limited to 'arch/arm/include/asm/arch-omap4/emif.h')
| -rw-r--r-- | arch/arm/include/asm/arch-omap4/emif.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/arm/include/asm/arch-omap4/emif.h b/arch/arm/include/asm/arch-omap4/emif.h index 6845c65b2d..3a549bad5e 100644 --- a/arch/arm/include/asm/arch-omap4/emif.h +++ b/arch/arm/include/asm/arch-omap4/emif.h @@ -593,17 +593,6 @@ struct dmm_lisa_map_regs { u32 dmm_lisa_map_3; }; -struct control_lpddr2io_regs { - u32 control_lpddr2io1_0; - u32 control_lpddr2io1_1; - u32 control_lpddr2io1_2; - u32 control_lpddr2io1_3; - u32 control_lpddr2io2_0; - u32 control_lpddr2io2_1; - u32 control_lpddr2io2_2; - u32 control_lpddr2io2_3; -}; - #define CS0 0 #define CS1 1 /* The maximum frequency at which the LPDDR2 interface can operate in Hz*/ @@ -823,13 +812,6 @@ struct control_lpddr2io_regs { /* MR16 value: refresh full array(no partial array self refresh) */ #define MR16_REF_FULL_ARRAY 0 -/* LPDDR2 IO regs */ -#define CONTROL_LPDDR2IO_SLEW_125PS_DRV8_PULL_DOWN 0x1C1C1C1C -#define CONTROL_LPDDR2IO_SLEW_325PS_DRV8_GATE_KEEPER 0x9E9E9E9E - -/* CONTROL_EFUSE_2 */ -#define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1 0x00ffc000 - /* * Maximum number of entries we keep in our array of timing tables * We need not keep all the speed bins supported by the device |