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Diffstat (limited to 'arch/arm/include/asm/arch-rockchip/grf_rk3288.h')
-rw-r--r--arch/arm/include/asm/arch-rockchip/grf_rk3288.h68
1 files changed, 37 insertions, 31 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
index aaffd19dea..1a7c8199c3 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
@@ -720,20 +720,20 @@ enum {
/* GRF_SOC_CON1 */
enum {
- RMII_MODE_SHIFT = 0xe,
- RMII_MODE_MASK = 1,
- RMII_MODE = 1,
+ RK3288_RMII_MODE_SHIFT = 14,
+ RK3288_RMII_MODE_MASK = (1 << RK3288_RMII_MODE_SHIFT),
+ RK3288_RMII_MODE = (1 << RK3288_RMII_MODE_SHIFT),
- GMAC_CLK_SEL_SHIFT = 0xc,
- GMAC_CLK_SEL_MASK = 3,
- GMAC_CLK_SEL_125M = 0,
- GMAC_CLK_SEL_25M = 0x3,
- GMAC_CLK_SEL_2_5M = 0x2,
+ RK3288_GMAC_CLK_SEL_SHIFT = 12,
+ RK3288_GMAC_CLK_SEL_MASK = (3 << RK3288_GMAC_CLK_SEL_SHIFT),
+ RK3288_GMAC_CLK_SEL_125M = (0 << RK3288_GMAC_CLK_SEL_SHIFT),
+ RK3288_GMAC_CLK_SEL_25M = (3 << RK3288_GMAC_CLK_SEL_SHIFT),
+ RK3288_GMAC_CLK_SEL_2_5M = (2 << RK3288_GMAC_CLK_SEL_SHIFT),
- RMII_CLK_SEL_SHIFT = 0xb,
- RMII_CLK_SEL_MASK = 1,
- RMII_CLK_SEL_2_5M = 0,
- RMII_CLK_SEL_25M,
+ RK3288_RMII_CLK_SEL_SHIFT = 11,
+ RK3288_RMII_CLK_SEL_MASK = (1 << RK3288_RMII_CLK_SEL_SHIFT),
+ RK3288_RMII_CLK_SEL_2_5M = (0 << RK3288_RMII_CLK_SEL_SHIFT),
+ RK3288_RMII_CLK_SEL_25M = (1 << RK3288_RMII_CLK_SEL_SHIFT),
GMAC_SPEED_SHIFT = 0xa,
GMAC_SPEED_MASK = 1,
@@ -743,10 +743,10 @@ enum {
GMAC_FLOWCTRL_SHIFT = 0x9,
GMAC_FLOWCTRL_MASK = 1,
- GMAC_PHY_INTF_SEL_SHIFT = 0x6,
- GMAC_PHY_INTF_SEL_MASK = 0x7,
- GMAC_PHY_INTF_SEL_RGMII = 0x1,
- GMAC_PHY_INTF_SEL_RMII = 0x4,
+ RK3288_GMAC_PHY_INTF_SEL_SHIFT = 6,
+ RK3288_GMAC_PHY_INTF_SEL_MASK = (7 << RK3288_GMAC_PHY_INTF_SEL_SHIFT),
+ RK3288_GMAC_PHY_INTF_SEL_RGMII = (1 << RK3288_GMAC_PHY_INTF_SEL_SHIFT),
+ RK3288_GMAC_PHY_INTF_SEL_RMII = (4 << RK3288_GMAC_PHY_INTF_SEL_SHIFT),
HOST_REMAP_SHIFT = 0x5,
HOST_REMAP_MASK = 1
@@ -801,21 +801,27 @@ enum {
/* GRF_SOC_CON3 */
enum {
- RXCLK_DLY_ENA_GMAC_SHIFT = 0xf,
- RXCLK_DLY_ENA_GMAC_MASK = 1,
- RXCLK_DLY_ENA_GMAC_DISABLE = 0,
- RXCLK_DLY_ENA_GMAC_ENABLE,
-
- TXCLK_DLY_ENA_GMAC_SHIFT = 0xe,
- TXCLK_DLY_ENA_GMAC_MASK = 1,
- TXCLK_DLY_ENA_GMAC_DISABLE = 0,
- TXCLK_DLY_ENA_GMAC_ENABLE,
-
- CLK_RX_DL_CFG_GMAC_SHIFT = 0x7,
- CLK_RX_DL_CFG_GMAC_MASK = 0x7f,
-
- CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
- CLK_TX_DL_CFG_GMAC_MASK = 0x7f,
+ RK3288_RXCLK_DLY_ENA_GMAC_SHIFT = 0xf,
+ RK3288_RXCLK_DLY_ENA_GMAC_MASK =
+ (1 << RK3288_RXCLK_DLY_ENA_GMAC_SHIFT),
+ RK3288_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+ RK3288_RXCLK_DLY_ENA_GMAC_ENABLE =
+ (1 << RK3288_RXCLK_DLY_ENA_GMAC_SHIFT),
+
+ RK3288_TXCLK_DLY_ENA_GMAC_SHIFT = 0xe,
+ RK3288_TXCLK_DLY_ENA_GMAC_MASK =
+ (1 << RK3288_TXCLK_DLY_ENA_GMAC_SHIFT),
+ RK3288_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+ RK3288_TXCLK_DLY_ENA_GMAC_ENABLE =
+ (1 << RK3288_RXCLK_DLY_ENA_GMAC_SHIFT),
+
+ RK3288_CLK_RX_DL_CFG_GMAC_SHIFT = 0x7,
+ RK3288_CLK_RX_DL_CFG_GMAC_MASK =
+ (0x7f << RK3288_CLK_RX_DL_CFG_GMAC_SHIFT),
+
+ RK3288_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+ RK3288_CLK_TX_DL_CFG_GMAC_MASK =
+ (0x7f << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT),
};
#endif